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-rw-r--r--arch/arc/include/asm/arcregs.h89
1 files changed, 53 insertions, 36 deletions
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 372466b371bf..be33db8a2ee3 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -9,19 +9,16 @@
9#ifndef _ASM_ARC_ARCREGS_H 9#ifndef _ASM_ARC_ARCREGS_H
10#define _ASM_ARC_ARCREGS_H 10#define _ASM_ARC_ARCREGS_H
11 11
12#ifdef __KERNEL__
13
14/* Build Configuration Registers */ 12/* Build Configuration Registers */
15#define ARC_REG_DCCMBASE_BCR 0x61 /* DCCM Base Addr */ 13#define ARC_REG_DCCMBASE_BCR 0x61 /* DCCM Base Addr */
16#define ARC_REG_CRC_BCR 0x62 14#define ARC_REG_CRC_BCR 0x62
17#define ARC_REG_DVFB_BCR 0x64
18#define ARC_REG_EXTARITH_BCR 0x65
19#define ARC_REG_VECBASE_BCR 0x68 15#define ARC_REG_VECBASE_BCR 0x68
20#define ARC_REG_PERIBASE_BCR 0x69 16#define ARC_REG_PERIBASE_BCR 0x69
21#define ARC_REG_FP_BCR 0x6B /* Single-Precision FPU */ 17#define ARC_REG_FP_BCR 0x6B /* ARCompact: Single-Precision FPU */
22#define ARC_REG_DPFP_BCR 0x6C /* Dbl Precision FPU */ 18#define ARC_REG_DPFP_BCR 0x6C /* ARCompact: Dbl Precision FPU */
23#define ARC_REG_DCCM_BCR 0x74 /* DCCM Present + SZ */ 19#define ARC_REG_DCCM_BCR 0x74 /* DCCM Present + SZ */
24#define ARC_REG_TIMERS_BCR 0x75 20#define ARC_REG_TIMERS_BCR 0x75
21#define ARC_REG_AP_BCR 0x76
25#define ARC_REG_ICCM_BCR 0x78 22#define ARC_REG_ICCM_BCR 0x78
26#define ARC_REG_XY_MEM_BCR 0x79 23#define ARC_REG_XY_MEM_BCR 0x79
27#define ARC_REG_MAC_BCR 0x7a 24#define ARC_REG_MAC_BCR 0x7a
@@ -31,6 +28,9 @@
31#define ARC_REG_MIXMAX_BCR 0x7e 28#define ARC_REG_MIXMAX_BCR 0x7e
32#define ARC_REG_BARREL_BCR 0x7f 29#define ARC_REG_BARREL_BCR 0x7f
33#define ARC_REG_D_UNCACH_BCR 0x6A 30#define ARC_REG_D_UNCACH_BCR 0x6A
31#define ARC_REG_BPU_BCR 0xc0
32#define ARC_REG_ISA_CFG_BCR 0xc1
33#define ARC_REG_SMART_BCR 0xFF
34 34
35/* status32 Bits Positions */ 35/* status32 Bits Positions */
36#define STATUS_AE_BIT 5 /* Exception active */ 36#define STATUS_AE_BIT 5 /* Exception active */
@@ -191,14 +191,6 @@
191#define PAGES_TO_KB(n_pages) ((n_pages) << (PAGE_SHIFT - 10)) 191#define PAGES_TO_KB(n_pages) ((n_pages) << (PAGE_SHIFT - 10))
192#define PAGES_TO_MB(n_pages) (PAGES_TO_KB(n_pages) >> 10) 192#define PAGES_TO_MB(n_pages) (PAGES_TO_KB(n_pages) >> 10)
193 193
194#ifdef CONFIG_ARC_FPU_SAVE_RESTORE
195/* These DPFP regs need to be saved/restored across ctx-sw */
196struct arc_fpu {
197 struct {
198 unsigned int l, h;
199 } aux_dpfp[2];
200};
201#endif
202 194
203/* 195/*
204 *************************************************************** 196 ***************************************************************
@@ -212,27 +204,19 @@ struct bcr_identity {
212#endif 204#endif
213}; 205};
214 206
215#define EXTN_SWAP_VALID 0x1 207struct bcr_isa {
216#define EXTN_NORM_VALID 0x2
217#define EXTN_MINMAX_VALID 0x2
218#define EXTN_BARREL_VALID 0x2
219
220struct bcr_extn {
221#ifdef CONFIG_CPU_BIG_ENDIAN 208#ifdef CONFIG_CPU_BIG_ENDIAN
222 unsigned int pad:20, crc:1, ext_arith:2, mul:2, barrel:2, minmax:2, 209 unsigned int pad1:23, atomic1:1, ver:8;
223 norm:2, swap:1;
224#else 210#else
225 unsigned int swap:1, norm:2, minmax:2, barrel:2, mul:2, ext_arith:2, 211 unsigned int ver:8, atomic1:1, pad1:23;
226 crc:1, pad:20;
227#endif 212#endif
228}; 213};
229 214
230/* DSP Options Ref Manual */ 215struct bcr_mpy {
231struct bcr_extn_mac_mul {
232#ifdef CONFIG_CPU_BIG_ENDIAN 216#ifdef CONFIG_CPU_BIG_ENDIAN
233 unsigned int pad:16, type:8, ver:8; 217 unsigned int pad:8, x1616:8, dsp:4, cycles:2, type:2, ver:8;
234#else 218#else
235 unsigned int ver:8, type:8, pad:16; 219 unsigned int ver:8, type:2, cycles:2, dsp:4, x1616:8, pad:8;
236#endif 220#endif
237}; 221};
238 222
@@ -251,6 +235,7 @@ struct bcr_perip {
251 unsigned int pad:8, sz:8, pad2:8, start:8; 235 unsigned int pad:8, sz:8, pad2:8, start:8;
252#endif 236#endif
253}; 237};
238
254struct bcr_iccm { 239struct bcr_iccm {
255#ifdef CONFIG_CPU_BIG_ENDIAN 240#ifdef CONFIG_CPU_BIG_ENDIAN
256 unsigned int base:16, pad:5, sz:3, ver:8; 241 unsigned int base:16, pad:5, sz:3, ver:8;
@@ -277,8 +262,8 @@ struct bcr_dccm {
277#endif 262#endif
278}; 263};
279 264
280/* Both SP and DP FPU BCRs have same format */ 265/* ARCompact: Both SP and DP FPU BCRs have same format */
281struct bcr_fp { 266struct bcr_fp_arcompact {
282#ifdef CONFIG_CPU_BIG_ENDIAN 267#ifdef CONFIG_CPU_BIG_ENDIAN
283 unsigned int fast:1, ver:8; 268 unsigned int fast:1, ver:8;
284#else 269#else
@@ -286,6 +271,30 @@ struct bcr_fp {
286#endif 271#endif
287}; 272};
288 273
274struct bcr_timer {
275#ifdef CONFIG_CPU_BIG_ENDIAN
276 unsigned int pad2:15, rtsc:1, pad1:6, t1:1, t0:1, ver:8;
277#else
278 unsigned int ver:8, t0:1, t1:1, pad1:6, rtsc:1, pad2:15;
279#endif
280};
281
282struct bcr_bpu_arcompact {
283#ifdef CONFIG_CPU_BIG_ENDIAN
284 unsigned int pad2:19, fam:1, pad:2, ent:2, ver:8;
285#else
286 unsigned int ver:8, ent:2, pad:2, fam:1, pad2:19;
287#endif
288};
289
290struct bcr_generic {
291#ifdef CONFIG_CPU_BIG_ENDIAN
292 unsigned int pad:24, ver:8;
293#else
294 unsigned int ver:8, pad:24;
295#endif
296};
297
289/* 298/*
290 ******************************************************************* 299 *******************************************************************
291 * Generic structures to hold build configuration used at runtime 300 * Generic structures to hold build configuration used at runtime
@@ -299,6 +308,10 @@ struct cpuinfo_arc_cache {
299 unsigned int sz_k:8, line_len:8, assoc:4, ver:4, alias:1, vipt:1, pad:6; 308 unsigned int sz_k:8, line_len:8, assoc:4, ver:4, alias:1, vipt:1, pad:6;
300}; 309};
301 310
311struct cpuinfo_arc_bpu {
312 unsigned int ver, full, num_cache, num_pred;
313};
314
302struct cpuinfo_arc_ccm { 315struct cpuinfo_arc_ccm {
303 unsigned int base_addr, sz; 316 unsigned int base_addr, sz;
304}; 317};
@@ -306,21 +319,25 @@ struct cpuinfo_arc_ccm {
306struct cpuinfo_arc { 319struct cpuinfo_arc {
307 struct cpuinfo_arc_cache icache, dcache; 320 struct cpuinfo_arc_cache icache, dcache;
308 struct cpuinfo_arc_mmu mmu; 321 struct cpuinfo_arc_mmu mmu;
322 struct cpuinfo_arc_bpu bpu;
309 struct bcr_identity core; 323 struct bcr_identity core;
310 unsigned int timers; 324 struct bcr_isa isa;
325 struct bcr_timer timers;
311 unsigned int vec_base; 326 unsigned int vec_base;
312 unsigned int uncached_base; 327 unsigned int uncached_base;
313 struct cpuinfo_arc_ccm iccm, dccm; 328 struct cpuinfo_arc_ccm iccm, dccm;
314 struct bcr_extn extn; 329 struct {
330 unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, pad1:3,
331 fpu_sp:1, fpu_dp:1, pad2:6,
332 debug:1, ap:1, smart:1, rtt:1, pad3:4,
333 pad4:8;
334 } extn;
335 struct bcr_mpy extn_mpy;
315 struct bcr_extn_xymem extn_xymem; 336 struct bcr_extn_xymem extn_xymem;
316 struct bcr_extn_mac_mul extn_mac_mul;
317 struct bcr_fp fp, dpfp;
318}; 337};
319 338
320extern struct cpuinfo_arc cpuinfo_arc700[]; 339extern struct cpuinfo_arc cpuinfo_arc700[];
321 340
322#endif /* __ASEMBLY__ */ 341#endif /* __ASEMBLY__ */
323 342
324#endif /* __KERNEL__ */
325
326#endif /* _ASM_ARC_ARCREGS_H */ 343#endif /* _ASM_ARC_ARCREGS_H */