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-rw-r--r--Documentation/devicetree/bindings/reset/uniphier-reset.txt25
1 files changed, 14 insertions, 11 deletions
diff --git a/Documentation/devicetree/bindings/reset/uniphier-reset.txt b/Documentation/devicetree/bindings/reset/uniphier-reset.txt
index 101743dda223..ea005177d20a 100644
--- a/Documentation/devicetree/bindings/reset/uniphier-reset.txt
+++ b/Documentation/devicetree/bindings/reset/uniphier-reset.txt
@@ -120,27 +120,30 @@ Example:
120 }; 120 };
121 121
122 122
123USB3 core reset 123Peripheral core reset in glue layer
124--------------- 124-----------------------------------
125 125
126USB3 core reset belongs to USB3 glue layer. Before using the core reset, 126Some peripheral core reset belongs to its own glue layer. Before using
127it is necessary to control the clocks and resets to enable this layer. 127this core reset, it is necessary to control the clocks and resets to enable
128These clocks and resets should be described in each property. 128this layer. These clocks and resets should be described in each property.
129 129
130Required properties: 130Required properties:
131- compatible: Should be 131- compatible: Should be
132 "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC 132 "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3
133 "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC 133 "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3
134 "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC 134 "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3
135 "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC 135 "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3
136 "socionext,uniphier-pro4-ahci-reset" - for Pro4 SoC AHCI
137 "socionext,uniphier-pxs2-ahci-reset" - for PXs2 SoC AHCI
138 "socionext,uniphier-pxs3-ahci-reset" - for PXs3 SoC AHCI
136- #reset-cells: Should be 1. 139- #reset-cells: Should be 1.
137- reg: Specifies offset and length of the register set for the device. 140- reg: Specifies offset and length of the register set for the device.
138- clocks: A list of phandles to the clock gate for USB3 glue layer. 141- clocks: A list of phandles to the clock gate for the glue layer.
139 According to the clock-names, appropriate clocks are required. 142 According to the clock-names, appropriate clocks are required.
140- clock-names: Should contain 143- clock-names: Should contain
141 "gio", "link" - for Pro4 SoC 144 "gio", "link" - for Pro4 SoC
142 "link" - for others 145 "link" - for others
143- resets: A list of phandles to the reset control for USB3 glue layer. 146- resets: A list of phandles to the reset control for the glue layer.
144 According to the reset-names, appropriate resets are required. 147 According to the reset-names, appropriate resets are required.
145- reset-names: Should contain 148- reset-names: Should contain
146 "gio", "link" - for Pro4 SoC 149 "gio", "link" - for Pro4 SoC