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-rw-r--r--arch/arm/boot/dts/am335x-phycore-som.dtsi4
-rw-r--r--arch/arm/boot/dts/am57xx-beagle-x15.dts4
-rw-r--r--arch/arm/boot/dts/dm8148-evm.dts4
-rw-r--r--arch/arm/boot/dts/dm8148-t410.dts6
-rw-r--r--arch/arm/boot/dts/dm814x.dtsi8
-rw-r--r--arch/arm/boot/dts/dra7.dtsi4
-rw-r--r--arch/arm/boot/dts/omap2430.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-beagle.dts2
-rw-r--r--arch/arm/boot/dts/omap3-igep.dtsi6
-rw-r--r--arch/arm/boot/dts/omap3-igep0020-common.dtsi6
-rw-r--r--arch/arm/boot/dts/omap3.dtsi2
-rw-r--r--arch/arm/boot/dts/omap4.dtsi2
-rw-r--r--arch/arm/boot/dts/omap5.dtsi2
-rw-r--r--arch/arm/boot/dts/stih407.dtsi82
-rw-r--r--arch/arm/boot/dts/stih410.dtsi82
-rw-r--r--arch/arm/configs/omap2plus_defconfig2
-rw-r--r--arch/arm/mach-omap2/Kconfig6
-rw-r--r--arch/arm/mach-omap2/board-generic.c7
-rw-r--r--arch/arm/mach-omap2/pm.h3
-rw-r--r--drivers/firmware/Kconfig8
-rw-r--r--drivers/firmware/Makefile3
-rw-r--r--drivers/firmware/qcom_scm-64.c63
22 files changed, 187 insertions, 121 deletions
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index 4d28fc3aac69..5dd084f3c81c 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -252,10 +252,10 @@
252 }; 252 };
253 253
254 vdd1_reg: regulator@2 { 254 vdd1_reg: regulator@2 {
255 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 255 /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
256 regulator-name = "vdd_mpu"; 256 regulator-name = "vdd_mpu";
257 regulator-min-microvolt = <912500>; 257 regulator-min-microvolt = <912500>;
258 regulator-max-microvolt = <1312500>; 258 regulator-max-microvolt = <1378000>;
259 regulator-boot-on; 259 regulator-boot-on;
260 regulator-always-on; 260 regulator-always-on;
261 }; 261 };
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 3a05b94f59ed..a4274abf1437 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -517,7 +517,8 @@
517 mcp_rtc: rtc@6f { 517 mcp_rtc: rtc@6f {
518 compatible = "microchip,mcp7941x"; 518 compatible = "microchip,mcp7941x";
519 reg = <0x6f>; 519 reg = <0x6f>;
520 interrupts = <GIC_SPI 2 IRQ_TYPE_EDGE_RISING>; /* IRQ_SYS_1N */ 520 interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
521 <&dra7_pmx_core 0x424>;
521 522
522 pinctrl-names = "default"; 523 pinctrl-names = "default";
523 pinctrl-0 = <&mcp79410_pins_default>; 524 pinctrl-0 = <&mcp79410_pins_default>;
@@ -579,7 +580,6 @@
579 pinctrl-0 = <&mmc1_pins_default>; 580 pinctrl-0 = <&mmc1_pins_default>;
580 581
581 vmmc-supply = <&ldo1_reg>; 582 vmmc-supply = <&ldo1_reg>;
582 vmmc_aux-supply = <&vdd_3v3>;
583 bus-width = <4>; 583 bus-width = <4>;
584 cd-gpios = <&gpio6 27 0>; /* gpio 219 */ 584 cd-gpios = <&gpio6 27 0>; /* gpio 219 */
585}; 585};
diff --git a/arch/arm/boot/dts/dm8148-evm.dts b/arch/arm/boot/dts/dm8148-evm.dts
index 92bacd3c8fab..109fd4711647 100644
--- a/arch/arm/boot/dts/dm8148-evm.dts
+++ b/arch/arm/boot/dts/dm8148-evm.dts
@@ -19,10 +19,10 @@
19 19
20&cpsw_emac0 { 20&cpsw_emac0 {
21 phy_id = <&davinci_mdio>, <0>; 21 phy_id = <&davinci_mdio>, <0>;
22 phy-mode = "mii"; 22 phy-mode = "rgmii";
23}; 23};
24 24
25&cpsw_emac1 { 25&cpsw_emac1 {
26 phy_id = <&davinci_mdio>, <1>; 26 phy_id = <&davinci_mdio>, <1>;
27 phy-mode = "mii"; 27 phy-mode = "rgmii";
28}; 28};
diff --git a/arch/arm/boot/dts/dm8148-t410.dts b/arch/arm/boot/dts/dm8148-t410.dts
index 8c4bbc7573df..79838dd8dee7 100644
--- a/arch/arm/boot/dts/dm8148-t410.dts
+++ b/arch/arm/boot/dts/dm8148-t410.dts
@@ -8,7 +8,7 @@
8#include "dm814x.dtsi" 8#include "dm814x.dtsi"
9 9
10/ { 10/ {
11 model = "DM8148 EVM"; 11 model = "HP t410 Smart Zero Client";
12 compatible = "hp,t410", "ti,dm8148"; 12 compatible = "hp,t410", "ti,dm8148";
13 13
14 memory { 14 memory {
@@ -19,10 +19,10 @@
19 19
20&cpsw_emac0 { 20&cpsw_emac0 {
21 phy_id = <&davinci_mdio>, <0>; 21 phy_id = <&davinci_mdio>, <0>;
22 phy-mode = "mii"; 22 phy-mode = "rgmii";
23}; 23};
24 24
25&cpsw_emac1 { 25&cpsw_emac1 {
26 phy_id = <&davinci_mdio>, <1>; 26 phy_id = <&davinci_mdio>, <1>;
27 phy-mode = "mii"; 27 phy-mode = "rgmii";
28}; 28};
diff --git a/arch/arm/boot/dts/dm814x.dtsi b/arch/arm/boot/dts/dm814x.dtsi
index 972c9c9e885b..7988b42e5764 100644
--- a/arch/arm/boot/dts/dm814x.dtsi
+++ b/arch/arm/boot/dts/dm814x.dtsi
@@ -181,9 +181,9 @@
181 ti,hwmods = "timer3"; 181 ti,hwmods = "timer3";
182 }; 182 };
183 183
184 control: control@160000 { 184 control: control@140000 {
185 compatible = "ti,dm814-scm", "simple-bus"; 185 compatible = "ti,dm814-scm", "simple-bus";
186 reg = <0x160000 0x16d000>; 186 reg = <0x140000 0x16d000>;
187 #address-cells = <1>; 187 #address-cells = <1>;
188 #size-cells = <1>; 188 #size-cells = <1>;
189 ranges = <0 0x160000 0x16d000>; 189 ranges = <0 0x160000 0x16d000>;
@@ -321,9 +321,9 @@
321 mac-address = [ 00 00 00 00 00 00 ]; 321 mac-address = [ 00 00 00 00 00 00 ];
322 }; 322 };
323 323
324 phy_sel: cpsw-phy-sel@0x48160650 { 324 phy_sel: cpsw-phy-sel@48140650 {
325 compatible = "ti,am3352-cpsw-phy-sel"; 325 compatible = "ti,am3352-cpsw-phy-sel";
326 reg= <0x48160650 0x4>; 326 reg= <0x48140650 0x4>;
327 reg-names = "gmii-sel"; 327 reg-names = "gmii-sel";
328 }; 328 };
329 }; 329 };
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5d65db9ebc2b..fed95a4547ee 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -122,7 +122,7 @@
122 #size-cells = <1>; 122 #size-cells = <1>;
123 123
124 pbias_regulator: pbias_regulator { 124 pbias_regulator: pbias_regulator {
125 compatible = "ti,pbias-omap"; 125 compatible = "ti,pbias-dra7", "ti,pbias-omap";
126 reg = <0xe00 0x4>; 126 reg = <0xe00 0x4>;
127 syscon = <&scm_conf>; 127 syscon = <&scm_conf>;
128 pbias_mmc_reg: pbias_mmc_omap5 { 128 pbias_mmc_reg: pbias_mmc_omap5 {
@@ -1417,7 +1417,7 @@
1417 ti,irqs-safe-map = <0>; 1417 ti,irqs-safe-map = <0>;
1418 }; 1418 };
1419 1419
1420 mac: ethernet@4a100000 { 1420 mac: ethernet@48484000 {
1421 compatible = "ti,dra7-cpsw","ti,cpsw"; 1421 compatible = "ti,dra7-cpsw","ti,cpsw";
1422 ti,hwmods = "gmac"; 1422 ti,hwmods = "gmac";
1423 clocks = <&dpll_gmac_ck>, <&gmac_gmii_ref_clk_div>; 1423 clocks = <&dpll_gmac_ck>, <&gmac_gmii_ref_clk_div>;
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index 2390f387c271..3961a6f170e1 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -63,7 +63,7 @@
63 }; 63 };
64 64
65 pbias_regulator: pbias_regulator { 65 pbias_regulator: pbias_regulator {
66 compatible = "ti,pbias-omap"; 66 compatible = "ti,pbias-omap2", "ti,pbias-omap";
67 reg = <0x230 0x4>; 67 reg = <0x230 0x4>;
68 syscon = <&scm_conf>; 68 syscon = <&scm_conf>;
69 pbias_mmc_reg: pbias_mmc_omap2430 { 69 pbias_mmc_reg: pbias_mmc_omap2430 {
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index a5474113cd50..67659a0ed13e 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -202,7 +202,7 @@
202 202
203 tfp410_pins: pinmux_tfp410_pins { 203 tfp410_pins: pinmux_tfp410_pins {
204 pinctrl-single,pins = < 204 pinctrl-single,pins = <
205 0x194 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ 205 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
206 >; 206 >;
207 }; 207 };
208 208
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index d5e5cd449b16..2230e1c03320 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -78,12 +78,6 @@
78 >; 78 >;
79 }; 79 };
80 80
81 smsc9221_pins: pinmux_smsc9221_pins {
82 pinctrl-single,pins = <
83 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
84 >;
85 };
86
87 i2c1_pins: pinmux_i2c1_pins { 81 i2c1_pins: pinmux_i2c1_pins {
88 pinctrl-single,pins = < 82 pinctrl-single,pins = <
89 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ 83 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
diff --git a/arch/arm/boot/dts/omap3-igep0020-common.dtsi b/arch/arm/boot/dts/omap3-igep0020-common.dtsi
index e458c2185e3c..5ad688c57a00 100644
--- a/arch/arm/boot/dts/omap3-igep0020-common.dtsi
+++ b/arch/arm/boot/dts/omap3-igep0020-common.dtsi
@@ -156,6 +156,12 @@
156 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ 156 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
157 >; 157 >;
158 }; 158 };
159
160 smsc9221_pins: pinmux_smsc9221_pins {
161 pinctrl-single,pins = <
162 OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
163 >;
164 };
159}; 165};
160 166
161&omap3_pmx_core2 { 167&omap3_pmx_core2 {
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 69a40cfc1f29..9af9ae190299 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -203,7 +203,7 @@
203 }; 203 };
204 204
205 pbias_regulator: pbias_regulator { 205 pbias_regulator: pbias_regulator {
206 compatible = "ti,pbias-omap"; 206 compatible = "ti,pbias-omap3", "ti,pbias-omap";
207 reg = <0x2b0 0x4>; 207 reg = <0x2b0 0x4>;
208 syscon = <&scm_conf>; 208 syscon = <&scm_conf>;
209 pbias_mmc_reg: pbias_mmc_omap2430 { 209 pbias_mmc_reg: pbias_mmc_omap2430 {
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index abc4473e6f8a..5aad7f37df8b 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -198,7 +198,7 @@
198 #size-cells = <1>; 198 #size-cells = <1>;
199 199
200 pbias_regulator: pbias_regulator { 200 pbias_regulator: pbias_regulator {
201 compatible = "ti,pbias-omap"; 201 compatible = "ti,pbias-omap4", "ti,pbias-omap";
202 reg = <0x60 0x4>; 202 reg = <0x60 0x4>;
203 syscon = <&omap4_padconf_global>; 203 syscon = <&omap4_padconf_global>;
204 pbias_mmc_reg: pbias_mmc_omap4 { 204 pbias_mmc_reg: pbias_mmc_omap4 {
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 4205a8ac9ddb..8d5f9d26110e 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -187,7 +187,7 @@
187 #size-cells = <1>; 187 #size-cells = <1>;
188 188
189 pbias_regulator: pbias_regulator { 189 pbias_regulator: pbias_regulator {
190 compatible = "ti,pbias-omap"; 190 compatible = "ti,pbias-omap5", "ti,pbias-omap";
191 reg = <0x60 0x4>; 191 reg = <0x60 0x4>;
192 syscon = <&omap5_padconf_global>; 192 syscon = <&omap5_padconf_global>;
193 pbias_mmc_reg: pbias_mmc_omap5 { 193 pbias_mmc_reg: pbias_mmc_omap5 {
diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi
index 3efa3b2ebe90..6b914e4bb099 100644
--- a/arch/arm/boot/dts/stih407.dtsi
+++ b/arch/arm/boot/dts/stih407.dtsi
@@ -103,48 +103,46 @@
103 <&clk_s_d0_quadfs 0>, 103 <&clk_s_d0_quadfs 0>,
104 <&clk_s_d2_quadfs 0>, 104 <&clk_s_d2_quadfs 0>,
105 <&clk_s_d2_quadfs 0>; 105 <&clk_s_d2_quadfs 0>;
106 ranges; 106 };
107 107
108 sti-hdmi@8d04000 { 108 sti-hdmi@8d04000 {
109 compatible = "st,stih407-hdmi"; 109 compatible = "st,stih407-hdmi";
110 reg = <0x8d04000 0x1000>; 110 reg = <0x8d04000 0x1000>;
111 reg-names = "hdmi-reg"; 111 reg-names = "hdmi-reg";
112 interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>; 112 interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
113 interrupt-names = "irq"; 113 interrupt-names = "irq";
114 clock-names = "pix", 114 clock-names = "pix",
115 "tmds", 115 "tmds",
116 "phy", 116 "phy",
117 "audio", 117 "audio",
118 "main_parent", 118 "main_parent",
119 "aux_parent"; 119 "aux_parent";
120 120
121 clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, 121 clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
122 <&clk_s_d2_flexgen CLK_TMDS_HDMI>, 122 <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
123 <&clk_s_d2_flexgen CLK_REF_HDMIPHY>, 123 <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
124 <&clk_s_d0_flexgen CLK_PCM_0>, 124 <&clk_s_d0_flexgen CLK_PCM_0>,
125 <&clk_s_d2_quadfs 0>, 125 <&clk_s_d2_quadfs 0>,
126 <&clk_s_d2_quadfs 1>; 126 <&clk_s_d2_quadfs 1>;
127 127
128 hdmi,hpd-gpio = <&pio5 3>; 128 hdmi,hpd-gpio = <&pio5 3>;
129 reset-names = "hdmi"; 129 reset-names = "hdmi";
130 resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>; 130 resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
131 ddc = <&hdmiddc>; 131 ddc = <&hdmiddc>;
132 132 };
133 }; 133
134 134 sti-hda@8d02000 {
135 sti-hda@8d02000 { 135 compatible = "st,stih407-hda";
136 compatible = "st,stih407-hda"; 136 reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
137 reg = <0x8d02000 0x400>, <0x92b0120 0x4>; 137 reg-names = "hda-reg", "video-dacs-ctrl";
138 reg-names = "hda-reg", "video-dacs-ctrl"; 138 clock-names = "pix",
139 clock-names = "pix", 139 "hddac",
140 "hddac", 140 "main_parent",
141 "main_parent", 141 "aux_parent";
142 "aux_parent"; 142 clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
143 clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>, 143 <&clk_s_d2_flexgen CLK_HDDAC>,
144 <&clk_s_d2_flexgen CLK_HDDAC>, 144 <&clk_s_d2_quadfs 0>,
145 <&clk_s_d2_quadfs 0>, 145 <&clk_s_d2_quadfs 1>;
146 <&clk_s_d2_quadfs 1>;
147 };
148 }; 146 };
149 }; 147 };
150 }; 148 };
diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi
index 6f40bc99c22f..8c6e61a27234 100644
--- a/arch/arm/boot/dts/stih410.dtsi
+++ b/arch/arm/boot/dts/stih410.dtsi
@@ -178,48 +178,46 @@
178 <&clk_s_d0_quadfs 0>, 178 <&clk_s_d0_quadfs 0>,
179 <&clk_s_d2_quadfs 0>, 179 <&clk_s_d2_quadfs 0>,
180 <&clk_s_d2_quadfs 0>; 180 <&clk_s_d2_quadfs 0>;
181 ranges; 181 };
182 182
183 sti-hdmi@8d04000 { 183 sti-hdmi@8d04000 {
184 compatible = "st,stih407-hdmi"; 184 compatible = "st,stih407-hdmi";
185 reg = <0x8d04000 0x1000>; 185 reg = <0x8d04000 0x1000>;
186 reg-names = "hdmi-reg"; 186 reg-names = "hdmi-reg";
187 interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>; 187 interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
188 interrupt-names = "irq"; 188 interrupt-names = "irq";
189 clock-names = "pix", 189 clock-names = "pix",
190 "tmds", 190 "tmds",
191 "phy", 191 "phy",
192 "audio", 192 "audio",
193 "main_parent", 193 "main_parent",
194 "aux_parent"; 194 "aux_parent";
195 195
196 clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, 196 clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
197 <&clk_s_d2_flexgen CLK_TMDS_HDMI>, 197 <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
198 <&clk_s_d2_flexgen CLK_REF_HDMIPHY>, 198 <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
199 <&clk_s_d0_flexgen CLK_PCM_0>, 199 <&clk_s_d0_flexgen CLK_PCM_0>,
200 <&clk_s_d2_quadfs 0>, 200 <&clk_s_d2_quadfs 0>,
201 <&clk_s_d2_quadfs 1>; 201 <&clk_s_d2_quadfs 1>;
202 202
203 hdmi,hpd-gpio = <&pio5 3>; 203 hdmi,hpd-gpio = <&pio5 3>;
204 reset-names = "hdmi"; 204 reset-names = "hdmi";
205 resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>; 205 resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
206 ddc = <&hdmiddc>; 206 ddc = <&hdmiddc>;
207 207 };
208 }; 208
209 209 sti-hda@8d02000 {
210 sti-hda@8d02000 { 210 compatible = "st,stih407-hda";
211 compatible = "st,stih407-hda"; 211 reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
212 reg = <0x8d02000 0x400>, <0x92b0120 0x4>; 212 reg-names = "hda-reg", "video-dacs-ctrl";
213 reg-names = "hda-reg", "video-dacs-ctrl"; 213 clock-names = "pix",
214 clock-names = "pix", 214 "hddac",
215 "hddac", 215 "main_parent",
216 "main_parent", 216 "aux_parent";
217 "aux_parent"; 217 clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
218 clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>, 218 <&clk_s_d2_flexgen CLK_HDDAC>,
219 <&clk_s_d2_flexgen CLK_HDDAC>, 219 <&clk_s_d2_quadfs 0>,
220 <&clk_s_d2_quadfs 0>, 220 <&clk_s_d2_quadfs 1>;
221 <&clk_s_d2_quadfs 1>;
222 };
223 }; 221 };
224 }; 222 };
225 223
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 50c84e1876fc..1860f517421d 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -240,7 +240,7 @@ CONFIG_SSI_PROTOCOL=m
240CONFIG_PINCTRL_SINGLE=y 240CONFIG_PINCTRL_SINGLE=y
241CONFIG_DEBUG_GPIO=y 241CONFIG_DEBUG_GPIO=y
242CONFIG_GPIO_SYSFS=y 242CONFIG_GPIO_SYSFS=y
243CONFIG_GPIO_PCF857X=m 243CONFIG_GPIO_PCF857X=y
244CONFIG_GPIO_TWL4030=y 244CONFIG_GPIO_TWL4030=y
245CONFIG_GPIO_PALMAS=y 245CONFIG_GPIO_PALMAS=y
246CONFIG_W1=m 246CONFIG_W1=m
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 07d2e100caab..b3a0dff67e3f 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -44,10 +44,11 @@ config SOC_OMAP5
44 select ARM_CPU_SUSPEND if PM 44 select ARM_CPU_SUSPEND if PM
45 select ARM_GIC 45 select ARM_GIC
46 select HAVE_ARM_SCU if SMP 46 select HAVE_ARM_SCU if SMP
47 select HAVE_ARM_TWD if SMP
48 select HAVE_ARM_ARCH_TIMER 47 select HAVE_ARM_ARCH_TIMER
49 select ARM_ERRATA_798181 if SMP 48 select ARM_ERRATA_798181 if SMP
49 select OMAP_INTERCONNECT
50 select OMAP_INTERCONNECT_BARRIER 50 select OMAP_INTERCONNECT_BARRIER
51 select PM_OPP if PM
51 52
52config SOC_AM33XX 53config SOC_AM33XX
53 bool "TI AM33XX" 54 bool "TI AM33XX"
@@ -70,10 +71,13 @@ config SOC_DRA7XX
70 select ARCH_OMAP2PLUS 71 select ARCH_OMAP2PLUS
71 select ARM_CPU_SUSPEND if PM 72 select ARM_CPU_SUSPEND if PM
72 select ARM_GIC 73 select ARM_GIC
74 select HAVE_ARM_SCU if SMP
73 select HAVE_ARM_ARCH_TIMER 75 select HAVE_ARM_ARCH_TIMER
74 select IRQ_CROSSBAR 76 select IRQ_CROSSBAR
75 select ARM_ERRATA_798181 if SMP 77 select ARM_ERRATA_798181 if SMP
78 select OMAP_INTERCONNECT
76 select OMAP_INTERCONNECT_BARRIER 79 select OMAP_INTERCONNECT_BARRIER
80 select PM_OPP if PM
77 81
78config ARCH_OMAP2PLUS 82config ARCH_OMAP2PLUS
79 bool 83 bool
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 24c9afc9e8a7..6133eaac685d 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -20,13 +20,6 @@
20 20
21#include "common.h" 21#include "common.h"
22 22
23#if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3))
24#define intc_of_init NULL
25#endif
26#ifndef CONFIG_ARCH_OMAP4
27#define gic_of_init NULL
28#endif
29
30static const struct of_device_id omap_dt_match_table[] __initconst = { 23static const struct of_device_id omap_dt_match_table[] __initconst = {
31 { .compatible = "simple-bus", }, 24 { .compatible = "simple-bus", },
32 { .compatible = "ti,omap-infra", }, 25 { .compatible = "ti,omap-infra", },
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 425bfcd67db6..b668719b9b25 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -103,7 +103,8 @@ static inline void enable_omap3630_toggle_l2_on_restore(void) { }
103#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD (1 << 0) 103#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD (1 << 0)
104#define PM_OMAP4_CPU_OSWR_DISABLE (1 << 1) 104#define PM_OMAP4_CPU_OSWR_DISABLE (1 << 1)
105 105
106#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4) 106#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) ||\
107 defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
107extern u16 pm44xx_errata; 108extern u16 pm44xx_errata;
108#define IS_PM44XX_ERRATUM(id) (pm44xx_errata & (id)) 109#define IS_PM44XX_ERRATUM(id) (pm44xx_errata & (id))
109#else 110#else
diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
index d8de6a8dd4de..665efca59487 100644
--- a/drivers/firmware/Kconfig
+++ b/drivers/firmware/Kconfig
@@ -139,6 +139,14 @@ config QCOM_SCM
139 bool 139 bool
140 depends on ARM || ARM64 140 depends on ARM || ARM64
141 141
142config QCOM_SCM_32
143 def_bool y
144 depends on QCOM_SCM && ARM
145
146config QCOM_SCM_64
147 def_bool y
148 depends on QCOM_SCM && ARM64
149
142source "drivers/firmware/broadcom/Kconfig" 150source "drivers/firmware/broadcom/Kconfig"
143source "drivers/firmware/google/Kconfig" 151source "drivers/firmware/google/Kconfig"
144source "drivers/firmware/efi/Kconfig" 152source "drivers/firmware/efi/Kconfig"
diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile
index 000830fc6707..2ee83474a3c1 100644
--- a/drivers/firmware/Makefile
+++ b/drivers/firmware/Makefile
@@ -13,7 +13,8 @@ obj-$(CONFIG_ISCSI_IBFT_FIND) += iscsi_ibft_find.o
13obj-$(CONFIG_ISCSI_IBFT) += iscsi_ibft.o 13obj-$(CONFIG_ISCSI_IBFT) += iscsi_ibft.o
14obj-$(CONFIG_FIRMWARE_MEMMAP) += memmap.o 14obj-$(CONFIG_FIRMWARE_MEMMAP) += memmap.o
15obj-$(CONFIG_QCOM_SCM) += qcom_scm.o 15obj-$(CONFIG_QCOM_SCM) += qcom_scm.o
16obj-$(CONFIG_QCOM_SCM) += qcom_scm-32.o 16obj-$(CONFIG_QCOM_SCM_64) += qcom_scm-64.o
17obj-$(CONFIG_QCOM_SCM_32) += qcom_scm-32.o
17CFLAGS_qcom_scm-32.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) 18CFLAGS_qcom_scm-32.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
18 19
19obj-y += broadcom/ 20obj-y += broadcom/
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
new file mode 100644
index 000000000000..bb6555f6d63b
--- /dev/null
+++ b/drivers/firmware/qcom_scm-64.c
@@ -0,0 +1,63 @@
1/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/io.h>
14#include <linux/errno.h>
15#include <linux/qcom_scm.h>
16
17/**
18 * qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
19 * @entry: Entry point function for the cpus
20 * @cpus: The cpumask of cpus that will use the entry point
21 *
22 * Set the cold boot address of the cpus. Any cpu outside the supported
23 * range would be removed from the cpu present mask.
24 */
25int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
26{
27 return -ENOTSUPP;
28}
29
30/**
31 * qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
32 * @entry: Entry point function for the cpus
33 * @cpus: The cpumask of cpus that will use the entry point
34 *
35 * Set the Linux entry point for the SCM to transfer control to when coming
36 * out of a power down. CPU power down may be executed on cpuidle or hotplug.
37 */
38int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
39{
40 return -ENOTSUPP;
41}
42
43/**
44 * qcom_scm_cpu_power_down() - Power down the cpu
45 * @flags - Flags to flush cache
46 *
47 * This is an end point to power down cpu. If there was a pending interrupt,
48 * the control would return from this function, otherwise, the cpu jumps to the
49 * warm boot entry point set for this cpu upon reset.
50 */
51void __qcom_scm_cpu_power_down(u32 flags)
52{
53}
54
55int __qcom_scm_is_call_available(u32 svc_id, u32 cmd_id)
56{
57 return -ENOTSUPP;
58}
59
60int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp)
61{
62 return -ENOTSUPP;
63}
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-27 12:54:29 -0400