aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/arm/Kconfig20
-rw-r--r--arch/arm/Kconfig.debug54
-rw-r--r--arch/arm/boot/compressed/head.S5
-rw-r--r--arch/arm/boot/dts/exynos5420-arndale-octa.dts12
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi18
-rw-r--r--arch/arm/configs/exynos_defconfig1
-rw-r--r--arch/arm/include/debug/s3c24xx.S46
-rw-r--r--arch/arm/mach-exynos/Kconfig92
-rw-r--r--arch/arm/mach-exynos/Makefile9
-rw-r--r--arch/arm/mach-exynos/common.h99
-rw-r--r--arch/arm/mach-exynos/cpuidle.c1
-rw-r--r--arch/arm/mach-exynos/exynos.c16
-rw-r--r--arch/arm/mach-exynos/firmware.c20
-rw-r--r--arch/arm/mach-exynos/hotplug.c65
-rw-r--r--arch/arm/mach-exynos/platsmp.c4
-rw-r--r--arch/arm/mach-exynos/pm.c1
-rw-r--r--arch/arm/mach-exynos/pmu.c2
-rw-r--r--arch/arm/mach-s3c24xx/Kconfig28
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/debug-macro.S101
-rw-r--r--arch/arm/plat-samsung/Makefile3
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h61
-rw-r--r--drivers/cpufreq/exynos-cpufreq.c19
-rw-r--r--drivers/cpufreq/exynos-cpufreq.h8
-rw-r--r--drivers/cpufreq/exynos4x12-cpufreq.c11
24 files changed, 312 insertions, 384 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8071171b149a..506bf5d32874 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -828,26 +828,6 @@ config ARCH_S5PV210
828 help 828 help
829 Samsung S5PV210/S5PC110 series based systems 829 Samsung S5PV210/S5PC110 series based systems
830 830
831config ARCH_EXYNOS
832 bool "Samsung EXYNOS"
833 select ARCH_HAS_CPUFREQ
834 select ARCH_HAS_HOLES_MEMORYMODEL
835 select ARCH_REQUIRE_GPIOLIB
836 select ARCH_SPARSEMEM_ENABLE
837 select ARM_GIC
838 select COMMON_CLK_SAMSUNG
839 select CPU_V7
840 select GENERIC_CLOCKEVENTS
841 select HAVE_S3C2410_I2C if I2C
842 select HAVE_S3C2410_WATCHDOG if WATCHDOG
843 select HAVE_S3C_RTC if RTC_CLASS
844 select NEED_MACH_MEMORY_H
845 select SPARSE_IRQ
846 select SRAM
847 select USE_OF
848 help
849 Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
850
851config ARCH_DAVINCI 831config ARCH_DAVINCI
852 bool "TI DaVinci" 832 bool "TI DaVinci"
853 select ARCH_HAS_HOLES_MEMORYMODEL 833 select ARCH_HAS_HOLES_MEMORYMODEL
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 149d1f02ea23..8f90595069a1 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -616,6 +616,7 @@ choice
616 config DEBUG_S3C_UART0 616 config DEBUG_S3C_UART0
617 depends on PLAT_SAMSUNG 617 depends on PLAT_SAMSUNG
618 select DEBUG_EXYNOS_UART if ARCH_EXYNOS 618 select DEBUG_EXYNOS_UART if ARCH_EXYNOS
619 select DEBUG_S3C24XX_UART if ARCH_S3C24XX
619 bool "Use S3C UART 0 for low-level debug" 620 bool "Use S3C UART 0 for low-level debug"
620 help 621 help
621 Say Y here if you want the debug print routines to direct 622 Say Y here if you want the debug print routines to direct
@@ -628,6 +629,7 @@ choice
628 config DEBUG_S3C_UART1 629 config DEBUG_S3C_UART1
629 depends on PLAT_SAMSUNG 630 depends on PLAT_SAMSUNG
630 select DEBUG_EXYNOS_UART if ARCH_EXYNOS 631 select DEBUG_EXYNOS_UART if ARCH_EXYNOS
632 select DEBUG_S3C24XX_UART if ARCH_S3C24XX
631 bool "Use S3C UART 1 for low-level debug" 633 bool "Use S3C UART 1 for low-level debug"
632 help 634 help
633 Say Y here if you want the debug print routines to direct 635 Say Y here if you want the debug print routines to direct
@@ -640,6 +642,7 @@ choice
640 config DEBUG_S3C_UART2 642 config DEBUG_S3C_UART2
641 depends on PLAT_SAMSUNG 643 depends on PLAT_SAMSUNG
642 select DEBUG_EXYNOS_UART if ARCH_EXYNOS 644 select DEBUG_EXYNOS_UART if ARCH_EXYNOS
645 select DEBUG_S3C24XX_UART if ARCH_S3C24XX
643 bool "Use S3C UART 2 for low-level debug" 646 bool "Use S3C UART 2 for low-level debug"
644 help 647 help
645 Say Y here if you want the debug print routines to direct 648 Say Y here if you want the debug print routines to direct
@@ -661,6 +664,33 @@ choice
661 The uncompressor code port configuration is now handled 664 The uncompressor code port configuration is now handled
662 by CONFIG_S3C_LOWLEVEL_UART_PORT. 665 by CONFIG_S3C_LOWLEVEL_UART_PORT.
663 666
667 config DEBUG_S3C2410_UART0
668 depends on ARCH_S3C24XX
669 select DEBUG_S3C2410_UART
670 bool "Use S3C2410/S3C2412 UART 0 for low-level debug"
671 help
672 Say Y here if you want the debug print routines to direct
673 their output to UART 0. The port must have been initialised
674 by the boot-loader before use.
675
676 config DEBUG_S3C2410_UART1
677 depends on ARCH_S3C24XX
678 select DEBUG_S3C2410_UART
679 bool "Use S3C2410/S3C2412 UART 1 for low-level debug"
680 help
681 Say Y here if you want the debug print routines to direct
682 their output to UART 1. The port must have been initialised
683 by the boot-loader before use.
684
685 config DEBUG_S3C2410_UART2
686 depends on ARCH_S3C24XX
687 select DEBUG_S3C2410_UART
688 bool "Use S3C2410/S3C2412 UART 2 for low-level debug"
689 help
690 Say Y here if you want the debug print routines to direct
691 their output to UART 2. The port must have been initialised
692 by the boot-loader before use.
693
664 config DEBUG_SOCFPGA_UART 694 config DEBUG_SOCFPGA_UART
665 depends on ARCH_SOCFPGA 695 depends on ARCH_SOCFPGA
666 bool "Use SOCFPGA UART for low-level debug" 696 bool "Use SOCFPGA UART for low-level debug"
@@ -912,6 +942,13 @@ endchoice
912config DEBUG_EXYNOS_UART 942config DEBUG_EXYNOS_UART
913 bool 943 bool
914 944
945config DEBUG_S3C2410_UART
946 bool
947 select DEBUG_S3C24XX_UART
948
949config DEBUG_S3C24XX_UART
950 bool
951
915config DEBUG_OMAP2PLUS_UART 952config DEBUG_OMAP2PLUS_UART
916 bool 953 bool
917 depends on ARCH_OMAP2PLUS 954 depends on ARCH_OMAP2PLUS
@@ -971,6 +1008,7 @@ config DEBUG_LL_INCLUDE
971 DEBUG_IMX6SX_UART 1008 DEBUG_IMX6SX_UART
972 default "debug/msm.S" if DEBUG_MSM_UART || DEBUG_QCOM_UARTDM 1009 default "debug/msm.S" if DEBUG_MSM_UART || DEBUG_QCOM_UARTDM
973 default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART 1010 default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
1011 default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART
974 default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1 1012 default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
975 default "debug/sti.S" if DEBUG_STI_UART 1013 default "debug/sti.S" if DEBUG_STI_UART
976 default "debug/tegra.S" if DEBUG_TEGRA_UART 1014 default "debug/tegra.S" if DEBUG_TEGRA_UART
@@ -1027,6 +1065,12 @@ config DEBUG_UART_PHYS
1027 default 0x40090000 if ARCH_LPC32XX 1065 default 0x40090000 if ARCH_LPC32XX
1028 default 0x40100000 if DEBUG_PXA_UART1 1066 default 0x40100000 if DEBUG_PXA_UART1
1029 default 0x42000000 if ARCH_GEMINI 1067 default 0x42000000 if ARCH_GEMINI
1068 default 0x50000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
1069 DEBUG_S3C2410_UART0)
1070 default 0x50004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \
1071 DEBUG_S3C2410_UART1)
1072 default 0x50008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \
1073 DEBUG_S3C2410_UART2)
1030 default 0x7c0003f8 if FOOTBRIDGE 1074 default 0x7c0003f8 if FOOTBRIDGE
1031 default 0x80070000 if DEBUG_IMX23_UART 1075 default 0x80070000 if DEBUG_IMX23_UART
1032 default 0x80074000 if DEBUG_IMX28_UART 1076 default 0x80074000 if DEBUG_IMX28_UART
@@ -1059,7 +1103,7 @@ config DEBUG_UART_PHYS
1059 depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ 1103 depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
1060 DEBUG_LL_UART_EFM32 || \ 1104 DEBUG_LL_UART_EFM32 || \
1061 DEBUG_UART_8250 || DEBUG_UART_PL01X || \ 1105 DEBUG_UART_8250 || DEBUG_UART_PL01X || \
1062 DEBUG_MSM_UART || DEBUG_QCOM_UARTDM 1106 DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART
1063 1107
1064config DEBUG_UART_VIRT 1108config DEBUG_UART_VIRT
1065 hex "Virtual base address of debug UART" 1109 hex "Virtual base address of debug UART"
@@ -1077,6 +1121,12 @@ config DEBUG_UART_VIRT
1077 default 0xf2100000 if DEBUG_PXA_UART1 1121 default 0xf2100000 if DEBUG_PXA_UART1
1078 default 0xf4090000 if ARCH_LPC32XX 1122 default 0xf4090000 if ARCH_LPC32XX
1079 default 0xf4200000 if ARCH_GEMINI 1123 default 0xf4200000 if ARCH_GEMINI
1124 default 0xf7000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
1125 DEBUG_S3C2410_UART0)
1126 default 0xf7004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \
1127 DEBUG_S3C2410_UART1)
1128 default 0xf7008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \
1129 DEBUG_S3C2410_UART2)
1080 default 0xf7fc9000 if DEBUG_BERLIN_UART 1130 default 0xf7fc9000 if DEBUG_BERLIN_UART
1081 default 0xf8009000 if DEBUG_VEXPRESS_UART0_CA9 1131 default 0xf8009000 if DEBUG_VEXPRESS_UART0_CA9
1082 default 0xf8090000 if DEBUG_VEXPRESS_UART0_RS1 1132 default 0xf8090000 if DEBUG_VEXPRESS_UART0_RS1
@@ -1120,7 +1170,7 @@ config DEBUG_UART_VIRT
1120 default DEBUG_UART_PHYS if !MMU 1170 default DEBUG_UART_PHYS if !MMU
1121 depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ 1171 depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
1122 DEBUG_UART_8250 || DEBUG_UART_PL01X || \ 1172 DEBUG_UART_8250 || DEBUG_UART_PL01X || \
1123 DEBUG_MSM_UART || DEBUG_QCOM_UARTDM 1173 DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART
1124 1174
1125config DEBUG_UART_8250_SHIFT 1175config DEBUG_UART_8250_SHIFT
1126 int "Register offset shift for the 8250 debug UART" 1176 int "Register offset shift for the 8250 debug UART"
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 066b03480b63..3a8b32df6b31 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -60,11 +60,6 @@
60 add \rb, \rb, #0x00010000 @ Ser1 60 add \rb, \rb, #0x00010000 @ Ser1
61#endif 61#endif
62 .endm 62 .endm
63#elif defined(CONFIG_ARCH_S3C24XX)
64 .macro loadsp, rb, tmp
65 mov \rb, #0x50000000
66 add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT
67 .endm
68#else 63#else
69 .macro loadsp, rb, tmp 64 .macro loadsp, rb, tmp
70 addruart \rb, \tmp 65 addruart \rb, \tmp
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index 80a3bf4c5986..896a2a6619e0 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -364,16 +364,4 @@
364 gpio-key,wakeup; 364 gpio-key,wakeup;
365 }; 365 };
366 }; 366 };
367
368 amba {
369 mdma1: mdma@11C10000 {
370 /*
371 * MDMA1 can support both secure and non-secure
372 * AXI transactions. When this is enabled in the kernel
373 * for boards that run in secure mode, we are getting
374 * imprecise external aborts causing the kernel to oops.
375 */
376 status = "disabled";
377 };
378 };
379}; 367};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 3c530722e8dc..638efd5a8456 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -264,16 +264,6 @@
264 reg = <0x100440C0 0x20>; 264 reg = <0x100440C0 0x20>;
265 }; 265 };
266 266
267 mau_pd: power-domain@100440E0 {
268 compatible = "samsung,exynos4210-pd";
269 reg = <0x100440E0 0x20>;
270 };
271
272 g2d_pd: power-domain@10044100 {
273 compatible = "samsung,exynos4210-pd";
274 reg = <0x10044100 0x20>;
275 };
276
277 msc_pd: power-domain@10044120 { 267 msc_pd: power-domain@10044120 {
278 compatible = "samsung,exynos4210-pd"; 268 compatible = "samsung,exynos4210-pd";
279 reg = <0x10044120 0x20>; 269 reg = <0x10044120 0x20>;
@@ -381,6 +371,13 @@
381 #dma-cells = <1>; 371 #dma-cells = <1>;
382 #dma-channels = <8>; 372 #dma-channels = <8>;
383 #dma-requests = <1>; 373 #dma-requests = <1>;
374 /*
375 * MDMA1 can support both secure and non-secure
376 * AXI transactions. When this is enabled in the kernel
377 * for boards that run in secure mode, we are getting
378 * imprecise external aborts causing the kernel to oops.
379 */
380 status = "disabled";
384 }; 381 };
385 }; 382 };
386 383
@@ -775,6 +772,5 @@
775 interrupts = <0 112 0>; 772 interrupts = <0 112 0>;
776 clocks = <&clock 471>; 773 clocks = <&clock 471>;
777 clock-names = "secss"; 774 clock-names = "secss";
778 samsung,power-domain = <&g2d_pd>;
779 }; 775 };
780}; 776};
diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig
index 4ce7b70ea901..e07a227ec0db 100644
--- a/arch/arm/configs/exynos_defconfig
+++ b/arch/arm/configs/exynos_defconfig
@@ -65,6 +65,7 @@ CONFIG_TCG_TIS_I2C_INFINEON=y
65CONFIG_I2C=y 65CONFIG_I2C=y
66CONFIG_I2C_MUX=y 66CONFIG_I2C_MUX=y
67CONFIG_I2C_ARB_GPIO_CHALLENGE=y 67CONFIG_I2C_ARB_GPIO_CHALLENGE=y
68CONFIG_I2C_EXYNOS5=y
68CONFIG_I2C_S3C2410=y 69CONFIG_I2C_S3C2410=y
69CONFIG_DEBUG_GPIO=y 70CONFIG_DEBUG_GPIO=y
70# CONFIG_HWMON is not set 71# CONFIG_HWMON is not set
diff --git a/arch/arm/include/debug/s3c24xx.S b/arch/arm/include/debug/s3c24xx.S
new file mode 100644
index 000000000000..b1f54dc4888c
--- /dev/null
+++ b/arch/arm/include/debug/s3c24xx.S
@@ -0,0 +1,46 @@
1/* arch/arm/mach-s3c2410/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Copyright (C) 2005 Simtec Electronics
7 *
8 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/serial_s3c.h>
16
17#define S3C2410_UART1_OFF (0x4000)
18
19 .macro addruart, rp, rv, tmp
20 ldr \rp, = CONFIG_DEBUG_UART_PHYS
21 ldr \rv, = CONFIG_DEBUG_UART_VIRT
22 .endm
23
24 .macro fifo_full_s3c2410 rd, rx
25 ldr \rd, [\rx, # S3C2410_UFSTAT]
26 tst \rd, #S3C2410_UFSTAT_TXFULL
27 .endm
28
29 .macro fifo_level_s3c2410 rd, rx
30 ldr \rd, [\rx, # S3C2410_UFSTAT]
31 and \rd, \rd, #S3C2410_UFSTAT_TXMASK
32 .endm
33
34/* Select the correct implementation depending on the configuration. The
35 * S3C2440 will get selected by default, as these are the most widely
36 * used variants of these
37*/
38
39#if defined(CONFIG_DEBUG_S3C2410_UART)
40#define fifo_full fifo_full_s3c2410
41#define fifo_level fifo_level_s3c2410
42#endif
43
44/* include the reset of the code which will do the work */
45
46#include <debug/samsung.S>
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 1602abce6ec0..d58995c9a95a 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -7,97 +7,102 @@
7 7
8# Configuration options for the EXYNOS4 8# Configuration options for the EXYNOS4
9 9
10config ARCH_EXYNOS
11 bool "Samsung EXYNOS" if ARCH_MULTI_V7
12 select ARCH_HAS_BANDGAP
13 select ARCH_HAS_CPUFREQ
14 select ARCH_HAS_HOLES_MEMORYMODEL
15 select ARCH_REQUIRE_GPIOLIB
16 select ARM_AMBA
17 select ARM_GIC
18 select COMMON_CLK_SAMSUNG
19 select HAVE_ARM_SCU if SMP
20 select HAVE_S3C2410_I2C if I2C
21 select HAVE_S3C2410_WATCHDOG if WATCHDOG
22 select HAVE_S3C_RTC if RTC_CLASS
23 select PINCTRL
24 select PINCTRL_EXYNOS
25 select PM_GENERIC_DOMAINS if PM_RUNTIME
26 select S5P_DEV_MFC
27 select SRAM
28 help
29 Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
30
10if ARCH_EXYNOS 31if ARCH_EXYNOS
11 32
12menu "SAMSUNG EXYNOS SoCs Support" 33menu "SAMSUNG EXYNOS SoCs Support"
13 34
35config ARCH_EXYNOS3
36 bool "SAMSUNG EXYNOS3"
37 select ARM_CPU_SUSPEND if PM
38 help
39 Samsung EXYNOS3 (Crotex-A7) SoC based systems
40
14config ARCH_EXYNOS4 41config ARCH_EXYNOS4
15 bool "SAMSUNG EXYNOS4" 42 bool "SAMSUNG EXYNOS4"
16 default y 43 default y
17 select ARM_AMBA 44 select ARM_CPU_SUSPEND if PM_SLEEP
18 select CLKSRC_OF
19 select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210 45 select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210
20 select CPU_EXYNOS4210 46 select CPU_EXYNOS4210
21 select GIC_NON_BANKED 47 select GIC_NON_BANKED
22 select KEYBOARD_SAMSUNG if INPUT_KEYBOARD 48 select KEYBOARD_SAMSUNG if INPUT_KEYBOARD
23 select HAVE_ARM_SCU if SMP
24 select HAVE_SMP
25 select MIGHT_HAVE_CACHE_L2X0 49 select MIGHT_HAVE_CACHE_L2X0
26 select PINCTRL
27 select PM_GENERIC_DOMAINS if PM_RUNTIME
28 select S5P_DEV_MFC
29 help 50 help
30 Samsung EXYNOS4 SoCs based systems 51 Samsung EXYNOS4 (Cortex-A9) SoC based systems
31 52
32config ARCH_EXYNOS5 53config ARCH_EXYNOS5
33 bool "SAMSUNG EXYNOS5" 54 bool "SAMSUNG EXYNOS5"
34 select ARM_AMBA 55 default y
35 select CLKSRC_OF
36 select HAVE_ARM_SCU if SMP
37 select HAVE_SMP
38 select PINCTRL
39 help 56 help
40 Samsung EXYNOS5 (Cortex-A15) SoC based systems 57 Samsung EXYNOS5 (Cortex-A15/A7) SoC based systems
41 58
42comment "EXYNOS SoCs" 59comment "EXYNOS SoCs"
43 60
61config SOC_EXYNOS3250
62 bool "SAMSUNG EXYNOS3250"
63 default y
64 depends on ARCH_EXYNOS3
65
44config CPU_EXYNOS4210 66config CPU_EXYNOS4210
45 bool "SAMSUNG EXYNOS4210" 67 bool "SAMSUNG EXYNOS4210"
46 default y 68 default y
47 depends on ARCH_EXYNOS4 69 depends on ARCH_EXYNOS4
48 select ARCH_HAS_BANDGAP
49 select ARM_CPU_SUSPEND if PM_SLEEP
50 select PINCTRL_EXYNOS
51 select SAMSUNG_DMADEV
52 help
53 Enable EXYNOS4210 CPU support
54 70
55config SOC_EXYNOS4212 71config SOC_EXYNOS4212
56 bool "SAMSUNG EXYNOS4212" 72 bool "SAMSUNG EXYNOS4212"
57 default y 73 default y
58 depends on ARCH_EXYNOS4 74 depends on ARCH_EXYNOS4
59 select ARCH_HAS_BANDGAP
60 select PINCTRL_EXYNOS
61 select SAMSUNG_DMADEV
62 help
63 Enable EXYNOS4212 SoC support
64 75
65config SOC_EXYNOS4412 76config SOC_EXYNOS4412
66 bool "SAMSUNG EXYNOS4412" 77 bool "SAMSUNG EXYNOS4412"
67 default y 78 default y
68 depends on ARCH_EXYNOS4 79 depends on ARCH_EXYNOS4
69 select ARCH_HAS_BANDGAP
70 select PINCTRL_EXYNOS
71 select SAMSUNG_DMADEV
72 help
73 Enable EXYNOS4412 SoC support
74 80
75config SOC_EXYNOS5250 81config SOC_EXYNOS5250
76 bool "SAMSUNG EXYNOS5250" 82 bool "SAMSUNG EXYNOS5250"
77 default y 83 default y
78 depends on ARCH_EXYNOS5 84 depends on ARCH_EXYNOS5
79 select ARCH_HAS_BANDGAP 85
80 select PINCTRL_EXYNOS 86config SOC_EXYNOS5260
81 select PM_GENERIC_DOMAINS if PM_RUNTIME 87 bool "SAMSUNG EXYNOS5260"
82 select S5P_DEV_MFC 88 default y
83 select SAMSUNG_DMADEV 89 depends on ARCH_EXYNOS5
84 help 90
85 Enable EXYNOS5250 SoC support 91config SOC_EXYNOS5410
92 bool "SAMSUNG EXYNOS5410"
93 default y
94 depends on ARCH_EXYNOS5
86 95
87config SOC_EXYNOS5420 96config SOC_EXYNOS5420
88 bool "SAMSUNG EXYNOS5420" 97 bool "SAMSUNG EXYNOS5420"
89 default y 98 default y
90 depends on ARCH_EXYNOS5 99 depends on ARCH_EXYNOS5
91 select PM_GENERIC_DOMAINS if PM_RUNTIME
92 help
93 Enable EXYNOS5420 SoC support
94 100
95config SOC_EXYNOS5440 101config SOC_EXYNOS5440
96 bool "SAMSUNG EXYNOS5440" 102 bool "SAMSUNG EXYNOS5440"
97 default y 103 default y
98 depends on ARCH_EXYNOS5 104 depends on ARCH_EXYNOS5
99 select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE 105 select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
100 select ARCH_HAS_BANDGAP
101 select ARCH_HAS_OPP 106 select ARCH_HAS_OPP
102 select HAVE_ARM_ARCH_TIMER 107 select HAVE_ARM_ARCH_TIMER
103 select AUTO_ZRELADDR 108 select AUTO_ZRELADDR
@@ -108,6 +113,11 @@ config SOC_EXYNOS5440
108 help 113 help
109 Enable EXYNOS5440 SoC support 114 Enable EXYNOS5440 SoC support
110 115
116config SOC_EXYNOS5800
117 bool "SAMSUNG EXYNOS5800"
118 default y
119 depends on SOC_EXYNOS5420
120
111endmenu 121endmenu
112 122
113config EXYNOS5420_MCPM 123config EXYNOS5420_MCPM
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 01bc9b94a032..97af694291f1 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -5,6 +5,8 @@
5# 5#
6# Licensed under GPLv2 6# Licensed under GPLv2
7 7
8ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include
9
8obj-y := 10obj-y :=
9obj-m := 11obj-m :=
10obj-n := 12obj-n :=
@@ -12,21 +14,16 @@ obj- :=
12 14
13# Core 15# Core
14 16
15obj-$(CONFIG_ARCH_EXYNOS) += exynos.o 17obj-$(CONFIG_ARCH_EXYNOS) += exynos.o pmu.o exynos-smc.o firmware.o
16 18
17obj-$(CONFIG_PM_SLEEP) += pm.o sleep.o 19obj-$(CONFIG_PM_SLEEP) += pm.o sleep.o
18obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o 20obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
19obj-$(CONFIG_CPU_IDLE) += cpuidle.o 21obj-$(CONFIG_CPU_IDLE) += cpuidle.o
20 22
21obj-$(CONFIG_ARCH_EXYNOS) += pmu.o
22
23obj-$(CONFIG_SMP) += platsmp.o headsmp.o 23obj-$(CONFIG_SMP) += platsmp.o headsmp.o
24 24
25obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 25obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
26 26
27obj-$(CONFIG_ARCH_EXYNOS) += exynos-smc.o
28obj-$(CONFIG_ARCH_EXYNOS) += firmware.o
29
30plus_sec := $(call as-instr,.arch_extension sec,+sec) 27plus_sec := $(call as-instr,.arch_extension sec,+sec)
31AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec) 28AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec)
32 29
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 7876ed04b7a5..5dba5a1ee6c2 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -15,6 +15,102 @@
15#include <linux/reboot.h> 15#include <linux/reboot.h>
16#include <linux/of.h> 16#include <linux/of.h>
17 17
18#define EXYNOS3250_SOC_ID 0xE3472000
19#define EXYNOS3_SOC_MASK 0xFFFFF000
20
21#define EXYNOS4210_CPU_ID 0x43210000
22#define EXYNOS4212_CPU_ID 0x43220000
23#define EXYNOS4412_CPU_ID 0xE4412200
24#define EXYNOS4_CPU_MASK 0xFFFE0000
25
26#define EXYNOS5250_SOC_ID 0x43520000
27#define EXYNOS5410_SOC_ID 0xE5410000
28#define EXYNOS5420_SOC_ID 0xE5420000
29#define EXYNOS5440_SOC_ID 0xE5440000
30#define EXYNOS5800_SOC_ID 0xE5422000
31#define EXYNOS5_SOC_MASK 0xFFFFF000
32
33extern unsigned long samsung_cpu_id;
34
35#define IS_SAMSUNG_CPU(name, id, mask) \
36static inline int is_samsung_##name(void) \
37{ \
38 return ((samsung_cpu_id & mask) == (id & mask)); \
39}
40
41IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK)
42IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
43IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
44IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
45IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
46IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK)
47IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
48IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
49IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)
50
51#if defined(CONFIG_SOC_EXYNOS3250)
52# define soc_is_exynos3250() is_samsung_exynos3250()
53#else
54# define soc_is_exynos3250() 0
55#endif
56
57#if defined(CONFIG_CPU_EXYNOS4210)
58# define soc_is_exynos4210() is_samsung_exynos4210()
59#else
60# define soc_is_exynos4210() 0
61#endif
62
63#if defined(CONFIG_SOC_EXYNOS4212)
64# define soc_is_exynos4212() is_samsung_exynos4212()
65#else
66# define soc_is_exynos4212() 0
67#endif
68
69#if defined(CONFIG_SOC_EXYNOS4412)
70# define soc_is_exynos4412() is_samsung_exynos4412()
71#else
72# define soc_is_exynos4412() 0
73#endif
74
75#define EXYNOS4210_REV_0 (0x0)
76#define EXYNOS4210_REV_1_0 (0x10)
77#define EXYNOS4210_REV_1_1 (0x11)
78
79#if defined(CONFIG_SOC_EXYNOS5250)
80# define soc_is_exynos5250() is_samsung_exynos5250()
81#else
82# define soc_is_exynos5250() 0
83#endif
84
85#if defined(CONFIG_SOC_EXYNOS5410)
86# define soc_is_exynos5410() is_samsung_exynos5410()
87#else
88# define soc_is_exynos5410() 0
89#endif
90
91#if defined(CONFIG_SOC_EXYNOS5420)
92# define soc_is_exynos5420() is_samsung_exynos5420()
93#else
94# define soc_is_exynos5420() 0
95#endif
96
97#if defined(CONFIG_SOC_EXYNOS5440)
98# define soc_is_exynos5440() is_samsung_exynos5440()
99#else
100# define soc_is_exynos5440() 0
101#endif
102
103#if defined(CONFIG_SOC_EXYNOS5800)
104# define soc_is_exynos5800() is_samsung_exynos5800()
105#else
106# define soc_is_exynos5800() 0
107#endif
108
109#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4212() || \
110 soc_is_exynos4412())
111#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \
112 soc_is_exynos5420() || soc_is_exynos5800())
113
18void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1); 114void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
19 115
20struct map_desc; 116struct map_desc;
@@ -70,4 +166,7 @@ extern void exynos_cluster_power_down(int cluster);
70extern void exynos_cluster_power_up(int cluster); 166extern void exynos_cluster_power_up(int cluster);
71extern int exynos_cluster_power_state(int cluster); 167extern int exynos_cluster_power_state(int cluster);
72 168
169extern void s5p_init_cpu(void __iomem *cpuid_addr);
170extern unsigned int samsung_rev(void);
171
73#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ 172#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index c57cae0e8779..3dd385ebf195 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -24,7 +24,6 @@
24#include <asm/unified.h> 24#include <asm/unified.h>
25#include <asm/cpuidle.h> 25#include <asm/cpuidle.h>
26 26
27#include <plat/cpu.h>
28#include <plat/pm.h> 27#include <plat/pm.h>
29 28
30#include <mach/map.h> 29#include <mach/map.h>
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index e973ff5de7b3..d51d5af7e7df 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -26,8 +26,6 @@
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27#include <asm/memory.h> 27#include <asm/memory.h>
28 28
29#include <plat/cpu.h>
30
31#include "common.h" 29#include "common.h"
32#include "mfc.h" 30#include "mfc.h"
33#include "regs-pmu.h" 31#include "regs-pmu.h"
@@ -244,17 +242,6 @@ void __init exynos_init_io(void)
244 exynos_map_io(); 242 exynos_map_io();
245} 243}
246 244
247struct bus_type exynos_subsys = {
248 .name = "exynos-core",
249 .dev_name = "exynos-core",
250};
251
252static int __init exynos_core_init(void)
253{
254 return subsys_system_register(&exynos_subsys, NULL);
255}
256core_initcall(exynos_core_init);
257
258static int __init exynos4_l2x0_cache_init(void) 245static int __init exynos4_l2x0_cache_init(void)
259{ 246{
260 int ret; 247 int ret;
@@ -306,12 +293,15 @@ static void __init exynos_dt_machine_init(void)
306} 293}
307 294
308static char const *exynos_dt_compat[] __initconst = { 295static char const *exynos_dt_compat[] __initconst = {
296 "samsung,exynos3",
297 "samsung,exynos3250",
309 "samsung,exynos4", 298 "samsung,exynos4",
310 "samsung,exynos4210", 299 "samsung,exynos4210",
311 "samsung,exynos4212", 300 "samsung,exynos4212",
312 "samsung,exynos4412", 301 "samsung,exynos4412",
313 "samsung,exynos5", 302 "samsung,exynos5",
314 "samsung,exynos5250", 303 "samsung,exynos5250",
304 "samsung,exynos5260",
315 "samsung,exynos5420", 305 "samsung,exynos5420",
316 "samsung,exynos5440", 306 "samsung,exynos5440",
317 NULL 307 NULL
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index 483dfcd69065..eb91d2350f8c 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -29,6 +29,21 @@ static int exynos_do_idle(void)
29 29
30static int exynos_cpu_boot(int cpu) 30static int exynos_cpu_boot(int cpu)
31{ 31{
32 /*
33 * Exynos3250 doesn't need to send smc command for secondary CPU boot
34 * because Exynos3250 removes WFE in secure mode.
35 */
36 if (soc_is_exynos3250())
37 return 0;
38
39 /*
40 * The second parameter of SMC_CMD_CPU1BOOT command means CPU id.
41 * But, Exynos4212 has only one secondary CPU so second parameter
42 * isn't used for informing secure firmware about CPU id.
43 */
44 if (soc_is_exynos4212())
45 cpu = 0;
46
32 exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0); 47 exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
33 return 0; 48 return 0;
34} 49}
@@ -40,7 +55,10 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
40 if (!sysram_ns_base_addr) 55 if (!sysram_ns_base_addr)
41 return -ENODEV; 56 return -ENODEV;
42 57
43 boot_reg = sysram_ns_base_addr + 0x1c + 4*cpu; 58 boot_reg = sysram_ns_base_addr + 0x1c;
59
60 if (!soc_is_exynos4212() && !soc_is_exynos3250())
61 boot_reg += 4*cpu;
44 62
45 __raw_writel(boot_addr, boot_reg); 63 __raw_writel(boot_addr, boot_reg);
46 return 0; 64 return 0;
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 609c99ca59c4..69fa48397394 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -19,61 +19,9 @@
19#include <asm/cp15.h> 19#include <asm/cp15.h>
20#include <asm/smp_plat.h> 20#include <asm/smp_plat.h>
21 21
22#include <plat/cpu.h>
23
24#include "common.h" 22#include "common.h"
25#include "regs-pmu.h" 23#include "regs-pmu.h"
26 24
27static inline void cpu_enter_lowpower_a9(void)
28{
29 unsigned int v;
30
31 asm volatile(
32 " mcr p15, 0, %1, c7, c5, 0\n"
33 " mcr p15, 0, %1, c7, c10, 4\n"
34 /*
35 * Turn off coherency
36 */
37 " mrc p15, 0, %0, c1, c0, 1\n"
38 " bic %0, %0, %3\n"
39 " mcr p15, 0, %0, c1, c0, 1\n"
40 " mrc p15, 0, %0, c1, c0, 0\n"
41 " bic %0, %0, %2\n"
42 " mcr p15, 0, %0, c1, c0, 0\n"
43 : "=&r" (v)
44 : "r" (0), "Ir" (CR_C), "Ir" (0x40)
45 : "cc");
46}
47
48static inline void cpu_enter_lowpower_a15(void)
49{
50 unsigned int v;
51
52 asm volatile(
53 " mrc p15, 0, %0, c1, c0, 0\n"
54 " bic %0, %0, %1\n"
55 " mcr p15, 0, %0, c1, c0, 0\n"
56 : "=&r" (v)
57 : "Ir" (CR_C)
58 : "cc");
59
60 flush_cache_louis();
61
62 asm volatile(
63 /*
64 * Turn off coherency
65 */
66 " mrc p15, 0, %0, c1, c0, 1\n"
67 " bic %0, %0, %1\n"
68 " mcr p15, 0, %0, c1, c0, 1\n"
69 : "=&r" (v)
70 : "Ir" (0x40)
71 : "cc");
72
73 isb();
74 dsb();
75}
76
77static inline void cpu_leave_lowpower(void) 25static inline void cpu_leave_lowpower(void)
78{ 26{
79 unsigned int v; 27 unsigned int v;
@@ -132,19 +80,8 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
132void __ref exynos_cpu_die(unsigned int cpu) 80void __ref exynos_cpu_die(unsigned int cpu)
133{ 81{
134 int spurious = 0; 82 int spurious = 0;
135 int primary_part = 0;
136 83
137 /* 84 v7_exit_coherency_flush(louis);
138 * we're ready for shutdown now, so do it.
139 * Exynos4 is A9 based while Exynos5 is A15; check the CPU part
140 * number by reading the Main ID register and then perform the
141 * appropriate sequence for entering low power.
142 */
143 asm("mrc p15, 0, %0, c0, c0, 0" : "=r"(primary_part) : : "cc");
144 if ((primary_part & 0xfff0) == 0xc0f0)
145 cpu_enter_lowpower_a15();
146 else
147 cpu_enter_lowpower_a9();
148 85
149 platform_do_lowpower(cpu, &spurious); 86 platform_do_lowpower(cpu, &spurious);
150 87
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 78002c7344b3..112bc66927a1 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -27,8 +27,6 @@
27#include <asm/smp_scu.h> 27#include <asm/smp_scu.h>
28#include <asm/firmware.h> 28#include <asm/firmware.h>
29 29
30#include <plat/cpu.h>
31
32#include "common.h" 30#include "common.h"
33#include "regs-pmu.h" 31#include "regs-pmu.h"
34 32
@@ -72,7 +70,7 @@ static inline void __iomem *cpu_boot_reg(int cpu)
72 return ERR_PTR(-ENODEV); 70 return ERR_PTR(-ENODEV);
73 if (soc_is_exynos4412()) 71 if (soc_is_exynos4412())
74 boot_reg += 4*cpu; 72 boot_reg += 4*cpu;
75 else if (soc_is_exynos5420()) 73 else if (soc_is_exynos5420() || soc_is_exynos5800())
76 boot_reg += 4; 74 boot_reg += 4;
77 return boot_reg; 75 return boot_reg;
78} 76}
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 3f2ae864582e..aba2ff6e443d 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -26,7 +26,6 @@
26#include <asm/smp_scu.h> 26#include <asm/smp_scu.h>
27#include <asm/suspend.h> 27#include <asm/suspend.h>
28 28
29#include <plat/cpu.h>
30#include <plat/pm-common.h> 29#include <plat/pm-common.h>
31#include <plat/pll.h> 30#include <plat/pll.h>
32#include <plat/regs-srom.h> 31#include <plat/regs-srom.h>
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 05c7ce15322a..fb0deda3b3a4 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -13,8 +13,6 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/bug.h> 14#include <linux/bug.h>
15 15
16#include <plat/cpu.h>
17
18#include "common.h" 16#include "common.h"
19#include "regs-pmu.h" 17#include "regs-pmu.h"
20 18
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 1e52b6926374..04284de7aca5 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -28,7 +28,6 @@ config CPU_S3C2410
28 bool "SAMSUNG S3C2410" 28 bool "SAMSUNG S3C2410"
29 default y 29 default y
30 select CPU_ARM920T 30 select CPU_ARM920T
31 select CPU_LLSERIAL_S3C2410
32 select S3C2410_COMMON_CLK 31 select S3C2410_COMMON_CLK
33 select S3C2410_DMA if S3C24XX_DMA 32 select S3C2410_DMA if S3C24XX_DMA
34 select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ 33 select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
@@ -41,7 +40,6 @@ config CPU_S3C2410
41config CPU_S3C2412 40config CPU_S3C2412
42 bool "SAMSUNG S3C2412" 41 bool "SAMSUNG S3C2412"
43 select CPU_ARM926T 42 select CPU_ARM926T
44 select CPU_LLSERIAL_S3C2440
45 select S3C2412_COMMON_CLK 43 select S3C2412_COMMON_CLK
46 select S3C2412_DMA if S3C24XX_DMA 44 select S3C2412_DMA if S3C24XX_DMA
47 select S3C2412_PM if PM 45 select S3C2412_PM if PM
@@ -51,7 +49,6 @@ config CPU_S3C2412
51config CPU_S3C2416 49config CPU_S3C2416
52 bool "SAMSUNG S3C2416/S3C2450" 50 bool "SAMSUNG S3C2416/S3C2450"
53 select CPU_ARM926T 51 select CPU_ARM926T
54 select CPU_LLSERIAL_S3C2440
55 select S3C2416_PM if PM 52 select S3C2416_PM if PM
56 select S3C2443_COMMON_CLK 53 select S3C2443_COMMON_CLK
57 select S3C2443_DMA if S3C24XX_DMA 54 select S3C2443_DMA if S3C24XX_DMA
@@ -61,7 +58,6 @@ config CPU_S3C2416
61config CPU_S3C2440 58config CPU_S3C2440
62 bool "SAMSUNG S3C2440" 59 bool "SAMSUNG S3C2440"
63 select CPU_ARM920T 60 select CPU_ARM920T
64 select CPU_LLSERIAL_S3C2440
65 select S3C2410_COMMON_CLK 61 select S3C2410_COMMON_CLK
66 select S3C2410_PM if PM 62 select S3C2410_PM if PM
67 select S3C2440_DMA if S3C24XX_DMA 63 select S3C2440_DMA if S3C24XX_DMA
@@ -71,7 +67,6 @@ config CPU_S3C2440
71config CPU_S3C2442 67config CPU_S3C2442
72 bool "SAMSUNG S3C2442" 68 bool "SAMSUNG S3C2442"
73 select CPU_ARM920T 69 select CPU_ARM920T
74 select CPU_LLSERIAL_S3C2440
75 select S3C2410_COMMON_CLK 70 select S3C2410_COMMON_CLK
76 select S3C2410_DMA if S3C24XX_DMA 71 select S3C2410_DMA if S3C24XX_DMA
77 select S3C2410_PM if PM 72 select S3C2410_PM if PM
@@ -86,7 +81,6 @@ config CPU_S3C244X
86config CPU_S3C2443 81config CPU_S3C2443
87 bool "SAMSUNG S3C2443" 82 bool "SAMSUNG S3C2443"
88 select CPU_ARM920T 83 select CPU_ARM920T
89 select CPU_LLSERIAL_S3C2440
90 select S3C2443_COMMON_CLK 84 select S3C2443_COMMON_CLK
91 select S3C2443_DMA if S3C24XX_DMA 85 select S3C2443_DMA if S3C24XX_DMA
92 help 86 help
@@ -148,28 +142,6 @@ config S3C2410_PM
148 help 142 help
149 Power Management code common to S3C2410 and better 143 Power Management code common to S3C2410 and better
150 144
151# low-level serial option nodes
152
153config CPU_LLSERIAL_S3C2410_ONLY
154 bool
155 default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
156
157config CPU_LLSERIAL_S3C2440_ONLY
158 bool
159 default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
160
161config CPU_LLSERIAL_S3C2410
162 bool
163 help
164 Selected if there is an S3C2410 (or register compatible) serial
165 low-level implementation needed
166
167config CPU_LLSERIAL_S3C2440
168 bool
169 help
170 Selected if there is an S3C2440 (or register compatible) serial
171 low-level implementation needed
172
173config S3C24XX_PLL 145config S3C24XX_PLL
174 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" 146 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
175 depends on ARM_S3C24XX_CPUFREQ 147 depends on ARM_S3C24XX_CPUFREQ
diff --git a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
deleted file mode 100644
index 2f39737544c0..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
+++ /dev/null
@@ -1,101 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Copyright (C) 2005 Simtec Electronics
7 *
8 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <mach/map.h>
16#include <mach/regs-gpio.h>
17#include <linux/serial_s3c.h>
18
19#define S3C2410_UART1_OFF (0x4000)
20#define SHIFT_2440TXF (14-9)
21
22 .macro addruart, rp, rv, tmp
23 ldr \rp, = S3C24XX_PA_UART
24 ldr \rv, = S3C24XX_VA_UART
25#if CONFIG_DEBUG_S3C_UART != 0
26 add \rp, \rp, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
27 add \rv, \rv, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
28#endif
29 .endm
30
31 .macro fifo_full_s3c24xx rd, rx
32 @ check for arm920 vs arm926. currently assume all arm926
33 @ devices have an 64 byte FIFO identical to the s3c2440
34 mrc p15, 0, \rd, c0, c0
35 and \rd, \rd, #0xff0
36 teq \rd, #0x260
37 beq 1004f
38 mrc p15, 0, \rd, c1, c0
39 tst \rd, #1
40 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
41 addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
42 bic \rd, \rd, #0xff000
43 ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
44 and \rd, \rd, #0x00ff0000
45 teq \rd, #0x00440000 @ is it 2440?
461004:
47 ldr \rd, [\rx, # S3C2410_UFSTAT]
48 moveq \rd, \rd, lsr #SHIFT_2440TXF
49 tst \rd, #S3C2410_UFSTAT_TXFULL
50 .endm
51
52 .macro fifo_full_s3c2410 rd, rx
53 ldr \rd, [\rx, # S3C2410_UFSTAT]
54 tst \rd, #S3C2410_UFSTAT_TXFULL
55 .endm
56
57/* fifo level reading */
58
59 .macro fifo_level_s3c24xx rd, rx
60 @ check for arm920 vs arm926. currently assume all arm926
61 @ devices have an 64 byte FIFO identical to the s3c2440
62 mrc p15, 0, \rd, c0, c0
63 and \rd, \rd, #0xff0
64 teq \rd, #0x260
65 beq 10000f
66 mrc p15, 0, \rd, c1, c0
67 tst \rd, #1
68 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
69 addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
70 bic \rd, \rd, #0xff000
71 ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
72 and \rd, \rd, #0x00ff0000
73 teq \rd, #0x00440000 @ is it 2440?
74
7510000:
76 ldr \rd, [\rx, # S3C2410_UFSTAT]
77 andne \rd, \rd, #S3C2410_UFSTAT_TXMASK
78 andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK
79 .endm
80
81 .macro fifo_level_s3c2410 rd, rx
82 ldr \rd, [\rx, # S3C2410_UFSTAT]
83 and \rd, \rd, #S3C2410_UFSTAT_TXMASK
84 .endm
85
86/* Select the correct implementation depending on the configuration. The
87 * S3C2440 will get selected by default, as these are the most widely
88 * used variants of these
89*/
90
91#if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY)
92#define fifo_full fifo_full_s3c2410
93#define fifo_level fifo_level_s3c2410
94#elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY)
95#define fifo_full fifo_full_s3c24xx
96#define fifo_level fifo_level_s3c24xx
97#endif
98
99/* include the reset of the code which will do the work */
100
101#include <debug/samsung.S>
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 25c826ed3b65..5e5beaa9ae15 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -4,6 +4,9 @@
4# 4#
5# Licensed under GPLv2 5# Licensed under GPLv2
6 6
7ccflags-$(CONFIG_ARCH_MULTI_V7) += -I$(srctree)/$(src)/include
8ccflags-$(CONFIG_ARCH_EXYNOS) += -I$(srctree)/arch/arm/mach-exynos/include
9
7obj-y := 10obj-y :=
8obj-m := 11obj-m :=
9obj-n := dummy.o 12obj-n := dummy.o
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 5992b8dd9b89..5a237db9f9eb 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -43,16 +43,6 @@ extern unsigned long samsung_cpu_id;
43#define S5PV210_CPU_ID 0x43110000 43#define S5PV210_CPU_ID 0x43110000
44#define S5PV210_CPU_MASK 0xFFFFF000 44#define S5PV210_CPU_MASK 0xFFFFF000
45 45
46#define EXYNOS4210_CPU_ID 0x43210000
47#define EXYNOS4212_CPU_ID 0x43220000
48#define EXYNOS4412_CPU_ID 0xE4412200
49#define EXYNOS4_CPU_MASK 0xFFFE0000
50
51#define EXYNOS5250_SOC_ID 0x43520000
52#define EXYNOS5420_SOC_ID 0xE5420000
53#define EXYNOS5440_SOC_ID 0xE5440000
54#define EXYNOS5_SOC_MASK 0xFFFFF000
55
56#define IS_SAMSUNG_CPU(name, id, mask) \ 46#define IS_SAMSUNG_CPU(name, id, mask) \
57static inline int is_samsung_##name(void) \ 47static inline int is_samsung_##name(void) \
58{ \ 48{ \
@@ -68,12 +58,6 @@ IS_SAMSUNG_CPU(s5p6440, S5P6440_CPU_ID, S5P64XX_CPU_MASK)
68IS_SAMSUNG_CPU(s5p6450, S5P6450_CPU_ID, S5P64XX_CPU_MASK) 58IS_SAMSUNG_CPU(s5p6450, S5P6450_CPU_ID, S5P64XX_CPU_MASK)
69IS_SAMSUNG_CPU(s5pc100, S5PC100_CPU_ID, S5PC100_CPU_MASK) 59IS_SAMSUNG_CPU(s5pc100, S5PC100_CPU_ID, S5PC100_CPU_MASK)
70IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK) 60IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
71IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
72IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
73IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
74IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
75IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
76IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
77 61
78#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \ 62#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
79 defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \ 63 defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \
@@ -126,50 +110,6 @@ IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
126# define soc_is_s5pv210() 0 110# define soc_is_s5pv210() 0
127#endif 111#endif
128 112
129#if defined(CONFIG_CPU_EXYNOS4210)
130# define soc_is_exynos4210() is_samsung_exynos4210()
131#else
132# define soc_is_exynos4210() 0
133#endif
134
135#if defined(CONFIG_SOC_EXYNOS4212)
136# define soc_is_exynos4212() is_samsung_exynos4212()
137#else
138# define soc_is_exynos4212() 0
139#endif
140
141#if defined(CONFIG_SOC_EXYNOS4412)
142# define soc_is_exynos4412() is_samsung_exynos4412()
143#else
144# define soc_is_exynos4412() 0
145#endif
146
147#define EXYNOS4210_REV_0 (0x0)
148#define EXYNOS4210_REV_1_0 (0x10)
149#define EXYNOS4210_REV_1_1 (0x11)
150
151#if defined(CONFIG_SOC_EXYNOS5250)
152# define soc_is_exynos5250() is_samsung_exynos5250()
153#else
154# define soc_is_exynos5250() 0
155#endif
156
157#if defined(CONFIG_SOC_EXYNOS5420)
158# define soc_is_exynos5420() is_samsung_exynos5420()
159#else
160# define soc_is_exynos5420() 0
161#endif
162
163#if defined(CONFIG_SOC_EXYNOS5440)
164# define soc_is_exynos5440() is_samsung_exynos5440()
165#else
166# define soc_is_exynos5440() 0
167#endif
168
169#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4212() || \
170 soc_is_exynos4412())
171#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5420())
172
173#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } 113#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
174 114
175#ifndef KHZ 115#ifndef KHZ
@@ -239,7 +179,6 @@ extern struct bus_type s3c2443_subsys;
239extern struct bus_type s3c6410_subsys; 179extern struct bus_type s3c6410_subsys;
240extern struct bus_type s5p64x0_subsys; 180extern struct bus_type s5p64x0_subsys;
241extern struct bus_type s5pv210_subsys; 181extern struct bus_type s5pv210_subsys;
242extern struct bus_type exynos_subsys;
243 182
244extern void (*s5pc1xx_idle)(void); 183extern void (*s5pc1xx_idle)(void);
245 184
diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index f99cfe24e7bc..e8a4a7ed38c1 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -17,6 +17,7 @@
17#include <linux/regulator/consumer.h> 17#include <linux/regulator/consumer.h>
18#include <linux/cpufreq.h> 18#include <linux/cpufreq.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/of.h>
20 21
21#include <plat/cpu.h> 22#include <plat/cpu.h>
22 23
@@ -163,14 +164,22 @@ static int exynos_cpufreq_probe(struct platform_device *pdev)
163 if (!exynos_info) 164 if (!exynos_info)
164 return -ENOMEM; 165 return -ENOMEM;
165 166
166 if (soc_is_exynos4210()) 167 if (of_machine_is_compatible("samsung,exynos4210")) {
168 exynos_info->type = EXYNOS_SOC_4210;
167 ret = exynos4210_cpufreq_init(exynos_info); 169 ret = exynos4210_cpufreq_init(exynos_info);
168 else if (soc_is_exynos4212() || soc_is_exynos4412()) 170 } else if (of_machine_is_compatible("samsung,exynos4212")) {
171 exynos_info->type = EXYNOS_SOC_4212;
169 ret = exynos4x12_cpufreq_init(exynos_info); 172 ret = exynos4x12_cpufreq_init(exynos_info);
170 else if (soc_is_exynos5250()) 173 } else if (of_machine_is_compatible("samsung,exynos4412")) {
174 exynos_info->type = EXYNOS_SOC_4412;
175 ret = exynos4x12_cpufreq_init(exynos_info);
176 } else if (of_machine_is_compatible("samsung,exynos5250")) {
177 exynos_info->type = EXYNOS_SOC_5250;
171 ret = exynos5250_cpufreq_init(exynos_info); 178 ret = exynos5250_cpufreq_init(exynos_info);
172 else 179 } else {
173 return 0; 180 pr_err("%s: Unknown SoC type\n", __func__);
181 return -ENODEV;
182 }
174 183
175 if (ret) 184 if (ret)
176 goto err_vdd_arm; 185 goto err_vdd_arm;
diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
index 3ddade8a5125..f189547bb447 100644
--- a/drivers/cpufreq/exynos-cpufreq.h
+++ b/drivers/cpufreq/exynos-cpufreq.h
@@ -17,6 +17,13 @@ enum cpufreq_level_index {
17 L20, 17 L20,
18}; 18};
19 19
20enum exynos_soc_type {
21 EXYNOS_SOC_4210,
22 EXYNOS_SOC_4212,
23 EXYNOS_SOC_4412,
24 EXYNOS_SOC_5250,
25};
26
20#define APLL_FREQ(f, a0, a1, a2, a3, a4, a5, a6, a7, b0, b1, b2, m, p, s) \ 27#define APLL_FREQ(f, a0, a1, a2, a3, a4, a5, a6, a7, b0, b1, b2, m, p, s) \
21 { \ 28 { \
22 .freq = (f) * 1000, \ 29 .freq = (f) * 1000, \
@@ -34,6 +41,7 @@ struct apll_freq {
34}; 41};
35 42
36struct exynos_dvfs_info { 43struct exynos_dvfs_info {
44 enum exynos_soc_type type;
37 unsigned long mpll_freq_khz; 45 unsigned long mpll_freq_khz;
38 unsigned int pll_safe_idx; 46 unsigned int pll_safe_idx;
39 struct clk *cpu_clk; 47 struct clk *cpu_clk;
diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
index 466c76ad335b..63a3907ce578 100644
--- a/drivers/cpufreq/exynos4x12-cpufreq.c
+++ b/drivers/cpufreq/exynos4x12-cpufreq.c
@@ -100,7 +100,6 @@ static struct apll_freq apll_freq_4412[] = {
100static void exynos4x12_set_clkdiv(unsigned int div_index) 100static void exynos4x12_set_clkdiv(unsigned int div_index)
101{ 101{
102 unsigned int tmp; 102 unsigned int tmp;
103 unsigned int stat_cpu1;
104 103
105 /* Change Divider - CPU0 */ 104 /* Change Divider - CPU0 */
106 105
@@ -115,13 +114,11 @@ static void exynos4x12_set_clkdiv(unsigned int div_index)
115 tmp = apll_freq_4x12[div_index].clk_div_cpu1; 114 tmp = apll_freq_4x12[div_index].clk_div_cpu1;
116 115
117 __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1); 116 __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
118 if (soc_is_exynos4212())
119 stat_cpu1 = 0x11;
120 else
121 stat_cpu1 = 0x111;
122 117
123 while (__raw_readl(EXYNOS4_CLKDIV_STATCPU1) & stat_cpu1) 118 do {
124 cpu_relax(); 119 cpu_relax();
120 tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
121 } while (tmp != 0x0);
125} 122}
126 123
127static void exynos4x12_set_apll(unsigned int index) 124static void exynos4x12_set_apll(unsigned int index)
@@ -184,7 +181,7 @@ int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
184 if (IS_ERR(mout_apll)) 181 if (IS_ERR(mout_apll))
185 goto err_mout_apll; 182 goto err_mout_apll;
186 183
187 if (soc_is_exynos4212()) 184 if (info->type == EXYNOS_SOC_4212)
188 apll_freq_4x12 = apll_freq_4212; 185 apll_freq_4x12 = apll_freq_4212;
189 else 186 else
190 apll_freq_4x12 = apll_freq_4412; 187 apll_freq_4x12 = apll_freq_4412;