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-rw-r--r--Documentation/devicetree/bindings/net/dwmac-sun8i.txt84
-rw-r--r--arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts9
-rw-r--r--arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts19
-rw-r--r--arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts7
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-2.dts8
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-one.dts8
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts5
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts8
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts22
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts16
-rw-r--r--arch/arm/boot/dts/sunxi-h3-h5.dtsi26
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts16
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts15
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts17
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts16
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi20
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts17
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts17
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts17
19 files changed, 0 insertions, 347 deletions
diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
deleted file mode 100644
index 725f3b187886..000000000000
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ /dev/null
@@ -1,84 +0,0 @@
1* Allwinner sun8i GMAC ethernet controller
2
3This device is a platform glue layer for stmmac.
4Please see stmmac.txt for the other unchanged properties.
5
6Required properties:
7- compatible: should be one of the following string:
8 "allwinner,sun8i-a83t-emac"
9 "allwinner,sun8i-h3-emac"
10 "allwinner,sun8i-v3s-emac"
11 "allwinner,sun50i-a64-emac"
12- reg: address and length of the register for the device.
13- interrupts: interrupt for the device
14- interrupt-names: should be "macirq"
15- clocks: A phandle to the reference clock for this device
16- clock-names: should be "stmmaceth"
17- resets: A phandle to the reset control for this device
18- reset-names: should be "stmmaceth"
19- phy-mode: See ethernet.txt
20- phy-handle: See ethernet.txt
21- #address-cells: shall be 1
22- #size-cells: shall be 0
23- syscon: A phandle to the syscon of the SoC with one of the following
24 compatible string:
25 - allwinner,sun8i-h3-system-controller
26 - allwinner,sun8i-v3s-system-controller
27 - allwinner,sun50i-a64-system-controller
28 - allwinner,sun8i-a83t-system-controller
29
30Optional properties:
31- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0)
32- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0)
33Both delay properties need to be a multiple of 100. They control the delay for
34external PHY.
35
36Optional properties for the following compatibles:
37 - "allwinner,sun8i-h3-emac",
38 - "allwinner,sun8i-v3s-emac":
39- allwinner,leds-active-low: EPHY LEDs are active low
40
41Required child node of emac:
42- mdio bus node: should be named mdio
43
44Required properties of the mdio node:
45- #address-cells: shall be 1
46- #size-cells: shall be 0
47
48The device node referenced by "phy" or "phy-handle" should be a child node
49of the mdio node. See phy.txt for the generic PHY bindings.
50
51Required properties of the phy node with the following compatibles:
52 - "allwinner,sun8i-h3-emac",
53 - "allwinner,sun8i-v3s-emac":
54- clocks: a phandle to the reference clock for the EPHY
55- resets: a phandle to the reset control for the EPHY
56
57Example:
58
59emac: ethernet@1c0b000 {
60 compatible = "allwinner,sun8i-h3-emac";
61 syscon = <&syscon>;
62 reg = <0x01c0b000 0x104>;
63 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
64 interrupt-names = "macirq";
65 resets = <&ccu RST_BUS_EMAC>;
66 reset-names = "stmmaceth";
67 clocks = <&ccu CLK_BUS_EMAC>;
68 clock-names = "stmmaceth";
69 #address-cells = <1>;
70 #size-cells = <0>;
71
72 phy-handle = <&int_mii_phy>;
73 phy-mode = "mii";
74 allwinner,leds-active-low;
75 mdio: mdio {
76 #address-cells = <1>;
77 #size-cells = <0>;
78 int_mii_phy: ethernet-phy@1 {
79 reg = <1>;
80 clocks = <&ccu CLK_BUS_EPHY>;
81 resets = <&ccu RST_BUS_EPHY>;
82 };
83 };
84};
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index 6713d0f2b3f4..b1502df7b509 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -56,8 +56,6 @@
56 56
57 aliases { 57 aliases {
58 serial0 = &uart0; 58 serial0 = &uart0;
59 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
60 ethernet0 = &emac;
61 ethernet1 = &xr819; 59 ethernet1 = &xr819;
62 }; 60 };
63 61
@@ -104,13 +102,6 @@
104 status = "okay"; 102 status = "okay";
105}; 103};
106 104
107&emac {
108 phy-handle = <&int_mii_phy>;
109 phy-mode = "mii";
110 allwinner,leds-active-low;
111 status = "okay";
112};
113
114&mmc0 { 105&mmc0 {
115 pinctrl-names = "default"; 106 pinctrl-names = "default";
116 pinctrl-0 = <&mmc0_pins_a>; 107 pinctrl-0 = <&mmc0_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index d756ff825116..a337af1de322 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -52,7 +52,6 @@
52 compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3"; 52 compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
53 53
54 aliases { 54 aliases {
55 ethernet0 = &emac;
56 serial0 = &uart0; 55 serial0 = &uart0;
57 serial1 = &uart1; 56 serial1 = &uart1;
58 }; 57 };
@@ -115,30 +114,12 @@
115 status = "okay"; 114 status = "okay";
116}; 115};
117 116
118&emac {
119 pinctrl-names = "default";
120 pinctrl-0 = <&emac_rgmii_pins>;
121 phy-supply = <&reg_gmac_3v3>;
122 phy-handle = <&ext_rgmii_phy>;
123 phy-mode = "rgmii";
124
125 allwinner,leds-active-low;
126 status = "okay";
127};
128
129&ir { 117&ir {
130 pinctrl-names = "default"; 118 pinctrl-names = "default";
131 pinctrl-0 = <&ir_pins_a>; 119 pinctrl-0 = <&ir_pins_a>;
132 status = "okay"; 120 status = "okay";
133}; 121};
134 122
135&mdio {
136 ext_rgmii_phy: ethernet-phy@1 {
137 compatible = "ethernet-phy-ieee802.3-c22";
138 reg = <0>;
139 };
140};
141
142&mmc0 { 123&mmc0 {
143 pinctrl-names = "default"; 124 pinctrl-names = "default";
144 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 125 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 78f6c24952dd..8d2cc6e9a03f 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -46,10 +46,3 @@
46 model = "FriendlyARM NanoPi NEO"; 46 model = "FriendlyARM NanoPi NEO";
47 compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; 47 compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
48}; 48};
49
50&emac {
51 phy-handle = <&int_mii_phy>;
52 phy-mode = "mii";
53 allwinner,leds-active-low;
54 status = "okay";
55};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 17cdeae19c6f..8ff71b1bb45b 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -54,7 +54,6 @@
54 aliases { 54 aliases {
55 serial0 = &uart0; 55 serial0 = &uart0;
56 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ 56 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
57 ethernet0 = &emac;
58 ethernet1 = &rtl8189; 57 ethernet1 = &rtl8189;
59 }; 58 };
60 59
@@ -118,13 +117,6 @@
118 status = "okay"; 117 status = "okay";
119}; 118};
120 119
121&emac {
122 phy-handle = <&int_mii_phy>;
123 phy-mode = "mii";
124 allwinner,leds-active-low;
125 status = "okay";
126};
127
128&ir { 120&ir {
129 pinctrl-names = "default"; 121 pinctrl-names = "default";
130 pinctrl-0 = <&ir_pins_a>; 122 pinctrl-0 = <&ir_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 6880268e8b87..5fea430e0eb1 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -52,7 +52,6 @@
52 compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3"; 52 compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
53 53
54 aliases { 54 aliases {
55 ethernet0 = &emac;
56 serial0 = &uart0; 55 serial0 = &uart0;
57 }; 56 };
58 57
@@ -98,13 +97,6 @@
98 status = "okay"; 97 status = "okay";
99}; 98};
100 99
101&emac {
102 phy-handle = <&int_mii_phy>;
103 phy-mode = "mii";
104 allwinner,leds-active-low;
105 status = "okay";
106};
107
108&mmc0 { 100&mmc0 {
109 pinctrl-names = "default"; 101 pinctrl-names = "default";
110 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 102 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
index a10281b455f5..8b93f5c781a7 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
@@ -53,11 +53,6 @@
53 }; 53 };
54}; 54};
55 55
56&emac {
57 /* LEDs changed to active high on the plus */
58 /delete-property/ allwinner,leds-active-low;
59};
60
61&mmc1 { 56&mmc1 {
62 pinctrl-names = "default"; 57 pinctrl-names = "default";
63 pinctrl-0 = <&mmc1_pins_a>; 58 pinctrl-0 = <&mmc1_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 998b60f8d295..1a044b17d6c6 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -52,7 +52,6 @@
52 compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3"; 52 compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
53 53
54 aliases { 54 aliases {
55 ethernet0 = &emac;
56 serial0 = &uart0; 55 serial0 = &uart0;
57 }; 56 };
58 57
@@ -114,13 +113,6 @@
114 status = "okay"; 113 status = "okay";
115}; 114};
116 115
117&emac {
118 phy-handle = <&int_mii_phy>;
119 phy-mode = "mii";
120 allwinner,leds-active-low;
121 status = "okay";
122};
123
124&ir { 116&ir {
125 pinctrl-names = "default"; 117 pinctrl-names = "default";
126 pinctrl-0 = <&ir_pins_a>; 118 pinctrl-0 = <&ir_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index 331ed683ac62..828ae7a526d9 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -47,10 +47,6 @@
47 model = "Xunlong Orange Pi Plus / Plus 2"; 47 model = "Xunlong Orange Pi Plus / Plus 2";
48 compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; 48 compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
49 49
50 aliases {
51 ethernet0 = &emac;
52 };
53
54 reg_gmac_3v3: gmac-3v3 { 50 reg_gmac_3v3: gmac-3v3 {
55 compatible = "regulator-fixed"; 51 compatible = "regulator-fixed";
56 regulator-name = "gmac-3v3"; 52 regulator-name = "gmac-3v3";
@@ -78,24 +74,6 @@
78 status = "okay"; 74 status = "okay";
79}; 75};
80 76
81&emac {
82 pinctrl-names = "default";
83 pinctrl-0 = <&emac_rgmii_pins>;
84 phy-supply = <&reg_gmac_3v3>;
85 phy-handle = <&ext_rgmii_phy>;
86 phy-mode = "rgmii";
87
88 allwinner,leds-active-low;
89 status = "okay";
90};
91
92&mdio {
93 ext_rgmii_phy: ethernet-phy@1 {
94 compatible = "ethernet-phy-ieee802.3-c22";
95 reg = <0>;
96 };
97};
98
99&mmc2 { 77&mmc2 {
100 pinctrl-names = "default"; 78 pinctrl-names = "default";
101 pinctrl-0 = <&mmc2_8bit_pins>; 79 pinctrl-0 = <&mmc2_8bit_pins>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
index 80026f3caafc..97920b12a944 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
@@ -61,19 +61,3 @@
61 gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ 61 gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
62 }; 62 };
63}; 63};
64
65&emac {
66 pinctrl-names = "default";
67 pinctrl-0 = <&emac_rgmii_pins>;
68 phy-supply = <&reg_gmac_3v3>;
69 phy-handle = <&ext_rgmii_phy>;
70 phy-mode = "rgmii";
71 status = "okay";
72};
73
74&mdio {
75 ext_rgmii_phy: ethernet-phy@1 {
76 compatible = "ethernet-phy-ieee802.3-c22";
77 reg = <1>;
78 };
79};
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d38282b9e5d4..11240a8313c2 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -391,32 +391,6 @@
391 clocks = <&osc24M>; 391 clocks = <&osc24M>;
392 }; 392 };
393 393
394 emac: ethernet@1c30000 {
395 compatible = "allwinner,sun8i-h3-emac";
396 syscon = <&syscon>;
397 reg = <0x01c30000 0x10000>;
398 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
399 interrupt-names = "macirq";
400 resets = <&ccu RST_BUS_EMAC>;
401 reset-names = "stmmaceth";
402 clocks = <&ccu CLK_BUS_EMAC>;
403 clock-names = "stmmaceth";
404 #address-cells = <1>;
405 #size-cells = <0>;
406 status = "disabled";
407
408 mdio: mdio {
409 #address-cells = <1>;
410 #size-cells = <0>;
411 int_mii_phy: ethernet-phy@1 {
412 compatible = "ethernet-phy-ieee802.3-c22";
413 reg = <1>;
414 clocks = <&ccu CLK_BUS_EPHY>;
415 resets = <&ccu RST_BUS_EPHY>;
416 };
417 };
418 };
419
420 spi0: spi@01c68000 { 394 spi0: spi@01c68000 {
421 compatible = "allwinner,sun8i-h3-spi"; 395 compatible = "allwinner,sun8i-h3-spi";
422 reg = <0x01c68000 0x1000>; 396 reg = <0x01c68000 0x1000>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index ba2fde2909f9..6872135d7f84 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -51,7 +51,6 @@
51 compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64"; 51 compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
52 52
53 aliases { 53 aliases {
54 ethernet0 = &emac;
55 serial0 = &uart0; 54 serial0 = &uart0;
56 serial1 = &uart1; 55 serial1 = &uart1;
57 }; 56 };
@@ -68,14 +67,6 @@
68 }; 67 };
69}; 68};
70 69
71&emac {
72 pinctrl-names = "default";
73 pinctrl-0 = <&rgmii_pins>;
74 phy-mode = "rgmii";
75 phy-handle = <&ext_rgmii_phy>;
76 status = "okay";
77};
78
79&i2c1 { 70&i2c1 {
80 pinctrl-names = "default"; 71 pinctrl-names = "default";
81 pinctrl-0 = <&i2c1_pins>; 72 pinctrl-0 = <&i2c1_pins>;
@@ -86,13 +77,6 @@
86 bias-pull-up; 77 bias-pull-up;
87}; 78};
88 79
89&mdio {
90 ext_rgmii_phy: ethernet-phy@1 {
91 compatible = "ethernet-phy-ieee802.3-c22";
92 reg = <1>;
93 };
94};
95
96&mmc0 { 80&mmc0 {
97 pinctrl-names = "default"; 81 pinctrl-names = "default";
98 pinctrl-0 = <&mmc0_pins>; 82 pinctrl-0 = <&mmc0_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index 24f1aac366d6..f82ccf332c0f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -48,18 +48,3 @@
48 48
49 /* TODO: Camera, touchscreen, etc. */ 49 /* TODO: Camera, touchscreen, etc. */
50}; 50};
51
52&emac {
53 pinctrl-names = "default";
54 pinctrl-0 = <&rgmii_pins>;
55 phy-mode = "rgmii";
56 phy-handle = <&ext_rgmii_phy>;
57 status = "okay";
58};
59
60&mdio {
61 ext_rgmii_phy: ethernet-phy@1 {
62 compatible = "ethernet-phy-ieee802.3-c22";
63 reg = <1>;
64 };
65};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 827168bc22ed..7c533b6d4ba9 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -51,7 +51,6 @@
51 compatible = "pine64,pine64", "allwinner,sun50i-a64"; 51 compatible = "pine64,pine64", "allwinner,sun50i-a64";
52 52
53 aliases { 53 aliases {
54 ethernet0 = &emac;
55 serial0 = &uart0; 54 serial0 = &uart0;
56 serial1 = &uart1; 55 serial1 = &uart1;
57 serial2 = &uart2; 56 serial2 = &uart2;
@@ -79,15 +78,6 @@
79 status = "okay"; 78 status = "okay";
80}; 79};
81 80
82&emac {
83 pinctrl-names = "default";
84 pinctrl-0 = <&rmii_pins>;
85 phy-mode = "rmii";
86 phy-handle = <&ext_rmii_phy1>;
87 status = "okay";
88
89};
90
91&i2c1 { 81&i2c1 {
92 pinctrl-names = "default"; 82 pinctrl-names = "default";
93 pinctrl-0 = <&i2c1_pins>; 83 pinctrl-0 = <&i2c1_pins>;
@@ -98,13 +88,6 @@
98 bias-pull-up; 88 bias-pull-up;
99}; 89};
100 90
101&mdio {
102 ext_rmii_phy1: ethernet-phy@1 {
103 compatible = "ethernet-phy-ieee802.3-c22";
104 reg = <1>;
105 };
106};
107
108&mmc0 { 91&mmc0 {
109 pinctrl-names = "default"; 92 pinctrl-names = "default";
110 pinctrl-0 = <&mmc0_pins>; 93 pinctrl-0 = <&mmc0_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 216e3a5dafae..d891a1a27f6c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -53,7 +53,6 @@
53 "allwinner,sun50i-a64"; 53 "allwinner,sun50i-a64";
54 54
55 aliases { 55 aliases {
56 ethernet0 = &emac;
57 serial0 = &uart0; 56 serial0 = &uart0;
58 }; 57 };
59 58
@@ -77,21 +76,6 @@
77 status = "okay"; 76 status = "okay";
78}; 77};
79 78
80&emac {
81 pinctrl-names = "default";
82 pinctrl-0 = <&rgmii_pins>;
83 phy-mode = "rgmii";
84 phy-handle = <&ext_rgmii_phy>;
85 status = "okay";
86};
87
88&mdio {
89 ext_rgmii_phy: ethernet-phy@1 {
90 compatible = "ethernet-phy-ieee802.3-c22";
91 reg = <1>;
92 };
93};
94
95&mmc2 { 79&mmc2 {
96 pinctrl-names = "default"; 80 pinctrl-names = "default";
97 pinctrl-0 = <&mmc2_pins>; 81 pinctrl-0 = <&mmc2_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index bd0f33b77f57..68aadc9b96dc 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -449,26 +449,6 @@
449 #size-cells = <0>; 449 #size-cells = <0>;
450 }; 450 };
451 451
452 emac: ethernet@1c30000 {
453 compatible = "allwinner,sun50i-a64-emac";
454 syscon = <&syscon>;
455 reg = <0x01c30000 0x10000>;
456 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
457 interrupt-names = "macirq";
458 resets = <&ccu RST_BUS_EMAC>;
459 reset-names = "stmmaceth";
460 clocks = <&ccu CLK_BUS_EMAC>;
461 clock-names = "stmmaceth";
462 status = "disabled";
463 #address-cells = <1>;
464 #size-cells = <0>;
465
466 mdio: mdio {
467 #address-cells = <1>;
468 #size-cells = <0>;
469 };
470 };
471
472 gic: interrupt-controller@1c81000 { 452 gic: interrupt-controller@1c81000 {
473 compatible = "arm,gic-400"; 453 compatible = "arm,gic-400";
474 reg = <0x01c81000 0x1000>, 454 reg = <0x01c81000 0x1000>,
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index 968908761194..1c2387bd5df6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -50,7 +50,6 @@
50 compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5"; 50 compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
51 51
52 aliases { 52 aliases {
53 ethernet0 = &emac;
54 serial0 = &uart0; 53 serial0 = &uart0;
55 }; 54 };
56 55
@@ -109,22 +108,6 @@
109 status = "okay"; 108 status = "okay";
110}; 109};
111 110
112&emac {
113 pinctrl-names = "default";
114 pinctrl-0 = <&emac_rgmii_pins>;
115 phy-supply = <&reg_gmac_3v3>;
116 phy-handle = <&ext_rgmii_phy>;
117 phy-mode = "rgmii";
118 status = "okay";
119};
120
121&mdio {
122 ext_rgmii_phy: ethernet-phy@7 {
123 compatible = "ethernet-phy-ieee802.3-c22";
124 reg = <7>;
125 };
126};
127
128&mmc0 { 111&mmc0 {
129 pinctrl-names = "default"; 112 pinctrl-names = "default";
130 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 113 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index a8296feee884..4f77c8470f6c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -59,7 +59,6 @@
59 }; 59 };
60 60
61 aliases { 61 aliases {
62 ethernet0 = &emac;
63 serial0 = &uart0; 62 serial0 = &uart0;
64 }; 63 };
65 64
@@ -137,28 +136,12 @@
137 status = "okay"; 136 status = "okay";
138}; 137};
139 138
140&emac {
141 pinctrl-names = "default";
142 pinctrl-0 = <&emac_rgmii_pins>;
143 phy-supply = <&reg_gmac_3v3>;
144 phy-handle = <&ext_rgmii_phy>;
145 phy-mode = "rgmii";
146 status = "okay";
147};
148
149&ir { 139&ir {
150 pinctrl-names = "default"; 140 pinctrl-names = "default";
151 pinctrl-0 = <&ir_pins_a>; 141 pinctrl-0 = <&ir_pins_a>;
152 status = "okay"; 142 status = "okay";
153}; 143};
154 144
155&mdio {
156 ext_rgmii_phy: ethernet-phy@1 {
157 compatible = "ethernet-phy-ieee802.3-c22";
158 reg = <1>;
159 };
160};
161
162&mmc0 { 145&mmc0 {
163 pinctrl-names = "default"; 146 pinctrl-names = "default";
164 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 147 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
index d906b302cbcd..6be06873e5af 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
@@ -54,7 +54,6 @@
54 compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5"; 54 compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
55 55
56 aliases { 56 aliases {
57 ethernet0 = &emac;
58 serial0 = &uart0; 57 serial0 = &uart0;
59 }; 58 };
60 59
@@ -144,28 +143,12 @@
144 status = "okay"; 143 status = "okay";
145}; 144};
146 145
147&emac {
148 pinctrl-names = "default";
149 pinctrl-0 = <&emac_rgmii_pins>;
150 phy-supply = <&reg_gmac_3v3>;
151 phy-handle = <&ext_rgmii_phy>;
152 phy-mode = "rgmii";
153 status = "okay";
154};
155
156&ir { 146&ir {
157 pinctrl-names = "default"; 147 pinctrl-names = "default";
158 pinctrl-0 = <&ir_pins_a>; 148 pinctrl-0 = <&ir_pins_a>;
159 status = "okay"; 149 status = "okay";
160}; 150};
161 151
162&mdio {
163 ext_rgmii_phy: ethernet-phy@1 {
164 compatible = "ethernet-phy-ieee802.3-c22";
165 reg = <1>;
166 };
167};
168
169&mmc0 { 152&mmc0 {
170 pinctrl-names = "default"; 153 pinctrl-names = "default";
171 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 154 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-28 09:37:57 -0400