diff options
-rw-r--r-- | arch/arm/boot/dts/Makefile | 3 | ||||
-rw-r--r-- | arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 458 |
2 files changed, 460 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 48c55f307aa9..5ab5d9169511 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -1106,5 +1106,6 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ | |||
1106 | aspeed-bmc-opp-palmetto.dtb \ | 1106 | aspeed-bmc-opp-palmetto.dtb \ |
1107 | aspeed-bmc-opp-romulus.dtb \ | 1107 | aspeed-bmc-opp-romulus.dtb \ |
1108 | aspeed-bmc-opp-witherspoon.dtb \ | 1108 | aspeed-bmc-opp-witherspoon.dtb \ |
1109 | aspeed-bmc-opp-zaius.dtb | 1109 | aspeed-bmc-opp-zaius.dtb \ |
1110 | aspeed-bmc-quanta-q71l.dtb | ||
1110 | endif | 1111 | endif |
diff --git a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts new file mode 100644 index 000000000000..76aa6ea1f988 --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | |||
@@ -0,0 +1,458 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /dts-v1/; | ||
3 | #include "aspeed-g4.dtsi" | ||
4 | #include <dt-bindings/gpio/aspeed-gpio.h> | ||
5 | |||
6 | / { | ||
7 | model = "Quanta Q71L BMC"; | ||
8 | compatible = "quanta,q71l-bmc", "aspeed,ast2400"; | ||
9 | |||
10 | chosen { | ||
11 | stdout-path = &uart5; | ||
12 | bootargs = "console=ttyS4,115200 earlyprintk"; | ||
13 | }; | ||
14 | |||
15 | memory@40000000 { | ||
16 | reg = <0x40000000 0x8000000>; | ||
17 | }; | ||
18 | |||
19 | reserved-memory { | ||
20 | #address-cells = <1>; | ||
21 | #size-cells = <1>; | ||
22 | ranges; | ||
23 | |||
24 | vga_memory: framebuffer@47800000 { | ||
25 | no-map; | ||
26 | reg = <0x47800000 0x00800000>; /* 8MB */ | ||
27 | }; | ||
28 | }; | ||
29 | |||
30 | leds { | ||
31 | compatible = "gpio-leds"; | ||
32 | |||
33 | heartbeat { | ||
34 | gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>; | ||
35 | }; | ||
36 | |||
37 | power { | ||
38 | gpios = <&gpio ASPEED_GPIO(B, 2) GPIO_ACTIVE_LOW>; | ||
39 | }; | ||
40 | |||
41 | identify { | ||
42 | gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>; | ||
43 | }; | ||
44 | }; | ||
45 | |||
46 | iio-hwmon { | ||
47 | compatible = "iio-hwmon"; | ||
48 | io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, | ||
49 | <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, | ||
50 | <&adc 8>, <&adc 9>, <&adc 10>; | ||
51 | }; | ||
52 | |||
53 | iio-hwmon-battery { | ||
54 | compatible = "iio-hwmon"; | ||
55 | io-channels = <&adc 11>; | ||
56 | }; | ||
57 | |||
58 | i2c1mux: i2cmux { | ||
59 | compatible = "i2c-mux-gpio"; | ||
60 | #address-cells = <1>; | ||
61 | #size-cells = <0>; | ||
62 | |||
63 | /* mux-gpios = <&sgpio 10 GPIO_ACTIVE_HIGH> */ | ||
64 | i2c-parent = <&i2c1>; | ||
65 | }; | ||
66 | }; | ||
67 | |||
68 | &fmc { | ||
69 | status = "okay"; | ||
70 | flash@0 { | ||
71 | status = "okay"; | ||
72 | label = "bmc"; | ||
73 | m25p,fast-read; | ||
74 | #include "openbmc-flash-layout.dtsi" | ||
75 | }; | ||
76 | }; | ||
77 | |||
78 | &spi { | ||
79 | status = "okay"; | ||
80 | pinctrl-names = "default"; | ||
81 | pinctrl-0 = <&pinctrl_spi1_default>; | ||
82 | |||
83 | flash@0 { | ||
84 | status = "okay"; | ||
85 | m25p,fast-read; | ||
86 | label = "pnor"; | ||
87 | }; | ||
88 | }; | ||
89 | |||
90 | &pinctrl { | ||
91 | pinctrl-names = "default"; | ||
92 | pinctrl-0 = <&pinctrl_vgahs_default &pinctrl_vgavs_default | ||
93 | &pinctrl_ddcclk_default &pinctrl_ddcdat_default>; | ||
94 | }; | ||
95 | |||
96 | &lpc_snoop { | ||
97 | status = "okay"; | ||
98 | snoop-ports = <0x80>; | ||
99 | }; | ||
100 | |||
101 | &mac0 { | ||
102 | status = "okay"; | ||
103 | pinctrl-names = "default"; | ||
104 | pinctrl-0 = <&pinctrl_rmii1_default>; | ||
105 | use-ncsi; | ||
106 | }; | ||
107 | |||
108 | &mac1 { | ||
109 | status = "okay"; | ||
110 | pinctrl-names = "default"; | ||
111 | pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; | ||
112 | }; | ||
113 | |||
114 | &uart5 { | ||
115 | status = "okay"; | ||
116 | }; | ||
117 | |||
118 | &i2c0 { | ||
119 | status = "okay"; | ||
120 | }; | ||
121 | |||
122 | &i2c1 { | ||
123 | status = "okay"; | ||
124 | |||
125 | /* temp2 inlet */ | ||
126 | tmp75@4c { | ||
127 | compatible = "ti,tmp75"; | ||
128 | reg = <0x4c>; | ||
129 | }; | ||
130 | |||
131 | /* temp3 */ | ||
132 | tmp75@4e { | ||
133 | compatible = "ti,tmp75"; | ||
134 | reg = <0x4e>; | ||
135 | }; | ||
136 | |||
137 | /* temp1 */ | ||
138 | tmp75@4f { | ||
139 | compatible = "ti,tmp75"; | ||
140 | reg = <0x4f>; | ||
141 | }; | ||
142 | |||
143 | /* Baseboard FRU */ | ||
144 | eeprom@54 { | ||
145 | compatible = "atmel,24c64"; | ||
146 | reg = <0x54>; | ||
147 | }; | ||
148 | |||
149 | /* FP FRU */ | ||
150 | eeprom@57 { | ||
151 | compatible = "atmel,24c64"; | ||
152 | reg = <0x57>; | ||
153 | }; | ||
154 | }; | ||
155 | |||
156 | &i2c2 { | ||
157 | status = "okay"; | ||
158 | |||
159 | /* 0: PCIe Slot 2, | ||
160 | * Slot 3, | ||
161 | * Slot 6, | ||
162 | * Slot 7 | ||
163 | */ | ||
164 | i2c-switch@74 { | ||
165 | compatible = "nxp,pca9546"; | ||
166 | reg = <0x74>; | ||
167 | #address-cells = <1>; | ||
168 | #size-cells = <0>; | ||
169 | i2c-mux-idle-disconnect; /* may use mux@77 next. */ | ||
170 | |||
171 | i2c_pcie2: i2c@0 { | ||
172 | #address-cells = <1>; | ||
173 | #size-cells = <0>; | ||
174 | reg = <0>; | ||
175 | }; | ||
176 | |||
177 | i2c_pcie3: i2c@1 { | ||
178 | #address-cells = <1>; | ||
179 | #size-cells = <0>; | ||
180 | reg = <1>; | ||
181 | }; | ||
182 | |||
183 | i2c_pcie6: i2c@2 { | ||
184 | #address-cells = <1>; | ||
185 | #size-cells = <0>; | ||
186 | reg = <2>; | ||
187 | }; | ||
188 | |||
189 | i2c_pcie7: i2c@3 { | ||
190 | #address-cells = <1>; | ||
191 | #size-cells = <0>; | ||
192 | reg = <3>; | ||
193 | }; | ||
194 | }; | ||
195 | |||
196 | /* 0: PCIe Slot 1, | ||
197 | * Slot 4, | ||
198 | * Slot 5, | ||
199 | * Slot 8, | ||
200 | * Slot 9, | ||
201 | * Slot 10, | ||
202 | * SSD 1, | ||
203 | * SSD 2 | ||
204 | */ | ||
205 | i2c-switch@77 { | ||
206 | compatible = "nxp,pca9548"; | ||
207 | #address-cells = <1>; | ||
208 | #size-cells = <0>; | ||
209 | reg = <0x77>; | ||
210 | i2c-mux-idle-disconnect; /* may use mux@74 next. */ | ||
211 | |||
212 | i2c_pcie1: i2c@0 { | ||
213 | #address-cells = <1>; | ||
214 | #size-cells = <0>; | ||
215 | reg = <0>; | ||
216 | }; | ||
217 | |||
218 | i2c_pcie4: i2c@1 { | ||
219 | #address-cells = <1>; | ||
220 | #size-cells = <0>; | ||
221 | reg = <1>; | ||
222 | }; | ||
223 | |||
224 | i2c_pcie5: i2c@2 { | ||
225 | #address-cells = <1>; | ||
226 | #size-cells = <0>; | ||
227 | reg = <2>; | ||
228 | }; | ||
229 | |||
230 | i2c_pcie8: i2c@3 { | ||
231 | #address-cells = <1>; | ||
232 | #size-cells = <0>; | ||
233 | reg = <3>; | ||
234 | }; | ||
235 | |||
236 | i2c_pcie9: i2c@4 { | ||
237 | #address-cells = <1>; | ||
238 | #size-cells = <0>; | ||
239 | reg = <4>; | ||
240 | }; | ||
241 | |||
242 | i2c_pcie10: i2c@5 { | ||
243 | #address-cells = <1>; | ||
244 | #size-cells = <0>; | ||
245 | reg = <5>; | ||
246 | }; | ||
247 | |||
248 | i2c_ssd1: i2c@6 { | ||
249 | #address-cells = <1>; | ||
250 | #size-cells = <0>; | ||
251 | reg = <6>; | ||
252 | }; | ||
253 | |||
254 | i2c_ssd2: i2c@7 { | ||
255 | #address-cells = <1>; | ||
256 | #size-cells = <0>; | ||
257 | reg = <7>; | ||
258 | }; | ||
259 | }; | ||
260 | }; | ||
261 | |||
262 | &i2c3 { | ||
263 | status = "okay"; | ||
264 | |||
265 | /* BIOS FRU */ | ||
266 | eeprom@56 { | ||
267 | compatible = "atmel,24c64"; | ||
268 | reg = <0x56>; | ||
269 | }; | ||
270 | }; | ||
271 | |||
272 | &i2c4 { | ||
273 | status = "okay"; | ||
274 | }; | ||
275 | |||
276 | &i2c5 { | ||
277 | status = "okay"; | ||
278 | }; | ||
279 | |||
280 | &i2c6 { | ||
281 | status = "okay"; | ||
282 | }; | ||
283 | |||
284 | &i2c7 { | ||
285 | status = "okay"; | ||
286 | |||
287 | /* 0: PSU4 | ||
288 | * PSU1 | ||
289 | * PSU3 | ||
290 | * PSU2 | ||
291 | */ | ||
292 | i2c-switch@70 { | ||
293 | compatible = "nxp,pca9546"; | ||
294 | reg = <0x70>; | ||
295 | #address-cells = <1>; | ||
296 | #size-cells = <0>; | ||
297 | |||
298 | i2c_psu4: i2c@0 { | ||
299 | #address-cells = <1>; | ||
300 | #size-cells = <0>; | ||
301 | reg = <0>; | ||
302 | }; | ||
303 | |||
304 | i2c_psu1: i2c@1 { | ||
305 | #address-cells = <1>; | ||
306 | #size-cells = <0>; | ||
307 | reg = <1>; | ||
308 | }; | ||
309 | |||
310 | i2c_psu3: i2c@2 { | ||
311 | #address-cells = <1>; | ||
312 | #size-cells = <0>; | ||
313 | reg = <2>; | ||
314 | }; | ||
315 | |||
316 | i2c_psu2: i2c@3 { | ||
317 | #address-cells = <1>; | ||
318 | #size-cells = <0>; | ||
319 | reg = <3>; | ||
320 | }; | ||
321 | }; | ||
322 | |||
323 | /* PDB FRU */ | ||
324 | eeprom@52 { | ||
325 | compatible = "atmel,24c64"; | ||
326 | reg = <0x52>; | ||
327 | }; | ||
328 | }; | ||
329 | |||
330 | &i2c8 { | ||
331 | status = "okay"; | ||
332 | |||
333 | /* BMC FRU */ | ||
334 | eeprom@50 { | ||
335 | compatible = "atmel,24c64"; | ||
336 | reg = <0x50>; | ||
337 | }; | ||
338 | }; | ||
339 | |||
340 | &vuart { | ||
341 | status = "okay"; | ||
342 | }; | ||
343 | |||
344 | &wdt2 { | ||
345 | status = "okay"; | ||
346 | }; | ||
347 | |||
348 | &pwm_tacho { | ||
349 | status = "okay"; | ||
350 | |||
351 | pinctrl-names = "default"; | ||
352 | pinctrl-0 = <&pinctrl_pwm0_default | ||
353 | &pinctrl_pwm1_default | ||
354 | &pinctrl_pwm2_default | ||
355 | &pinctrl_pwm3_default>; | ||
356 | |||
357 | fan@0 { | ||
358 | reg = <0x00>; | ||
359 | aspeed,fan-tach-ch = /bits/ 8 <0x00>; | ||
360 | }; | ||
361 | |||
362 | fan@1 { | ||
363 | reg = <0x01>; | ||
364 | aspeed,fan-tach-ch = /bits/ 8 <0x01>; | ||
365 | }; | ||
366 | |||
367 | fan@2 { | ||
368 | reg = <0x02>; | ||
369 | aspeed,fan-tach-ch = /bits/ 8 <0x02>; | ||
370 | }; | ||
371 | |||
372 | fan@3 { | ||
373 | reg = <0x03>; | ||
374 | aspeed,fan-tach-ch = /bits/ 8 <0x03>; | ||
375 | }; | ||
376 | |||
377 | fan@4 { | ||
378 | reg = <0x00>; | ||
379 | aspeed,fan-tach-ch = /bits/ 8 <0x04>; | ||
380 | }; | ||
381 | |||
382 | fan@5 { | ||
383 | reg = <0x01>; | ||
384 | aspeed,fan-tach-ch = /bits/ 8 <0x05>; | ||
385 | }; | ||
386 | |||
387 | fan@6 { | ||
388 | reg = <0x02>; | ||
389 | aspeed,fan-tach-ch = /bits/ 8 <0x06>; | ||
390 | }; | ||
391 | |||
392 | fan@7 { | ||
393 | reg = <0x03>; | ||
394 | aspeed,fan-tach-ch = /bits/ 8 <0x07>; | ||
395 | }; | ||
396 | }; | ||
397 | |||
398 | &i2c1mux { | ||
399 | i2c@0 { | ||
400 | reg = <0>; | ||
401 | #address-cells = <1>; | ||
402 | #size-cells = <0>; | ||
403 | |||
404 | /* Memory Riser 1 FRU */ | ||
405 | eeprom@50 { | ||
406 | compatible = "atmel,24c02"; | ||
407 | reg = <0x50>; | ||
408 | }; | ||
409 | |||
410 | /* Memory Riser 2 FRU */ | ||
411 | eeprom@51 { | ||
412 | compatible = "atmel,24c02"; | ||
413 | reg = <0x51>; | ||
414 | }; | ||
415 | |||
416 | /* Memory Riser 3 FRU */ | ||
417 | eeprom@52 { | ||
418 | compatible = "atmel,24c02"; | ||
419 | reg = <0x52>; | ||
420 | }; | ||
421 | |||
422 | /* Memory Riser 4 FRU */ | ||
423 | eeprom@53 { | ||
424 | compatible = "atmel,24c02"; | ||
425 | reg = <0x53>; | ||
426 | }; | ||
427 | }; | ||
428 | |||
429 | i2c@1 { | ||
430 | reg = <1>; | ||
431 | #address-cells = <1>; | ||
432 | #size-cells = <0>; | ||
433 | |||
434 | /* Memory Riser 5 FRU */ | ||
435 | eeprom@50 { | ||
436 | compatible = "atmel,24c02"; | ||
437 | reg = <0x50>; | ||
438 | }; | ||
439 | |||
440 | /* Memory Riser 6 FRU */ | ||
441 | eeprom@51 { | ||
442 | compatible = "atmel,24c02"; | ||
443 | reg = <0x51>; | ||
444 | }; | ||
445 | |||
446 | /* Memory Riser 7 FRU */ | ||
447 | eeprom@52 { | ||
448 | compatible = "atmel,24c02"; | ||
449 | reg = <0x52>; | ||
450 | }; | ||
451 | |||
452 | /* Memory Riser 8 FRU */ | ||
453 | eeprom@53 { | ||
454 | compatible = "atmel,24c02"; | ||
455 | reg = <0x53>; | ||
456 | }; | ||
457 | }; | ||
458 | }; | ||