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-rw-r--r--drivers/i2c/busses/i2c-stu300.c2
-rw-r--r--drivers/i2c/busses/i2c-tegra.c17
-rw-r--r--drivers/i2c/i2c-core-base.c11
-rw-r--r--mm/page_alloc.c4
4 files changed, 21 insertions, 13 deletions
diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c
index e866c481bfc3..fce52bdab2b7 100644
--- a/drivers/i2c/busses/i2c-stu300.c
+++ b/drivers/i2c/busses/i2c-stu300.c
@@ -127,7 +127,7 @@ enum stu300_error {
127 127
128/* 128/*
129 * The number of address send athemps tried before giving up. 129 * The number of address send athemps tried before giving up.
130 * If the first one failes it seems like 5 to 8 attempts are required. 130 * If the first one fails it seems like 5 to 8 attempts are required.
131 */ 131 */
132#define NUM_ADDR_RESEND_ATTEMPTS 12 132#define NUM_ADDR_RESEND_ATTEMPTS 12
133 133
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 5fccd1f1bca8..797def5319f1 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -545,6 +545,14 @@ static int tegra_i2c_disable_packet_mode(struct tegra_i2c_dev *i2c_dev)
545{ 545{
546 u32 cnfg; 546 u32 cnfg;
547 547
548 /*
549 * NACK interrupt is generated before the I2C controller generates
550 * the STOP condition on the bus. So wait for 2 clock periods
551 * before disabling the controller so that the STOP condition has
552 * been delivered properly.
553 */
554 udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate));
555
548 cnfg = i2c_readl(i2c_dev, I2C_CNFG); 556 cnfg = i2c_readl(i2c_dev, I2C_CNFG);
549 if (cnfg & I2C_CNFG_PACKET_MODE_EN) 557 if (cnfg & I2C_CNFG_PACKET_MODE_EN)
550 i2c_writel(i2c_dev, cnfg & ~I2C_CNFG_PACKET_MODE_EN, I2C_CNFG); 558 i2c_writel(i2c_dev, cnfg & ~I2C_CNFG_PACKET_MODE_EN, I2C_CNFG);
@@ -706,15 +714,6 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
706 if (likely(i2c_dev->msg_err == I2C_ERR_NONE)) 714 if (likely(i2c_dev->msg_err == I2C_ERR_NONE))
707 return 0; 715 return 0;
708 716
709 /*
710 * NACK interrupt is generated before the I2C controller generates
711 * the STOP condition on the bus. So wait for 2 clock periods
712 * before resetting the controller so that the STOP condition has
713 * been delivered properly.
714 */
715 if (i2c_dev->msg_err == I2C_ERR_NO_ACK)
716 udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate));
717
718 tegra_i2c_init(i2c_dev); 717 tegra_i2c_init(i2c_dev);
719 if (i2c_dev->msg_err == I2C_ERR_NO_ACK) { 718 if (i2c_dev->msg_err == I2C_ERR_NO_ACK) {
720 if (msg->flags & I2C_M_IGNORE_NAK) 719 if (msg->flags & I2C_M_IGNORE_NAK)
diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
index 31d16ada6e7d..301285c54603 100644
--- a/drivers/i2c/i2c-core-base.c
+++ b/drivers/i2c/i2c-core-base.c
@@ -198,7 +198,16 @@ int i2c_generic_scl_recovery(struct i2c_adapter *adap)
198 198
199 val = !val; 199 val = !val;
200 bri->set_scl(adap, val); 200 bri->set_scl(adap, val);
201 ndelay(RECOVERY_NDELAY); 201
202 /*
203 * If we can set SDA, we will always create STOP here to ensure
204 * the additional pulses will do no harm. This is achieved by
205 * letting SDA follow SCL half a cycle later.
206 */
207 ndelay(RECOVERY_NDELAY / 2);
208 if (bri->set_sda)
209 bri->set_sda(adap, val);
210 ndelay(RECOVERY_NDELAY / 2);
202 } 211 }
203 212
204 /* check if recovery actually succeeded */ 213 /* check if recovery actually succeeded */
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 1521100f1e63..5d800d61ddb7 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -6847,6 +6847,7 @@ void __init free_area_init_nodes(unsigned long *max_zone_pfn)
6847 /* Initialise every node */ 6847 /* Initialise every node */
6848 mminit_verify_pageflags_layout(); 6848 mminit_verify_pageflags_layout();
6849 setup_nr_node_ids(); 6849 setup_nr_node_ids();
6850 zero_resv_unavail();
6850 for_each_online_node(nid) { 6851 for_each_online_node(nid) {
6851 pg_data_t *pgdat = NODE_DATA(nid); 6852 pg_data_t *pgdat = NODE_DATA(nid);
6852 free_area_init_node(nid, NULL, 6853 free_area_init_node(nid, NULL,
@@ -6857,7 +6858,6 @@ void __init free_area_init_nodes(unsigned long *max_zone_pfn)
6857 node_set_state(nid, N_MEMORY); 6858 node_set_state(nid, N_MEMORY);
6858 check_for_memory(pgdat, nid); 6859 check_for_memory(pgdat, nid);
6859 } 6860 }
6860 zero_resv_unavail();
6861} 6861}
6862 6862
6863static int __init cmdline_parse_core(char *p, unsigned long *core, 6863static int __init cmdline_parse_core(char *p, unsigned long *core,
@@ -7033,9 +7033,9 @@ void __init set_dma_reserve(unsigned long new_dma_reserve)
7033 7033
7034void __init free_area_init(unsigned long *zones_size) 7034void __init free_area_init(unsigned long *zones_size)
7035{ 7035{
7036 zero_resv_unavail();
7036 free_area_init_node(0, zones_size, 7037 free_area_init_node(0, zones_size,
7037 __pa(PAGE_OFFSET) >> PAGE_SHIFT, NULL); 7038 __pa(PAGE_OFFSET) >> PAGE_SHIFT, NULL);
7038 zero_resv_unavail();
7039} 7039}
7040 7040
7041static int page_alloc_cpu_dead(unsigned int cpu) 7041static int page_alloc_cpu_dead(unsigned int cpu)