diff options
47 files changed, 346 insertions, 304 deletions
diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt index ba5469dd09f3..27a054e1bb5f 100644 --- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | |||
@@ -8,6 +8,7 @@ Required properties: | |||
8 | 8 | ||
9 | - compatible : Shall contain one of | 9 | - compatible : Shall contain one of |
10 | - "renesas,r8a7743-lvds" for R8A7743 (RZ/G1M) compatible LVDS encoders | 10 | - "renesas,r8a7743-lvds" for R8A7743 (RZ/G1M) compatible LVDS encoders |
11 | - "renesas,r8a774c0-lvds" for R8A774C0 (RZ/G2E) compatible LVDS encoders | ||
11 | - "renesas,r8a7790-lvds" for R8A7790 (R-Car H2) compatible LVDS encoders | 12 | - "renesas,r8a7790-lvds" for R8A7790 (R-Car H2) compatible LVDS encoders |
12 | - "renesas,r8a7791-lvds" for R8A7791 (R-Car M2-W) compatible LVDS encoders | 13 | - "renesas,r8a7791-lvds" for R8A7791 (R-Car M2-W) compatible LVDS encoders |
13 | - "renesas,r8a7793-lvds" for R8A7793 (R-Car M2-N) compatible LVDS encoders | 14 | - "renesas,r8a7793-lvds" for R8A7793 (R-Car M2-N) compatible LVDS encoders |
@@ -25,7 +26,7 @@ Required properties: | |||
25 | - clock-names: Name of the clocks. This property is model-dependent. | 26 | - clock-names: Name of the clocks. This property is model-dependent. |
26 | - The functional clock, which mandatory for all models, shall be listed | 27 | - The functional clock, which mandatory for all models, shall be listed |
27 | first, and shall be named "fck". | 28 | first, and shall be named "fck". |
28 | - On R8A77990 and R8A77995, the LVDS encoder can use the EXTAL or | 29 | - On R8A77990, R8A77995 and R8A774C0, the LVDS encoder can use the EXTAL or |
29 | DU_DOTCLKINx clocks. Those clocks are optional. When supplied they must be | 30 | DU_DOTCLKINx clocks. Those clocks are optional. When supplied they must be |
30 | named "extal" and "dclkin.x" respectively, with "x" being the DU_DOTCLKIN | 31 | named "extal" and "dclkin.x" respectively, with "x" being the DU_DOTCLKIN |
31 | numerical index. | 32 | numerical index. |
diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt b/Documentation/devicetree/bindings/display/renesas,du.txt index 3c855d9f2719..aedb22b4d161 100644 --- a/Documentation/devicetree/bindings/display/renesas,du.txt +++ b/Documentation/devicetree/bindings/display/renesas,du.txt | |||
@@ -7,6 +7,7 @@ Required Properties: | |||
7 | - "renesas,du-r8a7744" for R8A7744 (RZ/G1N) compatible DU | 7 | - "renesas,du-r8a7744" for R8A7744 (RZ/G1N) compatible DU |
8 | - "renesas,du-r8a7745" for R8A7745 (RZ/G1E) compatible DU | 8 | - "renesas,du-r8a7745" for R8A7745 (RZ/G1E) compatible DU |
9 | - "renesas,du-r8a77470" for R8A77470 (RZ/G1C) compatible DU | 9 | - "renesas,du-r8a77470" for R8A77470 (RZ/G1C) compatible DU |
10 | - "renesas,du-r8a774c0" for R8A774C0 (RZ/G2E) compatible DU | ||
10 | - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU | 11 | - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU |
11 | - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU | 12 | - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU |
12 | - "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU | 13 | - "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU |
@@ -57,6 +58,7 @@ corresponding to each DU output. | |||
57 | R8A7744 (RZ/G1N) DPAD 0 LVDS 0 - - | 58 | R8A7744 (RZ/G1N) DPAD 0 LVDS 0 - - |
58 | R8A7745 (RZ/G1E) DPAD 0 DPAD 1 - - | 59 | R8A7745 (RZ/G1E) DPAD 0 DPAD 1 - - |
59 | R8A77470 (RZ/G1C) DPAD 0 DPAD 1 LVDS 0 - | 60 | R8A77470 (RZ/G1C) DPAD 0 DPAD 1 LVDS 0 - |
61 | R8A774C0 (RZ/G2E) DPAD 0 LVDS 0 LVDS 1 - | ||
60 | R8A7779 (R-Car H1) DPAD 0 DPAD 1 - - | 62 | R8A7779 (R-Car H1) DPAD 0 DPAD 1 - - |
61 | R8A7790 (R-Car H2) DPAD 0 LVDS 0 LVDS 1 - | 63 | R8A7790 (R-Car H2) DPAD 0 LVDS 0 LVDS 1 - |
62 | R8A7791 (R-Car M2-W) DPAD 0 LVDS 0 - - | 64 | R8A7791 (R-Car M2-W) DPAD 0 LVDS 0 - - |
diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h b/drivers/gpu/drm/bridge/adv7511/adv7511.h index 73d8ccb97742..2b6e0832d1cf 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7511.h +++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h | |||
@@ -395,7 +395,7 @@ static inline int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511) | |||
395 | #ifdef CONFIG_DRM_I2C_ADV7533 | 395 | #ifdef CONFIG_DRM_I2C_ADV7533 |
396 | void adv7533_dsi_power_on(struct adv7511 *adv); | 396 | void adv7533_dsi_power_on(struct adv7511 *adv); |
397 | void adv7533_dsi_power_off(struct adv7511 *adv); | 397 | void adv7533_dsi_power_off(struct adv7511 *adv); |
398 | void adv7533_mode_set(struct adv7511 *adv, struct drm_display_mode *mode); | 398 | void adv7533_mode_set(struct adv7511 *adv, const struct drm_display_mode *mode); |
399 | int adv7533_patch_registers(struct adv7511 *adv); | 399 | int adv7533_patch_registers(struct adv7511 *adv); |
400 | int adv7533_patch_cec_registers(struct adv7511 *adv); | 400 | int adv7533_patch_cec_registers(struct adv7511 *adv); |
401 | int adv7533_attach_dsi(struct adv7511 *adv); | 401 | int adv7533_attach_dsi(struct adv7511 *adv); |
@@ -411,7 +411,7 @@ static inline void adv7533_dsi_power_off(struct adv7511 *adv) | |||
411 | } | 411 | } |
412 | 412 | ||
413 | static inline void adv7533_mode_set(struct adv7511 *adv, | 413 | static inline void adv7533_mode_set(struct adv7511 *adv, |
414 | struct drm_display_mode *mode) | 414 | const struct drm_display_mode *mode) |
415 | { | 415 | { |
416 | } | 416 | } |
417 | 417 | ||
diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c index 85c2d407a52e..d0e98caa2e2a 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c +++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | |||
@@ -676,8 +676,8 @@ static enum drm_mode_status adv7511_mode_valid(struct adv7511 *adv7511, | |||
676 | } | 676 | } |
677 | 677 | ||
678 | static void adv7511_mode_set(struct adv7511 *adv7511, | 678 | static void adv7511_mode_set(struct adv7511 *adv7511, |
679 | struct drm_display_mode *mode, | 679 | const struct drm_display_mode *mode, |
680 | struct drm_display_mode *adj_mode) | 680 | const struct drm_display_mode *adj_mode) |
681 | { | 681 | { |
682 | unsigned int low_refresh_rate; | 682 | unsigned int low_refresh_rate; |
683 | unsigned int hsync_polarity = 0; | 683 | unsigned int hsync_polarity = 0; |
@@ -839,8 +839,8 @@ static void adv7511_bridge_disable(struct drm_bridge *bridge) | |||
839 | } | 839 | } |
840 | 840 | ||
841 | static void adv7511_bridge_mode_set(struct drm_bridge *bridge, | 841 | static void adv7511_bridge_mode_set(struct drm_bridge *bridge, |
842 | struct drm_display_mode *mode, | 842 | const struct drm_display_mode *mode, |
843 | struct drm_display_mode *adj_mode) | 843 | const struct drm_display_mode *adj_mode) |
844 | { | 844 | { |
845 | struct adv7511 *adv = bridge_to_adv7511(bridge); | 845 | struct adv7511 *adv = bridge_to_adv7511(bridge); |
846 | 846 | ||
diff --git a/drivers/gpu/drm/bridge/adv7511/adv7533.c b/drivers/gpu/drm/bridge/adv7511/adv7533.c index 185b6d842166..5d5e7d9eded2 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7533.c +++ b/drivers/gpu/drm/bridge/adv7511/adv7533.c | |||
@@ -108,7 +108,7 @@ void adv7533_dsi_power_off(struct adv7511 *adv) | |||
108 | regmap_write(adv->regmap_cec, 0x27, 0x0b); | 108 | regmap_write(adv->regmap_cec, 0x27, 0x0b); |
109 | } | 109 | } |
110 | 110 | ||
111 | void adv7533_mode_set(struct adv7511 *adv, struct drm_display_mode *mode) | 111 | void adv7533_mode_set(struct adv7511 *adv, const struct drm_display_mode *mode) |
112 | { | 112 | { |
113 | struct mipi_dsi_device *dsi = adv->dsi; | 113 | struct mipi_dsi_device *dsi = adv->dsi; |
114 | int lanes, ret; | 114 | int lanes, ret; |
diff --git a/drivers/gpu/drm/bridge/analogix-anx78xx.c b/drivers/gpu/drm/bridge/analogix-anx78xx.c index e11309e9bc4f..4cf7bc17ae14 100644 --- a/drivers/gpu/drm/bridge/analogix-anx78xx.c +++ b/drivers/gpu/drm/bridge/analogix-anx78xx.c | |||
@@ -1082,8 +1082,8 @@ static void anx78xx_bridge_disable(struct drm_bridge *bridge) | |||
1082 | } | 1082 | } |
1083 | 1083 | ||
1084 | static void anx78xx_bridge_mode_set(struct drm_bridge *bridge, | 1084 | static void anx78xx_bridge_mode_set(struct drm_bridge *bridge, |
1085 | struct drm_display_mode *mode, | 1085 | const struct drm_display_mode *mode, |
1086 | struct drm_display_mode *adjusted_mode) | 1086 | const struct drm_display_mode *adjusted_mode) |
1087 | { | 1087 | { |
1088 | struct anx78xx *anx78xx = bridge_to_anx78xx(bridge); | 1088 | struct anx78xx *anx78xx = bridge_to_anx78xx(bridge); |
1089 | struct hdmi_avi_infoframe frame; | 1089 | struct hdmi_avi_infoframe frame; |
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c index 753e96129ab7..4d5b47585834 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | |||
@@ -1361,8 +1361,8 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge) | |||
1361 | } | 1361 | } |
1362 | 1362 | ||
1363 | static void analogix_dp_bridge_mode_set(struct drm_bridge *bridge, | 1363 | static void analogix_dp_bridge_mode_set(struct drm_bridge *bridge, |
1364 | struct drm_display_mode *orig_mode, | 1364 | const struct drm_display_mode *orig_mode, |
1365 | struct drm_display_mode *mode) | 1365 | const struct drm_display_mode *mode) |
1366 | { | 1366 | { |
1367 | struct analogix_dp_device *dp = bridge->driver_private; | 1367 | struct analogix_dp_device *dp = bridge->driver_private; |
1368 | struct drm_display_info *display_info = &dp->connector.display_info; | 1368 | struct drm_display_info *display_info = &dp->connector.display_info; |
diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c index a9b4f45ae87c..a5d58f7035c1 100644 --- a/drivers/gpu/drm/bridge/sii902x.c +++ b/drivers/gpu/drm/bridge/sii902x.c | |||
@@ -232,8 +232,8 @@ static void sii902x_bridge_enable(struct drm_bridge *bridge) | |||
232 | } | 232 | } |
233 | 233 | ||
234 | static void sii902x_bridge_mode_set(struct drm_bridge *bridge, | 234 | static void sii902x_bridge_mode_set(struct drm_bridge *bridge, |
235 | struct drm_display_mode *mode, | 235 | const struct drm_display_mode *mode, |
236 | struct drm_display_mode *adj) | 236 | const struct drm_display_mode *adj) |
237 | { | 237 | { |
238 | struct sii902x *sii902x = bridge_to_sii902x(bridge); | 238 | struct sii902x *sii902x = bridge_to_sii902x(bridge); |
239 | struct regmap *regmap = sii902x->regmap; | 239 | struct regmap *regmap = sii902x->regmap; |
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c index 88b720b63126..129f464cbeb1 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | |||
@@ -1999,8 +1999,8 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge, | |||
1999 | } | 1999 | } |
2000 | 2000 | ||
2001 | static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge, | 2001 | static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge, |
2002 | struct drm_display_mode *orig_mode, | 2002 | const struct drm_display_mode *orig_mode, |
2003 | struct drm_display_mode *mode) | 2003 | const struct drm_display_mode *mode) |
2004 | { | 2004 | { |
2005 | struct dw_hdmi *hdmi = bridge->driver_private; | 2005 | struct dw_hdmi *hdmi = bridge->driver_private; |
2006 | 2006 | ||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c index 2f4b145b73af..23a5977a3b0a 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | |||
@@ -248,7 +248,7 @@ static inline bool dw_mipi_is_dual_mode(struct dw_mipi_dsi *dsi) | |||
248 | * The controller should generate 2 frames before | 248 | * The controller should generate 2 frames before |
249 | * preparing the peripheral. | 249 | * preparing the peripheral. |
250 | */ | 250 | */ |
251 | static void dw_mipi_dsi_wait_for_two_frames(struct drm_display_mode *mode) | 251 | static void dw_mipi_dsi_wait_for_two_frames(const struct drm_display_mode *mode) |
252 | { | 252 | { |
253 | int refresh, two_frames; | 253 | int refresh, two_frames; |
254 | 254 | ||
@@ -564,7 +564,7 @@ static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi) | |||
564 | } | 564 | } |
565 | 565 | ||
566 | static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi, | 566 | static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi, |
567 | struct drm_display_mode *mode) | 567 | const struct drm_display_mode *mode) |
568 | { | 568 | { |
569 | u32 val = 0, color = 0; | 569 | u32 val = 0, color = 0; |
570 | 570 | ||
@@ -607,7 +607,7 @@ static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi) | |||
607 | } | 607 | } |
608 | 608 | ||
609 | static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi, | 609 | static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi, |
610 | struct drm_display_mode *mode) | 610 | const struct drm_display_mode *mode) |
611 | { | 611 | { |
612 | /* | 612 | /* |
613 | * TODO dw drv improvements | 613 | * TODO dw drv improvements |
@@ -642,7 +642,7 @@ static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi) | |||
642 | 642 | ||
643 | /* Get lane byte clock cycles. */ | 643 | /* Get lane byte clock cycles. */ |
644 | static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi, | 644 | static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi, |
645 | struct drm_display_mode *mode, | 645 | const struct drm_display_mode *mode, |
646 | u32 hcomponent) | 646 | u32 hcomponent) |
647 | { | 647 | { |
648 | u32 frac, lbcc; | 648 | u32 frac, lbcc; |
@@ -658,7 +658,7 @@ static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi, | |||
658 | } | 658 | } |
659 | 659 | ||
660 | static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi, | 660 | static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi, |
661 | struct drm_display_mode *mode) | 661 | const struct drm_display_mode *mode) |
662 | { | 662 | { |
663 | u32 htotal, hsa, hbp, lbcc; | 663 | u32 htotal, hsa, hbp, lbcc; |
664 | 664 | ||
@@ -681,7 +681,7 @@ static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi, | |||
681 | } | 681 | } |
682 | 682 | ||
683 | static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi, | 683 | static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi, |
684 | struct drm_display_mode *mode) | 684 | const struct drm_display_mode *mode) |
685 | { | 685 | { |
686 | u32 vactive, vsa, vfp, vbp; | 686 | u32 vactive, vsa, vfp, vbp; |
687 | 687 | ||
@@ -818,7 +818,7 @@ static unsigned int dw_mipi_dsi_get_lanes(struct dw_mipi_dsi *dsi) | |||
818 | } | 818 | } |
819 | 819 | ||
820 | static void dw_mipi_dsi_mode_set(struct dw_mipi_dsi *dsi, | 820 | static void dw_mipi_dsi_mode_set(struct dw_mipi_dsi *dsi, |
821 | struct drm_display_mode *adjusted_mode) | 821 | const struct drm_display_mode *adjusted_mode) |
822 | { | 822 | { |
823 | const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops; | 823 | const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops; |
824 | void *priv_data = dsi->plat_data->priv_data; | 824 | void *priv_data = dsi->plat_data->priv_data; |
@@ -861,8 +861,8 @@ static void dw_mipi_dsi_mode_set(struct dw_mipi_dsi *dsi, | |||
861 | } | 861 | } |
862 | 862 | ||
863 | static void dw_mipi_dsi_bridge_mode_set(struct drm_bridge *bridge, | 863 | static void dw_mipi_dsi_bridge_mode_set(struct drm_bridge *bridge, |
864 | struct drm_display_mode *mode, | 864 | const struct drm_display_mode *mode, |
865 | struct drm_display_mode *adjusted_mode) | 865 | const struct drm_display_mode *adjusted_mode) |
866 | { | 866 | { |
867 | struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); | 867 | struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); |
868 | 868 | ||
diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 8e28e738cb52..4df07f4cbff5 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c | |||
@@ -203,7 +203,7 @@ struct tc_data { | |||
203 | /* display edid */ | 203 | /* display edid */ |
204 | struct edid *edid; | 204 | struct edid *edid; |
205 | /* current mode */ | 205 | /* current mode */ |
206 | struct drm_display_mode *mode; | 206 | const struct drm_display_mode *mode; |
207 | 207 | ||
208 | u32 rev; | 208 | u32 rev; |
209 | u8 assr; | 209 | u8 assr; |
@@ -648,7 +648,8 @@ err_dpcd_read: | |||
648 | return ret; | 648 | return ret; |
649 | } | 649 | } |
650 | 650 | ||
651 | static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode) | 651 | static int tc_set_video_mode(struct tc_data *tc, |
652 | const struct drm_display_mode *mode) | ||
652 | { | 653 | { |
653 | int ret; | 654 | int ret; |
654 | int vid_sync_dly; | 655 | int vid_sync_dly; |
@@ -1113,8 +1114,8 @@ static enum drm_mode_status tc_connector_mode_valid(struct drm_connector *connec | |||
1113 | } | 1114 | } |
1114 | 1115 | ||
1115 | static void tc_bridge_mode_set(struct drm_bridge *bridge, | 1116 | static void tc_bridge_mode_set(struct drm_bridge *bridge, |
1116 | struct drm_display_mode *mode, | 1117 | const struct drm_display_mode *mode, |
1117 | struct drm_display_mode *adj) | 1118 | const struct drm_display_mode *adj) |
1118 | { | 1119 | { |
1119 | struct tc_data *tc = bridge_to_tc(bridge); | 1120 | struct tc_data *tc = bridge_to_tc(bridge); |
1120 | 1121 | ||
diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c index ba7025041e46..138b2711d389 100644 --- a/drivers/gpu/drm/drm_bridge.c +++ b/drivers/gpu/drm/drm_bridge.c | |||
@@ -294,8 +294,8 @@ EXPORT_SYMBOL(drm_bridge_post_disable); | |||
294 | * Note: the bridge passed should be the one closest to the encoder | 294 | * Note: the bridge passed should be the one closest to the encoder |
295 | */ | 295 | */ |
296 | void drm_bridge_mode_set(struct drm_bridge *bridge, | 296 | void drm_bridge_mode_set(struct drm_bridge *bridge, |
297 | struct drm_display_mode *mode, | 297 | const struct drm_display_mode *mode, |
298 | struct drm_display_mode *adjusted_mode) | 298 | const struct drm_display_mode *adjusted_mode) |
299 | { | 299 | { |
300 | if (!bridge) | 300 | if (!bridge) |
301 | return; | 301 | return; |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_mic.c b/drivers/gpu/drm/exynos/exynos_drm_mic.c index 2fd299a58297..dd02e8a323ef 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_mic.c +++ b/drivers/gpu/drm/exynos/exynos_drm_mic.c | |||
@@ -246,8 +246,8 @@ already_disabled: | |||
246 | } | 246 | } |
247 | 247 | ||
248 | static void mic_mode_set(struct drm_bridge *bridge, | 248 | static void mic_mode_set(struct drm_bridge *bridge, |
249 | struct drm_display_mode *mode, | 249 | const struct drm_display_mode *mode, |
250 | struct drm_display_mode *adjusted_mode) | 250 | const struct drm_display_mode *adjusted_mode) |
251 | { | 251 | { |
252 | struct exynos_mic *mic = bridge->driver_private; | 252 | struct exynos_mic *mic = bridge->driver_private; |
253 | 253 | ||
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index 80e4ff33a37a..ecdb8070ed35 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c | |||
@@ -845,7 +845,7 @@ static int tda998x_write_aif(struct tda998x_priv *priv, | |||
845 | } | 845 | } |
846 | 846 | ||
847 | static void | 847 | static void |
848 | tda998x_write_avi(struct tda998x_priv *priv, struct drm_display_mode *mode) | 848 | tda998x_write_avi(struct tda998x_priv *priv, const struct drm_display_mode *mode) |
849 | { | 849 | { |
850 | union hdmi_infoframe frame; | 850 | union hdmi_infoframe frame; |
851 | 851 | ||
@@ -1339,8 +1339,8 @@ static void tda998x_bridge_disable(struct drm_bridge *bridge) | |||
1339 | } | 1339 | } |
1340 | 1340 | ||
1341 | static void tda998x_bridge_mode_set(struct drm_bridge *bridge, | 1341 | static void tda998x_bridge_mode_set(struct drm_bridge *bridge, |
1342 | struct drm_display_mode *mode, | 1342 | const struct drm_display_mode *mode, |
1343 | struct drm_display_mode *adjusted_mode) | 1343 | const struct drm_display_mode *adjusted_mode) |
1344 | { | 1344 | { |
1345 | struct tda998x_priv *priv = bridge_to_tda998x_priv(bridge); | 1345 | struct tda998x_priv *priv = bridge_to_tda998x_priv(bridge); |
1346 | unsigned long tmds_clock; | 1346 | unsigned long tmds_clock; |
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c index f3ef7bf80563..12ad00d01063 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c | |||
@@ -1371,8 +1371,8 @@ static void mtk_hdmi_bridge_post_disable(struct drm_bridge *bridge) | |||
1371 | } | 1371 | } |
1372 | 1372 | ||
1373 | static void mtk_hdmi_bridge_mode_set(struct drm_bridge *bridge, | 1373 | static void mtk_hdmi_bridge_mode_set(struct drm_bridge *bridge, |
1374 | struct drm_display_mode *mode, | 1374 | const struct drm_display_mode *mode, |
1375 | struct drm_display_mode *adjusted_mode) | 1375 | const struct drm_display_mode *adjusted_mode) |
1376 | { | 1376 | { |
1377 | struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge); | 1377 | struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge); |
1378 | 1378 | ||
diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h index 08f3fc6771b7..9c6b31c2d79f 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.h +++ b/drivers/gpu/drm/msm/dsi/dsi.h | |||
@@ -168,7 +168,7 @@ int msm_dsi_host_power_on(struct mipi_dsi_host *host, | |||
168 | bool is_dual_dsi); | 168 | bool is_dual_dsi); |
169 | int msm_dsi_host_power_off(struct mipi_dsi_host *host); | 169 | int msm_dsi_host_power_off(struct mipi_dsi_host *host); |
170 | int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, | 170 | int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, |
171 | struct drm_display_mode *mode); | 171 | const struct drm_display_mode *mode); |
172 | struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host, | 172 | struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host, |
173 | unsigned long *panel_flags); | 173 | unsigned long *panel_flags); |
174 | struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host); | 174 | struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host); |
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 38e481d2d606..610183db1daf 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c | |||
@@ -2424,7 +2424,7 @@ unlock_ret: | |||
2424 | } | 2424 | } |
2425 | 2425 | ||
2426 | int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, | 2426 | int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, |
2427 | struct drm_display_mode *mode) | 2427 | const struct drm_display_mode *mode) |
2428 | { | 2428 | { |
2429 | struct msm_dsi_host *msm_host = to_msm_dsi_host(host); | 2429 | struct msm_dsi_host *msm_host = to_msm_dsi_host(host); |
2430 | 2430 | ||
diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c b/drivers/gpu/drm/msm/dsi/dsi_manager.c index 7c8352a8ea97..979a8e929341 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_manager.c +++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c | |||
@@ -527,8 +527,8 @@ disable_phy: | |||
527 | } | 527 | } |
528 | 528 | ||
529 | static void dsi_mgr_bridge_mode_set(struct drm_bridge *bridge, | 529 | static void dsi_mgr_bridge_mode_set(struct drm_bridge *bridge, |
530 | struct drm_display_mode *mode, | 530 | const struct drm_display_mode *mode, |
531 | struct drm_display_mode *adjusted_mode) | 531 | const struct drm_display_mode *adjusted_mode) |
532 | { | 532 | { |
533 | int id = dsi_mgr_bridge_get_id(bridge); | 533 | int id = dsi_mgr_bridge_get_id(bridge); |
534 | struct msm_dsi *msm_dsi = dsi_mgr_get_dsi(id); | 534 | struct msm_dsi *msm_dsi = dsi_mgr_get_dsi(id); |
diff --git a/drivers/gpu/drm/msm/edp/edp_bridge.c b/drivers/gpu/drm/msm/edp/edp_bridge.c index 153f350ce017..11166bf232ff 100644 --- a/drivers/gpu/drm/msm/edp/edp_bridge.c +++ b/drivers/gpu/drm/msm/edp/edp_bridge.c | |||
@@ -52,8 +52,8 @@ static void edp_bridge_post_disable(struct drm_bridge *bridge) | |||
52 | } | 52 | } |
53 | 53 | ||
54 | static void edp_bridge_mode_set(struct drm_bridge *bridge, | 54 | static void edp_bridge_mode_set(struct drm_bridge *bridge, |
55 | struct drm_display_mode *mode, | 55 | const struct drm_display_mode *mode, |
56 | struct drm_display_mode *adjusted_mode) | 56 | const struct drm_display_mode *adjusted_mode) |
57 | { | 57 | { |
58 | struct drm_device *dev = bridge->dev; | 58 | struct drm_device *dev = bridge->dev; |
59 | struct drm_connector *connector; | 59 | struct drm_connector *connector; |
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c b/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c index 7ba6f52ed72c..03197b8959ba 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | |||
@@ -208,8 +208,8 @@ static void msm_hdmi_bridge_post_disable(struct drm_bridge *bridge) | |||
208 | } | 208 | } |
209 | 209 | ||
210 | static void msm_hdmi_bridge_mode_set(struct drm_bridge *bridge, | 210 | static void msm_hdmi_bridge_mode_set(struct drm_bridge *bridge, |
211 | struct drm_display_mode *mode, | 211 | const struct drm_display_mode *mode, |
212 | struct drm_display_mode *adjusted_mode) | 212 | const struct drm_display_mode *adjusted_mode) |
213 | { | 213 | { |
214 | struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge); | 214 | struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge); |
215 | struct hdmi *hdmi = hdmi_bridge->hdmi; | 215 | struct hdmi *hdmi = hdmi_bridge->hdmi; |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index 90dacab67be5..771b460c7216 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c | |||
@@ -11,7 +11,6 @@ | |||
11 | #include <linux/mutex.h> | 11 | #include <linux/mutex.h> |
12 | #include <linux/sys_soc.h> | 12 | #include <linux/sys_soc.h> |
13 | 13 | ||
14 | #include <drm/drmP.h> | ||
15 | #include <drm/drm_atomic.h> | 14 | #include <drm/drm_atomic.h> |
16 | #include <drm/drm_atomic_helper.h> | 15 | #include <drm/drm_atomic_helper.h> |
17 | #include <drm/drm_crtc.h> | 16 | #include <drm/drm_crtc.h> |
@@ -22,6 +21,7 @@ | |||
22 | 21 | ||
23 | #include "rcar_du_crtc.h" | 22 | #include "rcar_du_crtc.h" |
24 | #include "rcar_du_drv.h" | 23 | #include "rcar_du_drv.h" |
24 | #include "rcar_du_encoder.h" | ||
25 | #include "rcar_du_kms.h" | 25 | #include "rcar_du_kms.h" |
26 | #include "rcar_du_plane.h" | 26 | #include "rcar_du_plane.h" |
27 | #include "rcar_du_regs.h" | 27 | #include "rcar_du_regs.h" |
@@ -316,26 +316,6 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) | |||
316 | rcar_du_crtc_write(rcrtc, DEWR, mode->hdisplay); | 316 | rcar_du_crtc_write(rcrtc, DEWR, mode->hdisplay); |
317 | } | 317 | } |
318 | 318 | ||
319 | void rcar_du_crtc_route_output(struct drm_crtc *crtc, | ||
320 | enum rcar_du_output output) | ||
321 | { | ||
322 | struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); | ||
323 | struct rcar_du_device *rcdu = rcrtc->group->dev; | ||
324 | |||
325 | /* | ||
326 | * Store the route from the CRTC output to the DU output. The DU will be | ||
327 | * configured when starting the CRTC. | ||
328 | */ | ||
329 | rcrtc->outputs |= BIT(output); | ||
330 | |||
331 | /* | ||
332 | * Store RGB routing to DPAD0, the hardware will be configured when | ||
333 | * starting the CRTC. | ||
334 | */ | ||
335 | if (output == RCAR_DU_OUTPUT_DPAD0) | ||
336 | rcdu->dpad0_source = rcrtc->index; | ||
337 | } | ||
338 | |||
339 | static unsigned int plane_zpos(struct rcar_du_plane *plane) | 319 | static unsigned int plane_zpos(struct rcar_du_plane *plane) |
340 | { | 320 | { |
341 | return plane->plane.state->normalized_zpos; | 321 | return plane->plane.state->normalized_zpos; |
@@ -655,6 +635,24 @@ static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc) | |||
655 | * CRTC Functions | 635 | * CRTC Functions |
656 | */ | 636 | */ |
657 | 637 | ||
638 | static int rcar_du_crtc_atomic_check(struct drm_crtc *crtc, | ||
639 | struct drm_crtc_state *state) | ||
640 | { | ||
641 | struct rcar_du_crtc_state *rstate = to_rcar_crtc_state(state); | ||
642 | struct drm_encoder *encoder; | ||
643 | |||
644 | /* Store the routes from the CRTC output to the DU outputs. */ | ||
645 | rstate->outputs = 0; | ||
646 | |||
647 | drm_for_each_encoder_mask(encoder, crtc->dev, state->encoder_mask) { | ||
648 | struct rcar_du_encoder *renc = to_rcar_encoder(encoder); | ||
649 | |||
650 | rstate->outputs |= BIT(renc->output); | ||
651 | } | ||
652 | |||
653 | return 0; | ||
654 | } | ||
655 | |||
658 | static void rcar_du_crtc_atomic_enable(struct drm_crtc *crtc, | 656 | static void rcar_du_crtc_atomic_enable(struct drm_crtc *crtc, |
659 | struct drm_crtc_state *old_state) | 657 | struct drm_crtc_state *old_state) |
660 | { | 658 | { |
@@ -678,8 +676,6 @@ static void rcar_du_crtc_atomic_disable(struct drm_crtc *crtc, | |||
678 | crtc->state->event = NULL; | 676 | crtc->state->event = NULL; |
679 | } | 677 | } |
680 | spin_unlock_irq(&crtc->dev->event_lock); | 678 | spin_unlock_irq(&crtc->dev->event_lock); |
681 | |||
682 | rcrtc->outputs = 0; | ||
683 | } | 679 | } |
684 | 680 | ||
685 | static void rcar_du_crtc_atomic_begin(struct drm_crtc *crtc, | 681 | static void rcar_du_crtc_atomic_begin(struct drm_crtc *crtc, |
@@ -755,6 +751,7 @@ enum drm_mode_status rcar_du_crtc_mode_valid(struct drm_crtc *crtc, | |||
755 | } | 751 | } |
756 | 752 | ||
757 | static const struct drm_crtc_helper_funcs crtc_helper_funcs = { | 753 | static const struct drm_crtc_helper_funcs crtc_helper_funcs = { |
754 | .atomic_check = rcar_du_crtc_atomic_check, | ||
758 | .atomic_begin = rcar_du_crtc_atomic_begin, | 755 | .atomic_begin = rcar_du_crtc_atomic_begin, |
759 | .atomic_flush = rcar_du_crtc_atomic_flush, | 756 | .atomic_flush = rcar_du_crtc_atomic_flush, |
760 | .atomic_enable = rcar_du_crtc_atomic_enable, | 757 | .atomic_enable = rcar_du_crtc_atomic_enable, |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h index 59ac6e7d22c9..bcb35b0b7612 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h | |||
@@ -14,7 +14,6 @@ | |||
14 | #include <linux/spinlock.h> | 14 | #include <linux/spinlock.h> |
15 | #include <linux/wait.h> | 15 | #include <linux/wait.h> |
16 | 16 | ||
17 | #include <drm/drmP.h> | ||
18 | #include <drm/drm_crtc.h> | 17 | #include <drm/drm_crtc.h> |
19 | 18 | ||
20 | #include <media/vsp1.h> | 19 | #include <media/vsp1.h> |
@@ -37,7 +36,6 @@ struct rcar_du_vsp; | |||
37 | * @vblank_lock: protects vblank_wait and vblank_count | 36 | * @vblank_lock: protects vblank_wait and vblank_count |
38 | * @vblank_wait: wait queue used to signal vertical blanking | 37 | * @vblank_wait: wait queue used to signal vertical blanking |
39 | * @vblank_count: number of vertical blanking interrupts to wait for | 38 | * @vblank_count: number of vertical blanking interrupts to wait for |
40 | * @outputs: bitmask of the outputs (enum rcar_du_output) driven by this CRTC | ||
41 | * @group: CRTC group this CRTC belongs to | 39 | * @group: CRTC group this CRTC belongs to |
42 | * @vsp: VSP feeding video to this CRTC | 40 | * @vsp: VSP feeding video to this CRTC |
43 | * @vsp_pipe: index of the VSP pipeline feeding video to this CRTC | 41 | * @vsp_pipe: index of the VSP pipeline feeding video to this CRTC |
@@ -61,8 +59,6 @@ struct rcar_du_crtc { | |||
61 | wait_queue_head_t vblank_wait; | 59 | wait_queue_head_t vblank_wait; |
62 | unsigned int vblank_count; | 60 | unsigned int vblank_count; |
63 | 61 | ||
64 | unsigned int outputs; | ||
65 | |||
66 | struct rcar_du_group *group; | 62 | struct rcar_du_group *group; |
67 | struct rcar_du_vsp *vsp; | 63 | struct rcar_du_vsp *vsp; |
68 | unsigned int vsp_pipe; | 64 | unsigned int vsp_pipe; |
@@ -77,11 +73,13 @@ struct rcar_du_crtc { | |||
77 | * struct rcar_du_crtc_state - Driver-specific CRTC state | 73 | * struct rcar_du_crtc_state - Driver-specific CRTC state |
78 | * @state: base DRM CRTC state | 74 | * @state: base DRM CRTC state |
79 | * @crc: CRC computation configuration | 75 | * @crc: CRC computation configuration |
76 | * @outputs: bitmask of the outputs (enum rcar_du_output) driven by this CRTC | ||
80 | */ | 77 | */ |
81 | struct rcar_du_crtc_state { | 78 | struct rcar_du_crtc_state { |
82 | struct drm_crtc_state state; | 79 | struct drm_crtc_state state; |
83 | 80 | ||
84 | struct vsp1_du_crc_config crc; | 81 | struct vsp1_du_crc_config crc; |
82 | unsigned int outputs; | ||
85 | }; | 83 | }; |
86 | 84 | ||
87 | #define to_rcar_crtc_state(s) container_of(s, struct rcar_du_crtc_state, state) | 85 | #define to_rcar_crtc_state(s) container_of(s, struct rcar_du_crtc_state, state) |
@@ -102,8 +100,6 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex, | |||
102 | void rcar_du_crtc_suspend(struct rcar_du_crtc *rcrtc); | 100 | void rcar_du_crtc_suspend(struct rcar_du_crtc *rcrtc); |
103 | void rcar_du_crtc_resume(struct rcar_du_crtc *rcrtc); | 101 | void rcar_du_crtc_resume(struct rcar_du_crtc *rcrtc); |
104 | 102 | ||
105 | void rcar_du_crtc_route_output(struct drm_crtc *crtc, | ||
106 | enum rcar_du_output output); | ||
107 | void rcar_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc); | 103 | void rcar_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc); |
108 | 104 | ||
109 | void rcar_du_crtc_dsysr_clr_set(struct rcar_du_crtc *rcrtc, u32 clr, u32 set); | 105 | void rcar_du_crtc_dsysr_clr_set(struct rcar_du_crtc *rcrtc, u32 clr, u32 set); |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c index f50a3b1864bb..d1f305694367 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c | |||
@@ -17,7 +17,6 @@ | |||
17 | #include <linux/slab.h> | 17 | #include <linux/slab.h> |
18 | #include <linux/wait.h> | 18 | #include <linux/wait.h> |
19 | 19 | ||
20 | #include <drm/drmP.h> | ||
21 | #include <drm/drm_atomic_helper.h> | 20 | #include <drm/drm_atomic_helper.h> |
22 | #include <drm/drm_crtc_helper.h> | 21 | #include <drm/drm_crtc_helper.h> |
23 | #include <drm/drm_fb_cma_helper.h> | 22 | #include <drm/drm_fb_cma_helper.h> |
@@ -36,7 +35,6 @@ | |||
36 | static const struct rcar_du_device_info rzg1_du_r8a7743_info = { | 35 | static const struct rcar_du_device_info rzg1_du_r8a7743_info = { |
37 | .gen = 2, | 36 | .gen = 2, |
38 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | 37 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK |
39 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
40 | | RCAR_DU_FEATURE_INTERLACED | 38 | | RCAR_DU_FEATURE_INTERLACED |
41 | | RCAR_DU_FEATURE_TVM_SYNC, | 39 | | RCAR_DU_FEATURE_TVM_SYNC, |
42 | .channels_mask = BIT(1) | BIT(0), | 40 | .channels_mask = BIT(1) | BIT(0), |
@@ -59,7 +57,6 @@ static const struct rcar_du_device_info rzg1_du_r8a7743_info = { | |||
59 | static const struct rcar_du_device_info rzg1_du_r8a7745_info = { | 57 | static const struct rcar_du_device_info rzg1_du_r8a7745_info = { |
60 | .gen = 2, | 58 | .gen = 2, |
61 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | 59 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK |
62 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
63 | | RCAR_DU_FEATURE_INTERLACED | 60 | | RCAR_DU_FEATURE_INTERLACED |
64 | | RCAR_DU_FEATURE_TVM_SYNC, | 61 | | RCAR_DU_FEATURE_TVM_SYNC, |
65 | .channels_mask = BIT(1) | BIT(0), | 62 | .channels_mask = BIT(1) | BIT(0), |
@@ -81,7 +78,6 @@ static const struct rcar_du_device_info rzg1_du_r8a7745_info = { | |||
81 | static const struct rcar_du_device_info rzg1_du_r8a77470_info = { | 78 | static const struct rcar_du_device_info rzg1_du_r8a77470_info = { |
82 | .gen = 2, | 79 | .gen = 2, |
83 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | 80 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK |
84 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
85 | | RCAR_DU_FEATURE_INTERLACED | 81 | | RCAR_DU_FEATURE_INTERLACED |
86 | | RCAR_DU_FEATURE_TVM_SYNC, | 82 | | RCAR_DU_FEATURE_TVM_SYNC, |
87 | .channels_mask = BIT(1) | BIT(0), | 83 | .channels_mask = BIT(1) | BIT(0), |
@@ -105,8 +101,34 @@ static const struct rcar_du_device_info rzg1_du_r8a77470_info = { | |||
105 | }, | 101 | }, |
106 | }; | 102 | }; |
107 | 103 | ||
104 | static const struct rcar_du_device_info rcar_du_r8a774c0_info = { | ||
105 | .gen = 3, | ||
106 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | ||
107 | | RCAR_DU_FEATURE_VSP1_SOURCE, | ||
108 | .channels_mask = BIT(1) | BIT(0), | ||
109 | .routes = { | ||
110 | /* | ||
111 | * R8A774C0 has one RGB output and two LVDS outputs | ||
112 | */ | ||
113 | [RCAR_DU_OUTPUT_DPAD0] = { | ||
114 | .possible_crtcs = BIT(0) | BIT(1), | ||
115 | .port = 0, | ||
116 | }, | ||
117 | [RCAR_DU_OUTPUT_LVDS0] = { | ||
118 | .possible_crtcs = BIT(0), | ||
119 | .port = 1, | ||
120 | }, | ||
121 | [RCAR_DU_OUTPUT_LVDS1] = { | ||
122 | .possible_crtcs = BIT(1), | ||
123 | .port = 2, | ||
124 | }, | ||
125 | }, | ||
126 | .num_lvds = 2, | ||
127 | .lvds_clk_mask = BIT(1) | BIT(0), | ||
128 | }; | ||
129 | |||
108 | static const struct rcar_du_device_info rcar_du_r8a7779_info = { | 130 | static const struct rcar_du_device_info rcar_du_r8a7779_info = { |
109 | .gen = 2, | 131 | .gen = 1, |
110 | .features = RCAR_DU_FEATURE_INTERLACED | 132 | .features = RCAR_DU_FEATURE_INTERLACED |
111 | | RCAR_DU_FEATURE_TVM_SYNC, | 133 | | RCAR_DU_FEATURE_TVM_SYNC, |
112 | .channels_mask = BIT(1) | BIT(0), | 134 | .channels_mask = BIT(1) | BIT(0), |
@@ -129,7 +151,6 @@ static const struct rcar_du_device_info rcar_du_r8a7779_info = { | |||
129 | static const struct rcar_du_device_info rcar_du_r8a7790_info = { | 151 | static const struct rcar_du_device_info rcar_du_r8a7790_info = { |
130 | .gen = 2, | 152 | .gen = 2, |
131 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | 153 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK |
132 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
133 | | RCAR_DU_FEATURE_INTERLACED | 154 | | RCAR_DU_FEATURE_INTERLACED |
134 | | RCAR_DU_FEATURE_TVM_SYNC, | 155 | | RCAR_DU_FEATURE_TVM_SYNC, |
135 | .quirks = RCAR_DU_QUIRK_ALIGN_128B, | 156 | .quirks = RCAR_DU_QUIRK_ALIGN_128B, |
@@ -159,7 +180,6 @@ static const struct rcar_du_device_info rcar_du_r8a7790_info = { | |||
159 | static const struct rcar_du_device_info rcar_du_r8a7791_info = { | 180 | static const struct rcar_du_device_info rcar_du_r8a7791_info = { |
160 | .gen = 2, | 181 | .gen = 2, |
161 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | 182 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK |
162 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
163 | | RCAR_DU_FEATURE_INTERLACED | 183 | | RCAR_DU_FEATURE_INTERLACED |
164 | | RCAR_DU_FEATURE_TVM_SYNC, | 184 | | RCAR_DU_FEATURE_TVM_SYNC, |
165 | .channels_mask = BIT(1) | BIT(0), | 185 | .channels_mask = BIT(1) | BIT(0), |
@@ -183,7 +203,6 @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = { | |||
183 | static const struct rcar_du_device_info rcar_du_r8a7792_info = { | 203 | static const struct rcar_du_device_info rcar_du_r8a7792_info = { |
184 | .gen = 2, | 204 | .gen = 2, |
185 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | 205 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK |
186 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
187 | | RCAR_DU_FEATURE_INTERLACED | 206 | | RCAR_DU_FEATURE_INTERLACED |
188 | | RCAR_DU_FEATURE_TVM_SYNC, | 207 | | RCAR_DU_FEATURE_TVM_SYNC, |
189 | .channels_mask = BIT(1) | BIT(0), | 208 | .channels_mask = BIT(1) | BIT(0), |
@@ -203,7 +222,6 @@ static const struct rcar_du_device_info rcar_du_r8a7792_info = { | |||
203 | static const struct rcar_du_device_info rcar_du_r8a7794_info = { | 222 | static const struct rcar_du_device_info rcar_du_r8a7794_info = { |
204 | .gen = 2, | 223 | .gen = 2, |
205 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | 224 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK |
206 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
207 | | RCAR_DU_FEATURE_INTERLACED | 225 | | RCAR_DU_FEATURE_INTERLACED |
208 | | RCAR_DU_FEATURE_TVM_SYNC, | 226 | | RCAR_DU_FEATURE_TVM_SYNC, |
209 | .channels_mask = BIT(1) | BIT(0), | 227 | .channels_mask = BIT(1) | BIT(0), |
@@ -226,7 +244,6 @@ static const struct rcar_du_device_info rcar_du_r8a7794_info = { | |||
226 | static const struct rcar_du_device_info rcar_du_r8a7795_info = { | 244 | static const struct rcar_du_device_info rcar_du_r8a7795_info = { |
227 | .gen = 3, | 245 | .gen = 3, |
228 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | 246 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK |
229 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
230 | | RCAR_DU_FEATURE_VSP1_SOURCE | 247 | | RCAR_DU_FEATURE_VSP1_SOURCE |
231 | | RCAR_DU_FEATURE_INTERLACED | 248 | | RCAR_DU_FEATURE_INTERLACED |
232 | | RCAR_DU_FEATURE_TVM_SYNC, | 249 | | RCAR_DU_FEATURE_TVM_SYNC, |
@@ -260,7 +277,6 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = { | |||
260 | static const struct rcar_du_device_info rcar_du_r8a7796_info = { | 277 | static const struct rcar_du_device_info rcar_du_r8a7796_info = { |
261 | .gen = 3, | 278 | .gen = 3, |
262 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | 279 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK |
263 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
264 | | RCAR_DU_FEATURE_VSP1_SOURCE | 280 | | RCAR_DU_FEATURE_VSP1_SOURCE |
265 | | RCAR_DU_FEATURE_INTERLACED | 281 | | RCAR_DU_FEATURE_INTERLACED |
266 | | RCAR_DU_FEATURE_TVM_SYNC, | 282 | | RCAR_DU_FEATURE_TVM_SYNC, |
@@ -290,7 +306,6 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = { | |||
290 | static const struct rcar_du_device_info rcar_du_r8a77965_info = { | 306 | static const struct rcar_du_device_info rcar_du_r8a77965_info = { |
291 | .gen = 3, | 307 | .gen = 3, |
292 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | 308 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK |
293 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
294 | | RCAR_DU_FEATURE_VSP1_SOURCE | 309 | | RCAR_DU_FEATURE_VSP1_SOURCE |
295 | | RCAR_DU_FEATURE_INTERLACED | 310 | | RCAR_DU_FEATURE_INTERLACED |
296 | | RCAR_DU_FEATURE_TVM_SYNC, | 311 | | RCAR_DU_FEATURE_TVM_SYNC, |
@@ -320,7 +335,6 @@ static const struct rcar_du_device_info rcar_du_r8a77965_info = { | |||
320 | static const struct rcar_du_device_info rcar_du_r8a77970_info = { | 335 | static const struct rcar_du_device_info rcar_du_r8a77970_info = { |
321 | .gen = 3, | 336 | .gen = 3, |
322 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | 337 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK |
323 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
324 | | RCAR_DU_FEATURE_VSP1_SOURCE | 338 | | RCAR_DU_FEATURE_VSP1_SOURCE |
325 | | RCAR_DU_FEATURE_INTERLACED | 339 | | RCAR_DU_FEATURE_INTERLACED |
326 | | RCAR_DU_FEATURE_TVM_SYNC, | 340 | | RCAR_DU_FEATURE_TVM_SYNC, |
@@ -342,7 +356,6 @@ static const struct rcar_du_device_info rcar_du_r8a77970_info = { | |||
342 | static const struct rcar_du_device_info rcar_du_r8a7799x_info = { | 356 | static const struct rcar_du_device_info rcar_du_r8a7799x_info = { |
343 | .gen = 3, | 357 | .gen = 3, |
344 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | 358 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK |
345 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
346 | | RCAR_DU_FEATURE_VSP1_SOURCE, | 359 | | RCAR_DU_FEATURE_VSP1_SOURCE, |
347 | .channels_mask = BIT(1) | BIT(0), | 360 | .channels_mask = BIT(1) | BIT(0), |
348 | .routes = { | 361 | .routes = { |
@@ -372,6 +385,7 @@ static const struct of_device_id rcar_du_of_table[] = { | |||
372 | { .compatible = "renesas,du-r8a7744", .data = &rzg1_du_r8a7743_info }, | 385 | { .compatible = "renesas,du-r8a7744", .data = &rzg1_du_r8a7743_info }, |
373 | { .compatible = "renesas,du-r8a7745", .data = &rzg1_du_r8a7745_info }, | 386 | { .compatible = "renesas,du-r8a7745", .data = &rzg1_du_r8a7745_info }, |
374 | { .compatible = "renesas,du-r8a77470", .data = &rzg1_du_r8a77470_info }, | 387 | { .compatible = "renesas,du-r8a77470", .data = &rzg1_du_r8a77470_info }, |
388 | { .compatible = "renesas,du-r8a774c0", .data = &rcar_du_r8a774c0_info }, | ||
375 | { .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info }, | 389 | { .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info }, |
376 | { .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info }, | 390 | { .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info }, |
377 | { .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info }, | 391 | { .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info }, |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h index a68da79b424e..6c187d0bf7c2 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h | |||
@@ -20,13 +20,13 @@ | |||
20 | struct clk; | 20 | struct clk; |
21 | struct device; | 21 | struct device; |
22 | struct drm_device; | 22 | struct drm_device; |
23 | struct drm_property; | ||
23 | struct rcar_du_device; | 24 | struct rcar_du_device; |
24 | 25 | ||
25 | #define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK BIT(0) /* Per-CRTC IRQ and clock */ | 26 | #define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK BIT(0) /* Per-CRTC IRQ and clock */ |
26 | #define RCAR_DU_FEATURE_EXT_CTRL_REGS BIT(1) /* Has extended control registers */ | 27 | #define RCAR_DU_FEATURE_VSP1_SOURCE BIT(1) /* Has inputs from VSP1 */ |
27 | #define RCAR_DU_FEATURE_VSP1_SOURCE BIT(2) /* Has inputs from VSP1 */ | 28 | #define RCAR_DU_FEATURE_INTERLACED BIT(2) /* HW supports interlaced */ |
28 | #define RCAR_DU_FEATURE_INTERLACED BIT(3) /* HW supports interlaced */ | 29 | #define RCAR_DU_FEATURE_TVM_SYNC BIT(3) /* Has TV switch/sync modes */ |
29 | #define RCAR_DU_FEATURE_TVM_SYNC BIT(4) /* Has TV switch/sync modes */ | ||
30 | 30 | ||
31 | #define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */ | 31 | #define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */ |
32 | 32 | ||
@@ -89,6 +89,7 @@ struct rcar_du_device { | |||
89 | } props; | 89 | } props; |
90 | 90 | ||
91 | unsigned int dpad0_source; | 91 | unsigned int dpad0_source; |
92 | unsigned int dpad1_source; | ||
92 | unsigned int vspd1_sink; | 93 | unsigned int vspd1_sink; |
93 | }; | 94 | }; |
94 | 95 | ||
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c index 1877764bd6d9..f16209499117 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c | |||
@@ -9,7 +9,6 @@ | |||
9 | 9 | ||
10 | #include <linux/export.h> | 10 | #include <linux/export.h> |
11 | 11 | ||
12 | #include <drm/drmP.h> | ||
13 | #include <drm/drm_crtc.h> | 12 | #include <drm/drm_crtc.h> |
14 | #include <drm/drm_crtc_helper.h> | 13 | #include <drm/drm_crtc_helper.h> |
15 | #include <drm/drm_panel.h> | 14 | #include <drm/drm_panel.h> |
@@ -22,17 +21,7 @@ | |||
22 | * Encoder | 21 | * Encoder |
23 | */ | 22 | */ |
24 | 23 | ||
25 | static void rcar_du_encoder_mode_set(struct drm_encoder *encoder, | ||
26 | struct drm_crtc_state *crtc_state, | ||
27 | struct drm_connector_state *conn_state) | ||
28 | { | ||
29 | struct rcar_du_encoder *renc = to_rcar_encoder(encoder); | ||
30 | |||
31 | rcar_du_crtc_route_output(crtc_state->crtc, renc->output); | ||
32 | } | ||
33 | |||
34 | static const struct drm_encoder_helper_funcs encoder_helper_funcs = { | 24 | static const struct drm_encoder_helper_funcs encoder_helper_funcs = { |
35 | .atomic_mode_set = rcar_du_encoder_mode_set, | ||
36 | }; | 25 | }; |
37 | 26 | ||
38 | static const struct drm_encoder_funcs encoder_funcs = { | 27 | static const struct drm_encoder_funcs encoder_funcs = { |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h index ce3cbc85695e..552f2a02e5b5 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h | |||
@@ -10,10 +10,8 @@ | |||
10 | #ifndef __RCAR_DU_ENCODER_H__ | 10 | #ifndef __RCAR_DU_ENCODER_H__ |
11 | #define __RCAR_DU_ENCODER_H__ | 11 | #define __RCAR_DU_ENCODER_H__ |
12 | 12 | ||
13 | #include <drm/drm_crtc.h> | ||
14 | #include <drm/drm_encoder.h> | 13 | #include <drm/drm_encoder.h> |
15 | 14 | ||
16 | struct drm_panel; | ||
17 | struct rcar_du_device; | 15 | struct rcar_du_device; |
18 | 16 | ||
19 | struct rcar_du_encoder { | 17 | struct rcar_du_encoder { |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c index cebf313c6e1f..9eee47969e77 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_group.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c | |||
@@ -147,7 +147,7 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp) | |||
147 | 147 | ||
148 | rcar_du_group_setup_pins(rgrp); | 148 | rcar_du_group_setup_pins(rgrp); |
149 | 149 | ||
150 | if (rcar_du_has(rgrp->dev, RCAR_DU_FEATURE_EXT_CTRL_REGS)) { | 150 | if (rcdu->info->gen >= 2) { |
151 | rcar_du_group_setup_defr8(rgrp); | 151 | rcar_du_group_setup_defr8(rgrp); |
152 | rcar_du_group_setup_didsr(rgrp); | 152 | rcar_du_group_setup_didsr(rgrp); |
153 | } | 153 | } |
@@ -262,7 +262,7 @@ int rcar_du_set_dpad0_vsp1_routing(struct rcar_du_device *rcdu) | |||
262 | unsigned int index; | 262 | unsigned int index; |
263 | int ret; | 263 | int ret; |
264 | 264 | ||
265 | if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_EXT_CTRL_REGS)) | 265 | if (rcdu->info->gen < 2) |
266 | return 0; | 266 | return 0; |
267 | 267 | ||
268 | /* | 268 | /* |
@@ -287,9 +287,50 @@ int rcar_du_set_dpad0_vsp1_routing(struct rcar_du_device *rcdu) | |||
287 | return 0; | 287 | return 0; |
288 | } | 288 | } |
289 | 289 | ||
290 | static void rcar_du_group_set_dpad_levels(struct rcar_du_group *rgrp) | ||
291 | { | ||
292 | static const u32 doflr_values[2] = { | ||
293 | DOFLR_HSYCFL0 | DOFLR_VSYCFL0 | DOFLR_ODDFL0 | | ||
294 | DOFLR_DISPFL0 | DOFLR_CDEFL0 | DOFLR_RGBFL0, | ||
295 | DOFLR_HSYCFL1 | DOFLR_VSYCFL1 | DOFLR_ODDFL1 | | ||
296 | DOFLR_DISPFL1 | DOFLR_CDEFL1 | DOFLR_RGBFL1, | ||
297 | }; | ||
298 | static const u32 dpad_mask = BIT(RCAR_DU_OUTPUT_DPAD1) | ||
299 | | BIT(RCAR_DU_OUTPUT_DPAD0); | ||
300 | struct rcar_du_device *rcdu = rgrp->dev; | ||
301 | u32 doflr = DOFLR_CODE; | ||
302 | unsigned int i; | ||
303 | |||
304 | if (rcdu->info->gen < 2) | ||
305 | return; | ||
306 | |||
307 | /* | ||
308 | * The DPAD outputs can't be controlled directly. However, the parallel | ||
309 | * output of the DU channels routed to DPAD can be set to fixed levels | ||
310 | * through the DOFLR group register. Use this to turn the DPAD on or off | ||
311 | * by driving fixed low-level signals at the output of any DU channel | ||
312 | * not routed to a DPAD output. This doesn't affect the DU output | ||
313 | * signals going to other outputs, such as the internal LVDS and HDMI | ||
314 | * encoders. | ||
315 | */ | ||
316 | |||
317 | for (i = 0; i < rgrp->num_crtcs; ++i) { | ||
318 | struct rcar_du_crtc_state *rstate; | ||
319 | struct rcar_du_crtc *rcrtc; | ||
320 | |||
321 | rcrtc = &rcdu->crtcs[rgrp->index * 2 + i]; | ||
322 | rstate = to_rcar_crtc_state(rcrtc->crtc.state); | ||
323 | |||
324 | if (!(rstate->outputs & dpad_mask)) | ||
325 | doflr |= doflr_values[i]; | ||
326 | } | ||
327 | |||
328 | rcar_du_group_write(rgrp, DOFLR, doflr); | ||
329 | } | ||
330 | |||
290 | int rcar_du_group_set_routing(struct rcar_du_group *rgrp) | 331 | int rcar_du_group_set_routing(struct rcar_du_group *rgrp) |
291 | { | 332 | { |
292 | struct rcar_du_crtc *crtc0 = &rgrp->dev->crtcs[rgrp->index * 2]; | 333 | struct rcar_du_device *rcdu = rgrp->dev; |
293 | u32 dorcr = rcar_du_group_read(rgrp, DORCR); | 334 | u32 dorcr = rcar_du_group_read(rgrp, DORCR); |
294 | 335 | ||
295 | dorcr &= ~(DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_MASK); | 336 | dorcr &= ~(DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_MASK); |
@@ -299,12 +340,14 @@ int rcar_du_group_set_routing(struct rcar_du_group *rgrp) | |||
299 | * CRTC 1 in all other cases to avoid cloning CRTC 0 to DPAD0 and DPAD1 | 340 | * CRTC 1 in all other cases to avoid cloning CRTC 0 to DPAD0 and DPAD1 |
300 | * by default. | 341 | * by default. |
301 | */ | 342 | */ |
302 | if (crtc0->outputs & BIT(RCAR_DU_OUTPUT_DPAD1)) | 343 | if (rcdu->dpad1_source == rgrp->index * 2) |
303 | dorcr |= DORCR_PG2D_DS1; | 344 | dorcr |= DORCR_PG2D_DS1; |
304 | else | 345 | else |
305 | dorcr |= DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_DS2; | 346 | dorcr |= DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_DS2; |
306 | 347 | ||
307 | rcar_du_group_write(rgrp, DORCR, dorcr); | 348 | rcar_du_group_write(rgrp, DORCR, dorcr); |
308 | 349 | ||
350 | rcar_du_group_set_dpad_levels(rgrp); | ||
351 | |||
309 | return rcar_du_set_dpad0_vsp1_routing(rgrp->dev); | 352 | return rcar_du_set_dpad0_vsp1_routing(rgrp->dev); |
310 | } | 353 | } |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c index 9c7007d45408..e4b248e368d6 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c | |||
@@ -7,7 +7,6 @@ | |||
7 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) | 7 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) |
8 | */ | 8 | */ |
9 | 9 | ||
10 | #include <drm/drmP.h> | ||
11 | #include <drm/drm_atomic.h> | 10 | #include <drm/drm_atomic.h> |
12 | #include <drm/drm_atomic_helper.h> | 11 | #include <drm/drm_atomic_helper.h> |
13 | #include <drm/drm_crtc.h> | 12 | #include <drm/drm_crtc.h> |
@@ -278,6 +277,28 @@ static int rcar_du_atomic_check(struct drm_device *dev, | |||
278 | static void rcar_du_atomic_commit_tail(struct drm_atomic_state *old_state) | 277 | static void rcar_du_atomic_commit_tail(struct drm_atomic_state *old_state) |
279 | { | 278 | { |
280 | struct drm_device *dev = old_state->dev; | 279 | struct drm_device *dev = old_state->dev; |
280 | struct rcar_du_device *rcdu = dev->dev_private; | ||
281 | struct drm_crtc_state *crtc_state; | ||
282 | struct drm_crtc *crtc; | ||
283 | unsigned int i; | ||
284 | |||
285 | /* | ||
286 | * Store RGB routing to DPAD0 and DPAD1, the hardware will be configured | ||
287 | * when starting the CRTCs. | ||
288 | */ | ||
289 | rcdu->dpad1_source = -1; | ||
290 | |||
291 | for_each_new_crtc_in_state(old_state, crtc, crtc_state, i) { | ||
292 | struct rcar_du_crtc_state *rcrtc_state = | ||
293 | to_rcar_crtc_state(crtc_state); | ||
294 | struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); | ||
295 | |||
296 | if (rcrtc_state->outputs & BIT(RCAR_DU_OUTPUT_DPAD0)) | ||
297 | rcdu->dpad0_source = rcrtc->index; | ||
298 | |||
299 | if (rcrtc_state->outputs & BIT(RCAR_DU_OUTPUT_DPAD1)) | ||
300 | rcdu->dpad1_source = rcrtc->index; | ||
301 | } | ||
281 | 302 | ||
282 | /* Apply the atomic update. */ | 303 | /* Apply the atomic update. */ |
283 | drm_atomic_helper_commit_modeset_disables(dev, old_state); | 304 | drm_atomic_helper_commit_modeset_disables(dev, old_state); |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7790.dts b/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7790.dts index 579753e04f3b..8bee4e787a0a 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7790.dts +++ b/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7790.dts | |||
@@ -7,70 +7,63 @@ | |||
7 | 7 | ||
8 | /dts-v1/; | 8 | /dts-v1/; |
9 | /plugin/; | 9 | /plugin/; |
10 | / { | ||
11 | fragment@0 { | ||
12 | target-path = "/"; | ||
13 | __overlay__ { | ||
14 | #address-cells = <2>; | ||
15 | #size-cells = <2>; | ||
16 | 10 | ||
17 | lvds@feb90000 { | 11 | &{/} { |
18 | compatible = "renesas,r8a7790-lvds"; | 12 | #address-cells = <2>; |
19 | reg = <0 0xfeb90000 0 0x1c>; | 13 | #size-cells = <2>; |
20 | 14 | ||
21 | ports { | 15 | lvds@feb90000 { |
22 | #address-cells = <1>; | 16 | compatible = "renesas,r8a7790-lvds"; |
23 | #size-cells = <0>; | 17 | reg = <0 0xfeb90000 0 0x1c>; |
24 | 18 | ||
25 | port@0 { | 19 | ports { |
26 | reg = <0>; | 20 | #address-cells = <1>; |
27 | lvds0_input: endpoint { | 21 | #size-cells = <0>; |
28 | }; | 22 | |
29 | }; | 23 | port@0 { |
30 | port@1 { | 24 | reg = <0>; |
31 | reg = <1>; | 25 | lvds0_input: endpoint { |
32 | lvds0_out: endpoint { | ||
33 | }; | ||
34 | }; | ||
35 | }; | 26 | }; |
36 | }; | 27 | }; |
37 | 28 | port@1 { | |
38 | lvds@feb94000 { | 29 | reg = <1>; |
39 | compatible = "renesas,r8a7790-lvds"; | 30 | lvds0_out: endpoint { |
40 | reg = <0 0xfeb94000 0 0x1c>; | ||
41 | |||
42 | ports { | ||
43 | #address-cells = <1>; | ||
44 | #size-cells = <0>; | ||
45 | |||
46 | port@0 { | ||
47 | reg = <0>; | ||
48 | lvds1_input: endpoint { | ||
49 | }; | ||
50 | }; | ||
51 | port@1 { | ||
52 | reg = <1>; | ||
53 | lvds1_out: endpoint { | ||
54 | }; | ||
55 | }; | ||
56 | }; | 31 | }; |
57 | }; | 32 | }; |
58 | }; | 33 | }; |
59 | }; | 34 | }; |
60 | 35 | ||
61 | fragment@1 { | 36 | lvds@feb94000 { |
62 | target-path = "/display@feb00000/ports"; | 37 | compatible = "renesas,r8a7790-lvds"; |
63 | __overlay__ { | 38 | reg = <0 0xfeb94000 0 0x1c>; |
64 | port@1 { | 39 | |
65 | endpoint { | 40 | ports { |
66 | remote-endpoint = <&lvds0_input>; | 41 | #address-cells = <1>; |
42 | #size-cells = <0>; | ||
43 | |||
44 | port@0 { | ||
45 | reg = <0>; | ||
46 | lvds1_input: endpoint { | ||
67 | }; | 47 | }; |
68 | }; | 48 | }; |
69 | port@2 { | 49 | port@1 { |
70 | endpoint { | 50 | reg = <1>; |
71 | remote-endpoint = <&lvds1_input>; | 51 | lvds1_out: endpoint { |
72 | }; | 52 | }; |
73 | }; | 53 | }; |
74 | }; | 54 | }; |
75 | }; | 55 | }; |
76 | }; | 56 | }; |
57 | |||
58 | &{/display@feb00000/ports} { | ||
59 | port@1 { | ||
60 | endpoint { | ||
61 | remote-endpoint = <&lvds0_input>; | ||
62 | }; | ||
63 | }; | ||
64 | port@2 { | ||
65 | endpoint { | ||
66 | remote-endpoint = <&lvds1_input>; | ||
67 | }; | ||
68 | }; | ||
69 | }; | ||
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7791.dts b/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7791.dts index cb9da1f3942b..92c0509971ec 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7791.dts +++ b/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7791.dts | |||
@@ -7,44 +7,37 @@ | |||
7 | 7 | ||
8 | /dts-v1/; | 8 | /dts-v1/; |
9 | /plugin/; | 9 | /plugin/; |
10 | / { | ||
11 | fragment@0 { | ||
12 | target-path = "/"; | ||
13 | __overlay__ { | ||
14 | #address-cells = <2>; | ||
15 | #size-cells = <2>; | ||
16 | 10 | ||
17 | lvds@feb90000 { | 11 | &{/} { |
18 | compatible = "renesas,r8a7791-lvds"; | 12 | #address-cells = <2>; |
19 | reg = <0 0xfeb90000 0 0x1c>; | 13 | #size-cells = <2>; |
20 | 14 | ||
21 | ports { | 15 | lvds@feb90000 { |
22 | #address-cells = <1>; | 16 | compatible = "renesas,r8a7791-lvds"; |
23 | #size-cells = <0>; | 17 | reg = <0 0xfeb90000 0 0x1c>; |
24 | 18 | ||
25 | port@0 { | 19 | ports { |
26 | reg = <0>; | 20 | #address-cells = <1>; |
27 | lvds0_input: endpoint { | 21 | #size-cells = <0>; |
28 | }; | 22 | |
29 | }; | 23 | port@0 { |
30 | port@1 { | 24 | reg = <0>; |
31 | reg = <1>; | 25 | lvds0_input: endpoint { |
32 | lvds0_out: endpoint { | ||
33 | }; | ||
34 | }; | ||
35 | }; | 26 | }; |
36 | }; | 27 | }; |
37 | }; | ||
38 | }; | ||
39 | |||
40 | fragment@1 { | ||
41 | target-path = "/display@feb00000/ports"; | ||
42 | __overlay__ { | ||
43 | port@1 { | 28 | port@1 { |
44 | endpoint { | 29 | reg = <1>; |
45 | remote-endpoint = <&lvds0_input>; | 30 | lvds0_out: endpoint { |
46 | }; | 31 | }; |
47 | }; | 32 | }; |
48 | }; | 33 | }; |
49 | }; | 34 | }; |
50 | }; | 35 | }; |
36 | |||
37 | &{/display@feb00000/ports} { | ||
38 | port@1 { | ||
39 | endpoint { | ||
40 | remote-endpoint = <&lvds0_input>; | ||
41 | }; | ||
42 | }; | ||
43 | }; | ||
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7793.dts b/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7793.dts index e7b8804dc3c1..c8b93f21de0f 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7793.dts +++ b/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7793.dts | |||
@@ -7,44 +7,37 @@ | |||
7 | 7 | ||
8 | /dts-v1/; | 8 | /dts-v1/; |
9 | /plugin/; | 9 | /plugin/; |
10 | / { | ||
11 | fragment@0 { | ||
12 | target-path = "/"; | ||
13 | __overlay__ { | ||
14 | #address-cells = <2>; | ||
15 | #size-cells = <2>; | ||
16 | 10 | ||
17 | lvds@feb90000 { | 11 | &{/} { |
18 | compatible = "renesas,r8a7793-lvds"; | 12 | #address-cells = <2>; |
19 | reg = <0 0xfeb90000 0 0x1c>; | 13 | #size-cells = <2>; |
20 | 14 | ||
21 | ports { | 15 | lvds@feb90000 { |
22 | #address-cells = <1>; | 16 | compatible = "renesas,r8a7793-lvds"; |
23 | #size-cells = <0>; | 17 | reg = <0 0xfeb90000 0 0x1c>; |
24 | 18 | ||
25 | port@0 { | 19 | ports { |
26 | reg = <0>; | 20 | #address-cells = <1>; |
27 | lvds0_input: endpoint { | 21 | #size-cells = <0>; |
28 | }; | 22 | |
29 | }; | 23 | port@0 { |
30 | port@1 { | 24 | reg = <0>; |
31 | reg = <1>; | 25 | lvds0_input: endpoint { |
32 | lvds0_out: endpoint { | ||
33 | }; | ||
34 | }; | ||
35 | }; | 26 | }; |
36 | }; | 27 | }; |
37 | }; | ||
38 | }; | ||
39 | |||
40 | fragment@1 { | ||
41 | target-path = "/display@feb00000/ports"; | ||
42 | __overlay__ { | ||
43 | port@1 { | 28 | port@1 { |
44 | endpoint { | 29 | reg = <1>; |
45 | remote-endpoint = <&lvds0_input>; | 30 | lvds0_out: endpoint { |
46 | }; | 31 | }; |
47 | }; | 32 | }; |
48 | }; | 33 | }; |
49 | }; | 34 | }; |
50 | }; | 35 | }; |
36 | |||
37 | &{/display@feb00000/ports} { | ||
38 | port@1 { | ||
39 | endpoint { | ||
40 | remote-endpoint = <&lvds0_input>; | ||
41 | }; | ||
42 | }; | ||
43 | }; | ||
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7795.dts b/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7795.dts index a1327443e6fa..16c2d03cb016 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7795.dts +++ b/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7795.dts | |||
@@ -7,44 +7,37 @@ | |||
7 | 7 | ||
8 | /dts-v1/; | 8 | /dts-v1/; |
9 | /plugin/; | 9 | /plugin/; |
10 | / { | ||
11 | fragment@0 { | ||
12 | target-path = "/soc"; | ||
13 | __overlay__ { | ||
14 | #address-cells = <2>; | ||
15 | #size-cells = <2>; | ||
16 | 10 | ||
17 | lvds@feb90000 { | 11 | &{/soc} { |
18 | compatible = "renesas,r8a7795-lvds"; | 12 | #address-cells = <2>; |
19 | reg = <0 0xfeb90000 0 0x14>; | 13 | #size-cells = <2>; |
20 | 14 | ||
21 | ports { | 15 | lvds@feb90000 { |
22 | #address-cells = <1>; | 16 | compatible = "renesas,r8a7795-lvds"; |
23 | #size-cells = <0>; | 17 | reg = <0 0xfeb90000 0 0x14>; |
24 | 18 | ||
25 | port@0 { | 19 | ports { |
26 | reg = <0>; | 20 | #address-cells = <1>; |
27 | lvds0_input: endpoint { | 21 | #size-cells = <0>; |
28 | }; | 22 | |
29 | }; | 23 | port@0 { |
30 | port@1 { | 24 | reg = <0>; |
31 | reg = <1>; | 25 | lvds0_input: endpoint { |
32 | lvds0_out: endpoint { | 26 | }; |
33 | }; | 27 | }; |
34 | }; | 28 | port@1 { |
29 | reg = <1>; | ||
30 | lvds0_out: endpoint { | ||
35 | }; | 31 | }; |
36 | }; | 32 | }; |
37 | }; | 33 | }; |
38 | }; | 34 | }; |
35 | }; | ||
39 | 36 | ||
40 | fragment@1 { | 37 | &{/soc/display@feb00000/ports} { |
41 | target-path = "/soc/display@feb00000/ports"; | 38 | port@3 { |
42 | __overlay__ { | 39 | endpoint { |
43 | port@3 { | 40 | remote-endpoint = <&lvds0_input>; |
44 | endpoint { | ||
45 | remote-endpoint = <&lvds0_input>; | ||
46 | }; | ||
47 | }; | ||
48 | }; | 41 | }; |
49 | }; | 42 | }; |
50 | }; | 43 | }; |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7796.dts b/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7796.dts index b23d6466c415..680e923ac036 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7796.dts +++ b/drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7796.dts | |||
@@ -7,44 +7,37 @@ | |||
7 | 7 | ||
8 | /dts-v1/; | 8 | /dts-v1/; |
9 | /plugin/; | 9 | /plugin/; |
10 | / { | ||
11 | fragment@0 { | ||
12 | target-path = "/soc"; | ||
13 | __overlay__ { | ||
14 | #address-cells = <2>; | ||
15 | #size-cells = <2>; | ||
16 | 10 | ||
17 | lvds@feb90000 { | 11 | &{/soc} { |
18 | compatible = "renesas,r8a7796-lvds"; | 12 | #address-cells = <2>; |
19 | reg = <0 0xfeb90000 0 0x14>; | 13 | #size-cells = <2>; |
20 | 14 | ||
21 | ports { | 15 | lvds@feb90000 { |
22 | #address-cells = <1>; | 16 | compatible = "renesas,r8a7796-lvds"; |
23 | #size-cells = <0>; | 17 | reg = <0 0xfeb90000 0 0x14>; |
24 | 18 | ||
25 | port@0 { | 19 | ports { |
26 | reg = <0>; | 20 | #address-cells = <1>; |
27 | lvds0_input: endpoint { | 21 | #size-cells = <0>; |
28 | }; | 22 | |
29 | }; | 23 | port@0 { |
30 | port@1 { | 24 | reg = <0>; |
31 | reg = <1>; | 25 | lvds0_input: endpoint { |
32 | lvds0_out: endpoint { | 26 | }; |
33 | }; | 27 | }; |
34 | }; | 28 | port@1 { |
29 | reg = <1>; | ||
30 | lvds0_out: endpoint { | ||
35 | }; | 31 | }; |
36 | }; | 32 | }; |
37 | }; | 33 | }; |
38 | }; | 34 | }; |
35 | }; | ||
39 | 36 | ||
40 | fragment@1 { | 37 | &{/soc/display@feb00000/ports} { |
41 | target-path = "/soc/display@feb00000/ports"; | 38 | port@3 { |
42 | __overlay__ { | 39 | endpoint { |
43 | port@3 { | 40 | remote-endpoint = <&lvds0_input>; |
44 | endpoint { | ||
45 | remote-endpoint = <&lvds0_input>; | ||
46 | }; | ||
47 | }; | ||
48 | }; | 41 | }; |
49 | }; | 42 | }; |
50 | }; | 43 | }; |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c index 39d5ae3fdf72..fa6b9aabc832 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c | |||
@@ -7,7 +7,6 @@ | |||
7 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) | 7 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) |
8 | */ | 8 | */ |
9 | 9 | ||
10 | #include <drm/drmP.h> | ||
11 | #include <drm/drm_atomic.h> | 10 | #include <drm/drm_atomic.h> |
12 | #include <drm/drm_atomic_helper.h> | 11 | #include <drm/drm_atomic_helper.h> |
13 | #include <drm/drm_crtc.h> | 12 | #include <drm/drm_crtc.h> |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.h b/drivers/gpu/drm/rcar-du/rcar_du_plane.h index 2f223a4c1d33..81bbf207ad0e 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_plane.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.h | |||
@@ -10,8 +10,7 @@ | |||
10 | #ifndef __RCAR_DU_PLANE_H__ | 10 | #ifndef __RCAR_DU_PLANE_H__ |
11 | #define __RCAR_DU_PLANE_H__ | 11 | #define __RCAR_DU_PLANE_H__ |
12 | 12 | ||
13 | #include <drm/drmP.h> | 13 | #include <drm/drm_plane.h> |
14 | #include <drm/drm_crtc.h> | ||
15 | 14 | ||
16 | struct rcar_du_format_info; | 15 | struct rcar_du_format_info; |
17 | struct rcar_du_group; | 16 | struct rcar_du_group; |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c index 4576119e7777..dec314a687e0 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c | |||
@@ -7,7 +7,6 @@ | |||
7 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) | 7 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) |
8 | */ | 8 | */ |
9 | 9 | ||
10 | #include <drm/drmP.h> | ||
11 | #include <drm/drm_atomic_helper.h> | 10 | #include <drm/drm_atomic_helper.h> |
12 | #include <drm/drm_crtc.h> | 11 | #include <drm/drm_crtc.h> |
13 | #include <drm/drm_crtc_helper.h> | 12 | #include <drm/drm_crtc_helper.h> |
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h index e8c14dc5cb93..db232037f24a 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h | |||
@@ -10,8 +10,7 @@ | |||
10 | #ifndef __RCAR_DU_VSP_H__ | 10 | #ifndef __RCAR_DU_VSP_H__ |
11 | #define __RCAR_DU_VSP_H__ | 11 | #define __RCAR_DU_VSP_H__ |
12 | 12 | ||
13 | #include <drm/drmP.h> | 13 | #include <drm/drm_plane.h> |
14 | #include <drm/drm_crtc.h> | ||
15 | 14 | ||
16 | struct rcar_du_format_info; | 15 | struct rcar_du_format_info; |
17 | struct rcar_du_vsp; | 16 | struct rcar_du_vsp; |
diff --git a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c index 790d499daa10..452461dc96f2 100644 --- a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c +++ b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/platform_device.h> | 12 | #include <linux/platform_device.h> |
13 | 13 | ||
14 | #include <drm/bridge/dw_hdmi.h> | 14 | #include <drm/bridge/dw_hdmi.h> |
15 | #include <drm/drm_modes.h> | ||
15 | 16 | ||
16 | #define RCAR_HDMI_PHY_OPMODE_PLLCFG 0x06 /* Mode of operation and PLL dividers */ | 17 | #define RCAR_HDMI_PHY_OPMODE_PLLCFG 0x06 /* Mode of operation and PLL dividers */ |
17 | #define RCAR_HDMI_PHY_PLLCURRGMPCTRL 0x10 /* PLL current and Gmp (conductance) */ | 18 | #define RCAR_HDMI_PHY_PLLCURRGMPCTRL 0x10 /* PLL current and Gmp (conductance) */ |
@@ -36,6 +37,20 @@ static const struct rcar_hdmi_phy_params rcar_hdmi_phy_params[] = { | |||
36 | { ~0UL, 0x0000, 0x0000, 0x0000 }, | 37 | { ~0UL, 0x0000, 0x0000, 0x0000 }, |
37 | }; | 38 | }; |
38 | 39 | ||
40 | static enum drm_mode_status | ||
41 | rcar_hdmi_mode_valid(struct drm_connector *connector, | ||
42 | const struct drm_display_mode *mode) | ||
43 | { | ||
44 | /* | ||
45 | * The maximum supported clock frequency is 297 MHz, as shown in the PHY | ||
46 | * parameters table. | ||
47 | */ | ||
48 | if (mode->clock > 297000) | ||
49 | return MODE_CLOCK_HIGH; | ||
50 | |||
51 | return MODE_OK; | ||
52 | } | ||
53 | |||
39 | static int rcar_hdmi_phy_configure(struct dw_hdmi *hdmi, | 54 | static int rcar_hdmi_phy_configure(struct dw_hdmi *hdmi, |
40 | const struct dw_hdmi_plat_data *pdata, | 55 | const struct dw_hdmi_plat_data *pdata, |
41 | unsigned long mpixelclock) | 56 | unsigned long mpixelclock) |
@@ -60,6 +75,7 @@ static int rcar_hdmi_phy_configure(struct dw_hdmi *hdmi, | |||
60 | } | 75 | } |
61 | 76 | ||
62 | static const struct dw_hdmi_plat_data rcar_dw_hdmi_plat_data = { | 77 | static const struct dw_hdmi_plat_data rcar_dw_hdmi_plat_data = { |
78 | .mode_valid = rcar_hdmi_mode_valid, | ||
63 | .configure_phy = rcar_hdmi_phy_configure, | 79 | .configure_phy = rcar_hdmi_phy_configure, |
64 | }; | 80 | }; |
65 | 81 | ||
diff --git a/drivers/gpu/drm/rcar-du/rcar_lvds.c b/drivers/gpu/drm/rcar-du/rcar_lvds.c index 534a128a869d..96d749a35b25 100644 --- a/drivers/gpu/drm/rcar-du/rcar_lvds.c +++ b/drivers/gpu/drm/rcar-du/rcar_lvds.c | |||
@@ -520,8 +520,8 @@ static void rcar_lvds_get_lvds_mode(struct rcar_lvds *lvds) | |||
520 | } | 520 | } |
521 | 521 | ||
522 | static void rcar_lvds_mode_set(struct drm_bridge *bridge, | 522 | static void rcar_lvds_mode_set(struct drm_bridge *bridge, |
523 | struct drm_display_mode *mode, | 523 | const struct drm_display_mode *mode, |
524 | struct drm_display_mode *adjusted_mode) | 524 | const struct drm_display_mode *adjusted_mode) |
525 | { | 525 | { |
526 | struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); | 526 | struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); |
527 | 527 | ||
@@ -785,6 +785,7 @@ static const struct rcar_lvds_device_info rcar_lvds_r8a77995_info = { | |||
785 | 785 | ||
786 | static const struct of_device_id rcar_lvds_of_table[] = { | 786 | static const struct of_device_id rcar_lvds_of_table[] = { |
787 | { .compatible = "renesas,r8a7743-lvds", .data = &rcar_lvds_gen2_info }, | 787 | { .compatible = "renesas,r8a7743-lvds", .data = &rcar_lvds_gen2_info }, |
788 | { .compatible = "renesas,r8a774c0-lvds", .data = &rcar_lvds_r8a77990_info }, | ||
788 | { .compatible = "renesas,r8a7790-lvds", .data = &rcar_lvds_r8a7790_info }, | 789 | { .compatible = "renesas,r8a7790-lvds", .data = &rcar_lvds_r8a7790_info }, |
789 | { .compatible = "renesas,r8a7791-lvds", .data = &rcar_lvds_gen2_info }, | 790 | { .compatible = "renesas,r8a7791-lvds", .data = &rcar_lvds_gen2_info }, |
790 | { .compatible = "renesas,r8a7793-lvds", .data = &rcar_lvds_gen2_info }, | 791 | { .compatible = "renesas,r8a7793-lvds", .data = &rcar_lvds_gen2_info }, |
diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c index 7ee359bcee62..ef8486e5e2cd 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | |||
@@ -467,7 +467,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data) | |||
467 | } | 467 | } |
468 | 468 | ||
469 | static int | 469 | static int |
470 | dw_mipi_dsi_get_lane_mbps(void *priv_data, struct drm_display_mode *mode, | 470 | dw_mipi_dsi_get_lane_mbps(void *priv_data, const struct drm_display_mode *mode, |
471 | unsigned long mode_flags, u32 lanes, u32 format, | 471 | unsigned long mode_flags, u32 lanes, u32 format, |
472 | unsigned int *lane_mbps) | 472 | unsigned int *lane_mbps) |
473 | { | 473 | { |
diff --git a/drivers/gpu/drm/shmobile/shmob_drm_drv.c b/drivers/gpu/drm/shmobile/shmob_drm_drv.c index 8554102a6ead..f2cfd1698b78 100644 --- a/drivers/gpu/drm/shmobile/shmob_drm_drv.c +++ b/drivers/gpu/drm/shmobile/shmob_drm_drv.c | |||
@@ -229,8 +229,8 @@ static int shmob_drm_probe(struct platform_device *pdev) | |||
229 | 229 | ||
230 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 230 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
231 | sdev->mmio = devm_ioremap_resource(&pdev->dev, res); | 231 | sdev->mmio = devm_ioremap_resource(&pdev->dev, res); |
232 | if (sdev->mmio == NULL) | 232 | if (IS_ERR(sdev->mmio)) |
233 | return -ENOMEM; | 233 | return PTR_ERR(sdev->mmio); |
234 | 234 | ||
235 | ret = shmob_drm_setup_clocks(sdev, pdata->clk_source); | 235 | ret = shmob_drm_setup_clocks(sdev, pdata->clk_source); |
236 | if (ret < 0) | 236 | if (ret < 0) |
diff --git a/drivers/gpu/drm/sti/sti_dvo.c b/drivers/gpu/drm/sti/sti_dvo.c index b08376b7611b..6d33772f77eb 100644 --- a/drivers/gpu/drm/sti/sti_dvo.c +++ b/drivers/gpu/drm/sti/sti_dvo.c | |||
@@ -277,8 +277,8 @@ static void sti_dvo_pre_enable(struct drm_bridge *bridge) | |||
277 | } | 277 | } |
278 | 278 | ||
279 | static void sti_dvo_set_mode(struct drm_bridge *bridge, | 279 | static void sti_dvo_set_mode(struct drm_bridge *bridge, |
280 | struct drm_display_mode *mode, | 280 | const struct drm_display_mode *mode, |
281 | struct drm_display_mode *adjusted_mode) | 281 | const struct drm_display_mode *adjusted_mode) |
282 | { | 282 | { |
283 | struct sti_dvo *dvo = bridge->driver_private; | 283 | struct sti_dvo *dvo = bridge->driver_private; |
284 | struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc); | 284 | struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc); |
diff --git a/drivers/gpu/drm/sti/sti_hda.c b/drivers/gpu/drm/sti/sti_hda.c index 19b9b5ed1297..a63dd5eb7081 100644 --- a/drivers/gpu/drm/sti/sti_hda.c +++ b/drivers/gpu/drm/sti/sti_hda.c | |||
@@ -508,8 +508,8 @@ static void sti_hda_pre_enable(struct drm_bridge *bridge) | |||
508 | } | 508 | } |
509 | 509 | ||
510 | static void sti_hda_set_mode(struct drm_bridge *bridge, | 510 | static void sti_hda_set_mode(struct drm_bridge *bridge, |
511 | struct drm_display_mode *mode, | 511 | const struct drm_display_mode *mode, |
512 | struct drm_display_mode *adjusted_mode) | 512 | const struct drm_display_mode *adjusted_mode) |
513 | { | 513 | { |
514 | struct sti_hda *hda = bridge->driver_private; | 514 | struct sti_hda *hda = bridge->driver_private; |
515 | u32 mode_idx; | 515 | u32 mode_idx; |
diff --git a/drivers/gpu/drm/sti/sti_hdmi.c b/drivers/gpu/drm/sti/sti_hdmi.c index 4b86878f8ddf..458fcb5a93f2 100644 --- a/drivers/gpu/drm/sti/sti_hdmi.c +++ b/drivers/gpu/drm/sti/sti_hdmi.c | |||
@@ -918,8 +918,8 @@ static void sti_hdmi_pre_enable(struct drm_bridge *bridge) | |||
918 | } | 918 | } |
919 | 919 | ||
920 | static void sti_hdmi_set_mode(struct drm_bridge *bridge, | 920 | static void sti_hdmi_set_mode(struct drm_bridge *bridge, |
921 | struct drm_display_mode *mode, | 921 | const struct drm_display_mode *mode, |
922 | struct drm_display_mode *adjusted_mode) | 922 | const struct drm_display_mode *adjusted_mode) |
923 | { | 923 | { |
924 | struct sti_hdmi *hdmi = bridge->driver_private; | 924 | struct sti_hdmi *hdmi = bridge->driver_private; |
925 | int ret; | 925 | int ret; |
diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c index a514b593f37c..a672b59a2226 100644 --- a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c +++ b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | |||
@@ -215,7 +215,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data) | |||
215 | } | 215 | } |
216 | 216 | ||
217 | static int | 217 | static int |
218 | dw_mipi_dsi_get_lane_mbps(void *priv_data, struct drm_display_mode *mode, | 218 | dw_mipi_dsi_get_lane_mbps(void *priv_data, const struct drm_display_mode *mode, |
219 | unsigned long mode_flags, u32 lanes, u32 format, | 219 | unsigned long mode_flags, u32 lanes, u32 format, |
220 | unsigned int *lane_mbps) | 220 | unsigned int *lane_mbps) |
221 | { | 221 | { |
diff --git a/include/drm/bridge/dw_mipi_dsi.h b/include/drm/bridge/dw_mipi_dsi.h index 48a671e782ca..7d3dd69a5caa 100644 --- a/include/drm/bridge/dw_mipi_dsi.h +++ b/include/drm/bridge/dw_mipi_dsi.h | |||
@@ -14,7 +14,8 @@ struct dw_mipi_dsi; | |||
14 | 14 | ||
15 | struct dw_mipi_dsi_phy_ops { | 15 | struct dw_mipi_dsi_phy_ops { |
16 | int (*init)(void *priv_data); | 16 | int (*init)(void *priv_data); |
17 | int (*get_lane_mbps)(void *priv_data, struct drm_display_mode *mode, | 17 | int (*get_lane_mbps)(void *priv_data, |
18 | const struct drm_display_mode *mode, | ||
18 | unsigned long mode_flags, u32 lanes, u32 format, | 19 | unsigned long mode_flags, u32 lanes, u32 format, |
19 | unsigned int *lane_mbps); | 20 | unsigned int *lane_mbps); |
20 | }; | 21 | }; |
diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge.h index bd850747ce54..9da8c93f7976 100644 --- a/include/drm/drm_bridge.h +++ b/include/drm/drm_bridge.h | |||
@@ -196,8 +196,8 @@ struct drm_bridge_funcs { | |||
196 | * the DRM framework will have to be extended with DRM bridge states. | 196 | * the DRM framework will have to be extended with DRM bridge states. |
197 | */ | 197 | */ |
198 | void (*mode_set)(struct drm_bridge *bridge, | 198 | void (*mode_set)(struct drm_bridge *bridge, |
199 | struct drm_display_mode *mode, | 199 | const struct drm_display_mode *mode, |
200 | struct drm_display_mode *adjusted_mode); | 200 | const struct drm_display_mode *adjusted_mode); |
201 | /** | 201 | /** |
202 | * @pre_enable: | 202 | * @pre_enable: |
203 | * | 203 | * |
@@ -310,8 +310,8 @@ enum drm_mode_status drm_bridge_mode_valid(struct drm_bridge *bridge, | |||
310 | void drm_bridge_disable(struct drm_bridge *bridge); | 310 | void drm_bridge_disable(struct drm_bridge *bridge); |
311 | void drm_bridge_post_disable(struct drm_bridge *bridge); | 311 | void drm_bridge_post_disable(struct drm_bridge *bridge); |
312 | void drm_bridge_mode_set(struct drm_bridge *bridge, | 312 | void drm_bridge_mode_set(struct drm_bridge *bridge, |
313 | struct drm_display_mode *mode, | 313 | const struct drm_display_mode *mode, |
314 | struct drm_display_mode *adjusted_mode); | 314 | const struct drm_display_mode *adjusted_mode); |
315 | void drm_bridge_pre_enable(struct drm_bridge *bridge); | 315 | void drm_bridge_pre_enable(struct drm_bridge *bridge); |
316 | void drm_bridge_enable(struct drm_bridge *bridge); | 316 | void drm_bridge_enable(struct drm_bridge *bridge); |
317 | 317 | ||