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-rw-r--r--arch/m68k/Kconfig.bus8
-rw-r--r--arch/m68k/coldfire/pci.c114
-rw-r--r--arch/m68k/include/asm/atarihw.h1
-rw-r--r--arch/m68k/include/asm/io.h10
-rw-r--r--arch/m68k/include/asm/io_mm.h98
-rw-r--r--arch/m68k/include/asm/io_no.h253
-rw-r--r--arch/m68k/include/asm/kmap.h80
-rw-r--r--arch/m68k/include/asm/nubus.h1
-rw-r--r--arch/m68k/include/asm/q40_master.h2
-rw-r--r--arch/m68k/include/asm/raw_io.h14
-rw-r--r--arch/m68k/include/asm/vga.h9
-rw-r--r--arch/m68k/include/asm/virtconvert.h2
-rw-r--r--arch/m68k/include/asm/zorro.h1
-rw-r--r--arch/m68k/mm/kmap.c8
14 files changed, 230 insertions, 371 deletions
diff --git a/arch/m68k/Kconfig.bus b/arch/m68k/Kconfig.bus
index d5e66ec136db..aef698fa50e5 100644
--- a/arch/m68k/Kconfig.bus
+++ b/arch/m68k/Kconfig.bus
@@ -59,6 +59,10 @@ config ATARI_ROM_ISA
59config GENERIC_ISA_DMA 59config GENERIC_ISA_DMA
60 def_bool ISA 60 def_bool ISA
61 61
62source "drivers/zorro/Kconfig"
63
64endif
65
62config PCI 66config PCI
63 bool "PCI support" 67 bool "PCI support"
64 depends on M54xx 68 depends on M54xx
@@ -66,10 +70,8 @@ config PCI
66 Enable the PCI bus. Support for the PCI bus hardware built into the 70 Enable the PCI bus. Support for the PCI bus hardware built into the
67 ColdFire 547x and 548x processors. 71 ColdFire 547x and 548x processors.
68 72
73if PCI
69source "drivers/pci/Kconfig" 74source "drivers/pci/Kconfig"
70
71source "drivers/zorro/Kconfig"
72
73endif 75endif
74 76
75if !MMU 77if !MMU
diff --git a/arch/m68k/coldfire/pci.c b/arch/m68k/coldfire/pci.c
index 3097fa2ca746..62b0eb6cf69a 100644
--- a/arch/m68k/coldfire/pci.c
+++ b/arch/m68k/coldfire/pci.c
@@ -23,20 +23,10 @@
23 23
24/* 24/*
25 * Memory and IO mappings. We use a 1:1 mapping for local host memory to 25 * Memory and IO mappings. We use a 1:1 mapping for local host memory to
26 * PCI bus memory (no reason not to really). IO space doesn't matter, we 26 * PCI bus memory (no reason not to really). IO space is mapped in its own
27 * always use access functions for that. The device configuration space is 27 * separate address region. The device configuration space is mapped over
28 * mapped over the IO map space when we enable it in the PCICAR register. 28 * the IO map space when we enable it in the PCICAR register.
29 */ 29 */
30#define PCI_MEM_PA 0xf0000000 /* Host physical address */
31#define PCI_MEM_BA 0xf0000000 /* Bus physical address */
32#define PCI_MEM_SIZE 0x08000000 /* 128 MB */
33#define PCI_MEM_MASK (PCI_MEM_SIZE - 1)
34
35#define PCI_IO_PA 0xf8000000 /* Host physical address */
36#define PCI_IO_BA 0x00000000 /* Bus physical address */
37#define PCI_IO_SIZE 0x00010000 /* 64k */
38#define PCI_IO_MASK (PCI_IO_SIZE - 1)
39
40static struct pci_bus *rootbus; 30static struct pci_bus *rootbus;
41static unsigned long iospace; 31static unsigned long iospace;
42 32
@@ -56,13 +46,6 @@ static unsigned char mcf_host_irq[] = {
56 0, 69, 69, 71, 71, 46 0, 69, 69, 71, 71,
57}; 47};
58 48
59
60static inline void syncio(void)
61{
62 /* The ColdFire "nop" instruction waits for all bus IO to complete */
63 __asm__ __volatile__ ("nop");
64}
65
66/* 49/*
67 * Configuration space access functions. Configuration space access is 50 * Configuration space access functions. Configuration space access is
68 * through the IO mapping window, enabling it via the PCICAR register. 51 * through the IO mapping window, enabling it via the PCICAR register.
@@ -84,9 +67,9 @@ static int mcf_pci_readconfig(struct pci_bus *bus, unsigned int devfn,
84 return PCIBIOS_SUCCESSFUL; 67 return PCIBIOS_SUCCESSFUL;
85 } 68 }
86 69
87 syncio();
88 addr = mcf_mk_pcicar(bus->number, devfn, where); 70 addr = mcf_mk_pcicar(bus->number, devfn, where);
89 __raw_writel(PCICAR_E | addr, PCICAR); 71 __raw_writel(PCICAR_E | addr, PCICAR);
72 __raw_readl(PCICAR);
90 addr = iospace + (where & 0x3); 73 addr = iospace + (where & 0x3);
91 74
92 switch (size) { 75 switch (size) {
@@ -101,8 +84,8 @@ static int mcf_pci_readconfig(struct pci_bus *bus, unsigned int devfn,
101 break; 84 break;
102 } 85 }
103 86
104 syncio();
105 __raw_writel(0, PCICAR); 87 __raw_writel(0, PCICAR);
88 __raw_readl(PCICAR);
106 return PCIBIOS_SUCCESSFUL; 89 return PCIBIOS_SUCCESSFUL;
107} 90}
108 91
@@ -116,9 +99,9 @@ static int mcf_pci_writeconfig(struct pci_bus *bus, unsigned int devfn,
116 return PCIBIOS_SUCCESSFUL; 99 return PCIBIOS_SUCCESSFUL;
117 } 100 }
118 101
119 syncio();
120 addr = mcf_mk_pcicar(bus->number, devfn, where); 102 addr = mcf_mk_pcicar(bus->number, devfn, where);
121 __raw_writel(PCICAR_E | addr, PCICAR); 103 __raw_writel(PCICAR_E | addr, PCICAR);
104 __raw_readl(PCICAR);
122 addr = iospace + (where & 0x3); 105 addr = iospace + (where & 0x3);
123 106
124 switch (size) { 107 switch (size) {
@@ -133,8 +116,8 @@ static int mcf_pci_writeconfig(struct pci_bus *bus, unsigned int devfn,
133 break; 116 break;
134 } 117 }
135 118
136 syncio();
137 __raw_writel(0, PCICAR); 119 __raw_writel(0, PCICAR);
120 __raw_readl(PCICAR);
138 return PCIBIOS_SUCCESSFUL; 121 return PCIBIOS_SUCCESSFUL;
139} 122}
140 123
@@ -144,89 +127,6 @@ static struct pci_ops mcf_pci_ops = {
144}; 127};
145 128
146/* 129/*
147 * IO address space access functions. Pretty strait forward, these are
148 * directly mapped in to the IO mapping window. And that is mapped into
149 * virtual address space.
150 */
151u8 mcf_pci_inb(u32 addr)
152{
153 return __raw_readb(iospace + (addr & PCI_IO_MASK));
154}
155EXPORT_SYMBOL(mcf_pci_inb);
156
157u16 mcf_pci_inw(u32 addr)
158{
159 return le16_to_cpu(__raw_readw(iospace + (addr & PCI_IO_MASK)));
160}
161EXPORT_SYMBOL(mcf_pci_inw);
162
163u32 mcf_pci_inl(u32 addr)
164{
165 return le32_to_cpu(__raw_readl(iospace + (addr & PCI_IO_MASK)));
166}
167EXPORT_SYMBOL(mcf_pci_inl);
168
169void mcf_pci_insb(u32 addr, u8 *buf, u32 len)
170{
171 for (; len; len--)
172 *buf++ = mcf_pci_inb(addr);
173}
174EXPORT_SYMBOL(mcf_pci_insb);
175
176void mcf_pci_insw(u32 addr, u16 *buf, u32 len)
177{
178 for (; len; len--)
179 *buf++ = mcf_pci_inw(addr);
180}
181EXPORT_SYMBOL(mcf_pci_insw);
182
183void mcf_pci_insl(u32 addr, u32 *buf, u32 len)
184{
185 for (; len; len--)
186 *buf++ = mcf_pci_inl(addr);
187}
188EXPORT_SYMBOL(mcf_pci_insl);
189
190void mcf_pci_outb(u8 v, u32 addr)
191{
192 __raw_writeb(v, iospace + (addr & PCI_IO_MASK));
193}
194EXPORT_SYMBOL(mcf_pci_outb);
195
196void mcf_pci_outw(u16 v, u32 addr)
197{
198 __raw_writew(cpu_to_le16(v), iospace + (addr & PCI_IO_MASK));
199}
200EXPORT_SYMBOL(mcf_pci_outw);
201
202void mcf_pci_outl(u32 v, u32 addr)
203{
204 __raw_writel(cpu_to_le32(v), iospace + (addr & PCI_IO_MASK));
205}
206EXPORT_SYMBOL(mcf_pci_outl);
207
208void mcf_pci_outsb(u32 addr, const u8 *buf, u32 len)
209{
210 for (; len; len--)
211 mcf_pci_outb(*buf++, addr);
212}
213EXPORT_SYMBOL(mcf_pci_outsb);
214
215void mcf_pci_outsw(u32 addr, const u16 *buf, u32 len)
216{
217 for (; len; len--)
218 mcf_pci_outw(*buf++, addr);
219}
220EXPORT_SYMBOL(mcf_pci_outsw);
221
222void mcf_pci_outsl(u32 addr, const u32 *buf, u32 len)
223{
224 for (; len; len--)
225 mcf_pci_outl(*buf++, addr);
226}
227EXPORT_SYMBOL(mcf_pci_outsl);
228
229/*
230 * Initialize the PCI bus registers, and scan the bus. 130 * Initialize the PCI bus registers, and scan the bus.
231 */ 131 */
232static struct resource mcf_pci_mem = { 132static struct resource mcf_pci_mem = {
diff --git a/arch/m68k/include/asm/atarihw.h b/arch/m68k/include/asm/atarihw.h
index 972c8f33f055..9000b249d225 100644
--- a/arch/m68k/include/asm/atarihw.h
+++ b/arch/m68k/include/asm/atarihw.h
@@ -23,6 +23,7 @@
23#include <linux/types.h> 23#include <linux/types.h>
24#include <asm/bootinfo-atari.h> 24#include <asm/bootinfo-atari.h>
25#include <asm/raw_io.h> 25#include <asm/raw_io.h>
26#include <asm/kmap.h>
26 27
27extern u_long atari_mch_cookie; 28extern u_long atari_mch_cookie;
28extern u_long atari_mch_type; 29extern u_long atari_mch_type;
diff --git a/arch/m68k/include/asm/io.h b/arch/m68k/include/asm/io.h
index 756089cc019c..ca2849afb087 100644
--- a/arch/m68k/include/asm/io.h
+++ b/arch/m68k/include/asm/io.h
@@ -1,14 +1,6 @@
1/* SPDX-License-Identifier: GPL-2.0 */ 1/* SPDX-License-Identifier: GPL-2.0 */
2#ifdef __uClinux__ 2#if defined(__uClinux__) || defined(CONFIG_COLDFIRE)
3#include <asm/io_no.h> 3#include <asm/io_no.h>
4#else 4#else
5#include <asm/io_mm.h> 5#include <asm/io_mm.h>
6#endif 6#endif
7
8#define readb_relaxed(addr) readb(addr)
9#define readw_relaxed(addr) readw(addr)
10#define readl_relaxed(addr) readl(addr)
11
12#define writeb_relaxed(b, addr) writeb(b, addr)
13#define writew_relaxed(b, addr) writew(b, addr)
14#define writel_relaxed(b, addr) writel(b, addr)
diff --git a/arch/m68k/include/asm/io_mm.h b/arch/m68k/include/asm/io_mm.h
index ed5333e87879..fe485f4f5fac 100644
--- a/arch/m68k/include/asm/io_mm.h
+++ b/arch/m68k/include/asm/io_mm.h
@@ -26,6 +26,7 @@
26#include <linux/compiler.h> 26#include <linux/compiler.h>
27#include <asm/raw_io.h> 27#include <asm/raw_io.h>
28#include <asm/virtconvert.h> 28#include <asm/virtconvert.h>
29#include <asm/kmap.h>
29 30
30#include <asm-generic/iomap.h> 31#include <asm-generic/iomap.h>
31 32
@@ -85,53 +86,7 @@
85#endif /* ATARI_ROM_ISA */ 86#endif /* ATARI_ROM_ISA */
86 87
87 88
88#if defined(CONFIG_PCI) && defined(CONFIG_COLDFIRE) 89#if defined(CONFIG_ISA) || defined(CONFIG_ATARI_ROM_ISA)
89
90#define HAVE_ARCH_PIO_SIZE
91#define PIO_OFFSET 0
92#define PIO_MASK 0xffff
93#define PIO_RESERVED 0x10000
94
95u8 mcf_pci_inb(u32 addr);
96u16 mcf_pci_inw(u32 addr);
97u32 mcf_pci_inl(u32 addr);
98void mcf_pci_insb(u32 addr, u8 *buf, u32 len);
99void mcf_pci_insw(u32 addr, u16 *buf, u32 len);
100void mcf_pci_insl(u32 addr, u32 *buf, u32 len);
101
102void mcf_pci_outb(u8 v, u32 addr);
103void mcf_pci_outw(u16 v, u32 addr);
104void mcf_pci_outl(u32 v, u32 addr);
105void mcf_pci_outsb(u32 addr, const u8 *buf, u32 len);
106void mcf_pci_outsw(u32 addr, const u16 *buf, u32 len);
107void mcf_pci_outsl(u32 addr, const u32 *buf, u32 len);
108
109#define inb mcf_pci_inb
110#define inb_p mcf_pci_inb
111#define inw mcf_pci_inw
112#define inw_p mcf_pci_inw
113#define inl mcf_pci_inl
114#define inl_p mcf_pci_inl
115#define insb mcf_pci_insb
116#define insw mcf_pci_insw
117#define insl mcf_pci_insl
118
119#define outb mcf_pci_outb
120#define outb_p mcf_pci_outb
121#define outw mcf_pci_outw
122#define outw_p mcf_pci_outw
123#define outl mcf_pci_outl
124#define outl_p mcf_pci_outl
125#define outsb mcf_pci_outsb
126#define outsw mcf_pci_outsw
127#define outsl mcf_pci_outsl
128
129#define readb(addr) in_8(addr)
130#define writeb(v, addr) out_8((addr), (v))
131#define readw(addr) in_le16(addr)
132#define writew(v, addr) out_le16((addr), (v))
133
134#elif defined(CONFIG_ISA) || defined(CONFIG_ATARI_ROM_ISA)
135 90
136#if MULTI_ISA == 0 91#if MULTI_ISA == 0
137#undef MULTI_ISA 92#undef MULTI_ISA
@@ -414,8 +369,7 @@ static inline void isa_delay(void)
414#define writew(val, addr) out_le16((addr), (val)) 369#define writew(val, addr) out_le16((addr), (val))
415#endif /* CONFIG_ATARI_ROM_ISA */ 370#endif /* CONFIG_ATARI_ROM_ISA */
416 371
417#if !defined(CONFIG_ISA) && !defined(CONFIG_ATARI_ROM_ISA) && \ 372#if !defined(CONFIG_ISA) && !defined(CONFIG_ATARI_ROM_ISA)
418 !(defined(CONFIG_PCI) && defined(CONFIG_COLDFIRE))
419/* 373/*
420 * We need to define dummy functions for GENERIC_IOMAP support. 374 * We need to define dummy functions for GENERIC_IOMAP support.
421 */ 375 */
@@ -461,39 +415,6 @@ static inline void isa_delay(void)
461 415
462#define mmiowb() 416#define mmiowb()
463 417
464static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
465{
466 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
467}
468static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)
469{
470 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
471}
472#define ioremap_uc ioremap_nocache
473static inline void __iomem *ioremap_wt(unsigned long physaddr,
474 unsigned long size)
475{
476 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
477}
478static inline void __iomem *ioremap_fullcache(unsigned long physaddr,
479 unsigned long size)
480{
481 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
482}
483
484static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
485{
486 __builtin_memset((void __force *) addr, val, count);
487}
488static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
489{
490 __builtin_memcpy(dst, (void __force *) src, count);
491}
492static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
493{
494 __builtin_memcpy((void __force *) dst, src, count);
495}
496
497#ifndef CONFIG_SUN3 418#ifndef CONFIG_SUN3
498#define IO_SPACE_LIMIT 0xffff 419#define IO_SPACE_LIMIT 0xffff
499#else 420#else
@@ -515,13 +436,12 @@ static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int
515 */ 436 */
516#define xlate_dev_kmem_ptr(p) p 437#define xlate_dev_kmem_ptr(p) p
517 438
518static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) 439#define readb_relaxed(addr) readb(addr)
519{ 440#define readw_relaxed(addr) readw(addr)
520 return (void __iomem *) port; 441#define readl_relaxed(addr) readl(addr)
521}
522 442
523static inline void ioport_unmap(void __iomem *p) 443#define writeb_relaxed(b, addr) writeb(b, addr)
524{ 444#define writew_relaxed(b, addr) writew(b, addr)
525} 445#define writel_relaxed(b, addr) writel(b, addr)
526 446
527#endif /* _IO_H */ 447#endif /* _IO_H */
diff --git a/arch/m68k/include/asm/io_no.h b/arch/m68k/include/asm/io_no.h
index 86f45b403bcc..83a0a6d449f4 100644
--- a/arch/m68k/include/asm/io_no.h
+++ b/arch/m68k/include/asm/io_no.h
@@ -2,191 +2,148 @@
2#ifndef _M68KNOMMU_IO_H 2#ifndef _M68KNOMMU_IO_H
3#define _M68KNOMMU_IO_H 3#define _M68KNOMMU_IO_H
4 4
5#ifdef __KERNEL__
6
7#define ARCH_HAS_IOREMAP_WT
8
9#include <asm/virtconvert.h>
10#include <asm-generic/iomap.h>
11
12/* 5/*
13 * These are for ISA/PCI shared memory _only_ and should never be used 6 * Convert a physical memory address into a IO memory address.
14 * on any other type of memory, including Zorro memory. They are meant to 7 * For us this is trivially a type cast.
15 * access the bus in the bus byte order which is little-endian!.
16 *
17 * readX/writeX() are used to access memory mapped devices. On some
18 * architectures the memory mapped IO stuff needs to be accessed
19 * differently. On the m68k architecture, we just read/write the
20 * memory location directly.
21 */
22/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
23 * two accesses to memory, which may be undesirable for some devices.
24 */ 8 */
9#define iomem(a) ((void __iomem *) (a))
25 10
26/* 11/*
27 * swap functions are sometimes needed to interface little-endian hardware 12 * The non-MMU m68k and ColdFire IO and memory mapped hardware access
13 * functions have always worked in CPU native endian. We need to define
14 * that behavior here first before we include asm-generic/io.h.
28 */ 15 */
29static inline unsigned short _swapw(volatile unsigned short v) 16#define __raw_readb(addr) \
30{
31 return ((v << 8) | (v >> 8));
32}
33
34static inline unsigned int _swapl(volatile unsigned long v)
35{
36 return ((v << 24) | ((v & 0xff00) << 8) | ((v & 0xff0000) >> 8) | (v >> 24));
37}
38
39#define readb(addr) \
40 ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; }) 17 ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })
41#define readw(addr) \ 18#define __raw_readw(addr) \
42 ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; }) 19 ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })
43#define readl(addr) \ 20#define __raw_readl(addr) \
44 ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; }) 21 ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })
45 22
46#define writeb(b,addr) (void)((*(volatile unsigned char *) (addr)) = (b)) 23#define __raw_writeb(b, addr) (void)((*(volatile unsigned char *) (addr)) = (b))
47#define writew(b,addr) (void)((*(volatile unsigned short *) (addr)) = (b)) 24#define __raw_writew(b, addr) (void)((*(volatile unsigned short *) (addr)) = (b))
48#define writel(b,addr) (void)((*(volatile unsigned int *) (addr)) = (b)) 25#define __raw_writel(b, addr) (void)((*(volatile unsigned int *) (addr)) = (b))
49 26
50#define __raw_readb readb 27#if defined(CONFIG_COLDFIRE)
51#define __raw_readw readw 28/*
52#define __raw_readl readl 29 * For ColdFire platforms we may need to do some extra checks for what
53#define __raw_writeb writeb 30 * type of address range we are accessing. Include the ColdFire platform
54#define __raw_writew writew 31 * definitions so we can figure out if need to do something special.
55#define __raw_writel writel 32 */
33#include <asm/byteorder.h>
34#include <asm/coldfire.h>
35#include <asm/mcfsim.h>
36#endif /* CONFIG_COLDFIRE */
56 37
57static inline void io_outsb(unsigned int addr, const void *buf, int len) 38#if defined(IOMEMBASE)
39/*
40 * The ColdFire SoC internal peripherals are mapped into virtual address
41 * space using the ACR registers of the cache control unit. This means we
42 * are using a 1:1 physical:virtual mapping for them. We can quickly
43 * determine if we are accessing an internal peripheral device given the
44 * physical or vitrual address using the same range check. This check logic
45 * applies just the same of there is no MMU but something like a PCI bus
46 * is present.
47 */
48static int __cf_internalio(unsigned long addr)
58{ 49{
59 volatile unsigned char *ap = (volatile unsigned char *) addr; 50 return (addr >= IOMEMBASE) && (addr <= IOMEMBASE + IOMEMSIZE - 1);
60 unsigned char *bp = (unsigned char *) buf;
61 while (len--)
62 *ap = *bp++;
63} 51}
64 52
65static inline void io_outsw(unsigned int addr, const void *buf, int len) 53static int cf_internalio(const volatile void __iomem *addr)
66{ 54{
67 volatile unsigned short *ap = (volatile unsigned short *) addr; 55 return __cf_internalio((unsigned long) addr);
68 unsigned short *bp = (unsigned short *) buf;
69 while (len--)
70 *ap = _swapw(*bp++);
71} 56}
72 57
73static inline void io_outsl(unsigned int addr, const void *buf, int len) 58/*
59 * We need to treat built-in peripherals and bus based address ranges
60 * differently. Local built-in peripherals (and the ColdFire SoC parts
61 * have quite a lot of them) are always native endian - which is big
62 * endian on m68k/ColdFire. Bus based address ranges, like the PCI bus,
63 * are accessed little endian - so we need to byte swap those.
64 */
65#define readw readw
66static inline u16 readw(const volatile void __iomem *addr)
74{ 67{
75 volatile unsigned int *ap = (volatile unsigned int *) addr; 68 if (cf_internalio(addr))
76 unsigned int *bp = (unsigned int *) buf; 69 return __raw_readw(addr);
77 while (len--) 70 return __le16_to_cpu(__raw_readw(addr));
78 *ap = _swapl(*bp++);
79} 71}
80 72
81static inline void io_insb(unsigned int addr, void *buf, int len) 73#define readl readl
74static inline u32 readl(const volatile void __iomem *addr)
82{ 75{
83 volatile unsigned char *ap = (volatile unsigned char *) addr; 76 if (cf_internalio(addr))
84 unsigned char *bp = (unsigned char *) buf; 77 return __raw_readl(addr);
85 while (len--) 78 return __le32_to_cpu(__raw_readl(addr));
86 *bp++ = *ap;
87} 79}
88 80
89static inline void io_insw(unsigned int addr, void *buf, int len) 81#define writew writew
82static inline void writew(u16 value, volatile void __iomem *addr)
90{ 83{
91 volatile unsigned short *ap = (volatile unsigned short *) addr; 84 if (cf_internalio(addr))
92 unsigned short *bp = (unsigned short *) buf; 85 __raw_writew(value, addr);
93 while (len--) 86 else
94 *bp++ = _swapw(*ap); 87 __raw_writew(__cpu_to_le16(value), addr);
95} 88}
96 89
97static inline void io_insl(unsigned int addr, void *buf, int len) 90#define writel writel
91static inline void writel(u32 value, volatile void __iomem *addr)
98{ 92{
99 volatile unsigned int *ap = (volatile unsigned int *) addr; 93 if (cf_internalio(addr))
100 unsigned int *bp = (unsigned int *) buf; 94 __raw_writel(value, addr);
101 while (len--) 95 else
102 *bp++ = _swapl(*ap); 96 __raw_writel(__cpu_to_le32(value), addr);
103} 97}
104 98
105#define mmiowb() 99#else
106
107/*
108 * make the short names macros so specific devices
109 * can override them as required
110 */
111
112#define memset_io(a,b,c) memset((void *)(a),(b),(c))
113#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
114#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
115
116#define inb(addr) readb(addr)
117#define inw(addr) readw(addr)
118#define inl(addr) readl(addr)
119#define outb(x,addr) ((void) writeb(x,addr))
120#define outw(x,addr) ((void) writew(x,addr))
121#define outl(x,addr) ((void) writel(x,addr))
122
123#define inb_p(addr) inb(addr)
124#define inw_p(addr) inw(addr)
125#define inl_p(addr) inl(addr)
126#define outb_p(x,addr) outb(x,addr)
127#define outw_p(x,addr) outw(x,addr)
128#define outl_p(x,addr) outl(x,addr)
129 100
130#define outsb(a,b,l) io_outsb(a,b,l) 101#define readb __raw_readb
131#define outsw(a,b,l) io_outsw(a,b,l) 102#define readw __raw_readw
132#define outsl(a,b,l) io_outsl(a,b,l) 103#define readl __raw_readl
104#define writeb __raw_writeb
105#define writew __raw_writew
106#define writel __raw_writel
133 107
134#define insb(a,b,l) io_insb(a,b,l) 108#endif /* IOMEMBASE */
135#define insw(a,b,l) io_insw(a,b,l)
136#define insl(a,b,l) io_insl(a,b,l)
137
138#define IO_SPACE_LIMIT 0xffffffff
139
140
141/* Values for nocacheflag and cmode */
142#define IOMAP_FULL_CACHING 0
143#define IOMAP_NOCACHE_SER 1
144#define IOMAP_NOCACHE_NONSER 2
145#define IOMAP_WRITETHROUGH 3
146
147static inline void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
148{
149 return (void *) physaddr;
150}
151static inline void *ioremap(unsigned long physaddr, unsigned long size)
152{
153 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
154}
155static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
156{
157 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
158}
159static inline void *ioremap_wt(unsigned long physaddr, unsigned long size)
160{
161 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
162}
163static inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size)
164{
165 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
166}
167
168#define iounmap(addr) do { } while(0)
169 109
110#if defined(CONFIG_PCI)
170/* 111/*
171 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 112 * Support for PCI bus access uses the asm-generic access functions.
172 * access 113 * We need to supply the base address and masks for the normal memory
114 * and IO address space mappings.
173 */ 115 */
174#define xlate_dev_mem_ptr(p) __va(p) 116#define PCI_MEM_PA 0xf0000000 /* Host physical address */
117#define PCI_MEM_BA 0xf0000000 /* Bus physical address */
118#define PCI_MEM_SIZE 0x08000000 /* 128 MB */
119#define PCI_MEM_MASK (PCI_MEM_SIZE - 1)
120
121#define PCI_IO_PA 0xf8000000 /* Host physical address */
122#define PCI_IO_BA 0x00000000 /* Bus physical address */
123#define PCI_IO_SIZE 0x00010000 /* 64k */
124#define PCI_IO_MASK (PCI_IO_SIZE - 1)
125
126#define HAVE_ARCH_PIO_SIZE
127#define PIO_OFFSET 0
128#define PIO_MASK 0xffff
129#define PIO_RESERVED 0x10000
130#define PCI_IOBASE ((void __iomem *) PCI_IO_PA)
131#define PCI_SPACE_LIMIT PCI_IO_MASK
132#endif /* CONFIG_PCI */
175 133
176/* 134/*
177 * Convert a virtual cached pointer to an uncached pointer 135 * These are defined in kmap.h as static inline functions. To maintain
136 * previous behavior we put these define guards here so io_mm.h doesn't
137 * see them.
178 */ 138 */
179#define xlate_dev_kmem_ptr(p) p 139#ifdef CONFIG_MMU
140#define memset_io memset_io
141#define memcpy_fromio memcpy_fromio
142#define memcpy_toio memcpy_toio
143#endif
180 144
181static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) 145#include <asm/kmap.h>
182{ 146#include <asm/virtconvert.h>
183 return (void __iomem *) port; 147#include <asm-generic/io.h>
184}
185
186static inline void ioport_unmap(void __iomem *p)
187{
188}
189
190#endif /* __KERNEL__ */
191 148
192#endif /* _M68KNOMMU_IO_H */ 149#endif /* _M68KNOMMU_IO_H */
diff --git a/arch/m68k/include/asm/kmap.h b/arch/m68k/include/asm/kmap.h
new file mode 100644
index 000000000000..84b8333db8ad
--- /dev/null
+++ b/arch/m68k/include/asm/kmap.h
@@ -0,0 +1,80 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _KMAP_H
3#define _KMAP_H
4
5#ifdef CONFIG_MMU
6
7/* Values for nocacheflag and cmode */
8#define IOMAP_FULL_CACHING 0
9#define IOMAP_NOCACHE_SER 1
10#define IOMAP_NOCACHE_NONSER 2
11#define IOMAP_WRITETHROUGH 3
12
13/*
14 * These functions exported by arch/m68k/mm/kmap.c.
15 * Only needed on MMU enabled systems.
16 */
17extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size,
18 int cacheflag);
19extern void iounmap(void __iomem *addr);
20extern void __iounmap(void *addr, unsigned long size);
21
22#define ioremap ioremap
23static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
24{
25 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
26}
27
28#define ioremap_nocache ioremap_nocache
29static inline void __iomem *ioremap_nocache(unsigned long physaddr,
30 unsigned long size)
31{
32 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
33}
34
35#define ioremap_uc ioremap_nocache
36static inline void __iomem *ioremap_wt(unsigned long physaddr,
37 unsigned long size)
38{
39 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
40}
41
42#define ioremap_fillcache ioremap_fullcache
43static inline void __iomem *ioremap_fullcache(unsigned long physaddr,
44 unsigned long size)
45{
46 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
47}
48
49static inline void memset_io(volatile void __iomem *addr, unsigned char val,
50 int count)
51{
52 __builtin_memset((void __force *) addr, val, count);
53}
54
55static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
56 int count)
57{
58 __builtin_memcpy(dst, (void __force *) src, count);
59}
60
61static inline void memcpy_toio(volatile void __iomem *dst, const void *src,
62 int count)
63{
64 __builtin_memcpy((void __force *) dst, src, count);
65}
66
67#endif /* CONFIG_MMU */
68
69#define ioport_map ioport_map
70static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
71{
72 return (void __iomem *) port;
73}
74
75#define ioport_unmap ioport_unmap
76static inline void ioport_unmap(void __iomem *p)
77{
78}
79
80#endif /* _KMAP_H */
diff --git a/arch/m68k/include/asm/nubus.h b/arch/m68k/include/asm/nubus.h
index d0d2039e434e..c2281da6c51a 100644
--- a/arch/m68k/include/asm/nubus.h
+++ b/arch/m68k/include/asm/nubus.h
@@ -3,6 +3,7 @@
3#define _ASM_M68K_NUBUS_H 3#define _ASM_M68K_NUBUS_H
4 4
5#include <asm/raw_io.h> 5#include <asm/raw_io.h>
6#include <asm/kmap.h>
6 7
7#define nubus_readb raw_inb 8#define nubus_readb raw_inb
8#define nubus_readw raw_inw 9#define nubus_readw raw_inw
diff --git a/arch/m68k/include/asm/q40_master.h b/arch/m68k/include/asm/q40_master.h
index 3a89c088800c..9b00fb8079e6 100644
--- a/arch/m68k/include/asm/q40_master.h
+++ b/arch/m68k/include/asm/q40_master.h
@@ -8,7 +8,7 @@
8#define _Q40_MASTER_H 8#define _Q40_MASTER_H
9 9
10#include <asm/raw_io.h> 10#include <asm/raw_io.h>
11 11#include <asm/kmap.h>
12 12
13#define q40_master_addr 0xff000000 13#define q40_master_addr 0xff000000
14 14
diff --git a/arch/m68k/include/asm/raw_io.h b/arch/m68k/include/asm/raw_io.h
index 05e940c29b54..85761255dde5 100644
--- a/arch/m68k/include/asm/raw_io.h
+++ b/arch/m68k/include/asm/raw_io.h
@@ -13,20 +13,6 @@
13 13
14#include <asm/byteorder.h> 14#include <asm/byteorder.h>
15 15
16
17/* Values for nocacheflag and cmode */
18#define IOMAP_FULL_CACHING 0
19#define IOMAP_NOCACHE_SER 1
20#define IOMAP_NOCACHE_NONSER 2
21#define IOMAP_WRITETHROUGH 3
22
23extern void iounmap(void __iomem *addr);
24
25extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size,
26 int cacheflag);
27extern void __iounmap(void *addr, unsigned long size);
28
29
30/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates 16/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
31 * two accesses to memory, which may be undesirable for some devices. 17 * two accesses to memory, which may be undesirable for some devices.
32 */ 18 */
diff --git a/arch/m68k/include/asm/vga.h b/arch/m68k/include/asm/vga.h
index 010a624d1b39..4742e6bc3ab8 100644
--- a/arch/m68k/include/asm/vga.h
+++ b/arch/m68k/include/asm/vga.h
@@ -2,7 +2,15 @@
2#ifndef _ASM_M68K_VGA_H 2#ifndef _ASM_M68K_VGA_H
3#define _ASM_M68K_VGA_H 3#define _ASM_M68K_VGA_H
4 4
5/*
6 * Some ColdFire platforms do in fact have a PCI bus. So for those we want
7 * to use the real IO access functions, don't fake them out or redirect them
8 * for that case.
9 */
10#ifndef CONFIG_PCI
11
5#include <asm/raw_io.h> 12#include <asm/raw_io.h>
13#include <asm/kmap.h>
6 14
7/* 15/*
8 * FIXME 16 * FIXME
@@ -25,4 +33,5 @@
25#define writeb raw_outb 33#define writeb raw_outb
26#define writew raw_outw 34#define writew raw_outw
27 35
36#endif /* CONFIG_PCI */
28#endif /* _ASM_M68K_VGA_H */ 37#endif /* _ASM_M68K_VGA_H */
diff --git a/arch/m68k/include/asm/virtconvert.h b/arch/m68k/include/asm/virtconvert.h
index 4aea6be7b220..dfe43083b579 100644
--- a/arch/m68k/include/asm/virtconvert.h
+++ b/arch/m68k/include/asm/virtconvert.h
@@ -16,11 +16,13 @@
16/* 16/*
17 * Change virtual addresses to physical addresses and vv. 17 * Change virtual addresses to physical addresses and vv.
18 */ 18 */
19#define virt_to_phys virt_to_phys
19static inline unsigned long virt_to_phys(void *address) 20static inline unsigned long virt_to_phys(void *address)
20{ 21{
21 return __pa(address); 22 return __pa(address);
22} 23}
23 24
25#define phys_to_virt phys_to_virt
24static inline void *phys_to_virt(unsigned long address) 26static inline void *phys_to_virt(unsigned long address)
25{ 27{
26 return __va(address); 28 return __va(address);
diff --git a/arch/m68k/include/asm/zorro.h b/arch/m68k/include/asm/zorro.h
index 96f64bf7bcaa..60fc4b6f294d 100644
--- a/arch/m68k/include/asm/zorro.h
+++ b/arch/m68k/include/asm/zorro.h
@@ -3,6 +3,7 @@
3#define _ASM_M68K_ZORRO_H 3#define _ASM_M68K_ZORRO_H
4 4
5#include <asm/raw_io.h> 5#include <asm/raw_io.h>
6#include <asm/kmap.h>
6 7
7#define z_readb raw_inb 8#define z_readb raw_inb
8#define z_readw raw_inw 9#define z_readw raw_inw
diff --git a/arch/m68k/mm/kmap.c b/arch/m68k/mm/kmap.c
index 3b420f6d8822..40a3b327da07 100644
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -126,6 +126,10 @@ void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cachefla
126 return (void __iomem *)physaddr; 126 return (void __iomem *)physaddr;
127 } 127 }
128#endif 128#endif
129#ifdef CONFIG_COLDFIRE
130 if (__cf_internalio(physaddr))
131 return (void __iomem *) physaddr;
132#endif
129 133
130#ifdef DEBUG 134#ifdef DEBUG
131 printk("ioremap: 0x%lx,0x%lx(%d) - ", physaddr, size, cacheflag); 135 printk("ioremap: 0x%lx,0x%lx(%d) - ", physaddr, size, cacheflag);
@@ -236,6 +240,10 @@ void iounmap(void __iomem *addr)
236 ((unsigned long)addr > 0x60000000))) 240 ((unsigned long)addr > 0x60000000)))
237 free_io_area((__force void *)addr); 241 free_io_area((__force void *)addr);
238#else 242#else
243#ifdef CONFIG_COLDFIRE
244 if (cf_internalio(addr))
245 return;
246#endif
239 free_io_area((__force void *)addr); 247 free_io_area((__force void *)addr);
240#endif 248#endif
241} 249}
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-31 15:36:35 -0500