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-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_adminq.c2
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h8
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_common.c13
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_main.c2
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_nvm.c141
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_prototype.h6
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_type.h26
-rw-r--r--drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h8
-rw-r--r--drivers/net/ethernet/intel/i40evf/i40e_type.h26
9 files changed, 173 insertions, 59 deletions
diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.c b/drivers/net/ethernet/intel/i40e/i40e_adminq.c
index 9af74253c3f7..d9670cd8743f 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_adminq.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.c
@@ -1027,7 +1027,7 @@ i40e_status i40e_clean_arq_element(struct i40e_hw *hw,
1027 hw->aq.arq.next_to_clean = ntc; 1027 hw->aq.arq.next_to_clean = ntc;
1028 hw->aq.arq.next_to_use = ntu; 1028 hw->aq.arq.next_to_use = ntu;
1029 1029
1030 i40e_nvmupd_check_wait_event(hw, le16_to_cpu(e->desc.opcode)); 1030 i40e_nvmupd_check_wait_event(hw, le16_to_cpu(e->desc.opcode), &e->desc);
1031clean_arq_element_out: 1031clean_arq_element_out:
1032 /* Set pending if needed, unlock and return */ 1032 /* Set pending if needed, unlock and return */
1033 if (pending) 1033 if (pending)
diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
index c5776340517c..0d471b0db0f4 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
@@ -2231,8 +2231,12 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_phy_register_access);
2231 */ 2231 */
2232struct i40e_aqc_nvm_update { 2232struct i40e_aqc_nvm_update {
2233 u8 command_flags; 2233 u8 command_flags;
2234#define I40E_AQ_NVM_LAST_CMD 0x01 2234#define I40E_AQ_NVM_LAST_CMD 0x01
2235#define I40E_AQ_NVM_FLASH_ONLY 0x80 2235#define I40E_AQ_NVM_FLASH_ONLY 0x80
2236#define I40E_AQ_NVM_PRESERVATION_FLAGS_SHIFT 1
2237#define I40E_AQ_NVM_PRESERVATION_FLAGS_MASK 0x03
2238#define I40E_AQ_NVM_PRESERVATION_FLAGS_SELECTED 0x03
2239#define I40E_AQ_NVM_PRESERVATION_FLAGS_ALL 0x01
2236 u8 module_pointer; 2240 u8 module_pointer;
2237 __le16 length; 2241 __le16 length;
2238 __le32 offset; 2242 __le32 offset;
diff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c
index 40c5f7628aa1..cf929cc47245 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_common.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_common.c
@@ -3465,13 +3465,14 @@ exit:
3465 * @length: length of the section to be written (in bytes from the offset) 3465 * @length: length of the section to be written (in bytes from the offset)
3466 * @data: command buffer (size [bytes] = length) 3466 * @data: command buffer (size [bytes] = length)
3467 * @last_command: tells if this is the last command in a series 3467 * @last_command: tells if this is the last command in a series
3468 * @preservation_flags: Preservation mode flags
3468 * @cmd_details: pointer to command details structure or NULL 3469 * @cmd_details: pointer to command details structure or NULL
3469 * 3470 *
3470 * Update the NVM using the admin queue commands 3471 * Update the NVM using the admin queue commands
3471 **/ 3472 **/
3472i40e_status i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer, 3473i40e_status i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,
3473 u32 offset, u16 length, void *data, 3474 u32 offset, u16 length, void *data,
3474 bool last_command, 3475 bool last_command, u8 preservation_flags,
3475 struct i40e_asq_cmd_details *cmd_details) 3476 struct i40e_asq_cmd_details *cmd_details)
3476{ 3477{
3477 struct i40e_aq_desc desc; 3478 struct i40e_aq_desc desc;
@@ -3490,6 +3491,16 @@ i40e_status i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,
3490 /* If this is the last command in a series, set the proper flag. */ 3491 /* If this is the last command in a series, set the proper flag. */
3491 if (last_command) 3492 if (last_command)
3492 cmd->command_flags |= I40E_AQ_NVM_LAST_CMD; 3493 cmd->command_flags |= I40E_AQ_NVM_LAST_CMD;
3494 if (hw->mac.type == I40E_MAC_X722) {
3495 if (preservation_flags == I40E_NVM_PRESERVATION_FLAGS_SELECTED)
3496 cmd->command_flags |=
3497 (I40E_AQ_NVM_PRESERVATION_FLAGS_SELECTED <<
3498 I40E_AQ_NVM_PRESERVATION_FLAGS_SHIFT);
3499 else if (preservation_flags == I40E_NVM_PRESERVATION_FLAGS_ALL)
3500 cmd->command_flags |=
3501 (I40E_AQ_NVM_PRESERVATION_FLAGS_ALL <<
3502 I40E_AQ_NVM_PRESERVATION_FLAGS_SHIFT);
3503 }
3493 cmd->module_pointer = module_pointer; 3504 cmd->module_pointer = module_pointer;
3494 cmd->offset = cpu_to_le32(offset); 3505 cmd->offset = cpu_to_le32(offset);
3495 cmd->length = cpu_to_le16(length); 3506 cmd->length = cpu_to_le16(length);
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
index 2ab22eba0c7c..e29d42c67fa9 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -10972,7 +10972,7 @@ i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf)
10972 ret = i40e_aq_update_nvm(&pf->hw, 10972 ret = i40e_aq_update_nvm(&pf->hw,
10973 I40E_SR_NVM_CONTROL_WORD, 10973 I40E_SR_NVM_CONTROL_WORD,
10974 0x10, sizeof(nvm_word), 10974 0x10, sizeof(nvm_word),
10975 &nvm_word, true, NULL); 10975 &nvm_word, true, 0, NULL);
10976 /* Save off last admin queue command status before releasing 10976 /* Save off last admin queue command status before releasing
10977 * the NVM 10977 * the NVM
10978 */ 10978 */
diff --git a/drivers/net/ethernet/intel/i40e/i40e_nvm.c b/drivers/net/ethernet/intel/i40e/i40e_nvm.c
index 425713fb72e5..76a5cb04e4fe 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_nvm.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_nvm.c
@@ -239,8 +239,9 @@ read_nvm_exit:
239 * 239 *
240 * Writes a 16 bit words buffer to the Shadow RAM using the admin command. 240 * Writes a 16 bit words buffer to the Shadow RAM using the admin command.
241 **/ 241 **/
242static i40e_status i40e_read_nvm_aq(struct i40e_hw *hw, u8 module_pointer, 242static i40e_status i40e_read_nvm_aq(struct i40e_hw *hw,
243 u32 offset, u16 words, void *data, 243 u8 module_pointer, u32 offset,
244 u16 words, void *data,
244 bool last_command) 245 bool last_command)
245{ 246{
246 i40e_status ret_code = I40E_ERR_NVM; 247 i40e_status ret_code = I40E_ERR_NVM;
@@ -496,7 +497,8 @@ static i40e_status i40e_write_nvm_aq(struct i40e_hw *hw, u8 module_pointer,
496 ret_code = i40e_aq_update_nvm(hw, module_pointer, 497 ret_code = i40e_aq_update_nvm(hw, module_pointer,
497 2 * offset, /*bytes*/ 498 2 * offset, /*bytes*/
498 2 * words, /*bytes*/ 499 2 * words, /*bytes*/
499 data, last_command, &cmd_details); 500 data, last_command, 0,
501 &cmd_details);
500 502
501 return ret_code; 503 return ret_code;
502} 504}
@@ -677,6 +679,9 @@ static i40e_status i40e_nvmupd_exec_aq(struct i40e_hw *hw,
677static i40e_status i40e_nvmupd_get_aq_result(struct i40e_hw *hw, 679static i40e_status i40e_nvmupd_get_aq_result(struct i40e_hw *hw,
678 struct i40e_nvm_access *cmd, 680 struct i40e_nvm_access *cmd,
679 u8 *bytes, int *perrno); 681 u8 *bytes, int *perrno);
682static i40e_status i40e_nvmupd_get_aq_event(struct i40e_hw *hw,
683 struct i40e_nvm_access *cmd,
684 u8 *bytes, int *perrno);
680static inline u8 i40e_nvmupd_get_module(u32 val) 685static inline u8 i40e_nvmupd_get_module(u32 val)
681{ 686{
682 return (u8)(val & I40E_NVM_MOD_PNT_MASK); 687 return (u8)(val & I40E_NVM_MOD_PNT_MASK);
@@ -686,6 +691,12 @@ static inline u8 i40e_nvmupd_get_transaction(u32 val)
686 return (u8)((val & I40E_NVM_TRANS_MASK) >> I40E_NVM_TRANS_SHIFT); 691 return (u8)((val & I40E_NVM_TRANS_MASK) >> I40E_NVM_TRANS_SHIFT);
687} 692}
688 693
694static inline u8 i40e_nvmupd_get_preservation_flags(u32 val)
695{
696 return (u8)((val & I40E_NVM_PRESERVATION_FLAGS_MASK) >>
697 I40E_NVM_PRESERVATION_FLAGS_SHIFT);
698}
699
689static const char * const i40e_nvm_update_state_str[] = { 700static const char * const i40e_nvm_update_state_str[] = {
690 "I40E_NVMUPD_INVALID", 701 "I40E_NVMUPD_INVALID",
691 "I40E_NVMUPD_READ_CON", 702 "I40E_NVMUPD_READ_CON",
@@ -703,6 +714,7 @@ static const char * const i40e_nvm_update_state_str[] = {
703 "I40E_NVMUPD_STATUS", 714 "I40E_NVMUPD_STATUS",
704 "I40E_NVMUPD_EXEC_AQ", 715 "I40E_NVMUPD_EXEC_AQ",
705 "I40E_NVMUPD_GET_AQ_RESULT", 716 "I40E_NVMUPD_GET_AQ_RESULT",
717 "I40E_NVMUPD_GET_AQ_EVENT",
706}; 718};
707 719
708/** 720/**
@@ -798,9 +810,9 @@ i40e_status i40e_nvmupd_command(struct i40e_hw *hw,
798 * the wait info and return before doing anything else 810 * the wait info and return before doing anything else
799 */ 811 */
800 if (cmd->offset == 0xffff) { 812 if (cmd->offset == 0xffff) {
801 i40e_nvmupd_check_wait_event(hw, hw->nvm_wait_opcode); 813 i40e_nvmupd_clear_wait_state(hw);
802 status = 0; 814 status = 0;
803 goto exit; 815 break;
804 } 816 }
805 817
806 status = I40E_ERR_NOT_READY; 818 status = I40E_ERR_NOT_READY;
@@ -815,7 +827,7 @@ i40e_status i40e_nvmupd_command(struct i40e_hw *hw,
815 *perrno = -ESRCH; 827 *perrno = -ESRCH;
816 break; 828 break;
817 } 829 }
818exit: 830
819 mutex_unlock(&hw->aq.arq_mutex); 831 mutex_unlock(&hw->aq.arq_mutex);
820 return status; 832 return status;
821} 833}
@@ -944,6 +956,10 @@ static i40e_status i40e_nvmupd_state_init(struct i40e_hw *hw,
944 status = i40e_nvmupd_get_aq_result(hw, cmd, bytes, perrno); 956 status = i40e_nvmupd_get_aq_result(hw, cmd, bytes, perrno);
945 break; 957 break;
946 958
959 case I40E_NVMUPD_GET_AQ_EVENT:
960 status = i40e_nvmupd_get_aq_event(hw, cmd, bytes, perrno);
961 break;
962
947 default: 963 default:
948 i40e_debug(hw, I40E_DEBUG_NVM, 964 i40e_debug(hw, I40E_DEBUG_NVM,
949 "NVMUPD: bad cmd %s in init state\n", 965 "NVMUPD: bad cmd %s in init state\n",
@@ -1118,38 +1134,53 @@ retry:
1118} 1134}
1119 1135
1120/** 1136/**
1121 * i40e_nvmupd_check_wait_event - handle NVM update operation events 1137 * i40e_nvmupd_clear_wait_state - clear wait state on hw
1122 * @hw: pointer to the hardware structure 1138 * @hw: pointer to the hardware structure
1123 * @opcode: the event that just happened
1124 **/ 1139 **/
1125void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode) 1140void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw)
1126{ 1141{
1127 if (opcode == hw->nvm_wait_opcode) { 1142 i40e_debug(hw, I40E_DEBUG_NVM,
1128 i40e_debug(hw, I40E_DEBUG_NVM, 1143 "NVMUPD: clearing wait on opcode 0x%04x\n",
1129 "NVMUPD: clearing wait on opcode 0x%04x\n", opcode); 1144 hw->nvm_wait_opcode);
1130 if (hw->nvm_release_on_done) {
1131 i40e_release_nvm(hw);
1132 hw->nvm_release_on_done = false;
1133 }
1134 hw->nvm_wait_opcode = 0;
1135 1145
1136 if (hw->aq.arq_last_status) { 1146 if (hw->nvm_release_on_done) {
1137 hw->nvmupd_state = I40E_NVMUPD_STATE_ERROR; 1147 i40e_release_nvm(hw);
1138 return; 1148 hw->nvm_release_on_done = false;
1139 } 1149 }
1150 hw->nvm_wait_opcode = 0;
1140 1151
1141 switch (hw->nvmupd_state) { 1152 if (hw->aq.arq_last_status) {
1142 case I40E_NVMUPD_STATE_INIT_WAIT: 1153 hw->nvmupd_state = I40E_NVMUPD_STATE_ERROR;
1143 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; 1154 return;
1144 break; 1155 }
1145 1156
1146 case I40E_NVMUPD_STATE_WRITE_WAIT: 1157 switch (hw->nvmupd_state) {
1147 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING; 1158 case I40E_NVMUPD_STATE_INIT_WAIT:
1148 break; 1159 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
1160 break;
1149 1161
1150 default: 1162 case I40E_NVMUPD_STATE_WRITE_WAIT:
1151 break; 1163 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;
1152 } 1164 break;
1165
1166 default:
1167 break;
1168 }
1169}
1170
1171/**
1172 * i40e_nvmupd_check_wait_event - handle NVM update operation events
1173 * @hw: pointer to the hardware structure
1174 * @opcode: the event that just happened
1175 **/
1176void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode,
1177 struct i40e_aq_desc *desc)
1178{
1179 u32 aq_desc_len = sizeof(struct i40e_aq_desc);
1180
1181 if (opcode == hw->nvm_wait_opcode) {
1182 memcpy(&hw->nvm_aq_event_desc, desc, aq_desc_len);
1183 i40e_nvmupd_clear_wait_state(hw);
1153 } 1184 }
1154} 1185}
1155 1186
@@ -1205,6 +1236,9 @@ static enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,
1205 else if (module == 0) 1236 else if (module == 0)
1206 upd_cmd = I40E_NVMUPD_GET_AQ_RESULT; 1237 upd_cmd = I40E_NVMUPD_GET_AQ_RESULT;
1207 break; 1238 break;
1239 case I40E_NVM_AQE:
1240 upd_cmd = I40E_NVMUPD_GET_AQ_EVENT;
1241 break;
1208 } 1242 }
1209 break; 1243 break;
1210 1244
@@ -1267,6 +1301,9 @@ static i40e_status i40e_nvmupd_exec_aq(struct i40e_hw *hw,
1267 u32 aq_data_len; 1301 u32 aq_data_len;
1268 1302
1269 i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__); 1303 i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__);
1304 if (cmd->offset == 0xffff)
1305 return 0;
1306
1270 memset(&cmd_details, 0, sizeof(cmd_details)); 1307 memset(&cmd_details, 0, sizeof(cmd_details));
1271 cmd_details.wb_desc = &hw->nvm_wb_desc; 1308 cmd_details.wb_desc = &hw->nvm_wb_desc;
1272 1309
@@ -1302,6 +1339,9 @@ static i40e_status i40e_nvmupd_exec_aq(struct i40e_hw *hw,
1302 } 1339 }
1303 } 1340 }
1304 1341
1342 if (cmd->offset)
1343 memset(&hw->nvm_aq_event_desc, 0, aq_desc_len);
1344
1305 /* and away we go! */ 1345 /* and away we go! */
1306 status = i40e_asq_send_command(hw, aq_desc, buff, 1346 status = i40e_asq_send_command(hw, aq_desc, buff,
1307 buff_size, &cmd_details); 1347 buff_size, &cmd_details);
@@ -1311,6 +1351,7 @@ static i40e_status i40e_nvmupd_exec_aq(struct i40e_hw *hw,
1311 i40e_stat_str(hw, status), 1351 i40e_stat_str(hw, status),
1312 i40e_aq_str(hw, hw->aq.asq_last_status)); 1352 i40e_aq_str(hw, hw->aq.asq_last_status));
1313 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); 1353 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status);
1354 return status;
1314 } 1355 }
1315 1356
1316 /* should we wait for a followup event? */ 1357 /* should we wait for a followup event? */
@@ -1392,6 +1433,40 @@ static i40e_status i40e_nvmupd_get_aq_result(struct i40e_hw *hw,
1392} 1433}
1393 1434
1394/** 1435/**
1436 * i40e_nvmupd_get_aq_event - Get the Admin Queue event from previous exec_aq
1437 * @hw: pointer to hardware structure
1438 * @cmd: pointer to nvm update command buffer
1439 * @bytes: pointer to the data buffer
1440 * @perrno: pointer to return error code
1441 *
1442 * cmd structure contains identifiers and data buffer
1443 **/
1444static i40e_status i40e_nvmupd_get_aq_event(struct i40e_hw *hw,
1445 struct i40e_nvm_access *cmd,
1446 u8 *bytes, int *perrno)
1447{
1448 u32 aq_total_len;
1449 u32 aq_desc_len;
1450
1451 i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__);
1452
1453 aq_desc_len = sizeof(struct i40e_aq_desc);
1454 aq_total_len = aq_desc_len + le16_to_cpu(hw->nvm_aq_event_desc.datalen);
1455
1456 /* check copylength range */
1457 if (cmd->data_size > aq_total_len) {
1458 i40e_debug(hw, I40E_DEBUG_NVM,
1459 "%s: copy length %d too big, trimming to %d\n",
1460 __func__, cmd->data_size, aq_total_len);
1461 cmd->data_size = aq_total_len;
1462 }
1463
1464 memcpy(bytes, &hw->nvm_aq_event_desc, cmd->data_size);
1465
1466 return 0;
1467}
1468
1469/**
1395 * i40e_nvmupd_nvm_read - Read NVM 1470 * i40e_nvmupd_nvm_read - Read NVM
1396 * @hw: pointer to hardware structure 1471 * @hw: pointer to hardware structure
1397 * @cmd: pointer to nvm update command buffer 1472 * @cmd: pointer to nvm update command buffer
@@ -1486,18 +1561,20 @@ static i40e_status i40e_nvmupd_nvm_write(struct i40e_hw *hw,
1486 i40e_status status = 0; 1561 i40e_status status = 0;
1487 struct i40e_asq_cmd_details cmd_details; 1562 struct i40e_asq_cmd_details cmd_details;
1488 u8 module, transaction; 1563 u8 module, transaction;
1564 u8 preservation_flags;
1489 bool last; 1565 bool last;
1490 1566
1491 transaction = i40e_nvmupd_get_transaction(cmd->config); 1567 transaction = i40e_nvmupd_get_transaction(cmd->config);
1492 module = i40e_nvmupd_get_module(cmd->config); 1568 module = i40e_nvmupd_get_module(cmd->config);
1493 last = (transaction & I40E_NVM_LCB); 1569 last = (transaction & I40E_NVM_LCB);
1570 preservation_flags = i40e_nvmupd_get_preservation_flags(cmd->config);
1494 1571
1495 memset(&cmd_details, 0, sizeof(cmd_details)); 1572 memset(&cmd_details, 0, sizeof(cmd_details));
1496 cmd_details.wb_desc = &hw->nvm_wb_desc; 1573 cmd_details.wb_desc = &hw->nvm_wb_desc;
1497 1574
1498 status = i40e_aq_update_nvm(hw, module, cmd->offset, 1575 status = i40e_aq_update_nvm(hw, module, cmd->offset,
1499 (u16)cmd->data_size, bytes, last, 1576 (u16)cmd->data_size, bytes, last,
1500 &cmd_details); 1577 preservation_flags, &cmd_details);
1501 if (status) { 1578 if (status) {
1502 i40e_debug(hw, I40E_DEBUG_NVM, 1579 i40e_debug(hw, I40E_DEBUG_NVM,
1503 "i40e_nvmupd_nvm_write mod 0x%x off 0x%x len 0x%x\n", 1580 "i40e_nvmupd_nvm_write mod 0x%x off 0x%x len 0x%x\n",
diff --git a/drivers/net/ethernet/intel/i40e/i40e_prototype.h b/drivers/net/ethernet/intel/i40e/i40e_prototype.h
index b3cc89cc3a86..187dd53e0056 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_prototype.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_prototype.h
@@ -214,7 +214,7 @@ i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw,
214 struct i40e_asq_cmd_details *cmd_details); 214 struct i40e_asq_cmd_details *cmd_details);
215i40e_status i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer, 215i40e_status i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,
216 u32 offset, u16 length, void *data, 216 u32 offset, u16 length, void *data,
217 bool last_command, 217 bool last_command, u8 preservation_flags,
218 struct i40e_asq_cmd_details *cmd_details); 218 struct i40e_asq_cmd_details *cmd_details);
219i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type, 219i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
220 u8 mib_type, void *buff, u16 buff_size, 220 u8 mib_type, void *buff, u16 buff_size,
@@ -333,7 +333,9 @@ i40e_status i40e_validate_nvm_checksum(struct i40e_hw *hw,
333i40e_status i40e_nvmupd_command(struct i40e_hw *hw, 333i40e_status i40e_nvmupd_command(struct i40e_hw *hw,
334 struct i40e_nvm_access *cmd, 334 struct i40e_nvm_access *cmd,
335 u8 *bytes, int *); 335 u8 *bytes, int *);
336void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode); 336void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode,
337 struct i40e_aq_desc *desc);
338void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw);
337void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status); 339void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status);
338 340
339extern struct i40e_rx_ptype_decoded i40e_ptype_lookup[]; 341extern struct i40e_rx_ptype_decoded i40e_ptype_lookup[];
diff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h
index 5a708c363d99..cd294e6a8587 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_type.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_type.h
@@ -402,6 +402,7 @@ enum i40e_nvmupd_cmd {
402 I40E_NVMUPD_STATUS, 402 I40E_NVMUPD_STATUS,
403 I40E_NVMUPD_EXEC_AQ, 403 I40E_NVMUPD_EXEC_AQ,
404 I40E_NVMUPD_GET_AQ_RESULT, 404 I40E_NVMUPD_GET_AQ_RESULT,
405 I40E_NVMUPD_GET_AQ_EVENT,
405}; 406};
406 407
407enum i40e_nvmupd_state { 408enum i40e_nvmupd_state {
@@ -421,15 +422,21 @@ enum i40e_nvmupd_state {
421 422
422#define I40E_NVM_MOD_PNT_MASK 0xFF 423#define I40E_NVM_MOD_PNT_MASK 0xFF
423 424
424#define I40E_NVM_TRANS_SHIFT 8 425#define I40E_NVM_TRANS_SHIFT 8
425#define I40E_NVM_TRANS_MASK (0xf << I40E_NVM_TRANS_SHIFT) 426#define I40E_NVM_TRANS_MASK (0xf << I40E_NVM_TRANS_SHIFT)
426#define I40E_NVM_CON 0x0 427#define I40E_NVM_PRESERVATION_FLAGS_SHIFT 12
427#define I40E_NVM_SNT 0x1 428#define I40E_NVM_PRESERVATION_FLAGS_MASK \
428#define I40E_NVM_LCB 0x2 429 (0x3 << I40E_NVM_PRESERVATION_FLAGS_SHIFT)
429#define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB) 430#define I40E_NVM_PRESERVATION_FLAGS_SELECTED 0x01
430#define I40E_NVM_ERA 0x4 431#define I40E_NVM_PRESERVATION_FLAGS_ALL 0x02
431#define I40E_NVM_CSUM 0x8 432#define I40E_NVM_CON 0x0
432#define I40E_NVM_EXEC 0xf 433#define I40E_NVM_SNT 0x1
434#define I40E_NVM_LCB 0x2
435#define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB)
436#define I40E_NVM_ERA 0x4
437#define I40E_NVM_CSUM 0x8
438#define I40E_NVM_AQE 0xe
439#define I40E_NVM_EXEC 0xf
433 440
434#define I40E_NVM_ADAPT_SHIFT 16 441#define I40E_NVM_ADAPT_SHIFT 16
435#define I40E_NVM_ADAPT_MASK (0xffff << I40E_NVM_ADAPT_SHIFT) 442#define I40E_NVM_ADAPT_MASK (0xffff << I40E_NVM_ADAPT_SHIFT)
@@ -611,6 +618,7 @@ struct i40e_hw {
611 /* state of nvm update process */ 618 /* state of nvm update process */
612 enum i40e_nvmupd_state nvmupd_state; 619 enum i40e_nvmupd_state nvmupd_state;
613 struct i40e_aq_desc nvm_wb_desc; 620 struct i40e_aq_desc nvm_wb_desc;
621 struct i40e_aq_desc nvm_aq_event_desc;
614 struct i40e_virt_mem nvm_buff; 622 struct i40e_virt_mem nvm_buff;
615 bool nvm_release_on_done; 623 bool nvm_release_on_done;
616 u16 nvm_wait_opcode; 624 u16 nvm_wait_opcode;
diff --git a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h
index 435a112d09f5..b0e6454995b6 100644
--- a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h
+++ b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h
@@ -2196,8 +2196,12 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_phy_register_access);
2196 */ 2196 */
2197struct i40e_aqc_nvm_update { 2197struct i40e_aqc_nvm_update {
2198 u8 command_flags; 2198 u8 command_flags;
2199#define I40E_AQ_NVM_LAST_CMD 0x01 2199#define I40E_AQ_NVM_LAST_CMD 0x01
2200#define I40E_AQ_NVM_FLASH_ONLY 0x80 2200#define I40E_AQ_NVM_FLASH_ONLY 0x80
2201#define I40E_AQ_NVM_PRESERVATION_FLAGS_SHIFT 1
2202#define I40E_AQ_NVM_PRESERVATION_FLAGS_MASK 0x03
2203#define I40E_AQ_NVM_PRESERVATION_FLAGS_SELECTED 0x03
2204#define I40E_AQ_NVM_PRESERVATION_FLAGS_ALL 0x01
2201 u8 module_pointer; 2205 u8 module_pointer;
2202 __le16 length; 2206 __le16 length;
2203 __le32 offset; 2207 __le32 offset;
diff --git a/drivers/net/ethernet/intel/i40evf/i40e_type.h b/drivers/net/ethernet/intel/i40evf/i40e_type.h
index 6afc31616e04..54951c84a481 100644
--- a/drivers/net/ethernet/intel/i40evf/i40e_type.h
+++ b/drivers/net/ethernet/intel/i40evf/i40e_type.h
@@ -361,6 +361,7 @@ enum i40e_nvmupd_cmd {
361 I40E_NVMUPD_STATUS, 361 I40E_NVMUPD_STATUS,
362 I40E_NVMUPD_EXEC_AQ, 362 I40E_NVMUPD_EXEC_AQ,
363 I40E_NVMUPD_GET_AQ_RESULT, 363 I40E_NVMUPD_GET_AQ_RESULT,
364 I40E_NVMUPD_GET_AQ_EVENT,
364}; 365};
365 366
366enum i40e_nvmupd_state { 367enum i40e_nvmupd_state {
@@ -380,15 +381,21 @@ enum i40e_nvmupd_state {
380 381
381#define I40E_NVM_MOD_PNT_MASK 0xFF 382#define I40E_NVM_MOD_PNT_MASK 0xFF
382 383
383#define I40E_NVM_TRANS_SHIFT 8 384#define I40E_NVM_TRANS_SHIFT 8
384#define I40E_NVM_TRANS_MASK (0xf << I40E_NVM_TRANS_SHIFT) 385#define I40E_NVM_TRANS_MASK (0xf << I40E_NVM_TRANS_SHIFT)
385#define I40E_NVM_CON 0x0 386#define I40E_NVM_PRESERVATION_FLAGS_SHIFT 12
386#define I40E_NVM_SNT 0x1 387#define I40E_NVM_PRESERVATION_FLAGS_MASK \
387#define I40E_NVM_LCB 0x2 388 (0x3 << I40E_NVM_PRESERVATION_FLAGS_SHIFT)
388#define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB) 389#define I40E_NVM_PRESERVATION_FLAGS_SELECTED 0x01
389#define I40E_NVM_ERA 0x4 390#define I40E_NVM_PRESERVATION_FLAGS_ALL 0x02
390#define I40E_NVM_CSUM 0x8 391#define I40E_NVM_CON 0x0
391#define I40E_NVM_EXEC 0xf 392#define I40E_NVM_SNT 0x1
393#define I40E_NVM_LCB 0x2
394#define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB)
395#define I40E_NVM_ERA 0x4
396#define I40E_NVM_CSUM 0x8
397#define I40E_NVM_AQE 0xe
398#define I40E_NVM_EXEC 0xf
392 399
393#define I40E_NVM_ADAPT_SHIFT 16 400#define I40E_NVM_ADAPT_SHIFT 16
394#define I40E_NVM_ADAPT_MASK (0xffff << I40E_NVM_ADAPT_SHIFT) 401#define I40E_NVM_ADAPT_MASK (0xffff << I40E_NVM_ADAPT_SHIFT)
@@ -561,6 +568,7 @@ struct i40e_hw {
561 /* state of nvm update process */ 568 /* state of nvm update process */
562 enum i40e_nvmupd_state nvmupd_state; 569 enum i40e_nvmupd_state nvmupd_state;
563 struct i40e_aq_desc nvm_wb_desc; 570 struct i40e_aq_desc nvm_wb_desc;
571 struct i40e_aq_desc nvm_aq_event_desc;
564 struct i40e_virt_mem nvm_buff; 572 struct i40e_virt_mem nvm_buff;
565 bool nvm_release_on_done; 573 bool nvm_release_on_done;
566 u16 nvm_wait_opcode; 574 u16 nvm_wait_opcode;