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-rw-r--r--.gitignore1
-rw-r--r--Documentation/CodingStyle13
-rw-r--r--Documentation/IRQ-domain.txt3
-rw-r--r--Documentation/SubmittingPatches4
-rw-r--r--Documentation/blockdev/nbd.txt48
-rw-r--r--Documentation/devicetree/bindings/clock/pistachio-clock.txt123
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/brcm,bcm3380-l2-intc.txt41
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.txt52
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.txt12
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-mx.txt18
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.txt25
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt5
-rw-r--r--Documentation/devicetree/bindings/mailbox/arm-mhu.txt43
-rw-r--r--Documentation/devicetree/bindings/mips/brcm/bcm3384-intc.txt37
-rw-r--r--Documentation/devicetree/bindings/mips/brcm/cm-dsl.txt11
-rw-r--r--Documentation/devicetree/bindings/mips/brcm/soc.txt12
-rw-r--r--Documentation/devicetree/bindings/mips/img/pistachio.txt42
-rw-r--r--Documentation/devicetree/bindings/rtc/digicolor-rtc.txt17
-rw-r--r--Documentation/devicetree/bindings/rtc/stmp3xxx-rtc.txt5
-rw-r--r--Documentation/devicetree/booting-without-of.txt28
-rw-r--r--Documentation/filesystems/Locking2
-rw-r--r--Documentation/filesystems/proc.txt15
-rw-r--r--Documentation/filesystems/vfs.txt2
-rw-r--r--Documentation/kernel-parameters.txt2
-rw-r--r--Documentation/spi/spidev_test.c4
-rw-r--r--Documentation/sysctl/kernel.txt21
-rw-r--r--MAINTAINERS10
-rw-r--r--arch/alpha/include/asm/processor.h1
-rw-r--r--arch/arc/kernel/troubleshoot.c3
-rw-r--r--arch/arm/include/asm/Kbuild1
-rw-r--r--arch/arm/include/asm/seccomp.h11
-rw-r--r--arch/c6x/Makefile2
-rw-r--r--arch/c6x/include/asm/Kbuild1
-rw-r--r--arch/c6x/include/asm/dma-mapping.h8
-rw-r--r--arch/c6x/include/asm/flat.h12
-rw-r--r--arch/c6x/include/asm/setup.h1
-rw-r--r--arch/c6x/kernel/setup.c10
-rw-r--r--arch/c6x/kernel/time.c2
-rw-r--r--arch/c6x/platforms/cache.c2
-rw-r--r--arch/microblaze/include/asm/seccomp.h8
-rw-r--r--arch/mips/Kbuild.platforms3
-rw-r--r--arch/mips/Kconfig116
-rw-r--r--arch/mips/Makefile21
-rw-r--r--arch/mips/ar7/platform.c5
-rw-r--r--arch/mips/ath79/common.h2
-rw-r--r--arch/mips/bcm3384/Platform7
-rw-r--r--arch/mips/bcm3384/dma.c81
-rw-r--r--arch/mips/bcm3384/irq.c193
-rw-r--r--arch/mips/bcm3384/setup.c97
-rw-r--r--arch/mips/bcm47xx/bcm47xx_private.h4
-rw-r--r--arch/mips/bcm47xx/board.c61
-rw-r--r--arch/mips/bcm47xx/buttons.c18
-rw-r--r--arch/mips/bcm47xx/leds.c10
-rw-r--r--arch/mips/bcm47xx/nvram.c77
-rw-r--r--arch/mips/bcm47xx/prom.c3
-rw-r--r--arch/mips/bcm47xx/serial.c8
-rw-r--r--arch/mips/bcm47xx/setup.c13
-rw-r--r--arch/mips/bcm47xx/sprom.c675
-rw-r--r--arch/mips/bcm47xx/time.c2
-rw-r--r--arch/mips/bcm63xx/prom.c4
-rw-r--r--arch/mips/bcm63xx/setup.c4
-rw-r--r--arch/mips/bmips/Kconfig62
-rw-r--r--arch/mips/bmips/Makefile (renamed from arch/mips/bcm3384/Makefile)0
-rw-r--r--arch/mips/bmips/Platform7
-rw-r--r--arch/mips/bmips/dma.c117
-rw-r--r--arch/mips/bmips/irq.c38
-rw-r--r--arch/mips/bmips/setup.c194
-rw-r--r--arch/mips/boot/compressed/Makefile9
-rw-r--r--arch/mips/boot/compressed/decompress.c5
-rw-r--r--arch/mips/boot/dts/Makefile33
-rw-r--r--arch/mips/boot/dts/bcm3384.dtsi109
-rw-r--r--arch/mips/boot/dts/brcm/Makefile19
-rw-r--r--arch/mips/boot/dts/brcm/bcm3384_viper.dtsi108
-rw-r--r--arch/mips/boot/dts/brcm/bcm3384_zephyr.dtsi126
-rw-r--r--arch/mips/boot/dts/brcm/bcm6328.dtsi86
-rw-r--r--arch/mips/boot/dts/brcm/bcm6368.dtsi93
-rw-r--r--arch/mips/boot/dts/brcm/bcm7125.dtsi139
-rw-r--r--arch/mips/boot/dts/brcm/bcm7346.dtsi224
-rw-r--r--arch/mips/boot/dts/brcm/bcm7358.dtsi161
-rw-r--r--arch/mips/boot/dts/brcm/bcm7360.dtsi161
-rw-r--r--arch/mips/boot/dts/brcm/bcm7362.dtsi167
-rw-r--r--arch/mips/boot/dts/brcm/bcm7420.dtsi184
-rw-r--r--arch/mips/boot/dts/brcm/bcm7425.dtsi225
-rw-r--r--arch/mips/boot/dts/brcm/bcm93384wvg.dts (renamed from arch/mips/boot/dts/bcm93384wvg.dts)9
-rw-r--r--arch/mips/boot/dts/brcm/bcm93384wvg_viper.dts25
-rw-r--r--arch/mips/boot/dts/brcm/bcm96368mvwg.dts31
-rw-r--r--arch/mips/boot/dts/brcm/bcm97125cbmb.dts31
-rw-r--r--arch/mips/boot/dts/brcm/bcm97346dbsmb.dts58
-rw-r--r--arch/mips/boot/dts/brcm/bcm97358svmb.dts34
-rw-r--r--arch/mips/boot/dts/brcm/bcm97360svmb.dts34
-rw-r--r--arch/mips/boot/dts/brcm/bcm97362svmb.dts34
-rw-r--r--arch/mips/boot/dts/brcm/bcm97420c.dts45
-rw-r--r--arch/mips/boot/dts/brcm/bcm97425svmb.dts60
-rw-r--r--arch/mips/boot/dts/brcm/bcm9ejtagprb.dts22
-rw-r--r--arch/mips/boot/dts/cavium-octeon/Makefile9
-rw-r--r--arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dts (renamed from arch/mips/boot/dts/octeon_3xxx.dts)12
-rw-r--r--arch/mips/boot/dts/cavium-octeon/octeon_68xx.dts (renamed from arch/mips/boot/dts/octeon_68xx.dts)0
-rw-r--r--arch/mips/boot/dts/lantiq/Makefile9
-rw-r--r--arch/mips/boot/dts/lantiq/danube.dtsi (renamed from arch/mips/boot/dts/danube.dtsi)0
-rw-r--r--arch/mips/boot/dts/lantiq/easy50712.dts (renamed from arch/mips/boot/dts/easy50712.dts)0
-rw-r--r--arch/mips/boot/dts/mti/Makefile9
-rw-r--r--arch/mips/boot/dts/mti/sead3.dts (renamed from arch/mips/boot/dts/sead3.dts)0
-rw-r--r--arch/mips/boot/dts/netlogic/Makefile13
-rw-r--r--arch/mips/boot/dts/netlogic/xlp_evp.dts (renamed from arch/mips/boot/dts/xlp_evp.dts)0
-rw-r--r--arch/mips/boot/dts/netlogic/xlp_fvp.dts (renamed from arch/mips/boot/dts/xlp_fvp.dts)0
-rw-r--r--arch/mips/boot/dts/netlogic/xlp_gvp.dts (renamed from arch/mips/boot/dts/xlp_gvp.dts)0
-rw-r--r--arch/mips/boot/dts/netlogic/xlp_rvp.dts77
-rw-r--r--arch/mips/boot/dts/netlogic/xlp_svp.dts (renamed from arch/mips/boot/dts/xlp_svp.dts)0
-rw-r--r--arch/mips/boot/dts/ralink/Makefile12
-rw-r--r--arch/mips/boot/dts/ralink/mt7620a.dtsi (renamed from arch/mips/boot/dts/mt7620a.dtsi)0
-rw-r--r--arch/mips/boot/dts/ralink/mt7620a_eval.dts (renamed from arch/mips/boot/dts/mt7620a_eval.dts)0
-rw-r--r--arch/mips/boot/dts/ralink/rt2880.dtsi (renamed from arch/mips/boot/dts/rt2880.dtsi)0
-rw-r--r--arch/mips/boot/dts/ralink/rt2880_eval.dts (renamed from arch/mips/boot/dts/rt2880_eval.dts)0
-rw-r--r--arch/mips/boot/dts/ralink/rt3050.dtsi (renamed from arch/mips/boot/dts/rt3050.dtsi)0
-rw-r--r--arch/mips/boot/dts/ralink/rt3052_eval.dts (renamed from arch/mips/boot/dts/rt3052_eval.dts)0
-rw-r--r--arch/mips/boot/dts/ralink/rt3883.dtsi (renamed from arch/mips/boot/dts/rt3883.dtsi)0
-rw-r--r--arch/mips/boot/dts/ralink/rt3883_eval.dts (renamed from arch/mips/boot/dts/rt3883_eval.dts)0
-rw-r--r--arch/mips/cavium-octeon/crypto/octeon-crypto.h80
-rw-r--r--arch/mips/cavium-octeon/dma-octeon.c2
-rw-r--r--arch/mips/cavium-octeon/executive/cvmx-l2c.c45
-rw-r--r--arch/mips/cavium-octeon/flash_setup.c83
-rw-r--r--arch/mips/cavium-octeon/octeon-platform.c19
-rw-r--r--arch/mips/cavium-octeon/octeon_boot.h23
-rw-r--r--arch/mips/cavium-octeon/setup.c10
-rw-r--r--arch/mips/configs/bmips_be_defconfig (renamed from arch/mips/configs/bcm3384_defconfig)11
-rw-r--r--arch/mips/configs/bmips_stb_defconfig88
-rw-r--r--arch/mips/configs/ip32_defconfig3
-rw-r--r--arch/mips/configs/maltaup_xpa_defconfig439
-rw-r--r--arch/mips/configs/pistachio_defconfig336
-rw-r--r--arch/mips/dec/int-handler.S7
-rw-r--r--arch/mips/dec/setup.c16
-rw-r--r--arch/mips/include/asm/asm-eva.h137
-rw-r--r--arch/mips/include/asm/asmmacro-32.h96
-rw-r--r--arch/mips/include/asm/bitops.h7
-rw-r--r--arch/mips/include/asm/bmips.h16
-rw-r--r--arch/mips/include/asm/cacheflush.h38
-rw-r--r--arch/mips/include/asm/cdmm.h98
-rw-r--r--arch/mips/include/asm/cevt-r4k.h19
-rw-r--r--arch/mips/include/asm/checksum.h6
-rw-r--r--arch/mips/include/asm/cmpxchg.h11
-rw-r--r--arch/mips/include/asm/cpu-features.h48
-rw-r--r--arch/mips/include/asm/cpu-info.h2
-rw-r--r--arch/mips/include/asm/cpu-type.h1
-rw-r--r--arch/mips/include/asm/cpu.h8
-rw-r--r--arch/mips/include/asm/dma-mapping.h2
-rw-r--r--arch/mips/include/asm/elf.h12
-rw-r--r--arch/mips/include/asm/fpu.h7
-rw-r--r--arch/mips/include/asm/fpu_emulator.h6
-rw-r--r--arch/mips/include/asm/irq.h3
-rw-r--r--arch/mips/include/asm/mach-ar7/war.h24
-rw-r--r--arch/mips/include/asm/mach-ath25/dma-coherence.h14
-rw-r--r--arch/mips/include/asm/mach-ath25/war.h25
-rw-r--r--arch/mips/include/asm/mach-ath79/war.h24
-rw-r--r--arch/mips/include/asm/mach-au1x00/war.h24
-rw-r--r--arch/mips/include/asm/mach-bcm3384/war.h24
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/bcm47xx.h1
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h4
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/war.h24
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/dma-coherence.h10
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/war.h24
-rw-r--r--arch/mips/include/asm/mach-bmips/dma-coherence.h (renamed from arch/mips/include/asm/mach-bcm3384/dma-coherence.h)12
-rw-r--r--arch/mips/include/asm/mach-bmips/spaces.h18
-rw-r--r--arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h4
-rw-r--r--arch/mips/include/asm/mach-cavium-octeon/mangle-port.h74
-rw-r--r--arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-cobalt/war.h24
-rw-r--r--arch/mips/include/asm/mach-dec/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-dec/war.h24
-rw-r--r--arch/mips/include/asm/mach-emma2rh/war.h24
-rw-r--r--arch/mips/include/asm/mach-generic/dma-coherence.h6
-rw-r--r--arch/mips/include/asm/mach-generic/war.h (renamed from arch/mips/include/asm/mach-ralink/war.h)6
-rw-r--r--arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-ip27/dma-coherence.h4
-rw-r--r--arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-ip32/dma-coherence.h4
-rw-r--r--arch/mips/include/asm/mach-ip32/mc146818rtc.h36
-rw-r--r--arch/mips/include/asm/mach-jazz/dma-coherence.h4
-rw-r--r--arch/mips/include/asm/mach-jazz/war.h24
-rw-r--r--arch/mips/include/asm/mach-jz4740/war.h24
-rw-r--r--arch/mips/include/asm/mach-lantiq/war.h23
-rw-r--r--arch/mips/include/asm/mach-lasat/war.h24
-rw-r--r--arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-loongson/dma-coherence.h4
-rw-r--r--arch/mips/include/asm/mach-loongson/loongson.h4
-rw-r--r--arch/mips/include/asm/mach-loongson/war.h24
-rw-r--r--arch/mips/include/asm/mach-loongson1/war.h24
-rw-r--r--arch/mips/include/asm/mach-netlogic/multi-node.h9
-rw-r--r--arch/mips/include/asm/mach-netlogic/topology.h15
-rw-r--r--arch/mips/include/asm/mach-netlogic/war.h25
-rw-r--r--arch/mips/include/asm/mach-paravirt/war.h25
-rw-r--r--arch/mips/include/asm/mach-pistachio/gpio.h21
-rw-r--r--arch/mips/include/asm/mach-pistachio/irq.h18
-rw-r--r--arch/mips/include/asm/mach-pnx833x/war.h24
-rw-r--r--arch/mips/include/asm/mach-rm/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-tx39xx/war.h24
-rw-r--r--arch/mips/include/asm/mach-vr41xx/war.h24
-rw-r--r--arch/mips/include/asm/mips-boards/sead3-addr.h83
-rw-r--r--arch/mips/include/asm/mips-r2-to-r6-emul.h9
-rw-r--r--arch/mips/include/asm/mipsregs.h312
-rw-r--r--arch/mips/include/asm/netlogic/common.h21
-rw-r--r--arch/mips/include/asm/netlogic/mips-extns.h8
-rw-r--r--arch/mips/include/asm/netlogic/xlp-hal/cpucontrol.h2
-rw-r--r--arch/mips/include/asm/netlogic/xlp-hal/sys.h3
-rw-r--r--arch/mips/include/asm/netlogic/xlp-hal/xlp.h3
-rw-r--r--arch/mips/include/asm/octeon/cvmx-address.h67
-rw-r--r--arch/mips/include/asm/octeon/cvmx-bootinfo.h55
-rw-r--r--arch/mips/include/asm/octeon/cvmx-bootmem.h14
-rw-r--r--arch/mips/include/asm/octeon/cvmx-fau.h22
-rw-r--r--arch/mips/include/asm/octeon/cvmx-fpa.h7
-rw-r--r--arch/mips/include/asm/octeon/cvmx-l2c.h9
-rw-r--r--arch/mips/include/asm/octeon/cvmx-packet.h8
-rw-r--r--arch/mips/include/asm/octeon/cvmx-pko.h31
-rw-r--r--arch/mips/include/asm/octeon/cvmx-pow.h247
-rw-r--r--arch/mips/include/asm/octeon/cvmx-wqe.h71
-rw-r--r--arch/mips/include/asm/octeon/cvmx.h8
-rw-r--r--arch/mips/include/asm/octeon/octeon.h2
-rw-r--r--arch/mips/include/asm/octeon/pci-octeon.h3
-rw-r--r--arch/mips/include/asm/page.h2
-rw-r--r--arch/mips/include/asm/pci.h2
-rw-r--r--arch/mips/include/asm/pci/bridge.h1
-rw-r--r--arch/mips/include/asm/pgtable-32.h15
-rw-r--r--arch/mips/include/asm/pgtable-64.h10
-rw-r--r--arch/mips/include/asm/pgtable-bits.h96
-rw-r--r--arch/mips/include/asm/pgtable.h83
-rw-r--r--arch/mips/include/asm/r4kcache.h89
-rw-r--r--arch/mips/include/asm/seccomp.h7
-rw-r--r--arch/mips/include/asm/sgi/sgi.h15
-rw-r--r--arch/mips/include/asm/spinlock.h2
-rw-r--r--arch/mips/include/asm/thread_info.h4
-rw-r--r--arch/mips/jz4740/Platform1
-rw-r--r--arch/mips/jz4740/time.c8
-rw-r--r--arch/mips/kernel/branch.c6
-rw-r--r--arch/mips/kernel/cevt-r4k.c33
-rw-r--r--arch/mips/kernel/cevt-txx9.c9
-rw-r--r--arch/mips/kernel/cpu-probe.c200
-rw-r--r--arch/mips/kernel/csrc-bcm1480.c12
-rw-r--r--arch/mips/kernel/csrc-ioasic.c13
-rw-r--r--arch/mips/kernel/csrc-r4k.c8
-rw-r--r--arch/mips/kernel/csrc-sb1250.c23
-rw-r--r--arch/mips/kernel/elf.c14
-rw-r--r--arch/mips/kernel/entry.S3
-rw-r--r--arch/mips/kernel/idle.c13
-rw-r--r--arch/mips/kernel/mips-r2-to-r6-emul.c15
-rw-r--r--arch/mips/kernel/perf_event_mipsxx.c83
-rw-r--r--arch/mips/kernel/proc.c1
-rw-r--r--arch/mips/kernel/process.c10
-rw-r--r--arch/mips/kernel/prom.c5
-rw-r--r--arch/mips/kernel/ptrace.c10
-rw-r--r--arch/mips/kernel/r2300_switch.S7
-rw-r--r--arch/mips/kernel/r4k_switch.S7
-rw-r--r--arch/mips/kernel/reset.c25
-rw-r--r--arch/mips/kernel/setup.c2
-rw-r--r--arch/mips/kernel/smp-cps.c6
-rw-r--r--arch/mips/kernel/smp.c6
-rw-r--r--arch/mips/kernel/traps.c276
-rw-r--r--arch/mips/kernel/unaligned.c346
-rw-r--r--arch/mips/lantiq/prom.c2
-rw-r--r--arch/mips/lantiq/xway/vmmc.c1
-rw-r--r--arch/mips/lasat/sysctl.c15
-rw-r--r--arch/mips/lib/csum_partial.S38
-rw-r--r--arch/mips/loongson/common/env.c9
-rw-r--r--arch/mips/loongson/common/pci.c6
-rw-r--r--arch/mips/loongson/loongson-3/cop2-ex.c2
-rw-r--r--arch/mips/loongson/loongson-3/irq.c1
-rw-r--r--arch/mips/math-emu/Makefile15
-rw-r--r--arch/mips/math-emu/cp1emu.c288
-rw-r--r--arch/mips/math-emu/dp_add.c14
-rw-r--r--arch/mips/math-emu/dp_cmp.c13
-rw-r--r--arch/mips/math-emu/dp_div.c9
-rw-r--r--arch/mips/math-emu/dp_fsp.c16
-rw-r--r--arch/mips/math-emu/dp_mul.c9
-rw-r--r--arch/mips/math-emu/dp_simple.c55
-rw-r--r--arch/mips/math-emu/dp_sqrt.c13
-rw-r--r--arch/mips/math-emu/dp_sub.c14
-rw-r--r--arch/mips/math-emu/dsemul.c6
-rw-r--r--arch/mips/math-emu/ieee754.h111
-rw-r--r--arch/mips/math-emu/ieee754dp.c25
-rw-r--r--arch/mips/math-emu/ieee754dp.h1
-rw-r--r--arch/mips/math-emu/ieee754int.h5
-rw-r--r--arch/mips/math-emu/ieee754sp.c25
-rw-r--r--arch/mips/math-emu/ieee754sp.h1
-rw-r--r--arch/mips/math-emu/me-debugfs.c1
-rw-r--r--arch/mips/math-emu/sp_add.c14
-rw-r--r--arch/mips/math-emu/sp_cmp.c13
-rw-r--r--arch/mips/math-emu/sp_div.c9
-rw-r--r--arch/mips/math-emu/sp_fdp.c22
-rw-r--r--arch/mips/math-emu/sp_mul.c9
-rw-r--r--arch/mips/math-emu/sp_simple.c55
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-rw-r--r--fs/hfsplus/inode.c15
-rw-r--r--fs/hfsplus/ioctl.c12
-rw-r--r--fs/hfsplus/xattr.c86
-rw-r--r--fs/hfsplus/xattr.h22
-rw-r--r--fs/hfsplus/xattr_security.c38
-rw-r--r--fs/hfsplus/xattr_trusted.c37
-rw-r--r--fs/hfsplus/xattr_user.c35
-rw-r--r--fs/jfs/inode.c8
-rw-r--r--fs/locks.c38
-rw-r--r--fs/namei.c8
-rw-r--r--fs/ncpfs/file.c14
-rw-r--r--fs/nfs/direct.c36
-rw-r--r--fs/nfs/file.c15
-rw-r--r--fs/nfs/read.c8
-rw-r--r--fs/nilfs2/alloc.c5
-rw-r--r--fs/nilfs2/bmap.c48
-rw-r--r--fs/nilfs2/bmap.h13
-rw-r--r--fs/nilfs2/btree.c63
-rw-r--r--fs/nilfs2/cpfile.c58
-rw-r--r--fs/nilfs2/direct.c17
-rw-r--r--fs/nilfs2/inode.c35
-rw-r--r--fs/nilfs2/mdt.c54
-rw-r--r--fs/nilfs2/mdt.h10
-rw-r--r--fs/nilfs2/page.c24
-rw-r--r--fs/nilfs2/segment.c17
-rw-r--r--fs/nilfs2/super.c2
-rw-r--r--fs/ntfs/file.c80
-rw-r--r--fs/ocfs2/aops.c22
-rw-r--r--fs/ocfs2/file.c124
-rw-r--r--fs/proc/fd.c27
-rw-r--r--fs/quota/dquot.c151
-rw-r--r--fs/quota/quota.c217
-rw-r--r--fs/quota/quota_tree.c7
-rw-r--r--fs/quota/quota_v2.c12
-rw-r--r--fs/quota/quotaio_v2.h6
-rw-r--r--fs/read_write.c3
-rw-r--r--fs/reiserfs/inode.c8
-rw-r--r--fs/reiserfs/reiserfs.h1
-rw-r--r--fs/reiserfs/super.c2
-rw-r--r--fs/udf/balloc.c20
-rw-r--r--fs/udf/dir.c1
-rw-r--r--fs/udf/directory.c1
-rw-r--r--fs/udf/file.c26
-rw-r--r--fs/udf/inode.c10
-rw-r--r--fs/udf/misc.c1
-rw-r--r--fs/udf/namei.c10
-rw-r--r--fs/udf/partition.c1
-rw-r--r--fs/udf/super.c1
-rw-r--r--fs/udf/symlink.c1
-rw-r--r--fs/udf/truncate.c1
-rw-r--r--fs/xfs/xfs_aops.c12
-rw-r--r--fs/xfs/xfs_file.c39
-rw-r--r--fs/xfs/xfs_qm.h4
-rw-r--r--fs/xfs/xfs_qm_syscalls.c176
-rw-r--r--fs/xfs/xfs_quotaops.c117
-rw-r--r--include/acpi/acpixf.h14
-rw-r--r--include/acpi/actbl2.h70
-rw-r--r--include/acpi/actypes.h50
-rw-r--r--include/acpi/platform/acenv.h1
-rw-r--r--include/asm-generic/dma-mapping-common.h5
-rw-r--r--include/asm-generic/seccomp.h2
-rw-r--r--include/dt-bindings/clock/pistachio-clk.h183
-rw-r--r--include/linux/bcm47xx_nvram.h (renamed from arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h)19
-rw-r--r--include/linux/bitmap.h8
-rw-r--r--include/linux/bitops.h4
-rw-r--r--include/linux/blk-mq.h9
-rw-r--r--include/linux/dcache.h59
-rw-r--r--include/linux/dma-mapping.h4
-rw-r--r--include/linux/fs.h49
-rw-r--r--include/linux/irqchip/mips-gic.h7
-rw-r--r--include/linux/kconfig.h15
-rw-r--r--include/linux/kernel.h12
-rw-r--r--include/linux/mfd/samsung/rtc.h2
-rw-r--r--include/linux/mm_types.h2
-rw-r--r--include/linux/mod_devicetable.h8
-rw-r--r--include/linux/nbd.h46
-rw-r--r--include/linux/nfs_fs.h5
-rw-r--r--include/linux/nvme.h5
-rw-r--r--include/linux/quota.h90
-rw-r--r--include/linux/quotaops.h14
-rw-r--r--include/linux/string_helpers.h2
-rw-r--r--include/linux/sysctl.h3
-rw-r--r--include/linux/uio.h8
-rw-r--r--include/linux/util_macros.h40
-rw-r--r--include/scsi/scsi_transport_fc.h1
-rw-r--r--include/uapi/asm-generic/errno.h11
-rw-r--r--include/uapi/linux/quota.h6
-rw-r--r--init/main.c4
-rw-r--r--kernel/fork.c141
-rw-r--r--kernel/gcov/base.c5
-rw-r--r--kernel/pid.c15
-rw-r--r--kernel/ptrace.c39
-rw-r--r--kernel/signal.c14
-rw-r--r--kernel/sys.c47
-rw-r--r--kernel/sysctl.c16
-rw-r--r--lib/Kconfig5
-rw-r--r--lib/Makefile2
-rw-r--r--lib/bitmap.c30
-rw-r--r--lib/cpumask.c9
-rw-r--r--lib/dma-debug.c2
-rw-r--r--lib/find_bit.c193
-rw-r--r--lib/find_last_bit.c36
-rw-r--r--lib/find_next_bit.c285
-rw-r--r--lib/string_helpers.c68
-rw-r--r--lib/vsprintf.c244
-rw-r--r--mm/filemap.c114
-rw-r--r--mm/page_io.c4
-rw-r--r--scripts/Makefile.kasan8
-rwxr-xr-xscripts/checkpatch.pl164
-rw-r--r--scripts/mod/devicetable-offsets.c3
-rw-r--r--scripts/mod/file2alias.c16
-rw-r--r--scripts/spelling.txt1
-rw-r--r--security/tomoyo/util.c13
-rw-r--r--sound/soc/codecs/pcm512x.c3
-rw-r--r--tools/power/acpi/os_specific/service_layers/oslinuxtbl.c2
-rw-r--r--tools/power/acpi/os_specific/service_layers/osunixmap.c2
760 files changed, 21032 insertions, 9822 deletions
diff --git a/.gitignore b/.gitignore
index acb6afe6b7a3..4ad4a98b884b 100644
--- a/.gitignore
+++ b/.gitignore
@@ -24,6 +24,7 @@
24*.order 24*.order
25*.elf 25*.elf
26*.bin 26*.bin
27*.tar
27*.gz 28*.gz
28*.bz2 29*.bz2
29*.lzma 30*.lzma
diff --git a/Documentation/CodingStyle b/Documentation/CodingStyle
index 449a8a19fc21..4d4f06d47e06 100644
--- a/Documentation/CodingStyle
+++ b/Documentation/CodingStyle
@@ -659,6 +659,19 @@ macros using parameters.
659#define CONSTANT 0x4000 659#define CONSTANT 0x4000
660#define CONSTEXP (CONSTANT | 3) 660#define CONSTEXP (CONSTANT | 3)
661 661
6625) namespace collisions when defining local variables in macros resembling
663functions:
664
665#define FOO(x) \
666({ \
667 typeof(x) ret; \
668 ret = calc_ret(x); \
669 (ret); \
670)}
671
672ret is a common name for a local variable - __foo_ret is less likely
673to collide with an existing variable.
674
662The cpp manual deals with macros exhaustively. The gcc internals manual also 675The cpp manual deals with macros exhaustively. The gcc internals manual also
663covers RTL which is used frequently with assembly language in the kernel. 676covers RTL which is used frequently with assembly language in the kernel.
664 677
diff --git a/Documentation/IRQ-domain.txt b/Documentation/IRQ-domain.txt
index 39cfa72732ff..3a8e15cba816 100644
--- a/Documentation/IRQ-domain.txt
+++ b/Documentation/IRQ-domain.txt
@@ -95,8 +95,7 @@ since it doesn't need to allocate a table as large as the largest
95hwirq number. The disadvantage is that hwirq to IRQ number lookup is 95hwirq number. The disadvantage is that hwirq to IRQ number lookup is
96dependent on how many entries are in the table. 96dependent on how many entries are in the table.
97 97
98Very few drivers should need this mapping. At the moment, powerpc 98Very few drivers should need this mapping.
99iseries is the only user.
100 99
101==== No Map ===- 100==== No Map ===-
102irq_domain_add_nomap() 101irq_domain_add_nomap()
diff --git a/Documentation/SubmittingPatches b/Documentation/SubmittingPatches
index 447671bd2927..b03a832a08e2 100644
--- a/Documentation/SubmittingPatches
+++ b/Documentation/SubmittingPatches
@@ -614,8 +614,8 @@ The canonical patch message body contains the following:
614 614
615 - An empty line. 615 - An empty line.
616 616
617 - The body of the explanation, which will be copied to the 617 - The body of the explanation, line wrapped at 75 columns, which will
618 permanent changelog to describe this patch. 618 be copied to the permanent changelog to describe this patch.
619 619
620 - The "Signed-off-by:" lines, described above, which will 620 - The "Signed-off-by:" lines, described above, which will
621 also go in the changelog. 621 also go in the changelog.
diff --git a/Documentation/blockdev/nbd.txt b/Documentation/blockdev/nbd.txt
index 271e607304da..db242ea2bce8 100644
--- a/Documentation/blockdev/nbd.txt
+++ b/Documentation/blockdev/nbd.txt
@@ -1,17 +1,31 @@
1 Network Block Device (TCP version) 1Network Block Device (TCP version)
2 2==================================
3 What is it: With this compiled in the kernel (or as a module), Linux 3
4 can use a remote server as one of its block devices. So every time 41) Overview
5 the client computer wants to read, e.g., /dev/nb0, it sends a 5-----------
6 request over TCP to the server, which will reply with the data read. 6
7 This can be used for stations with low disk space (or even diskless) 7What is it: With this compiled in the kernel (or as a module), Linux
8 to borrow disk space from another computer. 8can use a remote server as one of its block devices. So every time
9 Unlike NFS, it is possible to put any filesystem on it, etc. 9the client computer wants to read, e.g., /dev/nb0, it sends a
10 10request over TCP to the server, which will reply with the data read.
11 For more information, or to download the nbd-client and nbd-server 11This can be used for stations with low disk space (or even diskless)
12 tools, go to http://nbd.sf.net/. 12to borrow disk space from another computer.
13 13Unlike NFS, it is possible to put any filesystem on it, etc.
14 The nbd kernel module need only be installed on the client 14
15 system, as the nbd-server is completely in userspace. In fact, 15For more information, or to download the nbd-client and nbd-server
16 the nbd-server has been successfully ported to other operating 16tools, go to http://nbd.sf.net/.
17 systems, including Windows. 17
18The nbd kernel module need only be installed on the client
19system, as the nbd-server is completely in userspace. In fact,
20the nbd-server has been successfully ported to other operating
21systems, including Windows.
22
23A) NBD parameters
24-----------------
25
26max_part
27 Number of partitions per device (default: 0).
28
29nbds_max
30 Number of block devices that should be initialized (default: 16).
31
diff --git a/Documentation/devicetree/bindings/clock/pistachio-clock.txt b/Documentation/devicetree/bindings/clock/pistachio-clock.txt
new file mode 100644
index 000000000000..868db499eed2
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/pistachio-clock.txt
@@ -0,0 +1,123 @@
1Imagination Technologies Pistachio SoC clock controllers
2========================================================
3
4Pistachio has four clock controllers (core clock, peripheral clock, peripheral
5general control, and top general control) which are instantiated individually
6from the device-tree.
7
8External clocks:
9----------------
10
11There are three external inputs to the clock controllers which should be
12defined with the following clock-output-names:
13- "xtal": External 52Mhz oscillator (required)
14- "audio_clk_in": Alternate audio reference clock (optional)
15- "enet_clk_in": Alternate ethernet PHY clock (optional)
16
17Core clock controller:
18----------------------
19
20The core clock controller generates clocks for the CPU, RPU (WiFi + BT
21co-processor), audio, and several peripherals.
22
23Required properties:
24- compatible: Must be "img,pistachio-clk".
25- reg: Must contain the base address and length of the core clock controller.
26- #clock-cells: Must be 1. The single cell is the clock identifier.
27 See dt-bindings/clock/pistachio-clk.h for the list of valid identifiers.
28- clocks: Must contain an entry for each clock in clock-names.
29- clock-names: Must include "xtal" (see "External clocks") and
30 "audio_clk_in_gate", "enet_clk_in_gate" which are generated by the
31 top-level general control.
32
33Example:
34 clk_core: clock-controller@18144000 {
35 compatible = "img,pistachio-clk";
36 reg = <0x18144000 0x800>;
37 clocks = <&xtal>, <&cr_top EXT_CLK_AUDIO_IN>,
38 <&cr_top EXT_CLK_ENET_IN>;
39 clock-names = "xtal", "audio_clk_in_gate", "enet_clk_in_gate";
40
41 #clock-cells = <1>;
42 };
43
44Peripheral clock controller:
45----------------------------
46
47The peripheral clock controller generates clocks for the DDR, ROM, and other
48peripherals. The peripheral system clock ("periph_sys") generated by the core
49clock controller is the input clock to the peripheral clock controller.
50
51Required properties:
52- compatible: Must be "img,pistachio-periph-clk".
53- reg: Must contain the base address and length of the peripheral clock
54 controller.
55- #clock-cells: Must be 1. The single cell is the clock identifier.
56 See dt-bindings/clock/pistachio-clk.h for the list of valid identifiers.
57- clocks: Must contain an entry for each clock in clock-names.
58- clock-names: Must include "periph_sys", the peripheral system clock generated
59 by the core clock controller.
60
61Example:
62 clk_periph: clock-controller@18144800 {
63 compatible = "img,pistachio-clk-periph";
64 reg = <0x18144800 0x800>;
65 clocks = <&clk_core CLK_PERIPH_SYS>;
66 clock-names = "periph_sys";
67
68 #clock-cells = <1>;
69 };
70
71Peripheral general control:
72---------------------------
73
74The peripheral general control block generates system interface clocks and
75resets for various peripherals. It also contains miscellaneous peripheral
76control registers. The system clock ("sys") generated by the peripheral clock
77controller is the input clock to the system clock controller.
78
79Required properties:
80- compatible: Must include "img,pistachio-periph-cr" and "syscon".
81- reg: Must contain the base address and length of the peripheral general
82 control registers.
83- #clock-cells: Must be 1. The single cell is the clock identifier.
84 See dt-bindings/clock/pistachio-clk.h for the list of valid identifiers.
85- clocks: Must contain an entry for each clock in clock-names.
86- clock-names: Must include "sys", the system clock generated by the peripheral
87 clock controller.
88
89Example:
90 cr_periph: syscon@18144800 {
91 compatible = "img,pistachio-cr-periph", "syscon";
92 reg = <0x18148000 0x1000>;
93 clocks = <&clock_periph PERIPH_CLK_PERIPH_SYS>;
94 clock-names = "sys";
95
96 #clock-cells = <1>;
97 };
98
99Top-level general control:
100--------------------------
101
102The top-level general control block contains miscellaneous control registers and
103gates for the external clocks "audio_clk_in" and "enet_clk_in".
104
105Required properties:
106- compatible: Must include "img,pistachio-cr-top" and "syscon".
107- reg: Must contain the base address and length of the top-level
108 control registers.
109- clocks: Must contain an entry for each clock in clock-names.
110- clock-names: Two optional clocks, "audio_clk_in" and "enet_clk_in" (see
111 "External clocks").
112- #clock-cells: Must be 1. The single cell is the clock identifier.
113 See dt-bindings/clock/pistachio-clk.h for the list of valid identifiers.
114
115Example:
116 cr_top: syscon@18144800 {
117 compatible = "img,pistachio-cr-top", "syscon";
118 reg = <0x18149000 0x200>;
119 clocks = <&audio_refclk>, <&ext_enet_in>;
120 clock-names = "audio_clk_in", "enet_clk_in";
121
122 #clock-cells = <1>;
123 };
diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm3380-l2-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm3380-l2-intc.txt
new file mode 100644
index 000000000000..8f48aad50868
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm3380-l2-intc.txt
@@ -0,0 +1,41 @@
1Broadcom BCM3380-style Level 1 / Level 2 interrupt controller
2
3This interrupt controller shows up in various forms on many BCM338x/BCM63xx
4chipsets. It has the following properties:
5
6- outputs a single interrupt signal to its interrupt controller parent
7
8- contains one or more enable/status word pairs, which often appear at
9 different offsets in different blocks
10
11- no atomic set/clear operations
12
13Required properties:
14
15- compatible: should be "brcm,bcm3380-l2-intc"
16- reg: specifies one or more enable/status pairs, in the following format:
17 <enable_reg 0x4 status_reg 0x4>...
18- interrupt-controller: identifies the node as an interrupt controller
19- #interrupt-cells: specifies the number of cells needed to encode an interrupt
20 source, should be 1.
21- interrupt-parent: specifies the phandle to the parent interrupt controller
22 this one is cascaded from
23- interrupts: specifies the interrupt line in the interrupt-parent controller
24 node, valid values depend on the type of parent interrupt controller
25
26Optional properties:
27
28- brcm,irq-can-wake: if present, this means the L2 controller can be used as a
29 wakeup source for system suspend/resume.
30
31Example:
32
33irq0_intc: interrupt-controller@10000020 {
34 compatible = "brcm,bcm3380-l2-intc";
35 reg = <0x10000024 0x4 0x1000002c 0x4>,
36 <0x10000020 0x4 0x10000028 0x4>;
37 interrupt-controller;
38 #interrupt-cells = <1>;
39 interrupt-parent = <&cpu_intc>;
40 interrupts = <2>;
41};
diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.txt
new file mode 100644
index 000000000000..cc217b22dccd
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.txt
@@ -0,0 +1,52 @@
1Broadcom BCM7038-style Level 1 interrupt controller
2
3This block is a first level interrupt controller that is typically connected
4directly to one of the HW INT lines on each CPU. Every BCM7xxx set-top chip
5since BCM7038 has contained this hardware.
6
7Key elements of the hardware design include:
8
9- 64, 96, 128, or 160 incoming level IRQ lines
10
11- Most onchip peripherals are wired directly to an L1 input
12
13- A separate instance of the register set for each CPU, allowing individual
14 peripheral IRQs to be routed to any CPU
15
16- Atomic mask/unmask operations
17
18- No polarity/level/edge settings
19
20- No FIFO or priority encoder logic; software is expected to read all
21 2-5 status words to determine which IRQs are pending
22
23Required properties:
24
25- compatible: should be "brcm,bcm7038-l1-intc"
26- reg: specifies the base physical address and size of the registers;
27 the number of supported IRQs is inferred from the size argument
28- interrupt-controller: identifies the node as an interrupt controller
29- #interrupt-cells: specifies the number of cells needed to encode an interrupt
30 source, should be 1.
31- interrupt-parent: specifies the phandle to the parent interrupt controller(s)
32 this one is cascaded from
33- interrupts: specifies the interrupt line(s) in the interrupt-parent controller
34 node; valid values depend on the type of parent interrupt controller
35
36If multiple reg ranges and interrupt-parent entries are present on an SMP
37system, the driver will allow IRQ SMP affinity to be set up through the
38/proc/irq/ interface. In the simplest possible configuration, only one
39reg range and one interrupt-parent is needed.
40
41Example:
42
43periph_intc: periph_intc@1041a400 {
44 compatible = "brcm,bcm7038-l1-intc";
45 reg = <0x1041a400 0x30 0x1041a600 0x30>;
46
47 interrupt-controller;
48 #interrupt-cells = <1>;
49
50 interrupt-parent = <&cpu_intc>;
51 interrupts = <2>, <3>;
52};
diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.txt
index bae1f2187226..44a9bb15dd56 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.txt
@@ -13,8 +13,7 @@ Such an interrupt controller has the following hardware design:
13 or if they will output an interrupt signal at this 2nd level interrupt 13 or if they will output an interrupt signal at this 2nd level interrupt
14 controller, in particular for UARTs 14 controller, in particular for UARTs
15 15
16- typically has one 32-bit enable word and one 32-bit status word, but on 16- has one 32-bit enable word and one 32-bit status word
17 some hardware may have more than one enable/status pair
18 17
19- no atomic set/clear operations 18- no atomic set/clear operations
20 19
@@ -53,9 +52,7 @@ The typical hardware layout for this controller is represented below:
53Required properties: 52Required properties:
54 53
55- compatible: should be "brcm,bcm7120-l2-intc" 54- compatible: should be "brcm,bcm7120-l2-intc"
56- reg: specifies the base physical address and size of the registers; 55- reg: specifies the base physical address and size of the registers
57 multiple pairs may be specified, with the first pair handling IRQ offsets
58 0..31 and the second pair handling 32..63
59- interrupt-controller: identifies the node as an interrupt controller 56- interrupt-controller: identifies the node as an interrupt controller
60- #interrupt-cells: specifies the number of cells needed to encode an interrupt 57- #interrupt-cells: specifies the number of cells needed to encode an interrupt
61 source, should be 1. 58 source, should be 1.
@@ -66,10 +63,7 @@ Required properties:
66- brcm,int-map-mask: 32-bits bit mask describing how many and which interrupts 63- brcm,int-map-mask: 32-bits bit mask describing how many and which interrupts
67 are wired to this 2nd level interrupt controller, and how they match their 64 are wired to this 2nd level interrupt controller, and how they match their
68 respective interrupt parents. Should match exactly the number of interrupts 65 respective interrupt parents. Should match exactly the number of interrupts
69 specified in the 'interrupts' property, multiplied by the number of 66 specified in the 'interrupts' property.
70 enable/status register pairs implemented by this controller. For
71 multiple parent IRQs with multiple enable/status words, this looks like:
72 <irq0_w0 irq0_w1 irq1_w0 irq1_w1 ...>
73 67
74Optional properties: 68Optional properties:
75 69
diff --git a/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-mx.txt b/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-mx.txt
new file mode 100644
index 000000000000..d4de980e55fa
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-mx.txt
@@ -0,0 +1,18 @@
1* Xtensa Interrupt Distributor and Programmable Interrupt Controller (MX)
2
3Required properties:
4- compatible: Should be "cdns,xtensa-mx".
5
6Remaining properties have exact same meaning as in Xtensa PIC
7(see cdns,xtensa-pic.txt).
8
9Examples:
10 pic: pic {
11 compatible = "cdns,xtensa-mx";
12 /* one cell: internal irq number,
13 * two cells: second cell == 0: internal irq number
14 * second cell == 1: external irq number
15 */
16 #interrupt-cells = <2>;
17 interrupt-controller;
18 };
diff --git a/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.txt
new file mode 100644
index 000000000000..026ef4cfc1d5
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.txt
@@ -0,0 +1,25 @@
1* Xtensa built-in Programmable Interrupt Controller (PIC)
2
3Required properties:
4- compatible: Should be "cdns,xtensa-pic".
5- interrupt-controller: Identifies the node as an interrupt controller.
6- #interrupt-cells: The number of cells to define the interrupts.
7 It may be either 1 or 2.
8 When it's 1, the first cell is the internal IRQ number.
9 When it's 2, the first cell is the IRQ number, and the second cell
10 specifies whether it's internal (0) or external (1).
11 Periferals are usually connected to a fixed external IRQ, but for different
12 core variants it may be mapped to different internal IRQ.
13 IRQ sensitivity and priority are fixed for each core variant and may not be
14 changed at runtime.
15
16Examples:
17 pic: pic {
18 compatible = "cdns,xtensa-pic";
19 /* one cell: internal irq number,
20 * two cells: second cell == 0: internal irq number
21 * second cell == 1: external irq number
22 */
23 #interrupt-cells = <2>;
24 interrupt-controller;
25 };
diff --git a/Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt b/Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt
index 5a65478e5d40..aae4c384ee1f 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt
@@ -27,8 +27,13 @@ Optional properties:
27Required properties for timer sub-node: 27Required properties for timer sub-node:
28- compatible : Should be "mti,gic-timer". 28- compatible : Should be "mti,gic-timer".
29- interrupts : Interrupt for the GIC local timer. 29- interrupts : Interrupt for the GIC local timer.
30
31Optional properties for timer sub-node:
32- clocks : GIC timer operating clock.
30- clock-frequency : Clock frequency at which the GIC timers operate. 33- clock-frequency : Clock frequency at which the GIC timers operate.
31 34
35Note that one of clocks or clock-frequency must be specified.
36
32Example: 37Example:
33 38
34 gic: interrupt-controller@1bdc0000 { 39 gic: interrupt-controller@1bdc0000 {
diff --git a/Documentation/devicetree/bindings/mailbox/arm-mhu.txt b/Documentation/devicetree/bindings/mailbox/arm-mhu.txt
new file mode 100644
index 000000000000..4971f03f0b33
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/arm-mhu.txt
@@ -0,0 +1,43 @@
1ARM MHU Mailbox Driver
2======================
3
4The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has
53 independent channels/links to communicate with remote processor(s).
6 MHU links are hardwired on a platform. A link raises interrupt for any
7received data. However, there is no specified way of knowing if the sent
8data has been read by the remote. This driver assumes the sender polls
9STAT register and the remote clears it after having read the data.
10The last channel is specified to be a 'Secure' resource, hence can't be
11used by Linux running NS.
12
13Mailbox Device Node:
14====================
15
16Required properties:
17--------------------
18- compatible: Shall be "arm,mhu" & "arm,primecell"
19- reg: Contains the mailbox register address range (base
20 address and length)
21- #mbox-cells Shall be 1 - the index of the channel needed.
22- interrupts: Contains the interrupt information corresponding to
23 each of the 3 links of MHU.
24
25Example:
26--------
27
28 mhu: mailbox@2b1f0000 {
29 #mbox-cells = <1>;
30 compatible = "arm,mhu", "arm,primecell";
31 reg = <0 0x2b1f0000 0x1000>;
32 interrupts = <0 36 4>, /* LP-NonSecure */
33 <0 35 4>, /* HP-NonSecure */
34 <0 37 4>; /* Secure */
35 clocks = <&clock 0 2 1>;
36 clock-names = "apb_pclk";
37 };
38
39 mhu_client: scb@2e000000 {
40 compatible = "fujitsu,mb86s70-scb-1.0";
41 reg = <0 0x2e000000 0x4000>;
42 mboxes = <&mhu 1>; /* HP-NonSecure */
43 };
diff --git a/Documentation/devicetree/bindings/mips/brcm/bcm3384-intc.txt b/Documentation/devicetree/bindings/mips/brcm/bcm3384-intc.txt
deleted file mode 100644
index d4e0141d3620..000000000000
--- a/Documentation/devicetree/bindings/mips/brcm/bcm3384-intc.txt
+++ /dev/null
@@ -1,37 +0,0 @@
1* Interrupt Controller
2
3Properties:
4- compatible: "brcm,bcm3384-intc"
5
6 Compatibility with BCM3384 and possibly other BCM33xx/BCM63xx SoCs.
7
8- reg: Address/length pairs for each mask/status register set. Length must
9 be 8. If multiple register sets are specified, the first set will
10 handle IRQ offsets 0..31, the second set 32..63, and so on.
11
12- interrupt-controller: This is an interrupt controller.
13
14- #interrupt-cells: Must be <1>. Just a simple IRQ offset; no level/edge
15 or polarity configuration is possible with this controller.
16
17- interrupt-parent: This controller is cascaded from a MIPS CPU HW IRQ, or
18 from another INTC.
19
20- interrupts: The IRQ on the parent controller.
21
22Example:
23 periph_intc: periph_intc@14e00038 {
24 compatible = "brcm,bcm3384-intc";
25
26 /*
27 * IRQs 0..31: mask reg 0x14e00038, status reg 0x14e0003c
28 * IRQs 32..63: mask reg 0x14e00340, status reg 0x14e00344
29 */
30 reg = <0x14e00038 0x8 0x14e00340 0x8>;
31
32 interrupt-controller;
33 #interrupt-cells = <1>;
34
35 interrupt-parent = <&cpu_intc>;
36 interrupts = <4>;
37 };
diff --git a/Documentation/devicetree/bindings/mips/brcm/cm-dsl.txt b/Documentation/devicetree/bindings/mips/brcm/cm-dsl.txt
deleted file mode 100644
index 8a139cb3c0b5..000000000000
--- a/Documentation/devicetree/bindings/mips/brcm/cm-dsl.txt
+++ /dev/null
@@ -1,11 +0,0 @@
1* Broadcom cable/DSL platforms
2
3SoCs:
4
5Required properties:
6- compatible: "brcm,bcm3384", "brcm,bcm33843"
7
8Boards:
9
10Required properties:
11- compatible: "brcm,bcm93384wvg"
diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.txt b/Documentation/devicetree/bindings/mips/brcm/soc.txt
new file mode 100644
index 000000000000..7bab90cc4a7b
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/brcm/soc.txt
@@ -0,0 +1,12 @@
1* Broadcom cable/DSL/settop platforms
2
3Required properties:
4
5- compatible: "brcm,bcm3384", "brcm,bcm33843"
6 "brcm,bcm3384-viper", "brcm,bcm33843-viper"
7 "brcm,bcm6328", "brcm,bcm6368",
8 "brcm,bcm7125", "brcm,bcm7346", "brcm,bcm7358", "brcm,bcm7360",
9 "brcm,bcm7362", "brcm,bcm7420", "brcm,bcm7425"
10
11The experimental -viper variants are for running Linux on the 3384's
12BMIPS4355 cable modem CPU instead of the BMIPS5000 application processor.
diff --git a/Documentation/devicetree/bindings/mips/img/pistachio.txt b/Documentation/devicetree/bindings/mips/img/pistachio.txt
new file mode 100644
index 000000000000..a736d889c2b8
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/img/pistachio.txt
@@ -0,0 +1,42 @@
1Imagination Pistachio SoC
2=========================
3
4Required properties:
5--------------------
6 - compatible: Must include "img,pistachio".
7
8CPU nodes:
9----------
10A "cpus" node is required. Required properties:
11 - #address-cells: Must be 1.
12 - #size-cells: Must be 0.
13A CPU sub-node is also required for at least CPU 0. Since the topology may
14be probed via CPS, it is not necessary to specify secondary CPUs. Required
15propertis:
16 - device_type: Must be "cpu".
17 - compatible: Must be "mti,interaptiv".
18 - reg: CPU number.
19 - clocks: Must include the CPU clock. See ../../clock/clock-bindings.txt for
20 details on clock bindings.
21Example:
22 cpus {
23 #address-cells = <1>;
24 #size-cells = <0>;
25
26 cpu0: cpu@0 {
27 device_type = "cpu";
28 compatible = "mti,interaptiv";
29 reg = <0>;
30 clocks = <&clk_core CLK_MIPS>;
31 };
32 };
33
34
35Boot protocol:
36--------------
37In accordance with the MIPS UHI specification[1], the bootloader must pass the
38following arguments to the kernel:
39 - $a0: -2.
40 - $a1: KSEG0 address of the flattened device-tree blob.
41
42[1] http://prplfoundation.org/wiki/MIPS_documentation
diff --git a/Documentation/devicetree/bindings/rtc/digicolor-rtc.txt b/Documentation/devicetree/bindings/rtc/digicolor-rtc.txt
new file mode 100644
index 000000000000..d464986012cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/digicolor-rtc.txt
@@ -0,0 +1,17 @@
1Conexant Digicolor Real Time Clock controller
2
3This binding currently supports the CX92755 SoC.
4
5Required properties:
6- compatible: should be "cnxt,cx92755-rtc"
7- reg: physical base address of the controller and length of memory mapped
8 region.
9- interrupts: rtc alarm interrupt
10
11Example:
12
13 rtc@f0000c30 {
14 compatible = "cnxt,cx92755-rtc";
15 reg = <0xf0000c30 0x18>;
16 interrupts = <25>;
17 };
diff --git a/Documentation/devicetree/bindings/rtc/stmp3xxx-rtc.txt b/Documentation/devicetree/bindings/rtc/stmp3xxx-rtc.txt
index b800070fe6e9..fa6a94226669 100644
--- a/Documentation/devicetree/bindings/rtc/stmp3xxx-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/stmp3xxx-rtc.txt
@@ -7,6 +7,11 @@ Required properties:
7 region. 7 region.
8- interrupts: rtc alarm interrupt 8- interrupts: rtc alarm interrupt
9 9
10Optional properties:
11- stmp,crystal-freq: override crystal frequency as determined from fuse bits.
12 Only <32000> and <32768> are possible for the hardware. Use <0> for
13 "no crystal".
14
10Example: 15Example:
11 16
12rtc@80056000 { 17rtc@80056000 {
diff --git a/Documentation/devicetree/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt
index 77685185cf3b..e49e423268c0 100644
--- a/Documentation/devicetree/booting-without-of.txt
+++ b/Documentation/devicetree/booting-without-of.txt
@@ -15,6 +15,7 @@ Table of Contents
15 1) Entry point for arch/arm 15 1) Entry point for arch/arm
16 2) Entry point for arch/powerpc 16 2) Entry point for arch/powerpc
17 3) Entry point for arch/x86 17 3) Entry point for arch/x86
18 4) Entry point for arch/mips/bmips
18 19
19 II - The DT block format 20 II - The DT block format
20 1) Header 21 1) Header
@@ -288,6 +289,33 @@ it with special cases.
288 or initrd address. It simply holds information which can not be retrieved 289 or initrd address. It simply holds information which can not be retrieved
289 otherwise like interrupt routing or a list of devices behind an I2C bus. 290 otherwise like interrupt routing or a list of devices behind an I2C bus.
290 291
2924) Entry point for arch/mips/bmips
293----------------------------------
294
295 Some bootloaders only support a single entry point, at the start of the
296 kernel image. Other bootloaders will jump to the ELF start address.
297 Both schemes are supported; CONFIG_BOOT_RAW=y and CONFIG_NO_EXCEPT_FILL=y,
298 so the first instruction immediately jumps to kernel_entry().
299
300 Similar to the arch/arm case (b), a DT-aware bootloader is expected to
301 set up the following registers:
302
303 a0 : 0
304
305 a1 : 0xffffffff
306
307 a2 : Physical pointer to the device tree block (defined in chapter
308 II) in RAM. The device tree can be located anywhere in the first
309 512MB of the physical address space (0x00000000 - 0x1fffffff),
310 aligned on a 64 bit boundary.
311
312 Legacy bootloaders do not use this convention, and they do not pass in a
313 DT block. In this case, Linux will look for a builtin DTB, selected via
314 CONFIG_DT_*.
315
316 This convention is defined for 32-bit systems only, as there are not
317 currently any 64-bit BMIPS implementations.
318
291II - The DT block format 319II - The DT block format
292======================== 320========================
293 321
diff --git a/Documentation/filesystems/Locking b/Documentation/filesystems/Locking
index 7c3f187d48bf..0a926e2ba3ab 100644
--- a/Documentation/filesystems/Locking
+++ b/Documentation/filesystems/Locking
@@ -196,7 +196,7 @@ prototypes:
196 void (*invalidatepage) (struct page *, unsigned int, unsigned int); 196 void (*invalidatepage) (struct page *, unsigned int, unsigned int);
197 int (*releasepage) (struct page *, int); 197 int (*releasepage) (struct page *, int);
198 void (*freepage)(struct page *); 198 void (*freepage)(struct page *);
199 int (*direct_IO)(int, struct kiocb *, struct iov_iter *iter, loff_t offset); 199 int (*direct_IO)(struct kiocb *, struct iov_iter *iter, loff_t offset);
200 int (*migratepage)(struct address_space *, struct page *, struct page *); 200 int (*migratepage)(struct address_space *, struct page *, struct page *);
201 int (*launder_page)(struct page *); 201 int (*launder_page)(struct page *);
202 int (*is_partially_uptodate)(struct page *, unsigned long, unsigned long); 202 int (*is_partially_uptodate)(struct page *, unsigned long, unsigned long);
diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt
index a07ba61662ed..8e36c7e3c345 100644
--- a/Documentation/filesystems/proc.txt
+++ b/Documentation/filesystems/proc.txt
@@ -200,12 +200,12 @@ contains details information about the process itself. Its fields are
200explained in Table 1-4. 200explained in Table 1-4.
201 201
202(for SMP CONFIG users) 202(for SMP CONFIG users)
203For making accounting scalable, RSS related information are handled in 203For making accounting scalable, RSS related information are handled in an
204asynchronous manner and the vaule may not be very precise. To see a precise 204asynchronous manner and the value may not be very precise. To see a precise
205snapshot of a moment, you can see /proc/<pid>/smaps file and scan page table. 205snapshot of a moment, you can see /proc/<pid>/smaps file and scan page table.
206It's slow but very precise. 206It's slow but very precise.
207 207
208Table 1-2: Contents of the status files (as of 2.6.30-rc7) 208Table 1-2: Contents of the status files (as of 3.20.0)
209.............................................................................. 209..............................................................................
210 Field Content 210 Field Content
211 Name filename of the executable 211 Name filename of the executable
@@ -213,6 +213,7 @@ Table 1-2: Contents of the status files (as of 2.6.30-rc7)
213 in an uninterruptible wait, Z is zombie, 213 in an uninterruptible wait, Z is zombie,
214 T is traced or stopped) 214 T is traced or stopped)
215 Tgid thread group ID 215 Tgid thread group ID
216 Ngid NUMA group ID (0 if none)
216 Pid process id 217 Pid process id
217 PPid process id of the parent process 218 PPid process id of the parent process
218 TracerPid PID of process tracing this process (0 if not) 219 TracerPid PID of process tracing this process (0 if not)
@@ -220,6 +221,10 @@ Table 1-2: Contents of the status files (as of 2.6.30-rc7)
220 Gid Real, effective, saved set, and file system GIDs 221 Gid Real, effective, saved set, and file system GIDs
221 FDSize number of file descriptor slots currently allocated 222 FDSize number of file descriptor slots currently allocated
222 Groups supplementary group list 223 Groups supplementary group list
224 NStgid descendant namespace thread group ID hierarchy
225 NSpid descendant namespace process ID hierarchy
226 NSpgid descendant namespace process group ID hierarchy
227 NSsid descendant namespace session ID hierarchy
223 VmPeak peak virtual memory size 228 VmPeak peak virtual memory size
224 VmSize total program size 229 VmSize total program size
225 VmLck locked memory size 230 VmLck locked memory size
@@ -1704,6 +1709,10 @@ A typical output is
1704 flags: 0100002 1709 flags: 0100002
1705 mnt_id: 19 1710 mnt_id: 19
1706 1711
1712All locks associated with a file descriptor are shown in its fdinfo too.
1713
1714lock: 1: FLOCK ADVISORY WRITE 359 00:13:11691 0 EOF
1715
1707The files such as eventfd, fsnotify, signalfd, epoll among the regular pos/flags 1716The files such as eventfd, fsnotify, signalfd, epoll among the regular pos/flags
1708pair provide additional information particular to the objects they represent. 1717pair provide additional information particular to the objects they represent.
1709 1718
diff --git a/Documentation/filesystems/vfs.txt b/Documentation/filesystems/vfs.txt
index 207cdca68bed..5d833b32bbcd 100644
--- a/Documentation/filesystems/vfs.txt
+++ b/Documentation/filesystems/vfs.txt
@@ -590,7 +590,7 @@ struct address_space_operations {
590 void (*invalidatepage) (struct page *, unsigned int, unsigned int); 590 void (*invalidatepage) (struct page *, unsigned int, unsigned int);
591 int (*releasepage) (struct page *, int); 591 int (*releasepage) (struct page *, int);
592 void (*freepage)(struct page *); 592 void (*freepage)(struct page *);
593 ssize_t (*direct_IO)(int, struct kiocb *, struct iov_iter *iter, loff_t offset); 593 ssize_t (*direct_IO)(struct kiocb *, struct iov_iter *iter, loff_t offset);
594 /* migrate the contents of a page to the specified target */ 594 /* migrate the contents of a page to the specified target */
595 int (*migratepage) (struct page *, struct page *); 595 int (*migratepage) (struct page *, struct page *);
596 int (*launder_page) (struct page *); 596 int (*launder_page) (struct page *);
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 491bbd104b06..11a76df2e1f1 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -2317,7 +2317,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
2317 noexec32=off: disable non-executable mappings 2317 noexec32=off: disable non-executable mappings
2318 read implies executable mappings 2318 read implies executable mappings
2319 2319
2320 nofpu [SH] Disable hardware FPU at boot time. 2320 nofpu [MIPS,SH] Disable hardware FPU at boot time.
2321 2321
2322 nofxsr [BUGS=X86-32] Disables x86 floating point extended 2322 nofxsr [BUGS=X86-32] Disables x86 floating point extended
2323 register save and restore. The kernel will only save 2323 register save and restore. The kernel will only save
diff --git a/Documentation/spi/spidev_test.c b/Documentation/spi/spidev_test.c
index 94f574b0fdb2..135b3f592b83 100644
--- a/Documentation/spi/spidev_test.c
+++ b/Documentation/spi/spidev_test.c
@@ -80,7 +80,7 @@ static void hex_dump(const void *src, size_t length, size_t line_size, char *pre
80 * Unescape - process hexadecimal escape character 80 * Unescape - process hexadecimal escape character
81 * converts shell input "\x23" -> 0x23 81 * converts shell input "\x23" -> 0x23
82 */ 82 */
83int unespcape(char *_dst, char *_src, size_t len) 83static int unescape(char *_dst, char *_src, size_t len)
84{ 84{
85 int ret = 0; 85 int ret = 0;
86 char *src = _src; 86 char *src = _src;
@@ -304,7 +304,7 @@ int main(int argc, char *argv[])
304 size = strlen(input_tx+1); 304 size = strlen(input_tx+1);
305 tx = malloc(size); 305 tx = malloc(size);
306 rx = malloc(size); 306 rx = malloc(size);
307 size = unespcape((char *)tx, input_tx, size); 307 size = unescape((char *)tx, input_tx, size);
308 transfer(fd, tx, rx, size); 308 transfer(fd, tx, rx, size);
309 free(rx); 309 free(rx);
310 free(tx); 310 free(tx);
diff --git a/Documentation/sysctl/kernel.txt b/Documentation/sysctl/kernel.txt
index 99d7eb3a1416..c831001c45f1 100644
--- a/Documentation/sysctl/kernel.txt
+++ b/Documentation/sysctl/kernel.txt
@@ -872,6 +872,27 @@ can be ORed together:
872 872
873============================================================== 873==============================================================
874 874
875threads-max
876
877This value controls the maximum number of threads that can be created
878using fork().
879
880During initialization the kernel sets this value such that even if the
881maximum number of threads is created, the thread structures occupy only
882a part (1/8th) of the available RAM pages.
883
884The minimum value that can be written to threads-max is 20.
885The maximum value that can be written to threads-max is given by the
886constant FUTEX_TID_MASK (0x3fffffff).
887If a value outside of this range is written to threads-max an error
888EINVAL occurs.
889
890The value written is checked against the available RAM pages. If the
891thread structures would occupy too much (more than 1/8th) of the
892available RAM pages threads-max is reduced accordingly.
893
894==============================================================
895
875unknown_nmi_panic: 896unknown_nmi_panic:
876 897
877The value in this file affects behavior of handling NMI. When the 898The value in this file affects behavior of handling NMI. When the
diff --git a/MAINTAINERS b/MAINTAINERS
index 56a432d51119..f7bbaece5649 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1215,6 +1215,7 @@ F: arch/arm/mach-orion5x/ts78xx-*
1215ARM/Mediatek SoC support 1215ARM/Mediatek SoC support
1216M: Matthias Brugger <matthias.bgg@gmail.com> 1216M: Matthias Brugger <matthias.bgg@gmail.com>
1217L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1217L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1218L: linux-mediatek@lists.infradead.org (moderated for non-subscribers)
1218S: Maintained 1219S: Maintained
1219F: arch/arm/boot/dts/mt6* 1220F: arch/arm/boot/dts/mt6*
1220F: arch/arm/boot/dts/mt8* 1221F: arch/arm/boot/dts/mt8*
@@ -8107,7 +8108,7 @@ S: Maintained
8107F: drivers/net/wireless/rt2x00/ 8108F: drivers/net/wireless/rt2x00/
8108 8109
8109RAMDISK RAM BLOCK DEVICE DRIVER 8110RAMDISK RAM BLOCK DEVICE DRIVER
8110M: Nick Piggin <npiggin@kernel.dk> 8111M: Jens Axboe <axboe@kernel.dk>
8111S: Maintained 8112S: Maintained
8112F: Documentation/blockdev/ramdisk.txt 8113F: Documentation/blockdev/ramdisk.txt
8113F: drivers/block/brd.c 8114F: drivers/block/brd.c
@@ -8183,6 +8184,7 @@ X: kernel/torture.c
8183 8184
8184REAL TIME CLOCK (RTC) SUBSYSTEM 8185REAL TIME CLOCK (RTC) SUBSYSTEM
8185M: Alessandro Zummo <a.zummo@towertech.it> 8186M: Alessandro Zummo <a.zummo@towertech.it>
8187M: Alexandre Belloni <alexandre.belloni@free-electrons.com>
8186L: rtc-linux@googlegroups.com 8188L: rtc-linux@googlegroups.com
8187Q: http://patchwork.ozlabs.org/project/rtc-linux/list/ 8189Q: http://patchwork.ozlabs.org/project/rtc-linux/list/
8188S: Maintained 8190S: Maintained
@@ -8653,11 +8655,9 @@ F: drivers/scsi/sg.c
8653F: include/scsi/sg.h 8655F: include/scsi/sg.h
8654 8656
8655SCSI SUBSYSTEM 8657SCSI SUBSYSTEM
8656M: "James E.J. Bottomley" <JBottomley@parallels.com> 8658M: "James E.J. Bottomley" <JBottomley@odin.com>
8657L: linux-scsi@vger.kernel.org 8659L: linux-scsi@vger.kernel.org
8658T: git git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6.git 8660T: git git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi.git
8659T: git git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-rc-fixes-2.6.git
8660T: git git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-pending-2.6.git
8661S: Maintained 8661S: Maintained
8662F: drivers/scsi/ 8662F: drivers/scsi/
8663F: include/scsi/ 8663F: include/scsi/
diff --git a/arch/alpha/include/asm/processor.h b/arch/alpha/include/asm/processor.h
index b4cf03690394..43a7559c448b 100644
--- a/arch/alpha/include/asm/processor.h
+++ b/arch/alpha/include/asm/processor.h
@@ -44,6 +44,7 @@ struct task_struct;
44extern unsigned long thread_saved_pc(struct task_struct *); 44extern unsigned long thread_saved_pc(struct task_struct *);
45 45
46/* Do necessary setup to start up a newly executed thread. */ 46/* Do necessary setup to start up a newly executed thread. */
47struct pt_regs;
47extern void start_thread(struct pt_regs *, unsigned long, unsigned long); 48extern void start_thread(struct pt_regs *, unsigned long, unsigned long);
48 49
49/* Free all resources held by a thread. */ 50/* Free all resources held by a thread. */
diff --git a/arch/arc/kernel/troubleshoot.c b/arch/arc/kernel/troubleshoot.c
index 1badf9b84b51..e00a01879025 100644
--- a/arch/arc/kernel/troubleshoot.c
+++ b/arch/arc/kernel/troubleshoot.c
@@ -52,7 +52,7 @@ static void show_callee_regs(struct callee_regs *cregs)
52 print_reg_file(&(cregs->r13), 13); 52 print_reg_file(&(cregs->r13), 13);
53} 53}
54 54
55void print_task_path_n_nm(struct task_struct *tsk, char *buf) 55static void print_task_path_n_nm(struct task_struct *tsk, char *buf)
56{ 56{
57 struct path path; 57 struct path path;
58 char *path_nm = NULL; 58 char *path_nm = NULL;
@@ -77,7 +77,6 @@ void print_task_path_n_nm(struct task_struct *tsk, char *buf)
77done: 77done:
78 pr_info("Path: %s\n", path_nm); 78 pr_info("Path: %s\n", path_nm);
79} 79}
80EXPORT_SYMBOL(print_task_path_n_nm);
81 80
82static void show_faulting_vma(unsigned long address, char *buf) 81static void show_faulting_vma(unsigned long address, char *buf)
83{ 82{
diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild
index eb0f43f3e3f1..3c4596d0ce6c 100644
--- a/arch/arm/include/asm/Kbuild
+++ b/arch/arm/include/asm/Kbuild
@@ -21,6 +21,7 @@ generic-y += preempt.h
21generic-y += resource.h 21generic-y += resource.h
22generic-y += rwsem.h 22generic-y += rwsem.h
23generic-y += scatterlist.h 23generic-y += scatterlist.h
24generic-y += seccomp.h
24generic-y += sections.h 25generic-y += sections.h
25generic-y += segment.h 26generic-y += segment.h
26generic-y += sembuf.h 27generic-y += sembuf.h
diff --git a/arch/arm/include/asm/seccomp.h b/arch/arm/include/asm/seccomp.h
deleted file mode 100644
index 52b156b341f5..000000000000
--- a/arch/arm/include/asm/seccomp.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef _ASM_ARM_SECCOMP_H
2#define _ASM_ARM_SECCOMP_H
3
4#include <linux/unistd.h>
5
6#define __NR_seccomp_read __NR_read
7#define __NR_seccomp_write __NR_write
8#define __NR_seccomp_exit __NR_exit
9#define __NR_seccomp_sigreturn __NR_rt_sigreturn
10
11#endif /* _ASM_ARM_SECCOMP_H */
diff --git a/arch/c6x/Makefile b/arch/c6x/Makefile
index e72eb3417239..6b0be670ddfa 100644
--- a/arch/c6x/Makefile
+++ b/arch/c6x/Makefile
@@ -8,7 +8,7 @@
8 8
9KBUILD_DEFCONFIG := dsk6455_defconfig 9KBUILD_DEFCONFIG := dsk6455_defconfig
10 10
11cflags-y += -mno-dsbt -msdata=none 11cflags-y += -mno-dsbt -msdata=none -D__linux__
12 12
13cflags-$(CONFIG_C6X_BIG_KERNEL) += -mlong-calls 13cflags-$(CONFIG_C6X_BIG_KERNEL) += -mlong-calls
14 14
diff --git a/arch/c6x/include/asm/Kbuild b/arch/c6x/include/asm/Kbuild
index 2de73391b81e..ae0a51f5376c 100644
--- a/arch/c6x/include/asm/Kbuild
+++ b/arch/c6x/include/asm/Kbuild
@@ -41,6 +41,7 @@ generic-y += resource.h
41generic-y += scatterlist.h 41generic-y += scatterlist.h
42generic-y += segment.h 42generic-y += segment.h
43generic-y += sembuf.h 43generic-y += sembuf.h
44generic-y += serial.h
44generic-y += shmbuf.h 45generic-y += shmbuf.h
45generic-y += shmparam.h 46generic-y += shmparam.h
46generic-y += siginfo.h 47generic-y += siginfo.h
diff --git a/arch/c6x/include/asm/dma-mapping.h b/arch/c6x/include/asm/dma-mapping.h
index 88bd0d899bdb..bbd7774e4d4e 100644
--- a/arch/c6x/include/asm/dma-mapping.h
+++ b/arch/c6x/include/asm/dma-mapping.h
@@ -17,6 +17,14 @@
17 17
18#define dma_supported(d, m) 1 18#define dma_supported(d, m) 1
19 19
20static inline void dma_sync_single_range_for_device(struct device *dev,
21 dma_addr_t addr,
22 unsigned long offset,
23 size_t size,
24 enum dma_data_direction dir)
25{
26}
27
20static inline int dma_set_mask(struct device *dev, u64 dma_mask) 28static inline int dma_set_mask(struct device *dev, u64 dma_mask)
21{ 29{
22 if (!dev->dma_mask || !dma_supported(dev, dma_mask)) 30 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
diff --git a/arch/c6x/include/asm/flat.h b/arch/c6x/include/asm/flat.h
new file mode 100644
index 000000000000..a1858bd5f6c8
--- /dev/null
+++ b/arch/c6x/include/asm/flat.h
@@ -0,0 +1,12 @@
1#ifndef __ASM_C6X_FLAT_H
2#define __ASM_C6X_FLAT_H
3
4#define flat_argvp_envp_on_stack() 0
5#define flat_old_ram_flag(flags) (flags)
6#define flat_reloc_valid(reloc, size) ((reloc) <= (size))
7#define flat_get_addr_from_rp(rp, relval, flags, p) get_unaligned(rp)
8#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val, rp)
9#define flat_get_relocate_addr(rel) (rel)
10#define flat_set_persistent(relval, p) 0
11
12#endif /* __ASM_C6X_FLAT_H */
diff --git a/arch/c6x/include/asm/setup.h b/arch/c6x/include/asm/setup.h
index 696804475f55..852afb209afb 100644
--- a/arch/c6x/include/asm/setup.h
+++ b/arch/c6x/include/asm/setup.h
@@ -12,6 +12,7 @@
12#define _ASM_C6X_SETUP_H 12#define _ASM_C6X_SETUP_H
13 13
14#include <uapi/asm/setup.h> 14#include <uapi/asm/setup.h>
15#include <linux/types.h>
15 16
16#ifndef __ASSEMBLY__ 17#ifndef __ASSEMBLY__
17extern int c6x_add_memory(phys_addr_t start, unsigned long size); 18extern int c6x_add_memory(phys_addr_t start, unsigned long size);
diff --git a/arch/c6x/kernel/setup.c b/arch/c6x/kernel/setup.c
index 757128868d43..72e17f7ebd6f 100644
--- a/arch/c6x/kernel/setup.c
+++ b/arch/c6x/kernel/setup.c
@@ -26,7 +26,8 @@
26#include <linux/cpu.h> 26#include <linux/cpu.h>
27#include <linux/fs.h> 27#include <linux/fs.h>
28#include <linux/of.h> 28#include <linux/of.h>
29 29#include <linux/console.h>
30#include <linux/screen_info.h>
30 31
31#include <asm/sections.h> 32#include <asm/sections.h>
32#include <asm/div64.h> 33#include <asm/div64.h>
@@ -38,6 +39,8 @@
38 39
39static const char *c6x_soc_name; 40static const char *c6x_soc_name;
40 41
42struct screen_info screen_info;
43
41int c6x_num_cores; 44int c6x_num_cores;
42EXPORT_SYMBOL_GPL(c6x_num_cores); 45EXPORT_SYMBOL_GPL(c6x_num_cores);
43 46
@@ -60,6 +63,7 @@ unsigned char c6x_fuse_mac[6];
60 63
61unsigned long memory_start; 64unsigned long memory_start;
62unsigned long memory_end; 65unsigned long memory_end;
66EXPORT_SYMBOL(memory_end);
63 67
64unsigned long ram_start; 68unsigned long ram_start;
65unsigned long ram_end; 69unsigned long ram_end;
@@ -265,8 +269,8 @@ int __init c6x_add_memory(phys_addr_t start, unsigned long size)
265 */ 269 */
266notrace void __init machine_init(unsigned long dt_ptr) 270notrace void __init machine_init(unsigned long dt_ptr)
267{ 271{
268 const void *dtb = __va(dt_ptr); 272 void *dtb = __va(dt_ptr);
269 const void *fdt = _fdt_start; 273 void *fdt = _fdt_start;
270 274
271 /* interrupts must be masked */ 275 /* interrupts must be masked */
272 set_creg(IER, 2); 276 set_creg(IER, 2);
diff --git a/arch/c6x/kernel/time.c b/arch/c6x/kernel/time.c
index 356ee84cad95..04845aaf5985 100644
--- a/arch/c6x/kernel/time.c
+++ b/arch/c6x/kernel/time.c
@@ -49,7 +49,7 @@ u64 sched_clock(void)
49 return (tsc * sched_clock_multiplier) >> SCHED_CLOCK_SHIFT; 49 return (tsc * sched_clock_multiplier) >> SCHED_CLOCK_SHIFT;
50} 50}
51 51
52void time_init(void) 52void __init time_init(void)
53{ 53{
54 u64 tmp = (u64)NSEC_PER_SEC << SCHED_CLOCK_SHIFT; 54 u64 tmp = (u64)NSEC_PER_SEC << SCHED_CLOCK_SHIFT;
55 55
diff --git a/arch/c6x/platforms/cache.c b/arch/c6x/platforms/cache.c
index 86318a16a252..46fd2d530271 100644
--- a/arch/c6x/platforms/cache.c
+++ b/arch/c6x/platforms/cache.c
@@ -350,6 +350,7 @@ void L1P_cache_block_invalidate(unsigned int start, unsigned int end)
350 (unsigned int *) end, 350 (unsigned int *) end,
351 IMCR_L1PIBAR, IMCR_L1PIWC); 351 IMCR_L1PIBAR, IMCR_L1PIWC);
352} 352}
353EXPORT_SYMBOL(L1P_cache_block_invalidate);
353 354
354void L1D_cache_block_invalidate(unsigned int start, unsigned int end) 355void L1D_cache_block_invalidate(unsigned int start, unsigned int end)
355{ 356{
@@ -371,6 +372,7 @@ void L1D_cache_block_writeback(unsigned int start, unsigned int end)
371 (unsigned int *) end, 372 (unsigned int *) end,
372 IMCR_L1DWBAR, IMCR_L1DWWC); 373 IMCR_L1DWBAR, IMCR_L1DWWC);
373} 374}
375EXPORT_SYMBOL(L1D_cache_block_writeback);
374 376
375/* 377/*
376 * L2 block operations 378 * L2 block operations
diff --git a/arch/microblaze/include/asm/seccomp.h b/arch/microblaze/include/asm/seccomp.h
index 0d912758a0d7..204618a2ce84 100644
--- a/arch/microblaze/include/asm/seccomp.h
+++ b/arch/microblaze/include/asm/seccomp.h
@@ -3,14 +3,8 @@
3 3
4#include <linux/unistd.h> 4#include <linux/unistd.h>
5 5
6#define __NR_seccomp_read __NR_read
7#define __NR_seccomp_write __NR_write
8#define __NR_seccomp_exit __NR_exit
9#define __NR_seccomp_sigreturn __NR_sigreturn 6#define __NR_seccomp_sigreturn __NR_sigreturn
10 7
11#define __NR_seccomp_read_32 __NR_read 8#include <asm-generic/seccomp.h>
12#define __NR_seccomp_write_32 __NR_write
13#define __NR_seccomp_exit_32 __NR_exit
14#define __NR_seccomp_sigreturn_32 __NR_sigreturn
15 9
16#endif /* _ASM_MICROBLAZE_SECCOMP_H */ 10#endif /* _ASM_MICROBLAZE_SECCOMP_H */
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index e5fc463b36d0..39cf40da5f14 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -4,9 +4,9 @@ platforms += alchemy
4platforms += ar7 4platforms += ar7
5platforms += ath25 5platforms += ath25
6platforms += ath79 6platforms += ath79
7platforms += bcm3384
8platforms += bcm47xx 7platforms += bcm47xx
9platforms += bcm63xx 8platforms += bcm63xx
9platforms += bmips
10platforms += cavium-octeon 10platforms += cavium-octeon
11platforms += cobalt 11platforms += cobalt
12platforms += dec 12platforms += dec
@@ -21,6 +21,7 @@ platforms += mti-malta
21platforms += mti-sead3 21platforms += mti-sead3
22platforms += netlogic 22platforms += netlogic
23platforms += paravirt 23platforms += paravirt
24platforms += pistachio
24platforms += pmcs-msp71xx 25platforms += pmcs-msp71xx
25platforms += pnx833x 26platforms += pnx833x
26platforms += ralink 27platforms += ralink
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index a326c4cb8cf0..2198837c256f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -43,6 +43,7 @@ config MIPS
43 select GENERIC_SMP_IDLE_THREAD 43 select GENERIC_SMP_IDLE_THREAD
44 select BUILDTIME_EXTABLE_SORT 44 select BUILDTIME_EXTABLE_SORT
45 select GENERIC_CLOCKEVENTS 45 select GENERIC_CLOCKEVENTS
46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
46 select GENERIC_CMOS_UPDATE 47 select GENERIC_CMOS_UPDATE
47 select HAVE_MOD_ARCH_SPECIFIC 48 select HAVE_MOD_ARCH_SPECIFIC
48 select VIRT_TO_BUS 49 select VIRT_TO_BUS
@@ -55,6 +56,8 @@ config MIPS
55 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 56 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
56 select ARCH_BINFMT_ELF_STATE 57 select ARCH_BINFMT_ELF_STATE
57 select SYSCTL_EXCEPTION_TRACE 58 select SYSCTL_EXCEPTION_TRACE
59 select HAVE_VIRT_CPU_ACCOUNTING_GEN
60 select HAVE_IRQ_TIME_ACCOUNTING
58 61
59menu "Machine selection" 62menu "Machine selection"
60 63
@@ -131,8 +134,8 @@ config ATH79
131 help 134 help
132 Support for the Atheros AR71XX/AR724X/AR913X SoCs. 135 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
133 136
134config BCM3384 137config BMIPS_GENERIC
135 bool "Broadcom BCM3384 based boards" 138 bool "Broadcom Generic BMIPS kernel"
136 select BOOT_RAW 139 select BOOT_RAW
137 select NO_EXCEPT_FILL 140 select NO_EXCEPT_FILL
138 select USE_OF 141 select USE_OF
@@ -140,22 +143,30 @@ config BCM3384
140 select CSRC_R4K 143 select CSRC_R4K
141 select SYNC_R4K 144 select SYNC_R4K
142 select COMMON_CLK 145 select COMMON_CLK
143 select DMA_NONCOHERENT 146 select BCM7038_L1_IRQ
147 select BCM7120_L2_IRQ
148 select BRCMSTB_L2_IRQ
144 select IRQ_CPU 149 select IRQ_CPU
150 select RAW_IRQ_ACCESSORS
151 select DMA_NONCOHERENT
145 select SYS_SUPPORTS_32BIT_KERNEL 152 select SYS_SUPPORTS_32BIT_KERNEL
153 select SYS_SUPPORTS_LITTLE_ENDIAN
146 select SYS_SUPPORTS_BIG_ENDIAN 154 select SYS_SUPPORTS_BIG_ENDIAN
147 select SYS_SUPPORTS_HIGHMEM 155 select SYS_SUPPORTS_HIGHMEM
156 select SYS_HAS_CPU_BMIPS32_3300
157 select SYS_HAS_CPU_BMIPS4350
158 select SYS_HAS_CPU_BMIPS4380
148 select SYS_HAS_CPU_BMIPS5000 159 select SYS_HAS_CPU_BMIPS5000
149 select SWAP_IO_SPACE 160 select SWAP_IO_SPACE
150 select USB_EHCI_BIG_ENDIAN_DESC 161 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
151 select USB_EHCI_BIG_ENDIAN_MMIO 162 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
152 select USB_OHCI_BIG_ENDIAN_DESC 163 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
153 select USB_OHCI_BIG_ENDIAN_MMIO 164 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
154 help 165 help
155 Support for BCM3384 based boards. BCM3384/BCM33843 is a cable modem 166 Build a generic DT-based kernel image that boots on select
156 chipset with a Linux application processor that is often used to 167 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
157 provide Samba services, a CUPS print server, and/or advanced routing 168 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
158 features. 169 must be set appropriately for your board.
159 170
160config BCM47XX 171config BCM47XX
161 bool "Broadcom BCM47XX based boards" 172 bool "Broadcom BCM47XX based boards"
@@ -352,6 +363,33 @@ config MACH_LOONGSON1
352 the ICT (Institute of Computing Technology) and the Chinese Academy 363 the ICT (Institute of Computing Technology) and the Chinese Academy
353 of Sciences. 364 of Sciences.
354 365
366config MACH_PISTACHIO
367 bool "IMG Pistachio SoC based boards"
368 select ARCH_REQUIRE_GPIOLIB
369 select BOOT_ELF32
370 select BOOT_RAW
371 select CEVT_R4K
372 select CLKSRC_MIPS_GIC
373 select COMMON_CLK
374 select CSRC_R4K
375 select DMA_MAYBE_COHERENT
376 select IRQ_CPU
377 select LIBFDT
378 select MFD_SYSCON
379 select MIPS_CPU_SCACHE
380 select MIPS_GIC
381 select PINCTRL
382 select REGULATOR
383 select SYS_HAS_CPU_MIPS32_R2
384 select SYS_SUPPORTS_32BIT_KERNEL
385 select SYS_SUPPORTS_LITTLE_ENDIAN
386 select SYS_SUPPORTS_MIPS_CPS
387 select SYS_SUPPORTS_MULTITHREADING
388 select SYS_SUPPORTS_ZBOOT
389 select USE_OF
390 help
391 This enables support for the IMG Pistachio SoC platform.
392
355config MIPS_MALTA 393config MIPS_MALTA
356 bool "MIPS Malta board" 394 bool "MIPS Malta board"
357 select ARCH_MAY_HAVE_PC_FDC 395 select ARCH_MAY_HAVE_PC_FDC
@@ -377,6 +415,7 @@ config MIPS_MALTA
377 select SYS_HAS_CPU_MIPS32_R1 415 select SYS_HAS_CPU_MIPS32_R1
378 select SYS_HAS_CPU_MIPS32_R2 416 select SYS_HAS_CPU_MIPS32_R2
379 select SYS_HAS_CPU_MIPS32_R3_5 417 select SYS_HAS_CPU_MIPS32_R3_5
418 select SYS_HAS_CPU_MIPS32_R5
380 select SYS_HAS_CPU_MIPS32_R6 419 select SYS_HAS_CPU_MIPS32_R6
381 select SYS_HAS_CPU_MIPS64_R1 420 select SYS_HAS_CPU_MIPS64_R1
382 select SYS_HAS_CPU_MIPS64_R2 421 select SYS_HAS_CPU_MIPS64_R2
@@ -386,6 +425,7 @@ config MIPS_MALTA
386 select SYS_SUPPORTS_32BIT_KERNEL 425 select SYS_SUPPORTS_32BIT_KERNEL
387 select SYS_SUPPORTS_64BIT_KERNEL 426 select SYS_SUPPORTS_64BIT_KERNEL
388 select SYS_SUPPORTS_BIG_ENDIAN 427 select SYS_SUPPORTS_BIG_ENDIAN
428 select SYS_SUPPORTS_HIGHMEM
389 select SYS_SUPPORTS_LITTLE_ENDIAN 429 select SYS_SUPPORTS_LITTLE_ENDIAN
390 select SYS_SUPPORTS_MICROMIPS 430 select SYS_SUPPORTS_MICROMIPS
391 select SYS_SUPPORTS_MIPS_CMP 431 select SYS_SUPPORTS_MIPS_CMP
@@ -779,7 +819,8 @@ config CAVIUM_OCTEON_SOC
779 select SYS_SUPPORTS_64BIT_KERNEL 819 select SYS_SUPPORTS_64BIT_KERNEL
780 select SYS_SUPPORTS_BIG_ENDIAN 820 select SYS_SUPPORTS_BIG_ENDIAN
781 select EDAC_SUPPORT 821 select EDAC_SUPPORT
782 select SYS_SUPPORTS_HOTPLUG_CPU 822 select SYS_SUPPORTS_LITTLE_ENDIAN
823 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
783 select SYS_HAS_EARLY_PRINTK 824 select SYS_HAS_EARLY_PRINTK
784 select SYS_HAS_CPU_CAVIUM_OCTEON 825 select SYS_HAS_CPU_CAVIUM_OCTEON
785 select SWAP_IO_SPACE 826 select SWAP_IO_SPACE
@@ -793,6 +834,7 @@ config CAVIUM_OCTEON_SOC
793 select SYS_SUPPORTS_SMP 834 select SYS_SUPPORTS_SMP
794 select NR_CPUS_DEFAULT_16 835 select NR_CPUS_DEFAULT_16
795 select BUILTIN_DTB 836 select BUILTIN_DTB
837 select MTD_COMPLEX_MAPPINGS
796 help 838 help
797 This option supports all of the Octeon reference boards from Cavium 839 This option supports all of the Octeon reference boards from Cavium
798 Networks. It builds a kernel that dynamically determines the Octeon 840 Networks. It builds a kernel that dynamically determines the Octeon
@@ -887,6 +929,7 @@ source "arch/mips/ath25/Kconfig"
887source "arch/mips/ath79/Kconfig" 929source "arch/mips/ath79/Kconfig"
888source "arch/mips/bcm47xx/Kconfig" 930source "arch/mips/bcm47xx/Kconfig"
889source "arch/mips/bcm63xx/Kconfig" 931source "arch/mips/bcm63xx/Kconfig"
932source "arch/mips/bmips/Kconfig"
890source "arch/mips/jazz/Kconfig" 933source "arch/mips/jazz/Kconfig"
891source "arch/mips/jz4740/Kconfig" 934source "arch/mips/jz4740/Kconfig"
892source "arch/mips/lantiq/Kconfig" 935source "arch/mips/lantiq/Kconfig"
@@ -1202,10 +1245,10 @@ config MIPS_L1_CACHE_SHIFT_7
1202 1245
1203config MIPS_L1_CACHE_SHIFT 1246config MIPS_L1_CACHE_SHIFT
1204 int 1247 int
1205 default "4" if MIPS_L1_CACHE_SHIFT_4
1206 default "5" if MIPS_L1_CACHE_SHIFT_5
1207 default "6" if MIPS_L1_CACHE_SHIFT_6
1208 default "7" if MIPS_L1_CACHE_SHIFT_7 1248 default "7" if MIPS_L1_CACHE_SHIFT_7
1249 default "6" if MIPS_L1_CACHE_SHIFT_6
1250 default "5" if MIPS_L1_CACHE_SHIFT_5
1251 default "4" if MIPS_L1_CACHE_SHIFT_4
1209 default "5" 1252 default "5"
1210 1253
1211config HAVE_STD_PC_SERIAL_PORT 1254config HAVE_STD_PC_SERIAL_PORT
@@ -1572,6 +1615,7 @@ config CPU_XLP
1572 select WEAK_REORDERING_BEYOND_LLSC 1615 select WEAK_REORDERING_BEYOND_LLSC
1573 select CPU_HAS_PREFETCH 1616 select CPU_HAS_PREFETCH
1574 select CPU_MIPSR2 1617 select CPU_MIPSR2
1618 select CPU_SUPPORTS_HUGEPAGES
1575 help 1619 help
1576 Netlogic Microsystems XLP processors. 1620 Netlogic Microsystems XLP processors.
1577endchoice 1621endchoice
@@ -1596,6 +1640,33 @@ config CPU_MIPS32_3_5_EVA
1596 One of its primary benefits is an increase in the maximum size 1640 One of its primary benefits is an increase in the maximum size
1597 of lowmem (up to 3GB). If unsure, say 'N' here. 1641 of lowmem (up to 3GB). If unsure, say 'N' here.
1598 1642
1643config CPU_MIPS32_R5_FEATURES
1644 bool "MIPS32 Release 5 Features"
1645 depends on SYS_HAS_CPU_MIPS32_R5
1646 depends on CPU_MIPS32_R2
1647 help
1648 Choose this option to build a kernel for release 2 or later of the
1649 MIPS32 architecture including features from release 5 such as
1650 support for Extended Physical Addressing (XPA).
1651
1652config CPU_MIPS32_R5_XPA
1653 bool "Extended Physical Addressing (XPA)"
1654 depends on CPU_MIPS32_R5_FEATURES
1655 depends on !EVA
1656 depends on !PAGE_SIZE_4KB
1657 depends on SYS_SUPPORTS_HIGHMEM
1658 select XPA
1659 select HIGHMEM
1660 select ARCH_PHYS_ADDR_T_64BIT
1661 default n
1662 help
1663 Choose this option if you want to enable the Extended Physical
1664 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1665 benefit is to increase physical addressing equal to or greater
1666 than 40 bits. Note that this has the side effect of turning on
1667 64-bit addressing which in turn makes the PTEs 64-bit in size.
1668 If unsure, say 'N' here.
1669
1599if CPU_LOONGSON2F 1670if CPU_LOONGSON2F
1600config CPU_NOP_WORKAROUNDS 1671config CPU_NOP_WORKAROUNDS
1601 bool 1672 bool
@@ -1699,6 +1770,9 @@ config SYS_HAS_CPU_MIPS32_R2
1699config SYS_HAS_CPU_MIPS32_R3_5 1770config SYS_HAS_CPU_MIPS32_R3_5
1700 bool 1771 bool
1701 1772
1773config SYS_HAS_CPU_MIPS32_R5
1774 bool
1775
1702config SYS_HAS_CPU_MIPS32_R6 1776config SYS_HAS_CPU_MIPS32_R6
1703 bool 1777 bool
1704 1778
@@ -1836,6 +1910,9 @@ config CPU_MIPSR6
1836config EVA 1910config EVA
1837 bool 1911 bool
1838 1912
1913config XPA
1914 bool
1915
1839config SYS_SUPPORTS_32BIT_KERNEL 1916config SYS_SUPPORTS_32BIT_KERNEL
1840 bool 1917 bool
1841config SYS_SUPPORTS_64BIT_KERNEL 1918config SYS_SUPPORTS_64BIT_KERNEL
@@ -2072,7 +2149,7 @@ config MIPSR2_TO_R6_EMULATOR
2072 help 2149 help
2073 Choose this option if you want to run non-R6 MIPS userland code. 2150 Choose this option if you want to run non-R6 MIPS userland code.
2074 Even if you say 'Y' here, the emulator will still be disabled by 2151 Even if you say 'Y' here, the emulator will still be disabled by
2075 default. You can enable it using the 'mipsr2emul' kernel option. 2152 default. You can enable it using the 'mipsr2emu' kernel option.
2076 The only reason this is a build-time option is to save ~14K from the 2153 The only reason this is a build-time option is to save ~14K from the
2077 final kernel image. 2154 final kernel image.
2078comment "MIPS R2-to-R6 emulator is only available for UP kernels" 2155comment "MIPS R2-to-R6 emulator is only available for UP kernels"
@@ -2142,7 +2219,7 @@ config MIPS_CMP
2142 2219
2143config MIPS_CPS 2220config MIPS_CPS
2144 bool "MIPS Coherent Processing System support" 2221 bool "MIPS Coherent Processing System support"
2145 depends on SYS_SUPPORTS_MIPS_CPS 2222 depends on SYS_SUPPORTS_MIPS_CPS && !64BIT
2146 select MIPS_CM 2223 select MIPS_CM
2147 select MIPS_CPC 2224 select MIPS_CPC
2148 select MIPS_CPS_PM if HOTPLUG_CPU 2225 select MIPS_CPS_PM if HOTPLUG_CPU
@@ -2348,7 +2425,7 @@ config NODES_SHIFT
2348 2425
2349config HW_PERF_EVENTS 2426config HW_PERF_EVENTS
2350 bool "Enable hardware performance counter support for perf events" 2427 bool "Enable hardware performance counter support for perf events"
2351 depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP) 2428 depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
2352 default y 2429 default y
2353 help 2430 help
2354 Enable hardware performance counter support for perf events. If 2431 Enable hardware performance counter support for perf events. If
@@ -2500,6 +2577,9 @@ config HZ
2500 default 1000 if HZ_1000 2577 default 1000 if HZ_1000
2501 default 1024 if HZ_1024 2578 default 1024 if HZ_1024
2502 2579
2580config SCHED_HRTICK
2581 def_bool HIGH_RES_TIMERS
2582
2503source "kernel/Kconfig.preempt" 2583source "kernel/Kconfig.preempt"
2504 2584
2505config KEXEC 2585config KEXEC
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index d152dfbc360d..5200f649dd4e 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -197,11 +197,17 @@ endif
197# Warning: the 64-bit MIPS architecture does not support the `smartmips' extension 197# Warning: the 64-bit MIPS architecture does not support the `smartmips' extension
198# Pass -Wa,--no-warn to disable all assembler warnings until the kernel code has 198# Pass -Wa,--no-warn to disable all assembler warnings until the kernel code has
199# been fixed properly. 199# been fixed properly.
200mips-cflags := "$(cflags-y)" 200mips-cflags := $(cflags-y)
201cflags-$(CONFIG_CPU_HAS_SMARTMIPS) += $(call cc-option,$(mips-cflags),-msmartmips) -Wa,--no-warn 201ifeq ($(CONFIG_CPU_HAS_SMARTMIPS),y)
202cflags-$(CONFIG_CPU_MICROMIPS) += $(call cc-option,$(mips-cflags),-mmicromips) 202smartmips-ase := $(call cc-option-yn,$(mips-cflags) -msmartmips)
203cflags-$(smartmips-ase) += -msmartmips -Wa,--no-warn
204endif
205ifeq ($(CONFIG_CPU_MICROMIPS),y)
206micromips-ase := $(call cc-option-yn,$(mips-cflags) -mmicromips)
207cflags-$(micromips-ase) += -mmicromips
208endif
203ifeq ($(CONFIG_CPU_HAS_MSA),y) 209ifeq ($(CONFIG_CPU_HAS_MSA),y)
204toolchain-msa := $(call cc-option-yn,-$(mips-cflags),mhard-float -mfp64 -Wa$(comma)-mmsa) 210toolchain-msa := $(call cc-option-yn,$(mips-cflags) -mhard-float -mfp64 -Wa$(comma)-mmsa)
205cflags-$(toolchain-msa) += -DTOOLCHAIN_SUPPORTS_MSA 211cflags-$(toolchain-msa) += -DTOOLCHAIN_SUPPORTS_MSA
206endif 212endif
207 213
@@ -365,7 +371,11 @@ core-$(CONFIG_BUILTIN_DTB) += arch/mips/boot/dts/
365 371
366PHONY += dtbs 372PHONY += dtbs
367dtbs: scripts 373dtbs: scripts
368 $(Q)$(MAKE) $(build)=arch/mips/boot/dts dtbs 374 $(Q)$(MAKE) $(build)=arch/mips/boot/dts
375
376PHONY += dtbs_install
377dtbs_install:
378 $(Q)$(MAKE) $(dtbinst)=arch/mips/boot/dts
369 379
370archprepare: 380archprepare:
371ifdef CONFIG_MIPS32_N32 381ifdef CONFIG_MIPS32_N32
@@ -407,6 +417,7 @@ define archhelp
407 echo ' uImage.lzma - U-Boot image (lzma)' 417 echo ' uImage.lzma - U-Boot image (lzma)'
408 echo ' uImage.lzo - U-Boot image (lzo)' 418 echo ' uImage.lzo - U-Boot image (lzo)'
409 echo ' dtbs - Device-tree blobs for enabled boards' 419 echo ' dtbs - Device-tree blobs for enabled boards'
420 echo ' dtbs_install - Install dtbs to $(INSTALL_DTBS_PATH)'
410 echo 421 echo
411 echo ' These will be default as appropriate for a configured platform.' 422 echo ' These will be default as appropriate for a configured platform.'
412endef 423endef
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index af2441dbfc12..be9ff1673ded 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -307,10 +307,7 @@ static void __init cpmac_get_mac(int instance, unsigned char *dev_addr)
307 } 307 }
308 308
309 if (mac) { 309 if (mac) {
310 if (sscanf(mac, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", 310 if (!mac_pton(mac, dev_addr)) {
311 &dev_addr[0], &dev_addr[1],
312 &dev_addr[2], &dev_addr[3],
313 &dev_addr[4], &dev_addr[5]) != 6) {
314 pr_warn("cannot parse mac address, using random address\n"); 311 pr_warn("cannot parse mac address, using random address\n");
315 eth_random_addr(dev_addr); 312 eth_random_addr(dev_addr);
316 } 313 }
diff --git a/arch/mips/ath79/common.h b/arch/mips/ath79/common.h
index a3120714f0b7..c39de61f9b36 100644
--- a/arch/mips/ath79/common.h
+++ b/arch/mips/ath79/common.h
@@ -17,7 +17,7 @@
17#include <linux/types.h> 17#include <linux/types.h>
18 18
19#define ATH79_MEM_SIZE_MIN (2 * 1024 * 1024) 19#define ATH79_MEM_SIZE_MIN (2 * 1024 * 1024)
20#define ATH79_MEM_SIZE_MAX (128 * 1024 * 1024) 20#define ATH79_MEM_SIZE_MAX (256 * 1024 * 1024)
21 21
22void ath79_clocks_init(void); 22void ath79_clocks_init(void);
23unsigned long ath79_get_sys_clk_rate(const char *id); 23unsigned long ath79_get_sys_clk_rate(const char *id);
diff --git a/arch/mips/bcm3384/Platform b/arch/mips/bcm3384/Platform
deleted file mode 100644
index 8e1ca0819e1b..000000000000
--- a/arch/mips/bcm3384/Platform
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Broadcom BCM3384 boards
3#
4platform-$(CONFIG_BCM3384) += bcm3384/
5cflags-$(CONFIG_BCM3384) += \
6 -I$(srctree)/arch/mips/include/asm/mach-bcm3384/
7load-$(CONFIG_BCM3384) := 0xffffffff80010000
diff --git a/arch/mips/bcm3384/dma.c b/arch/mips/bcm3384/dma.c
deleted file mode 100644
index ea42012fd4f5..000000000000
--- a/arch/mips/bcm3384/dma.c
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2014 Kevin Cernekee <cernekee@gmail.com>
7 */
8
9#include <linux/device.h>
10#include <linux/dma-direction.h>
11#include <linux/dma-mapping.h>
12#include <linux/init.h>
13#include <linux/mm.h>
14#include <linux/of.h>
15#include <linux/pci.h>
16#include <linux/types.h>
17#include <dma-coherence.h>
18
19/*
20 * BCM3384 has configurable address translation windows which allow the
21 * peripherals' DMA addresses to be different from the Zephyr-visible
22 * physical addresses. e.g. usb_dma_addr = zephyr_pa ^ 0x08000000
23 *
24 * If our DT "memory" node has a "dma-xor-mask" property we will enable this
25 * translation using the provided offset.
26 */
27static u32 bcm3384_dma_xor_mask;
28static u32 bcm3384_dma_xor_limit = 0xffffffff;
29
30/*
31 * PCI collapses the memory hole at 0x10000000 - 0x1fffffff.
32 * On systems with a dma-xor-mask, this range is guaranteed to live above
33 * the dma-xor-limit.
34 */
35#define BCM3384_MEM_HOLE_PA 0x10000000
36#define BCM3384_MEM_HOLE_SIZE 0x10000000
37
38static dma_addr_t bcm3384_phys_to_dma(struct device *dev, phys_addr_t pa)
39{
40 if (dev && dev_is_pci(dev) &&
41 pa >= (BCM3384_MEM_HOLE_PA + BCM3384_MEM_HOLE_SIZE))
42 return pa - BCM3384_MEM_HOLE_SIZE;
43 if (pa <= bcm3384_dma_xor_limit)
44 return pa ^ bcm3384_dma_xor_mask;
45 return pa;
46}
47
48dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size)
49{
50 return bcm3384_phys_to_dma(dev, virt_to_phys(addr));
51}
52
53dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page)
54{
55 return bcm3384_phys_to_dma(dev, page_to_phys(page));
56}
57
58unsigned long plat_dma_addr_to_phys(struct device *dev, dma_addr_t dma_addr)
59{
60 if (dev && dev_is_pci(dev) &&
61 dma_addr >= BCM3384_MEM_HOLE_PA)
62 return dma_addr + BCM3384_MEM_HOLE_SIZE;
63 if ((dma_addr ^ bcm3384_dma_xor_mask) <= bcm3384_dma_xor_limit)
64 return dma_addr ^ bcm3384_dma_xor_mask;
65 return dma_addr;
66}
67
68static int __init bcm3384_init_dma_xor(void)
69{
70 struct device_node *np = of_find_node_by_type(NULL, "memory");
71
72 if (!np)
73 return 0;
74
75 of_property_read_u32(np, "dma-xor-mask", &bcm3384_dma_xor_mask);
76 of_property_read_u32(np, "dma-xor-limit", &bcm3384_dma_xor_limit);
77
78 of_node_put(np);
79 return 0;
80}
81arch_initcall(bcm3384_init_dma_xor);
diff --git a/arch/mips/bcm3384/irq.c b/arch/mips/bcm3384/irq.c
deleted file mode 100644
index fd94fe849af6..000000000000
--- a/arch/mips/bcm3384/irq.c
+++ /dev/null
@@ -1,193 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
5 *
6 * Partially based on arch/mips/ralink/irq.c
7 *
8 * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
9 * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
10 * Copyright (C) 2014 Kevin Cernekee <cernekee@gmail.com>
11 */
12
13#include <linux/io.h>
14#include <linux/bitops.h>
15#include <linux/of_platform.h>
16#include <linux/of_address.h>
17#include <linux/of_irq.h>
18#include <linux/irqdomain.h>
19#include <linux/interrupt.h>
20#include <linux/slab.h>
21#include <linux/spinlock.h>
22
23#include <asm/bmips.h>
24#include <asm/irq_cpu.h>
25#include <asm/mipsregs.h>
26
27/* INTC register offsets */
28#define INTC_REG_ENABLE 0x00
29#define INTC_REG_STATUS 0x04
30
31#define MAX_WORDS 2
32#define IRQS_PER_WORD 32
33
34struct bcm3384_intc {
35 int n_words;
36 void __iomem *reg[MAX_WORDS];
37 u32 enable[MAX_WORDS];
38 spinlock_t lock;
39};
40
41static void bcm3384_intc_irq_unmask(struct irq_data *d)
42{
43 struct bcm3384_intc *priv = d->domain->host_data;
44 unsigned long flags;
45 int idx = d->hwirq / IRQS_PER_WORD;
46 int bit = d->hwirq % IRQS_PER_WORD;
47
48 spin_lock_irqsave(&priv->lock, flags);
49 priv->enable[idx] |= BIT(bit);
50 __raw_writel(priv->enable[idx], priv->reg[idx] + INTC_REG_ENABLE);
51 spin_unlock_irqrestore(&priv->lock, flags);
52}
53
54static void bcm3384_intc_irq_mask(struct irq_data *d)
55{
56 struct bcm3384_intc *priv = d->domain->host_data;
57 unsigned long flags;
58 int idx = d->hwirq / IRQS_PER_WORD;
59 int bit = d->hwirq % IRQS_PER_WORD;
60
61 spin_lock_irqsave(&priv->lock, flags);
62 priv->enable[idx] &= ~BIT(bit);
63 __raw_writel(priv->enable[idx], priv->reg[idx] + INTC_REG_ENABLE);
64 spin_unlock_irqrestore(&priv->lock, flags);
65}
66
67static struct irq_chip bcm3384_intc_irq_chip = {
68 .name = "INTC",
69 .irq_unmask = bcm3384_intc_irq_unmask,
70 .irq_mask = bcm3384_intc_irq_mask,
71 .irq_mask_ack = bcm3384_intc_irq_mask,
72};
73
74unsigned int get_c0_compare_int(void)
75{
76 return CP0_LEGACY_COMPARE_IRQ;
77}
78
79static void bcm3384_intc_irq_handler(unsigned int irq, struct irq_desc *desc)
80{
81 struct irq_domain *domain = irq_get_handler_data(irq);
82 struct bcm3384_intc *priv = domain->host_data;
83 unsigned long flags;
84 unsigned int idx;
85
86 for (idx = 0; idx < priv->n_words; idx++) {
87 unsigned long pending;
88 int hwirq;
89
90 spin_lock_irqsave(&priv->lock, flags);
91 pending = __raw_readl(priv->reg[idx] + INTC_REG_STATUS) &
92 priv->enable[idx];
93 spin_unlock_irqrestore(&priv->lock, flags);
94
95 for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) {
96 generic_handle_irq(irq_find_mapping(domain,
97 hwirq + idx * IRQS_PER_WORD));
98 }
99 }
100}
101
102asmlinkage void plat_irq_dispatch(void)
103{
104 unsigned long pending =
105 (read_c0_status() & read_c0_cause() & ST0_IM) >> STATUSB_IP0;
106 int bit;
107
108 for_each_set_bit(bit, &pending, 8)
109 do_IRQ(MIPS_CPU_IRQ_BASE + bit);
110}
111
112static int intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
113{
114 irq_set_chip_and_handler(irq, &bcm3384_intc_irq_chip, handle_level_irq);
115 return 0;
116}
117
118static const struct irq_domain_ops irq_domain_ops = {
119 .xlate = irq_domain_xlate_onecell,
120 .map = intc_map,
121};
122
123static int __init ioremap_one_pair(struct bcm3384_intc *priv,
124 struct device_node *node,
125 int idx)
126{
127 struct resource res;
128
129 if (of_address_to_resource(node, idx, &res))
130 return 0;
131
132 if (request_mem_region(res.start, resource_size(&res),
133 res.name) < 0)
134 pr_err("Failed to request INTC register region\n");
135
136 priv->reg[idx] = ioremap_nocache(res.start, resource_size(&res));
137 if (!priv->reg[idx])
138 panic("Failed to ioremap INTC register range");
139
140 /* start up with everything masked before we hook the parent IRQ */
141 __raw_writel(0, priv->reg[idx] + INTC_REG_ENABLE);
142 priv->enable[idx] = 0;
143
144 return IRQS_PER_WORD;
145}
146
147static int __init intc_of_init(struct device_node *node,
148 struct device_node *parent)
149{
150 struct irq_domain *domain;
151 unsigned int parent_irq, n_irqs = 0;
152 struct bcm3384_intc *priv;
153
154 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
155 if (!priv)
156 panic("Failed to allocate bcm3384_intc struct");
157
158 spin_lock_init(&priv->lock);
159
160 parent_irq = irq_of_parse_and_map(node, 0);
161 if (!parent_irq)
162 panic("Failed to get INTC IRQ");
163
164 n_irqs += ioremap_one_pair(priv, node, 0);
165 n_irqs += ioremap_one_pair(priv, node, 1);
166
167 if (!n_irqs)
168 panic("Failed to map INTC registers");
169
170 priv->n_words = n_irqs / IRQS_PER_WORD;
171 domain = irq_domain_add_linear(node, n_irqs, &irq_domain_ops, priv);
172 if (!domain)
173 panic("Failed to add irqdomain");
174
175 irq_set_chained_handler(parent_irq, bcm3384_intc_irq_handler);
176 irq_set_handler_data(parent_irq, domain);
177
178 return 0;
179}
180
181static struct of_device_id of_irq_ids[] __initdata = {
182 { .compatible = "mti,cpu-interrupt-controller",
183 .data = mips_cpu_irq_of_init },
184 { .compatible = "brcm,bcm3384-intc",
185 .data = intc_of_init },
186 {},
187};
188
189void __init arch_init_irq(void)
190{
191 bmips_tp1_irqs = 0;
192 of_irq_init(of_irq_ids);
193}
diff --git a/arch/mips/bcm3384/setup.c b/arch/mips/bcm3384/setup.c
deleted file mode 100644
index d84b8400b874..000000000000
--- a/arch/mips/bcm3384/setup.c
+++ /dev/null
@@ -1,97 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7 * Copyright (C) 2014 Kevin Cernekee <cernekee@gmail.com>
8 */
9
10#include <linux/init.h>
11#include <linux/bootmem.h>
12#include <linux/clk-provider.h>
13#include <linux/ioport.h>
14#include <linux/of.h>
15#include <linux/of_fdt.h>
16#include <linux/of_platform.h>
17#include <linux/smp.h>
18#include <asm/addrspace.h>
19#include <asm/bmips.h>
20#include <asm/bootinfo.h>
21#include <asm/prom.h>
22#include <asm/smp-ops.h>
23#include <asm/time.h>
24
25void __init prom_init(void)
26{
27 register_bmips_smp_ops();
28}
29
30void __init prom_free_prom_memory(void)
31{
32}
33
34const char *get_system_type(void)
35{
36 return "BCM3384";
37}
38
39void __init plat_time_init(void)
40{
41 struct device_node *np;
42 u32 freq;
43
44 np = of_find_node_by_name(NULL, "cpus");
45 if (!np)
46 panic("missing 'cpus' DT node");
47 if (of_property_read_u32(np, "mips-hpt-frequency", &freq) < 0)
48 panic("missing 'mips-hpt-frequency' property");
49 of_node_put(np);
50
51 mips_hpt_frequency = freq;
52}
53
54void __init plat_mem_setup(void)
55{
56 void *dtb = __dtb_start;
57
58 set_io_port_base(0);
59 ioport_resource.start = 0;
60 ioport_resource.end = ~0;
61
62 /* intended to somewhat resemble ARM; see Documentation/arm/Booting */
63 if (fw_arg0 == 0 && fw_arg1 == 0xffffffff)
64 dtb = phys_to_virt(fw_arg2);
65
66 __dt_setup_arch(dtb);
67
68 strlcpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE);
69}
70
71void __init device_tree_init(void)
72{
73 struct device_node *np;
74
75 unflatten_and_copy_device_tree();
76
77 /* Disable SMP boot unless both CPUs are listed in DT and !disabled */
78 np = of_find_node_by_name(NULL, "cpus");
79 if (np && of_get_available_child_count(np) <= 1)
80 bmips_smp_enabled = 0;
81 of_node_put(np);
82}
83
84int __init plat_of_setup(void)
85{
86 return __dt_register_buses("brcm,bcm3384", "simple-bus");
87}
88
89arch_initcall(plat_of_setup);
90
91static int __init plat_dev_init(void)
92{
93 of_clk_init(NULL);
94 return 0;
95}
96
97device_initcall(plat_dev_init);
diff --git a/arch/mips/bcm47xx/bcm47xx_private.h b/arch/mips/bcm47xx/bcm47xx_private.h
index ea909a56a3ee..41796befa9df 100644
--- a/arch/mips/bcm47xx/bcm47xx_private.h
+++ b/arch/mips/bcm47xx/bcm47xx_private.h
@@ -1,6 +1,10 @@
1#ifndef LINUX_BCM47XX_PRIVATE_H_ 1#ifndef LINUX_BCM47XX_PRIVATE_H_
2#define LINUX_BCM47XX_PRIVATE_H_ 2#define LINUX_BCM47XX_PRIVATE_H_
3 3
4#ifndef pr_fmt
5#define pr_fmt(fmt) "bcm47xx: " fmt
6#endif
7
4#include <linux/kernel.h> 8#include <linux/kernel.h>
5 9
6/* prom.c */ 10/* prom.c */
diff --git a/arch/mips/bcm47xx/board.c b/arch/mips/bcm47xx/board.c
index b3ae068ca4fa..bd56415f2f3b 100644
--- a/arch/mips/bcm47xx/board.c
+++ b/arch/mips/bcm47xx/board.c
@@ -1,8 +1,8 @@
1#include <linux/errno.h> 1#include <linux/errno.h>
2#include <linux/export.h> 2#include <linux/export.h>
3#include <linux/string.h> 3#include <linux/string.h>
4#include <bcm47xx.h>
4#include <bcm47xx_board.h> 5#include <bcm47xx_board.h>
5#include <bcm47xx_nvram.h>
6 6
7struct bcm47xx_board_type { 7struct bcm47xx_board_type {
8 const enum bcm47xx_board board; 8 const enum bcm47xx_board board;
@@ -40,20 +40,6 @@ struct bcm47xx_board_type_list1 bcm47xx_board_list_model_name[] __initconst = {
40 { {0}, NULL}, 40 { {0}, NULL},
41}; 41};
42 42
43/* model_no */
44static const
45struct bcm47xx_board_type_list1 bcm47xx_board_list_model_no[] __initconst = {
46 {{BCM47XX_BOARD_ASUS_WL700GE, "Asus WL700"}, "WL700"},
47 { {0}, NULL},
48};
49
50/* machine_name */
51static const
52struct bcm47xx_board_type_list1 bcm47xx_board_list_machine_name[] __initconst = {
53 {{BCM47XX_BOARD_LINKSYS_WRTSL54GS, "Linksys WRTSL54GS"}, "WRTSL54GS"},
54 { {0}, NULL},
55};
56
57/* hardware_version */ 43/* hardware_version */
58static const 44static const
59struct bcm47xx_board_type_list1 bcm47xx_board_list_hardware_version[] __initconst = { 45struct bcm47xx_board_type_list1 bcm47xx_board_list_hardware_version[] __initconst = {
@@ -165,9 +151,11 @@ static const
165struct bcm47xx_board_type_list1 bcm47xx_board_list_board_id[] __initconst = { 151struct bcm47xx_board_type_list1 bcm47xx_board_list_board_id[] __initconst = {
166 {{BCM47XX_BOARD_NETGEAR_WGR614V8, "Netgear WGR614 V8"}, "U12H072T00_NETGEAR"}, 152 {{BCM47XX_BOARD_NETGEAR_WGR614V8, "Netgear WGR614 V8"}, "U12H072T00_NETGEAR"},
167 {{BCM47XX_BOARD_NETGEAR_WGR614V9, "Netgear WGR614 V9"}, "U12H094T00_NETGEAR"}, 153 {{BCM47XX_BOARD_NETGEAR_WGR614V9, "Netgear WGR614 V9"}, "U12H094T00_NETGEAR"},
154 {{BCM47XX_BOARD_NETGEAR_WGR614_V10, "Netgear WGR614 V10"}, "U12H139T01_NETGEAR"},
168 {{BCM47XX_BOARD_NETGEAR_WNDR3300, "Netgear WNDR3300"}, "U12H093T00_NETGEAR"}, 155 {{BCM47XX_BOARD_NETGEAR_WNDR3300, "Netgear WNDR3300"}, "U12H093T00_NETGEAR"},
169 {{BCM47XX_BOARD_NETGEAR_WNDR3400V1, "Netgear WNDR3400 V1"}, "U12H155T00_NETGEAR"}, 156 {{BCM47XX_BOARD_NETGEAR_WNDR3400V1, "Netgear WNDR3400 V1"}, "U12H155T00_NETGEAR"},
170 {{BCM47XX_BOARD_NETGEAR_WNDR3400V2, "Netgear WNDR3400 V2"}, "U12H187T00_NETGEAR"}, 157 {{BCM47XX_BOARD_NETGEAR_WNDR3400V2, "Netgear WNDR3400 V2"}, "U12H187T00_NETGEAR"},
158 {{BCM47XX_BOARD_NETGEAR_WNDR3400_V3, "Netgear WNDR3400 V3"}, "U12H208T00_NETGEAR"},
171 {{BCM47XX_BOARD_NETGEAR_WNDR3400VCNA, "Netgear WNDR3400 Vcna"}, "U12H155T01_NETGEAR"}, 159 {{BCM47XX_BOARD_NETGEAR_WNDR3400VCNA, "Netgear WNDR3400 Vcna"}, "U12H155T01_NETGEAR"},
172 {{BCM47XX_BOARD_NETGEAR_WNDR3700V3, "Netgear WNDR3700 V3"}, "U12H194T00_NETGEAR"}, 160 {{BCM47XX_BOARD_NETGEAR_WNDR3700V3, "Netgear WNDR3700 V3"}, "U12H194T00_NETGEAR"},
173 {{BCM47XX_BOARD_NETGEAR_WNDR4000, "Netgear WNDR4000"}, "U12H181T00_NETGEAR"}, 161 {{BCM47XX_BOARD_NETGEAR_WNDR4000, "Netgear WNDR4000"}, "U12H181T00_NETGEAR"},
@@ -202,6 +190,20 @@ struct bcm47xx_board_type_list2 bcm47xx_board_list_board_type_rev[] __initconst
202 { {0}, NULL}, 190 { {0}, NULL},
203}; 191};
204 192
193/*
194 * Some devices don't use any common NVRAM entry for identification and they
195 * have only one model specific variable.
196 * They don't deserve own arrays, let's group them there using key-value array.
197 */
198static const
199struct bcm47xx_board_type_list2 bcm47xx_board_list_key_value[] __initconst = {
200 {{BCM47XX_BOARD_ASUS_WL700GE, "Asus WL700"}, "model_no", "WL700"},
201 {{BCM47XX_BOARD_LINKSYS_WRT300N_V1, "Linksys WRT300N V1"}, "router_name", "WRT300N"},
202 {{BCM47XX_BOARD_LINKSYS_WRT600N_V11, "Linksys WRT600N V1.1"}, "Model_Name", "WRT600N"},
203 {{BCM47XX_BOARD_LINKSYS_WRTSL54GS, "Linksys WRTSL54GS"}, "machine_name", "WRTSL54GS"},
204 { {0}, NULL},
205};
206
205static const 207static const
206struct bcm47xx_board_type bcm47xx_board_unknown[] __initconst = { 208struct bcm47xx_board_type bcm47xx_board_unknown[] __initconst = {
207 {BCM47XX_BOARD_UNKNOWN, "Unknown Board"}, 209 {BCM47XX_BOARD_UNKNOWN, "Unknown Board"},
@@ -225,20 +227,6 @@ static __init const struct bcm47xx_board_type *bcm47xx_board_get_nvram(void)
225 } 227 }
226 } 228 }
227 229
228 if (bcm47xx_nvram_getenv("model_no", buf1, sizeof(buf1)) >= 0) {
229 for (e1 = bcm47xx_board_list_model_no; e1->value1; e1++) {
230 if (strstarts(buf1, e1->value1))
231 return &e1->board;
232 }
233 }
234
235 if (bcm47xx_nvram_getenv("machine_name", buf1, sizeof(buf1)) >= 0) {
236 for (e1 = bcm47xx_board_list_machine_name; e1->value1; e1++) {
237 if (strstarts(buf1, e1->value1))
238 return &e1->board;
239 }
240 }
241
242 if (bcm47xx_nvram_getenv("hardware_version", buf1, sizeof(buf1)) >= 0) { 230 if (bcm47xx_nvram_getenv("hardware_version", buf1, sizeof(buf1)) >= 0) {
243 for (e1 = bcm47xx_board_list_hardware_version; e1->value1; e1++) { 231 for (e1 = bcm47xx_board_list_hardware_version; e1->value1; e1++) {
244 if (strstarts(buf1, e1->value1)) 232 if (strstarts(buf1, e1->value1))
@@ -247,8 +235,8 @@ static __init const struct bcm47xx_board_type *bcm47xx_board_get_nvram(void)
247 } 235 }
248 236
249 if (bcm47xx_nvram_getenv("hardware_version", buf1, sizeof(buf1)) >= 0 && 237 if (bcm47xx_nvram_getenv("hardware_version", buf1, sizeof(buf1)) >= 0 &&
250 bcm47xx_nvram_getenv("boardtype", buf2, sizeof(buf2)) >= 0) { 238 bcm47xx_nvram_getenv("boardnum", buf2, sizeof(buf2)) >= 0) {
251 for (e2 = bcm47xx_board_list_boot_hw; e2->value1; e2++) { 239 for (e2 = bcm47xx_board_list_hw_version_num; e2->value1; e2++) {
252 if (!strstarts(buf1, e2->value1) && 240 if (!strstarts(buf1, e2->value1) &&
253 !strcmp(buf2, e2->value2)) 241 !strcmp(buf2, e2->value2))
254 return &e2->board; 242 return &e2->board;
@@ -314,6 +302,14 @@ static __init const struct bcm47xx_board_type *bcm47xx_board_get_nvram(void)
314 return &e2->board; 302 return &e2->board;
315 } 303 }
316 } 304 }
305
306 for (e2 = bcm47xx_board_list_key_value; e2->value1; e2++) {
307 if (bcm47xx_nvram_getenv(e2->value1, buf1, sizeof(buf1)) >= 0) {
308 if (!strcmp(buf1, e2->value2))
309 return &e2->board;
310 }
311 }
312
317 return bcm47xx_board_unknown; 313 return bcm47xx_board_unknown;
318} 314}
319 315
@@ -330,9 +326,8 @@ void __init bcm47xx_board_detect(void)
330 err = bcm47xx_nvram_getenv("boardtype", buf, sizeof(buf)); 326 err = bcm47xx_nvram_getenv("boardtype", buf, sizeof(buf));
331 327
332 /* init of nvram failed, probably too early now */ 328 /* init of nvram failed, probably too early now */
333 if (err == -ENXIO) { 329 if (err == -ENXIO)
334 return; 330 return;
335 }
336 331
337 board_detected = bcm47xx_board_get_nvram(); 332 board_detected = bcm47xx_board_get_nvram();
338 bcm47xx_board.board = board_detected->board; 333 bcm47xx_board.board = board_detected->board;
diff --git a/arch/mips/bcm47xx/buttons.c b/arch/mips/bcm47xx/buttons.c
index 913182bcafb8..276276a8c6d7 100644
--- a/arch/mips/bcm47xx/buttons.c
+++ b/arch/mips/bcm47xx/buttons.c
@@ -252,6 +252,12 @@ bcm47xx_buttons_linksys_wrt160nv3[] __initconst = {
252}; 252};
253 253
254static const struct gpio_keys_button 254static const struct gpio_keys_button
255bcm47xx_buttons_linksys_wrt300n_v1[] __initconst = {
256 BCM47XX_GPIO_KEY(4, KEY_WPS_BUTTON),
257 BCM47XX_GPIO_KEY(6, KEY_RESTART),
258};
259
260static const struct gpio_keys_button
255bcm47xx_buttons_linksys_wrt300nv11[] __initconst = { 261bcm47xx_buttons_linksys_wrt300nv11[] __initconst = {
256 BCM47XX_GPIO_KEY(4, KEY_UNKNOWN), 262 BCM47XX_GPIO_KEY(4, KEY_UNKNOWN),
257 BCM47XX_GPIO_KEY(6, KEY_RESTART), 263 BCM47XX_GPIO_KEY(6, KEY_RESTART),
@@ -327,6 +333,12 @@ bcm47xx_buttons_netgear_wndr3400v1[] __initconst = {
327}; 333};
328 334
329static const struct gpio_keys_button 335static const struct gpio_keys_button
336bcm47xx_buttons_netgear_wndr3400_v3[] __initconst = {
337 BCM47XX_GPIO_KEY(12, KEY_RESTART),
338 BCM47XX_GPIO_KEY(23, KEY_WPS_BUTTON),
339};
340
341static const struct gpio_keys_button
330bcm47xx_buttons_netgear_wndr3700v3[] __initconst = { 342bcm47xx_buttons_netgear_wndr3700v3[] __initconst = {
331 BCM47XX_GPIO_KEY(2, KEY_RFKILL), 343 BCM47XX_GPIO_KEY(2, KEY_RFKILL),
332 BCM47XX_GPIO_KEY(3, KEY_RESTART), 344 BCM47XX_GPIO_KEY(3, KEY_RESTART),
@@ -516,6 +528,9 @@ int __init bcm47xx_buttons_register(void)
516 case BCM47XX_BOARD_LINKSYS_WRT160NV3: 528 case BCM47XX_BOARD_LINKSYS_WRT160NV3:
517 err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt160nv3); 529 err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt160nv3);
518 break; 530 break;
531 case BCM47XX_BOARD_LINKSYS_WRT300N_V1:
532 err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt300n_v1);
533 break;
519 case BCM47XX_BOARD_LINKSYS_WRT300NV11: 534 case BCM47XX_BOARD_LINKSYS_WRT300NV11:
520 err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt300nv11); 535 err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt300nv11);
521 break; 536 break;
@@ -557,6 +572,9 @@ int __init bcm47xx_buttons_register(void)
557 case BCM47XX_BOARD_NETGEAR_WNDR3400V1: 572 case BCM47XX_BOARD_NETGEAR_WNDR3400V1:
558 err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr3400v1); 573 err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr3400v1);
559 break; 574 break;
575 case BCM47XX_BOARD_NETGEAR_WNDR3400_V3:
576 err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr3400_v3);
577 break;
560 case BCM47XX_BOARD_NETGEAR_WNDR3700V3: 578 case BCM47XX_BOARD_NETGEAR_WNDR3700V3:
561 err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr3700v3); 579 err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr3700v3);
562 break; 580 break;
diff --git a/arch/mips/bcm47xx/leds.c b/arch/mips/bcm47xx/leds.c
index 903a656d4119..0e4ade342333 100644
--- a/arch/mips/bcm47xx/leds.c
+++ b/arch/mips/bcm47xx/leds.c
@@ -292,6 +292,13 @@ bcm47xx_leds_linksys_wrt160nv3[] __initconst = {
292}; 292};
293 293
294static const struct gpio_led 294static const struct gpio_led
295bcm47xx_leds_linksys_wrt300n_v1[] __initconst = {
296 BCM47XX_GPIO_LED(1, "green", "power", 0, LEDS_GPIO_DEFSTATE_ON),
297 BCM47XX_GPIO_LED(3, "amber", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
298 BCM47XX_GPIO_LED(5, "green", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
299};
300
301static const struct gpio_led
295bcm47xx_leds_linksys_wrt300nv11[] __initconst = { 302bcm47xx_leds_linksys_wrt300nv11[] __initconst = {
296 BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON), 303 BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON),
297 BCM47XX_GPIO_LED(3, "amber", "wps", 1, LEDS_GPIO_DEFSTATE_OFF), 304 BCM47XX_GPIO_LED(3, "amber", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
@@ -585,6 +592,9 @@ void __init bcm47xx_leds_register(void)
585 case BCM47XX_BOARD_LINKSYS_WRT160NV3: 592 case BCM47XX_BOARD_LINKSYS_WRT160NV3:
586 bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt160nv3); 593 bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt160nv3);
587 break; 594 break;
595 case BCM47XX_BOARD_LINKSYS_WRT300N_V1:
596 bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt300n_v1);
597 break;
588 case BCM47XX_BOARD_LINKSYS_WRT300NV11: 598 case BCM47XX_BOARD_LINKSYS_WRT300NV11:
589 bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt300nv11); 599 bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt300nv11);
590 break; 600 break;
diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c
index c5c381c43f17..ba632ff08a13 100644
--- a/arch/mips/bcm47xx/nvram.c
+++ b/arch/mips/bcm47xx/nvram.c
@@ -11,15 +11,18 @@
11 * option) any later version. 11 * option) any later version.
12 */ 12 */
13 13
14#include <linux/io.h>
14#include <linux/types.h> 15#include <linux/types.h>
15#include <linux/module.h> 16#include <linux/module.h>
16#include <linux/kernel.h> 17#include <linux/kernel.h>
17#include <linux/string.h> 18#include <linux/string.h>
18#include <linux/mtd/mtd.h> 19#include <linux/mtd/mtd.h>
19#include <bcm47xx_nvram.h> 20#include <linux/bcm47xx_nvram.h>
20 21
21#define NVRAM_MAGIC 0x48534C46 /* 'FLSH' */ 22#define NVRAM_MAGIC 0x48534C46 /* 'FLSH' */
22#define NVRAM_SPACE 0x8000 23#define NVRAM_SPACE 0x10000
24#define NVRAM_MAX_GPIO_ENTRIES 32
25#define NVRAM_MAX_GPIO_VALUE_LEN 30
23 26
24#define FLASH_MIN 0x00020000 /* Minimum flash size */ 27#define FLASH_MIN 0x00020000 /* Minimum flash size */
25 28
@@ -91,20 +94,18 @@ static int nvram_find_and_copy(void __iomem *iobase, u32 lim)
91 return -ENXIO; 94 return -ENXIO;
92 95
93found: 96found:
94
95 if (header->len > size) 97 if (header->len > size)
96 pr_err("The nvram size accoridng to the header seems to be bigger than the partition on flash\n"); 98 pr_err("The nvram size accoridng to the header seems to be bigger than the partition on flash\n");
97 if (header->len > NVRAM_SPACE) 99 if (header->len > NVRAM_SPACE)
98 pr_err("nvram on flash (%i bytes) is bigger than the reserved space in memory, will just copy the first %i bytes\n", 100 pr_err("nvram on flash (%i bytes) is bigger than the reserved space in memory, will just copy the first %i bytes\n",
99 header->len, NVRAM_SPACE); 101 header->len, NVRAM_SPACE);
100 102
101 src = (u32 *) header; 103 src = (u32 *)header;
102 dst = (u32 *) nvram_buf; 104 dst = (u32 *)nvram_buf;
103 for (i = 0; i < sizeof(struct nvram_header); i += 4) 105 for (i = 0; i < sizeof(struct nvram_header); i += 4)
104 *dst++ = *src++; 106 *dst++ = __raw_readl(src++);
105 for (; i < header->len && i < NVRAM_SPACE && i < size; i += 4) 107 for (; i < header->len && i < NVRAM_SPACE && i < size; i += 4)
106 *dst++ = le32_to_cpu(*src++); 108 *dst++ = readl(src++);
107 memset(dst, 0x0, NVRAM_SPACE - i);
108 109
109 return 0; 110 return 0;
110} 111}
@@ -138,37 +139,28 @@ static int nvram_init(void)
138 struct mtd_info *mtd; 139 struct mtd_info *mtd;
139 struct nvram_header header; 140 struct nvram_header header;
140 size_t bytes_read; 141 size_t bytes_read;
141 int err, i; 142 int err;
142 143
143 mtd = get_mtd_device_nm("nvram"); 144 mtd = get_mtd_device_nm("nvram");
144 if (IS_ERR(mtd)) 145 if (IS_ERR(mtd))
145 return -ENODEV; 146 return -ENODEV;
146 147
147 for (i = 0; i < ARRAY_SIZE(nvram_sizes); i++) { 148 err = mtd_read(mtd, 0, sizeof(header), &bytes_read, (uint8_t *)&header);
148 loff_t from = mtd->size - nvram_sizes[i]; 149 if (!err && header.magic == NVRAM_MAGIC) {
150 u8 *dst = (uint8_t *)nvram_buf;
151 size_t len = header.len;
149 152
150 if (from < 0) 153 if (header.len > NVRAM_SPACE) {
151 continue; 154 pr_err("nvram on flash (%i bytes) is bigger than the reserved space in memory, will just copy the first %i bytes\n",
152 155 header.len, NVRAM_SPACE);
153 err = mtd_read(mtd, from, sizeof(header), &bytes_read, 156 len = NVRAM_SPACE;
154 (uint8_t *)&header); 157 }
155 if (!err && header.magic == NVRAM_MAGIC) {
156 u8 *dst = (uint8_t *)nvram_buf;
157 size_t len = header.len;
158
159 if (header.len > NVRAM_SPACE) {
160 pr_err("nvram on flash (%i bytes) is bigger than the reserved space in memory, will just copy the first %i bytes\n",
161 header.len, NVRAM_SPACE);
162 len = NVRAM_SPACE;
163 }
164 158
165 err = mtd_read(mtd, from, len, &bytes_read, dst); 159 err = mtd_read(mtd, 0, len, &bytes_read, dst);
166 if (err) 160 if (err)
167 return err; 161 return err;
168 memset(dst + bytes_read, 0x0, NVRAM_SPACE - bytes_read);
169 162
170 return 0; 163 return 0;
171 }
172 } 164 }
173#endif 165#endif
174 166
@@ -178,7 +170,7 @@ static int nvram_init(void)
178int bcm47xx_nvram_getenv(const char *name, char *val, size_t val_len) 170int bcm47xx_nvram_getenv(const char *name, char *val, size_t val_len)
179{ 171{
180 char *var, *value, *end, *eq; 172 char *var, *value, *end, *eq;
181 int err; 173 int data_left, err;
182 174
183 if (!name) 175 if (!name)
184 return -EINVAL; 176 return -EINVAL;
@@ -192,16 +184,18 @@ int bcm47xx_nvram_getenv(const char *name, char *val, size_t val_len)
192 /* Look for name=value and return value */ 184 /* Look for name=value and return value */
193 var = &nvram_buf[sizeof(struct nvram_header)]; 185 var = &nvram_buf[sizeof(struct nvram_header)];
194 end = nvram_buf + sizeof(nvram_buf) - 2; 186 end = nvram_buf + sizeof(nvram_buf) - 2;
195 end[0] = end[1] = '\0'; 187 end[0] = '\0';
188 end[1] = '\0';
196 for (; *var; var = value + strlen(value) + 1) { 189 for (; *var; var = value + strlen(value) + 1) {
197 eq = strchr(var, '='); 190 data_left = end - var;
191
192 eq = strnchr(var, data_left, '=');
198 if (!eq) 193 if (!eq)
199 break; 194 break;
200 value = eq + 1; 195 value = eq + 1;
201 if ((eq - var) == strlen(name) && 196 if (eq - var == strlen(name) &&
202 strncmp(var, name, (eq - var)) == 0) { 197 strncmp(var, name, eq - var) == 0)
203 return snprintf(val, val_len, "%s", value); 198 return snprintf(val, val_len, "%s", value);
204 }
205 } 199 }
206 return -ENOENT; 200 return -ENOENT;
207} 201}
@@ -210,10 +204,11 @@ EXPORT_SYMBOL(bcm47xx_nvram_getenv);
210int bcm47xx_nvram_gpio_pin(const char *name) 204int bcm47xx_nvram_gpio_pin(const char *name)
211{ 205{
212 int i, err; 206 int i, err;
213 char nvram_var[10]; 207 char nvram_var[] = "gpioXX";
214 char buf[30]; 208 char buf[NVRAM_MAX_GPIO_VALUE_LEN];
215 209
216 for (i = 0; i < 32; i++) { 210 /* TODO: Optimize it to don't call getenv so many times */
211 for (i = 0; i < NVRAM_MAX_GPIO_ENTRIES; i++) {
217 err = snprintf(nvram_var, sizeof(nvram_var), "gpio%i", i); 212 err = snprintf(nvram_var, sizeof(nvram_var), "gpio%i", i);
218 if (err <= 0) 213 if (err <= 0)
219 continue; 214 continue;
diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c
index 1b170bf5f7f0..ab698bad6d62 100644
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -35,7 +35,6 @@
35#include <bcm47xx.h> 35#include <bcm47xx.h>
36#include <bcm47xx_board.h> 36#include <bcm47xx_board.h>
37 37
38
39static char bcm47xx_system_type[20] = "Broadcom BCM47XX"; 38static char bcm47xx_system_type[20] = "Broadcom BCM47XX";
40 39
41const char *get_system_type(void) 40const char *get_system_type(void)
@@ -83,7 +82,7 @@ static __init void prom_init_mem(void)
83 /* Loop condition may be not enough, off may be over 1 MiB */ 82 /* Loop condition may be not enough, off may be over 1 MiB */
84 if (off + mem >= max) { 83 if (off + mem >= max) {
85 mem = max; 84 mem = max;
86 printk(KERN_DEBUG "assume 128MB RAM\n"); 85 pr_debug("Assume 128MB RAM\n");
87 break; 86 break;
88 } 87 }
89 if (!memcmp(prom_init, prom_init + mem, 32)) 88 if (!memcmp(prom_init, prom_init + mem, 32))
diff --git a/arch/mips/bcm47xx/serial.c b/arch/mips/bcm47xx/serial.c
index 2f5bbd68e9a0..df761d38f7fc 100644
--- a/arch/mips/bcm47xx/serial.c
+++ b/arch/mips/bcm47xx/serial.c
@@ -36,8 +36,8 @@ static int __init uart8250_init_ssb(void)
36 struct plat_serial8250_port *p = &(uart8250_data[i]); 36 struct plat_serial8250_port *p = &(uart8250_data[i]);
37 struct ssb_serial_port *ssb_port = &(mcore->serial_ports[i]); 37 struct ssb_serial_port *ssb_port = &(mcore->serial_ports[i]);
38 38
39 p->mapbase = (unsigned int) ssb_port->regs; 39 p->mapbase = (unsigned int)ssb_port->regs;
40 p->membase = (void *) ssb_port->regs; 40 p->membase = (void *)ssb_port->regs;
41 p->irq = ssb_port->irq + 2; 41 p->irq = ssb_port->irq + 2;
42 p->uartclk = ssb_port->baud_base; 42 p->uartclk = ssb_port->baud_base;
43 p->regshift = ssb_port->reg_shift; 43 p->regshift = ssb_port->reg_shift;
@@ -62,8 +62,8 @@ static int __init uart8250_init_bcma(void)
62 struct bcma_serial_port *bcma_port; 62 struct bcma_serial_port *bcma_port;
63 bcma_port = &(cc->serial_ports[i]); 63 bcma_port = &(cc->serial_ports[i]);
64 64
65 p->mapbase = (unsigned int) bcma_port->regs; 65 p->mapbase = (unsigned int)bcma_port->regs;
66 p->membase = (void *) bcma_port->regs; 66 p->membase = (void *)bcma_port->regs;
67 p->irq = bcma_port->irq; 67 p->irq = bcma_port->irq;
68 p->uartclk = bcma_port->baud_base; 68 p->uartclk = bcma_port->baud_base;
69 p->regshift = bcma_port->reg_shift; 69 p->regshift = bcma_port->reg_shift;
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index e43b5046cb30..82ff9fd2ab6e 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -42,7 +42,6 @@
42#include <asm/reboot.h> 42#include <asm/reboot.h>
43#include <asm/time.h> 43#include <asm/time.h>
44#include <bcm47xx.h> 44#include <bcm47xx.h>
45#include <bcm47xx_nvram.h>
46#include <bcm47xx_board.h> 45#include <bcm47xx_board.h>
47 46
48union bcm47xx_bus bcm47xx_bus; 47union bcm47xx_bus bcm47xx_bus;
@@ -53,7 +52,7 @@ EXPORT_SYMBOL(bcm47xx_bus_type);
53 52
54static void bcm47xx_machine_restart(char *command) 53static void bcm47xx_machine_restart(char *command)
55{ 54{
56 printk(KERN_ALERT "Please stand by while rebooting the system...\n"); 55 pr_alert("Please stand by while rebooting the system...\n");
57 local_irq_disable(); 56 local_irq_disable();
58 /* Set the watchdog timer to reset immediately */ 57 /* Set the watchdog timer to reset immediately */
59 switch (bcm47xx_bus_type) { 58 switch (bcm47xx_bus_type) {
@@ -108,7 +107,7 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus,
108 char buf[20]; 107 char buf[20];
109 108
110 /* Fill boardinfo structure */ 109 /* Fill boardinfo structure */
111 memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo)); 110 memset(&iv->boardinfo, 0 , sizeof(struct ssb_boardinfo));
112 111
113 bcm47xx_fill_ssb_boardinfo(&iv->boardinfo, NULL); 112 bcm47xx_fill_ssb_boardinfo(&iv->boardinfo, NULL);
114 113
@@ -127,7 +126,7 @@ static void __init bcm47xx_register_ssb(void)
127 char buf[100]; 126 char buf[100];
128 struct ssb_mipscore *mcore; 127 struct ssb_mipscore *mcore;
129 128
130 err = ssb_bus_ssbbus_register(&(bcm47xx_bus.ssb), SSB_ENUM_BASE, 129 err = ssb_bus_ssbbus_register(&bcm47xx_bus.ssb, SSB_ENUM_BASE,
131 bcm47xx_get_invariants); 130 bcm47xx_get_invariants);
132 if (err) 131 if (err)
133 panic("Failed to initialize SSB bus (err %d)", err); 132 panic("Failed to initialize SSB bus (err %d)", err);
@@ -137,7 +136,7 @@ static void __init bcm47xx_register_ssb(void)
137 if (strstr(buf, "console=ttyS1")) { 136 if (strstr(buf, "console=ttyS1")) {
138 struct ssb_serial_port port; 137 struct ssb_serial_port port;
139 138
140 printk(KERN_DEBUG "Swapping serial ports!\n"); 139 pr_debug("Swapping serial ports!\n");
141 /* swap serial ports */ 140 /* swap serial ports */
142 memcpy(&port, &mcore->serial_ports[0], sizeof(port)); 141 memcpy(&port, &mcore->serial_ports[0], sizeof(port));
143 memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1], 142 memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
@@ -169,7 +168,7 @@ void __init plat_mem_setup(void)
169 struct cpuinfo_mips *c = &current_cpu_data; 168 struct cpuinfo_mips *c = &current_cpu_data;
170 169
171 if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K)) { 170 if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K)) {
172 printk(KERN_INFO "bcm47xx: using bcma bus\n"); 171 pr_info("Using bcma bus\n");
173#ifdef CONFIG_BCM47XX_BCMA 172#ifdef CONFIG_BCM47XX_BCMA
174 bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA; 173 bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
175 bcm47xx_sprom_register_fallbacks(); 174 bcm47xx_sprom_register_fallbacks();
@@ -180,7 +179,7 @@ void __init plat_mem_setup(void)
180#endif 179#endif
181#endif 180#endif
182 } else { 181 } else {
183 printk(KERN_INFO "bcm47xx: using ssb bus\n"); 182 pr_info("Using ssb bus\n");
184#ifdef CONFIG_BCM47XX_SSB 183#ifdef CONFIG_BCM47XX_SSB
185 bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB; 184 bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB;
186 bcm47xx_sprom_register_fallbacks(); 185 bcm47xx_sprom_register_fallbacks();
diff --git a/arch/mips/bcm47xx/sprom.c b/arch/mips/bcm47xx/sprom.c
index 2eff7fe99c6b..68ebf2322f8b 100644
--- a/arch/mips/bcm47xx/sprom.c
+++ b/arch/mips/bcm47xx/sprom.c
@@ -27,7 +27,6 @@
27 */ 27 */
28 28
29#include <bcm47xx.h> 29#include <bcm47xx.h>
30#include <bcm47xx_nvram.h>
31#include <linux/if_ether.h> 30#include <linux/if_ether.h>
32#include <linux/etherdevice.h> 31#include <linux/etherdevice.h>
33 32
@@ -181,94 +180,245 @@ static void nvram_read_alpha2(const char *prefix, const char *name,
181 memcpy(val, buf, 2); 180 memcpy(val, buf, 2);
182} 181}
183 182
183/* This is one-function-only macro, it uses local "sprom" variable! */
184#define ENTRY(_revmask, _type, _prefix, _name, _val, _allset, _fallback) \
185 if (_revmask & BIT(sprom->revision)) \
186 nvram_read_ ## _type(_prefix, NULL, _name, &sprom->_val, \
187 _allset, _fallback)
188/*
189 * Special version of filling function that can be safely called for any SPROM
190 * revision. For every NVRAM to SPROM mapping it contains bitmask of revisions
191 * for which the mapping is valid.
192 * It obviously requires some hexadecimal/bitmasks knowledge, but allows
193 * writing cleaner code (easy revisions handling).
194 * Note that while SPROM revision 0 was never used, we still keep BIT(0)
195 * reserved for it, just to keep numbering sane.
196 */
197static void bcm47xx_sprom_fill_auto(struct ssb_sprom *sprom,
198 const char *prefix, bool fallback)
199{
200 const char *pre = prefix;
201 bool fb = fallback;
202
203 ENTRY(0xfffffffe, u16, pre, "boardrev", board_rev, 0, true);
204 ENTRY(0x00000002, u16, pre, "boardflags", boardflags_lo, 0, fb);
205 ENTRY(0xfffffffc, u16, pre, "boardtype", board_type, 0, true);
206 ENTRY(0xfffffffe, u16, pre, "boardnum", board_num, 0, fb);
207 ENTRY(0x00000002, u8, pre, "cc", country_code, 0, fb);
208 ENTRY(0xfffffff8, u8, pre, "regrev", regrev, 0, fb);
209
210 ENTRY(0xfffffffe, u8, pre, "ledbh0", gpio0, 0xff, fb);
211 ENTRY(0xfffffffe, u8, pre, "ledbh1", gpio1, 0xff, fb);
212 ENTRY(0xfffffffe, u8, pre, "ledbh2", gpio2, 0xff, fb);
213 ENTRY(0xfffffffe, u8, pre, "ledbh3", gpio3, 0xff, fb);
214
215 ENTRY(0x0000070e, u16, pre, "pa0b0", pa0b0, 0, fb);
216 ENTRY(0x0000070e, u16, pre, "pa0b1", pa0b1, 0, fb);
217 ENTRY(0x0000070e, u16, pre, "pa0b2", pa0b2, 0, fb);
218 ENTRY(0x0000070e, u8, pre, "pa0itssit", itssi_bg, 0, fb);
219 ENTRY(0x0000070e, u8, pre, "pa0maxpwr", maxpwr_bg, 0, fb);
220
221 ENTRY(0x0000070c, u8, pre, "opo", opo, 0, fb);
222 ENTRY(0xfffffffe, u8, pre, "aa2g", ant_available_bg, 0, fb);
223 ENTRY(0xfffffffe, u8, pre, "aa5g", ant_available_a, 0, fb);
224 ENTRY(0x000007fe, s8, pre, "ag0", antenna_gain.a0, 0, fb);
225 ENTRY(0x000007fe, s8, pre, "ag1", antenna_gain.a1, 0, fb);
226 ENTRY(0x000007f0, s8, pre, "ag2", antenna_gain.a2, 0, fb);
227 ENTRY(0x000007f0, s8, pre, "ag3", antenna_gain.a3, 0, fb);
228
229 ENTRY(0x0000070e, u16, pre, "pa1b0", pa1b0, 0, fb);
230 ENTRY(0x0000070e, u16, pre, "pa1b1", pa1b1, 0, fb);
231 ENTRY(0x0000070e, u16, pre, "pa1b2", pa1b2, 0, fb);
232 ENTRY(0x0000070c, u16, pre, "pa1lob0", pa1lob0, 0, fb);
233 ENTRY(0x0000070c, u16, pre, "pa1lob1", pa1lob1, 0, fb);
234 ENTRY(0x0000070c, u16, pre, "pa1lob2", pa1lob2, 0, fb);
235 ENTRY(0x0000070c, u16, pre, "pa1hib0", pa1hib0, 0, fb);
236 ENTRY(0x0000070c, u16, pre, "pa1hib1", pa1hib1, 0, fb);
237 ENTRY(0x0000070c, u16, pre, "pa1hib2", pa1hib2, 0, fb);
238 ENTRY(0x0000070e, u8, pre, "pa1itssit", itssi_a, 0, fb);
239 ENTRY(0x0000070e, u8, pre, "pa1maxpwr", maxpwr_a, 0, fb);
240 ENTRY(0x0000070c, u8, pre, "pa1lomaxpwr", maxpwr_al, 0, fb);
241 ENTRY(0x0000070c, u8, pre, "pa1himaxpwr", maxpwr_ah, 0, fb);
242
243 ENTRY(0x00000708, u8, pre, "bxa2g", bxa2g, 0, fb);
244 ENTRY(0x00000708, u8, pre, "rssisav2g", rssisav2g, 0, fb);
245 ENTRY(0x00000708, u8, pre, "rssismc2g", rssismc2g, 0, fb);
246 ENTRY(0x00000708, u8, pre, "rssismf2g", rssismf2g, 0, fb);
247 ENTRY(0x00000708, u8, pre, "bxa5g", bxa5g, 0, fb);
248 ENTRY(0x00000708, u8, pre, "rssisav5g", rssisav5g, 0, fb);
249 ENTRY(0x00000708, u8, pre, "rssismc5g", rssismc5g, 0, fb);
250 ENTRY(0x00000708, u8, pre, "rssismf5g", rssismf5g, 0, fb);
251 ENTRY(0x00000708, u8, pre, "tri2g", tri2g, 0, fb);
252 ENTRY(0x00000708, u8, pre, "tri5g", tri5g, 0, fb);
253 ENTRY(0x00000708, u8, pre, "tri5gl", tri5gl, 0, fb);
254 ENTRY(0x00000708, u8, pre, "tri5gh", tri5gh, 0, fb);
255 ENTRY(0x00000708, s8, pre, "rxpo2g", rxpo2g, 0, fb);
256 ENTRY(0x00000708, s8, pre, "rxpo5g", rxpo5g, 0, fb);
257 ENTRY(0xfffffff0, u8, pre, "txchain", txchain, 0xf, fb);
258 ENTRY(0xfffffff0, u8, pre, "rxchain", rxchain, 0xf, fb);
259 ENTRY(0xfffffff0, u8, pre, "antswitch", antswitch, 0xff, fb);
260 ENTRY(0x00000700, u8, pre, "tssipos2g", fem.ghz2.tssipos, 0, fb);
261 ENTRY(0x00000700, u8, pre, "extpagain2g", fem.ghz2.extpa_gain, 0, fb);
262 ENTRY(0x00000700, u8, pre, "pdetrange2g", fem.ghz2.pdet_range, 0, fb);
263 ENTRY(0x00000700, u8, pre, "triso2g", fem.ghz2.tr_iso, 0, fb);
264 ENTRY(0x00000700, u8, pre, "antswctl2g", fem.ghz2.antswlut, 0, fb);
265 ENTRY(0x00000700, u8, pre, "tssipos5g", fem.ghz5.tssipos, 0, fb);
266 ENTRY(0x00000700, u8, pre, "extpagain5g", fem.ghz5.extpa_gain, 0, fb);
267 ENTRY(0x00000700, u8, pre, "pdetrange5g", fem.ghz5.pdet_range, 0, fb);
268 ENTRY(0x00000700, u8, pre, "triso5g", fem.ghz5.tr_iso, 0, fb);
269 ENTRY(0x00000700, u8, pre, "antswctl5g", fem.ghz5.antswlut, 0, fb);
270 ENTRY(0x000000f0, u8, pre, "txpid2ga0", txpid2g[0], 0, fb);
271 ENTRY(0x000000f0, u8, pre, "txpid2ga1", txpid2g[1], 0, fb);
272 ENTRY(0x000000f0, u8, pre, "txpid2ga2", txpid2g[2], 0, fb);
273 ENTRY(0x000000f0, u8, pre, "txpid2ga3", txpid2g[3], 0, fb);
274 ENTRY(0x000000f0, u8, pre, "txpid5ga0", txpid5g[0], 0, fb);
275 ENTRY(0x000000f0, u8, pre, "txpid5ga1", txpid5g[1], 0, fb);
276 ENTRY(0x000000f0, u8, pre, "txpid5ga2", txpid5g[2], 0, fb);
277 ENTRY(0x000000f0, u8, pre, "txpid5ga3", txpid5g[3], 0, fb);
278 ENTRY(0x000000f0, u8, pre, "txpid5gla0", txpid5gl[0], 0, fb);
279 ENTRY(0x000000f0, u8, pre, "txpid5gla1", txpid5gl[1], 0, fb);
280 ENTRY(0x000000f0, u8, pre, "txpid5gla2", txpid5gl[2], 0, fb);
281 ENTRY(0x000000f0, u8, pre, "txpid5gla3", txpid5gl[3], 0, fb);
282 ENTRY(0x000000f0, u8, pre, "txpid5gha0", txpid5gh[0], 0, fb);
283 ENTRY(0x000000f0, u8, pre, "txpid5gha1", txpid5gh[1], 0, fb);
284 ENTRY(0x000000f0, u8, pre, "txpid5gha2", txpid5gh[2], 0, fb);
285 ENTRY(0x000000f0, u8, pre, "txpid5gha3", txpid5gh[3], 0, fb);
286
287 ENTRY(0xffffff00, u8, pre, "tempthresh", tempthresh, 0, fb);
288 ENTRY(0xffffff00, u8, pre, "tempoffset", tempoffset, 0, fb);
289 ENTRY(0xffffff00, u16, pre, "rawtempsense", rawtempsense, 0, fb);
290 ENTRY(0xffffff00, u8, pre, "measpower", measpower, 0, fb);
291 ENTRY(0xffffff00, u8, pre, "tempsense_slope", tempsense_slope, 0, fb);
292 ENTRY(0xffffff00, u8, pre, "tempcorrx", tempcorrx, 0, fb);
293 ENTRY(0xffffff00, u8, pre, "tempsense_option", tempsense_option, 0, fb);
294 ENTRY(0x00000700, u8, pre, "freqoffset_corr", freqoffset_corr, 0, fb);
295 ENTRY(0x00000700, u8, pre, "iqcal_swp_dis", iqcal_swp_dis, 0, fb);
296 ENTRY(0x00000700, u8, pre, "hw_iqcal_en", hw_iqcal_en, 0, fb);
297 ENTRY(0x00000700, u8, pre, "elna2g", elna2g, 0, fb);
298 ENTRY(0x00000700, u8, pre, "elna5g", elna5g, 0, fb);
299 ENTRY(0xffffff00, u8, pre, "phycal_tempdelta", phycal_tempdelta, 0, fb);
300 ENTRY(0xffffff00, u8, pre, "temps_period", temps_period, 0, fb);
301 ENTRY(0xffffff00, u8, pre, "temps_hysteresis", temps_hysteresis, 0, fb);
302 ENTRY(0xffffff00, u8, pre, "measpower1", measpower1, 0, fb);
303 ENTRY(0xffffff00, u8, pre, "measpower2", measpower2, 0, fb);
304
305 ENTRY(0x000001f0, u16, pre, "cck2gpo", cck2gpo, 0, fb);
306 ENTRY(0x000001f0, u32, pre, "ofdm2gpo", ofdm2gpo, 0, fb);
307 ENTRY(0x000001f0, u32, pre, "ofdm5gpo", ofdm5gpo, 0, fb);
308 ENTRY(0x000001f0, u32, pre, "ofdm5glpo", ofdm5glpo, 0, fb);
309 ENTRY(0x000001f0, u32, pre, "ofdm5ghpo", ofdm5ghpo, 0, fb);
310 ENTRY(0x000001f0, u16, pre, "mcs2gpo0", mcs2gpo[0], 0, fb);
311 ENTRY(0x000001f0, u16, pre, "mcs2gpo1", mcs2gpo[1], 0, fb);
312 ENTRY(0x000001f0, u16, pre, "mcs2gpo2", mcs2gpo[2], 0, fb);
313 ENTRY(0x000001f0, u16, pre, "mcs2gpo3", mcs2gpo[3], 0, fb);
314 ENTRY(0x000001f0, u16, pre, "mcs2gpo4", mcs2gpo[4], 0, fb);
315 ENTRY(0x000001f0, u16, pre, "mcs2gpo5", mcs2gpo[5], 0, fb);
316 ENTRY(0x000001f0, u16, pre, "mcs2gpo6", mcs2gpo[6], 0, fb);
317 ENTRY(0x000001f0, u16, pre, "mcs2gpo7", mcs2gpo[7], 0, fb);
318 ENTRY(0x000001f0, u16, pre, "mcs5gpo0", mcs5gpo[0], 0, fb);
319 ENTRY(0x000001f0, u16, pre, "mcs5gpo1", mcs5gpo[1], 0, fb);
320 ENTRY(0x000001f0, u16, pre, "mcs5gpo2", mcs5gpo[2], 0, fb);
321 ENTRY(0x000001f0, u16, pre, "mcs5gpo3", mcs5gpo[3], 0, fb);
322 ENTRY(0x000001f0, u16, pre, "mcs5gpo4", mcs5gpo[4], 0, fb);
323 ENTRY(0x000001f0, u16, pre, "mcs5gpo5", mcs5gpo[5], 0, fb);
324 ENTRY(0x000001f0, u16, pre, "mcs5gpo6", mcs5gpo[6], 0, fb);
325 ENTRY(0x000001f0, u16, pre, "mcs5gpo7", mcs5gpo[7], 0, fb);
326 ENTRY(0x000001f0, u16, pre, "mcs5glpo0", mcs5glpo[0], 0, fb);
327 ENTRY(0x000001f0, u16, pre, "mcs5glpo1", mcs5glpo[1], 0, fb);
328 ENTRY(0x000001f0, u16, pre, "mcs5glpo2", mcs5glpo[2], 0, fb);
329 ENTRY(0x000001f0, u16, pre, "mcs5glpo3", mcs5glpo[3], 0, fb);
330 ENTRY(0x000001f0, u16, pre, "mcs5glpo4", mcs5glpo[4], 0, fb);
331 ENTRY(0x000001f0, u16, pre, "mcs5glpo5", mcs5glpo[5], 0, fb);
332 ENTRY(0x000001f0, u16, pre, "mcs5glpo6", mcs5glpo[6], 0, fb);
333 ENTRY(0x000001f0, u16, pre, "mcs5glpo7", mcs5glpo[7], 0, fb);
334 ENTRY(0x000001f0, u16, pre, "mcs5ghpo0", mcs5ghpo[0], 0, fb);
335 ENTRY(0x000001f0, u16, pre, "mcs5ghpo1", mcs5ghpo[1], 0, fb);
336 ENTRY(0x000001f0, u16, pre, "mcs5ghpo2", mcs5ghpo[2], 0, fb);
337 ENTRY(0x000001f0, u16, pre, "mcs5ghpo3", mcs5ghpo[3], 0, fb);
338 ENTRY(0x000001f0, u16, pre, "mcs5ghpo4", mcs5ghpo[4], 0, fb);
339 ENTRY(0x000001f0, u16, pre, "mcs5ghpo5", mcs5ghpo[5], 0, fb);
340 ENTRY(0x000001f0, u16, pre, "mcs5ghpo6", mcs5ghpo[6], 0, fb);
341 ENTRY(0x000001f0, u16, pre, "mcs5ghpo7", mcs5ghpo[7], 0, fb);
342 ENTRY(0x000001f0, u16, pre, "cddpo", cddpo, 0, fb);
343 ENTRY(0x000001f0, u16, pre, "stbcpo", stbcpo, 0, fb);
344 ENTRY(0x000001f0, u16, pre, "bw40po", bw40po, 0, fb);
345 ENTRY(0x000001f0, u16, pre, "bwduppo", bwduppo, 0, fb);
346
347 ENTRY(0xfffffe00, u16, pre, "cckbw202gpo", cckbw202gpo, 0, fb);
348 ENTRY(0xfffffe00, u16, pre, "cckbw20ul2gpo", cckbw20ul2gpo, 0, fb);
349 ENTRY(0x00000600, u32, pre, "legofdmbw202gpo", legofdmbw202gpo, 0, fb);
350 ENTRY(0x00000600, u32, pre, "legofdmbw20ul2gpo", legofdmbw20ul2gpo, 0, fb);
351 ENTRY(0x00000600, u32, pre, "legofdmbw205glpo", legofdmbw205glpo, 0, fb);
352 ENTRY(0x00000600, u32, pre, "legofdmbw20ul5glpo", legofdmbw20ul5glpo, 0, fb);
353 ENTRY(0x00000600, u32, pre, "legofdmbw205gmpo", legofdmbw205gmpo, 0, fb);
354 ENTRY(0x00000600, u32, pre, "legofdmbw20ul5gmpo", legofdmbw20ul5gmpo, 0, fb);
355 ENTRY(0x00000600, u32, pre, "legofdmbw205ghpo", legofdmbw205ghpo, 0, fb);
356 ENTRY(0x00000600, u32, pre, "legofdmbw20ul5ghpo", legofdmbw20ul5ghpo, 0, fb);
357 ENTRY(0xfffffe00, u32, pre, "mcsbw202gpo", mcsbw202gpo, 0, fb);
358 ENTRY(0x00000600, u32, pre, "mcsbw20ul2gpo", mcsbw20ul2gpo, 0, fb);
359 ENTRY(0xfffffe00, u32, pre, "mcsbw402gpo", mcsbw402gpo, 0, fb);
360 ENTRY(0xfffffe00, u32, pre, "mcsbw205glpo", mcsbw205glpo, 0, fb);
361 ENTRY(0x00000600, u32, pre, "mcsbw20ul5glpo", mcsbw20ul5glpo, 0, fb);
362 ENTRY(0xfffffe00, u32, pre, "mcsbw405glpo", mcsbw405glpo, 0, fb);
363 ENTRY(0xfffffe00, u32, pre, "mcsbw205gmpo", mcsbw205gmpo, 0, fb);
364 ENTRY(0x00000600, u32, pre, "mcsbw20ul5gmpo", mcsbw20ul5gmpo, 0, fb);
365 ENTRY(0xfffffe00, u32, pre, "mcsbw405gmpo", mcsbw405gmpo, 0, fb);
366 ENTRY(0xfffffe00, u32, pre, "mcsbw205ghpo", mcsbw205ghpo, 0, fb);
367 ENTRY(0x00000600, u32, pre, "mcsbw20ul5ghpo", mcsbw20ul5ghpo, 0, fb);
368 ENTRY(0xfffffe00, u32, pre, "mcsbw405ghpo", mcsbw405ghpo, 0, fb);
369 ENTRY(0x00000600, u16, pre, "mcs32po", mcs32po, 0, fb);
370 ENTRY(0x00000600, u16, pre, "legofdm40duppo", legofdm40duppo, 0, fb);
371 ENTRY(0x00000700, u8, pre, "pcieingress_war", pcieingress_war, 0, fb);
372
373 /* TODO: rev 11 support */
374 ENTRY(0x00000700, u8, pre, "rxgainerr2ga0", rxgainerr2ga[0], 0, fb);
375 ENTRY(0x00000700, u8, pre, "rxgainerr2ga1", rxgainerr2ga[1], 0, fb);
376 ENTRY(0x00000700, u8, pre, "rxgainerr2ga2", rxgainerr2ga[2], 0, fb);
377 ENTRY(0x00000700, u8, pre, "rxgainerr5gla0", rxgainerr5gla[0], 0, fb);
378 ENTRY(0x00000700, u8, pre, "rxgainerr5gla1", rxgainerr5gla[1], 0, fb);
379 ENTRY(0x00000700, u8, pre, "rxgainerr5gla2", rxgainerr5gla[2], 0, fb);
380 ENTRY(0x00000700, u8, pre, "rxgainerr5gma0", rxgainerr5gma[0], 0, fb);
381 ENTRY(0x00000700, u8, pre, "rxgainerr5gma1", rxgainerr5gma[1], 0, fb);
382 ENTRY(0x00000700, u8, pre, "rxgainerr5gma2", rxgainerr5gma[2], 0, fb);
383 ENTRY(0x00000700, u8, pre, "rxgainerr5gha0", rxgainerr5gha[0], 0, fb);
384 ENTRY(0x00000700, u8, pre, "rxgainerr5gha1", rxgainerr5gha[1], 0, fb);
385 ENTRY(0x00000700, u8, pre, "rxgainerr5gha2", rxgainerr5gha[2], 0, fb);
386 ENTRY(0x00000700, u8, pre, "rxgainerr5gua0", rxgainerr5gua[0], 0, fb);
387 ENTRY(0x00000700, u8, pre, "rxgainerr5gua1", rxgainerr5gua[1], 0, fb);
388 ENTRY(0x00000700, u8, pre, "rxgainerr5gua2", rxgainerr5gua[2], 0, fb);
389
390 ENTRY(0xfffffe00, u8, pre, "sar2g", sar2g, 0, fb);
391 ENTRY(0xfffffe00, u8, pre, "sar5g", sar5g, 0, fb);
392
393 /* TODO: rev 11 support */
394 ENTRY(0x00000700, u8, pre, "noiselvl2ga0", noiselvl2ga[0], 0, fb);
395 ENTRY(0x00000700, u8, pre, "noiselvl2ga1", noiselvl2ga[1], 0, fb);
396 ENTRY(0x00000700, u8, pre, "noiselvl2ga2", noiselvl2ga[2], 0, fb);
397 ENTRY(0x00000700, u8, pre, "noiselvl5gla0", noiselvl5gla[0], 0, fb);
398 ENTRY(0x00000700, u8, pre, "noiselvl5gla1", noiselvl5gla[1], 0, fb);
399 ENTRY(0x00000700, u8, pre, "noiselvl5gla2", noiselvl5gla[2], 0, fb);
400 ENTRY(0x00000700, u8, pre, "noiselvl5gma0", noiselvl5gma[0], 0, fb);
401 ENTRY(0x00000700, u8, pre, "noiselvl5gma1", noiselvl5gma[1], 0, fb);
402 ENTRY(0x00000700, u8, pre, "noiselvl5gma2", noiselvl5gma[2], 0, fb);
403 ENTRY(0x00000700, u8, pre, "noiselvl5gha0", noiselvl5gha[0], 0, fb);
404 ENTRY(0x00000700, u8, pre, "noiselvl5gha1", noiselvl5gha[1], 0, fb);
405 ENTRY(0x00000700, u8, pre, "noiselvl5gha2", noiselvl5gha[2], 0, fb);
406 ENTRY(0x00000700, u8, pre, "noiselvl5gua0", noiselvl5gua[0], 0, fb);
407 ENTRY(0x00000700, u8, pre, "noiselvl5gua1", noiselvl5gua[1], 0, fb);
408 ENTRY(0x00000700, u8, pre, "noiselvl5gua2", noiselvl5gua[2], 0, fb);
409}
410#undef ENTRY /* It's specififc, uses local variable, don't use it (again). */
411
184static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom, 412static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
185 const char *prefix, bool fallback) 413 const char *prefix, bool fallback)
186{ 414{
187 nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback); 415 nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
188 nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
189 nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
190 nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);
191 nvram_read_u8(prefix, NULL, "ledbh3", &sprom->gpio3, 0xff, fallback);
192 nvram_read_u8(prefix, NULL, "aa2g", &sprom->ant_available_bg, 0,
193 fallback);
194 nvram_read_u8(prefix, NULL, "aa5g", &sprom->ant_available_a, 0,
195 fallback);
196 nvram_read_s8(prefix, NULL, "ag0", &sprom->antenna_gain.a0, 0,
197 fallback);
198 nvram_read_s8(prefix, NULL, "ag1", &sprom->antenna_gain.a1, 0,
199 fallback);
200 nvram_read_alpha2(prefix, "ccode", sprom->alpha2, fallback); 416 nvram_read_alpha2(prefix, "ccode", sprom->alpha2, fallback);
201} 417}
202 418
203static void bcm47xx_fill_sprom_r12389(struct ssb_sprom *sprom,
204 const char *prefix, bool fallback)
205{
206 nvram_read_u16(prefix, NULL, "pa0b0", &sprom->pa0b0, 0, fallback);
207 nvram_read_u16(prefix, NULL, "pa0b1", &sprom->pa0b1, 0, fallback);
208 nvram_read_u16(prefix, NULL, "pa0b2", &sprom->pa0b2, 0, fallback);
209 nvram_read_u8(prefix, NULL, "pa0itssit", &sprom->itssi_bg, 0, fallback);
210 nvram_read_u8(prefix, NULL, "pa0maxpwr", &sprom->maxpwr_bg, 0,
211 fallback);
212 nvram_read_u16(prefix, NULL, "pa1b0", &sprom->pa1b0, 0, fallback);
213 nvram_read_u16(prefix, NULL, "pa1b1", &sprom->pa1b1, 0, fallback);
214 nvram_read_u16(prefix, NULL, "pa1b2", &sprom->pa1b2, 0, fallback);
215 nvram_read_u8(prefix, NULL, "pa1itssit", &sprom->itssi_a, 0, fallback);
216 nvram_read_u8(prefix, NULL, "pa1maxpwr", &sprom->maxpwr_a, 0, fallback);
217}
218
219static void bcm47xx_fill_sprom_r1(struct ssb_sprom *sprom, const char *prefix,
220 bool fallback)
221{
222 nvram_read_u16(prefix, NULL, "boardflags", &sprom->boardflags_lo, 0,
223 fallback);
224 nvram_read_u8(prefix, NULL, "cc", &sprom->country_code, 0, fallback);
225}
226
227static void bcm47xx_fill_sprom_r2389(struct ssb_sprom *sprom,
228 const char *prefix, bool fallback)
229{
230 nvram_read_u8(prefix, NULL, "opo", &sprom->opo, 0, fallback);
231 nvram_read_u16(prefix, NULL, "pa1lob0", &sprom->pa1lob0, 0, fallback);
232 nvram_read_u16(prefix, NULL, "pa1lob1", &sprom->pa1lob1, 0, fallback);
233 nvram_read_u16(prefix, NULL, "pa1lob2", &sprom->pa1lob2, 0, fallback);
234 nvram_read_u16(prefix, NULL, "pa1hib0", &sprom->pa1hib0, 0, fallback);
235 nvram_read_u16(prefix, NULL, "pa1hib1", &sprom->pa1hib1, 0, fallback);
236 nvram_read_u16(prefix, NULL, "pa1hib2", &sprom->pa1hib2, 0, fallback);
237 nvram_read_u8(prefix, NULL, "pa1lomaxpwr", &sprom->maxpwr_al, 0,
238 fallback);
239 nvram_read_u8(prefix, NULL, "pa1himaxpwr", &sprom->maxpwr_ah, 0,
240 fallback);
241}
242
243static void bcm47xx_fill_sprom_r389(struct ssb_sprom *sprom, const char *prefix,
244 bool fallback)
245{
246 nvram_read_u8(prefix, NULL, "bxa2g", &sprom->bxa2g, 0, fallback);
247 nvram_read_u8(prefix, NULL, "rssisav2g", &sprom->rssisav2g, 0,
248 fallback);
249 nvram_read_u8(prefix, NULL, "rssismc2g", &sprom->rssismc2g, 0,
250 fallback);
251 nvram_read_u8(prefix, NULL, "rssismf2g", &sprom->rssismf2g, 0,
252 fallback);
253 nvram_read_u8(prefix, NULL, "bxa5g", &sprom->bxa5g, 0, fallback);
254 nvram_read_u8(prefix, NULL, "rssisav5g", &sprom->rssisav5g, 0,
255 fallback);
256 nvram_read_u8(prefix, NULL, "rssismc5g", &sprom->rssismc5g, 0,
257 fallback);
258 nvram_read_u8(prefix, NULL, "rssismf5g", &sprom->rssismf5g, 0,
259 fallback);
260 nvram_read_u8(prefix, NULL, "tri2g", &sprom->tri2g, 0, fallback);
261 nvram_read_u8(prefix, NULL, "tri5g", &sprom->tri5g, 0, fallback);
262 nvram_read_u8(prefix, NULL, "tri5gl", &sprom->tri5gl, 0, fallback);
263 nvram_read_u8(prefix, NULL, "tri5gh", &sprom->tri5gh, 0, fallback);
264 nvram_read_s8(prefix, NULL, "rxpo2g", &sprom->rxpo2g, 0, fallback);
265 nvram_read_s8(prefix, NULL, "rxpo5g", &sprom->rxpo5g, 0, fallback);
266}
267
268static void bcm47xx_fill_sprom_r3(struct ssb_sprom *sprom, const char *prefix, 419static void bcm47xx_fill_sprom_r3(struct ssb_sprom *sprom, const char *prefix,
269 bool fallback) 420 bool fallback)
270{ 421{
271 nvram_read_u8(prefix, NULL, "regrev", &sprom->regrev, 0, fallback);
272 nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time, 422 nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
273 &sprom->leddc_off_time, fallback); 423 &sprom->leddc_off_time, fallback);
274} 424}
@@ -276,309 +426,10 @@ static void bcm47xx_fill_sprom_r3(struct ssb_sprom *sprom, const char *prefix,
276static void bcm47xx_fill_sprom_r4589(struct ssb_sprom *sprom, 426static void bcm47xx_fill_sprom_r4589(struct ssb_sprom *sprom,
277 const char *prefix, bool fallback) 427 const char *prefix, bool fallback)
278{ 428{
279 nvram_read_u8(prefix, NULL, "regrev", &sprom->regrev, 0, fallback);
280 nvram_read_s8(prefix, NULL, "ag2", &sprom->antenna_gain.a2, 0,
281 fallback);
282 nvram_read_s8(prefix, NULL, "ag3", &sprom->antenna_gain.a3, 0,
283 fallback);
284 nvram_read_u8(prefix, NULL, "txchain", &sprom->txchain, 0xf, fallback);
285 nvram_read_u8(prefix, NULL, "rxchain", &sprom->rxchain, 0xf, fallback);
286 nvram_read_u8(prefix, NULL, "antswitch", &sprom->antswitch, 0xff,
287 fallback);
288 nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time, 429 nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
289 &sprom->leddc_off_time, fallback); 430 &sprom->leddc_off_time, fallback);
290} 431}
291 432
292static void bcm47xx_fill_sprom_r458(struct ssb_sprom *sprom, const char *prefix,
293 bool fallback)
294{
295 nvram_read_u16(prefix, NULL, "cck2gpo", &sprom->cck2gpo, 0, fallback);
296 nvram_read_u32(prefix, NULL, "ofdm2gpo", &sprom->ofdm2gpo, 0, fallback);
297 nvram_read_u32(prefix, NULL, "ofdm5gpo", &sprom->ofdm5gpo, 0, fallback);
298 nvram_read_u32(prefix, NULL, "ofdm5glpo", &sprom->ofdm5glpo, 0,
299 fallback);
300 nvram_read_u32(prefix, NULL, "ofdm5ghpo", &sprom->ofdm5ghpo, 0,
301 fallback);
302 nvram_read_u16(prefix, NULL, "cddpo", &sprom->cddpo, 0, fallback);
303 nvram_read_u16(prefix, NULL, "stbcpo", &sprom->stbcpo, 0, fallback);
304 nvram_read_u16(prefix, NULL, "bw40po", &sprom->bw40po, 0, fallback);
305 nvram_read_u16(prefix, NULL, "bwduppo", &sprom->bwduppo, 0, fallback);
306 nvram_read_u16(prefix, NULL, "mcs2gpo0", &sprom->mcs2gpo[0], 0,
307 fallback);
308 nvram_read_u16(prefix, NULL, "mcs2gpo1", &sprom->mcs2gpo[1], 0,
309 fallback);
310 nvram_read_u16(prefix, NULL, "mcs2gpo2", &sprom->mcs2gpo[2], 0,
311 fallback);
312 nvram_read_u16(prefix, NULL, "mcs2gpo3", &sprom->mcs2gpo[3], 0,
313 fallback);
314 nvram_read_u16(prefix, NULL, "mcs2gpo4", &sprom->mcs2gpo[4], 0,
315 fallback);
316 nvram_read_u16(prefix, NULL, "mcs2gpo5", &sprom->mcs2gpo[5], 0,
317 fallback);
318 nvram_read_u16(prefix, NULL, "mcs2gpo6", &sprom->mcs2gpo[6], 0,
319 fallback);
320 nvram_read_u16(prefix, NULL, "mcs2gpo7", &sprom->mcs2gpo[7], 0,
321 fallback);
322 nvram_read_u16(prefix, NULL, "mcs5gpo0", &sprom->mcs5gpo[0], 0,
323 fallback);
324 nvram_read_u16(prefix, NULL, "mcs5gpo1", &sprom->mcs5gpo[1], 0,
325 fallback);
326 nvram_read_u16(prefix, NULL, "mcs5gpo2", &sprom->mcs5gpo[2], 0,
327 fallback);
328 nvram_read_u16(prefix, NULL, "mcs5gpo3", &sprom->mcs5gpo[3], 0,
329 fallback);
330 nvram_read_u16(prefix, NULL, "mcs5gpo4", &sprom->mcs5gpo[4], 0,
331 fallback);
332 nvram_read_u16(prefix, NULL, "mcs5gpo5", &sprom->mcs5gpo[5], 0,
333 fallback);
334 nvram_read_u16(prefix, NULL, "mcs5gpo6", &sprom->mcs5gpo[6], 0,
335 fallback);
336 nvram_read_u16(prefix, NULL, "mcs5gpo7", &sprom->mcs5gpo[7], 0,
337 fallback);
338 nvram_read_u16(prefix, NULL, "mcs5glpo0", &sprom->mcs5glpo[0], 0,
339 fallback);
340 nvram_read_u16(prefix, NULL, "mcs5glpo1", &sprom->mcs5glpo[1], 0,
341 fallback);
342 nvram_read_u16(prefix, NULL, "mcs5glpo2", &sprom->mcs5glpo[2], 0,
343 fallback);
344 nvram_read_u16(prefix, NULL, "mcs5glpo3", &sprom->mcs5glpo[3], 0,
345 fallback);
346 nvram_read_u16(prefix, NULL, "mcs5glpo4", &sprom->mcs5glpo[4], 0,
347 fallback);
348 nvram_read_u16(prefix, NULL, "mcs5glpo5", &sprom->mcs5glpo[5], 0,
349 fallback);
350 nvram_read_u16(prefix, NULL, "mcs5glpo6", &sprom->mcs5glpo[6], 0,
351 fallback);
352 nvram_read_u16(prefix, NULL, "mcs5glpo7", &sprom->mcs5glpo[7], 0,
353 fallback);
354 nvram_read_u16(prefix, NULL, "mcs5ghpo0", &sprom->mcs5ghpo[0], 0,
355 fallback);
356 nvram_read_u16(prefix, NULL, "mcs5ghpo1", &sprom->mcs5ghpo[1], 0,
357 fallback);
358 nvram_read_u16(prefix, NULL, "mcs5ghpo2", &sprom->mcs5ghpo[2], 0,
359 fallback);
360 nvram_read_u16(prefix, NULL, "mcs5ghpo3", &sprom->mcs5ghpo[3], 0,
361 fallback);
362 nvram_read_u16(prefix, NULL, "mcs5ghpo4", &sprom->mcs5ghpo[4], 0,
363 fallback);
364 nvram_read_u16(prefix, NULL, "mcs5ghpo5", &sprom->mcs5ghpo[5], 0,
365 fallback);
366 nvram_read_u16(prefix, NULL, "mcs5ghpo6", &sprom->mcs5ghpo[6], 0,
367 fallback);
368 nvram_read_u16(prefix, NULL, "mcs5ghpo7", &sprom->mcs5ghpo[7], 0,
369 fallback);
370}
371
372static void bcm47xx_fill_sprom_r45(struct ssb_sprom *sprom, const char *prefix,
373 bool fallback)
374{
375 nvram_read_u8(prefix, NULL, "txpid2ga0", &sprom->txpid2g[0], 0,
376 fallback);
377 nvram_read_u8(prefix, NULL, "txpid2ga1", &sprom->txpid2g[1], 0,
378 fallback);
379 nvram_read_u8(prefix, NULL, "txpid2ga2", &sprom->txpid2g[2], 0,
380 fallback);
381 nvram_read_u8(prefix, NULL, "txpid2ga3", &sprom->txpid2g[3], 0,
382 fallback);
383 nvram_read_u8(prefix, NULL, "txpid5ga0", &sprom->txpid5g[0], 0,
384 fallback);
385 nvram_read_u8(prefix, NULL, "txpid5ga1", &sprom->txpid5g[1], 0,
386 fallback);
387 nvram_read_u8(prefix, NULL, "txpid5ga2", &sprom->txpid5g[2], 0,
388 fallback);
389 nvram_read_u8(prefix, NULL, "txpid5ga3", &sprom->txpid5g[3], 0,
390 fallback);
391 nvram_read_u8(prefix, NULL, "txpid5gla0", &sprom->txpid5gl[0], 0,
392 fallback);
393 nvram_read_u8(prefix, NULL, "txpid5gla1", &sprom->txpid5gl[1], 0,
394 fallback);
395 nvram_read_u8(prefix, NULL, "txpid5gla2", &sprom->txpid5gl[2], 0,
396 fallback);
397 nvram_read_u8(prefix, NULL, "txpid5gla3", &sprom->txpid5gl[3], 0,
398 fallback);
399 nvram_read_u8(prefix, NULL, "txpid5gha0", &sprom->txpid5gh[0], 0,
400 fallback);
401 nvram_read_u8(prefix, NULL, "txpid5gha1", &sprom->txpid5gh[1], 0,
402 fallback);
403 nvram_read_u8(prefix, NULL, "txpid5gha2", &sprom->txpid5gh[2], 0,
404 fallback);
405 nvram_read_u8(prefix, NULL, "txpid5gha3", &sprom->txpid5gh[3], 0,
406 fallback);
407}
408
409static void bcm47xx_fill_sprom_r89(struct ssb_sprom *sprom, const char *prefix,
410 bool fallback)
411{
412 nvram_read_u8(prefix, NULL, "tssipos2g", &sprom->fem.ghz2.tssipos, 0,
413 fallback);
414 nvram_read_u8(prefix, NULL, "extpagain2g",
415 &sprom->fem.ghz2.extpa_gain, 0, fallback);
416 nvram_read_u8(prefix, NULL, "pdetrange2g",
417 &sprom->fem.ghz2.pdet_range, 0, fallback);
418 nvram_read_u8(prefix, NULL, "triso2g", &sprom->fem.ghz2.tr_iso, 0,
419 fallback);
420 nvram_read_u8(prefix, NULL, "antswctl2g", &sprom->fem.ghz2.antswlut, 0,
421 fallback);
422 nvram_read_u8(prefix, NULL, "tssipos5g", &sprom->fem.ghz5.tssipos, 0,
423 fallback);
424 nvram_read_u8(prefix, NULL, "extpagain5g",
425 &sprom->fem.ghz5.extpa_gain, 0, fallback);
426 nvram_read_u8(prefix, NULL, "pdetrange5g",
427 &sprom->fem.ghz5.pdet_range, 0, fallback);
428 nvram_read_u8(prefix, NULL, "triso5g", &sprom->fem.ghz5.tr_iso, 0,
429 fallback);
430 nvram_read_u8(prefix, NULL, "antswctl5g", &sprom->fem.ghz5.antswlut, 0,
431 fallback);
432 nvram_read_u8(prefix, NULL, "tempthresh", &sprom->tempthresh, 0,
433 fallback);
434 nvram_read_u8(prefix, NULL, "tempoffset", &sprom->tempoffset, 0,
435 fallback);
436 nvram_read_u16(prefix, NULL, "rawtempsense", &sprom->rawtempsense, 0,
437 fallback);
438 nvram_read_u8(prefix, NULL, "measpower", &sprom->measpower, 0,
439 fallback);
440 nvram_read_u8(prefix, NULL, "tempsense_slope",
441 &sprom->tempsense_slope, 0, fallback);
442 nvram_read_u8(prefix, NULL, "tempcorrx", &sprom->tempcorrx, 0,
443 fallback);
444 nvram_read_u8(prefix, NULL, "tempsense_option",
445 &sprom->tempsense_option, 0, fallback);
446 nvram_read_u8(prefix, NULL, "freqoffset_corr",
447 &sprom->freqoffset_corr, 0, fallback);
448 nvram_read_u8(prefix, NULL, "iqcal_swp_dis", &sprom->iqcal_swp_dis, 0,
449 fallback);
450 nvram_read_u8(prefix, NULL, "hw_iqcal_en", &sprom->hw_iqcal_en, 0,
451 fallback);
452 nvram_read_u8(prefix, NULL, "elna2g", &sprom->elna2g, 0, fallback);
453 nvram_read_u8(prefix, NULL, "elna5g", &sprom->elna5g, 0, fallback);
454 nvram_read_u8(prefix, NULL, "phycal_tempdelta",
455 &sprom->phycal_tempdelta, 0, fallback);
456 nvram_read_u8(prefix, NULL, "temps_period", &sprom->temps_period, 0,
457 fallback);
458 nvram_read_u8(prefix, NULL, "temps_hysteresis",
459 &sprom->temps_hysteresis, 0, fallback);
460 nvram_read_u8(prefix, NULL, "measpower1", &sprom->measpower1, 0,
461 fallback);
462 nvram_read_u8(prefix, NULL, "measpower2", &sprom->measpower2, 0,
463 fallback);
464 nvram_read_u8(prefix, NULL, "rxgainerr2ga0",
465 &sprom->rxgainerr2ga[0], 0, fallback);
466 nvram_read_u8(prefix, NULL, "rxgainerr2ga1",
467 &sprom->rxgainerr2ga[1], 0, fallback);
468 nvram_read_u8(prefix, NULL, "rxgainerr2ga2",
469 &sprom->rxgainerr2ga[2], 0, fallback);
470 nvram_read_u8(prefix, NULL, "rxgainerr5gla0",
471 &sprom->rxgainerr5gla[0], 0, fallback);
472 nvram_read_u8(prefix, NULL, "rxgainerr5gla1",
473 &sprom->rxgainerr5gla[1], 0, fallback);
474 nvram_read_u8(prefix, NULL, "rxgainerr5gla2",
475 &sprom->rxgainerr5gla[2], 0, fallback);
476 nvram_read_u8(prefix, NULL, "rxgainerr5gma0",
477 &sprom->rxgainerr5gma[0], 0, fallback);
478 nvram_read_u8(prefix, NULL, "rxgainerr5gma1",
479 &sprom->rxgainerr5gma[1], 0, fallback);
480 nvram_read_u8(prefix, NULL, "rxgainerr5gma2",
481 &sprom->rxgainerr5gma[2], 0, fallback);
482 nvram_read_u8(prefix, NULL, "rxgainerr5gha0",
483 &sprom->rxgainerr5gha[0], 0, fallback);
484 nvram_read_u8(prefix, NULL, "rxgainerr5gha1",
485 &sprom->rxgainerr5gha[1], 0, fallback);
486 nvram_read_u8(prefix, NULL, "rxgainerr5gha2",
487 &sprom->rxgainerr5gha[2], 0, fallback);
488 nvram_read_u8(prefix, NULL, "rxgainerr5gua0",
489 &sprom->rxgainerr5gua[0], 0, fallback);
490 nvram_read_u8(prefix, NULL, "rxgainerr5gua1",
491 &sprom->rxgainerr5gua[1], 0, fallback);
492 nvram_read_u8(prefix, NULL, "rxgainerr5gua2",
493 &sprom->rxgainerr5gua[2], 0, fallback);
494 nvram_read_u8(prefix, NULL, "noiselvl2ga0", &sprom->noiselvl2ga[0], 0,
495 fallback);
496 nvram_read_u8(prefix, NULL, "noiselvl2ga1", &sprom->noiselvl2ga[1], 0,
497 fallback);
498 nvram_read_u8(prefix, NULL, "noiselvl2ga2", &sprom->noiselvl2ga[2], 0,
499 fallback);
500 nvram_read_u8(prefix, NULL, "noiselvl5gla0",
501 &sprom->noiselvl5gla[0], 0, fallback);
502 nvram_read_u8(prefix, NULL, "noiselvl5gla1",
503 &sprom->noiselvl5gla[1], 0, fallback);
504 nvram_read_u8(prefix, NULL, "noiselvl5gla2",
505 &sprom->noiselvl5gla[2], 0, fallback);
506 nvram_read_u8(prefix, NULL, "noiselvl5gma0",
507 &sprom->noiselvl5gma[0], 0, fallback);
508 nvram_read_u8(prefix, NULL, "noiselvl5gma1",
509 &sprom->noiselvl5gma[1], 0, fallback);
510 nvram_read_u8(prefix, NULL, "noiselvl5gma2",
511 &sprom->noiselvl5gma[2], 0, fallback);
512 nvram_read_u8(prefix, NULL, "noiselvl5gha0",
513 &sprom->noiselvl5gha[0], 0, fallback);
514 nvram_read_u8(prefix, NULL, "noiselvl5gha1",
515 &sprom->noiselvl5gha[1], 0, fallback);
516 nvram_read_u8(prefix, NULL, "noiselvl5gha2",
517 &sprom->noiselvl5gha[2], 0, fallback);
518 nvram_read_u8(prefix, NULL, "noiselvl5gua0",
519 &sprom->noiselvl5gua[0], 0, fallback);
520 nvram_read_u8(prefix, NULL, "noiselvl5gua1",
521 &sprom->noiselvl5gua[1], 0, fallback);
522 nvram_read_u8(prefix, NULL, "noiselvl5gua2",
523 &sprom->noiselvl5gua[2], 0, fallback);
524 nvram_read_u8(prefix, NULL, "pcieingress_war",
525 &sprom->pcieingress_war, 0, fallback);
526}
527
528static void bcm47xx_fill_sprom_r9(struct ssb_sprom *sprom, const char *prefix,
529 bool fallback)
530{
531 nvram_read_u16(prefix, NULL, "cckbw202gpo", &sprom->cckbw202gpo, 0,
532 fallback);
533 nvram_read_u16(prefix, NULL, "cckbw20ul2gpo", &sprom->cckbw20ul2gpo, 0,
534 fallback);
535 nvram_read_u32(prefix, NULL, "legofdmbw202gpo",
536 &sprom->legofdmbw202gpo, 0, fallback);
537 nvram_read_u32(prefix, NULL, "legofdmbw20ul2gpo",
538 &sprom->legofdmbw20ul2gpo, 0, fallback);
539 nvram_read_u32(prefix, NULL, "legofdmbw205glpo",
540 &sprom->legofdmbw205glpo, 0, fallback);
541 nvram_read_u32(prefix, NULL, "legofdmbw20ul5glpo",
542 &sprom->legofdmbw20ul5glpo, 0, fallback);
543 nvram_read_u32(prefix, NULL, "legofdmbw205gmpo",
544 &sprom->legofdmbw205gmpo, 0, fallback);
545 nvram_read_u32(prefix, NULL, "legofdmbw20ul5gmpo",
546 &sprom->legofdmbw20ul5gmpo, 0, fallback);
547 nvram_read_u32(prefix, NULL, "legofdmbw205ghpo",
548 &sprom->legofdmbw205ghpo, 0, fallback);
549 nvram_read_u32(prefix, NULL, "legofdmbw20ul5ghpo",
550 &sprom->legofdmbw20ul5ghpo, 0, fallback);
551 nvram_read_u32(prefix, NULL, "mcsbw202gpo", &sprom->mcsbw202gpo, 0,
552 fallback);
553 nvram_read_u32(prefix, NULL, "mcsbw20ul2gpo", &sprom->mcsbw20ul2gpo, 0,
554 fallback);
555 nvram_read_u32(prefix, NULL, "mcsbw402gpo", &sprom->mcsbw402gpo, 0,
556 fallback);
557 nvram_read_u32(prefix, NULL, "mcsbw205glpo", &sprom->mcsbw205glpo, 0,
558 fallback);
559 nvram_read_u32(prefix, NULL, "mcsbw20ul5glpo",
560 &sprom->mcsbw20ul5glpo, 0, fallback);
561 nvram_read_u32(prefix, NULL, "mcsbw405glpo", &sprom->mcsbw405glpo, 0,
562 fallback);
563 nvram_read_u32(prefix, NULL, "mcsbw205gmpo", &sprom->mcsbw205gmpo, 0,
564 fallback);
565 nvram_read_u32(prefix, NULL, "mcsbw20ul5gmpo",
566 &sprom->mcsbw20ul5gmpo, 0, fallback);
567 nvram_read_u32(prefix, NULL, "mcsbw405gmpo", &sprom->mcsbw405gmpo, 0,
568 fallback);
569 nvram_read_u32(prefix, NULL, "mcsbw205ghpo", &sprom->mcsbw205ghpo, 0,
570 fallback);
571 nvram_read_u32(prefix, NULL, "mcsbw20ul5ghpo",
572 &sprom->mcsbw20ul5ghpo, 0, fallback);
573 nvram_read_u32(prefix, NULL, "mcsbw405ghpo", &sprom->mcsbw405ghpo, 0,
574 fallback);
575 nvram_read_u16(prefix, NULL, "mcs32po", &sprom->mcs32po, 0, fallback);
576 nvram_read_u16(prefix, NULL, "legofdm40duppo",
577 &sprom->legofdm40duppo, 0, fallback);
578 nvram_read_u8(prefix, NULL, "sar2g", &sprom->sar2g, 0, fallback);
579 nvram_read_u8(prefix, NULL, "sar5g", &sprom->sar5g, 0, fallback);
580}
581
582static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom, 433static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom,
583 const char *prefix, bool fallback) 434 const char *prefix, bool fallback)
584{ 435{
@@ -715,10 +566,6 @@ static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,
715static void bcm47xx_fill_board_data(struct ssb_sprom *sprom, const char *prefix, 566static void bcm47xx_fill_board_data(struct ssb_sprom *sprom, const char *prefix,
716 bool fallback) 567 bool fallback)
717{ 568{
718 nvram_read_u16(prefix, NULL, "boardrev", &sprom->board_rev, 0, true);
719 nvram_read_u16(prefix, NULL, "boardnum", &sprom->board_num, 0,
720 fallback);
721 nvram_read_u16(prefix, NULL, "boardtype", &sprom->board_type, 0, true);
722 nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo, 569 nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
723 &sprom->boardflags_hi, fallback); 570 &sprom->boardflags_hi, fallback);
724 nvram_read_u32_2(prefix, "boardflags2", &sprom->boardflags2_lo, 571 nvram_read_u32_2(prefix, "boardflags2", &sprom->boardflags2_lo,
@@ -736,58 +583,39 @@ void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix,
736 switch (sprom->revision) { 583 switch (sprom->revision) {
737 case 1: 584 case 1:
738 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback); 585 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
739 bcm47xx_fill_sprom_r12389(sprom, prefix, fallback);
740 bcm47xx_fill_sprom_r1(sprom, prefix, fallback);
741 break; 586 break;
742 case 2: 587 case 2:
743 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback); 588 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
744 bcm47xx_fill_sprom_r12389(sprom, prefix, fallback);
745 bcm47xx_fill_sprom_r2389(sprom, prefix, fallback);
746 break; 589 break;
747 case 3: 590 case 3:
748 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback); 591 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
749 bcm47xx_fill_sprom_r12389(sprom, prefix, fallback);
750 bcm47xx_fill_sprom_r2389(sprom, prefix, fallback);
751 bcm47xx_fill_sprom_r389(sprom, prefix, fallback);
752 bcm47xx_fill_sprom_r3(sprom, prefix, fallback); 592 bcm47xx_fill_sprom_r3(sprom, prefix, fallback);
753 break; 593 break;
754 case 4: 594 case 4:
755 case 5: 595 case 5:
756 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback); 596 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
757 bcm47xx_fill_sprom_r4589(sprom, prefix, fallback); 597 bcm47xx_fill_sprom_r4589(sprom, prefix, fallback);
758 bcm47xx_fill_sprom_r458(sprom, prefix, fallback);
759 bcm47xx_fill_sprom_r45(sprom, prefix, fallback);
760 bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback); 598 bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
761 bcm47xx_fill_sprom_path_r45(sprom, prefix, fallback); 599 bcm47xx_fill_sprom_path_r45(sprom, prefix, fallback);
762 break; 600 break;
763 case 8: 601 case 8:
764 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback); 602 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
765 bcm47xx_fill_sprom_r12389(sprom, prefix, fallback);
766 bcm47xx_fill_sprom_r2389(sprom, prefix, fallback);
767 bcm47xx_fill_sprom_r389(sprom, prefix, fallback);
768 bcm47xx_fill_sprom_r4589(sprom, prefix, fallback); 603 bcm47xx_fill_sprom_r4589(sprom, prefix, fallback);
769 bcm47xx_fill_sprom_r458(sprom, prefix, fallback);
770 bcm47xx_fill_sprom_r89(sprom, prefix, fallback);
771 bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback); 604 bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
772 break; 605 break;
773 case 9: 606 case 9:
774 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback); 607 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
775 bcm47xx_fill_sprom_r12389(sprom, prefix, fallback);
776 bcm47xx_fill_sprom_r2389(sprom, prefix, fallback);
777 bcm47xx_fill_sprom_r389(sprom, prefix, fallback);
778 bcm47xx_fill_sprom_r4589(sprom, prefix, fallback); 608 bcm47xx_fill_sprom_r4589(sprom, prefix, fallback);
779 bcm47xx_fill_sprom_r89(sprom, prefix, fallback);
780 bcm47xx_fill_sprom_r9(sprom, prefix, fallback);
781 bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback); 609 bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
782 break; 610 break;
783 default: 611 default:
784 pr_warn("Unsupported SPROM revision %d detected. Will extract" 612 pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
785 " v1\n", sprom->revision); 613 sprom->revision);
786 sprom->revision = 1; 614 sprom->revision = 1;
787 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback); 615 bcm47xx_fill_sprom_r1234589(sprom, prefix, fallback);
788 bcm47xx_fill_sprom_r12389(sprom, prefix, fallback);
789 bcm47xx_fill_sprom_r1(sprom, prefix, fallback);
790 } 616 }
617
618 bcm47xx_sprom_fill_auto(sprom, prefix, fallback);
791} 619}
792 620
793#ifdef CONFIG_BCM47XX_SSB 621#ifdef CONFIG_BCM47XX_SSB
@@ -829,13 +657,45 @@ static int bcm47xx_get_sprom_ssb(struct ssb_bus *bus, struct ssb_sprom *out)
829 bcm47xx_fill_sprom(out, prefix, false); 657 bcm47xx_fill_sprom(out, prefix, false);
830 return 0; 658 return 0;
831 } else { 659 } else {
832 pr_warn("bcm47xx: unable to fill SPROM for given bustype.\n"); 660 pr_warn("Unable to fill SPROM for given bustype.\n");
833 return -EINVAL; 661 return -EINVAL;
834 } 662 }
835} 663}
836#endif 664#endif
837 665
838#if defined(CONFIG_BCM47XX_BCMA) 666#if defined(CONFIG_BCM47XX_BCMA)
667/*
668 * Having many NVRAM entries for PCI devices led to repeating prefixes like
669 * pci/1/1/ all the time and wasting flash space. So at some point Broadcom
670 * decided to introduce prefixes like 0: 1: 2: etc.
671 * If we find e.g. devpath0=pci/2/1 or devpath0=pci/2/1/ we should use 0:
672 * instead of pci/2/1/.
673 */
674static void bcm47xx_sprom_apply_prefix_alias(char *prefix, size_t prefix_size)
675{
676 size_t prefix_len = strlen(prefix);
677 size_t short_len = prefix_len - 1;
678 char nvram_var[10];
679 char buf[20];
680 int i;
681
682 /* Passed prefix has to end with a slash */
683 if (prefix_len <= 0 || prefix[prefix_len - 1] != '/')
684 return;
685
686 for (i = 0; i < 3; i++) {
687 if (snprintf(nvram_var, sizeof(nvram_var), "devpath%d", i) <= 0)
688 continue;
689 if (bcm47xx_nvram_getenv(nvram_var, buf, sizeof(buf)) < 0)
690 continue;
691 if (!strcmp(buf, prefix) ||
692 (short_len && strlen(buf) == short_len && !strncmp(buf, prefix, short_len))) {
693 snprintf(prefix, prefix_size, "%d:", i);
694 return;
695 }
696 }
697}
698
839static int bcm47xx_get_sprom_bcma(struct bcma_bus *bus, struct ssb_sprom *out) 699static int bcm47xx_get_sprom_bcma(struct bcma_bus *bus, struct ssb_sprom *out)
840{ 700{
841 char prefix[10]; 701 char prefix[10];
@@ -847,6 +707,7 @@ static int bcm47xx_get_sprom_bcma(struct bcma_bus *bus, struct ssb_sprom *out)
847 snprintf(prefix, sizeof(prefix), "pci/%u/%u/", 707 snprintf(prefix, sizeof(prefix), "pci/%u/%u/",
848 bus->host_pci->bus->number + 1, 708 bus->host_pci->bus->number + 1,
849 PCI_SLOT(bus->host_pci->devfn)); 709 PCI_SLOT(bus->host_pci->devfn));
710 bcm47xx_sprom_apply_prefix_alias(prefix, sizeof(prefix));
850 bcm47xx_fill_sprom(out, prefix, false); 711 bcm47xx_fill_sprom(out, prefix, false);
851 return 0; 712 return 0;
852 case BCMA_HOSTTYPE_SOC: 713 case BCMA_HOSTTYPE_SOC:
@@ -861,7 +722,7 @@ static int bcm47xx_get_sprom_bcma(struct bcma_bus *bus, struct ssb_sprom *out)
861 } 722 }
862 return 0; 723 return 0;
863 default: 724 default:
864 pr_warn("bcm47xx: unable to fill SPROM for given bustype.\n"); 725 pr_warn("Unable to fill SPROM for given bustype.\n");
865 return -EINVAL; 726 return -EINVAL;
866 } 727 }
867} 728}
diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c
index 2c85d9254b5e..74224cf2e84d 100644
--- a/arch/mips/bcm47xx/time.c
+++ b/arch/mips/bcm47xx/time.c
@@ -22,12 +22,10 @@
22 * 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */ 23 */
24 24
25
26#include <linux/init.h> 25#include <linux/init.h>
27#include <linux/ssb/ssb.h> 26#include <linux/ssb/ssb.h>
28#include <asm/time.h> 27#include <asm/time.h>
29#include <bcm47xx.h> 28#include <bcm47xx.h>
30#include <bcm47xx_nvram.h>
31#include <bcm47xx_board.h> 29#include <bcm47xx_board.h>
32 30
33void __init plat_time_init(void) 31void __init plat_time_init(void)
diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c
index e1f27d653f60..7019e2967009 100644
--- a/arch/mips/bcm63xx/prom.c
+++ b/arch/mips/bcm63xx/prom.c
@@ -17,7 +17,6 @@
17#include <bcm63xx_cpu.h> 17#include <bcm63xx_cpu.h>
18#include <bcm63xx_io.h> 18#include <bcm63xx_io.h>
19#include <bcm63xx_regs.h> 19#include <bcm63xx_regs.h>
20#include <bcm63xx_gpio.h>
21 20
22void __init prom_init(void) 21void __init prom_init(void)
23{ 22{
@@ -53,9 +52,6 @@ void __init prom_init(void)
53 reg &= ~mask; 52 reg &= ~mask;
54 bcm_perf_writel(reg, PERF_CKCTL_REG); 53 bcm_perf_writel(reg, PERF_CKCTL_REG);
55 54
56 /* register gpiochip */
57 bcm63xx_gpio_init();
58
59 /* do low level board init */ 55 /* do low level board init */
60 board_prom_init(); 56 board_prom_init();
61 57
diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c
index 6660c7ddf87b..240fb4ffa55c 100644
--- a/arch/mips/bcm63xx/setup.c
+++ b/arch/mips/bcm63xx/setup.c
@@ -20,6 +20,7 @@
20#include <bcm63xx_cpu.h> 20#include <bcm63xx_cpu.h>
21#include <bcm63xx_regs.h> 21#include <bcm63xx_regs.h>
22#include <bcm63xx_io.h> 22#include <bcm63xx_io.h>
23#include <bcm63xx_gpio.h>
23 24
24void bcm63xx_machine_halt(void) 25void bcm63xx_machine_halt(void)
25{ 26{
@@ -160,6 +161,9 @@ void __init plat_mem_setup(void)
160 161
161int __init bcm63xx_register_devices(void) 162int __init bcm63xx_register_devices(void)
162{ 163{
164 /* register gpiochip */
165 bcm63xx_gpio_init();
166
163 return board_register_devices(); 167 return board_register_devices();
164} 168}
165 169
diff --git a/arch/mips/bmips/Kconfig b/arch/mips/bmips/Kconfig
new file mode 100644
index 000000000000..f35c84c019df
--- /dev/null
+++ b/arch/mips/bmips/Kconfig
@@ -0,0 +1,62 @@
1if BMIPS_GENERIC
2
3choice
4 prompt "Built-in device tree"
5 help
6 Legacy bootloaders do not pass a DTB pointer to the kernel, so
7 if a "wrapper" is not being used, the kernel will need to include
8 a device tree that matches the target board.
9
10 The builtin DTB will only be used if the firmware does not supply
11 a valid DTB.
12
13config DT_NONE
14 bool "None"
15
16config DT_BCM93384WVG
17 bool "BCM93384WVG Zephyr CPU"
18 select BUILTIN_DTB
19
20config DT_BCM93384WVG_VIPER
21 bool "BCM93384WVG Viper CPU (EXPERIMENTAL)"
22 select BUILTIN_DTB
23
24config DT_BCM96368MVWG
25 bool "BCM96368MVWG"
26 select BUILTIN_DTB
27
28config DT_BCM9EJTAGPRB
29 bool "BCM9EJTAGPRB"
30 select BUILTIN_DTB
31
32config DT_BCM97125CBMB
33 bool "BCM97125CBMB"
34 select BUILTIN_DTB
35
36config DT_BCM97346DBSMB
37 bool "BCM97346DBSMB"
38 select BUILTIN_DTB
39
40config DT_BCM97358SVMB
41 bool "BCM97358SVMB"
42 select BUILTIN_DTB
43
44config DT_BCM97360SVMB
45 bool "BCM97360SVMB"
46 select BUILTIN_DTB
47
48config DT_BCM97362SVMB
49 bool "BCM97362SVMB"
50 select BUILTIN_DTB
51
52config DT_BCM97420C
53 bool "BCM97420C"
54 select BUILTIN_DTB
55
56config DT_BCM97425SVMB
57 bool "BCM97425SVMB"
58 select BUILTIN_DTB
59
60endchoice
61
62endif
diff --git a/arch/mips/bcm3384/Makefile b/arch/mips/bmips/Makefile
index a393955cba08..a393955cba08 100644
--- a/arch/mips/bcm3384/Makefile
+++ b/arch/mips/bmips/Makefile
diff --git a/arch/mips/bmips/Platform b/arch/mips/bmips/Platform
new file mode 100644
index 000000000000..5f127fd7f4b5
--- /dev/null
+++ b/arch/mips/bmips/Platform
@@ -0,0 +1,7 @@
1#
2# Broadcom Generic BMIPS kernel
3#
4platform-$(CONFIG_BMIPS_GENERIC) += bmips/
5cflags-$(CONFIG_BMIPS_GENERIC) += \
6 -I$(srctree)/arch/mips/include/asm/mach-bmips/
7load-$(CONFIG_BMIPS_GENERIC) := 0xffffffff80010000
diff --git a/arch/mips/bmips/dma.c b/arch/mips/bmips/dma.c
new file mode 100644
index 000000000000..04790f4e1805
--- /dev/null
+++ b/arch/mips/bmips/dma.c
@@ -0,0 +1,117 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2014 Kevin Cernekee <cernekee@gmail.com>
7 */
8
9#define pr_fmt(fmt) "bmips-dma: " fmt
10
11#include <linux/device.h>
12#include <linux/dma-direction.h>
13#include <linux/dma-mapping.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <linux/of.h>
17#include <linux/printk.h>
18#include <linux/slab.h>
19#include <linux/types.h>
20#include <dma-coherence.h>
21
22/*
23 * BCM338x has configurable address translation windows which allow the
24 * peripherals' DMA addresses to be different from the Zephyr-visible
25 * physical addresses. e.g. usb_dma_addr = zephyr_pa ^ 0x08000000
26 *
27 * If the "brcm,ubus" node has a "dma-ranges" property we will enable this
28 * translation globally using the provided information. This implements a
29 * very limited subset of "dma-ranges" support and it will probably be
30 * replaced by a more generic version later.
31 */
32
33struct bmips_dma_range {
34 u32 child_addr;
35 u32 parent_addr;
36 u32 size;
37};
38
39static struct bmips_dma_range *bmips_dma_ranges;
40
41#define FLUSH_RAC 0x100
42
43static dma_addr_t bmips_phys_to_dma(struct device *dev, phys_addr_t pa)
44{
45 struct bmips_dma_range *r;
46
47 for (r = bmips_dma_ranges; r && r->size; r++) {
48 if (pa >= r->child_addr &&
49 pa < (r->child_addr + r->size))
50 return pa - r->child_addr + r->parent_addr;
51 }
52 return pa;
53}
54
55dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size)
56{
57 return bmips_phys_to_dma(dev, virt_to_phys(addr));
58}
59
60dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page)
61{
62 return bmips_phys_to_dma(dev, page_to_phys(page));
63}
64
65unsigned long plat_dma_addr_to_phys(struct device *dev, dma_addr_t dma_addr)
66{
67 struct bmips_dma_range *r;
68
69 for (r = bmips_dma_ranges; r && r->size; r++) {
70 if (dma_addr >= r->parent_addr &&
71 dma_addr < (r->parent_addr + r->size))
72 return dma_addr - r->parent_addr + r->child_addr;
73 }
74 return dma_addr;
75}
76
77static int __init bmips_init_dma_ranges(void)
78{
79 struct device_node *np =
80 of_find_compatible_node(NULL, NULL, "brcm,ubus");
81 const __be32 *data;
82 struct bmips_dma_range *r;
83 int len;
84
85 if (!np)
86 return 0;
87
88 data = of_get_property(np, "dma-ranges", &len);
89 if (!data)
90 goto out_good;
91
92 len /= sizeof(*data) * 3;
93 if (!len)
94 goto out_bad;
95
96 /* add a dummy (zero) entry at the end as a sentinel */
97 bmips_dma_ranges = kzalloc(sizeof(struct bmips_dma_range) * (len + 1),
98 GFP_KERNEL);
99 if (!bmips_dma_ranges)
100 goto out_bad;
101
102 for (r = bmips_dma_ranges; len; len--, r++) {
103 r->child_addr = be32_to_cpup(data++);
104 r->parent_addr = be32_to_cpup(data++);
105 r->size = be32_to_cpup(data++);
106 }
107
108out_good:
109 of_node_put(np);
110 return 0;
111
112out_bad:
113 pr_err("error parsing dma-ranges property\n");
114 of_node_put(np);
115 return -EINVAL;
116}
117arch_initcall(bmips_init_dma_ranges);
diff --git a/arch/mips/bmips/irq.c b/arch/mips/bmips/irq.c
new file mode 100644
index 000000000000..14552e58ff7e
--- /dev/null
+++ b/arch/mips/bmips/irq.c
@@ -0,0 +1,38 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
5 *
6 * Copyright (C) 2014 Broadcom Corporation
7 * Author: Kevin Cernekee <cernekee@gmail.com>
8 */
9
10#include <linux/of.h>
11#include <linux/irqchip.h>
12
13#include <asm/bmips.h>
14#include <asm/irq.h>
15#include <asm/irq_cpu.h>
16#include <asm/time.h>
17
18unsigned int get_c0_compare_int(void)
19{
20 return CP0_LEGACY_COMPARE_IRQ;
21}
22
23void __init arch_init_irq(void)
24{
25 struct device_node *dn;
26
27 /* Only the STB (bcm7038) controller supports SMP IRQ affinity */
28 dn = of_find_compatible_node(NULL, NULL, "brcm,bcm7038-l1-intc");
29 if (dn)
30 of_node_put(dn);
31 else
32 bmips_tp1_irqs = 0;
33
34 irqchip_init();
35}
36
37OF_DECLARE_2(irqchip, mips_cpu_intc, "mti,cpu-interrupt-controller",
38 mips_cpu_irq_of_init);
diff --git a/arch/mips/bmips/setup.c b/arch/mips/bmips/setup.c
new file mode 100644
index 000000000000..fae800e8b1e1
--- /dev/null
+++ b/arch/mips/bmips/setup.c
@@ -0,0 +1,194 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7 * Copyright (C) 2014 Kevin Cernekee <cernekee@gmail.com>
8 */
9
10#include <linux/init.h>
11#include <linux/bitops.h>
12#include <linux/bootmem.h>
13#include <linux/clk-provider.h>
14#include <linux/ioport.h>
15#include <linux/kernel.h>
16#include <linux/io.h>
17#include <linux/of.h>
18#include <linux/of_fdt.h>
19#include <linux/of_platform.h>
20#include <linux/smp.h>
21#include <asm/addrspace.h>
22#include <asm/bmips.h>
23#include <asm/bootinfo.h>
24#include <asm/cpu-type.h>
25#include <asm/mipsregs.h>
26#include <asm/prom.h>
27#include <asm/smp-ops.h>
28#include <asm/time.h>
29#include <asm/traps.h>
30
31#define RELO_NORMAL_VEC BIT(18)
32
33#define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c))
34#define BCM6328_TP1_DISABLED BIT(9)
35
36static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000;
37
38struct bmips_quirk {
39 const char *compatible;
40 void (*quirk_fn)(void);
41};
42
43static void kbase_setup(void)
44{
45 __raw_writel(kbase | RELO_NORMAL_VEC,
46 BMIPS_GET_CBR() + BMIPS_RELO_VECTOR_CONTROL_1);
47 ebase = kbase;
48}
49
50static void bcm3384_viper_quirks(void)
51{
52 /*
53 * Some experimental CM boxes are set up to let CM own the Viper TP0
54 * and let Linux own TP1. This requires moving the kernel
55 * load address to a non-conflicting region (e.g. via
56 * CONFIG_PHYSICAL_START) and supplying an alternate DTB.
57 * If we detect this condition, we need to move the MIPS exception
58 * vectors up to an area that we own.
59 *
60 * This is distinct from the OTHER special case mentioned in
61 * smp-bmips.c (boot on TP1, but enable SMP, then TP0 becomes our
62 * logical CPU#1). For the Viper TP1 case, SMP is off limits.
63 *
64 * Also note that many BMIPS435x CPUs do not have a
65 * BMIPS_RELO_VECTOR_CONTROL_1 register, so it isn't safe to just
66 * write VMLINUX_LOAD_ADDRESS into that register on every SoC.
67 */
68 board_ebase_setup = &kbase_setup;
69 bmips_smp_enabled = 0;
70}
71
72static void bcm63xx_fixup_cpu1(void)
73{
74 /*
75 * The bootloader has set up the CPU1 reset vector at
76 * 0xa000_0200.
77 * This conflicts with the special interrupt vector (IV).
78 * The bootloader has also set up CPU1 to respond to the wrong
79 * IPI interrupt.
80 * Here we will start up CPU1 in the background and ask it to
81 * reconfigure itself then go back to sleep.
82 */
83 memcpy((void *)0xa0000200, &bmips_smp_movevec, 0x20);
84 __sync();
85 set_c0_cause(C_SW0);
86 cpumask_set_cpu(1, &bmips_booted_mask);
87}
88
89static void bcm6328_quirks(void)
90{
91 /* Check CPU1 status in OTP (it is usually disabled) */
92 if (__raw_readl(REG_BCM6328_OTP) & BCM6328_TP1_DISABLED)
93 bmips_smp_enabled = 0;
94 else
95 bcm63xx_fixup_cpu1();
96}
97
98static void bcm6368_quirks(void)
99{
100 bcm63xx_fixup_cpu1();
101}
102
103static const struct bmips_quirk bmips_quirk_list[] = {
104 { "brcm,bcm3384-viper", &bcm3384_viper_quirks },
105 { "brcm,bcm33843-viper", &bcm3384_viper_quirks },
106 { "brcm,bcm6328", &bcm6328_quirks },
107 { "brcm,bcm6368", &bcm6368_quirks },
108 { },
109};
110
111void __init prom_init(void)
112{
113 register_bmips_smp_ops();
114}
115
116void __init prom_free_prom_memory(void)
117{
118}
119
120const char *get_system_type(void)
121{
122 return "Generic BMIPS kernel";
123}
124
125void __init plat_time_init(void)
126{
127 struct device_node *np;
128 u32 freq;
129
130 np = of_find_node_by_name(NULL, "cpus");
131 if (!np)
132 panic("missing 'cpus' DT node");
133 if (of_property_read_u32(np, "mips-hpt-frequency", &freq) < 0)
134 panic("missing 'mips-hpt-frequency' property");
135 of_node_put(np);
136
137 mips_hpt_frequency = freq;
138}
139
140void __init plat_mem_setup(void)
141{
142 void *dtb;
143 const struct bmips_quirk *q;
144
145 set_io_port_base(0);
146 ioport_resource.start = 0;
147 ioport_resource.end = ~0;
148
149 /* intended to somewhat resemble ARM; see Documentation/arm/Booting */
150 if (fw_arg0 == 0 && fw_arg1 == 0xffffffff)
151 dtb = phys_to_virt(fw_arg2);
152 else if (__dtb_start != __dtb_end)
153 dtb = (void *)__dtb_start;
154 else
155 panic("no dtb found");
156
157 __dt_setup_arch(dtb);
158 strlcpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE);
159
160 for (q = bmips_quirk_list; q->quirk_fn; q++) {
161 if (of_flat_dt_is_compatible(of_get_flat_dt_root(),
162 q->compatible)) {
163 q->quirk_fn();
164 }
165 }
166}
167
168void __init device_tree_init(void)
169{
170 struct device_node *np;
171
172 unflatten_and_copy_device_tree();
173
174 /* Disable SMP boot unless both CPUs are listed in DT and !disabled */
175 np = of_find_node_by_name(NULL, "cpus");
176 if (np && of_get_available_child_count(np) <= 1)
177 bmips_smp_enabled = 0;
178 of_node_put(np);
179}
180
181int __init plat_of_setup(void)
182{
183 return __dt_register_buses("simple-bus", NULL);
184}
185
186arch_initcall(plat_of_setup);
187
188static int __init plat_dev_init(void)
189{
190 of_clk_init(NULL);
191 return 0;
192}
193
194device_initcall(plat_dev_init);
diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile
index 61af6b6ab13d..dc91bde10d62 100644
--- a/arch/mips/boot/compressed/Makefile
+++ b/arch/mips/boot/compressed/Makefile
@@ -12,6 +12,8 @@
12# Author: Wu Zhangjin <wuzhangjin@gmail.com> 12# Author: Wu Zhangjin <wuzhangjin@gmail.com>
13# 13#
14 14
15include $(srctree)/arch/mips/Kbuild.platforms
16
15# set the default size of the mallocing area for decompressing 17# set the default size of the mallocing area for decompressing
16BOOT_HEAP_SIZE := 0x400000 18BOOT_HEAP_SIZE := 0x400000
17 19
@@ -30,9 +32,10 @@ KBUILD_AFLAGS := $(LINUXINCLUDE) $(KBUILD_AFLAGS) -D__ASSEMBLY__ \
30targets := head.o decompress.o string.o dbg.o uart-16550.o uart-alchemy.o 32targets := head.o decompress.o string.o dbg.o uart-16550.o uart-alchemy.o
31 33
32# decompressor objects (linked with vmlinuz) 34# decompressor objects (linked with vmlinuz)
33vmlinuzobjs-y := $(obj)/head.o $(obj)/decompress.o $(obj)/string.o $(obj)/dbg.o 35vmlinuzobjs-y := $(obj)/head.o $(obj)/decompress.o $(obj)/string.o
34 36
35ifdef CONFIG_DEBUG_ZBOOT 37ifdef CONFIG_DEBUG_ZBOOT
38vmlinuzobjs-$(CONFIG_DEBUG_ZBOOT) += $(obj)/dbg.o
36vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o 39vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o
37vmlinuzobjs-$(CONFIG_MIPS_ALCHEMY) += $(obj)/uart-alchemy.o 40vmlinuzobjs-$(CONFIG_MIPS_ALCHEMY) += $(obj)/uart-alchemy.o
38endif 41endif
@@ -66,8 +69,8 @@ $(obj)/piggy.o: $(obj)/dummy.o $(obj)/vmlinux.bin.z FORCE
66# Calculate the load address of the compressed kernel image 69# Calculate the load address of the compressed kernel image
67hostprogs-y := calc_vmlinuz_load_addr 70hostprogs-y := calc_vmlinuz_load_addr
68 71
69ifeq ($(CONFIG_MACH_JZ4740),y) 72ifneq ($(zload-y),)
70VMLINUZ_LOAD_ADDRESS := 0x80600000 73VMLINUZ_LOAD_ADDRESS := $(zload-y)
71else 74else
72VMLINUZ_LOAD_ADDRESS = $(shell $(obj)/calc_vmlinuz_load_addr \ 75VMLINUZ_LOAD_ADDRESS = $(shell $(obj)/calc_vmlinuz_load_addr \
73 $(obj)/vmlinux.bin $(VMLINUX_LOAD_ADDRESS)) 76 $(obj)/vmlinux.bin $(VMLINUX_LOAD_ADDRESS))
diff --git a/arch/mips/boot/compressed/decompress.c b/arch/mips/boot/compressed/decompress.c
index 31903cf9709d..54831069a206 100644
--- a/arch/mips/boot/compressed/decompress.c
+++ b/arch/mips/boot/compressed/decompress.c
@@ -28,8 +28,13 @@ unsigned long free_mem_end_ptr;
28extern unsigned char __image_begin, __image_end; 28extern unsigned char __image_begin, __image_end;
29 29
30/* debug interfaces */ 30/* debug interfaces */
31#ifdef CONFIG_DEBUG_ZBOOT
31extern void puts(const char *s); 32extern void puts(const char *s);
32extern void puthex(unsigned long long val); 33extern void puthex(unsigned long long val);
34#else
35#define puts(s) do {} while (0)
36#define puthex(val) do {} while (0)
37#endif
33 38
34void error(char *x) 39void error(char *x)
35{ 40{
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index 4f49fa477f14..5d95e4bd709a 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -1,21 +1,12 @@
1dtb-$(CONFIG_BCM3384) += bcm93384wvg.dtb 1dts-dirs += brcm
2dtb-$(CONFIG_CAVIUM_OCTEON_SOC) += octeon_3xxx.dtb octeon_68xx.dtb 2dts-dirs += cavium-octeon
3dtb-$(CONFIG_DT_EASY50712) += easy50712.dtb 3dts-dirs += lantiq
4dtb-$(CONFIG_DT_XLP_EVP) += xlp_evp.dtb 4dts-dirs += mti
5dtb-$(CONFIG_DT_XLP_SVP) += xlp_svp.dtb 5dts-dirs += netlogic
6dtb-$(CONFIG_DT_XLP_FVP) += xlp_fvp.dtb 6dts-dirs += ralink
7dtb-$(CONFIG_DT_XLP_GVP) += xlp_gvp.dtb 7
8dtb-$(CONFIG_DTB_RT2880_EVAL) += rt2880_eval.dtb 8obj-y := $(addsuffix /, $(dts-dirs))
9dtb-$(CONFIG_DTB_RT305X_EVAL) += rt3052_eval.dtb 9
10dtb-$(CONFIG_DTB_RT3883_EVAL) += rt3883_eval.dtb 10always := $(dtb-y)
11dtb-$(CONFIG_DTB_MT7620A_EVAL) += mt7620a_eval.dtb 11subdir-y := $(dts-dirs)
12dtb-$(CONFIG_MIPS_SEAD3) += sead3.dtb 12clean-files := *.dtb *.dtb.S
13
14obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
15
16targets += dtbs
17targets += $(dtb-y)
18
19dtbs: $(addprefix $(obj)/, $(dtb-y))
20
21clean-files += *.dtb *.dtb.S
diff --git a/arch/mips/boot/dts/bcm3384.dtsi b/arch/mips/boot/dts/bcm3384.dtsi
deleted file mode 100644
index 21b074a99c94..000000000000
--- a/arch/mips/boot/dts/bcm3384.dtsi
+++ /dev/null
@@ -1,109 +0,0 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm3384", "brcm,bcm33843";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 /* On BMIPS5000 this is 1/8th of the CPU core clock */
11 mips-hpt-frequency = <100000000>;
12
13 cpu@0 {
14 compatible = "brcm,bmips5000";
15 device_type = "cpu";
16 reg = <0>;
17 };
18
19 cpu@1 {
20 compatible = "brcm,bmips5000";
21 device_type = "cpu";
22 reg = <1>;
23 };
24 };
25
26 clocks {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 periph_clk: periph_clk@0 {
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
33 clock-frequency = <54000000>;
34 };
35 };
36
37 aliases {
38 uart0 = &uart0;
39 };
40
41 cpu_intc: cpu_intc@0 {
42 #address-cells = <0>;
43 compatible = "mti,cpu-interrupt-controller";
44
45 interrupt-controller;
46 #interrupt-cells = <1>;
47 };
48
49 periph_intc: periph_intc@14e00038 {
50 compatible = "brcm,bcm3384-intc";
51 reg = <0x14e00038 0x8 0x14e00340 0x8>;
52
53 interrupt-controller;
54 #interrupt-cells = <1>;
55
56 interrupt-parent = <&cpu_intc>;
57 interrupts = <4>;
58 };
59
60 zmips_intc: zmips_intc@104b0060 {
61 compatible = "brcm,bcm3384-intc";
62 reg = <0x104b0060 0x8>;
63
64 interrupt-controller;
65 #interrupt-cells = <1>;
66
67 interrupt-parent = <&periph_intc>;
68 interrupts = <29>;
69 };
70
71 iop_intc: iop_intc@14e00058 {
72 compatible = "brcm,bcm3384-intc";
73 reg = <0x14e00058 0x8>;
74
75 interrupt-controller;
76 #interrupt-cells = <1>;
77
78 interrupt-parent = <&cpu_intc>;
79 interrupts = <6>;
80 };
81
82 uart0: serial@14e00520 {
83 compatible = "brcm,bcm6345-uart";
84 reg = <0x14e00520 0x18>;
85 interrupt-parent = <&periph_intc>;
86 interrupts = <2>;
87 clocks = <&periph_clk>;
88 status = "disabled";
89 };
90
91 ehci0: usb@15400300 {
92 compatible = "brcm,bcm3384-ehci", "generic-ehci";
93 reg = <0x15400300 0x100>;
94 big-endian;
95 interrupt-parent = <&periph_intc>;
96 interrupts = <41>;
97 status = "disabled";
98 };
99
100 ohci0: usb@15400400 {
101 compatible = "brcm,bcm3384-ohci", "generic-ohci";
102 reg = <0x15400400 0x100>;
103 big-endian;
104 no-big-frame-no;
105 interrupt-parent = <&periph_intc>;
106 interrupts = <40>;
107 status = "disabled";
108 };
109};
diff --git a/arch/mips/boot/dts/brcm/Makefile b/arch/mips/boot/dts/brcm/Makefile
new file mode 100644
index 000000000000..1c8353bfe003
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/Makefile
@@ -0,0 +1,19 @@
1dtb-$(CONFIG_DT_BCM93384WVG) += bcm93384wvg.dtb
2dtb-$(CONFIG_DT_BCM93384WVG_VIPER) += bcm93384wvg_viper.dtb
3dtb-$(CONFIG_DT_BCM96368MVWG) += bcm96368mvwg.dtb
4dtb-$(CONFIG_DT_BCM9EJTAGPRB) += bcm9ejtagprb.dtb
5dtb-$(CONFIG_DT_BCM97125CBMB) += bcm97125cbmb.dtb
6dtb-$(CONFIG_DT_BCM97346DBSMB) += bcm97346dbsmb.dtb
7dtb-$(CONFIG_DT_BCM97358SVMB) += bcm97358svmb.dtb
8dtb-$(CONFIG_DT_BCM97360SVMB) += bcm97360svmb.dtb
9dtb-$(CONFIG_DT_BCM97362SVMB) += bcm97362svmb.dtb
10dtb-$(CONFIG_DT_BCM97420C) += bcm97420c.dtb
11dtb-$(CONFIG_DT_BCM97425SVMB) += bcm97425svmb.dtb
12
13obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
14
15# Force kbuild to make empty built-in.o if necessary
16obj- += dummy.o
17
18always := $(dtb-y)
19clean-files := *.dtb *.dtb.S
diff --git a/arch/mips/boot/dts/brcm/bcm3384_viper.dtsi b/arch/mips/boot/dts/brcm/bcm3384_viper.dtsi
new file mode 100644
index 000000000000..aa406b43c65f
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm3384_viper.dtsi
@@ -0,0 +1,108 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm3384-viper", "brcm,bcm33843-viper";
5
6 memory@0 {
7 device_type = "memory";
8
9 /* Typical ranges. The bootloader should fill these in. */
10 reg = <0x06000000 0x02000000>,
11 <0x0e000000 0x02000000>;
12 };
13
14 cpus {
15 #address-cells = <1>;
16 #size-cells = <0>;
17
18 /* 1/2 of the CPU core clock (standard MIPS behavior) */
19 mips-hpt-frequency = <300000000>;
20
21 cpu@0 {
22 compatible = "brcm,bmips4350";
23 device_type = "cpu";
24 reg = <0>;
25 };
26 };
27
28 cpu_intc: cpu_intc {
29 #address-cells = <0>;
30 compatible = "mti,cpu-interrupt-controller";
31
32 interrupt-controller;
33 #interrupt-cells = <1>;
34 };
35
36 clocks {
37 periph_clk: periph_clk {
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
40 clock-frequency = <54000000>;
41 };
42 };
43
44 aliases {
45 uart0 = &uart0;
46 };
47
48 ubus {
49 #address-cells = <1>;
50 #size-cells = <1>;
51
52 compatible = "brcm,ubus", "simple-bus";
53 ranges;
54 /* No dma-ranges on Viper. */
55
56 periph_intc: periph_intc@14e00048 {
57 compatible = "brcm,bcm3380-l2-intc";
58 reg = <0x14e00048 0x4 0x14e0004c 0x4>,
59 <0x14e00350 0x4 0x14e00354 0x4>;
60
61 interrupt-controller;
62 #interrupt-cells = <1>;
63
64 interrupt-parent = <&cpu_intc>;
65 interrupts = <4>;
66 };
67
68 cmips_intc: cmips_intc@151f8048 {
69 compatible = "brcm,bcm3380-l2-intc";
70 reg = <0x151f8048 0x4 0x151f804c 0x4>;
71
72 interrupt-controller;
73 #interrupt-cells = <1>;
74
75 interrupt-parent = <&periph_intc>;
76 interrupts = <30>;
77 brcm,int-map-mask = <0xffffffff>;
78 };
79
80 uart0: serial@14e00520 {
81 compatible = "brcm,bcm6345-uart";
82 reg = <0x14e00520 0x18>;
83 interrupt-parent = <&periph_intc>;
84 interrupts = <2>;
85 clocks = <&periph_clk>;
86 status = "disabled";
87 };
88
89 ehci0: usb@15400300 {
90 compatible = "brcm,bcm3384-ehci", "generic-ehci";
91 reg = <0x15400300 0x100>;
92 big-endian;
93 interrupt-parent = <&periph_intc>;
94 interrupts = <41>;
95 status = "disabled";
96 };
97
98 ohci0: usb@15400400 {
99 compatible = "brcm,bcm3384-ohci", "generic-ohci";
100 reg = <0x15400400 0x100>;
101 big-endian;
102 no-big-frame-no;
103 interrupt-parent = <&periph_intc>;
104 interrupts = <40>;
105 status = "disabled";
106 };
107 };
108};
diff --git a/arch/mips/boot/dts/brcm/bcm3384_zephyr.dtsi b/arch/mips/boot/dts/brcm/bcm3384_zephyr.dtsi
new file mode 100644
index 000000000000..a7bd8564e9f6
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm3384_zephyr.dtsi
@@ -0,0 +1,126 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm3384", "brcm,bcm33843";
5
6 memory@0 {
7 device_type = "memory";
8
9 /* Typical range. The bootloader should fill this in. */
10 reg = <0x0 0x08000000>;
11 };
12
13 cpus {
14 #address-cells = <1>;
15 #size-cells = <0>;
16
17 /* On BMIPS5000 this is 1/8th of the CPU core clock */
18 mips-hpt-frequency = <100000000>;
19
20 cpu@0 {
21 compatible = "brcm,bmips5000";
22 device_type = "cpu";
23 reg = <0>;
24 };
25
26 cpu@1 {
27 compatible = "brcm,bmips5000";
28 device_type = "cpu";
29 reg = <1>;
30 };
31 };
32
33 cpu_intc: cpu_intc {
34 #address-cells = <0>;
35 compatible = "mti,cpu-interrupt-controller";
36
37 interrupt-controller;
38 #interrupt-cells = <1>;
39 };
40
41 clocks {
42 periph_clk: periph_clk {
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <54000000>;
46 };
47 };
48
49 aliases {
50 uart0 = &uart0;
51 };
52
53 ubus {
54 #address-cells = <1>;
55 #size-cells = <1>;
56
57 compatible = "brcm,ubus", "simple-bus";
58 ranges;
59 dma-ranges = <0x00000000 0x08000000 0x08000000>,
60 <0x08000000 0x00000000 0x08000000>;
61
62 periph_intc: periph_intc@14e00038 {
63 compatible = "brcm,bcm3380-l2-intc";
64 reg = <0x14e00038 0x4 0x14e0003c 0x4>,
65 <0x14e00340 0x4 0x14e00344 0x4>;
66
67 interrupt-controller;
68 #interrupt-cells = <1>;
69
70 interrupt-parent = <&cpu_intc>;
71 interrupts = <4>;
72 };
73
74 zmips_intc: zmips_intc@104b0060 {
75 compatible = "brcm,bcm3380-l2-intc";
76 reg = <0x104b0060 0x4 0x104b0064 0x4>;
77
78 interrupt-controller;
79 #interrupt-cells = <1>;
80
81 interrupt-parent = <&periph_intc>;
82 interrupts = <29>;
83 brcm,int-map-mask = <0xffffffff>;
84 };
85
86 iop_intc: iop_intc@14e00058 {
87 compatible = "brcm,bcm3380-l2-intc";
88 reg = <0x14e00058 0x4 0x14e0005c 0x4>;
89
90 interrupt-controller;
91 #interrupt-cells = <1>;
92
93 interrupt-parent = <&cpu_intc>;
94 interrupts = <6>;
95 brcm,int-map-mask = <0xffffffff>;
96 };
97
98 uart0: serial@14e00520 {
99 compatible = "brcm,bcm6345-uart";
100 reg = <0x14e00520 0x18>;
101 interrupt-parent = <&periph_intc>;
102 interrupts = <2>;
103 clocks = <&periph_clk>;
104 status = "disabled";
105 };
106
107 ehci0: usb@15400300 {
108 compatible = "brcm,bcm3384-ehci", "generic-ehci";
109 reg = <0x15400300 0x100>;
110 big-endian;
111 interrupt-parent = <&periph_intc>;
112 interrupts = <41>;
113 status = "disabled";
114 };
115
116 ohci0: usb@15400400 {
117 compatible = "brcm,bcm3384-ohci", "generic-ohci";
118 reg = <0x15400400 0x100>;
119 big-endian;
120 no-big-frame-no;
121 interrupt-parent = <&periph_intc>;
122 interrupts = <40>;
123 status = "disabled";
124 };
125 };
126};
diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi
new file mode 100644
index 000000000000..41891c1e58bd
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi
@@ -0,0 +1,86 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm6328";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 mips-hpt-frequency = <160000000>;
11
12 cpu@0 {
13 compatible = "brcm,bmips4350";
14 device_type = "cpu";
15 reg = <0>;
16 };
17
18 cpu@1 {
19 compatible = "brcm,bmips4350";
20 device_type = "cpu";
21 reg = <1>;
22 };
23 };
24
25 clocks {
26 periph_clk: periph_clk {
27 compatible = "fixed-clock";
28 #clock-cells = <0>;
29 clock-frequency = <50000000>;
30 };
31 };
32
33 aliases {
34 uart0 = &uart0;
35 };
36
37 cpu_intc: cpu_intc {
38 #address-cells = <0>;
39 compatible = "mti,cpu-interrupt-controller";
40
41 interrupt-controller;
42 #interrupt-cells = <1>;
43 };
44
45 ubus {
46 #address-cells = <1>;
47 #size-cells = <1>;
48
49 compatible = "simple-bus";
50 ranges;
51
52 periph_intc: periph_intc@10000020 {
53 compatible = "brcm,bcm3380-l2-intc";
54 reg = <0x10000024 0x4 0x1000002c 0x4>,
55 <0x10000020 0x4 0x10000028 0x4>;
56
57 interrupt-controller;
58 #interrupt-cells = <1>;
59
60 interrupt-parent = <&cpu_intc>;
61 interrupts = <2>;
62 };
63
64 uart0: serial@10000100 {
65 compatible = "brcm,bcm6345-uart";
66 reg = <0x10000100 0x18>;
67 interrupt-parent = <&periph_intc>;
68 interrupts = <28>;
69 clocks = <&periph_clk>;
70 status = "disabled";
71 };
72
73 timer: timer@10000040 {
74 compatible = "syscon";
75 reg = <0x10000040 0x2c>;
76 little-endian;
77 };
78
79 reboot {
80 compatible = "syscon-reboot";
81 regmap = <&timer>;
82 offset = <0x28>;
83 mask = <0x1>;
84 };
85 };
86};
diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi
new file mode 100644
index 000000000000..45152bc22117
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi
@@ -0,0 +1,93 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm6368";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 mips-hpt-frequency = <200000000>;
11
12 cpu@0 {
13 compatible = "brcm,bmips4350";
14 device_type = "cpu";
15 reg = <0>;
16 };
17
18 cpu@1 {
19 compatible = "brcm,bmips4350";
20 device_type = "cpu";
21 reg = <1>;
22 };
23
24 };
25
26 clocks {
27 periph_clk: periph_clk {
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
30 clock-frequency = <50000000>;
31 };
32 };
33
34 aliases {
35 uart0 = &uart0;
36 };
37
38 cpu_intc: cpu_intc {
39 #address-cells = <0>;
40 compatible = "mti,cpu-interrupt-controller";
41
42 interrupt-controller;
43 #interrupt-cells = <1>;
44 };
45
46 ubus {
47 #address-cells = <1>;
48 #size-cells = <1>;
49
50 compatible = "simple-bus";
51 ranges;
52
53 periph_intc: periph_intc@10000020 {
54 compatible = "brcm,bcm3380-l2-intc";
55 reg = <0x10000024 0x4 0x1000002c 0x4>,
56 <0x10000020 0x4 0x10000028 0x4>;
57
58 interrupt-controller;
59 #interrupt-cells = <1>;
60
61 interrupt-parent = <&cpu_intc>;
62 interrupts = <2>;
63 };
64
65 uart0: serial@10000100 {
66 compatible = "brcm,bcm6345-uart";
67 reg = <0x10000100 0x18>;
68 interrupt-parent = <&periph_intc>;
69 interrupts = <2>;
70 clocks = <&periph_clk>;
71 status = "disabled";
72 };
73
74 ehci0: usb@10001500 {
75 compatible = "brcm,bcm6368-ehci", "generic-ehci";
76 reg = <0x10001500 0x100>;
77 big-endian;
78 interrupt-parent = <&periph_intc>;
79 interrupts = <7>;
80 status = "disabled";
81 };
82
83 ohci0: usb@10001600 {
84 compatible = "brcm,bcm6368-ohci", "generic-ohci";
85 reg = <0x10001600 0x100>;
86 big-endian;
87 no-big-frame-no;
88 interrupt-parent = <&periph_intc>;
89 interrupts = <5>;
90 status = "disabled";
91 };
92 };
93};
diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
new file mode 100644
index 000000000000..1a7efa883c5e
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
@@ -0,0 +1,139 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm7125";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 mips-hpt-frequency = <202500000>;
11
12 cpu@0 {
13 compatible = "brcm,bmips4380";
14 device_type = "cpu";
15 reg = <0>;
16 };
17
18 cpu@1 {
19 compatible = "brcm,bmips4380";
20 device_type = "cpu";
21 reg = <1>;
22 };
23 };
24
25 aliases {
26 uart0 = &uart0;
27 };
28
29 cpu_intc: cpu_intc {
30 #address-cells = <0>;
31 compatible = "mti,cpu-interrupt-controller";
32
33 interrupt-controller;
34 #interrupt-cells = <1>;
35 };
36
37 clocks {
38 uart_clk: uart_clk {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <81000000>;
42 };
43 };
44
45 rdb {
46 #address-cells = <1>;
47 #size-cells = <1>;
48
49 compatible = "simple-bus";
50 ranges = <0 0x10000000 0x01000000>;
51
52 periph_intc: periph_intc@441400 {
53 compatible = "brcm,bcm7038-l1-intc";
54 reg = <0x441400 0x30>, <0x441600 0x30>;
55
56 interrupt-controller;
57 #interrupt-cells = <1>;
58
59 interrupt-parent = <&cpu_intc>;
60 interrupts = <2>, <3>;
61 };
62
63 sun_l2_intc: sun_l2_intc@401800 {
64 compatible = "brcm,l2-intc";
65 reg = <0x401800 0x30>;
66 interrupt-controller;
67 #interrupt-cells = <1>;
68 interrupt-parent = <&periph_intc>;
69 interrupts = <23>;
70 };
71
72 gisb-arb@400000 {
73 compatible = "brcm,bcm7400-gisb-arb";
74 reg = <0x400000 0xdc>;
75 native-endian;
76 interrupt-parent = <&sun_l2_intc>;
77 interrupts = <0>, <2>;
78 brcm,gisb-arb-master-mask = <0x2f7>;
79 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pci_0",
80 "bsp_0", "rdc_0", "rptd_0",
81 "avd_0", "jtag_0";
82 };
83
84 upg_irq0_intc: upg_irq0_intc@406780 {
85 compatible = "brcm,bcm7120-l2-intc";
86 reg = <0x406780 0x8>;
87
88 brcm,int-map-mask = <0x44>;
89 brcm,int-fwd-mask = <0x70000>;
90
91 interrupt-controller;
92 #interrupt-cells = <1>;
93
94 interrupt-parent = <&periph_intc>;
95 interrupts = <18>;
96 };
97
98 sun_top_ctrl: syscon@404000 {
99 compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
100 reg = <0x404000 0x60c>;
101 little-endian;
102 };
103
104 reboot {
105 compatible = "brcm,bcm7038-reboot";
106 syscon = <&sun_top_ctrl 0x8 0x14>;
107 };
108
109 uart0: serial@406b00 {
110 compatible = "ns16550a";
111 reg = <0x406b00 0x20>;
112 reg-io-width = <0x4>;
113 reg-shift = <0x2>;
114 native-endian;
115 interrupt-parent = <&periph_intc>;
116 interrupts = <21>;
117 clocks = <&uart_clk>;
118 status = "disabled";
119 };
120
121 ehci0: usb@488300 {
122 compatible = "brcm,bcm7125-ehci", "generic-ehci";
123 reg = <0x488300 0x100>;
124 native-endian;
125 interrupt-parent = <&periph_intc>;
126 interrupts = <60>;
127 status = "disabled";
128 };
129
130 ohci0: usb@488400 {
131 compatible = "brcm,bcm7125-ohci", "generic-ohci";
132 reg = <0x488400 0x100>;
133 native-endian;
134 interrupt-parent = <&periph_intc>;
135 interrupts = <61>;
136 status = "disabled";
137 };
138 };
139};
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
new file mode 100644
index 000000000000..1f30728a3177
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -0,0 +1,224 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm7346";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 mips-hpt-frequency = <163125000>;
11
12 cpu@0 {
13 compatible = "brcm,bmips5000";
14 device_type = "cpu";
15 reg = <0>;
16 };
17
18 cpu@1 {
19 compatible = "brcm,bmips5000";
20 device_type = "cpu";
21 reg = <1>;
22 };
23 };
24
25 aliases {
26 uart0 = &uart0;
27 };
28
29 cpu_intc: cpu_intc {
30 #address-cells = <0>;
31 compatible = "mti,cpu-interrupt-controller";
32
33 interrupt-controller;
34 #interrupt-cells = <1>;
35 };
36
37 clocks {
38 uart_clk: uart_clk {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <81000000>;
42 };
43 };
44
45 rdb {
46 #address-cells = <1>;
47 #size-cells = <1>;
48
49 compatible = "simple-bus";
50 ranges = <0 0x10000000 0x01000000>;
51
52 periph_intc: periph_intc@411400 {
53 compatible = "brcm,bcm7038-l1-intc";
54 reg = <0x411400 0x30>, <0x411600 0x30>;
55
56 interrupt-controller;
57 #interrupt-cells = <1>;
58
59 interrupt-parent = <&cpu_intc>;
60 interrupts = <2>, <3>;
61 };
62
63 sun_l2_intc: sun_l2_intc@403000 {
64 compatible = "brcm,l2-intc";
65 reg = <0x403000 0x30>;
66 interrupt-controller;
67 #interrupt-cells = <1>;
68 interrupt-parent = <&periph_intc>;
69 interrupts = <51>;
70 };
71
72 gisb-arb@400000 {
73 compatible = "brcm,bcm7400-gisb-arb";
74 reg = <0x400000 0xdc>;
75 native-endian;
76 interrupt-parent = <&sun_l2_intc>;
77 interrupts = <0>, <2>;
78 brcm,gisb-arb-master-mask = <0x673>;
79 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
80 "rdc_0", "raaga_0",
81 "jtag_0", "svd_0";
82 };
83
84 upg_irq0_intc: upg_irq0_intc@406780 {
85 compatible = "brcm,bcm7120-l2-intc";
86 reg = <0x406780 0x8>;
87
88 brcm,int-map-mask = <0x44>;
89 brcm,int-fwd-mask = <0x70000>;
90
91 interrupt-controller;
92 #interrupt-cells = <1>;
93
94 interrupt-parent = <&periph_intc>;
95 interrupts = <59>;
96 };
97
98 sun_top_ctrl: syscon@404000 {
99 compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
100 reg = <0x404000 0x51c>;
101 little-endian;
102 };
103
104 reboot {
105 compatible = "brcm,brcmstb-reboot";
106 syscon = <&sun_top_ctrl 0x304 0x308>;
107 };
108
109 uart0: serial@406900 {
110 compatible = "ns16550a";
111 reg = <0x406900 0x20>;
112 reg-io-width = <0x4>;
113 reg-shift = <0x2>;
114 native-endian;
115 interrupt-parent = <&periph_intc>;
116 interrupts = <64>;
117 clocks = <&uart_clk>;
118 status = "disabled";
119 };
120
121 enet0: ethernet@430000 {
122 phy-mode = "internal";
123 phy-handle = <&phy1>;
124 mac-address = [ 00 10 18 36 23 1a ];
125 compatible = "brcm,genet-v2";
126 #address-cells = <0x1>;
127 #size-cells = <0x1>;
128 reg = <0x430000 0x4c8c>;
129 interrupts = <24>, <25>;
130 interrupt-parent = <&periph_intc>;
131 status = "disabled";
132
133 mdio@e14 {
134 compatible = "brcm,genet-mdio-v2";
135 #address-cells = <0x1>;
136 #size-cells = <0x0>;
137 reg = <0xe14 0x8>;
138
139 phy1: ethernet-phy@1 {
140 max-speed = <100>;
141 reg = <0x1>;
142 compatible = "brcm,40nm-ephy",
143 "ethernet-phy-ieee802.3-c22";
144 };
145 };
146 };
147
148 ehci0: usb@480300 {
149 compatible = "brcm,bcm7346-ehci", "generic-ehci";
150 reg = <0x480300 0x100>;
151 native-endian;
152 interrupt-parent = <&periph_intc>;
153 interrupts = <68>;
154 status = "disabled";
155 };
156
157 ohci0: usb@480400 {
158 compatible = "brcm,bcm7346-ohci", "generic-ohci";
159 reg = <0x480400 0x100>;
160 native-endian;
161 no-big-frame-no;
162 interrupt-parent = <&periph_intc>;
163 interrupts = <70>;
164 status = "disabled";
165 };
166
167 ehci1: usb@480500 {
168 compatible = "brcm,bcm7346-ehci", "generic-ehci";
169 reg = <0x480500 0x100>;
170 native-endian;
171 interrupt-parent = <&periph_intc>;
172 interrupts = <69>;
173 status = "disabled";
174 };
175
176 ohci1: usb@480600 {
177 compatible = "brcm,bcm7346-ohci", "generic-ohci";
178 reg = <0x480600 0x100>;
179 native-endian;
180 no-big-frame-no;
181 interrupt-parent = <&periph_intc>;
182 interrupts = <71>;
183 status = "disabled";
184 };
185
186 ehci2: usb@490300 {
187 compatible = "brcm,bcm7346-ehci", "generic-ehci";
188 reg = <0x490300 0x100>;
189 native-endian;
190 interrupt-parent = <&periph_intc>;
191 interrupts = <73>;
192 status = "disabled";
193 };
194
195 ohci2: usb@490400 {
196 compatible = "brcm,bcm7346-ohci", "generic-ohci";
197 reg = <0x490400 0x100>;
198 native-endian;
199 no-big-frame-no;
200 interrupt-parent = <&periph_intc>;
201 interrupts = <75>;
202 status = "disabled";
203 };
204
205 ehci3: usb@490500 {
206 compatible = "brcm,bcm7346-ehci", "generic-ehci";
207 reg = <0x490500 0x100>;
208 native-endian;
209 interrupt-parent = <&periph_intc>;
210 interrupts = <74>;
211 status = "disabled";
212 };
213
214 ohci3: usb@490600 {
215 compatible = "brcm,bcm7346-ohci", "generic-ohci";
216 reg = <0x490600 0x100>;
217 native-endian;
218 no-big-frame-no;
219 interrupt-parent = <&periph_intc>;
220 interrupts = <76>;
221 status = "disabled";
222 };
223 };
224};
diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
new file mode 100644
index 000000000000..2c2aa9368f76
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -0,0 +1,161 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm7358";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 mips-hpt-frequency = <375000000>;
11
12 cpu@0 {
13 compatible = "brcm,bmips3300";
14 device_type = "cpu";
15 reg = <0>;
16 };
17 };
18
19 aliases {
20 uart0 = &uart0;
21 };
22
23 cpu_intc: cpu_intc {
24 #address-cells = <0>;
25 compatible = "mti,cpu-interrupt-controller";
26
27 interrupt-controller;
28 #interrupt-cells = <1>;
29 };
30
31 clocks {
32 uart_clk: uart_clk {
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
35 clock-frequency = <81000000>;
36 };
37 };
38
39 rdb {
40 #address-cells = <1>;
41 #size-cells = <1>;
42
43 compatible = "simple-bus";
44 ranges = <0 0x10000000 0x01000000>;
45
46 periph_intc: periph_intc@411400 {
47 compatible = "brcm,bcm7038-l1-intc";
48 reg = <0x411400 0x30>;
49
50 interrupt-controller;
51 #interrupt-cells = <1>;
52
53 interrupt-parent = <&cpu_intc>;
54 interrupts = <2>;
55 };
56
57 sun_l2_intc: sun_l2_intc@403000 {
58 compatible = "brcm,l2-intc";
59 reg = <0x403000 0x30>;
60 interrupt-controller;
61 #interrupt-cells = <1>;
62 interrupt-parent = <&periph_intc>;
63 interrupts = <48>;
64 };
65
66 gisb-arb@400000 {
67 compatible = "brcm,bcm7400-gisb-arb";
68 reg = <0x400000 0xdc>;
69 native-endian;
70 interrupt-parent = <&sun_l2_intc>;
71 interrupts = <0>, <2>;
72 brcm,gisb-arb-master-mask = <0x2f3>;
73 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
74 "rdc_0", "raaga_0",
75 "avd_0", "jtag_0";
76 };
77
78 upg_irq0_intc: upg_irq0_intc@406600 {
79 compatible = "brcm,bcm7120-l2-intc";
80 reg = <0x406600 0x8>;
81
82 brcm,int-map-mask = <0x44>;
83 brcm,int-fwd-mask = <0x70000>;
84
85 interrupt-controller;
86 #interrupt-cells = <1>;
87
88 interrupt-parent = <&periph_intc>;
89 interrupts = <56>;
90 };
91
92 sun_top_ctrl: syscon@404000 {
93 compatible = "brcm,bcm7358-sun-top-ctrl", "syscon";
94 reg = <0x404000 0x51c>;
95 little-endian;
96 };
97
98 reboot {
99 compatible = "brcm,brcmstb-reboot";
100 syscon = <&sun_top_ctrl 0x304 0x308>;
101 };
102
103 uart0: serial@406800 {
104 compatible = "ns16550a";
105 reg = <0x406800 0x20>;
106 reg-io-width = <0x4>;
107 reg-shift = <0x2>;
108 native-endian;
109 interrupt-parent = <&periph_intc>;
110 interrupts = <61>;
111 clocks = <&uart_clk>;
112 status = "disabled";
113 };
114
115 enet0: ethernet@430000 {
116 phy-mode = "internal";
117 phy-handle = <&phy1>;
118 mac-address = [ 00 10 18 36 23 1a ];
119 compatible = "brcm,genet-v2";
120 #address-cells = <0x1>;
121 #size-cells = <0x1>;
122 reg = <0x430000 0x4c8c>;
123 interrupts = <24>, <25>;
124 interrupt-parent = <&periph_intc>;
125 status = "disabled";
126
127 mdio@e14 {
128 compatible = "brcm,genet-mdio-v2";
129 #address-cells = <0x1>;
130 #size-cells = <0x0>;
131 reg = <0xe14 0x8>;
132
133 phy1: ethernet-phy@1 {
134 max-speed = <100>;
135 reg = <0x1>;
136 compatible = "brcm,40nm-ephy",
137 "ethernet-phy-ieee802.3-c22";
138 };
139 };
140 };
141
142 ehci0: usb@480300 {
143 compatible = "brcm,bcm7358-ehci", "generic-ehci";
144 reg = <0x480300 0x100>;
145 native-endian;
146 interrupt-parent = <&periph_intc>;
147 interrupts = <65>;
148 status = "disabled";
149 };
150
151 ohci0: usb@480400 {
152 compatible = "brcm,bcm7358-ohci", "generic-ohci";
153 reg = <0x480400 0x100>;
154 native-endian;
155 no-big-frame-no;
156 interrupt-parent = <&periph_intc>;
157 interrupts = <66>;
158 status = "disabled";
159 };
160 };
161};
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
new file mode 100644
index 000000000000..f23b0aed276f
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -0,0 +1,161 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm7360";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 mips-hpt-frequency = <375000000>;
11
12 cpu@0 {
13 compatible = "brcm,bmips3300";
14 device_type = "cpu";
15 reg = <0>;
16 };
17 };
18
19 aliases {
20 uart0 = &uart0;
21 };
22
23 cpu_intc: cpu_intc {
24 #address-cells = <0>;
25 compatible = "mti,cpu-interrupt-controller";
26
27 interrupt-controller;
28 #interrupt-cells = <1>;
29 };
30
31 clocks {
32 uart_clk: uart_clk {
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
35 clock-frequency = <81000000>;
36 };
37 };
38
39 rdb {
40 #address-cells = <1>;
41 #size-cells = <1>;
42
43 compatible = "simple-bus";
44 ranges = <0 0x10000000 0x01000000>;
45
46 periph_intc: periph_intc@411400 {
47 compatible = "brcm,bcm7038-l1-intc";
48 reg = <0x411400 0x30>;
49
50 interrupt-controller;
51 #interrupt-cells = <1>;
52
53 interrupt-parent = <&cpu_intc>;
54 interrupts = <2>;
55 };
56
57 sun_l2_intc: sun_l2_intc@403000 {
58 compatible = "brcm,l2-intc";
59 reg = <0x403000 0x30>;
60 interrupt-controller;
61 #interrupt-cells = <1>;
62 interrupt-parent = <&periph_intc>;
63 interrupts = <48>;
64 };
65
66 gisb-arb@400000 {
67 compatible = "brcm,bcm7400-gisb-arb";
68 reg = <0x400000 0xdc>;
69 native-endian;
70 interrupt-parent = <&sun_l2_intc>;
71 interrupts = <0>, <2>;
72 brcm,gisb-arb-master-mask = <0x2f3>;
73 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
74 "rdc_0", "raaga_0",
75 "avd_0", "jtag_0";
76 };
77
78 upg_irq0_intc: upg_irq0_intc@406600 {
79 compatible = "brcm,bcm7120-l2-intc";
80 reg = <0x406600 0x8>;
81
82 brcm,int-map-mask = <0x44>;
83 brcm,int-fwd-mask = <0x70000>;
84
85 interrupt-controller;
86 #interrupt-cells = <1>;
87
88 interrupt-parent = <&periph_intc>;
89 interrupts = <56>;
90 };
91
92 sun_top_ctrl: syscon@404000 {
93 compatible = "brcm,bcm7360-sun-top-ctrl", "syscon";
94 reg = <0x404000 0x51c>;
95 little-endian;
96 };
97
98 reboot {
99 compatible = "brcm,brcmstb-reboot";
100 syscon = <&sun_top_ctrl 0x304 0x308>;
101 };
102
103 uart0: serial@406800 {
104 compatible = "ns16550a";
105 reg = <0x406800 0x20>;
106 reg-io-width = <0x4>;
107 reg-shift = <0x2>;
108 native-endian;
109 interrupt-parent = <&periph_intc>;
110 interrupts = <61>;
111 clocks = <&uart_clk>;
112 status = "disabled";
113 };
114
115 enet0: ethernet@430000 {
116 phy-mode = "internal";
117 phy-handle = <&phy1>;
118 mac-address = [ 00 10 18 36 23 1a ];
119 compatible = "brcm,genet-v2";
120 #address-cells = <0x1>;
121 #size-cells = <0x1>;
122 reg = <0x430000 0x4c8c>;
123 interrupts = <24>, <25>;
124 interrupt-parent = <&periph_intc>;
125 status = "disabled";
126
127 mdio@e14 {
128 compatible = "brcm,genet-mdio-v2";
129 #address-cells = <0x1>;
130 #size-cells = <0x0>;
131 reg = <0xe14 0x8>;
132
133 phy1: ethernet-phy@1 {
134 max-speed = <100>;
135 reg = <0x1>;
136 compatible = "brcm,40nm-ephy",
137 "ethernet-phy-ieee802.3-c22";
138 };
139 };
140 };
141
142 ehci0: usb@480300 {
143 compatible = "brcm,bcm7360-ehci", "generic-ehci";
144 reg = <0x480300 0x100>;
145 native-endian;
146 interrupt-parent = <&periph_intc>;
147 interrupts = <65>;
148 status = "disabled";
149 };
150
151 ohci0: usb@480400 {
152 compatible = "brcm,bcm7360-ohci", "generic-ohci";
153 reg = <0x480400 0x100>;
154 native-endian;
155 no-big-frame-no;
156 interrupt-parent = <&periph_intc>;
157 interrupts = <66>;
158 status = "disabled";
159 };
160 };
161};
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
new file mode 100644
index 000000000000..da99db665bbc
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -0,0 +1,167 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm7362";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 mips-hpt-frequency = <375000000>;
11
12 cpu@0 {
13 compatible = "brcm,bmips4380";
14 device_type = "cpu";
15 reg = <0>;
16 };
17
18 cpu@1 {
19 compatible = "brcm,bmips4380";
20 device_type = "cpu";
21 reg = <1>;
22 };
23 };
24
25 aliases {
26 uart0 = &uart0;
27 };
28
29 cpu_intc: cpu_intc {
30 #address-cells = <0>;
31 compatible = "mti,cpu-interrupt-controller";
32
33 interrupt-controller;
34 #interrupt-cells = <1>;
35 };
36
37 clocks {
38 uart_clk: uart_clk {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <81000000>;
42 };
43 };
44
45 rdb {
46 #address-cells = <1>;
47 #size-cells = <1>;
48
49 compatible = "simple-bus";
50 ranges = <0 0x10000000 0x01000000>;
51
52 periph_intc: periph_intc@411400 {
53 compatible = "brcm,bcm7038-l1-intc";
54 reg = <0x411400 0x30>, <0x411600 0x30>;
55
56 interrupt-controller;
57 #interrupt-cells = <1>;
58
59 interrupt-parent = <&cpu_intc>;
60 interrupts = <2>, <3>;
61 };
62
63 sun_l2_intc: sun_l2_intc@403000 {
64 compatible = "brcm,l2-intc";
65 reg = <0x403000 0x30>;
66 interrupt-controller;
67 #interrupt-cells = <1>;
68 interrupt-parent = <&periph_intc>;
69 interrupts = <48>;
70 };
71
72 gisb-arb@400000 {
73 compatible = "brcm,bcm7400-gisb-arb";
74 reg = <0x400000 0xdc>;
75 native-endian;
76 interrupt-parent = <&sun_l2_intc>;
77 interrupts = <0>, <2>;
78 brcm,gisb-arb-master-mask = <0x2f3>;
79 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
80 "rdc_0", "raaga_0",
81 "avd_0", "jtag_0";
82 };
83
84 upg_irq0_intc: upg_irq0_intc@406600 {
85 compatible = "brcm,bcm7120-l2-intc";
86 reg = <0x406600 0x8>;
87
88 brcm,int-map-mask = <0x44>;
89 brcm,int-fwd-mask = <0x70000>;
90
91 interrupt-controller;
92 #interrupt-cells = <1>;
93
94 interrupt-parent = <&periph_intc>;
95 interrupts = <56>;
96 };
97
98 sun_top_ctrl: syscon@404000 {
99 compatible = "brcm,bcm7362-sun-top-ctrl", "syscon";
100 reg = <0x404000 0x51c>;
101 little-endian;
102 };
103
104 reboot {
105 compatible = "brcm,brcmstb-reboot";
106 syscon = <&sun_top_ctrl 0x304 0x308>;
107 };
108
109 uart0: serial@406800 {
110 compatible = "ns16550a";
111 reg = <0x406800 0x20>;
112 reg-io-width = <0x4>;
113 reg-shift = <0x2>;
114 native-endian;
115 interrupt-parent = <&periph_intc>;
116 interrupts = <61>;
117 clocks = <&uart_clk>;
118 status = "disabled";
119 };
120
121 enet0: ethernet@430000 {
122 phy-mode = "internal";
123 phy-handle = <&phy1>;
124 mac-address = [ 00 10 18 36 23 1a ];
125 compatible = "brcm,genet-v2";
126 #address-cells = <0x1>;
127 #size-cells = <0x1>;
128 reg = <0x430000 0x4c8c>;
129 interrupts = <24>, <25>;
130 interrupt-parent = <&periph_intc>;
131 status = "disabled";
132
133 mdio@e14 {
134 compatible = "brcm,genet-mdio-v2";
135 #address-cells = <0x1>;
136 #size-cells = <0x0>;
137 reg = <0xe14 0x8>;
138
139 phy1: ethernet-phy@1 {
140 max-speed = <100>;
141 reg = <0x1>;
142 compatible = "brcm,40nm-ephy",
143 "ethernet-phy-ieee802.3-c22";
144 };
145 };
146 };
147
148 ehci0: usb@480300 {
149 compatible = "brcm,bcm7362-ehci", "generic-ehci";
150 reg = <0x480300 0x100>;
151 native-endian;
152 interrupt-parent = <&periph_intc>;
153 interrupts = <65>;
154 status = "disabled";
155 };
156
157 ohci0: usb@480400 {
158 compatible = "brcm,bcm7362-ohci", "generic-ohci";
159 reg = <0x480400 0x100>;
160 native-endian;
161 no-big-frame-no;
162 interrupt-parent = <&periph_intc>;
163 interrupts = <66>;
164 status = "disabled";
165 };
166 };
167};
diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
new file mode 100644
index 000000000000..5f55d0a50a28
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -0,0 +1,184 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm7420";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 mips-hpt-frequency = <93750000>;
11
12 cpu@0 {
13 compatible = "brcm,bmips5000";
14 device_type = "cpu";
15 reg = <0>;
16 };
17
18 cpu@1 {
19 compatible = "brcm,bmips5000";
20 device_type = "cpu";
21 reg = <1>;
22 };
23 };
24
25 aliases {
26 uart0 = &uart0;
27 };
28
29 cpu_intc: cpu_intc {
30 #address-cells = <0>;
31 compatible = "mti,cpu-interrupt-controller";
32
33 interrupt-controller;
34 #interrupt-cells = <1>;
35 };
36
37 clocks {
38 uart_clk: uart_clk {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <81000000>;
42 };
43 };
44
45 rdb {
46 #address-cells = <1>;
47 #size-cells = <1>;
48
49 compatible = "simple-bus";
50 ranges = <0 0x10000000 0x01000000>;
51
52 periph_intc: periph_intc@441400 {
53 compatible = "brcm,bcm7038-l1-intc";
54 reg = <0x441400 0x30>, <0x441600 0x30>;
55
56 interrupt-controller;
57 #interrupt-cells = <1>;
58
59 interrupt-parent = <&cpu_intc>;
60 interrupts = <2>, <3>;
61 };
62
63 sun_l2_intc: sun_l2_intc@401800 {
64 compatible = "brcm,l2-intc";
65 reg = <0x401800 0x30>;
66 interrupt-controller;
67 #interrupt-cells = <1>;
68 interrupt-parent = <&periph_intc>;
69 interrupts = <23>;
70 };
71
72 gisb-arb@400000 {
73 compatible = "brcm,bcm7400-gisb-arb";
74 reg = <0x400000 0xdc>;
75 native-endian;
76 interrupt-parent = <&sun_l2_intc>;
77 interrupts = <0>, <2>;
78 brcm,gisb-arb-master-mask = <0x3ff>;
79 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pci_0",
80 "pcie_0", "bsp_0", "rdc_0",
81 "rptd_0", "avd_0", "avd_1",
82 "jtag_0";
83 };
84
85 upg_irq0_intc: upg_irq0_intc@406780 {
86 compatible = "brcm,bcm7120-l2-intc";
87 reg = <0x406780 0x8>;
88
89 brcm,int-map-mask = <0x44>;
90 brcm,int-fwd-mask = <0x70000>;
91
92 interrupt-controller;
93 #interrupt-cells = <1>;
94
95 interrupt-parent = <&periph_intc>;
96 interrupts = <18>;
97 };
98
99 sun_top_ctrl: syscon@404000 {
100 compatible = "brcm,bcm7420-sun-top-ctrl", "syscon";
101 reg = <0x404000 0x60c>;
102 little-endian;
103 };
104
105 reboot {
106 compatible = "brcm,bcm7038-reboot";
107 syscon = <&sun_top_ctrl 0x8 0x14>;
108 };
109
110 uart0: serial@406b00 {
111 compatible = "ns16550a";
112 reg = <0x406b00 0x20>;
113 reg-io-width = <0x4>;
114 reg-shift = <0x2>;
115 interrupt-parent = <&periph_intc>;
116 interrupts = <21>;
117 clocks = <&uart_clk>;
118 status = "disabled";
119 };
120
121 enet0: ethernet@468000 {
122 phy-mode = "internal";
123 phy-handle = <&phy1>;
124 mac-address = [ 00 10 18 36 23 1a ];
125 compatible = "brcm,genet-v1";
126 #address-cells = <0x1>;
127 #size-cells = <0x1>;
128 reg = <0x468000 0x3c8c>;
129 interrupts = <69>, <79>;
130 interrupt-parent = <&periph_intc>;
131 status = "disabled";
132
133 mdio@e14 {
134 compatible = "brcm,genet-mdio-v1";
135 #address-cells = <0x1>;
136 #size-cells = <0x0>;
137 reg = <0xe14 0x8>;
138
139 phy1: ethernet-phy@1 {
140 max-speed = <100>;
141 reg = <0x1>;
142 compatible = "brcm,65nm-ephy",
143 "ethernet-phy-ieee802.3-c22";
144 };
145 };
146 };
147
148 ehci0: usb@488300 {
149 compatible = "brcm,bcm7420-ehci", "generic-ehci";
150 reg = <0x488300 0x100>;
151 interrupt-parent = <&periph_intc>;
152 interrupts = <60>;
153 status = "disabled";
154 };
155
156 ohci0: usb@488400 {
157 compatible = "brcm,bcm7420-ohci", "generic-ohci";
158 reg = <0x488400 0x100>;
159 native-endian;
160 no-big-frame-no;
161 interrupt-parent = <&periph_intc>;
162 interrupts = <61>;
163 status = "disabled";
164 };
165
166 ehci1: usb@488500 {
167 compatible = "brcm,bcm7420-ehci", "generic-ehci";
168 reg = <0x488500 0x100>;
169 interrupt-parent = <&periph_intc>;
170 interrupts = <55>;
171 status = "disabled";
172 };
173
174 ohci1: usb@488600 {
175 compatible = "brcm,bcm7420-ohci", "generic-ohci";
176 reg = <0x488600 0x100>;
177 native-endian;
178 no-big-frame-no;
179 interrupt-parent = <&periph_intc>;
180 interrupts = <62>;
181 status = "disabled";
182 };
183 };
184};
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
new file mode 100644
index 000000000000..5b660b617ead
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -0,0 +1,225 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm7425";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 mips-hpt-frequency = <163125000>;
11
12 cpu@0 {
13 compatible = "brcm,bmips5000";
14 device_type = "cpu";
15 reg = <0>;
16 };
17
18 cpu@1 {
19 compatible = "brcm,bmips5000";
20 device_type = "cpu";
21 reg = <1>;
22 };
23 };
24
25 aliases {
26 uart0 = &uart0;
27 };
28
29 cpu_intc: cpu_intc {
30 #address-cells = <0>;
31 compatible = "mti,cpu-interrupt-controller";
32
33 interrupt-controller;
34 #interrupt-cells = <1>;
35 };
36
37 clocks {
38 uart_clk: uart_clk {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <81000000>;
42 };
43 };
44
45 rdb {
46 #address-cells = <1>;
47 #size-cells = <1>;
48
49 compatible = "simple-bus";
50 ranges = <0 0x10000000 0x01000000>;
51
52 periph_intc: periph_intc@41a400 {
53 compatible = "brcm,bcm7038-l1-intc";
54 reg = <0x41a400 0x30>, <0x41a600 0x30>;
55
56 interrupt-controller;
57 #interrupt-cells = <1>;
58
59 interrupt-parent = <&cpu_intc>;
60 interrupts = <2>, <3>;
61 };
62
63 sun_l2_intc: sun_l2_intc@403000 {
64 compatible = "brcm,l2-intc";
65 reg = <0x403000 0x30>;
66 interrupt-controller;
67 #interrupt-cells = <1>;
68 interrupt-parent = <&periph_intc>;
69 interrupts = <47>;
70 };
71
72 gisb-arb@400000 {
73 compatible = "brcm,bcm7400-gisb-arb";
74 reg = <0x400000 0xdc>;
75 native-endian;
76 interrupt-parent = <&sun_l2_intc>;
77 interrupts = <0>, <2>;
78 brcm,gisb-arb-master-mask = <0x177b>;
79 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pcie_0",
80 "bsp_0", "rdc_0",
81 "raaga_0", "avd_1",
82 "jtag_0", "svd_0",
83 "vice_0";
84 };
85
86 upg_irq0_intc: upg_irq0_intc@406780 {
87 compatible = "brcm,bcm7120-l2-intc";
88 reg = <0x406780 0x8>;
89
90 brcm,int-map-mask = <0x44>;
91 brcm,int-fwd-mask = <0x70000>;
92
93 interrupt-controller;
94 #interrupt-cells = <1>;
95
96 interrupt-parent = <&periph_intc>;
97 interrupts = <55>;
98 };
99
100 sun_top_ctrl: syscon@404000 {
101 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
102 reg = <0x404000 0x51c>;
103 little-endian;
104 };
105
106 reboot {
107 compatible = "brcm,brcmstb-reboot";
108 syscon = <&sun_top_ctrl 0x304 0x308>;
109 };
110
111 uart0: serial@406b00 {
112 compatible = "ns16550a";
113 reg = <0x406b00 0x20>;
114 reg-io-width = <0x4>;
115 reg-shift = <0x2>;
116 interrupt-parent = <&periph_intc>;
117 interrupts = <61>;
118 clocks = <&uart_clk>;
119 status = "disabled";
120 };
121
122 enet0: ethernet@b80000 {
123 phy-mode = "internal";
124 phy-handle = <&phy1>;
125 mac-address = [ 00 10 18 36 23 1a ];
126 compatible = "brcm,genet-v3";
127 #address-cells = <0x1>;
128 #size-cells = <0x1>;
129 reg = <0xb80000 0x11c88>;
130 interrupts = <17>, <18>;
131 interrupt-parent = <&periph_intc>;
132 status = "disabled";
133
134 mdio@e14 {
135 compatible = "brcm,genet-mdio-v3";
136 #address-cells = <0x1>;
137 #size-cells = <0x0>;
138 reg = <0xe14 0x8>;
139
140 phy1: ethernet-phy@1 {
141 max-speed = <100>;
142 reg = <0x1>;
143 compatible = "brcm,40nm-ephy",
144 "ethernet-phy-ieee802.3-c22";
145 };
146 };
147 };
148
149 ehci0: usb@480300 {
150 compatible = "brcm,bcm7425-ehci", "generic-ehci";
151 reg = <0x480300 0x100>;
152 native-endian;
153 interrupt-parent = <&periph_intc>;
154 interrupts = <65>;
155 status = "disabled";
156 };
157
158 ohci0: usb@480400 {
159 compatible = "brcm,bcm7425-ohci", "generic-ohci";
160 reg = <0x480400 0x100>;
161 native-endian;
162 no-big-frame-no;
163 interrupt-parent = <&periph_intc>;
164 interrupts = <67>;
165 status = "disabled";
166 };
167
168 ehci1: usb@480500 {
169 compatible = "brcm,bcm7425-ehci", "generic-ehci";
170 reg = <0x480500 0x100>;
171 native-endian;
172 interrupt-parent = <&periph_intc>;
173 interrupts = <66>;
174 status = "disabled";
175 };
176
177 ohci1: usb@480600 {
178 compatible = "brcm,bcm7425-ohci", "generic-ohci";
179 reg = <0x480600 0x100>;
180 native-endian;
181 no-big-frame-no;
182 interrupt-parent = <&periph_intc>;
183 interrupts = <68>;
184 status = "disabled";
185 };
186
187 ehci2: usb@490300 {
188 compatible = "brcm,bcm7425-ehci", "generic-ehci";
189 reg = <0x490300 0x100>;
190 native-endian;
191 interrupt-parent = <&periph_intc>;
192 interrupts = <70>;
193 status = "disabled";
194 };
195
196 ohci2: usb@490400 {
197 compatible = "brcm,bcm7425-ohci", "generic-ohci";
198 reg = <0x490400 0x100>;
199 native-endian;
200 no-big-frame-no;
201 interrupt-parent = <&periph_intc>;
202 interrupts = <72>;
203 status = "disabled";
204 };
205
206 ehci3: usb@490500 {
207 compatible = "brcm,bcm7425-ehci", "generic-ehci";
208 reg = <0x490500 0x100>;
209 native-endian;
210 interrupt-parent = <&periph_intc>;
211 interrupts = <71>;
212 status = "disabled";
213 };
214
215 ohci3: usb@490600 {
216 compatible = "brcm,bcm7425-ohci", "generic-ohci";
217 reg = <0x490600 0x100>;
218 native-endian;
219 no-big-frame-no;
220 interrupt-parent = <&periph_intc>;
221 interrupts = <73>;
222 status = "disabled";
223 };
224 };
225};
diff --git a/arch/mips/boot/dts/bcm93384wvg.dts b/arch/mips/boot/dts/brcm/bcm93384wvg.dts
index 831741179212..d1e44a17d41a 100644
--- a/arch/mips/boot/dts/bcm93384wvg.dts
+++ b/arch/mips/boot/dts/brcm/bcm93384wvg.dts
@@ -1,6 +1,6 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "bcm3384.dtsi" 3/include/ "bcm3384_zephyr.dtsi"
4 4
5/ { 5/ {
6 compatible = "brcm,bcm93384wvg", "brcm,bcm3384"; 6 compatible = "brcm,bcm93384wvg", "brcm,bcm3384";
@@ -10,13 +10,6 @@
10 bootargs = "console=ttyS0,115200"; 10 bootargs = "console=ttyS0,115200";
11 stdout-path = &uart0; 11 stdout-path = &uart0;
12 }; 12 };
13
14 memory@0 {
15 device_type = "memory";
16 reg = <0x0 0x04000000>;
17 dma-xor-mask = <0x08000000>;
18 dma-xor-limit = <0x0fffffff>;
19 };
20}; 13};
21 14
22&uart0 { 15&uart0 {
diff --git a/arch/mips/boot/dts/brcm/bcm93384wvg_viper.dts b/arch/mips/boot/dts/brcm/bcm93384wvg_viper.dts
new file mode 100644
index 000000000000..1ecb2696aca8
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm93384wvg_viper.dts
@@ -0,0 +1,25 @@
1/dts-v1/;
2
3/include/ "bcm3384_viper.dtsi"
4
5/ {
6 compatible = "brcm,bcm93384wvg-viper", "brcm,bcm3384-viper";
7 model = "Broadcom BCM93384WVG-viper";
8
9 chosen {
10 bootargs = "console=ttyS0,115200";
11 stdout-path = &uart0;
12 };
13};
14
15&uart0 {
16 status = "okay";
17};
18
19&ehci0 {
20 status = "okay";
21};
22
23&ohci0 {
24 status = "okay";
25};
diff --git a/arch/mips/boot/dts/brcm/bcm96368mvwg.dts b/arch/mips/boot/dts/brcm/bcm96368mvwg.dts
new file mode 100644
index 000000000000..0e890c28fe5c
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm96368mvwg.dts
@@ -0,0 +1,31 @@
1/dts-v1/;
2
3/include/ "bcm6368.dtsi"
4
5/ {
6 compatible = "brcm,bcm96368mvwg", "brcm,bcm6368";
7 model = "Broadcom BCM96368MVWG";
8
9 memory@0 {
10 device_type = "memory";
11 reg = <0x00000000 0x04000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200";
16 stdout-path = &uart0;
17 };
18};
19
20&uart0 {
21 status = "okay";
22};
23
24/* FIXME: need to set up USB_CTRL registers first */
25&ehci0 {
26 status = "disabled";
27};
28
29&ohci0 {
30 status = "disabled";
31};
diff --git a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
new file mode 100644
index 000000000000..e046b1109eab
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
@@ -0,0 +1,31 @@
1/dts-v1/;
2
3/include/ "bcm7125.dtsi"
4
5/ {
6 compatible = "brcm,bcm97125cbmb", "brcm,bcm7125";
7 model = "Broadcom BCM97125CBMB";
8
9 memory@0 {
10 device_type = "memory";
11 reg = <0x00000000 0x10000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200";
16 stdout-path = &uart0;
17 };
18};
19
20&uart0 {
21 status = "okay";
22};
23
24/* FIXME: USB is wonky; disable it for now */
25&ehci0 {
26 status = "disabled";
27};
28
29&ohci0 {
30 status = "disabled";
31};
diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
new file mode 100644
index 000000000000..70f196d89d26
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
@@ -0,0 +1,58 @@
1/dts-v1/;
2
3/include/ "bcm7346.dtsi"
4
5/ {
6 compatible = "brcm,bcm97346dbsmb", "brcm,bcm7346";
7 model = "Broadcom BCM97346DBSMB";
8
9 memory@0 {
10 device_type = "memory";
11 reg = <0x00000000 0x10000000>, <0x20000000 0x30000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200";
16 stdout-path = &uart0;
17 };
18};
19
20&uart0 {
21 status = "okay";
22};
23
24&enet0 {
25 status = "okay";
26};
27
28&ehci0 {
29 status = "okay";
30};
31
32&ohci0 {
33 status = "okay";
34};
35
36&ehci1 {
37 status = "okay";
38};
39
40&ohci1 {
41 status = "okay";
42};
43
44&ehci2 {
45 status = "okay";
46};
47
48&ohci2 {
49 status = "okay";
50};
51
52&ehci3 {
53 status = "okay";
54};
55
56&ohci3 {
57 status = "okay";
58};
diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
new file mode 100644
index 000000000000..d18e6d947739
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
@@ -0,0 +1,34 @@
1/dts-v1/;
2
3/include/ "bcm7358.dtsi"
4
5/ {
6 compatible = "brcm,bcm97358svmb", "brcm,bcm7358";
7 model = "Broadcom BCM97358SVMB";
8
9 memory@0 {
10 device_type = "memory";
11 reg = <0x00000000 0x10000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200";
16 stdout-path = &uart0;
17 };
18};
19
20&uart0 {
21 status = "okay";
22};
23
24&enet0 {
25 status = "okay";
26};
27
28&ehci0 {
29 status = "okay";
30};
31
32&ohci0 {
33 status = "okay";
34};
diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
new file mode 100644
index 000000000000..4fe515500102
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
@@ -0,0 +1,34 @@
1/dts-v1/;
2
3/include/ "bcm7360.dtsi"
4
5/ {
6 compatible = "brcm,bcm97360svmb", "brcm,bcm7360";
7 model = "Broadcom BCM97360SVMB";
8
9 memory@0 {
10 device_type = "memory";
11 reg = <0x00000000 0x10000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200";
16 stdout-path = &uart0;
17 };
18};
19
20&uart0 {
21 status = "okay";
22};
23
24&enet0 {
25 status = "okay";
26};
27
28&ehci0 {
29 status = "okay";
30};
31
32&ohci0 {
33 status = "okay";
34};
diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
new file mode 100644
index 000000000000..b7b88e5dc9e7
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
@@ -0,0 +1,34 @@
1/dts-v1/;
2
3/include/ "bcm7362.dtsi"
4
5/ {
6 compatible = "brcm,bcm97362svmb", "brcm,bcm7362";
7 model = "Broadcom BCM97362SVMB";
8
9 memory@0 {
10 device_type = "memory";
11 reg = <0x00000000 0x10000000>, <0x20000000 0x30000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200";
16 stdout-path = &uart0;
17 };
18};
19
20&uart0 {
21 status = "okay";
22};
23
24&enet0 {
25 status = "okay";
26};
27
28&ehci0 {
29 status = "okay";
30};
31
32&ohci0 {
33 status = "okay";
34};
diff --git a/arch/mips/boot/dts/brcm/bcm97420c.dts b/arch/mips/boot/dts/brcm/bcm97420c.dts
new file mode 100644
index 000000000000..67fe1f3a3891
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm97420c.dts
@@ -0,0 +1,45 @@
1/dts-v1/;
2
3/include/ "bcm7420.dtsi"
4
5/ {
6 compatible = "brcm,bcm97420c", "brcm,bcm7420";
7 model = "Broadcom BCM97420C";
8
9 memory@0 {
10 device_type = "memory";
11 reg = <0x00000000 0x10000000>,
12 <0x20000000 0x30000000>,
13 <0x60000000 0x10000000>;
14 };
15
16 chosen {
17 bootargs = "console=ttyS0,115200";
18 stdout-path = &uart0;
19 };
20};
21
22&uart0 {
23 status = "okay";
24};
25
26/* FIXME: MAC driver comes up but cannot attach to PHY */
27&enet0 {
28 status = "disabled";
29};
30
31&ehci0 {
32 status = "okay";
33};
34
35&ohci0 {
36 status = "okay";
37};
38
39&ehci1 {
40 status = "okay";
41};
42
43&ohci1 {
44 status = "okay";
45};
diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
new file mode 100644
index 000000000000..689c68a4f9c8
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
@@ -0,0 +1,60 @@
1/dts-v1/;
2
3/include/ "bcm7425.dtsi"
4
5/ {
6 compatible = "brcm,bcm97425svmb", "brcm,bcm7425";
7 model = "Broadcom BCM97425SVMB";
8
9 memory@0 {
10 device_type = "memory";
11 reg = <0x00000000 0x10000000>,
12 <0x20000000 0x30000000>,
13 <0x90000000 0x40000000>;
14 };
15
16 chosen {
17 bootargs = "console=ttyS0,115200";
18 stdout-path = &uart0;
19 };
20};
21
22&uart0 {
23 status = "okay";
24};
25
26&enet0 {
27 status = "okay";
28};
29
30&ehci0 {
31 status = "okay";
32};
33
34&ohci0 {
35 status = "okay";
36};
37
38&ehci1 {
39 status = "okay";
40};
41
42&ohci1 {
43 status = "okay";
44};
45
46&ehci2 {
47 status = "okay";
48};
49
50&ohci2 {
51 status = "okay";
52};
53
54&ehci3 {
55 status = "okay";
56};
57
58&ohci3 {
59 status = "okay";
60};
diff --git a/arch/mips/boot/dts/brcm/bcm9ejtagprb.dts b/arch/mips/boot/dts/brcm/bcm9ejtagprb.dts
new file mode 100644
index 000000000000..1da4608680aa
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm9ejtagprb.dts
@@ -0,0 +1,22 @@
1/dts-v1/;
2
3/include/ "bcm6328.dtsi"
4
5/ {
6 compatible = "brcm,bcm9ejtagprb", "brcm,bcm6328";
7 model = "Broadcom BCM9EJTAGPRB";
8
9 memory@0 {
10 device_type = "memory";
11 reg = <0x00000000 0x08000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200";
16 stdout-path = &uart0;
17 };
18};
19
20&uart0 {
21 status = "okay";
22};
diff --git a/arch/mips/boot/dts/cavium-octeon/Makefile b/arch/mips/boot/dts/cavium-octeon/Makefile
new file mode 100644
index 000000000000..5b99c40a058f
--- /dev/null
+++ b/arch/mips/boot/dts/cavium-octeon/Makefile
@@ -0,0 +1,9 @@
1dtb-$(CONFIG_CAVIUM_OCTEON_SOC) += octeon_3xxx.dtb octeon_68xx.dtb
2
3obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
4
5# Force kbuild to make empty built-in.o if necessary
6obj- += dummy.o
7
8always := $(dtb-y)
9clean-files := *.dtb *.dtb.S
diff --git a/arch/mips/boot/dts/octeon_3xxx.dts b/arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dts
index fa33115bde33..9c48e0586ba7 100644
--- a/arch/mips/boot/dts/octeon_3xxx.dts
+++ b/arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dts
@@ -587,4 +587,16 @@
587 usbn = &usbn; 587 usbn = &usbn;
588 led0 = &led0; 588 led0 = &led0;
589 }; 589 };
590
591 dsr1000n-leds {
592 compatible = "gpio-leds";
593 usb1 {
594 label = "usb1";
595 gpios = <&gpio 9 1>; /* Active low */
596 };
597 usb2 {
598 label = "usb2";
599 gpios = <&gpio 10 1>; /* Active low */
600 };
601 };
590 }; 602 };
diff --git a/arch/mips/boot/dts/octeon_68xx.dts b/arch/mips/boot/dts/cavium-octeon/octeon_68xx.dts
index 79b46fcb0a11..79b46fcb0a11 100644
--- a/arch/mips/boot/dts/octeon_68xx.dts
+++ b/arch/mips/boot/dts/cavium-octeon/octeon_68xx.dts
diff --git a/arch/mips/boot/dts/lantiq/Makefile b/arch/mips/boot/dts/lantiq/Makefile
new file mode 100644
index 000000000000..0906c62141b9
--- /dev/null
+++ b/arch/mips/boot/dts/lantiq/Makefile
@@ -0,0 +1,9 @@
1dtb-$(CONFIG_DT_EASY50712) += easy50712.dtb
2
3obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
4
5# Force kbuild to make empty built-in.o if necessary
6obj- += dummy.o
7
8always := $(dtb-y)
9clean-files := *.dtb *.dtb.S
diff --git a/arch/mips/boot/dts/danube.dtsi b/arch/mips/boot/dts/lantiq/danube.dtsi
index d4c59e003708..d4c59e003708 100644
--- a/arch/mips/boot/dts/danube.dtsi
+++ b/arch/mips/boot/dts/lantiq/danube.dtsi
diff --git a/arch/mips/boot/dts/easy50712.dts b/arch/mips/boot/dts/lantiq/easy50712.dts
index 143b8a37b5e4..143b8a37b5e4 100644
--- a/arch/mips/boot/dts/easy50712.dts
+++ b/arch/mips/boot/dts/lantiq/easy50712.dts
diff --git a/arch/mips/boot/dts/mti/Makefile b/arch/mips/boot/dts/mti/Makefile
new file mode 100644
index 000000000000..ef1f3dbed033
--- /dev/null
+++ b/arch/mips/boot/dts/mti/Makefile
@@ -0,0 +1,9 @@
1dtb-$(CONFIG_MIPS_SEAD3) += sead3.dtb
2
3obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
4
5# Force kbuild to make empty built-in.o if necessary
6obj- += dummy.o
7
8always := $(dtb-y)
9clean-files := *.dtb *.dtb.S
diff --git a/arch/mips/boot/dts/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
index e4b317d414f1..e4b317d414f1 100644
--- a/arch/mips/boot/dts/sead3.dts
+++ b/arch/mips/boot/dts/mti/sead3.dts
diff --git a/arch/mips/boot/dts/netlogic/Makefile b/arch/mips/boot/dts/netlogic/Makefile
new file mode 100644
index 000000000000..9868057140b5
--- /dev/null
+++ b/arch/mips/boot/dts/netlogic/Makefile
@@ -0,0 +1,13 @@
1dtb-$(CONFIG_DT_XLP_EVP) += xlp_evp.dtb
2dtb-$(CONFIG_DT_XLP_SVP) += xlp_svp.dtb
3dtb-$(CONFIG_DT_XLP_FVP) += xlp_fvp.dtb
4dtb-$(CONFIG_DT_XLP_GVP) += xlp_gvp.dtb
5dtb-$(CONFIG_DT_XLP_RVP) += xlp_rvp.dtb
6
7obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
8
9# Force kbuild to make empty built-in.o if necessary
10obj- += dummy.o
11
12always := $(dtb-y)
13clean-files := *.dtb *.dtb.S
diff --git a/arch/mips/boot/dts/xlp_evp.dts b/arch/mips/boot/dts/netlogic/xlp_evp.dts
index 89ad04808c02..89ad04808c02 100644
--- a/arch/mips/boot/dts/xlp_evp.dts
+++ b/arch/mips/boot/dts/netlogic/xlp_evp.dts
diff --git a/arch/mips/boot/dts/xlp_fvp.dts b/arch/mips/boot/dts/netlogic/xlp_fvp.dts
index 63e62b7bd758..63e62b7bd758 100644
--- a/arch/mips/boot/dts/xlp_fvp.dts
+++ b/arch/mips/boot/dts/netlogic/xlp_fvp.dts
diff --git a/arch/mips/boot/dts/xlp_gvp.dts b/arch/mips/boot/dts/netlogic/xlp_gvp.dts
index bb4ecd1d47fc..bb4ecd1d47fc 100644
--- a/arch/mips/boot/dts/xlp_gvp.dts
+++ b/arch/mips/boot/dts/netlogic/xlp_gvp.dts
diff --git a/arch/mips/boot/dts/netlogic/xlp_rvp.dts b/arch/mips/boot/dts/netlogic/xlp_rvp.dts
new file mode 100644
index 000000000000..7188aed2ea2e
--- /dev/null
+++ b/arch/mips/boot/dts/netlogic/xlp_rvp.dts
@@ -0,0 +1,77 @@
1/*
2 * XLP5XX Device Tree Source for RVP boards
3 */
4
5/dts-v1/;
6/ {
7 model = "netlogic,XLP-RVP";
8 compatible = "netlogic,xlp";
9 #address-cells = <2>;
10 #size-cells = <2>;
11
12 soc {
13 #address-cells = <2>;
14 #size-cells = <1>;
15 compatible = "simple-bus";
16 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
17 1 0 0 0x16000000 0x02000000>; // GBU chipselects
18
19 serial0: serial@30000 {
20 device_type = "serial";
21 compatible = "ns16550";
22 reg = <0 0x112100 0xa00>;
23 reg-shift = <2>;
24 reg-io-width = <4>;
25 clock-frequency = <125000000>;
26 interrupt-parent = <&pic>;
27 interrupts = <17>;
28 };
29 pic: pic@110000 {
30 compatible = "netlogic,xlp-pic";
31 #address-cells = <0>;
32 #interrupt-cells = <1>;
33 reg = <0 0x110000 0x200>;
34 interrupt-controller;
35 };
36
37 nor_flash@1,0 {
38 compatible = "cfi-flash";
39 #address-cells = <1>;
40 #size-cells = <1>;
41 bank-width = <2>;
42 reg = <1 0 0x1000000>;
43
44 partition@0 {
45 label = "x-loader";
46 reg = <0x0 0x100000>; /* 1M */
47 read-only;
48 };
49
50 partition@100000 {
51 label = "u-boot";
52 reg = <0x100000 0x100000>; /* 1M */
53 };
54
55 partition@200000 {
56 label = "kernel";
57 reg = <0x200000 0x500000>; /* 5M */
58 };
59
60 partition@700000 {
61 label = "rootfs";
62 reg = <0x700000 0x800000>; /* 8M */
63 };
64
65 partition@f00000 {
66 label = "env";
67 reg = <0xf00000 0x100000>; /* 1M */
68 read-only;
69 };
70 };
71
72 };
73
74 chosen {
75 bootargs = "console=ttyS0,115200 rdinit=/sbin/init";
76 };
77};
diff --git a/arch/mips/boot/dts/xlp_svp.dts b/arch/mips/boot/dts/netlogic/xlp_svp.dts
index 1ebd00edaacc..1ebd00edaacc 100644
--- a/arch/mips/boot/dts/xlp_svp.dts
+++ b/arch/mips/boot/dts/netlogic/xlp_svp.dts
diff --git a/arch/mips/boot/dts/ralink/Makefile b/arch/mips/boot/dts/ralink/Makefile
new file mode 100644
index 000000000000..2a7225954bf6
--- /dev/null
+++ b/arch/mips/boot/dts/ralink/Makefile
@@ -0,0 +1,12 @@
1dtb-$(CONFIG_DTB_RT2880_EVAL) += rt2880_eval.dtb
2dtb-$(CONFIG_DTB_RT305X_EVAL) += rt3052_eval.dtb
3dtb-$(CONFIG_DTB_RT3883_EVAL) += rt3883_eval.dtb
4dtb-$(CONFIG_DTB_MT7620A_EVAL) += mt7620a_eval.dtb
5
6obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
7
8# Force kbuild to make empty built-in.o if necessary
9obj- += dummy.o
10
11always := $(dtb-y)
12clean-files := *.dtb *.dtb.S
diff --git a/arch/mips/boot/dts/mt7620a.dtsi b/arch/mips/boot/dts/ralink/mt7620a.dtsi
index 08bf24fefe9f..08bf24fefe9f 100644
--- a/arch/mips/boot/dts/mt7620a.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7620a.dtsi
diff --git a/arch/mips/boot/dts/mt7620a_eval.dts b/arch/mips/boot/dts/ralink/mt7620a_eval.dts
index 709f58132f5c..709f58132f5c 100644
--- a/arch/mips/boot/dts/mt7620a_eval.dts
+++ b/arch/mips/boot/dts/ralink/mt7620a_eval.dts
diff --git a/arch/mips/boot/dts/rt2880.dtsi b/arch/mips/boot/dts/ralink/rt2880.dtsi
index 182afde2f2e1..182afde2f2e1 100644
--- a/arch/mips/boot/dts/rt2880.dtsi
+++ b/arch/mips/boot/dts/ralink/rt2880.dtsi
diff --git a/arch/mips/boot/dts/rt2880_eval.dts b/arch/mips/boot/dts/ralink/rt2880_eval.dts
index 0a685db093d4..0a685db093d4 100644
--- a/arch/mips/boot/dts/rt2880_eval.dts
+++ b/arch/mips/boot/dts/ralink/rt2880_eval.dts
diff --git a/arch/mips/boot/dts/rt3050.dtsi b/arch/mips/boot/dts/ralink/rt3050.dtsi
index e3203d414fee..e3203d414fee 100644
--- a/arch/mips/boot/dts/rt3050.dtsi
+++ b/arch/mips/boot/dts/ralink/rt3050.dtsi
diff --git a/arch/mips/boot/dts/rt3052_eval.dts b/arch/mips/boot/dts/ralink/rt3052_eval.dts
index ec9e9a035541..ec9e9a035541 100644
--- a/arch/mips/boot/dts/rt3052_eval.dts
+++ b/arch/mips/boot/dts/ralink/rt3052_eval.dts
diff --git a/arch/mips/boot/dts/rt3883.dtsi b/arch/mips/boot/dts/ralink/rt3883.dtsi
index 3b131dd0d5ac..3b131dd0d5ac 100644
--- a/arch/mips/boot/dts/rt3883.dtsi
+++ b/arch/mips/boot/dts/ralink/rt3883.dtsi
diff --git a/arch/mips/boot/dts/rt3883_eval.dts b/arch/mips/boot/dts/ralink/rt3883_eval.dts
index e8df21a5d10d..e8df21a5d10d 100644
--- a/arch/mips/boot/dts/rt3883_eval.dts
+++ b/arch/mips/boot/dts/ralink/rt3883_eval.dts
diff --git a/arch/mips/cavium-octeon/crypto/octeon-crypto.h b/arch/mips/cavium-octeon/crypto/octeon-crypto.h
index 355072535110..7315cc307397 100644
--- a/arch/mips/cavium-octeon/crypto/octeon-crypto.h
+++ b/arch/mips/cavium-octeon/crypto/octeon-crypto.h
@@ -33,7 +33,7 @@ do { \
33 __asm__ __volatile__ ( \ 33 __asm__ __volatile__ ( \
34 "dmtc2 %[rt],0x0048+" STR(index) \ 34 "dmtc2 %[rt],0x0048+" STR(index) \
35 : \ 35 : \
36 : [rt] "d" (value)); \ 36 : [rt] "d" (cpu_to_be64(value))); \
37} while (0) 37} while (0)
38 38
39/* 39/*
@@ -48,7 +48,7 @@ do { \
48 : [rt] "=d" (__value) \ 48 : [rt] "=d" (__value) \
49 : ); \ 49 : ); \
50 \ 50 \
51 __value; \ 51 be64_to_cpu(__value); \
52}) 52})
53 53
54/* 54/*
@@ -59,7 +59,7 @@ do { \
59 __asm__ __volatile__ ( \ 59 __asm__ __volatile__ ( \
60 "dmtc2 %[rt],0x0040+" STR(index) \ 60 "dmtc2 %[rt],0x0040+" STR(index) \
61 : \ 61 : \
62 : [rt] "d" (value)); \ 62 : [rt] "d" (cpu_to_be64(value))); \
63} while (0) 63} while (0)
64 64
65/* 65/*
@@ -70,6 +70,80 @@ do { \
70 __asm__ __volatile__ ( \ 70 __asm__ __volatile__ ( \
71 "dmtc2 %[rt],0x4047" \ 71 "dmtc2 %[rt],0x4047" \
72 : \ 72 : \
73 : [rt] "d" (cpu_to_be64(value))); \
74} while (0)
75
76/*
77 * The value is the final block dword (64-bit).
78 */
79#define octeon_sha1_start(value) \
80do { \
81 __asm__ __volatile__ ( \
82 "dmtc2 %[rt],0x4057" \
83 : \
84 : [rt] "d" (value)); \
85} while (0)
86
87/*
88 * The value is the final block dword (64-bit).
89 */
90#define octeon_sha256_start(value) \
91do { \
92 __asm__ __volatile__ ( \
93 "dmtc2 %[rt],0x404f" \
94 : \
95 : [rt] "d" (value)); \
96} while (0)
97
98/*
99 * Macros needed to implement SHA512:
100 */
101
102/*
103 * The index can be 0-7.
104 */
105#define write_octeon_64bit_hash_sha512(value, index) \
106do { \
107 __asm__ __volatile__ ( \
108 "dmtc2 %[rt],0x0250+" STR(index) \
109 : \
110 : [rt] "d" (value)); \
111} while (0)
112
113/*
114 * The index can be 0-7.
115 */
116#define read_octeon_64bit_hash_sha512(index) \
117({ \
118 u64 __value; \
119 \
120 __asm__ __volatile__ ( \
121 "dmfc2 %[rt],0x0250+" STR(index) \
122 : [rt] "=d" (__value) \
123 : ); \
124 \
125 __value; \
126})
127
128/*
129 * The index can be 0-14.
130 */
131#define write_octeon_64bit_block_sha512(value, index) \
132do { \
133 __asm__ __volatile__ ( \
134 "dmtc2 %[rt],0x0240+" STR(index) \
135 : \
136 : [rt] "d" (value)); \
137} while (0)
138
139/*
140 * The value is the final block word (64-bit).
141 */
142#define octeon_sha512_start(value) \
143do { \
144 __asm__ __volatile__ ( \
145 "dmtc2 %[rt],0x424f" \
146 : \
73 : [rt] "d" (value)); \ 147 : [rt] "d" (value)); \
74} while (0) 148} while (0)
75 149
diff --git a/arch/mips/cavium-octeon/dma-octeon.c b/arch/mips/cavium-octeon/dma-octeon.c
index 7d8987818ccf..d8960d46417b 100644
--- a/arch/mips/cavium-octeon/dma-octeon.c
+++ b/arch/mips/cavium-octeon/dma-octeon.c
@@ -306,7 +306,7 @@ void __init plat_swiotlb_setup(void)
306 swiotlbsize = 64 * (1<<20); 306 swiotlbsize = 64 * (1<<20);
307 } 307 }
308#endif 308#endif
309#ifdef CONFIG_USB_OCTEON_OHCI 309#ifdef CONFIG_USB_OHCI_HCD_PLATFORM
310 /* OCTEON II ohci is only 32-bit. */ 310 /* OCTEON II ohci is only 32-bit. */
311 if (OCTEON_IS_OCTEON2() && max_addr >= 0x100000000ul) 311 if (OCTEON_IS_OCTEON2() && max_addr >= 0x100000000ul)
312 swiotlbsize = 64 * (1<<20); 312 swiotlbsize = 64 * (1<<20);
diff --git a/arch/mips/cavium-octeon/executive/cvmx-l2c.c b/arch/mips/cavium-octeon/executive/cvmx-l2c.c
index 42e38c30b540..89b5273299ab 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-l2c.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-l2c.c
@@ -519,44 +519,89 @@ int cvmx_l2c_unlock_mem_region(uint64_t start, uint64_t len)
519union __cvmx_l2c_tag { 519union __cvmx_l2c_tag {
520 uint64_t u64; 520 uint64_t u64;
521 struct cvmx_l2c_tag_cn50xx { 521 struct cvmx_l2c_tag_cn50xx {
522#ifdef __BIG_ENDIAN_BITFIELD
522 uint64_t reserved:40; 523 uint64_t reserved:40;
523 uint64_t V:1; /* Line valid */ 524 uint64_t V:1; /* Line valid */
524 uint64_t D:1; /* Line dirty */ 525 uint64_t D:1; /* Line dirty */
525 uint64_t L:1; /* Line locked */ 526 uint64_t L:1; /* Line locked */
526 uint64_t U:1; /* Use, LRU eviction */ 527 uint64_t U:1; /* Use, LRU eviction */
527 uint64_t addr:20; /* Phys mem addr (33..14) */ 528 uint64_t addr:20; /* Phys mem addr (33..14) */
529#else
530 uint64_t addr:20; /* Phys mem addr (33..14) */
531 uint64_t U:1; /* Use, LRU eviction */
532 uint64_t L:1; /* Line locked */
533 uint64_t D:1; /* Line dirty */
534 uint64_t V:1; /* Line valid */
535 uint64_t reserved:40;
536#endif
528 } cn50xx; 537 } cn50xx;
529 struct cvmx_l2c_tag_cn30xx { 538 struct cvmx_l2c_tag_cn30xx {
539#ifdef __BIG_ENDIAN_BITFIELD
530 uint64_t reserved:41; 540 uint64_t reserved:41;
531 uint64_t V:1; /* Line valid */ 541 uint64_t V:1; /* Line valid */
532 uint64_t D:1; /* Line dirty */ 542 uint64_t D:1; /* Line dirty */
533 uint64_t L:1; /* Line locked */ 543 uint64_t L:1; /* Line locked */
534 uint64_t U:1; /* Use, LRU eviction */ 544 uint64_t U:1; /* Use, LRU eviction */
535 uint64_t addr:19; /* Phys mem addr (33..15) */ 545 uint64_t addr:19; /* Phys mem addr (33..15) */
546#else
547 uint64_t addr:19; /* Phys mem addr (33..15) */
548 uint64_t U:1; /* Use, LRU eviction */
549 uint64_t L:1; /* Line locked */
550 uint64_t D:1; /* Line dirty */
551 uint64_t V:1; /* Line valid */
552 uint64_t reserved:41;
553#endif
536 } cn30xx; 554 } cn30xx;
537 struct cvmx_l2c_tag_cn31xx { 555 struct cvmx_l2c_tag_cn31xx {
556#ifdef __BIG_ENDIAN_BITFIELD
538 uint64_t reserved:42; 557 uint64_t reserved:42;
539 uint64_t V:1; /* Line valid */ 558 uint64_t V:1; /* Line valid */
540 uint64_t D:1; /* Line dirty */ 559 uint64_t D:1; /* Line dirty */
541 uint64_t L:1; /* Line locked */ 560 uint64_t L:1; /* Line locked */
542 uint64_t U:1; /* Use, LRU eviction */ 561 uint64_t U:1; /* Use, LRU eviction */
543 uint64_t addr:18; /* Phys mem addr (33..16) */ 562 uint64_t addr:18; /* Phys mem addr (33..16) */
563#else
564 uint64_t addr:18; /* Phys mem addr (33..16) */
565 uint64_t U:1; /* Use, LRU eviction */
566 uint64_t L:1; /* Line locked */
567 uint64_t D:1; /* Line dirty */
568 uint64_t V:1; /* Line valid */
569 uint64_t reserved:42;
570#endif
544 } cn31xx; 571 } cn31xx;
545 struct cvmx_l2c_tag_cn38xx { 572 struct cvmx_l2c_tag_cn38xx {
573#ifdef __BIG_ENDIAN_BITFIELD
546 uint64_t reserved:43; 574 uint64_t reserved:43;
547 uint64_t V:1; /* Line valid */ 575 uint64_t V:1; /* Line valid */
548 uint64_t D:1; /* Line dirty */ 576 uint64_t D:1; /* Line dirty */
549 uint64_t L:1; /* Line locked */ 577 uint64_t L:1; /* Line locked */
550 uint64_t U:1; /* Use, LRU eviction */ 578 uint64_t U:1; /* Use, LRU eviction */
551 uint64_t addr:17; /* Phys mem addr (33..17) */ 579 uint64_t addr:17; /* Phys mem addr (33..17) */
580#else
581 uint64_t addr:17; /* Phys mem addr (33..17) */
582 uint64_t U:1; /* Use, LRU eviction */
583 uint64_t L:1; /* Line locked */
584 uint64_t D:1; /* Line dirty */
585 uint64_t V:1; /* Line valid */
586 uint64_t reserved:43;
587#endif
552 } cn38xx; 588 } cn38xx;
553 struct cvmx_l2c_tag_cn58xx { 589 struct cvmx_l2c_tag_cn58xx {
590#ifdef __BIG_ENDIAN_BITFIELD
554 uint64_t reserved:44; 591 uint64_t reserved:44;
555 uint64_t V:1; /* Line valid */ 592 uint64_t V:1; /* Line valid */
556 uint64_t D:1; /* Line dirty */ 593 uint64_t D:1; /* Line dirty */
557 uint64_t L:1; /* Line locked */ 594 uint64_t L:1; /* Line locked */
558 uint64_t U:1; /* Use, LRU eviction */ 595 uint64_t U:1; /* Use, LRU eviction */
559 uint64_t addr:16; /* Phys mem addr (33..18) */ 596 uint64_t addr:16; /* Phys mem addr (33..18) */
597#else
598 uint64_t addr:16; /* Phys mem addr (33..18) */
599 uint64_t U:1; /* Use, LRU eviction */
600 uint64_t L:1; /* Line locked */
601 uint64_t D:1; /* Line dirty */
602 uint64_t V:1; /* Line valid */
603 uint64_t reserved:44;
604#endif
560 } cn58xx; 605 } cn58xx;
561 struct cvmx_l2c_tag_cn58xx cn56xx; /* 2048 sets */ 606 struct cvmx_l2c_tag_cn58xx cn56xx; /* 2048 sets */
562 struct cvmx_l2c_tag_cn31xx cn52xx; /* 512 sets */ 607 struct cvmx_l2c_tag_cn31xx cn52xx; /* 512 sets */
diff --git a/arch/mips/cavium-octeon/flash_setup.c b/arch/mips/cavium-octeon/flash_setup.c
index 237e5b1a72d8..a5e8f4a784af 100644
--- a/arch/mips/cavium-octeon/flash_setup.c
+++ b/arch/mips/cavium-octeon/flash_setup.c
@@ -8,9 +8,11 @@
8 * Copyright (C) 2007, 2008 Cavium Networks 8 * Copyright (C) 2007, 2008 Cavium Networks
9 */ 9 */
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/export.h> 11#include <linux/module.h>
12#include <linux/semaphore.h>
12#include <linux/mtd/mtd.h> 13#include <linux/mtd/mtd.h>
13#include <linux/mtd/map.h> 14#include <linux/mtd/map.h>
15#include <linux/of_platform.h>
14#include <linux/mtd/partitions.h> 16#include <linux/mtd/partitions.h>
15 17
16#include <asm/octeon/octeon.h> 18#include <asm/octeon/octeon.h>
@@ -25,19 +27,62 @@ static const char *part_probe_types[] = {
25 NULL 27 NULL
26}; 28};
27 29
30static map_word octeon_flash_map_read(struct map_info *map, unsigned long ofs)
31{
32 map_word r;
33
34 down(&octeon_bootbus_sem);
35 r = inline_map_read(map, ofs);
36 up(&octeon_bootbus_sem);
37
38 return r;
39}
40
41static void octeon_flash_map_write(struct map_info *map, const map_word datum,
42 unsigned long ofs)
43{
44 down(&octeon_bootbus_sem);
45 inline_map_write(map, datum, ofs);
46 up(&octeon_bootbus_sem);
47}
48
49static void octeon_flash_map_copy_from(struct map_info *map, void *to,
50 unsigned long from, ssize_t len)
51{
52 down(&octeon_bootbus_sem);
53 inline_map_copy_from(map, to, from, len);
54 up(&octeon_bootbus_sem);
55}
56
57static void octeon_flash_map_copy_to(struct map_info *map, unsigned long to,
58 const void *from, ssize_t len)
59{
60 down(&octeon_bootbus_sem);
61 inline_map_copy_to(map, to, from, len);
62 up(&octeon_bootbus_sem);
63}
64
28/** 65/**
29 * Module/ driver initialization. 66 * Module/ driver initialization.
30 * 67 *
31 * Returns Zero on success 68 * Returns Zero on success
32 */ 69 */
33static int __init flash_init(void) 70static int octeon_flash_probe(struct platform_device *pdev)
34{ 71{
72 union cvmx_mio_boot_reg_cfgx region_cfg;
73 u32 cs;
74 int r;
75 struct device_node *np = pdev->dev.of_node;
76
77 r = of_property_read_u32(np, "reg", &cs);
78 if (r)
79 return r;
80
35 /* 81 /*
36 * Read the bootbus region 0 setup to determine the base 82 * Read the bootbus region 0 setup to determine the base
37 * address of the flash. 83 * address of the flash.
38 */ 84 */
39 union cvmx_mio_boot_reg_cfgx region_cfg; 85 region_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(cs));
40 region_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(0));
41 if (region_cfg.s.en) { 86 if (region_cfg.s.en) {
42 /* 87 /*
43 * The bootloader always takes the flash and sets its 88 * The bootloader always takes the flash and sets its
@@ -56,7 +101,11 @@ static int __init flash_init(void)
56 flash_map.virt = ioremap(flash_map.phys, flash_map.size); 101 flash_map.virt = ioremap(flash_map.phys, flash_map.size);
57 pr_notice("Bootbus flash: Setting flash for %luMB flash at " 102 pr_notice("Bootbus flash: Setting flash for %luMB flash at "
58 "0x%08llx\n", flash_map.size >> 20, flash_map.phys); 103 "0x%08llx\n", flash_map.size >> 20, flash_map.phys);
59 simple_map_init(&flash_map); 104 WARN_ON(!map_bankwidth_supported(flash_map.bankwidth));
105 flash_map.read = octeon_flash_map_read;
106 flash_map.write = octeon_flash_map_write;
107 flash_map.copy_from = octeon_flash_map_copy_from;
108 flash_map.copy_to = octeon_flash_map_copy_to;
60 mymtd = do_map_probe("cfi_probe", &flash_map); 109 mymtd = do_map_probe("cfi_probe", &flash_map);
61 if (mymtd) { 110 if (mymtd) {
62 mymtd->owner = THIS_MODULE; 111 mymtd->owner = THIS_MODULE;
@@ -69,4 +118,26 @@ static int __init flash_init(void)
69 return 0; 118 return 0;
70} 119}
71 120
72late_initcall(flash_init); 121static const struct of_device_id of_flash_match[] = {
122 {
123 .compatible = "cfi-flash",
124 },
125 { },
126};
127MODULE_DEVICE_TABLE(of, of_flash_match);
128
129static struct platform_driver of_flash_driver = {
130 .driver = {
131 .name = "octeon-of-flash",
132 .of_match_table = of_flash_match,
133 },
134 .probe = octeon_flash_probe,
135};
136
137static int octeon_flash_init(void)
138{
139 return platform_driver_register(&of_flash_driver);
140}
141late_initcall(octeon_flash_init);
142
143MODULE_LICENSE("GPL");
diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c
index 12410a2788d8..d113c8ded6e2 100644
--- a/arch/mips/cavium-octeon/octeon-platform.c
+++ b/arch/mips/cavium-octeon/octeon-platform.c
@@ -325,8 +325,14 @@ static void __init octeon_ehci_hw_start(struct device *dev)
325 /* Use 64-bit addressing. */ 325 /* Use 64-bit addressing. */
326 ehci_ctl.s.ehci_64b_addr_en = 1; 326 ehci_ctl.s.ehci_64b_addr_en = 1;
327 ehci_ctl.s.l2c_addr_msb = 0; 327 ehci_ctl.s.l2c_addr_msb = 0;
328#ifdef __BIG_ENDIAN
328 ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */ 329 ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
329 ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */ 330 ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
331#else
332 ehci_ctl.s.l2c_buff_emod = 0; /* not swapped. */
333 ehci_ctl.s.l2c_desc_emod = 0; /* not swapped. */
334 ehci_ctl.s.inv_reg_a2 = 1;
335#endif
330 cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64); 336 cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64);
331 337
332 octeon2_usb_clocks_stop(); 338 octeon2_usb_clocks_stop();
@@ -381,8 +387,14 @@ static void __init octeon_ohci_hw_start(struct device *dev)
381 387
382 ohci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_OHCI_CTL(0)); 388 ohci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_OHCI_CTL(0));
383 ohci_ctl.s.l2c_addr_msb = 0; 389 ohci_ctl.s.l2c_addr_msb = 0;
390#ifdef __BIG_ENDIAN
384 ohci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */ 391 ohci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
385 ohci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */ 392 ohci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
393#else
394 ohci_ctl.s.l2c_buff_emod = 0; /* not swapped. */
395 ohci_ctl.s.l2c_desc_emod = 0; /* not swapped. */
396 ohci_ctl.s.inv_reg_a2 = 1;
397#endif
386 cvmx_write_csr(CVMX_UCTLX_OHCI_CTL(0), ohci_ctl.u64); 398 cvmx_write_csr(CVMX_UCTLX_OHCI_CTL(0), ohci_ctl.u64);
387 399
388 octeon2_usb_clocks_stop(); 400 octeon2_usb_clocks_stop();
@@ -958,6 +970,13 @@ end_led:
958 } 970 }
959 } 971 }
960 972
973 if (octeon_bootinfo->board_type != CVMX_BOARD_TYPE_CUST_DSR1000N) {
974 int dsr1000n_leds = fdt_path_offset(initial_boot_params,
975 "/dsr1000n-leds");
976 if (dsr1000n_leds >= 0)
977 fdt_nop_node(initial_boot_params, dsr1000n_leds);
978 }
979
961 return 0; 980 return 0;
962} 981}
963 982
diff --git a/arch/mips/cavium-octeon/octeon_boot.h b/arch/mips/cavium-octeon/octeon_boot.h
index 7b066bbca86d..a6ce7c43e0ae 100644
--- a/arch/mips/cavium-octeon/octeon_boot.h
+++ b/arch/mips/cavium-octeon/octeon_boot.h
@@ -37,11 +37,13 @@ struct boot_init_vector {
37 37
38/* similar to bootloader's linux_app_boot_info but without global data */ 38/* similar to bootloader's linux_app_boot_info but without global data */
39struct linux_app_boot_info { 39struct linux_app_boot_info {
40#ifdef __BIG_ENDIAN_BITFIELD
40 uint32_t labi_signature; 41 uint32_t labi_signature;
41 uint32_t start_core0_addr; 42 uint32_t start_core0_addr;
42 uint32_t avail_coremask; 43 uint32_t avail_coremask;
43 uint32_t pci_console_active; 44 uint32_t pci_console_active;
44 uint32_t icache_prefetch_disable; 45 uint32_t icache_prefetch_disable;
46 uint32_t padding;
45 uint64_t InitTLBStart_addr; 47 uint64_t InitTLBStart_addr;
46 uint32_t start_app_addr; 48 uint32_t start_app_addr;
47 uint32_t cur_exception_base; 49 uint32_t cur_exception_base;
@@ -49,6 +51,27 @@ struct linux_app_boot_info {
49 uint32_t compact_flash_common_base_addr; 51 uint32_t compact_flash_common_base_addr;
50 uint32_t compact_flash_attribute_base_addr; 52 uint32_t compact_flash_attribute_base_addr;
51 uint32_t led_display_base_addr; 53 uint32_t led_display_base_addr;
54#else
55 uint32_t start_core0_addr;
56 uint32_t labi_signature;
57
58 uint32_t pci_console_active;
59 uint32_t avail_coremask;
60
61 uint32_t padding;
62 uint32_t icache_prefetch_disable;
63
64 uint64_t InitTLBStart_addr;
65
66 uint32_t cur_exception_base;
67 uint32_t start_app_addr;
68
69 uint32_t compact_flash_common_base_addr;
70 uint32_t no_mark_private_data;
71
72 uint32_t led_display_base_addr;
73 uint32_t compact_flash_attribute_base_addr;
74#endif
52}; 75};
53 76
54/* If not to copy a lot of bootloader's structures 77/* If not to copy a lot of bootloader's structures
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index a42110e7edbc..89a628455bc2 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -51,6 +51,9 @@ extern void pci_console_init(const char *arg);
51 51
52static unsigned long long MAX_MEMORY = 512ull << 20; 52static unsigned long long MAX_MEMORY = 512ull << 20;
53 53
54DEFINE_SEMAPHORE(octeon_bootbus_sem);
55EXPORT_SYMBOL(octeon_bootbus_sem);
56
54struct octeon_boot_descriptor *octeon_boot_desc_ptr; 57struct octeon_boot_descriptor *octeon_boot_desc_ptr;
55 58
56struct cvmx_bootinfo *octeon_bootinfo; 59struct cvmx_bootinfo *octeon_bootinfo;
@@ -413,7 +416,10 @@ static void octeon_restart(char *command)
413 416
414 mb(); 417 mb();
415 while (1) 418 while (1)
416 cvmx_write_csr(CVMX_CIU_SOFT_RST, 1); 419 if (OCTEON_IS_OCTEON3())
420 cvmx_write_csr(CVMX_RST_SOFT_RST, 1);
421 else
422 cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
417} 423}
418 424
419 425
@@ -1043,7 +1049,7 @@ int prom_putchar(char c)
1043} 1049}
1044EXPORT_SYMBOL(prom_putchar); 1050EXPORT_SYMBOL(prom_putchar);
1045 1051
1046void prom_free_prom_memory(void) 1052void __init prom_free_prom_memory(void)
1047{ 1053{
1048 if (CAVIUM_OCTEON_DCACHE_PREFETCH_WAR) { 1054 if (CAVIUM_OCTEON_DCACHE_PREFETCH_WAR) {
1049 /* Check for presence of Core-14449 fix. */ 1055 /* Check for presence of Core-14449 fix. */
diff --git a/arch/mips/configs/bcm3384_defconfig b/arch/mips/configs/bmips_be_defconfig
index 88711c28ff32..f5585c8f35ad 100644
--- a/arch/mips/configs/bcm3384_defconfig
+++ b/arch/mips/configs/bmips_be_defconfig
@@ -1,4 +1,4 @@
1CONFIG_BCM3384=y 1CONFIG_BMIPS_GENERIC=y
2CONFIG_HIGHMEM=y 2CONFIG_HIGHMEM=y
3CONFIG_SMP=y 3CONFIG_SMP=y
4CONFIG_NR_CPUS=4 4CONFIG_NR_CPUS=4
@@ -33,6 +33,7 @@ CONFIG_DEVTMPFS=y
33CONFIG_DEVTMPFS_MOUNT=y 33CONFIG_DEVTMPFS_MOUNT=y
34# CONFIG_STANDALONE is not set 34# CONFIG_STANDALONE is not set
35# CONFIG_PREVENT_FIRMWARE_BUILD is not set 35# CONFIG_PREVENT_FIRMWARE_BUILD is not set
36CONFIG_BRCMSTB_GISB_ARB=y
36CONFIG_MTD=y 37CONFIG_MTD=y
37CONFIG_MTD_CFI=y 38CONFIG_MTD_CFI=y
38CONFIG_MTD_CFI_INTELEXT=y 39CONFIG_MTD_CFI_INTELEXT=y
@@ -43,15 +44,19 @@ CONFIG_SCSI=y
43CONFIG_BLK_DEV_SD=y 44CONFIG_BLK_DEV_SD=y
44# CONFIG_SCSI_LOWLEVEL is not set 45# CONFIG_SCSI_LOWLEVEL is not set
45CONFIG_NETDEVICES=y 46CONFIG_NETDEVICES=y
47CONFIG_BCMGENET=y
46CONFIG_USB_USBNET=y 48CONFIG_USB_USBNET=y
47# CONFIG_INPUT is not set 49# CONFIG_INPUT is not set
48# CONFIG_SERIO is not set 50# CONFIG_SERIO is not set
49# CONFIG_VT is not set 51# CONFIG_VT is not set
50# CONFIG_DEVKMEM is not set 52# CONFIG_DEVKMEM is not set
51CONFIG_SERIAL_EARLYCON_FORCE=y
52CONFIG_SERIAL_BCM63XX=y 53CONFIG_SERIAL_BCM63XX=y
53CONFIG_SERIAL_BCM63XX_CONSOLE=y 54CONFIG_SERIAL_BCM63XX_CONSOLE=y
54# CONFIG_HW_RANDOM is not set 55# CONFIG_HW_RANDOM is not set
56CONFIG_POWER_SUPPLY=y
57CONFIG_POWER_RESET=y
58CONFIG_POWER_RESET_BRCMSTB=y
59CONFIG_POWER_RESET_SYSCON=y
55# CONFIG_HWMON is not set 60# CONFIG_HWMON is not set
56CONFIG_USB=y 61CONFIG_USB=y
57CONFIG_USB_EHCI_HCD=y 62CONFIG_USB_EHCI_HCD=y
@@ -75,4 +80,6 @@ CONFIG_NLS_ASCII=y
75CONFIG_NLS_ISO8859_1=y 80CONFIG_NLS_ISO8859_1=y
76CONFIG_DEBUG_FS=y 81CONFIG_DEBUG_FS=y
77CONFIG_MAGIC_SYSRQ=y 82CONFIG_MAGIC_SYSRQ=y
83CONFIG_CMDLINE_BOOL=y
84CONFIG_CMDLINE="earlycon"
78# CONFIG_CRYPTO_HW is not set 85# CONFIG_CRYPTO_HW is not set
diff --git a/arch/mips/configs/bmips_stb_defconfig b/arch/mips/configs/bmips_stb_defconfig
new file mode 100644
index 000000000000..400a47ec1ef1
--- /dev/null
+++ b/arch/mips/configs/bmips_stb_defconfig
@@ -0,0 +1,88 @@
1CONFIG_BMIPS_GENERIC=y
2CONFIG_CPU_LITTLE_ENDIAN=y
3CONFIG_HIGHMEM=y
4CONFIG_SMP=y
5CONFIG_NR_CPUS=4
6# CONFIG_SECCOMP is not set
7CONFIG_MIPS_O32_FP64_SUPPORT=y
8# CONFIG_LOCALVERSION_AUTO is not set
9# CONFIG_SWAP is not set
10CONFIG_NO_HZ=y
11CONFIG_BLK_DEV_INITRD=y
12# CONFIG_RD_GZIP is not set
13CONFIG_EXPERT=y
14# CONFIG_VM_EVENT_COUNTERS is not set
15# CONFIG_SLUB_DEBUG is not set
16# CONFIG_BLK_DEV_BSG is not set
17# CONFIG_IOSCHED_DEADLINE is not set
18# CONFIG_IOSCHED_CFQ is not set
19CONFIG_NET=y
20CONFIG_PACKET=y
21CONFIG_PACKET_DIAG=y
22CONFIG_UNIX=y
23CONFIG_INET=y
24# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
25# CONFIG_INET_XFRM_MODE_TUNNEL is not set
26# CONFIG_INET_XFRM_MODE_BEET is not set
27# CONFIG_INET_LRO is not set
28# CONFIG_INET_DIAG is not set
29CONFIG_CFG80211=y
30CONFIG_NL80211_TESTMODE=y
31CONFIG_MAC80211=y
32CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
33CONFIG_DEVTMPFS=y
34CONFIG_DEVTMPFS_MOUNT=y
35# CONFIG_STANDALONE is not set
36# CONFIG_PREVENT_FIRMWARE_BUILD is not set
37CONFIG_BRCMSTB_GISB_ARB=y
38CONFIG_MTD=y
39CONFIG_MTD_CFI=y
40CONFIG_MTD_CFI_INTELEXT=y
41CONFIG_MTD_CFI_AMDSTD=y
42CONFIG_MTD_PHYSMAP=y
43# CONFIG_BLK_DEV is not set
44CONFIG_SCSI=y
45CONFIG_BLK_DEV_SD=y
46# CONFIG_SCSI_LOWLEVEL is not set
47CONFIG_NETDEVICES=y
48CONFIG_BCMGENET=y
49CONFIG_USB_USBNET=y
50# CONFIG_INPUT is not set
51# CONFIG_SERIO is not set
52# CONFIG_VT is not set
53# CONFIG_DEVKMEM is not set
54CONFIG_SERIAL_8250=y
55# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
56CONFIG_SERIAL_8250_CONSOLE=y
57CONFIG_SERIAL_OF_PLATFORM=y
58# CONFIG_HW_RANDOM is not set
59CONFIG_POWER_SUPPLY=y
60CONFIG_POWER_RESET=y
61CONFIG_POWER_RESET_BRCMSTB=y
62CONFIG_POWER_RESET_SYSCON=y
63# CONFIG_HWMON is not set
64CONFIG_USB=y
65CONFIG_USB_EHCI_HCD=y
66# CONFIG_USB_EHCI_TT_NEWSCHED is not set
67CONFIG_USB_EHCI_HCD_PLATFORM=y
68CONFIG_USB_OHCI_HCD=y
69CONFIG_USB_OHCI_HCD_PLATFORM=y
70CONFIG_USB_STORAGE=y
71CONFIG_EXT4_FS=y
72CONFIG_EXT4_FS_POSIX_ACL=y
73CONFIG_EXT4_FS_SECURITY=y
74# CONFIG_DNOTIFY is not set
75CONFIG_FUSE_FS=y
76CONFIG_VFAT_FS=y
77CONFIG_PROC_KCORE=y
78CONFIG_TMPFS=y
79CONFIG_NFS_FS=y
80CONFIG_CIFS=y
81CONFIG_NLS_CODEPAGE_437=y
82CONFIG_NLS_ASCII=y
83CONFIG_NLS_ISO8859_1=y
84CONFIG_DEBUG_FS=y
85CONFIG_MAGIC_SYSRQ=y
86CONFIG_CMDLINE_BOOL=y
87CONFIG_CMDLINE="earlycon"
88# CONFIG_CRYPTO_HW is not set
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index 70ffe9b55829..fe48220157a9 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -105,7 +105,8 @@ CONFIG_RTC_CLASS=y
105# CONFIG_RTC_HCTOSYS is not set 105# CONFIG_RTC_HCTOSYS is not set
106# CONFIG_RTC_INTF_SYSFS is not set 106# CONFIG_RTC_INTF_SYSFS is not set
107# CONFIG_RTC_INTF_PROC is not set 107# CONFIG_RTC_INTF_PROC is not set
108CONFIG_RTC_DRV_CMOS=y 108CONFIG_RTC_DRV_DS1685_FAMILY=y
109CONFIG_RTC_DRV_DS1685=y
109CONFIG_EXT2_FS=y 110CONFIG_EXT2_FS=y
110CONFIG_EXT2_FS_XATTR=y 111CONFIG_EXT2_FS_XATTR=y
111CONFIG_EXT2_FS_POSIX_ACL=y 112CONFIG_EXT2_FS_POSIX_ACL=y
diff --git a/arch/mips/configs/maltaup_xpa_defconfig b/arch/mips/configs/maltaup_xpa_defconfig
new file mode 100644
index 000000000000..c388bff09148
--- /dev/null
+++ b/arch/mips/configs/maltaup_xpa_defconfig
@@ -0,0 +1,439 @@
1CONFIG_MIPS_MALTA=y
2CONFIG_CPU_LITTLE_ENDIAN=y
3CONFIG_CPU_MIPS32_R2=y
4CONFIG_CPU_MIPS32_R5_FEATURES=y
5CONFIG_CPU_MIPS32_R5_XPA=y
6CONFIG_PAGE_SIZE_16KB=y
7CONFIG_HZ_100=y
8CONFIG_SYSVIPC=y
9CONFIG_NO_HZ=y
10CONFIG_HIGH_RES_TIMERS=y
11CONFIG_IKCONFIG=y
12CONFIG_IKCONFIG_PROC=y
13CONFIG_LOG_BUF_SHIFT=15
14CONFIG_NAMESPACES=y
15CONFIG_RELAY=y
16CONFIG_EXPERT=y
17# CONFIG_COMPAT_BRK is not set
18CONFIG_SLAB=y
19CONFIG_MODULES=y
20CONFIG_MODULE_UNLOAD=y
21CONFIG_MODVERSIONS=y
22CONFIG_MODULE_SRCVERSION_ALL=y
23CONFIG_PCI=y
24CONFIG_NET=y
25CONFIG_PACKET=y
26CONFIG_UNIX=y
27CONFIG_XFRM_USER=m
28CONFIG_NET_KEY=y
29CONFIG_NET_KEY_MIGRATE=y
30CONFIG_INET=y
31CONFIG_IP_MULTICAST=y
32CONFIG_IP_ADVANCED_ROUTER=y
33CONFIG_IP_MULTIPLE_TABLES=y
34CONFIG_IP_ROUTE_MULTIPATH=y
35CONFIG_IP_ROUTE_VERBOSE=y
36CONFIG_IP_PNP=y
37CONFIG_IP_PNP_DHCP=y
38CONFIG_IP_PNP_BOOTP=y
39CONFIG_NET_IPIP=m
40CONFIG_IP_MROUTE=y
41CONFIG_IP_PIMSM_V1=y
42CONFIG_IP_PIMSM_V2=y
43CONFIG_SYN_COOKIES=y
44CONFIG_INET_AH=m
45CONFIG_INET_ESP=m
46CONFIG_INET_IPCOMP=m
47CONFIG_INET_XFRM_MODE_TRANSPORT=m
48CONFIG_INET_XFRM_MODE_TUNNEL=m
49CONFIG_TCP_MD5SIG=y
50CONFIG_IPV6_ROUTER_PREF=y
51CONFIG_IPV6_ROUTE_INFO=y
52CONFIG_IPV6_OPTIMISTIC_DAD=y
53CONFIG_INET6_AH=m
54CONFIG_INET6_ESP=m
55CONFIG_INET6_IPCOMP=m
56CONFIG_IPV6_TUNNEL=m
57CONFIG_IPV6_MROUTE=y
58CONFIG_IPV6_PIMSM_V2=y
59CONFIG_NETWORK_SECMARK=y
60CONFIG_NETFILTER=y
61CONFIG_NF_CONNTRACK=m
62CONFIG_NF_CONNTRACK_SECMARK=y
63CONFIG_NF_CONNTRACK_EVENTS=y
64CONFIG_NF_CT_PROTO_DCCP=m
65CONFIG_NF_CT_PROTO_UDPLITE=m
66CONFIG_NF_CONNTRACK_AMANDA=m
67CONFIG_NF_CONNTRACK_FTP=m
68CONFIG_NF_CONNTRACK_H323=m
69CONFIG_NF_CONNTRACK_IRC=m
70CONFIG_NF_CONNTRACK_PPTP=m
71CONFIG_NF_CONNTRACK_SANE=m
72CONFIG_NF_CONNTRACK_SIP=m
73CONFIG_NF_CONNTRACK_TFTP=m
74CONFIG_NF_CT_NETLINK=m
75CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
76CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
77CONFIG_NETFILTER_XT_TARGET_MARK=m
78CONFIG_NETFILTER_XT_TARGET_NFLOG=m
79CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
80CONFIG_NETFILTER_XT_TARGET_TRACE=m
81CONFIG_NETFILTER_XT_TARGET_SECMARK=m
82CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
83CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
84CONFIG_NETFILTER_XT_MATCH_COMMENT=m
85CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
86CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
87CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
88CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
89CONFIG_NETFILTER_XT_MATCH_DCCP=m
90CONFIG_NETFILTER_XT_MATCH_ESP=m
91CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
92CONFIG_NETFILTER_XT_MATCH_HELPER=m
93CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
94CONFIG_NETFILTER_XT_MATCH_LENGTH=m
95CONFIG_NETFILTER_XT_MATCH_LIMIT=m
96CONFIG_NETFILTER_XT_MATCH_MAC=m
97CONFIG_NETFILTER_XT_MATCH_MARK=m
98CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
99CONFIG_NETFILTER_XT_MATCH_OWNER=m
100CONFIG_NETFILTER_XT_MATCH_POLICY=m
101CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
102CONFIG_NETFILTER_XT_MATCH_QUOTA=m
103CONFIG_NETFILTER_XT_MATCH_RATEEST=m
104CONFIG_NETFILTER_XT_MATCH_REALM=m
105CONFIG_NETFILTER_XT_MATCH_RECENT=m
106CONFIG_NETFILTER_XT_MATCH_STATE=m
107CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
108CONFIG_NETFILTER_XT_MATCH_STRING=m
109CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
110CONFIG_NETFILTER_XT_MATCH_TIME=m
111CONFIG_NETFILTER_XT_MATCH_U32=m
112CONFIG_IP_VS=m
113CONFIG_IP_VS_IPV6=y
114CONFIG_IP_VS_PROTO_TCP=y
115CONFIG_IP_VS_PROTO_UDP=y
116CONFIG_IP_VS_PROTO_ESP=y
117CONFIG_IP_VS_PROTO_AH=y
118CONFIG_IP_VS_RR=m
119CONFIG_IP_VS_WRR=m
120CONFIG_IP_VS_LC=m
121CONFIG_IP_VS_WLC=m
122CONFIG_IP_VS_LBLC=m
123CONFIG_IP_VS_LBLCR=m
124CONFIG_IP_VS_DH=m
125CONFIG_IP_VS_SH=m
126CONFIG_IP_VS_SED=m
127CONFIG_IP_VS_NQ=m
128CONFIG_NF_CONNTRACK_IPV4=m
129CONFIG_IP_NF_IPTABLES=m
130CONFIG_IP_NF_MATCH_AH=m
131CONFIG_IP_NF_MATCH_ECN=m
132CONFIG_IP_NF_MATCH_TTL=m
133CONFIG_IP_NF_FILTER=m
134CONFIG_IP_NF_TARGET_REJECT=m
135CONFIG_IP_NF_MANGLE=m
136CONFIG_IP_NF_TARGET_CLUSTERIP=m
137CONFIG_IP_NF_TARGET_ECN=m
138CONFIG_IP_NF_TARGET_TTL=m
139CONFIG_IP_NF_RAW=m
140CONFIG_IP_NF_ARPTABLES=m
141CONFIG_IP_NF_ARPFILTER=m
142CONFIG_IP_NF_ARP_MANGLE=m
143CONFIG_NF_CONNTRACK_IPV6=m
144CONFIG_IP6_NF_MATCH_AH=m
145CONFIG_IP6_NF_MATCH_EUI64=m
146CONFIG_IP6_NF_MATCH_FRAG=m
147CONFIG_IP6_NF_MATCH_OPTS=m
148CONFIG_IP6_NF_MATCH_HL=m
149CONFIG_IP6_NF_MATCH_IPV6HEADER=m
150CONFIG_IP6_NF_MATCH_MH=m
151CONFIG_IP6_NF_MATCH_RT=m
152CONFIG_IP6_NF_TARGET_HL=m
153CONFIG_IP6_NF_FILTER=m
154CONFIG_IP6_NF_TARGET_REJECT=m
155CONFIG_IP6_NF_MANGLE=m
156CONFIG_IP6_NF_RAW=m
157CONFIG_BRIDGE_NF_EBTABLES=m
158CONFIG_BRIDGE_EBT_BROUTE=m
159CONFIG_BRIDGE_EBT_T_FILTER=m
160CONFIG_BRIDGE_EBT_T_NAT=m
161CONFIG_BRIDGE_EBT_802_3=m
162CONFIG_BRIDGE_EBT_AMONG=m
163CONFIG_BRIDGE_EBT_ARP=m
164CONFIG_BRIDGE_EBT_IP=m
165CONFIG_BRIDGE_EBT_IP6=m
166CONFIG_BRIDGE_EBT_LIMIT=m
167CONFIG_BRIDGE_EBT_MARK=m
168CONFIG_BRIDGE_EBT_PKTTYPE=m
169CONFIG_BRIDGE_EBT_STP=m
170CONFIG_BRIDGE_EBT_VLAN=m
171CONFIG_BRIDGE_EBT_ARPREPLY=m
172CONFIG_BRIDGE_EBT_DNAT=m
173CONFIG_BRIDGE_EBT_MARK_T=m
174CONFIG_BRIDGE_EBT_REDIRECT=m
175CONFIG_BRIDGE_EBT_SNAT=m
176CONFIG_BRIDGE_EBT_LOG=m
177CONFIG_BRIDGE_EBT_NFLOG=m
178CONFIG_IP_SCTP=m
179CONFIG_BRIDGE=m
180CONFIG_VLAN_8021Q=m
181CONFIG_VLAN_8021Q_GVRP=y
182CONFIG_ATALK=m
183CONFIG_DEV_APPLETALK=m
184CONFIG_IPDDP=m
185CONFIG_IPDDP_ENCAP=y
186CONFIG_PHONET=m
187CONFIG_NET_SCHED=y
188CONFIG_NET_SCH_CBQ=m
189CONFIG_NET_SCH_HTB=m
190CONFIG_NET_SCH_HFSC=m
191CONFIG_NET_SCH_PRIO=m
192CONFIG_NET_SCH_RED=m
193CONFIG_NET_SCH_SFQ=m
194CONFIG_NET_SCH_TEQL=m
195CONFIG_NET_SCH_TBF=m
196CONFIG_NET_SCH_GRED=m
197CONFIG_NET_SCH_DSMARK=m
198CONFIG_NET_SCH_NETEM=m
199CONFIG_NET_SCH_INGRESS=m
200CONFIG_NET_CLS_BASIC=m
201CONFIG_NET_CLS_TCINDEX=m
202CONFIG_NET_CLS_ROUTE4=m
203CONFIG_NET_CLS_FW=m
204CONFIG_NET_CLS_U32=m
205CONFIG_NET_CLS_RSVP=m
206CONFIG_NET_CLS_RSVP6=m
207CONFIG_NET_CLS_FLOW=m
208CONFIG_NET_CLS_ACT=y
209CONFIG_NET_ACT_POLICE=y
210CONFIG_NET_ACT_GACT=m
211CONFIG_GACT_PROB=y
212CONFIG_NET_ACT_MIRRED=m
213CONFIG_NET_ACT_IPT=m
214CONFIG_NET_ACT_NAT=m
215CONFIG_NET_ACT_PEDIT=m
216CONFIG_NET_ACT_SIMP=m
217CONFIG_NET_ACT_SKBEDIT=m
218CONFIG_NET_CLS_IND=y
219CONFIG_CFG80211=m
220CONFIG_MAC80211=m
221CONFIG_MAC80211_MESH=y
222CONFIG_RFKILL=m
223CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
224CONFIG_DEVTMPFS=y
225CONFIG_DEVTMPFS_MOUNT=y
226CONFIG_CONNECTOR=m
227CONFIG_MTD=y
228CONFIG_MTD_BLOCK=y
229CONFIG_MTD_OOPS=m
230CONFIG_MTD_CFI=y
231CONFIG_MTD_CFI_INTELEXT=y
232CONFIG_MTD_CFI_AMDSTD=y
233CONFIG_MTD_CFI_STAA=y
234CONFIG_MTD_PHYSMAP=y
235CONFIG_MTD_UBI=m
236CONFIG_MTD_UBI_GLUEBI=m
237CONFIG_BLK_DEV_FD=m
238CONFIG_BLK_DEV_UMEM=m
239CONFIG_BLK_DEV_LOOP=m
240CONFIG_BLK_DEV_CRYPTOLOOP=m
241CONFIG_BLK_DEV_NBD=m
242CONFIG_BLK_DEV_RAM=y
243CONFIG_CDROM_PKTCDVD=m
244CONFIG_ATA_OVER_ETH=m
245CONFIG_IDE=y
246CONFIG_BLK_DEV_IDECD=y
247CONFIG_IDE_GENERIC=y
248CONFIG_BLK_DEV_GENERIC=y
249CONFIG_BLK_DEV_PIIX=y
250CONFIG_BLK_DEV_IT8213=m
251CONFIG_BLK_DEV_TC86C001=m
252CONFIG_RAID_ATTRS=m
253CONFIG_SCSI=m
254CONFIG_BLK_DEV_SD=m
255CONFIG_CHR_DEV_ST=m
256CONFIG_CHR_DEV_OSST=m
257CONFIG_BLK_DEV_SR=m
258CONFIG_BLK_DEV_SR_VENDOR=y
259CONFIG_CHR_DEV_SG=m
260CONFIG_SCSI_CONSTANTS=y
261CONFIG_SCSI_LOGGING=y
262CONFIG_SCSI_SCAN_ASYNC=y
263CONFIG_SCSI_FC_ATTRS=m
264CONFIG_ISCSI_TCP=m
265CONFIG_BLK_DEV_3W_XXXX_RAID=m
266CONFIG_SCSI_3W_9XXX=m
267CONFIG_SCSI_ACARD=m
268CONFIG_SCSI_AACRAID=m
269CONFIG_SCSI_AIC7XXX=m
270CONFIG_AIC7XXX_RESET_DELAY_MS=15000
271# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
272CONFIG_MD=y
273CONFIG_BLK_DEV_MD=m
274CONFIG_MD_LINEAR=m
275CONFIG_MD_RAID0=m
276CONFIG_MD_RAID1=m
277CONFIG_MD_RAID10=m
278CONFIG_MD_RAID456=m
279CONFIG_MD_MULTIPATH=m
280CONFIG_MD_FAULTY=m
281CONFIG_BLK_DEV_DM=m
282CONFIG_DM_CRYPT=m
283CONFIG_DM_SNAPSHOT=m
284CONFIG_DM_MIRROR=m
285CONFIG_DM_ZERO=m
286CONFIG_DM_MULTIPATH=m
287CONFIG_NETDEVICES=y
288CONFIG_BONDING=m
289CONFIG_DUMMY=m
290CONFIG_EQUALIZER=m
291CONFIG_IFB=m
292CONFIG_MACVLAN=m
293CONFIG_TUN=m
294CONFIG_VETH=m
295# CONFIG_NET_VENDOR_3COM is not set
296CONFIG_PCNET32=y
297CONFIG_CHELSIO_T3=m
298CONFIG_AX88796=m
299CONFIG_NETXEN_NIC=m
300CONFIG_TC35815=m
301CONFIG_MARVELL_PHY=m
302CONFIG_DAVICOM_PHY=m
303CONFIG_QSEMI_PHY=m
304CONFIG_LXT_PHY=m
305CONFIG_CICADA_PHY=m
306CONFIG_VITESSE_PHY=m
307CONFIG_SMSC_PHY=m
308CONFIG_BROADCOM_PHY=m
309CONFIG_ICPLUS_PHY=m
310CONFIG_REALTEK_PHY=m
311CONFIG_ATMEL=m
312CONFIG_PCI_ATMEL=m
313CONFIG_PRISM54=m
314CONFIG_HOSTAP=m
315CONFIG_HOSTAP_FIRMWARE=y
316CONFIG_HOSTAP_FIRMWARE_NVRAM=y
317CONFIG_HOSTAP_PLX=m
318CONFIG_HOSTAP_PCI=m
319CONFIG_IPW2100=m
320CONFIG_IPW2100_MONITOR=y
321CONFIG_LIBERTAS=m
322# CONFIG_INPUT_KEYBOARD is not set
323# CONFIG_INPUT_MOUSE is not set
324# CONFIG_SERIO_I8042 is not set
325CONFIG_SERIAL_8250=y
326CONFIG_SERIAL_8250_CONSOLE=y
327# CONFIG_HWMON is not set
328CONFIG_FB=y
329CONFIG_FB_CIRRUS=y
330# CONFIG_VGA_CONSOLE is not set
331CONFIG_FRAMEBUFFER_CONSOLE=y
332CONFIG_HID=m
333CONFIG_RTC_CLASS=y
334CONFIG_RTC_DRV_CMOS=y
335CONFIG_UIO=m
336CONFIG_UIO_CIF=m
337CONFIG_EXT2_FS=y
338CONFIG_EXT3_FS=y
339CONFIG_REISERFS_FS=m
340CONFIG_REISERFS_PROC_INFO=y
341CONFIG_REISERFS_FS_XATTR=y
342CONFIG_REISERFS_FS_POSIX_ACL=y
343CONFIG_REISERFS_FS_SECURITY=y
344CONFIG_JFS_FS=m
345CONFIG_JFS_POSIX_ACL=y
346CONFIG_JFS_SECURITY=y
347CONFIG_XFS_FS=m
348CONFIG_XFS_QUOTA=y
349CONFIG_XFS_POSIX_ACL=y
350CONFIG_QUOTA=y
351CONFIG_QFMT_V2=y
352CONFIG_FUSE_FS=m
353CONFIG_ISO9660_FS=m
354CONFIG_JOLIET=y
355CONFIG_ZISOFS=y
356CONFIG_UDF_FS=m
357CONFIG_MSDOS_FS=m
358CONFIG_VFAT_FS=m
359CONFIG_PROC_KCORE=y
360CONFIG_TMPFS=y
361CONFIG_AFFS_FS=m
362CONFIG_HFS_FS=m
363CONFIG_HFSPLUS_FS=m
364CONFIG_BEFS_FS=m
365CONFIG_BFS_FS=m
366CONFIG_EFS_FS=m
367CONFIG_JFFS2_FS=m
368CONFIG_JFFS2_FS_XATTR=y
369CONFIG_JFFS2_COMPRESSION_OPTIONS=y
370CONFIG_JFFS2_RUBIN=y
371CONFIG_CRAMFS=m
372CONFIG_VXFS_FS=m
373CONFIG_MINIX_FS=m
374CONFIG_ROMFS_FS=m
375CONFIG_SYSV_FS=m
376CONFIG_UFS_FS=m
377CONFIG_NFS_FS=y
378CONFIG_ROOT_NFS=y
379CONFIG_NFSD=y
380CONFIG_NFSD_V3=y
381CONFIG_NLS_CODEPAGE_437=m
382CONFIG_NLS_CODEPAGE_737=m
383CONFIG_NLS_CODEPAGE_775=m
384CONFIG_NLS_CODEPAGE_850=m
385CONFIG_NLS_CODEPAGE_852=m
386CONFIG_NLS_CODEPAGE_855=m
387CONFIG_NLS_CODEPAGE_857=m
388CONFIG_NLS_CODEPAGE_860=m
389CONFIG_NLS_CODEPAGE_861=m
390CONFIG_NLS_CODEPAGE_862=m
391CONFIG_NLS_CODEPAGE_863=m
392CONFIG_NLS_CODEPAGE_864=m
393CONFIG_NLS_CODEPAGE_865=m
394CONFIG_NLS_CODEPAGE_866=m
395CONFIG_NLS_CODEPAGE_869=m
396CONFIG_NLS_CODEPAGE_936=m
397CONFIG_NLS_CODEPAGE_950=m
398CONFIG_NLS_CODEPAGE_932=m
399CONFIG_NLS_CODEPAGE_949=m
400CONFIG_NLS_CODEPAGE_874=m
401CONFIG_NLS_ISO8859_8=m
402CONFIG_NLS_CODEPAGE_1250=m
403CONFIG_NLS_CODEPAGE_1251=m
404CONFIG_NLS_ASCII=m
405CONFIG_NLS_ISO8859_1=m
406CONFIG_NLS_ISO8859_2=m
407CONFIG_NLS_ISO8859_3=m
408CONFIG_NLS_ISO8859_4=m
409CONFIG_NLS_ISO8859_5=m
410CONFIG_NLS_ISO8859_6=m
411CONFIG_NLS_ISO8859_7=m
412CONFIG_NLS_ISO8859_9=m
413CONFIG_NLS_ISO8859_13=m
414CONFIG_NLS_ISO8859_14=m
415CONFIG_NLS_ISO8859_15=m
416CONFIG_NLS_KOI8_R=m
417CONFIG_NLS_KOI8_U=m
418CONFIG_CRYPTO_CRYPTD=m
419CONFIG_CRYPTO_LRW=m
420CONFIG_CRYPTO_PCBC=m
421CONFIG_CRYPTO_HMAC=y
422CONFIG_CRYPTO_XCBC=m
423CONFIG_CRYPTO_MD4=m
424CONFIG_CRYPTO_SHA256=m
425CONFIG_CRYPTO_SHA512=m
426CONFIG_CRYPTO_TGR192=m
427CONFIG_CRYPTO_WP512=m
428CONFIG_CRYPTO_ANUBIS=m
429CONFIG_CRYPTO_BLOWFISH=m
430CONFIG_CRYPTO_CAMELLIA=m
431CONFIG_CRYPTO_CAST5=m
432CONFIG_CRYPTO_CAST6=m
433CONFIG_CRYPTO_FCRYPT=m
434CONFIG_CRYPTO_KHAZAD=m
435CONFIG_CRYPTO_SERPENT=m
436CONFIG_CRYPTO_TEA=m
437CONFIG_CRYPTO_TWOFISH=m
438# CONFIG_CRYPTO_ANSI_CPRNG is not set
439CONFIG_CRC16=m
diff --git a/arch/mips/configs/pistachio_defconfig b/arch/mips/configs/pistachio_defconfig
new file mode 100644
index 000000000000..f22e92ee7709
--- /dev/null
+++ b/arch/mips/configs/pistachio_defconfig
@@ -0,0 +1,336 @@
1CONFIG_MACH_PISTACHIO=y
2CONFIG_MIPS_MT_SMP=y
3CONFIG_MIPS_CPS=y
4# CONFIG_COMPACTION is not set
5CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
6CONFIG_ZSMALLOC=y
7CONFIG_NR_CPUS=4
8CONFIG_PREEMPT_VOLUNTARY=y
9# CONFIG_LOCALVERSION_AUTO is not set
10CONFIG_DEFAULT_HOSTNAME="localhost"
11CONFIG_SYSVIPC=y
12CONFIG_NO_HZ=y
13CONFIG_HIGH_RES_TIMERS=y
14CONFIG_IKCONFIG=m
15CONFIG_IKCONFIG_PROC=y
16CONFIG_LOG_BUF_SHIFT=18
17CONFIG_CGROUPS=y
18CONFIG_CGROUP_FREEZER=y
19CONFIG_CGROUP_SCHED=y
20CONFIG_CFS_BANDWIDTH=y
21CONFIG_NAMESPACES=y
22CONFIG_USER_NS=y
23CONFIG_BLK_DEV_INITRD=y
24# CONFIG_RD_BZIP2 is not set
25# CONFIG_RD_LZMA is not set
26# CONFIG_RD_LZO is not set
27# CONFIG_RD_LZ4 is not set
28CONFIG_CC_OPTIMIZE_FOR_SIZE=y
29CONFIG_EMBEDDED=y
30# CONFIG_COMPAT_BRK is not set
31CONFIG_PROFILING=y
32CONFIG_CC_STACKPROTECTOR_STRONG=y
33CONFIG_MODULES=y
34CONFIG_MODULE_UNLOAD=y
35CONFIG_MODULE_FORCE_UNLOAD=y
36CONFIG_PARTITION_ADVANCED=y
37CONFIG_PM_DEBUG=y
38CONFIG_PM_ADVANCED_DEBUG=y
39CONFIG_CPU_IDLE=y
40# CONFIG_MIPS_CPS_CPUIDLE is not set
41CONFIG_NET=y
42CONFIG_PACKET=y
43CONFIG_UNIX=y
44CONFIG_NET_KEY=m
45CONFIG_INET=y
46CONFIG_IP_MULTICAST=y
47CONFIG_IP_ADVANCED_ROUTER=y
48CONFIG_IP_MULTIPLE_TABLES=y
49CONFIG_IP_ROUTE_MULTIPATH=y
50CONFIG_IP_ROUTE_VERBOSE=y
51CONFIG_IP_MROUTE=y
52CONFIG_IP_PIMSM_V1=y
53CONFIG_IP_PIMSM_V2=y
54CONFIG_SYN_COOKIES=y
55CONFIG_INET_AH=m
56CONFIG_INET_ESP=m
57CONFIG_INET_IPCOMP=m
58CONFIG_INET_XFRM_MODE_TRANSPORT=m
59CONFIG_INET_XFRM_MODE_TUNNEL=m
60CONFIG_INET_XFRM_MODE_BEET=m
61# CONFIG_INET_DIAG is not set
62CONFIG_TCP_CONG_ADVANCED=y
63# CONFIG_TCP_CONG_BIC is not set
64# CONFIG_TCP_CONG_WESTWOOD is not set
65# CONFIG_TCP_CONG_HTCP is not set
66CONFIG_TCP_CONG_LP=m
67CONFIG_TCP_MD5SIG=y
68CONFIG_IPV6=y
69CONFIG_INET6_AH=m
70CONFIG_INET6_ESP=m
71CONFIG_INET6_XFRM_MODE_TRANSPORT=m
72CONFIG_INET6_XFRM_MODE_TUNNEL=m
73CONFIG_INET6_XFRM_MODE_BEET=m
74CONFIG_IPV6_SIT=m
75CONFIG_NETWORK_SECMARK=y
76CONFIG_NETFILTER=y
77# CONFIG_BRIDGE_NETFILTER is not set
78CONFIG_NF_CONNTRACK=y
79CONFIG_NF_CT_NETLINK=y
80CONFIG_NETFILTER_XT_MARK=m
81CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
82CONFIG_NETFILTER_XT_TARGET_DSCP=y
83CONFIG_NETFILTER_XT_TARGET_NFLOG=y
84CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
85CONFIG_NETFILTER_XT_TARGET_SECMARK=y
86CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
87CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
88CONFIG_NETFILTER_XT_MATCH_DSCP=y
89CONFIG_NETFILTER_XT_MATCH_POLICY=y
90CONFIG_NETFILTER_XT_MATCH_STATE=y
91CONFIG_NF_CONNTRACK_IPV4=y
92CONFIG_NF_NAT_IPV4=m
93CONFIG_IP_NF_IPTABLES=y
94CONFIG_IP_NF_FILTER=y
95CONFIG_IP_NF_TARGET_REJECT=y
96CONFIG_IP_NF_MANGLE=y
97CONFIG_NF_CONNTRACK_IPV6=m
98CONFIG_NF_NAT_IPV6=m
99CONFIG_IP6_NF_IPTABLES=m
100CONFIG_IP6_NF_MATCH_IPV6HEADER=m
101CONFIG_IP6_NF_FILTER=m
102CONFIG_IP6_NF_TARGET_REJECT=m
103CONFIG_IP6_NF_MANGLE=m
104CONFIG_BRIDGE=m
105CONFIG_VLAN_8021Q=m
106CONFIG_NET_SCHED=y
107CONFIG_NET_SCH_HTB=m
108CONFIG_NET_SCH_CODEL=m
109CONFIG_NET_SCH_FQ_CODEL=m
110CONFIG_NET_CLS_U32=m
111CONFIG_CLS_U32_MARK=y
112CONFIG_BT=m
113CONFIG_BT_RFCOMM=m
114CONFIG_BT_HCIBTUSB=m
115CONFIG_BT_HCIBFUSB=m
116CONFIG_BT_HCIVHCI=m
117CONFIG_CFG80211=m
118CONFIG_NL80211_TESTMODE=y
119CONFIG_CFG80211_DEBUGFS=y
120CONFIG_CFG80211_WEXT=y
121CONFIG_MAC80211=m
122CONFIG_MAC80211_LEDS=y
123CONFIG_MAC80211_DEBUGFS=y
124CONFIG_MAC80211_DEBUG_MENU=y
125CONFIG_MAC80211_VERBOSE_DEBUG=y
126CONFIG_RFKILL=y
127CONFIG_DEVTMPFS=y
128CONFIG_DEVTMPFS_MOUNT=y
129CONFIG_DEBUG_DEVRES=y
130CONFIG_CONNECTOR=y
131CONFIG_MTD=y
132CONFIG_MTD_BLOCK=y
133CONFIG_MTD_M25P80=y
134CONFIG_MTD_SPI_NOR=y
135CONFIG_MTD_UBI=y
136CONFIG_MTD_UBI_BLOCK=y
137CONFIG_ZRAM=m
138CONFIG_BLK_DEV_LOOP=y
139CONFIG_SCSI=y
140CONFIG_BLK_DEV_SD=y
141CONFIG_BLK_DEV_SR=m
142CONFIG_SCSI_SPI_ATTRS=y
143CONFIG_MD=y
144CONFIG_BLK_DEV_DM=y
145CONFIG_DM_CRYPT=y
146CONFIG_DM_VERITY=y
147CONFIG_NETDEVICES=y
148CONFIG_TUN=m
149CONFIG_VETH=m
150# CONFIG_NET_VENDOR_MARVELL is not set
151# CONFIG_NET_VENDOR_MICREL is not set
152# CONFIG_NET_VENDOR_MICROCHIP is not set
153# CONFIG_NET_VENDOR_NATSEMI is not set
154# CONFIG_NET_VENDOR_SEEQ is not set
155# CONFIG_NET_VENDOR_SMSC is not set
156CONFIG_STMMAC_ETH=y
157# CONFIG_NET_VENDOR_VIA is not set
158CONFIG_PPP=m
159CONFIG_PPP_ASYNC=m
160CONFIG_USB_PEGASUS=m
161CONFIG_USB_RTL8150=m
162CONFIG_USB_RTL8152=m
163CONFIG_USB_NET_DM9601=m
164CONFIG_USB_NET_SMSC75XX=m
165CONFIG_USB_NET_SMSC95XX=m
166CONFIG_USB_NET_MCS7830=m
167# CONFIG_USB_NET_CDC_SUBSET is not set
168# CONFIG_USB_NET_ZAURUS is not set
169CONFIG_LIBERTAS_THINFIRM=m
170CONFIG_USB_NET_RNDIS_WLAN=m
171CONFIG_MAC80211_HWSIM=m
172CONFIG_HOSTAP=m
173CONFIG_HOSTAP_FIRMWARE=y
174CONFIG_HOSTAP_FIRMWARE_NVRAM=y
175CONFIG_RT2X00=m
176CONFIG_RT2800USB=m
177# CONFIG_INPUT_MOUSEDEV is not set
178CONFIG_INPUT_EVDEV=y
179# CONFIG_KEYBOARD_ATKBD is not set
180CONFIG_KEYBOARD_GPIO=y
181# CONFIG_INPUT_MOUSE is not set
182# CONFIG_SERIO is not set
183# CONFIG_VT is not set
184# CONFIG_LEGACY_PTYS is not set
185# CONFIG_DEVKMEM is not set
186CONFIG_SERIAL_8250=y
187# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
188CONFIG_SERIAL_8250_CONSOLE=y
189CONFIG_SERIAL_8250_DW=y
190CONFIG_SERIAL_OF_PLATFORM=y
191CONFIG_HW_RANDOM=y
192CONFIG_TCG_TPM=y
193CONFIG_I2C=y
194CONFIG_I2C_CHARDEV=m
195CONFIG_I2C_IMG=y
196CONFIG_I2C_STUB=m
197CONFIG_SPI=y
198CONFIG_SPI_BITBANG=m
199CONFIG_SPI_IMG_SPFI=y
200CONFIG_SPI_SPIDEV=y
201CONFIG_DEBUG_GPIO=y
202CONFIG_GPIO_SYSFS=y
203CONFIG_POWER_SUPPLY=y
204CONFIG_THERMAL=y
205CONFIG_WATCHDOG=y
206CONFIG_WATCHDOG_CORE=y
207CONFIG_IMGPDC_WDT=y
208CONFIG_REGULATOR_FIXED_VOLTAGE=y
209CONFIG_REGULATOR_GPIO=y
210CONFIG_MEDIA_SUPPORT=y
211CONFIG_MEDIA_RC_SUPPORT=y
212# CONFIG_RC_DECODERS is not set
213CONFIG_RC_DEVICES=y
214CONFIG_IR_IMG=y
215CONFIG_IR_IMG_NEC=y
216CONFIG_IR_IMG_JVC=y
217CONFIG_IR_IMG_SONY=y
218CONFIG_IR_IMG_SHARP=y
219CONFIG_IR_IMG_SANYO=y
220CONFIG_IR_IMG_RC5=y
221CONFIG_IR_IMG_RC6=y
222# CONFIG_DVB_TUNER_DIB0070 is not set
223# CONFIG_DVB_TUNER_DIB0090 is not set
224CONFIG_FB=y
225CONFIG_FB_MODE_HELPERS=y
226CONFIG_BACKLIGHT_LCD_SUPPORT=y
227# CONFIG_LCD_CLASS_DEVICE is not set
228CONFIG_BACKLIGHT_CLASS_DEVICE=y
229CONFIG_SOUND=y
230CONFIG_SND=y
231CONFIG_SND_SEQUENCER=m
232CONFIG_SND_SEQ_DUMMY=m
233CONFIG_SND_HRTIMER=m
234CONFIG_SND_DYNAMIC_MINORS=y
235# CONFIG_SND_SPI is not set
236CONFIG_SND_USB_AUDIO=m
237CONFIG_USB=y
238CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
239# CONFIG_USB_DEFAULT_PERSIST is not set
240CONFIG_USB_MON=y
241CONFIG_USB_EHCI_HCD=y
242CONFIG_USB_EHCI_ROOT_HUB_TT=y
243CONFIG_USB_ACM=y
244CONFIG_USB_STORAGE=y
245CONFIG_USB_DWC2=y
246CONFIG_USB_SERIAL=y
247CONFIG_USB_SERIAL_GENERIC=y
248CONFIG_USB_SERIAL_CP210X=m
249CONFIG_USB_SERIAL_FTDI_SIO=m
250CONFIG_USB_SERIAL_KEYSPAN=m
251CONFIG_USB_SERIAL_PL2303=m
252CONFIG_USB_SERIAL_OTI6858=m
253CONFIG_USB_SERIAL_QUALCOMM=m
254CONFIG_USB_SERIAL_SIERRAWIRELESS=m
255CONFIG_USB_SERIAL_OPTION=m
256CONFIG_MMC=y
257CONFIG_MMC_BLOCK_MINORS=16
258CONFIG_MMC_TEST=m
259CONFIG_MMC_DW=y
260CONFIG_MMC_DW_IDMAC=y
261CONFIG_NEW_LEDS=y
262CONFIG_LEDS_CLASS=y
263CONFIG_RTC_CLASS=y
264CONFIG_DMADEVICES=y
265CONFIG_IMG_MDC_DMA=y
266CONFIG_STAGING=y
267CONFIG_ASHMEM=y
268# CONFIG_ANDROID_TIMED_OUTPUT is not set
269# CONFIG_IOMMU_SUPPORT is not set
270CONFIG_MEMORY=y
271CONFIG_IIO=y
272CONFIG_CC10001_ADC=y
273CONFIG_PWM=y
274CONFIG_PWM_IMG=y
275CONFIG_ANDROID=y
276CONFIG_EXT4_FS=y
277CONFIG_EXT4_FS_POSIX_ACL=y
278CONFIG_EXT4_FS_SECURITY=y
279# CONFIG_DNOTIFY is not set
280CONFIG_FUSE_FS=m
281CONFIG_ISO9660_FS=m
282CONFIG_JOLIET=y
283CONFIG_ZISOFS=y
284CONFIG_UDF_FS=m
285CONFIG_VFAT_FS=m
286CONFIG_TMPFS=y
287CONFIG_TMPFS_POSIX_ACL=y
288CONFIG_ECRYPT_FS=y
289CONFIG_HFSPLUS_FS=m
290CONFIG_UBIFS_FS=y
291CONFIG_SQUASHFS=y
292CONFIG_SQUASHFS_FILE_DIRECT=y
293CONFIG_SQUASHFS_LZO=y
294CONFIG_PSTORE=y
295CONFIG_PSTORE_CONSOLE=y
296CONFIG_PSTORE_RAM=y
297# CONFIG_NETWORK_FILESYSTEMS is not set
298CONFIG_NLS_DEFAULT="utf8"
299CONFIG_NLS_CODEPAGE_437=m
300CONFIG_NLS_ASCII=m
301CONFIG_NLS_ISO8859_1=m
302CONFIG_PRINTK_TIME=y
303CONFIG_DEBUG_INFO=y
304CONFIG_MAGIC_SYSRQ=y
305CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0
306CONFIG_LOCKUP_DETECTOR=y
307CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
308CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
309# CONFIG_SCHED_DEBUG is not set
310CONFIG_SCHEDSTATS=y
311CONFIG_TIMER_STATS=y
312CONFIG_DEBUG_SPINLOCK=y
313CONFIG_DEBUG_CREDENTIALS=y
314CONFIG_FUNCTION_TRACER=y
315CONFIG_BLK_DEV_IO_TRACE=y
316CONFIG_LKDTM=y
317CONFIG_TEST_UDELAY=m
318CONFIG_KEYS=y
319CONFIG_SECURITY=y
320CONFIG_SECURITY_NETWORK=y
321CONFIG_SECURITY_YAMA=y
322CONFIG_SECURITY_YAMA_STACKED=y
323CONFIG_DEFAULT_SECURITY_DAC=y
324CONFIG_CRYPTO_AUTHENC=y
325CONFIG_CRYPTO_HMAC=y
326CONFIG_CRYPTO_SHA1=y
327CONFIG_CRYPTO_SHA256=y
328CONFIG_CRYPTO_SHA512=m
329CONFIG_CRYPTO_ARC4=y
330CONFIG_CRYPTO_DES=y
331# CONFIG_CRYPTO_ANSI_CPRNG is not set
332CONFIG_CRC_CCITT=y
333CONFIG_CRC_T10DIF=m
334CONFIG_CRC7=m
335CONFIG_LIBCRC32C=m
336# CONFIG_XZ_DEC_X86 is not set
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
index 41a2fa1fa12e..8c6f508e59de 100644
--- a/arch/mips/dec/int-handler.S
+++ b/arch/mips/dec/int-handler.S
@@ -267,8 +267,13 @@ handle_it:
267 267
268#ifdef CONFIG_32BIT 268#ifdef CONFIG_32BIT
269fpu: 269fpu:
270 lw t0,fpu_kstat_irq
271 nop
272 lw t1,(t0)
273 nop
274 addu t1,1
270 j handle_fpe_int 275 j handle_fpe_int
271 nop 276 sw t1,(t0)
272#endif 277#endif
273 278
274spurious: 279spurious:
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c
index 41bbffd9cc0e..a0b8943c8f11 100644
--- a/arch/mips/dec/setup.c
+++ b/arch/mips/dec/setup.c
@@ -12,13 +12,15 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/ioport.h> 14#include <linux/ioport.h>
15#include <linux/irq.h>
16#include <linux/irqnr.h>
15#include <linux/module.h> 17#include <linux/module.h>
16#include <linux/param.h> 18#include <linux/param.h>
19#include <linux/percpu-defs.h>
17#include <linux/sched.h> 20#include <linux/sched.h>
18#include <linux/spinlock.h> 21#include <linux/spinlock.h>
19#include <linux/types.h> 22#include <linux/types.h>
20#include <linux/pm.h> 23#include <linux/pm.h>
21#include <linux/irq.h>
22 24
23#include <asm/bootinfo.h> 25#include <asm/bootinfo.h>
24#include <asm/cpu.h> 26#include <asm/cpu.h>
@@ -98,6 +100,7 @@ int_ptr asic_mask_nr_tbl[DEC_MAX_ASIC_INTS][2] = {
98 { { .i = ~0 }, { .p = asic_intr_unimplemented } }, 100 { { .i = ~0 }, { .p = asic_intr_unimplemented } },
99}; 101};
100int cpu_fpu_mask = DEC_CPU_IRQ_MASK(DEC_CPU_INR_FPU); 102int cpu_fpu_mask = DEC_CPU_IRQ_MASK(DEC_CPU_INR_FPU);
103int *fpu_kstat_irq;
101 104
102static struct irqaction ioirq = { 105static struct irqaction ioirq = {
103 .handler = no_action, 106 .handler = no_action,
@@ -755,8 +758,15 @@ void __init arch_init_irq(void)
755 dec_interrupt[DEC_IRQ_HALT] = -1; 758 dec_interrupt[DEC_IRQ_HALT] = -1;
756 759
757 /* Register board interrupts: FPU and cascade. */ 760 /* Register board interrupts: FPU and cascade. */
758 if (dec_interrupt[DEC_IRQ_FPU] >= 0) 761 if (dec_interrupt[DEC_IRQ_FPU] >= 0 && cpu_has_fpu) {
759 setup_irq(dec_interrupt[DEC_IRQ_FPU], &fpuirq); 762 struct irq_desc *desc_fpu;
763 int irq_fpu;
764
765 irq_fpu = dec_interrupt[DEC_IRQ_FPU];
766 setup_irq(irq_fpu, &fpuirq);
767 desc_fpu = irq_to_desc(irq_fpu);
768 fpu_kstat_irq = this_cpu_ptr(desc_fpu->kstat_irqs);
769 }
760 if (dec_interrupt[DEC_IRQ_CASCADE] >= 0) 770 if (dec_interrupt[DEC_IRQ_CASCADE] >= 0)
761 setup_irq(dec_interrupt[DEC_IRQ_CASCADE], &ioirq); 771 setup_irq(dec_interrupt[DEC_IRQ_CASCADE], &ioirq);
762 772
diff --git a/arch/mips/include/asm/asm-eva.h b/arch/mips/include/asm/asm-eva.h
index e41c56e375b1..1e38f0e1ea3e 100644
--- a/arch/mips/include/asm/asm-eva.h
+++ b/arch/mips/include/asm/asm-eva.h
@@ -11,6 +11,36 @@
11#define __ASM_ASM_EVA_H 11#define __ASM_ASM_EVA_H
12 12
13#ifndef __ASSEMBLY__ 13#ifndef __ASSEMBLY__
14
15/* Kernel variants */
16
17#define kernel_cache(op, base) "cache " op ", " base "\n"
18#define kernel_ll(reg, addr) "ll " reg ", " addr "\n"
19#define kernel_sc(reg, addr) "sc " reg ", " addr "\n"
20#define kernel_lw(reg, addr) "lw " reg ", " addr "\n"
21#define kernel_lwl(reg, addr) "lwl " reg ", " addr "\n"
22#define kernel_lwr(reg, addr) "lwr " reg ", " addr "\n"
23#define kernel_lh(reg, addr) "lh " reg ", " addr "\n"
24#define kernel_lb(reg, addr) "lb " reg ", " addr "\n"
25#define kernel_lbu(reg, addr) "lbu " reg ", " addr "\n"
26#define kernel_sw(reg, addr) "sw " reg ", " addr "\n"
27#define kernel_swl(reg, addr) "swl " reg ", " addr "\n"
28#define kernel_swr(reg, addr) "swr " reg ", " addr "\n"
29#define kernel_sh(reg, addr) "sh " reg ", " addr "\n"
30#define kernel_sb(reg, addr) "sb " reg ", " addr "\n"
31
32#ifdef CONFIG_32BIT
33/*
34 * No 'sd' or 'ld' instructions in 32-bit but the code will
35 * do the correct thing
36 */
37#define kernel_sd(reg, addr) user_sw(reg, addr)
38#define kernel_ld(reg, addr) user_lw(reg, addr)
39#else
40#define kernel_sd(reg, addr) "sd " reg", " addr "\n"
41#define kernel_ld(reg, addr) "ld " reg", " addr "\n"
42#endif /* CONFIG_32BIT */
43
14#ifdef CONFIG_EVA 44#ifdef CONFIG_EVA
15 45
16#define __BUILD_EVA_INSN(insn, reg, addr) \ 46#define __BUILD_EVA_INSN(insn, reg, addr) \
@@ -41,37 +71,60 @@
41 71
42#else 72#else
43 73
44#define user_cache(op, base) "cache " op ", " base "\n" 74#define user_cache(op, base) kernel_cache(op, base)
45#define user_ll(reg, addr) "ll " reg ", " addr "\n" 75#define user_ll(reg, addr) kernel_ll(reg, addr)
46#define user_sc(reg, addr) "sc " reg ", " addr "\n" 76#define user_sc(reg, addr) kernel_sc(reg, addr)
47#define user_lw(reg, addr) "lw " reg ", " addr "\n" 77#define user_lw(reg, addr) kernel_lw(reg, addr)
48#define user_lwl(reg, addr) "lwl " reg ", " addr "\n" 78#define user_lwl(reg, addr) kernel_lwl(reg, addr)
49#define user_lwr(reg, addr) "lwr " reg ", " addr "\n" 79#define user_lwr(reg, addr) kernel_lwr(reg, addr)
50#define user_lh(reg, addr) "lh " reg ", " addr "\n" 80#define user_lh(reg, addr) kernel_lh(reg, addr)
51#define user_lb(reg, addr) "lb " reg ", " addr "\n" 81#define user_lb(reg, addr) kernel_lb(reg, addr)
52#define user_lbu(reg, addr) "lbu " reg ", " addr "\n" 82#define user_lbu(reg, addr) kernel_lbu(reg, addr)
53#define user_sw(reg, addr) "sw " reg ", " addr "\n" 83#define user_sw(reg, addr) kernel_sw(reg, addr)
54#define user_swl(reg, addr) "swl " reg ", " addr "\n" 84#define user_swl(reg, addr) kernel_swl(reg, addr)
55#define user_swr(reg, addr) "swr " reg ", " addr "\n" 85#define user_swr(reg, addr) kernel_swr(reg, addr)
56#define user_sh(reg, addr) "sh " reg ", " addr "\n" 86#define user_sh(reg, addr) kernel_sh(reg, addr)
57#define user_sb(reg, addr) "sb " reg ", " addr "\n" 87#define user_sb(reg, addr) kernel_sb(reg, addr)
58 88
59#ifdef CONFIG_32BIT 89#ifdef CONFIG_32BIT
60/* 90#define user_sd(reg, addr) kernel_sw(reg, addr)
61 * No 'sd' or 'ld' instructions in 32-bit but the code will 91#define user_ld(reg, addr) kernel_lw(reg, addr)
62 * do the correct thing
63 */
64#define user_sd(reg, addr) user_sw(reg, addr)
65#define user_ld(reg, addr) user_lw(reg, addr)
66#else 92#else
67#define user_sd(reg, addr) "sd " reg", " addr "\n" 93#define user_sd(reg, addr) kernel_sd(reg, addr)
68#define user_ld(reg, addr) "ld " reg", " addr "\n" 94#define user_ld(reg, addr) kernel_ld(reg, addr)
69#endif /* CONFIG_32BIT */ 95#endif /* CONFIG_32BIT */
70 96
71#endif /* CONFIG_EVA */ 97#endif /* CONFIG_EVA */
72 98
73#else /* __ASSEMBLY__ */ 99#else /* __ASSEMBLY__ */
74 100
101#define kernel_cache(op, base) cache op, base
102#define kernel_ll(reg, addr) ll reg, addr
103#define kernel_sc(reg, addr) sc reg, addr
104#define kernel_lw(reg, addr) lw reg, addr
105#define kernel_lwl(reg, addr) lwl reg, addr
106#define kernel_lwr(reg, addr) lwr reg, addr
107#define kernel_lh(reg, addr) lh reg, addr
108#define kernel_lb(reg, addr) lb reg, addr
109#define kernel_lbu(reg, addr) lbu reg, addr
110#define kernel_sw(reg, addr) sw reg, addr
111#define kernel_swl(reg, addr) swl reg, addr
112#define kernel_swr(reg, addr) swr reg, addr
113#define kernel_sh(reg, addr) sh reg, addr
114#define kernel_sb(reg, addr) sb reg, addr
115
116#ifdef CONFIG_32BIT
117/*
118 * No 'sd' or 'ld' instructions in 32-bit but the code will
119 * do the correct thing
120 */
121#define kernel_sd(reg, addr) user_sw(reg, addr)
122#define kernel_ld(reg, addr) user_lw(reg, addr)
123#else
124#define kernel_sd(reg, addr) sd reg, addr
125#define kernel_ld(reg, addr) ld reg, addr
126#endif /* CONFIG_32BIT */
127
75#ifdef CONFIG_EVA 128#ifdef CONFIG_EVA
76 129
77#define __BUILD_EVA_INSN(insn, reg, addr) \ 130#define __BUILD_EVA_INSN(insn, reg, addr) \
@@ -101,31 +154,27 @@
101#define user_sd(reg, addr) user_sw(reg, addr) 154#define user_sd(reg, addr) user_sw(reg, addr)
102#else 155#else
103 156
104#define user_cache(op, base) cache op, base 157#define user_cache(op, base) kernel_cache(op, base)
105#define user_ll(reg, addr) ll reg, addr 158#define user_ll(reg, addr) kernel_ll(reg, addr)
106#define user_sc(reg, addr) sc reg, addr 159#define user_sc(reg, addr) kernel_sc(reg, addr)
107#define user_lw(reg, addr) lw reg, addr 160#define user_lw(reg, addr) kernel_lw(reg, addr)
108#define user_lwl(reg, addr) lwl reg, addr 161#define user_lwl(reg, addr) kernel_lwl(reg, addr)
109#define user_lwr(reg, addr) lwr reg, addr 162#define user_lwr(reg, addr) kernel_lwr(reg, addr)
110#define user_lh(reg, addr) lh reg, addr 163#define user_lh(reg, addr) kernel_lh(reg, addr)
111#define user_lb(reg, addr) lb reg, addr 164#define user_lb(reg, addr) kernel_lb(reg, addr)
112#define user_lbu(reg, addr) lbu reg, addr 165#define user_lbu(reg, addr) kernel_lbu(reg, addr)
113#define user_sw(reg, addr) sw reg, addr 166#define user_sw(reg, addr) kernel_sw(reg, addr)
114#define user_swl(reg, addr) swl reg, addr 167#define user_swl(reg, addr) kernel_swl(reg, addr)
115#define user_swr(reg, addr) swr reg, addr 168#define user_swr(reg, addr) kernel_swr(reg, addr)
116#define user_sh(reg, addr) sh reg, addr 169#define user_sh(reg, addr) kernel_sh(reg, addr)
117#define user_sb(reg, addr) sb reg, addr 170#define user_sb(reg, addr) kernel_sb(reg, addr)
118 171
119#ifdef CONFIG_32BIT 172#ifdef CONFIG_32BIT
120/* 173#define user_sd(reg, addr) kernel_sw(reg, addr)
121 * No 'sd' or 'ld' instructions in 32-bit but the code will 174#define user_ld(reg, addr) kernel_lw(reg, addr)
122 * do the correct thing
123 */
124#define user_sd(reg, addr) user_sw(reg, addr)
125#define user_ld(reg, addr) user_lw(reg, addr)
126#else 175#else
127#define user_sd(reg, addr) sd reg, addr 176#define user_sd(reg, addr) kernel_sd(reg, addr)
128#define user_ld(reg, addr) ld reg, addr 177#define user_ld(reg, addr) kernel_sd(reg, addr)
129#endif /* CONFIG_32BIT */ 178#endif /* CONFIG_32BIT */
130 179
131#endif /* CONFIG_EVA */ 180#endif /* CONFIG_EVA */
diff --git a/arch/mips/include/asm/asmmacro-32.h b/arch/mips/include/asm/asmmacro-32.h
index 80386470d3a4..0ef39ad0f2d4 100644
--- a/arch/mips/include/asm/asmmacro-32.h
+++ b/arch/mips/include/asm/asmmacro-32.h
@@ -16,38 +16,22 @@
16 .set push 16 .set push
17 SET_HARDFLOAT 17 SET_HARDFLOAT
18 cfc1 \tmp, fcr31 18 cfc1 \tmp, fcr31
19 swc1 $f0, THREAD_FPR0(\thread) 19 s.d $f0, THREAD_FPR0(\thread)
20 swc1 $f1, THREAD_FPR1(\thread) 20 s.d $f2, THREAD_FPR2(\thread)
21 swc1 $f2, THREAD_FPR2(\thread) 21 s.d $f4, THREAD_FPR4(\thread)
22 swc1 $f3, THREAD_FPR3(\thread) 22 s.d $f6, THREAD_FPR6(\thread)
23 swc1 $f4, THREAD_FPR4(\thread) 23 s.d $f8, THREAD_FPR8(\thread)
24 swc1 $f5, THREAD_FPR5(\thread) 24 s.d $f10, THREAD_FPR10(\thread)
25 swc1 $f6, THREAD_FPR6(\thread) 25 s.d $f12, THREAD_FPR12(\thread)
26 swc1 $f7, THREAD_FPR7(\thread) 26 s.d $f14, THREAD_FPR14(\thread)
27 swc1 $f8, THREAD_FPR8(\thread) 27 s.d $f16, THREAD_FPR16(\thread)
28 swc1 $f9, THREAD_FPR9(\thread) 28 s.d $f18, THREAD_FPR18(\thread)
29 swc1 $f10, THREAD_FPR10(\thread) 29 s.d $f20, THREAD_FPR20(\thread)
30 swc1 $f11, THREAD_FPR11(\thread) 30 s.d $f22, THREAD_FPR22(\thread)
31 swc1 $f12, THREAD_FPR12(\thread) 31 s.d $f24, THREAD_FPR24(\thread)
32 swc1 $f13, THREAD_FPR13(\thread) 32 s.d $f26, THREAD_FPR26(\thread)
33 swc1 $f14, THREAD_FPR14(\thread) 33 s.d $f28, THREAD_FPR28(\thread)
34 swc1 $f15, THREAD_FPR15(\thread) 34 s.d $f30, THREAD_FPR30(\thread)
35 swc1 $f16, THREAD_FPR16(\thread)
36 swc1 $f17, THREAD_FPR17(\thread)
37 swc1 $f18, THREAD_FPR18(\thread)
38 swc1 $f19, THREAD_FPR19(\thread)
39 swc1 $f20, THREAD_FPR20(\thread)
40 swc1 $f21, THREAD_FPR21(\thread)
41 swc1 $f22, THREAD_FPR22(\thread)
42 swc1 $f23, THREAD_FPR23(\thread)
43 swc1 $f24, THREAD_FPR24(\thread)
44 swc1 $f25, THREAD_FPR25(\thread)
45 swc1 $f26, THREAD_FPR26(\thread)
46 swc1 $f27, THREAD_FPR27(\thread)
47 swc1 $f28, THREAD_FPR28(\thread)
48 swc1 $f29, THREAD_FPR29(\thread)
49 swc1 $f30, THREAD_FPR30(\thread)
50 swc1 $f31, THREAD_FPR31(\thread)
51 sw \tmp, THREAD_FCR31(\thread) 35 sw \tmp, THREAD_FCR31(\thread)
52 .set pop 36 .set pop
53 .endm 37 .endm
@@ -56,38 +40,22 @@
56 .set push 40 .set push
57 SET_HARDFLOAT 41 SET_HARDFLOAT
58 lw \tmp, THREAD_FCR31(\thread) 42 lw \tmp, THREAD_FCR31(\thread)
59 lwc1 $f0, THREAD_FPR0(\thread) 43 l.d $f0, THREAD_FPR0(\thread)
60 lwc1 $f1, THREAD_FPR1(\thread) 44 l.d $f2, THREAD_FPR2(\thread)
61 lwc1 $f2, THREAD_FPR2(\thread) 45 l.d $f4, THREAD_FPR4(\thread)
62 lwc1 $f3, THREAD_FPR3(\thread) 46 l.d $f6, THREAD_FPR6(\thread)
63 lwc1 $f4, THREAD_FPR4(\thread) 47 l.d $f8, THREAD_FPR8(\thread)
64 lwc1 $f5, THREAD_FPR5(\thread) 48 l.d $f10, THREAD_FPR10(\thread)
65 lwc1 $f6, THREAD_FPR6(\thread) 49 l.d $f12, THREAD_FPR12(\thread)
66 lwc1 $f7, THREAD_FPR7(\thread) 50 l.d $f14, THREAD_FPR14(\thread)
67 lwc1 $f8, THREAD_FPR8(\thread) 51 l.d $f16, THREAD_FPR16(\thread)
68 lwc1 $f9, THREAD_FPR9(\thread) 52 l.d $f18, THREAD_FPR18(\thread)
69 lwc1 $f10, THREAD_FPR10(\thread) 53 l.d $f20, THREAD_FPR20(\thread)
70 lwc1 $f11, THREAD_FPR11(\thread) 54 l.d $f22, THREAD_FPR22(\thread)
71 lwc1 $f12, THREAD_FPR12(\thread) 55 l.d $f24, THREAD_FPR24(\thread)
72 lwc1 $f13, THREAD_FPR13(\thread) 56 l.d $f26, THREAD_FPR26(\thread)
73 lwc1 $f14, THREAD_FPR14(\thread) 57 l.d $f28, THREAD_FPR28(\thread)
74 lwc1 $f15, THREAD_FPR15(\thread) 58 l.d $f30, THREAD_FPR30(\thread)
75 lwc1 $f16, THREAD_FPR16(\thread)
76 lwc1 $f17, THREAD_FPR17(\thread)
77 lwc1 $f18, THREAD_FPR18(\thread)
78 lwc1 $f19, THREAD_FPR19(\thread)
79 lwc1 $f20, THREAD_FPR20(\thread)
80 lwc1 $f21, THREAD_FPR21(\thread)
81 lwc1 $f22, THREAD_FPR22(\thread)
82 lwc1 $f23, THREAD_FPR23(\thread)
83 lwc1 $f24, THREAD_FPR24(\thread)
84 lwc1 $f25, THREAD_FPR25(\thread)
85 lwc1 $f26, THREAD_FPR26(\thread)
86 lwc1 $f27, THREAD_FPR27(\thread)
87 lwc1 $f28, THREAD_FPR28(\thread)
88 lwc1 $f29, THREAD_FPR29(\thread)
89 lwc1 $f30, THREAD_FPR30(\thread)
90 lwc1 $f31, THREAD_FPR31(\thread)
91 ctc1 \tmp, fcr31 59 ctc1 \tmp, fcr31
92 .set pop 60 .set pop
93 .endm 61 .endm
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
index 9f935f6aa996..0cf29bd5dc5c 100644
--- a/arch/mips/include/asm/bitops.h
+++ b/arch/mips/include/asm/bitops.h
@@ -481,7 +481,7 @@ static inline unsigned long __fls(unsigned long word)
481{ 481{
482 int num; 482 int num;
483 483
484 if (BITS_PER_LONG == 32 && 484 if (BITS_PER_LONG == 32 && !__builtin_constant_p(word) &&
485 __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { 485 __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) {
486 __asm__( 486 __asm__(
487 " .set push \n" 487 " .set push \n"
@@ -494,7 +494,7 @@ static inline unsigned long __fls(unsigned long word)
494 return 31 - num; 494 return 31 - num;
495 } 495 }
496 496
497 if (BITS_PER_LONG == 64 && 497 if (BITS_PER_LONG == 64 && !__builtin_constant_p(word) &&
498 __builtin_constant_p(cpu_has_mips64) && cpu_has_mips64) { 498 __builtin_constant_p(cpu_has_mips64) && cpu_has_mips64) {
499 __asm__( 499 __asm__(
500 " .set push \n" 500 " .set push \n"
@@ -559,7 +559,8 @@ static inline int fls(int x)
559{ 559{
560 int r; 560 int r;
561 561
562 if (__builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { 562 if (!__builtin_constant_p(x) &&
563 __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) {
563 __asm__( 564 __asm__(
564 " .set push \n" 565 " .set push \n"
565 " .set "MIPS_ISA_LEVEL" \n" 566 " .set "MIPS_ISA_LEVEL" \n"
diff --git a/arch/mips/include/asm/bmips.h b/arch/mips/include/asm/bmips.h
index 30939b02e3ff..6d25ad33ec78 100644
--- a/arch/mips/include/asm/bmips.h
+++ b/arch/mips/include/asm/bmips.h
@@ -122,6 +122,22 @@ static inline void bmips_write_zscm_reg(unsigned int offset, unsigned long data)
122 barrier(); 122 barrier();
123} 123}
124 124
125static inline void bmips_post_dma_flush(struct device *dev)
126{
127 void __iomem *cbr = BMIPS_GET_CBR();
128 u32 cfg;
129
130 if (boot_cpu_type() != CPU_BMIPS3300 &&
131 boot_cpu_type() != CPU_BMIPS4350 &&
132 boot_cpu_type() != CPU_BMIPS4380)
133 return;
134
135 /* Flush stale data out of the readahead cache */
136 cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
137 __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
138 __raw_readl(cbr + BMIPS_RAC_CONFIG);
139}
140
125#endif /* !defined(__ASSEMBLY__) */ 141#endif /* !defined(__ASSEMBLY__) */
126 142
127#endif /* _ASM_BMIPS_H */ 143#endif /* _ASM_BMIPS_H */
diff --git a/arch/mips/include/asm/cacheflush.h b/arch/mips/include/asm/cacheflush.h
index e08381a37f8b..723229f4cf27 100644
--- a/arch/mips/include/asm/cacheflush.h
+++ b/arch/mips/include/asm/cacheflush.h
@@ -29,6 +29,20 @@
29 * - flush_icache_all() flush the entire instruction cache 29 * - flush_icache_all() flush the entire instruction cache
30 * - flush_data_cache_page() flushes a page from the data cache 30 * - flush_data_cache_page() flushes a page from the data cache
31 */ 31 */
32
33 /*
34 * This flag is used to indicate that the page pointed to by a pte
35 * is dirty and requires cleaning before returning it to the user.
36 */
37#define PG_dcache_dirty PG_arch_1
38
39#define Page_dcache_dirty(page) \
40 test_bit(PG_dcache_dirty, &(page)->flags)
41#define SetPageDcacheDirty(page) \
42 set_bit(PG_dcache_dirty, &(page)->flags)
43#define ClearPageDcacheDirty(page) \
44 clear_bit(PG_dcache_dirty, &(page)->flags)
45
32extern void (*flush_cache_all)(void); 46extern void (*flush_cache_all)(void);
33extern void (*__flush_cache_all)(void); 47extern void (*__flush_cache_all)(void);
34extern void (*flush_cache_mm)(struct mm_struct *mm); 48extern void (*flush_cache_mm)(struct mm_struct *mm);
@@ -37,13 +51,15 @@ extern void (*flush_cache_range)(struct vm_area_struct *vma,
37 unsigned long start, unsigned long end); 51 unsigned long start, unsigned long end);
38extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn); 52extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn);
39extern void __flush_dcache_page(struct page *page); 53extern void __flush_dcache_page(struct page *page);
54extern void __flush_icache_page(struct vm_area_struct *vma, struct page *page);
40 55
41#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 56#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
42static inline void flush_dcache_page(struct page *page) 57static inline void flush_dcache_page(struct page *page)
43{ 58{
44 if (cpu_has_dc_aliases || !cpu_has_ic_fills_f_dc) 59 if (cpu_has_dc_aliases)
45 __flush_dcache_page(page); 60 __flush_dcache_page(page);
46 61 else if (!cpu_has_ic_fills_f_dc)
62 SetPageDcacheDirty(page);
47} 63}
48 64
49#define flush_dcache_mmap_lock(mapping) do { } while (0) 65#define flush_dcache_mmap_lock(mapping) do { } while (0)
@@ -61,6 +77,11 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
61static inline void flush_icache_page(struct vm_area_struct *vma, 77static inline void flush_icache_page(struct vm_area_struct *vma,
62 struct page *page) 78 struct page *page)
63{ 79{
80 if (!cpu_has_ic_fills_f_dc && (vma->vm_flags & VM_EXEC) &&
81 Page_dcache_dirty(page)) {
82 __flush_icache_page(vma, page);
83 ClearPageDcacheDirty(page);
84 }
64} 85}
65 86
66extern void (*flush_icache_range)(unsigned long start, unsigned long end); 87extern void (*flush_icache_range)(unsigned long start, unsigned long end);
@@ -95,19 +116,6 @@ extern void (*flush_icache_all)(void);
95extern void (*local_flush_data_cache_page)(void * addr); 116extern void (*local_flush_data_cache_page)(void * addr);
96extern void (*flush_data_cache_page)(unsigned long addr); 117extern void (*flush_data_cache_page)(unsigned long addr);
97 118
98/*
99 * This flag is used to indicate that the page pointed to by a pte
100 * is dirty and requires cleaning before returning it to the user.
101 */
102#define PG_dcache_dirty PG_arch_1
103
104#define Page_dcache_dirty(page) \
105 test_bit(PG_dcache_dirty, &(page)->flags)
106#define SetPageDcacheDirty(page) \
107 set_bit(PG_dcache_dirty, &(page)->flags)
108#define ClearPageDcacheDirty(page) \
109 clear_bit(PG_dcache_dirty, &(page)->flags)
110
111/* Run kernel code uncached, useful for cache probing functions. */ 119/* Run kernel code uncached, useful for cache probing functions. */
112unsigned long run_uncached(void *func); 120unsigned long run_uncached(void *func);
113 121
diff --git a/arch/mips/include/asm/cdmm.h b/arch/mips/include/asm/cdmm.h
new file mode 100644
index 000000000000..16e22ce9719f
--- /dev/null
+++ b/arch/mips/include/asm/cdmm.h
@@ -0,0 +1,98 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2014 Imagination Technologies Ltd.
7 */
8#ifndef __ASM_CDMM_H
9#define __ASM_CDMM_H
10
11#include <linux/device.h>
12#include <linux/mod_devicetable.h>
13
14/**
15 * struct mips_cdmm_device - Represents a single device on a CDMM bus.
16 * @dev: Driver model device object.
17 * @cpu: CPU which can access this device.
18 * @res: MMIO resource.
19 * @type: Device type identifier.
20 * @rev: Device revision number.
21 */
22struct mips_cdmm_device {
23 struct device dev;
24 unsigned int cpu;
25 struct resource res;
26 unsigned int type;
27 unsigned int rev;
28};
29
30/**
31 * struct mips_cdmm_driver - Represents a driver for a CDMM device.
32 * @drv: Driver model driver object.
33 * @probe Callback for probing newly discovered devices.
34 * @remove: Callback to remove the device.
35 * @shutdown: Callback on system shutdown.
36 * @cpu_down: Callback when the parent CPU is going down.
37 * Any CPU pinned threads/timers should be disabled.
38 * @cpu_up: Callback when the parent CPU is coming back up again.
39 * CPU pinned threads/timers can be restarted.
40 * @id_table: Table for CDMM IDs to match against.
41 */
42struct mips_cdmm_driver {
43 struct device_driver drv;
44 int (*probe)(struct mips_cdmm_device *);
45 int (*remove)(struct mips_cdmm_device *);
46 void (*shutdown)(struct mips_cdmm_device *);
47 int (*cpu_down)(struct mips_cdmm_device *);
48 int (*cpu_up)(struct mips_cdmm_device *);
49 const struct mips_cdmm_device_id *id_table;
50};
51
52/**
53 * mips_cdmm_phys_base() - Choose a physical base address for CDMM region.
54 *
55 * Picking a suitable physical address at which to map the CDMM region is
56 * platform specific, so this weak function can be defined by platform code to
57 * pick a suitable value if none is configured by the bootloader.
58 *
59 * This address must be 32kB aligned, and the region occupies a maximum of 32kB
60 * of physical address space which must not be used for anything else.
61 *
62 * Returns: Physical base address for CDMM region, or 0 on failure.
63 */
64phys_addr_t __weak mips_cdmm_phys_base(void);
65
66extern struct bus_type mips_cdmm_bustype;
67void __iomem *mips_cdmm_early_probe(unsigned int dev_type);
68
69#define to_mips_cdmm_device(d) container_of(d, struct mips_cdmm_device, dev)
70
71#define mips_cdmm_get_drvdata(d) dev_get_drvdata(&d->dev)
72#define mips_cdmm_set_drvdata(d, p) dev_set_drvdata(&d->dev, p)
73
74int mips_cdmm_driver_register(struct mips_cdmm_driver *);
75void mips_cdmm_driver_unregister(struct mips_cdmm_driver *);
76
77/*
78 * module_mips_cdmm_driver() - Helper macro for drivers that don't do
79 * anything special in module init/exit. This eliminates a lot of
80 * boilerplate. Each module may only use this macro once, and
81 * calling it replaces module_init() and module_exit()
82 */
83#define module_mips_cdmm_driver(__mips_cdmm_driver) \
84 module_driver(__mips_cdmm_driver, mips_cdmm_driver_register, \
85 mips_cdmm_driver_unregister)
86
87/* drivers/tty/mips_ejtag_fdc.c */
88
89#ifdef CONFIG_MIPS_EJTAG_FDC_EARLYCON
90int setup_early_fdc_console(void);
91#else
92static inline int setup_early_fdc_console(void)
93{
94 return -ENODEV;
95}
96#endif
97
98#endif /* __ASM_CDMM_H */
diff --git a/arch/mips/include/asm/cevt-r4k.h b/arch/mips/include/asm/cevt-r4k.h
index 65f9bdd02f1f..f0edf6fcd002 100644
--- a/arch/mips/include/asm/cevt-r4k.h
+++ b/arch/mips/include/asm/cevt-r4k.h
@@ -27,23 +27,4 @@ irqreturn_t c0_compare_interrupt(int, void *);
27extern struct irqaction c0_compare_irqaction; 27extern struct irqaction c0_compare_irqaction;
28extern int cp0_timer_irq_installed; 28extern int cp0_timer_irq_installed;
29 29
30/*
31 * Possibly handle a performance counter interrupt.
32 * Return true if the timer interrupt should not be checked
33 */
34
35static inline int handle_perf_irq(int r2)
36{
37 /*
38 * The performance counter overflow interrupt may be shared with the
39 * timer interrupt (cp0_perfcount_irq < 0). If it is and a
40 * performance counter has overflowed (perf_irq() == IRQ_HANDLED)
41 * and we can't reliably determine if a counter interrupt has also
42 * happened (!r2) then don't check for a timer interrupt.
43 */
44 return (cp0_perfcount_irq < 0) &&
45 perf_irq() == IRQ_HANDLED &&
46 !r2;
47}
48
49#endif /* __ASM_CEVT_R4K_H */ 30#endif /* __ASM_CEVT_R4K_H */
diff --git a/arch/mips/include/asm/checksum.h b/arch/mips/include/asm/checksum.h
index 5c585c5c1c3e..3ceacde5eb6e 100644
--- a/arch/mips/include/asm/checksum.h
+++ b/arch/mips/include/asm/checksum.h
@@ -218,6 +218,8 @@ static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
218 __u32 len, unsigned short proto, 218 __u32 len, unsigned short proto,
219 __wsum sum) 219 __wsum sum)
220{ 220{
221 __wsum tmp;
222
221 __asm__( 223 __asm__(
222 " .set push # csum_ipv6_magic\n" 224 " .set push # csum_ipv6_magic\n"
223 " .set noreorder \n" 225 " .set noreorder \n"
@@ -270,9 +272,9 @@ static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
270 272
271 " addu %0, $1 # Add final carry\n" 273 " addu %0, $1 # Add final carry\n"
272 " .set pop" 274 " .set pop"
273 : "=r" (sum), "=r" (proto) 275 : "=&r" (sum), "=&r" (tmp)
274 : "r" (saddr), "r" (daddr), 276 : "r" (saddr), "r" (daddr),
275 "0" (htonl(len)), "1" (htonl(proto)), "r" (sum)); 277 "0" (htonl(len)), "r" (htonl(proto)), "r" (sum));
276 278
277 return csum_fold(sum); 279 return csum_fold(sum);
278} 280}
diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h
index d0a2a68ca600..412f945f1f5e 100644
--- a/arch/mips/include/asm/cmpxchg.h
+++ b/arch/mips/include/asm/cmpxchg.h
@@ -229,21 +229,22 @@ extern void __cmpxchg_called_with_bad_pointer(void);
229#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_mb__before_llsc(), smp_llsc_mb()) 229#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_mb__before_llsc(), smp_llsc_mb())
230#define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new, , ) 230#define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new, , )
231 231
232#define cmpxchg64(ptr, o, n) \ 232#ifdef CONFIG_64BIT
233#define cmpxchg64_local(ptr, o, n) \
233 ({ \ 234 ({ \
234 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ 235 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
235 cmpxchg((ptr), (o), (n)); \ 236 cmpxchg_local((ptr), (o), (n)); \
236 }) 237 })
237 238
238#ifdef CONFIG_64BIT 239#define cmpxchg64(ptr, o, n) \
239#define cmpxchg64_local(ptr, o, n) \
240 ({ \ 240 ({ \
241 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ 241 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
242 cmpxchg_local((ptr), (o), (n)); \ 242 cmpxchg((ptr), (o), (n)); \
243 }) 243 })
244#else 244#else
245#include <asm-generic/cmpxchg-local.h> 245#include <asm-generic/cmpxchg-local.h>
246#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) 246#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
247#define cmpxchg64(ptr, o, n) cmpxchg64_local((ptr), (o), (n))
247#endif 248#endif
248 249
249#endif /* __ASM_CMPXCHG_H */ 250#endif /* __ASM_CMPXCHG_H */
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 0d8208de9a3f..5aeaf19c26b0 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -68,6 +68,7 @@
68#ifndef cpu_has_octeon_cache 68#ifndef cpu_has_octeon_cache
69#define cpu_has_octeon_cache 0 69#define cpu_has_octeon_cache 0
70#endif 70#endif
71/* Don't override `cpu_has_fpu' to 1 or the "nofpu" option won't work. */
71#ifndef cpu_has_fpu 72#ifndef cpu_has_fpu
72#define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU) 73#define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU)
73#define raw_cpu_has_fpu (raw_current_cpu_data.options & MIPS_CPU_FPU) 74#define raw_cpu_has_fpu (raw_current_cpu_data.options & MIPS_CPU_FPU)
@@ -139,6 +140,9 @@
139# endif 140# endif
140#endif 141#endif
141 142
143#ifndef cpu_has_xpa
144#define cpu_has_xpa (cpu_data[0].options & MIPS_CPU_XPA)
145#endif
142#ifndef cpu_has_vtag_icache 146#ifndef cpu_has_vtag_icache
143#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG) 147#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
144#endif 148#endif
@@ -220,8 +224,11 @@
220#define cpu_has_mips_4_5_r (cpu_has_mips_4 | cpu_has_mips_5_r) 224#define cpu_has_mips_4_5_r (cpu_has_mips_4 | cpu_has_mips_5_r)
221#define cpu_has_mips_5_r (cpu_has_mips_5 | cpu_has_mips_r) 225#define cpu_has_mips_5_r (cpu_has_mips_5 | cpu_has_mips_r)
222 226
223#define cpu_has_mips_4_5_r2_r6 (cpu_has_mips_4_5 | cpu_has_mips_r2 | \ 227#define cpu_has_mips_3_4_5_64_r2_r6 \
224 cpu_has_mips_r6) 228 (cpu_has_mips_3 | cpu_has_mips_4_5_64_r2_r6)
229#define cpu_has_mips_4_5_64_r2_r6 \
230 (cpu_has_mips_4_5 | cpu_has_mips64r1 | \
231 cpu_has_mips_r2 | cpu_has_mips_r6)
225 232
226#define cpu_has_mips32 (cpu_has_mips32r1 | cpu_has_mips32r2 | cpu_has_mips32r6) 233#define cpu_has_mips32 (cpu_has_mips32r1 | cpu_has_mips32r2 | cpu_has_mips32r6)
227#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2 | cpu_has_mips64r6) 234#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2 | cpu_has_mips64r6)
@@ -235,8 +242,39 @@
235/* MIPSR2 and MIPSR6 have a lot of similarities */ 242/* MIPSR2 and MIPSR6 have a lot of similarities */
236#define cpu_has_mips_r2_r6 (cpu_has_mips_r2 | cpu_has_mips_r6) 243#define cpu_has_mips_r2_r6 (cpu_has_mips_r2 | cpu_has_mips_r6)
237 244
245/*
246 * cpu_has_mips_r2_exec_hazard - return if IHB is required on current processor
247 *
248 * Returns non-zero value if the current processor implementation requires
249 * an IHB instruction to deal with an instruction hazard as per MIPS R2
250 * architecture specification, zero otherwise.
251 */
238#ifndef cpu_has_mips_r2_exec_hazard 252#ifndef cpu_has_mips_r2_exec_hazard
239#define cpu_has_mips_r2_exec_hazard (cpu_has_mips_r2 | cpu_has_mips_r6) 253#define cpu_has_mips_r2_exec_hazard \
254({ \
255 int __res; \
256 \
257 switch (current_cpu_type()) { \
258 case CPU_M14KC: \
259 case CPU_74K: \
260 case CPU_1074K: \
261 case CPU_PROAPTIV: \
262 case CPU_P5600: \
263 case CPU_M5150: \
264 case CPU_QEMU_GENERIC: \
265 case CPU_CAVIUM_OCTEON: \
266 case CPU_CAVIUM_OCTEON_PLUS: \
267 case CPU_CAVIUM_OCTEON2: \
268 case CPU_CAVIUM_OCTEON3: \
269 __res = 0; \
270 break; \
271 \
272 default: \
273 __res = 1; \
274 } \
275 \
276 __res; \
277})
240#endif 278#endif
241 279
242/* 280/*
@@ -366,4 +404,8 @@
366# define cpu_has_fre (cpu_data[0].options & MIPS_CPU_FRE) 404# define cpu_has_fre (cpu_data[0].options & MIPS_CPU_FRE)
367#endif 405#endif
368 406
407#ifndef cpu_has_cdmm
408# define cpu_has_cdmm (cpu_data[0].options & MIPS_CPU_CDMM)
409#endif
410
369#endif /* __ASM_CPU_FEATURES_H */ 411#endif /* __ASM_CPU_FEATURES_H */
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index c3f4f2d2e108..e7dc785a91ca 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -49,6 +49,8 @@ struct cpuinfo_mips {
49 unsigned int udelay_val; 49 unsigned int udelay_val;
50 unsigned int processor_id; 50 unsigned int processor_id;
51 unsigned int fpu_id; 51 unsigned int fpu_id;
52 unsigned int fpu_csr31;
53 unsigned int fpu_msk31;
52 unsigned int msa_id; 54 unsigned int msa_id;
53 unsigned int cputype; 55 unsigned int cputype;
54 int isa_level; 56 int isa_level;
diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index 8245875f8b33..33f3cab9e689 100644
--- a/arch/mips/include/asm/cpu-type.h
+++ b/arch/mips/include/asm/cpu-type.h
@@ -157,6 +157,7 @@ static inline int __pure __get_cpu_type(const int cpu_type)
157 case CPU_R10000: 157 case CPU_R10000:
158 case CPU_R12000: 158 case CPU_R12000:
159 case CPU_R14000: 159 case CPU_R14000:
160 case CPU_R16000:
160#endif 161#endif
161#ifdef CONFIG_SYS_HAS_CPU_RM7000 162#ifdef CONFIG_SYS_HAS_CPU_RM7000
162 case CPU_RM7000: 163 case CPU_RM7000:
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 15687234d70a..e3adca1d0b99 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -67,7 +67,7 @@
67#define PRID_IMP_R4300 0x0b00 67#define PRID_IMP_R4300 0x0b00
68#define PRID_IMP_VR41XX 0x0c00 68#define PRID_IMP_VR41XX 0x0c00
69#define PRID_IMP_R12000 0x0e00 69#define PRID_IMP_R12000 0x0e00
70#define PRID_IMP_R14000 0x0f00 70#define PRID_IMP_R14000 0x0f00 /* R14K && R16K */
71#define PRID_IMP_R8000 0x1000 71#define PRID_IMP_R8000 0x1000
72#define PRID_IMP_PR4450 0x1200 72#define PRID_IMP_PR4450 0x1200
73#define PRID_IMP_R4600 0x2000 73#define PRID_IMP_R4600 0x2000
@@ -284,8 +284,8 @@ enum cpu_type_enum {
284 CPU_R4000PC, CPU_R4000SC, CPU_R4000MC, CPU_R4200, CPU_R4300, CPU_R4310, 284 CPU_R4000PC, CPU_R4000SC, CPU_R4000MC, CPU_R4200, CPU_R4300, CPU_R4310,
285 CPU_R4400PC, CPU_R4400SC, CPU_R4400MC, CPU_R4600, CPU_R4640, CPU_R4650, 285 CPU_R4400PC, CPU_R4400SC, CPU_R4400MC, CPU_R4600, CPU_R4640, CPU_R4650,
286 CPU_R4700, CPU_R5000, CPU_R5500, CPU_NEVADA, CPU_R5432, CPU_R10000, 286 CPU_R4700, CPU_R5000, CPU_R5500, CPU_NEVADA, CPU_R5432, CPU_R10000,
287 CPU_R12000, CPU_R14000, CPU_VR41XX, CPU_VR4111, CPU_VR4121, CPU_VR4122, 287 CPU_R12000, CPU_R14000, CPU_R16000, CPU_VR41XX, CPU_VR4111, CPU_VR4121,
288 CPU_VR4131, CPU_VR4133, CPU_VR4181, CPU_VR4181A, CPU_RM7000, 288 CPU_VR4122, CPU_VR4131, CPU_VR4133, CPU_VR4181, CPU_VR4181A, CPU_RM7000,
289 CPU_SR71000, CPU_TX49XX, 289 CPU_SR71000, CPU_TX49XX,
290 290
291 /* 291 /*
@@ -377,6 +377,8 @@ enum cpu_type_enum {
377#define MIPS_CPU_MAAR 0x400000000ull /* MAAR(I) registers are present */ 377#define MIPS_CPU_MAAR 0x400000000ull /* MAAR(I) registers are present */
378#define MIPS_CPU_FRE 0x800000000ull /* FRE & UFE bits implemented */ 378#define MIPS_CPU_FRE 0x800000000ull /* FRE & UFE bits implemented */
379#define MIPS_CPU_RW_LLB 0x1000000000ull /* LLADDR/LLB writes are allowed */ 379#define MIPS_CPU_RW_LLB 0x1000000000ull /* LLADDR/LLB writes are allowed */
380#define MIPS_CPU_XPA 0x2000000000ull /* CPU supports Extended Physical Addressing */
381#define MIPS_CPU_CDMM 0x4000000000ull /* CPU has Common Device Memory Map */
380 382
381/* 383/*
382 * CPU ASE encodings 384 * CPU ASE encodings
diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h
index 06412aa9e3fb..fd1b4a150759 100644
--- a/arch/mips/include/asm/dma-mapping.h
+++ b/arch/mips/include/asm/dma-mapping.h
@@ -23,7 +23,7 @@ static inline struct dma_map_ops *get_dma_ops(struct device *dev)
23static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) 23static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
24{ 24{
25 if (!dev->dma_mask) 25 if (!dev->dma_mask)
26 return 0; 26 return false;
27 27
28 return addr + size <= *dev->dma_mask; 28 return addr + size <= *dev->dma_mask;
29} 29}
diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index 31d747d46a23..a594d8ed9698 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -11,6 +11,9 @@
11#include <linux/fs.h> 11#include <linux/fs.h>
12#include <uapi/linux/elf.h> 12#include <uapi/linux/elf.h>
13 13
14#include <asm/cpu-info.h>
15#include <asm/current.h>
16
14/* ELF header e_flags defines. */ 17/* ELF header e_flags defines. */
15/* MIPS architecture level. */ 18/* MIPS architecture level. */
16#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */ 19#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
@@ -294,9 +297,14 @@ do { \
294 if (personality(current->personality) != PER_LINUX) \ 297 if (personality(current->personality) != PER_LINUX) \
295 set_personality(PER_LINUX); \ 298 set_personality(PER_LINUX); \
296 \ 299 \
300 clear_thread_flag(TIF_HYBRID_FPREGS); \
301 set_thread_flag(TIF_32BIT_FPREGS); \
302 \
297 mips_set_personality_fp(state); \ 303 mips_set_personality_fp(state); \
298 \ 304 \
299 current->thread.abi = &mips_abi; \ 305 current->thread.abi = &mips_abi; \
306 \
307 current->thread.fpu.fcr31 = current_cpu_data.fpu_csr31; \
300} while (0) 308} while (0)
301 309
302#endif /* CONFIG_32BIT */ 310#endif /* CONFIG_32BIT */
@@ -319,6 +327,8 @@ do { \
319 do { \ 327 do { \
320 set_thread_flag(TIF_32BIT_REGS); \ 328 set_thread_flag(TIF_32BIT_REGS); \
321 set_thread_flag(TIF_32BIT_ADDR); \ 329 set_thread_flag(TIF_32BIT_ADDR); \
330 clear_thread_flag(TIF_HYBRID_FPREGS); \
331 set_thread_flag(TIF_32BIT_FPREGS); \
322 \ 332 \
323 mips_set_personality_fp(state); \ 333 mips_set_personality_fp(state); \
324 \ 334 \
@@ -356,6 +366,8 @@ do { \
356 else \ 366 else \
357 current->thread.abi = &mips_abi; \ 367 current->thread.abi = &mips_abi; \
358 \ 368 \
369 current->thread.fpu.fcr31 = current_cpu_data.fpu_csr31; \
370 \
359 p = personality(current->personality); \ 371 p = personality(current->personality); \
360 if (p != PER_LINUX32 && p != PER_LINUX) \ 372 if (p != PER_LINUX32 && p != PER_LINUX) \
361 set_personality(PER_LINUX); \ 373 set_personality(PER_LINUX); \
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h
index b104ad9d655f..084780b355aa 100644
--- a/arch/mips/include/asm/fpu.h
+++ b/arch/mips/include/asm/fpu.h
@@ -30,7 +30,7 @@
30struct sigcontext; 30struct sigcontext;
31struct sigcontext32; 31struct sigcontext32;
32 32
33extern void _init_fpu(void); 33extern void _init_fpu(unsigned int);
34extern void _save_fp(struct task_struct *); 34extern void _save_fp(struct task_struct *);
35extern void _restore_fp(struct task_struct *); 35extern void _restore_fp(struct task_struct *);
36 36
@@ -188,6 +188,7 @@ static inline void lose_fpu(int save)
188 188
189static inline int init_fpu(void) 189static inline int init_fpu(void)
190{ 190{
191 unsigned int fcr31 = current->thread.fpu.fcr31;
191 int ret = 0; 192 int ret = 0;
192 193
193 if (cpu_has_fpu) { 194 if (cpu_has_fpu) {
@@ -198,7 +199,7 @@ static inline int init_fpu(void)
198 return ret; 199 return ret;
199 200
200 if (!cpu_has_fre) { 201 if (!cpu_has_fre) {
201 _init_fpu(); 202 _init_fpu(fcr31);
202 203
203 return 0; 204 return 0;
204 } 205 }
@@ -212,7 +213,7 @@ static inline int init_fpu(void)
212 config5 = clear_c0_config5(MIPS_CONF5_FRE); 213 config5 = clear_c0_config5(MIPS_CONF5_FRE);
213 enable_fpu_hazard(); 214 enable_fpu_hazard();
214 215
215 _init_fpu(); 216 _init_fpu(fcr31);
216 217
217 /* Restore FRE */ 218 /* Restore FRE */
218 write_c0_config5(config5); 219 write_c0_config5(config5);
diff --git a/arch/mips/include/asm/fpu_emulator.h b/arch/mips/include/asm/fpu_emulator.h
index 3ee347713307..2f021cdfba4f 100644
--- a/arch/mips/include/asm/fpu_emulator.h
+++ b/arch/mips/include/asm/fpu_emulator.h
@@ -44,6 +44,7 @@ struct mips_fpu_emulator_stats {
44 unsigned long ieee754_overflow; 44 unsigned long ieee754_overflow;
45 unsigned long ieee754_zerodiv; 45 unsigned long ieee754_zerodiv;
46 unsigned long ieee754_invalidop; 46 unsigned long ieee754_invalidop;
47 unsigned long ds_emul;
47}; 48};
48 49
49DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats); 50DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
@@ -65,7 +66,8 @@ extern int do_dsemulret(struct pt_regs *xcp);
65extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, 66extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
66 struct mips_fpu_struct *ctx, int has_fpu, 67 struct mips_fpu_struct *ctx, int has_fpu,
67 void *__user *fault_addr); 68 void *__user *fault_addr);
68int process_fpemu_return(int sig, void __user *fault_addr); 69int process_fpemu_return(int sig, void __user *fault_addr,
70 unsigned long fcr31);
69int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, 71int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
70 unsigned long *contpc); 72 unsigned long *contpc);
71 73
@@ -86,8 +88,6 @@ static inline void fpu_emulator_init_fpu(void)
86 struct task_struct *t = current; 88 struct task_struct *t = current;
87 int i; 89 int i;
88 90
89 t->thread.fpu.fcr31 = 0;
90
91 for (i = 0; i < 32; i++) 91 for (i = 0; i < 32; i++)
92 set_fpr64(&t->thread.fpu.fpr[i], 0, SIGNALLING_NAN); 92 set_fpr64(&t->thread.fpu.fpr[i], 0, SIGNALLING_NAN);
93} 93}
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index 5a4e1bb8fb1b..f0db99f8defe 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -47,6 +47,9 @@ extern void free_irqno(unsigned int irq);
47extern int cp0_compare_irq; 47extern int cp0_compare_irq;
48extern int cp0_compare_irq_shift; 48extern int cp0_compare_irq_shift;
49extern int cp0_perfcount_irq; 49extern int cp0_perfcount_irq;
50extern int cp0_fdc_irq;
51
52extern int __weak get_c0_fdc_int(void);
50 53
51void arch_trigger_all_cpu_backtrace(bool); 54void arch_trigger_all_cpu_backtrace(bool);
52#define arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace 55#define arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace
diff --git a/arch/mips/include/asm/mach-ar7/war.h b/arch/mips/include/asm/mach-ar7/war.h
deleted file mode 100644
index 99071e50faab..000000000000
--- a/arch/mips/include/asm/mach-ar7/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_AR7_WAR_H
9#define __ASM_MIPS_MACH_AR7_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_AR7_WAR_H */
diff --git a/arch/mips/include/asm/mach-ath25/dma-coherence.h b/arch/mips/include/asm/mach-ath25/dma-coherence.h
index d8009c93a465..d5defdde32db 100644
--- a/arch/mips/include/asm/mach-ath25/dma-coherence.h
+++ b/arch/mips/include/asm/mach-ath25/dma-coherence.h
@@ -59,16 +59,6 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
59 return 1; 59 return 1;
60} 60}
61 61
62static inline void plat_extra_sync_for_device(struct device *dev)
63{
64}
65
66static inline int plat_dma_mapping_error(struct device *dev,
67 dma_addr_t dma_addr)
68{
69 return 0;
70}
71
72static inline int plat_device_is_coherent(struct device *dev) 62static inline int plat_device_is_coherent(struct device *dev)
73{ 63{
74#ifdef CONFIG_DMA_COHERENT 64#ifdef CONFIG_DMA_COHERENT
@@ -79,4 +69,8 @@ static inline int plat_device_is_coherent(struct device *dev)
79#endif 69#endif
80} 70}
81 71
72static inline void plat_post_dma_flush(struct device *dev)
73{
74}
75
82#endif /* __ASM_MACH_ATH25_DMA_COHERENCE_H */ 76#endif /* __ASM_MACH_ATH25_DMA_COHERENCE_H */
diff --git a/arch/mips/include/asm/mach-ath25/war.h b/arch/mips/include/asm/mach-ath25/war.h
deleted file mode 100644
index e3a5250ebd67..000000000000
--- a/arch/mips/include/asm/mach-ath25/war.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Felix Fietkau <nbd@openwrt.org>
7 */
8#ifndef __ASM_MACH_ATH25_WAR_H
9#define __ASM_MACH_ATH25_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MACH_ATH25_WAR_H */
diff --git a/arch/mips/include/asm/mach-ath79/war.h b/arch/mips/include/asm/mach-ath79/war.h
deleted file mode 100644
index 0bb30905fd5b..000000000000
--- a/arch/mips/include/asm/mach-ath79/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MACH_ATH79_WAR_H
9#define __ASM_MACH_ATH79_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MACH_ATH79_WAR_H */
diff --git a/arch/mips/include/asm/mach-au1x00/war.h b/arch/mips/include/asm/mach-au1x00/war.h
deleted file mode 100644
index 72e260d24e59..000000000000
--- a/arch/mips/include/asm/mach-au1x00/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_AU1X00_WAR_H
9#define __ASM_MIPS_MACH_AU1X00_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_AU1X00_WAR_H */
diff --git a/arch/mips/include/asm/mach-bcm3384/war.h b/arch/mips/include/asm/mach-bcm3384/war.h
deleted file mode 100644
index 59d7599059b0..000000000000
--- a/arch/mips/include/asm/mach-bcm3384/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_BCM3384_WAR_H
9#define __ASM_MIPS_MACH_BCM3384_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_BCM3384_WAR_H */
diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
index 7527c1d33d02..8ed77f618940 100644
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
@@ -22,6 +22,7 @@
22#include <linux/ssb/ssb.h> 22#include <linux/ssb/ssb.h>
23#include <linux/bcma/bcma.h> 23#include <linux/bcma/bcma.h>
24#include <linux/bcma/bcma_soc.h> 24#include <linux/bcma/bcma_soc.h>
25#include <linux/bcm47xx_nvram.h>
25 26
26enum bcm47xx_bus_type { 27enum bcm47xx_bus_type {
27#ifdef CONFIG_BCM47XX_SSB 28#ifdef CONFIG_BCM47XX_SSB
diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
index 1f5643b89a91..c41d1dce1062 100644
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
@@ -67,6 +67,7 @@ enum bcm47xx_board {
67 BCM47XX_BOARD_LINKSYS_WRT150NV11, 67 BCM47XX_BOARD_LINKSYS_WRT150NV11,
68 BCM47XX_BOARD_LINKSYS_WRT160NV1, 68 BCM47XX_BOARD_LINKSYS_WRT160NV1,
69 BCM47XX_BOARD_LINKSYS_WRT160NV3, 69 BCM47XX_BOARD_LINKSYS_WRT160NV3,
70 BCM47XX_BOARD_LINKSYS_WRT300N_V1,
70 BCM47XX_BOARD_LINKSYS_WRT300NV11, 71 BCM47XX_BOARD_LINKSYS_WRT300NV11,
71 BCM47XX_BOARD_LINKSYS_WRT310NV1, 72 BCM47XX_BOARD_LINKSYS_WRT310NV1,
72 BCM47XX_BOARD_LINKSYS_WRT310NV2, 73 BCM47XX_BOARD_LINKSYS_WRT310NV2,
@@ -74,6 +75,7 @@ enum bcm47xx_board {
74 BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0101, 75 BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0101,
75 BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0467, 76 BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0467,
76 BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0708, 77 BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0708,
78 BCM47XX_BOARD_LINKSYS_WRT600N_V11,
77 BCM47XX_BOARD_LINKSYS_WRT610NV1, 79 BCM47XX_BOARD_LINKSYS_WRT610NV1,
78 BCM47XX_BOARD_LINKSYS_WRT610NV2, 80 BCM47XX_BOARD_LINKSYS_WRT610NV2,
79 BCM47XX_BOARD_LINKSYS_WRTSL54GS, 81 BCM47XX_BOARD_LINKSYS_WRTSL54GS,
@@ -86,9 +88,11 @@ enum bcm47xx_board {
86 88
87 BCM47XX_BOARD_NETGEAR_WGR614V8, 89 BCM47XX_BOARD_NETGEAR_WGR614V8,
88 BCM47XX_BOARD_NETGEAR_WGR614V9, 90 BCM47XX_BOARD_NETGEAR_WGR614V9,
91 BCM47XX_BOARD_NETGEAR_WGR614_V10,
89 BCM47XX_BOARD_NETGEAR_WNDR3300, 92 BCM47XX_BOARD_NETGEAR_WNDR3300,
90 BCM47XX_BOARD_NETGEAR_WNDR3400V1, 93 BCM47XX_BOARD_NETGEAR_WNDR3400V1,
91 BCM47XX_BOARD_NETGEAR_WNDR3400V2, 94 BCM47XX_BOARD_NETGEAR_WNDR3400V2,
95 BCM47XX_BOARD_NETGEAR_WNDR3400_V3,
92 BCM47XX_BOARD_NETGEAR_WNDR3400VCNA, 96 BCM47XX_BOARD_NETGEAR_WNDR3400VCNA,
93 BCM47XX_BOARD_NETGEAR_WNDR3700V3, 97 BCM47XX_BOARD_NETGEAR_WNDR3700V3,
94 BCM47XX_BOARD_NETGEAR_WNDR4000, 98 BCM47XX_BOARD_NETGEAR_WNDR4000,
diff --git a/arch/mips/include/asm/mach-bcm47xx/war.h b/arch/mips/include/asm/mach-bcm47xx/war.h
deleted file mode 100644
index a3d2f448b10e..000000000000
--- a/arch/mips/include/asm/mach-bcm47xx/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_BCM47XX_WAR_H
9#define __ASM_MIPS_MACH_BCM47XX_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_BCM47XX_WAR_H */
diff --git a/arch/mips/include/asm/mach-bcm63xx/dma-coherence.h b/arch/mips/include/asm/mach-bcm63xx/dma-coherence.h
new file mode 100644
index 000000000000..11d3b572b1b3
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/dma-coherence.h
@@ -0,0 +1,10 @@
1#ifndef __ASM_MACH_BCM63XX_DMA_COHERENCE_H
2#define __ASM_MACH_BCM63XX_DMA_COHERENCE_H
3
4#include <asm/bmips.h>
5
6#define plat_post_dma_flush bmips_post_dma_flush
7
8#include <asm/mach-generic/dma-coherence.h>
9
10#endif /* __ASM_MACH_BCM63XX_DMA_COHERENCE_H */
diff --git a/arch/mips/include/asm/mach-bcm63xx/war.h b/arch/mips/include/asm/mach-bcm63xx/war.h
deleted file mode 100644
index 05ee8671bef1..000000000000
--- a/arch/mips/include/asm/mach-bcm63xx/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_BCM63XX_WAR_H
9#define __ASM_MIPS_MACH_BCM63XX_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_BCM63XX_WAR_H */
diff --git a/arch/mips/include/asm/mach-bcm3384/dma-coherence.h b/arch/mips/include/asm/mach-bmips/dma-coherence.h
index a3be8e50e1f0..d29781f02285 100644
--- a/arch/mips/include/asm/mach-bcm3384/dma-coherence.h
+++ b/arch/mips/include/asm/mach-bmips/dma-coherence.h
@@ -12,8 +12,12 @@
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 */ 13 */
14 14
15#ifndef __ASM_MACH_BCM3384_DMA_COHERENCE_H 15#ifndef __ASM_MACH_BMIPS_DMA_COHERENCE_H
16#define __ASM_MACH_BCM3384_DMA_COHERENCE_H 16#define __ASM_MACH_BMIPS_DMA_COHERENCE_H
17
18#include <asm/bmips.h>
19#include <asm/cpu-type.h>
20#include <asm/cpu.h>
17 21
18struct device; 22struct device;
19 23
@@ -45,4 +49,6 @@ static inline int plat_device_is_coherent(struct device *dev)
45 return 0; 49 return 0;
46} 50}
47 51
48#endif /* __ASM_MACH_BCM3384_DMA_COHERENCE_H */ 52#define plat_post_dma_flush bmips_post_dma_flush
53
54#endif /* __ASM_MACH_BMIPS_DMA_COHERENCE_H */
diff --git a/arch/mips/include/asm/mach-bmips/spaces.h b/arch/mips/include/asm/mach-bmips/spaces.h
new file mode 100644
index 000000000000..1b05bddc8ec5
--- /dev/null
+++ b/arch/mips/include/asm/mach-bmips/spaces.h
@@ -0,0 +1,18 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
7 * Copyright (C) 2000, 2002 Maciej W. Rozycki
8 * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
9 */
10#ifndef _ASM_BMIPS_SPACES_H
11#define _ASM_BMIPS_SPACES_H
12
13/* Avoid collisions with system base register (SBR) region on BMIPS3300 */
14#define FIXADDR_TOP ((unsigned long)(long)(int)0xff000000)
15
16#include <asm/mach-generic/spaces.h>
17
18#endif /* __ASM_BMIPS_SPACES_H */
diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
index fa1f3cfbae8d..d68e685cde60 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
@@ -50,7 +50,6 @@
50#define cpu_has_mips32r2 0 50#define cpu_has_mips32r2 0
51#define cpu_has_mips64r1 0 51#define cpu_has_mips64r1 0
52#define cpu_has_mips64r2 1 52#define cpu_has_mips64r2 1
53#define cpu_has_mips_r2_exec_hazard 0
54#define cpu_has_dsp 0 53#define cpu_has_dsp 0
55#define cpu_has_dsp2 0 54#define cpu_has_dsp2 0
56#define cpu_has_mipsmt 0 55#define cpu_has_mipsmt 0
diff --git a/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h b/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
index f9f448650505..460042ee5d6f 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
@@ -57,6 +57,10 @@ static inline int plat_device_is_coherent(struct device *dev)
57 return 1; 57 return 1;
58} 58}
59 59
60static inline void plat_post_dma_flush(struct device *dev)
61{
62}
63
60dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr); 64dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
61phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr); 65phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);
62 66
diff --git a/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h b/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h
new file mode 100644
index 000000000000..374eefafb320
--- /dev/null
+++ b/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h
@@ -0,0 +1,74 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003, 2004 Ralf Baechle
7 */
8#ifndef __ASM_MACH_GENERIC_MANGLE_PORT_H
9#define __ASM_MACH_GENERIC_MANGLE_PORT_H
10
11#include <asm/byteorder.h>
12
13#ifdef __BIG_ENDIAN
14
15# define __swizzle_addr_b(port) (port)
16# define __swizzle_addr_w(port) (port)
17# define __swizzle_addr_l(port) (port)
18# define __swizzle_addr_q(port) (port)
19
20#else /* __LITTLE_ENDIAN */
21
22static inline bool __should_swizzle_addr(unsigned long p)
23{
24 /* boot bus? */
25 return ((p >> 40) & 0xff) == 0;
26}
27
28# define __swizzle_addr_b(port) \
29 (__should_swizzle_addr(port) ? (port) ^ 7 : (port))
30# define __swizzle_addr_w(port) \
31 (__should_swizzle_addr(port) ? (port) ^ 6 : (port))
32# define __swizzle_addr_l(port) \
33 (__should_swizzle_addr(port) ? (port) ^ 4 : (port))
34# define __swizzle_addr_q(port) (port)
35
36#endif /* __BIG_ENDIAN */
37
38/*
39 * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware;
40 * less sane hardware forces software to fiddle with this...
41 *
42 * Regardless, if the host bus endianness mismatches that of PCI/ISA, then
43 * you can't have the numerical value of data and byte addresses within
44 * multibyte quantities both preserved at the same time. Hence two
45 * variations of functions: non-prefixed ones that preserve the value
46 * and prefixed ones that preserve byte addresses. The latters are
47 * typically used for moving raw data between a peripheral and memory (cf.
48 * string I/O functions), hence the "__mem_" prefix.
49 */
50#if defined(CONFIG_SWAP_IO_SPACE)
51
52# define ioswabb(a, x) (x)
53# define __mem_ioswabb(a, x) (x)
54# define ioswabw(a, x) le16_to_cpu(x)
55# define __mem_ioswabw(a, x) (x)
56# define ioswabl(a, x) le32_to_cpu(x)
57# define __mem_ioswabl(a, x) (x)
58# define ioswabq(a, x) le64_to_cpu(x)
59# define __mem_ioswabq(a, x) (x)
60
61#else
62
63# define ioswabb(a, x) (x)
64# define __mem_ioswabb(a, x) (x)
65# define ioswabw(a, x) (x)
66# define __mem_ioswabw(a, x) cpu_to_le16(x)
67# define ioswabl(a, x) (x)
68# define __mem_ioswabl(a, x) cpu_to_le32(x)
69# define ioswabq(a, x) (x)
70# define __mem_ioswabq(a, x) cpu_to_le32(x)
71
72#endif
73
74#endif /* __ASM_MACH_GENERIC_MANGLE_PORT_H */
diff --git a/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
index 71d4bface1dc..30c5cd9fd973 100644
--- a/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
@@ -14,7 +14,6 @@
14#define cpu_has_3k_cache 0 14#define cpu_has_3k_cache 0
15#define cpu_has_4k_cache 1 15#define cpu_has_4k_cache 1
16#define cpu_has_tx39_cache 0 16#define cpu_has_tx39_cache 0
17#define cpu_has_fpu 1
18#define cpu_has_32fpr 1 17#define cpu_has_32fpr 1
19#define cpu_has_counter 1 18#define cpu_has_counter 1
20#define cpu_has_watch 0 19#define cpu_has_watch 0
diff --git a/arch/mips/include/asm/mach-cobalt/war.h b/arch/mips/include/asm/mach-cobalt/war.h
deleted file mode 100644
index 34ae4046541e..000000000000
--- a/arch/mips/include/asm/mach-cobalt/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_COBALT_WAR_H
9#define __ASM_MIPS_MACH_COBALT_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_COBALT_WAR_H */
diff --git a/arch/mips/include/asm/mach-dec/cpu-feature-overrides.h b/arch/mips/include/asm/mach-dec/cpu-feature-overrides.h
index acce27fd2bb8..bdf045fb00c8 100644
--- a/arch/mips/include/asm/mach-dec/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-dec/cpu-feature-overrides.h
@@ -15,7 +15,6 @@
15/* Generic ones first. */ 15/* Generic ones first. */
16#define cpu_has_tlb 1 16#define cpu_has_tlb 1
17#define cpu_has_tx39_cache 0 17#define cpu_has_tx39_cache 0
18#define cpu_has_fpu 1
19#define cpu_has_divec 0 18#define cpu_has_divec 0
20#define cpu_has_prefetch 0 19#define cpu_has_prefetch 0
21#define cpu_has_mcheck 0 20#define cpu_has_mcheck 0
diff --git a/arch/mips/include/asm/mach-dec/war.h b/arch/mips/include/asm/mach-dec/war.h
deleted file mode 100644
index d29996feb3e7..000000000000
--- a/arch/mips/include/asm/mach-dec/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_DEC_WAR_H
9#define __ASM_MIPS_MACH_DEC_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_DEC_WAR_H */
diff --git a/arch/mips/include/asm/mach-emma2rh/war.h b/arch/mips/include/asm/mach-emma2rh/war.h
deleted file mode 100644
index 79ae82da3ec7..000000000000
--- a/arch/mips/include/asm/mach-emma2rh/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_EMMA2RH_WAR_H
9#define __ASM_MIPS_MACH_EMMA2RH_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_EMMA2RH_WAR_H */
diff --git a/arch/mips/include/asm/mach-generic/dma-coherence.h b/arch/mips/include/asm/mach-generic/dma-coherence.h
index 7629c35986f7..0f8a354fd468 100644
--- a/arch/mips/include/asm/mach-generic/dma-coherence.h
+++ b/arch/mips/include/asm/mach-generic/dma-coherence.h
@@ -52,6 +52,12 @@ static inline int plat_device_is_coherent(struct device *dev)
52 return coherentio; 52 return coherentio;
53} 53}
54 54
55#ifndef plat_post_dma_flush
56static inline void plat_post_dma_flush(struct device *dev)
57{
58}
59#endif
60
55#ifdef CONFIG_SWIOTLB 61#ifdef CONFIG_SWIOTLB
56static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) 62static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
57{ 63{
diff --git a/arch/mips/include/asm/mach-ralink/war.h b/arch/mips/include/asm/mach-generic/war.h
index c074b5dc1f82..a1bc2e71f983 100644
--- a/arch/mips/include/asm/mach-ralink/war.h
+++ b/arch/mips/include/asm/mach-generic/war.h
@@ -5,8 +5,8 @@
5 * 5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> 6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */ 7 */
8#ifndef __ASM_MACH_RALINK_WAR_H 8#ifndef __ASM_MACH_GENERIC_WAR_H
9#define __ASM_MACH_RALINK_WAR_H 9#define __ASM_MACH_GENERIC_WAR_H
10 10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0 11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0 12#define R4600_V1_HIT_CACHEOP_WAR 0
@@ -21,4 +21,4 @@
21#define R10000_LLSC_WAR 0 21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0 22#define MIPS34K_MISSED_ITLB_WAR 0
23 23
24#endif /* __ASM_MACH_RALINK_WAR_H */ 24#endif /* __ASM_MACH_GENERIC_WAR_H */
diff --git a/arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h
index 1dfe47453ea4..9b19b72dba56 100644
--- a/arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h
@@ -16,7 +16,6 @@
16#define cpu_has_tlb 1 16#define cpu_has_tlb 1
17#define cpu_has_4kex 1 17#define cpu_has_4kex 1
18#define cpu_has_4k_cache 1 18#define cpu_has_4k_cache 1
19#define cpu_has_fpu 1
20#define cpu_has_32fpr 1 19#define cpu_has_32fpr 1
21#define cpu_has_counter 1 20#define cpu_has_counter 1
22#define cpu_has_mips16 0 21#define cpu_has_mips16 0
diff --git a/arch/mips/include/asm/mach-ip27/dma-coherence.h b/arch/mips/include/asm/mach-ip27/dma-coherence.h
index 4ffddfdb5062..1daa64412569 100644
--- a/arch/mips/include/asm/mach-ip27/dma-coherence.h
+++ b/arch/mips/include/asm/mach-ip27/dma-coherence.h
@@ -58,6 +58,10 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
58 return 1; 58 return 1;
59} 59}
60 60
61static inline void plat_post_dma_flush(struct device *dev)
62{
63}
64
61static inline int plat_device_is_coherent(struct device *dev) 65static inline int plat_device_is_coherent(struct device *dev)
62{ 66{
63 return 1; /* IP27 non-cohernet mode is unsupported */ 67 return 1; /* IP27 non-cohernet mode is unsupported */
diff --git a/arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h
index 2e1ec6cfedd5..241409b78ff1 100644
--- a/arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h
@@ -26,7 +26,6 @@
26/* Settings which are common for all ip32 CPUs */ 26/* Settings which are common for all ip32 CPUs */
27#define cpu_has_tlb 1 27#define cpu_has_tlb 1
28#define cpu_has_4kex 1 28#define cpu_has_4kex 1
29#define cpu_has_fpu 1
30#define cpu_has_32fpr 1 29#define cpu_has_32fpr 1
31#define cpu_has_counter 1 30#define cpu_has_counter 1
32#define cpu_has_mips16 0 31#define cpu_has_mips16 0
diff --git a/arch/mips/include/asm/mach-ip32/dma-coherence.h b/arch/mips/include/asm/mach-ip32/dma-coherence.h
index 104cfbc3ed63..0a0b0e2ced60 100644
--- a/arch/mips/include/asm/mach-ip32/dma-coherence.h
+++ b/arch/mips/include/asm/mach-ip32/dma-coherence.h
@@ -80,6 +80,10 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
80 return 1; 80 return 1;
81} 81}
82 82
83static inline void plat_post_dma_flush(struct device *dev)
84{
85}
86
83static inline int plat_device_is_coherent(struct device *dev) 87static inline int plat_device_is_coherent(struct device *dev)
84{ 88{
85 return 0; /* IP32 is non-cohernet */ 89 return 0; /* IP32 is non-cohernet */
diff --git a/arch/mips/include/asm/mach-ip32/mc146818rtc.h b/arch/mips/include/asm/mach-ip32/mc146818rtc.h
deleted file mode 100644
index 6b6bab43d5c1..000000000000
--- a/arch/mips/include/asm/mach-ip32/mc146818rtc.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1998, 2001, 03 by Ralf Baechle
7 * Copyright (C) 2000 Harald Koerfgen
8 *
9 * RTC routines for IP32 style attached Dallas chip.
10 */
11#ifndef __ASM_MACH_IP32_MC146818RTC_H
12#define __ASM_MACH_IP32_MC146818RTC_H
13
14#include <asm/ip32/mace.h>
15
16#define RTC_PORT(x) (0x70 + (x))
17
18static unsigned char CMOS_READ(unsigned long addr)
19{
20 return mace->isa.rtc[addr << 8];
21}
22
23static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
24{
25 mace->isa.rtc[addr << 8] = data;
26}
27
28/*
29 * FIXME: Do it right. For now just assume that no one lives in 20th century
30 * and no O2 user in 22th century ;-)
31 */
32#define mc146818_decode_year(year) ((year) + 2000)
33
34#define RTC_ALWAYS_BCD 0
35
36#endif /* __ASM_MACH_IP32_MC146818RTC_H */
diff --git a/arch/mips/include/asm/mach-jazz/dma-coherence.h b/arch/mips/include/asm/mach-jazz/dma-coherence.h
index 949003ef97b3..dc347c25c343 100644
--- a/arch/mips/include/asm/mach-jazz/dma-coherence.h
+++ b/arch/mips/include/asm/mach-jazz/dma-coherence.h
@@ -48,6 +48,10 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
48 return 1; 48 return 1;
49} 49}
50 50
51static inline void plat_post_dma_flush(struct device *dev)
52{
53}
54
51static inline int plat_device_is_coherent(struct device *dev) 55static inline int plat_device_is_coherent(struct device *dev)
52{ 56{
53 return 0; 57 return 0;
diff --git a/arch/mips/include/asm/mach-jazz/war.h b/arch/mips/include/asm/mach-jazz/war.h
deleted file mode 100644
index 5b18b9a3d0ec..000000000000
--- a/arch/mips/include/asm/mach-jazz/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_JAZZ_WAR_H
9#define __ASM_MIPS_MACH_JAZZ_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_JAZZ_WAR_H */
diff --git a/arch/mips/include/asm/mach-jz4740/war.h b/arch/mips/include/asm/mach-jz4740/war.h
deleted file mode 100644
index 9b511d323838..000000000000
--- a/arch/mips/include/asm/mach-jz4740/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_JZ4740_WAR_H
9#define __ASM_MIPS_MACH_JZ4740_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_JZ4740_WAR_H */
diff --git a/arch/mips/include/asm/mach-lantiq/war.h b/arch/mips/include/asm/mach-lantiq/war.h
deleted file mode 100644
index 358ca979c1bd..000000000000
--- a/arch/mips/include/asm/mach-lantiq/war.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 */
7#ifndef __ASM_MIPS_MACH_LANTIQ_WAR_H
8#define __ASM_MIPS_MACH_LANTIQ_WAR_H
9
10#define R4600_V1_INDEX_ICACHEOP_WAR 0
11#define R4600_V1_HIT_CACHEOP_WAR 0
12#define R4600_V2_HIT_CACHEOP_WAR 0
13#define R5432_CP0_INTERRUPT_WAR 0
14#define BCM1250_M3_WAR 0
15#define SIBYTE_1956_WAR 0
16#define MIPS4K_ICACHE_REFILL_WAR 0
17#define MIPS_CACHE_SYNC_WAR 0
18#define TX49XX_ICACHE_INDEX_INV_WAR 0
19#define ICACHE_REFILLS_WORKAROUND_WAR 0
20#define R10000_LLSC_WAR 0
21#define MIPS34K_MISSED_ITLB_WAR 0
22
23#endif
diff --git a/arch/mips/include/asm/mach-lasat/war.h b/arch/mips/include/asm/mach-lasat/war.h
deleted file mode 100644
index 741ae724adc6..000000000000
--- a/arch/mips/include/asm/mach-lasat/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_LASAT_WAR_H
9#define __ASM_MIPS_MACH_LASAT_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_LASAT_WAR_H */
diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
index 6d69332f21ec..acc376897e46 100644
--- a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
@@ -34,7 +34,6 @@
34#define cpu_has_dsp 0 34#define cpu_has_dsp 0
35#define cpu_has_dsp2 0 35#define cpu_has_dsp2 0
36#define cpu_has_ejtag 0 36#define cpu_has_ejtag 0
37#define cpu_has_fpu 1
38#define cpu_has_ic_fills_f_dc 0 37#define cpu_has_ic_fills_f_dc 0
39#define cpu_has_inclusive_pcaches 1 38#define cpu_has_inclusive_pcaches 1
40#define cpu_has_llsc 1 39#define cpu_has_llsc 1
diff --git a/arch/mips/include/asm/mach-loongson/dma-coherence.h b/arch/mips/include/asm/mach-loongson/dma-coherence.h
index a90534161bd2..4bf4e19f72e8 100644
--- a/arch/mips/include/asm/mach-loongson/dma-coherence.h
+++ b/arch/mips/include/asm/mach-loongson/dma-coherence.h
@@ -78,4 +78,8 @@ static inline int plat_device_is_coherent(struct device *dev)
78#endif /* CONFIG_DMA_NONCOHERENT */ 78#endif /* CONFIG_DMA_NONCOHERENT */
79} 79}
80 80
81static inline void plat_post_dma_flush(struct device *dev)
82{
83}
84
81#endif /* __ASM_MACH_LOONGSON_DMA_COHERENCE_H */ 85#endif /* __ASM_MACH_LOONGSON_DMA_COHERENCE_H */
diff --git a/arch/mips/include/asm/mach-loongson/loongson.h b/arch/mips/include/asm/mach-loongson/loongson.h
index 5459ac09679f..9783103fd6f6 100644
--- a/arch/mips/include/asm/mach-loongson/loongson.h
+++ b/arch/mips/include/asm/mach-loongson/loongson.h
@@ -255,6 +255,10 @@ static inline void do_perfcnt_IRQ(void)
255extern u64 loongson_chipcfg[MAX_PACKAGES]; 255extern u64 loongson_chipcfg[MAX_PACKAGES];
256#define LOONGSON_CHIPCFG(id) (*(volatile u32 *)(loongson_chipcfg[id])) 256#define LOONGSON_CHIPCFG(id) (*(volatile u32 *)(loongson_chipcfg[id]))
257 257
258/* Chip Temperature registor of each physical cpu package, PRid >= Loongson-3A */
259extern u64 loongson_chiptemp[MAX_PACKAGES];
260#define LOONGSON_CHIPTEMP(id) (*(volatile u32 *)(loongson_chiptemp[id]))
261
258/* Freq Control register of each physical cpu package, PRid >= Loongson-3B */ 262/* Freq Control register of each physical cpu package, PRid >= Loongson-3B */
259extern u64 loongson_freqctrl[MAX_PACKAGES]; 263extern u64 loongson_freqctrl[MAX_PACKAGES];
260#define LOONGSON_FREQCTRL(id) (*(volatile u32 *)(loongson_freqctrl[id])) 264#define LOONGSON_FREQCTRL(id) (*(volatile u32 *)(loongson_freqctrl[id]))
diff --git a/arch/mips/include/asm/mach-loongson/war.h b/arch/mips/include/asm/mach-loongson/war.h
deleted file mode 100644
index f2570df66bb5..000000000000
--- a/arch/mips/include/asm/mach-loongson/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MACH_LOONGSON_WAR_H
9#define __ASM_MACH_LOONGSON_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MACH_LEMOTE_WAR_H */
diff --git a/arch/mips/include/asm/mach-loongson1/war.h b/arch/mips/include/asm/mach-loongson1/war.h
deleted file mode 100644
index 8fb50d008131..000000000000
--- a/arch/mips/include/asm/mach-loongson1/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MACH_LOONGSON1_WAR_H
9#define __ASM_MACH_LOONGSON1_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MACH_LOONGSON1_WAR_H */
diff --git a/arch/mips/include/asm/mach-netlogic/multi-node.h b/arch/mips/include/asm/mach-netlogic/multi-node.h
index 9ed8dacdc37c..8bdf47e29145 100644
--- a/arch/mips/include/asm/mach-netlogic/multi-node.h
+++ b/arch/mips/include/asm/mach-netlogic/multi-node.h
@@ -48,15 +48,6 @@
48#endif 48#endif
49 49
50#define NLM_THREADS_PER_CORE 4 50#define NLM_THREADS_PER_CORE 4
51#ifdef CONFIG_CPU_XLR
52#define nlm_cores_per_node() 8
53#else
54extern unsigned int xlp_cores_per_node;
55#define nlm_cores_per_node() xlp_cores_per_node
56#endif
57
58#define nlm_threads_per_node() (nlm_cores_per_node() * NLM_THREADS_PER_CORE)
59#define nlm_cpuid_to_node(c) ((c) / nlm_threads_per_node())
60 51
61struct nlm_soc_info { 52struct nlm_soc_info {
62 unsigned long coremask; /* cores enabled on the soc */ 53 unsigned long coremask; /* cores enabled on the soc */
diff --git a/arch/mips/include/asm/mach-netlogic/topology.h b/arch/mips/include/asm/mach-netlogic/topology.h
deleted file mode 100644
index 0eb43c832b25..000000000000
--- a/arch/mips/include/asm/mach-netlogic/topology.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2013 Broadcom Corporation
7 */
8#ifndef _ASM_MACH_NETLOGIC_TOPOLOGY_H
9#define _ASM_MACH_NETLOGIC_TOPOLOGY_H
10
11#include <asm/mach-netlogic/multi-node.h>
12
13#include <asm-generic/topology.h>
14
15#endif /* _ASM_MACH_NETLOGIC_TOPOLOGY_H */
diff --git a/arch/mips/include/asm/mach-netlogic/war.h b/arch/mips/include/asm/mach-netlogic/war.h
deleted file mode 100644
index 2c7216840e18..000000000000
--- a/arch/mips/include/asm/mach-netlogic/war.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2011 Netlogic Microsystems.
7 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
8 */
9#ifndef __ASM_MIPS_MACH_NLM_WAR_H
10#define __ASM_MIPS_MACH_NLM_WAR_H
11
12#define R4600_V1_INDEX_ICACHEOP_WAR 0
13#define R4600_V1_HIT_CACHEOP_WAR 0
14#define R4600_V2_HIT_CACHEOP_WAR 0
15#define R5432_CP0_INTERRUPT_WAR 0
16#define BCM1250_M3_WAR 0
17#define SIBYTE_1956_WAR 0
18#define MIPS4K_ICACHE_REFILL_WAR 0
19#define MIPS_CACHE_SYNC_WAR 0
20#define TX49XX_ICACHE_INDEX_INV_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_NLM_WAR_H */
diff --git a/arch/mips/include/asm/mach-paravirt/war.h b/arch/mips/include/asm/mach-paravirt/war.h
deleted file mode 100644
index 36d3afb98451..000000000000
--- a/arch/mips/include/asm/mach-paravirt/war.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 * Copyright (C) 2013 Cavium Networks <support@caviumnetworks.com>
8 */
9#ifndef __ASM_MIPS_MACH_PARAVIRT_WAR_H
10#define __ASM_MIPS_MACH_PARAVIRT_WAR_H
11
12#define R4600_V1_INDEX_ICACHEOP_WAR 0
13#define R4600_V1_HIT_CACHEOP_WAR 0
14#define R4600_V2_HIT_CACHEOP_WAR 0
15#define R5432_CP0_INTERRUPT_WAR 0
16#define BCM1250_M3_WAR 0
17#define SIBYTE_1956_WAR 0
18#define MIPS4K_ICACHE_REFILL_WAR 0
19#define MIPS_CACHE_SYNC_WAR 0
20#define TX49XX_ICACHE_INDEX_INV_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_PARAVIRT_WAR_H */
diff --git a/arch/mips/include/asm/mach-pistachio/gpio.h b/arch/mips/include/asm/mach-pistachio/gpio.h
new file mode 100644
index 000000000000..6c1649c27b8d
--- /dev/null
+++ b/arch/mips/include/asm/mach-pistachio/gpio.h
@@ -0,0 +1,21 @@
1/*
2 * Pistachio IRQ setup
3 *
4 * Copyright (C) 2014 Google, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_PISTACHIO_GPIO_H
12#define __ASM_MACH_PISTACHIO_GPIO_H
13
14#include <asm-generic/gpio.h>
15
16#define gpio_get_value __gpio_get_value
17#define gpio_set_value __gpio_set_value
18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq
20
21#endif /* __ASM_MACH_PISTACHIO_GPIO_H */
diff --git a/arch/mips/include/asm/mach-pistachio/irq.h b/arch/mips/include/asm/mach-pistachio/irq.h
new file mode 100644
index 000000000000..b94a09a54221
--- /dev/null
+++ b/arch/mips/include/asm/mach-pistachio/irq.h
@@ -0,0 +1,18 @@
1/*
2 * Pistachio IRQ setup
3 *
4 * Copyright (C) 2014 Google, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_PISTACHIO_IRQ_H
12#define __ASM_MACH_PISTACHIO_IRQ_H
13
14#define NR_IRQS 256
15
16#include_next <irq.h>
17
18#endif /* __ASM_MACH_PISTACHIO_IRQ_H */
diff --git a/arch/mips/include/asm/mach-pnx833x/war.h b/arch/mips/include/asm/mach-pnx833x/war.h
deleted file mode 100644
index e410df4e1b3a..000000000000
--- a/arch/mips/include/asm/mach-pnx833x/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_PNX833X_WAR_H
9#define __ASM_MIPS_MACH_PNX833X_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_PNX833X_WAR_H */
diff --git a/arch/mips/include/asm/mach-rm/cpu-feature-overrides.h b/arch/mips/include/asm/mach-rm/cpu-feature-overrides.h
index f095c529c48c..98cf40417c5d 100644
--- a/arch/mips/include/asm/mach-rm/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-rm/cpu-feature-overrides.h
@@ -15,7 +15,6 @@
15#define cpu_has_tlb 1 15#define cpu_has_tlb 1
16#define cpu_has_4kex 1 16#define cpu_has_4kex 1
17#define cpu_has_4k_cache 1 17#define cpu_has_4k_cache 1
18#define cpu_has_fpu 1
19#define cpu_has_32fpr 1 18#define cpu_has_32fpr 1
20#define cpu_has_counter 1 19#define cpu_has_counter 1
21#define cpu_has_watch 0 20#define cpu_has_watch 0
diff --git a/arch/mips/include/asm/mach-tx39xx/war.h b/arch/mips/include/asm/mach-tx39xx/war.h
deleted file mode 100644
index 6a52e6534776..000000000000
--- a/arch/mips/include/asm/mach-tx39xx/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_TX39XX_WAR_H
9#define __ASM_MIPS_MACH_TX39XX_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_TX39XX_WAR_H */
diff --git a/arch/mips/include/asm/mach-vr41xx/war.h b/arch/mips/include/asm/mach-vr41xx/war.h
deleted file mode 100644
index ffe31e736009..000000000000
--- a/arch/mips/include/asm/mach-vr41xx/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_VR41XX_WAR_H
9#define __ASM_MIPS_MACH_VR41XX_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define ICACHE_REFILLS_WORKAROUND_WAR 0
21#define R10000_LLSC_WAR 0
22#define MIPS34K_MISSED_ITLB_WAR 0
23
24#endif /* __ASM_MIPS_MACH_VR41XX_WAR_H */
diff --git a/arch/mips/include/asm/mips-boards/sead3-addr.h b/arch/mips/include/asm/mips-boards/sead3-addr.h
new file mode 100644
index 000000000000..c0db57802f7c
--- /dev/null
+++ b/arch/mips/include/asm/mips-boards/sead3-addr.h
@@ -0,0 +1,83 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2015 Imagination Technologies, Inc.
7 * written by Ralf Baechle <ralf@linux-mips.org>
8 */
9#ifndef __ASM_MIPS_BOARDS_SEAD3_ADDR_H
10#define __ASM_MIPS_BOARDS_SEAD3_ADDR_H
11
12/*
13 * Target #0 Register Decode
14 */
15#define SEAD3_SD_SPDCNF 0xbb000040
16#define SEAD3_SD_SPADDR 0xbb000048
17#define SEAD3_SD_DATA 0xbb000050
18
19/*
20 * Target #1 Register Decode
21 */
22#define SEAD3_CFG 0xbb100110
23#define SEAD3_GIC_BASE_ADDRESS 0xbb1c0000
24#define SEAD3_SHARED_SECTION 0xbb1c0000
25#define SEAD3_VPE_LOCAL_SECTION 0xbb1c8000
26#define SEAD3_VPE_OTHER_SECTION 0xbb1cc000
27#define SEAD3_USER_MODE_VISIBLE_SECTION 0xbb1d0000
28
29/*
30 * Target #3 Register Decode
31 */
32#define SEAD3_USB_HS_BASE 0xbb200000
33#define SEAD3_USB_HS_IDENTIFICATION_REGS 0xbb200000
34#define SEAD3_USB_HS_CAPABILITY_REGS 0xbb200100
35#define SEAD3_USB_HS_OPERATIONAL_REGS 0xbb200140
36#define SEAD3_RESERVED 0xbe800000
37
38/*
39 * Target #3 Register Decode
40 */
41#define SEAD3_SRAM 0xbe000000
42#define SEAD3_OPTIONAL_SRAM 0xbe400000
43#define SEAD3_FPGA 0xbf000000
44
45#define SEAD3_PI_PIC32_USB_STATUS 0xbf000060
46#define SEAD3_PI_PIC32_USB_STATUS_IO_RDY (1 << 0)
47#define SEAD3_PI_PIC32_USB_STATUS_SPL_INT (1 << 1)
48#define SEAD3_PI_PIC32_USB_STATUS_GPIOA_INT (1 << 2)
49#define SEAD3_PI_PIC32_USB_STATUS_GPIOB_INT (1 << 3)
50
51#define SEAD3_PI_SOFT_ENDIAN 0xbf000070
52
53#define SEAD3_CPLD_P_SWITCH 0xbf000200
54#define SEAD3_CPLD_F_SWITCH 0xbf000208
55#define SEAD3_CPLD_P_LED 0xbf000210
56#define SEAD3_CPLD_F_LED 0xbf000218
57#define SEAD3_NEWSC_LIVE 0xbf000220
58#define SEAD3_NEWSC_REG 0xbf000228
59#define SEAD3_NEWSC_CTRL 0xbf000230
60
61#define SEAD3_LCD_CONTROL 0xbf000400
62#define SEAD3_LCD_DATA 0xbf000408
63#define SEAD3_CPLD_LCD_STATUS 0xbf000410
64#define SEAD3_CPLD_LCD_DATA 0xbf000418
65
66#define SEAD3_CPLD_PI_DEVRST 0xbf000480
67#define SEAD3_CPLD_PI_DEVRST_IC32_RST (1 << 0)
68#define SEAD3_RESERVED_0 0xbf000500
69
70#define SEAD3_PIC32_REGISTERS 0xbf000600
71#define SEAD3_RESERVED_1 0xbf000700
72#define SEAD3_UART_CH_0 0xbf000800
73#define SEAD3_UART_CH_1 0xbf000900
74#define SEAD3_RESERVED_2 0xbf000a00
75#define SEAD3_ETHERNET 0xbf010000
76#define SEAD3_RESERVED_3 0xbf020000
77#define SEAD3_USER_EXPANSION 0xbf400000
78#define SEAD3_RESERVED_4 0xbf800000
79#define SEAD3_BOOT_FLASH_EXTENSION 0xbfa00000
80#define SEAD3_BOOT_FLASH 0xbfc00000
81#define SEAD3_REVISION_REGISTER 0xbfc00010
82
83#endif /* __ASM_MIPS_BOARDS_SEAD3_ADDR_H */
diff --git a/arch/mips/include/asm/mips-r2-to-r6-emul.h b/arch/mips/include/asm/mips-r2-to-r6-emul.h
index 60570f2c3ba2..4b89f28047f7 100644
--- a/arch/mips/include/asm/mips-r2-to-r6-emul.h
+++ b/arch/mips/include/asm/mips-r2-to-r6-emul.h
@@ -84,11 +84,16 @@ extern void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
84 84
85#ifndef CONFIG_MIPSR2_TO_R6_EMULATOR 85#ifndef CONFIG_MIPSR2_TO_R6_EMULATOR
86static int mipsr2_emulation; 86static int mipsr2_emulation;
87static __maybe_unused int mipsr2_decoder(struct pt_regs *regs, u32 inst) { return 0; }; 87static inline int mipsr2_decoder(struct pt_regs *regs, u32 inst,
88 unsigned long *fcr31)
89{
90 return 0;
91};
88#else 92#else
89/* MIPS R2 Emulator ON/OFF */ 93/* MIPS R2 Emulator ON/OFF */
90extern int mipsr2_emulation; 94extern int mipsr2_emulation;
91extern int mipsr2_decoder(struct pt_regs *regs, u32 inst); 95extern int mipsr2_decoder(struct pt_regs *regs, u32 inst,
96 unsigned long *fcr31);
92#endif /* CONFIG_MIPSR2_TO_R6_EMULATOR */ 97#endif /* CONFIG_MIPSR2_TO_R6_EMULATOR */
93 98
94#define NO_R6EMU (cpu_has_mips_r6 && !mipsr2_emulation) 99#define NO_R6EMU (cpu_has_mips_r6 && !mipsr2_emulation)
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index fef004434096..764e2756b54d 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -111,70 +111,6 @@
111 */ 111 */
112#define CP0_TX39_CACHE $7 112#define CP0_TX39_CACHE $7
113 113
114/*
115 * Coprocessor 1 (FPU) register names
116 */
117#define CP1_REVISION $0
118#define CP1_STATUS $31
119
120/*
121 * FPU Status Register Values
122 */
123/*
124 * Status Register Values
125 */
126
127#define FPU_CSR_FLUSH 0x01000000 /* flush denormalised results to 0 */
128#define FPU_CSR_COND 0x00800000 /* $fcc0 */
129#define FPU_CSR_COND0 0x00800000 /* $fcc0 */
130#define FPU_CSR_COND1 0x02000000 /* $fcc1 */
131#define FPU_CSR_COND2 0x04000000 /* $fcc2 */
132#define FPU_CSR_COND3 0x08000000 /* $fcc3 */
133#define FPU_CSR_COND4 0x10000000 /* $fcc4 */
134#define FPU_CSR_COND5 0x20000000 /* $fcc5 */
135#define FPU_CSR_COND6 0x40000000 /* $fcc6 */
136#define FPU_CSR_COND7 0x80000000 /* $fcc7 */
137
138/*
139 * Bits 18 - 20 of the FPU Status Register will be read as 0,
140 * and should be written as zero.
141 */
142#define FPU_CSR_RSVD 0x001c0000
143
144/*
145 * X the exception cause indicator
146 * E the exception enable
147 * S the sticky/flag bit
148*/
149#define FPU_CSR_ALL_X 0x0003f000
150#define FPU_CSR_UNI_X 0x00020000
151#define FPU_CSR_INV_X 0x00010000
152#define FPU_CSR_DIV_X 0x00008000
153#define FPU_CSR_OVF_X 0x00004000
154#define FPU_CSR_UDF_X 0x00002000
155#define FPU_CSR_INE_X 0x00001000
156
157#define FPU_CSR_ALL_E 0x00000f80
158#define FPU_CSR_INV_E 0x00000800
159#define FPU_CSR_DIV_E 0x00000400
160#define FPU_CSR_OVF_E 0x00000200
161#define FPU_CSR_UDF_E 0x00000100
162#define FPU_CSR_INE_E 0x00000080
163
164#define FPU_CSR_ALL_S 0x0000007c
165#define FPU_CSR_INV_S 0x00000040
166#define FPU_CSR_DIV_S 0x00000020
167#define FPU_CSR_OVF_S 0x00000010
168#define FPU_CSR_UDF_S 0x00000008
169#define FPU_CSR_INE_S 0x00000004
170
171/* Bits 0 and 1 of FPU Status Register specify the rounding mode */
172#define FPU_CSR_RM 0x00000003
173#define FPU_CSR_RN 0x0 /* nearest */
174#define FPU_CSR_RZ 0x1 /* towards zero */
175#define FPU_CSR_RU 0x2 /* towards +Infinity */
176#define FPU_CSR_RD 0x3 /* towards -Infinity */
177
178 114
179/* 115/*
180 * Values for PageMask register 116 * Values for PageMask register
@@ -341,39 +277,6 @@
341#define ST0_MX 0x01000000 277#define ST0_MX 0x01000000
342 278
343/* 279/*
344 * Bitfields in the TX39 family CP0 Configuration Register 3
345 */
346#define TX39_CONF_ICS_SHIFT 19
347#define TX39_CONF_ICS_MASK 0x00380000
348#define TX39_CONF_ICS_1KB 0x00000000
349#define TX39_CONF_ICS_2KB 0x00080000
350#define TX39_CONF_ICS_4KB 0x00100000
351#define TX39_CONF_ICS_8KB 0x00180000
352#define TX39_CONF_ICS_16KB 0x00200000
353
354#define TX39_CONF_DCS_SHIFT 16
355#define TX39_CONF_DCS_MASK 0x00070000
356#define TX39_CONF_DCS_1KB 0x00000000
357#define TX39_CONF_DCS_2KB 0x00010000
358#define TX39_CONF_DCS_4KB 0x00020000
359#define TX39_CONF_DCS_8KB 0x00030000
360#define TX39_CONF_DCS_16KB 0x00040000
361
362#define TX39_CONF_CWFON 0x00004000
363#define TX39_CONF_WBON 0x00002000
364#define TX39_CONF_RF_SHIFT 10
365#define TX39_CONF_RF_MASK 0x00000c00
366#define TX39_CONF_DOZE 0x00000200
367#define TX39_CONF_HALT 0x00000100
368#define TX39_CONF_LOCK 0x00000080
369#define TX39_CONF_ICE 0x00000020
370#define TX39_CONF_DCE 0x00000010
371#define TX39_CONF_IRSIZE_SHIFT 2
372#define TX39_CONF_IRSIZE_MASK 0x0000000c
373#define TX39_CONF_DRSIZE_SHIFT 0
374#define TX39_CONF_DRSIZE_MASK 0x00000003
375
376/*
377 * Status register bits available in all MIPS CPUs. 280 * Status register bits available in all MIPS CPUs.
378 */ 281 */
379#define ST0_IM 0x0000ff00 282#define ST0_IM 0x0000ff00
@@ -425,9 +328,9 @@
425 328
426/* 329/*
427 * Bitfields and bit numbers in the coprocessor 0 IntCtl register. (MIPSR2) 330 * Bitfields and bit numbers in the coprocessor 0 IntCtl register. (MIPSR2)
428 *
429 * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
430 */ 331 */
332#define INTCTLB_IPFDC 23
333#define INTCTLF_IPFDC (_ULCAST_(7) << INTCTLB_IPFDC)
431#define INTCTLB_IPPCI 26 334#define INTCTLB_IPPCI 26
432#define INTCTLF_IPPCI (_ULCAST_(7) << INTCTLB_IPPCI) 335#define INTCTLF_IPPCI (_ULCAST_(7) << INTCTLB_IPPCI)
433#define INTCTLB_IPTI 29 336#define INTCTLB_IPTI 29
@@ -438,10 +341,10 @@
438 * 341 *
439 * Refer to your MIPS R4xx0 manual, chapter 5 for explanation. 342 * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
440 */ 343 */
441#define CAUSEB_EXCCODE 2 344#define CAUSEB_EXCCODE 2
442#define CAUSEF_EXCCODE (_ULCAST_(31) << 2) 345#define CAUSEF_EXCCODE (_ULCAST_(31) << 2)
443#define CAUSEB_IP 8 346#define CAUSEB_IP 8
444#define CAUSEF_IP (_ULCAST_(255) << 8) 347#define CAUSEF_IP (_ULCAST_(255) << 8)
445#define CAUSEB_IP0 8 348#define CAUSEB_IP0 8
446#define CAUSEF_IP0 (_ULCAST_(1) << 8) 349#define CAUSEF_IP0 (_ULCAST_(1) << 8)
447#define CAUSEB_IP1 9 350#define CAUSEB_IP1 9
@@ -458,16 +361,18 @@
458#define CAUSEF_IP6 (_ULCAST_(1) << 14) 361#define CAUSEF_IP6 (_ULCAST_(1) << 14)
459#define CAUSEB_IP7 15 362#define CAUSEB_IP7 15
460#define CAUSEF_IP7 (_ULCAST_(1) << 15) 363#define CAUSEF_IP7 (_ULCAST_(1) << 15)
461#define CAUSEB_IV 23 364#define CAUSEB_FDCI 21
462#define CAUSEF_IV (_ULCAST_(1) << 23) 365#define CAUSEF_FDCI (_ULCAST_(1) << 21)
463#define CAUSEB_PCI 26 366#define CAUSEB_IV 23
464#define CAUSEF_PCI (_ULCAST_(1) << 26) 367#define CAUSEF_IV (_ULCAST_(1) << 23)
465#define CAUSEB_CE 28 368#define CAUSEB_PCI 26
466#define CAUSEF_CE (_ULCAST_(3) << 28) 369#define CAUSEF_PCI (_ULCAST_(1) << 26)
467#define CAUSEB_TI 30 370#define CAUSEB_CE 28
468#define CAUSEF_TI (_ULCAST_(1) << 30) 371#define CAUSEF_CE (_ULCAST_(3) << 28)
469#define CAUSEB_BD 31 372#define CAUSEB_TI 30
470#define CAUSEF_BD (_ULCAST_(1) << 31) 373#define CAUSEF_TI (_ULCAST_(1) << 30)
374#define CAUSEB_BD 31
375#define CAUSEF_BD (_ULCAST_(1) << 31)
471 376
472/* 377/*
473 * Bits in the coprocessor 0 config register. 378 * Bits in the coprocessor 0 config register.
@@ -689,18 +594,6 @@
689#define MIPS_CMGCRF_BASE (~_ULCAST_((1 << MIPS_CMGCRB_BASE) - 1)) 594#define MIPS_CMGCRF_BASE (~_ULCAST_((1 << MIPS_CMGCRB_BASE) - 1))
690 595
691/* 596/*
692 * Bits in the MIPS32/64 coprocessor 1 (FPU) revision register.
693 */
694#define MIPS_FPIR_S (_ULCAST_(1) << 16)
695#define MIPS_FPIR_D (_ULCAST_(1) << 17)
696#define MIPS_FPIR_PS (_ULCAST_(1) << 18)
697#define MIPS_FPIR_3D (_ULCAST_(1) << 19)
698#define MIPS_FPIR_W (_ULCAST_(1) << 20)
699#define MIPS_FPIR_L (_ULCAST_(1) << 21)
700#define MIPS_FPIR_F64 (_ULCAST_(1) << 22)
701#define MIPS_FPIR_FREP (_ULCAST_(1) << 29)
702
703/*
704 * Bits in the MIPS32 Memory Segmentation registers. 597 * Bits in the MIPS32 Memory Segmentation registers.
705 */ 598 */
706#define MIPS_SEGCFG_PA_SHIFT 9 599#define MIPS_SEGCFG_PA_SHIFT 9
@@ -751,6 +644,172 @@
751#define MIPS_PWCTL_PSN_SHIFT 0 644#define MIPS_PWCTL_PSN_SHIFT 0
752#define MIPS_PWCTL_PSN_MASK 0x0000003f 645#define MIPS_PWCTL_PSN_MASK 0x0000003f
753 646
647/* CDMMBase register bit definitions */
648#define MIPS_CDMMBASE_SIZE_SHIFT 0
649#define MIPS_CDMMBASE_SIZE (_ULCAST_(511) << MIPS_CDMMBASE_SIZE_SHIFT)
650#define MIPS_CDMMBASE_CI (_ULCAST_(1) << 9)
651#define MIPS_CDMMBASE_EN (_ULCAST_(1) << 10)
652#define MIPS_CDMMBASE_ADDR_SHIFT 11
653#define MIPS_CDMMBASE_ADDR_START 15
654
655/*
656 * Bitfields in the TX39 family CP0 Configuration Register 3
657 */
658#define TX39_CONF_ICS_SHIFT 19
659#define TX39_CONF_ICS_MASK 0x00380000
660#define TX39_CONF_ICS_1KB 0x00000000
661#define TX39_CONF_ICS_2KB 0x00080000
662#define TX39_CONF_ICS_4KB 0x00100000
663#define TX39_CONF_ICS_8KB 0x00180000
664#define TX39_CONF_ICS_16KB 0x00200000
665
666#define TX39_CONF_DCS_SHIFT 16
667#define TX39_CONF_DCS_MASK 0x00070000
668#define TX39_CONF_DCS_1KB 0x00000000
669#define TX39_CONF_DCS_2KB 0x00010000
670#define TX39_CONF_DCS_4KB 0x00020000
671#define TX39_CONF_DCS_8KB 0x00030000
672#define TX39_CONF_DCS_16KB 0x00040000
673
674#define TX39_CONF_CWFON 0x00004000
675#define TX39_CONF_WBON 0x00002000
676#define TX39_CONF_RF_SHIFT 10
677#define TX39_CONF_RF_MASK 0x00000c00
678#define TX39_CONF_DOZE 0x00000200
679#define TX39_CONF_HALT 0x00000100
680#define TX39_CONF_LOCK 0x00000080
681#define TX39_CONF_ICE 0x00000020
682#define TX39_CONF_DCE 0x00000010
683#define TX39_CONF_IRSIZE_SHIFT 2
684#define TX39_CONF_IRSIZE_MASK 0x0000000c
685#define TX39_CONF_DRSIZE_SHIFT 0
686#define TX39_CONF_DRSIZE_MASK 0x00000003
687
688
689/*
690 * Coprocessor 1 (FPU) register names
691 */
692#define CP1_REVISION $0
693#define CP1_UFR $1
694#define CP1_UNFR $4
695#define CP1_FCCR $25
696#define CP1_FEXR $26
697#define CP1_FENR $28
698#define CP1_STATUS $31
699
700
701/*
702 * Bits in the MIPS32/64 coprocessor 1 (FPU) revision register.
703 */
704#define MIPS_FPIR_S (_ULCAST_(1) << 16)
705#define MIPS_FPIR_D (_ULCAST_(1) << 17)
706#define MIPS_FPIR_PS (_ULCAST_(1) << 18)
707#define MIPS_FPIR_3D (_ULCAST_(1) << 19)
708#define MIPS_FPIR_W (_ULCAST_(1) << 20)
709#define MIPS_FPIR_L (_ULCAST_(1) << 21)
710#define MIPS_FPIR_F64 (_ULCAST_(1) << 22)
711#define MIPS_FPIR_HAS2008 (_ULCAST_(1) << 23)
712#define MIPS_FPIR_UFRP (_ULCAST_(1) << 28)
713#define MIPS_FPIR_FREP (_ULCAST_(1) << 29)
714
715/*
716 * Bits in the MIPS32/64 coprocessor 1 (FPU) condition codes register.
717 */
718#define MIPS_FCCR_CONDX_S 0
719#define MIPS_FCCR_CONDX (_ULCAST_(255) << MIPS_FCCR_CONDX_S)
720#define MIPS_FCCR_COND0_S 0
721#define MIPS_FCCR_COND0 (_ULCAST_(1) << MIPS_FCCR_COND0_S)
722#define MIPS_FCCR_COND1_S 1
723#define MIPS_FCCR_COND1 (_ULCAST_(1) << MIPS_FCCR_COND1_S)
724#define MIPS_FCCR_COND2_S 2
725#define MIPS_FCCR_COND2 (_ULCAST_(1) << MIPS_FCCR_COND2_S)
726#define MIPS_FCCR_COND3_S 3
727#define MIPS_FCCR_COND3 (_ULCAST_(1) << MIPS_FCCR_COND3_S)
728#define MIPS_FCCR_COND4_S 4
729#define MIPS_FCCR_COND4 (_ULCAST_(1) << MIPS_FCCR_COND4_S)
730#define MIPS_FCCR_COND5_S 5
731#define MIPS_FCCR_COND5 (_ULCAST_(1) << MIPS_FCCR_COND5_S)
732#define MIPS_FCCR_COND6_S 6
733#define MIPS_FCCR_COND6 (_ULCAST_(1) << MIPS_FCCR_COND6_S)
734#define MIPS_FCCR_COND7_S 7
735#define MIPS_FCCR_COND7 (_ULCAST_(1) << MIPS_FCCR_COND7_S)
736
737/*
738 * Bits in the MIPS32/64 coprocessor 1 (FPU) enables register.
739 */
740#define MIPS_FENR_FS_S 2
741#define MIPS_FENR_FS (_ULCAST_(1) << MIPS_FENR_FS_S)
742
743/*
744 * FPU Status Register Values
745 */
746#define FPU_CSR_COND_S 23 /* $fcc0 */
747#define FPU_CSR_COND (_ULCAST_(1) << FPU_CSR_COND_S)
748
749#define FPU_CSR_FS_S 24 /* flush denormalised results to 0 */
750#define FPU_CSR_FS (_ULCAST_(1) << FPU_CSR_FS_S)
751
752#define FPU_CSR_CONDX_S 25 /* $fcc[7:1] */
753#define FPU_CSR_CONDX (_ULCAST_(127) << FPU_CSR_CONDX_S)
754#define FPU_CSR_COND1_S 25 /* $fcc1 */
755#define FPU_CSR_COND1 (_ULCAST_(1) << FPU_CSR_COND1_S)
756#define FPU_CSR_COND2_S 26 /* $fcc2 */
757#define FPU_CSR_COND2 (_ULCAST_(1) << FPU_CSR_COND2_S)
758#define FPU_CSR_COND3_S 27 /* $fcc3 */
759#define FPU_CSR_COND3 (_ULCAST_(1) << FPU_CSR_COND3_S)
760#define FPU_CSR_COND4_S 28 /* $fcc4 */
761#define FPU_CSR_COND4 (_ULCAST_(1) << FPU_CSR_COND4_S)
762#define FPU_CSR_COND5_S 29 /* $fcc5 */
763#define FPU_CSR_COND5 (_ULCAST_(1) << FPU_CSR_COND5_S)
764#define FPU_CSR_COND6_S 30 /* $fcc6 */
765#define FPU_CSR_COND6 (_ULCAST_(1) << FPU_CSR_COND6_S)
766#define FPU_CSR_COND7_S 31 /* $fcc7 */
767#define FPU_CSR_COND7 (_ULCAST_(1) << FPU_CSR_COND7_S)
768
769/*
770 * Bits 22:20 of the FPU Status Register will be read as 0,
771 * and should be written as zero.
772 */
773#define FPU_CSR_RSVD (_ULCAST_(7) << 20)
774
775#define FPU_CSR_ABS2008 (_ULCAST_(1) << 19)
776#define FPU_CSR_NAN2008 (_ULCAST_(1) << 18)
777
778/*
779 * X the exception cause indicator
780 * E the exception enable
781 * S the sticky/flag bit
782*/
783#define FPU_CSR_ALL_X 0x0003f000
784#define FPU_CSR_UNI_X 0x00020000
785#define FPU_CSR_INV_X 0x00010000
786#define FPU_CSR_DIV_X 0x00008000
787#define FPU_CSR_OVF_X 0x00004000
788#define FPU_CSR_UDF_X 0x00002000
789#define FPU_CSR_INE_X 0x00001000
790
791#define FPU_CSR_ALL_E 0x00000f80
792#define FPU_CSR_INV_E 0x00000800
793#define FPU_CSR_DIV_E 0x00000400
794#define FPU_CSR_OVF_E 0x00000200
795#define FPU_CSR_UDF_E 0x00000100
796#define FPU_CSR_INE_E 0x00000080
797
798#define FPU_CSR_ALL_S 0x0000007c
799#define FPU_CSR_INV_S 0x00000040
800#define FPU_CSR_DIV_S 0x00000020
801#define FPU_CSR_OVF_S 0x00000010
802#define FPU_CSR_UDF_S 0x00000008
803#define FPU_CSR_INE_S 0x00000004
804
805/* Bits 0 and 1 of FPU Status Register specify the rounding mode */
806#define FPU_CSR_RM 0x00000003
807#define FPU_CSR_RN 0x0 /* nearest */
808#define FPU_CSR_RZ 0x1 /* towards zero */
809#define FPU_CSR_RU 0x2 /* towards +Infinity */
810#define FPU_CSR_RD 0x3 /* towards -Infinity */
811
812
754#ifndef __ASSEMBLY__ 813#ifndef __ASSEMBLY__
755 814
756/* 815/*
@@ -1282,6 +1341,9 @@ do { \
1282#define read_c0_ebase() __read_32bit_c0_register($15, 1) 1341#define read_c0_ebase() __read_32bit_c0_register($15, 1)
1283#define write_c0_ebase(val) __write_32bit_c0_register($15, 1, val) 1342#define write_c0_ebase(val) __write_32bit_c0_register($15, 1, val)
1284 1343
1344#define read_c0_cdmmbase() __read_ulong_c0_register($15, 2)
1345#define write_c0_cdmmbase(val) __write_ulong_c0_register($15, 2, val)
1346
1285/* MIPSR3 */ 1347/* MIPSR3 */
1286#define read_c0_segctl0() __read_32bit_c0_register($5, 2) 1348#define read_c0_segctl0() __read_32bit_c0_register($5, 2)
1287#define write_c0_segctl0(val) __write_32bit_c0_register($5, 2, val) 1349#define write_c0_segctl0(val) __write_32bit_c0_register($5, 2, val)
diff --git a/arch/mips/include/asm/netlogic/common.h b/arch/mips/include/asm/netlogic/common.h
index c281f03eb312..2a4c128277e4 100644
--- a/arch/mips/include/asm/netlogic/common.h
+++ b/arch/mips/include/asm/netlogic/common.h
@@ -111,6 +111,25 @@ static inline int nlm_irq_to_xirq(int node, int irq)
111 return node * NR_IRQS / NLM_NR_NODES + irq; 111 return node * NR_IRQS / NLM_NR_NODES + irq;
112} 112}
113 113
114extern int nlm_cpu_ready[]; 114#ifdef CONFIG_CPU_XLR
115#define nlm_cores_per_node() 8
116#else
117static inline int nlm_cores_per_node(void)
118{
119 return ((read_c0_prid() & PRID_IMP_MASK)
120 == PRID_IMP_NETLOGIC_XLP9XX) ? 32 : 8;
121}
115#endif 122#endif
123static inline int nlm_threads_per_node(void)
124{
125 return nlm_cores_per_node() * NLM_THREADS_PER_CORE;
126}
127
128static inline int nlm_hwtid_to_node(int hwtid)
129{
130 return hwtid / nlm_threads_per_node();
131}
132
133extern int nlm_cpu_ready[];
134#endif /* __ASSEMBLY__ */
116#endif /* _NETLOGIC_COMMON_H_ */ 135#endif /* _NETLOGIC_COMMON_H_ */
diff --git a/arch/mips/include/asm/netlogic/mips-extns.h b/arch/mips/include/asm/netlogic/mips-extns.h
index 06f1f75bfa9b..788baf399e69 100644
--- a/arch/mips/include/asm/netlogic/mips-extns.h
+++ b/arch/mips/include/asm/netlogic/mips-extns.h
@@ -157,7 +157,13 @@ static inline int nlm_nodeid(void)
157 157
158static inline unsigned int nlm_core_id(void) 158static inline unsigned int nlm_core_id(void)
159{ 159{
160 return (read_c0_ebase() & 0x1c) >> 2; 160 uint32_t prid = read_c0_prid() & PRID_IMP_MASK;
161
162 if ((prid == PRID_IMP_NETLOGIC_XLP9XX) ||
163 (prid == PRID_IMP_NETLOGIC_XLP5XX))
164 return (read_c0_ebase() & 0x7c) >> 2;
165 else
166 return (read_c0_ebase() & 0x1c) >> 2;
161} 167}
162 168
163static inline unsigned int nlm_thread_id(void) 169static inline unsigned int nlm_thread_id(void)
diff --git a/arch/mips/include/asm/netlogic/xlp-hal/cpucontrol.h b/arch/mips/include/asm/netlogic/xlp-hal/cpucontrol.h
index 6d2e58a9a542..a06b59292153 100644
--- a/arch/mips/include/asm/netlogic/xlp-hal/cpucontrol.h
+++ b/arch/mips/include/asm/netlogic/xlp-hal/cpucontrol.h
@@ -46,6 +46,8 @@
46#define CPU_BLOCKID_FPU 9 46#define CPU_BLOCKID_FPU 9
47#define CPU_BLOCKID_MAP 10 47#define CPU_BLOCKID_MAP 10
48 48
49#define IFU_BRUB_RESERVE 0x007
50
49#define ICU_DEFEATURE 0x100 51#define ICU_DEFEATURE 0x100
50 52
51#define LSU_DEFEATURE 0x304 53#define LSU_DEFEATURE 0x304
diff --git a/arch/mips/include/asm/netlogic/xlp-hal/sys.h b/arch/mips/include/asm/netlogic/xlp-hal/sys.h
index bc7bddf25be9..6bcf3952e556 100644
--- a/arch/mips/include/asm/netlogic/xlp-hal/sys.h
+++ b/arch/mips/include/asm/netlogic/xlp-hal/sys.h
@@ -177,6 +177,9 @@
177#define SYS_9XX_CLK_DEV_DIV 0x18d 177#define SYS_9XX_CLK_DEV_DIV 0x18d
178#define SYS_9XX_CLK_DEV_CHG 0x18f 178#define SYS_9XX_CLK_DEV_CHG 0x18f
179 179
180#define SYS_9XX_CLK_DEV_SEL_REG 0x1a4
181#define SYS_9XX_CLK_DEV_DIV_REG 0x1a6
182
180/* Registers changed on 9XX */ 183/* Registers changed on 9XX */
181#define SYS_9XX_POWER_ON_RESET_CFG 0x00 184#define SYS_9XX_POWER_ON_RESET_CFG 0x00
182#define SYS_9XX_CHIP_RESET 0x01 185#define SYS_9XX_CHIP_RESET 0x01
diff --git a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
index a862b93223cc..feb6ed807ec6 100644
--- a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
+++ b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
@@ -52,6 +52,7 @@
52#define PIC_2XX_XHCI_2_IRQ 25 52#define PIC_2XX_XHCI_2_IRQ 25
53#define PIC_9XX_XHCI_0_IRQ 23 53#define PIC_9XX_XHCI_0_IRQ 23
54#define PIC_9XX_XHCI_1_IRQ 24 54#define PIC_9XX_XHCI_1_IRQ 24
55#define PIC_9XX_XHCI_2_IRQ 25
55 56
56#define PIC_MMC_IRQ 29 57#define PIC_MMC_IRQ 29
57#define PIC_I2C_0_IRQ 30 58#define PIC_I2C_0_IRQ 30
@@ -89,7 +90,7 @@ void xlp_wakeup_secondary_cpus(void);
89 90
90void xlp_mmu_init(void); 91void xlp_mmu_init(void);
91void nlm_hal_init(void); 92void nlm_hal_init(void);
92int xlp_get_dram_map(int n, uint64_t *dram_map); 93int nlm_get_dram_map(int node, uint64_t *dram_map, int nentries);
93 94
94struct pci_dev; 95struct pci_dev;
95int xlp_socdev_to_node(const struct pci_dev *dev); 96int xlp_socdev_to_node(const struct pci_dev *dev);
diff --git a/arch/mips/include/asm/octeon/cvmx-address.h b/arch/mips/include/asm/octeon/cvmx-address.h
index e2d874e681f6..e4444f8c4a61 100644
--- a/arch/mips/include/asm/octeon/cvmx-address.h
+++ b/arch/mips/include/asm/octeon/cvmx-address.h
@@ -104,6 +104,7 @@ typedef enum {
104typedef union { 104typedef union {
105 105
106 uint64_t u64; 106 uint64_t u64;
107#ifdef __BIG_ENDIAN_BITFIELD
107 /* mapped or unmapped virtual address */ 108 /* mapped or unmapped virtual address */
108 struct { 109 struct {
109 uint64_t R:2; 110 uint64_t R:2;
@@ -202,6 +203,72 @@ typedef union {
202 uint64_t didspace:24; 203 uint64_t didspace:24;
203 uint64_t unused:40; 204 uint64_t unused:40;
204 } sfilldidspace; 205 } sfilldidspace;
206#else
207 struct {
208 uint64_t offset:62;
209 uint64_t R:2;
210 } sva;
211
212 struct {
213 uint64_t offset:31;
214 uint64_t zeroes:33;
215 } suseg;
216
217 struct {
218 uint64_t offset:29;
219 uint64_t sp:2;
220 uint64_t ones:33;
221 } sxkseg;
222
223 struct {
224 uint64_t pa:49;
225 uint64_t mbz:10;
226 uint64_t cca:3;
227 uint64_t R:2;
228 } sxkphys;
229
230 struct {
231 uint64_t offset:36;
232 uint64_t unaddr:4;
233 uint64_t did:8;
234 uint64_t is_io:1;
235 uint64_t mbz:15;
236 } sphys;
237
238 struct {
239 uint64_t offset:36;
240 uint64_t unaddr:4;
241 uint64_t zeroes:24;
242 } smem;
243
244 struct {
245 uint64_t offset:36;
246 uint64_t unaddr:4;
247 uint64_t did:8;
248 uint64_t is_io:1;
249 uint64_t mbz:13;
250 uint64_t mem_region:2;
251 } sio;
252
253 struct {
254 uint64_t addr:13;
255 cvmx_add_win_dec_t csrdec:2;
256 uint64_t ones:49;
257 } sscr;
258
259 struct {
260 uint64_t addr:7;
261 uint64_t type:3;
262 uint64_t unused2:3;
263 uint64_t csrdec:2;
264 uint64_t ones:49;
265 } sdma;
266
267 struct {
268 uint64_t unused:40;
269 uint64_t didspace:24;
270 } sfilldidspace;
271#endif
205 272
206} cvmx_addr_t; 273} cvmx_addr_t;
207 274
diff --git a/arch/mips/include/asm/octeon/cvmx-bootinfo.h b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
index 2298199a287e..c373d95b5e2c 100644
--- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h
+++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
@@ -53,6 +53,7 @@
53 * to 0. 53 * to 0.
54 */ 54 */
55struct cvmx_bootinfo { 55struct cvmx_bootinfo {
56#ifdef __BIG_ENDIAN_BITFIELD
56 uint32_t major_version; 57 uint32_t major_version;
57 uint32_t minor_version; 58 uint32_t minor_version;
58 59
@@ -123,6 +124,60 @@ struct cvmx_bootinfo {
123 */ 124 */
124 uint64_t fdt_addr; 125 uint64_t fdt_addr;
125#endif 126#endif
127#else /* __BIG_ENDIAN */
128 /*
129 * Little-Endian: When the CPU mode is switched to
130 * little-endian, the view of the structure has some of the
131 * fields swapped.
132 */
133 uint32_t minor_version;
134 uint32_t major_version;
135
136 uint64_t stack_top;
137 uint64_t heap_base;
138 uint64_t heap_end;
139 uint64_t desc_vaddr;
140
141 uint32_t stack_size;
142 uint32_t exception_base_addr;
143
144 uint32_t core_mask;
145 uint32_t flags;
146
147 uint32_t phy_mem_desc_addr;
148 uint32_t dram_size;
149
150 uint32_t eclock_hz;
151 uint32_t debugger_flags_base_addr;
152
153 uint32_t reserved0;
154 uint32_t dclock_hz;
155
156 uint8_t reserved3;
157 uint8_t reserved2;
158 uint16_t reserved1;
159 uint8_t board_rev_minor;
160 uint8_t board_rev_major;
161 uint16_t board_type;
162
163 char board_serial_number[CVMX_BOOTINFO_OCTEON_SERIAL_LEN];
164 uint8_t mac_addr_base[6];
165 uint8_t mac_addr_count;
166 uint8_t pad[5];
167
168#if (CVMX_BOOTINFO_MIN_VER >= 1)
169 uint64_t compact_flash_common_base_addr;
170 uint64_t compact_flash_attribute_base_addr;
171 uint64_t led_display_base_addr;
172#endif
173#if (CVMX_BOOTINFO_MIN_VER >= 2)
174 uint32_t config_flags;
175 uint32_t dfa_ref_clock_hz;
176#endif
177#if (CVMX_BOOTINFO_MIN_VER >= 3)
178 uint64_t fdt_addr;
179#endif
180#endif
126}; 181};
127 182
128#define CVMX_BOOTINFO_CFG_FLAG_PCI_HOST (1ull << 0) 183#define CVMX_BOOTINFO_CFG_FLAG_PCI_HOST (1ull << 0)
diff --git a/arch/mips/include/asm/octeon/cvmx-bootmem.h b/arch/mips/include/asm/octeon/cvmx-bootmem.h
index 352f1dc2508b..374562507d0b 100644
--- a/arch/mips/include/asm/octeon/cvmx-bootmem.h
+++ b/arch/mips/include/asm/octeon/cvmx-bootmem.h
@@ -95,6 +95,7 @@ struct cvmx_bootmem_named_block_desc {
95 * positions for backwards compatibility. 95 * positions for backwards compatibility.
96 */ 96 */
97struct cvmx_bootmem_desc { 97struct cvmx_bootmem_desc {
98#if defined(__BIG_ENDIAN_BITFIELD) || defined(CVMX_BUILD_FOR_LINUX_HOST)
98 /* spinlock to control access to list */ 99 /* spinlock to control access to list */
99 uint32_t lock; 100 uint32_t lock;
100 /* flags for indicating various conditions */ 101 /* flags for indicating various conditions */
@@ -120,7 +121,20 @@ struct cvmx_bootmem_desc {
120 uint32_t named_block_name_len; 121 uint32_t named_block_name_len;
121 /* address of named memory block descriptors */ 122 /* address of named memory block descriptors */
122 uint64_t named_block_array_addr; 123 uint64_t named_block_array_addr;
124#else /* __LITTLE_ENDIAN */
125 uint32_t flags;
126 uint32_t lock;
127 uint64_t head_addr;
123 128
129 uint32_t minor_version;
130 uint32_t major_version;
131 uint64_t app_data_addr;
132 uint64_t app_data_size;
133
134 uint32_t named_block_name_len;
135 uint32_t named_block_num_blocks;
136 uint64_t named_block_array_addr;
137#endif
124}; 138};
125 139
126/** 140/**
diff --git a/arch/mips/include/asm/octeon/cvmx-fau.h b/arch/mips/include/asm/octeon/cvmx-fau.h
index ef98f7fc102f..dafeae300c97 100644
--- a/arch/mips/include/asm/octeon/cvmx-fau.h
+++ b/arch/mips/include/asm/octeon/cvmx-fau.h
@@ -105,6 +105,16 @@ typedef union {
105 } s; 105 } s;
106} cvmx_fau_async_tagwait_result_t; 106} cvmx_fau_async_tagwait_result_t;
107 107
108#ifdef __BIG_ENDIAN_BITFIELD
109#define SWIZZLE_8 0
110#define SWIZZLE_16 0
111#define SWIZZLE_32 0
112#else
113#define SWIZZLE_8 0x7
114#define SWIZZLE_16 0x6
115#define SWIZZLE_32 0x4
116#endif
117
108/** 118/**
109 * Builds a store I/O address for writing to the FAU 119 * Builds a store I/O address for writing to the FAU
110 * 120 *
@@ -175,6 +185,7 @@ static inline int64_t cvmx_fau_fetch_and_add64(cvmx_fau_reg_64_t reg,
175static inline int32_t cvmx_fau_fetch_and_add32(cvmx_fau_reg_32_t reg, 185static inline int32_t cvmx_fau_fetch_and_add32(cvmx_fau_reg_32_t reg,
176 int32_t value) 186 int32_t value)
177{ 187{
188 reg ^= SWIZZLE_32;
178 return cvmx_read64_int32(__cvmx_fau_atomic_address(0, reg, value)); 189 return cvmx_read64_int32(__cvmx_fau_atomic_address(0, reg, value));
179} 190}
180 191
@@ -189,6 +200,7 @@ static inline int32_t cvmx_fau_fetch_and_add32(cvmx_fau_reg_32_t reg,
189static inline int16_t cvmx_fau_fetch_and_add16(cvmx_fau_reg_16_t reg, 200static inline int16_t cvmx_fau_fetch_and_add16(cvmx_fau_reg_16_t reg,
190 int16_t value) 201 int16_t value)
191{ 202{
203 reg ^= SWIZZLE_16;
192 return cvmx_read64_int16(__cvmx_fau_atomic_address(0, reg, value)); 204 return cvmx_read64_int16(__cvmx_fau_atomic_address(0, reg, value));
193} 205}
194 206
@@ -201,6 +213,7 @@ static inline int16_t cvmx_fau_fetch_and_add16(cvmx_fau_reg_16_t reg,
201 */ 213 */
202static inline int8_t cvmx_fau_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value) 214static inline int8_t cvmx_fau_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value)
203{ 215{
216 reg ^= SWIZZLE_8;
204 return cvmx_read64_int8(__cvmx_fau_atomic_address(0, reg, value)); 217 return cvmx_read64_int8(__cvmx_fau_atomic_address(0, reg, value));
205} 218}
206 219
@@ -247,6 +260,7 @@ cvmx_fau_tagwait_fetch_and_add32(cvmx_fau_reg_32_t reg, int32_t value)
247 uint64_t i32; 260 uint64_t i32;
248 cvmx_fau_tagwait32_t t; 261 cvmx_fau_tagwait32_t t;
249 } result; 262 } result;
263 reg ^= SWIZZLE_32;
250 result.i32 = 264 result.i32 =
251 cvmx_read64_int32(__cvmx_fau_atomic_address(1, reg, value)); 265 cvmx_read64_int32(__cvmx_fau_atomic_address(1, reg, value));
252 return result.t; 266 return result.t;
@@ -270,6 +284,7 @@ cvmx_fau_tagwait_fetch_and_add16(cvmx_fau_reg_16_t reg, int16_t value)
270 uint64_t i16; 284 uint64_t i16;
271 cvmx_fau_tagwait16_t t; 285 cvmx_fau_tagwait16_t t;
272 } result; 286 } result;
287 reg ^= SWIZZLE_16;
273 result.i16 = 288 result.i16 =
274 cvmx_read64_int16(__cvmx_fau_atomic_address(1, reg, value)); 289 cvmx_read64_int16(__cvmx_fau_atomic_address(1, reg, value));
275 return result.t; 290 return result.t;
@@ -292,6 +307,7 @@ cvmx_fau_tagwait_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value)
292 uint64_t i8; 307 uint64_t i8;
293 cvmx_fau_tagwait8_t t; 308 cvmx_fau_tagwait8_t t;
294 } result; 309 } result;
310 reg ^= SWIZZLE_8;
295 result.i8 = cvmx_read64_int8(__cvmx_fau_atomic_address(1, reg, value)); 311 result.i8 = cvmx_read64_int8(__cvmx_fau_atomic_address(1, reg, value));
296 return result.t; 312 return result.t;
297} 313}
@@ -521,6 +537,7 @@ static inline void cvmx_fau_atomic_add64(cvmx_fau_reg_64_t reg, int64_t value)
521 */ 537 */
522static inline void cvmx_fau_atomic_add32(cvmx_fau_reg_32_t reg, int32_t value) 538static inline void cvmx_fau_atomic_add32(cvmx_fau_reg_32_t reg, int32_t value)
523{ 539{
540 reg ^= SWIZZLE_32;
524 cvmx_write64_int32(__cvmx_fau_store_address(0, reg), value); 541 cvmx_write64_int32(__cvmx_fau_store_address(0, reg), value);
525} 542}
526 543
@@ -533,6 +550,7 @@ static inline void cvmx_fau_atomic_add32(cvmx_fau_reg_32_t reg, int32_t value)
533 */ 550 */
534static inline void cvmx_fau_atomic_add16(cvmx_fau_reg_16_t reg, int16_t value) 551static inline void cvmx_fau_atomic_add16(cvmx_fau_reg_16_t reg, int16_t value)
535{ 552{
553 reg ^= SWIZZLE_16;
536 cvmx_write64_int16(__cvmx_fau_store_address(0, reg), value); 554 cvmx_write64_int16(__cvmx_fau_store_address(0, reg), value);
537} 555}
538 556
@@ -544,6 +562,7 @@ static inline void cvmx_fau_atomic_add16(cvmx_fau_reg_16_t reg, int16_t value)
544 */ 562 */
545static inline void cvmx_fau_atomic_add8(cvmx_fau_reg_8_t reg, int8_t value) 563static inline void cvmx_fau_atomic_add8(cvmx_fau_reg_8_t reg, int8_t value)
546{ 564{
565 reg ^= SWIZZLE_8;
547 cvmx_write64_int8(__cvmx_fau_store_address(0, reg), value); 566 cvmx_write64_int8(__cvmx_fau_store_address(0, reg), value);
548} 567}
549 568
@@ -568,6 +587,7 @@ static inline void cvmx_fau_atomic_write64(cvmx_fau_reg_64_t reg, int64_t value)
568 */ 587 */
569static inline void cvmx_fau_atomic_write32(cvmx_fau_reg_32_t reg, int32_t value) 588static inline void cvmx_fau_atomic_write32(cvmx_fau_reg_32_t reg, int32_t value)
570{ 589{
590 reg ^= SWIZZLE_32;
571 cvmx_write64_int32(__cvmx_fau_store_address(1, reg), value); 591 cvmx_write64_int32(__cvmx_fau_store_address(1, reg), value);
572} 592}
573 593
@@ -580,6 +600,7 @@ static inline void cvmx_fau_atomic_write32(cvmx_fau_reg_32_t reg, int32_t value)
580 */ 600 */
581static inline void cvmx_fau_atomic_write16(cvmx_fau_reg_16_t reg, int16_t value) 601static inline void cvmx_fau_atomic_write16(cvmx_fau_reg_16_t reg, int16_t value)
582{ 602{
603 reg ^= SWIZZLE_16;
583 cvmx_write64_int16(__cvmx_fau_store_address(1, reg), value); 604 cvmx_write64_int16(__cvmx_fau_store_address(1, reg), value);
584} 605}
585 606
@@ -591,6 +612,7 @@ static inline void cvmx_fau_atomic_write16(cvmx_fau_reg_16_t reg, int16_t value)
591 */ 612 */
592static inline void cvmx_fau_atomic_write8(cvmx_fau_reg_8_t reg, int8_t value) 613static inline void cvmx_fau_atomic_write8(cvmx_fau_reg_8_t reg, int8_t value)
593{ 614{
615 reg ^= SWIZZLE_8;
594 cvmx_write64_int8(__cvmx_fau_store_address(1, reg), value); 616 cvmx_write64_int8(__cvmx_fau_store_address(1, reg), value);
595} 617}
596 618
diff --git a/arch/mips/include/asm/octeon/cvmx-fpa.h b/arch/mips/include/asm/octeon/cvmx-fpa.h
index aa26a2ce5a0e..c00501d0f7ae 100644
--- a/arch/mips/include/asm/octeon/cvmx-fpa.h
+++ b/arch/mips/include/asm/octeon/cvmx-fpa.h
@@ -49,6 +49,7 @@
49typedef union { 49typedef union {
50 uint64_t u64; 50 uint64_t u64;
51 struct { 51 struct {
52#ifdef __BIG_ENDIAN_BITFIELD
52 /* 53 /*
53 * the (64-bit word) location in scratchpad to write 54 * the (64-bit word) location in scratchpad to write
54 * to (if len != 0) 55 * to (if len != 0)
@@ -63,6 +64,12 @@ typedef union {
63 * the NCB bus. 64 * the NCB bus.
64 */ 65 */
65 uint64_t addr:40; 66 uint64_t addr:40;
67#else
68 uint64_t addr:40;
69 uint64_t did:8;
70 uint64_t len:8;
71 uint64_t scraddr:8;
72#endif
66 } s; 73 } s;
67} cvmx_fpa_iobdma_data_t; 74} cvmx_fpa_iobdma_data_t;
68 75
diff --git a/arch/mips/include/asm/octeon/cvmx-l2c.h b/arch/mips/include/asm/octeon/cvmx-l2c.h
index 11c0a8fa8eb5..ddb429210a0e 100644
--- a/arch/mips/include/asm/octeon/cvmx-l2c.h
+++ b/arch/mips/include/asm/octeon/cvmx-l2c.h
@@ -53,12 +53,21 @@
53union cvmx_l2c_tag { 53union cvmx_l2c_tag {
54 uint64_t u64; 54 uint64_t u64;
55 struct { 55 struct {
56#ifdef __BIG_ENDIAN_BITFIELD
56 uint64_t reserved:28; 57 uint64_t reserved:28;
57 uint64_t V:1; /* Line valid */ 58 uint64_t V:1; /* Line valid */
58 uint64_t D:1; /* Line dirty */ 59 uint64_t D:1; /* Line dirty */
59 uint64_t L:1; /* Line locked */ 60 uint64_t L:1; /* Line locked */
60 uint64_t U:1; /* Use, LRU eviction */ 61 uint64_t U:1; /* Use, LRU eviction */
61 uint64_t addr:32; /* Phys mem (not all bits valid) */ 62 uint64_t addr:32; /* Phys mem (not all bits valid) */
63#else
64 uint64_t addr:32; /* Phys mem (not all bits valid) */
65 uint64_t U:1; /* Use, LRU eviction */
66 uint64_t L:1; /* Line locked */
67 uint64_t D:1; /* Line dirty */
68 uint64_t V:1; /* Line valid */
69 uint64_t reserved:28;
70#endif
62 } s; 71 } s;
63}; 72};
64 73
diff --git a/arch/mips/include/asm/octeon/cvmx-packet.h b/arch/mips/include/asm/octeon/cvmx-packet.h
index 38aefa1bab9d..895e93d682c2 100644
--- a/arch/mips/include/asm/octeon/cvmx-packet.h
+++ b/arch/mips/include/asm/octeon/cvmx-packet.h
@@ -39,6 +39,7 @@ union cvmx_buf_ptr {
39 void *ptr; 39 void *ptr;
40 uint64_t u64; 40 uint64_t u64;
41 struct { 41 struct {
42#ifdef __BIG_ENDIAN_BITFIELD
42 /* if set, invert the "free" pick of the overall 43 /* if set, invert the "free" pick of the overall
43 * packet. HW always sets this bit to 0 on inbound 44 * packet. HW always sets this bit to 0 on inbound
44 * packet */ 45 * packet */
@@ -55,6 +56,13 @@ union cvmx_buf_ptr {
55 uint64_t size:16; 56 uint64_t size:16;
56 /* Pointer to the first byte of the data, NOT buffer */ 57 /* Pointer to the first byte of the data, NOT buffer */
57 uint64_t addr:40; 58 uint64_t addr:40;
59#else
60 uint64_t addr:40;
61 uint64_t size:16;
62 uint64_t pool:3;
63 uint64_t back:4;
64 uint64_t i:1;
65#endif
58 } s; 66 } s;
59}; 67};
60 68
diff --git a/arch/mips/include/asm/octeon/cvmx-pko.h b/arch/mips/include/asm/octeon/cvmx-pko.h
index f7d2a6718849..3da59bb8ce24 100644
--- a/arch/mips/include/asm/octeon/cvmx-pko.h
+++ b/arch/mips/include/asm/octeon/cvmx-pko.h
@@ -127,6 +127,7 @@ typedef struct {
127typedef union { 127typedef union {
128 uint64_t u64; 128 uint64_t u64;
129 struct { 129 struct {
130#ifdef __BIG_ENDIAN_BITFIELD
130 /* Must CVMX_IO_SEG */ 131 /* Must CVMX_IO_SEG */
131 uint64_t mem_space:2; 132 uint64_t mem_space:2;
132 /* Must be zero */ 133 /* Must be zero */
@@ -151,6 +152,17 @@ typedef union {
151 uint64_t queue:9; 152 uint64_t queue:9;
152 /* Must be zero */ 153 /* Must be zero */
153 uint64_t reserved4:3; 154 uint64_t reserved4:3;
155#else
156 uint64_t reserved4:3;
157 uint64_t queue:9;
158 uint64_t port:9;
159 uint64_t reserved3:15;
160 uint64_t reserved2:4;
161 uint64_t did:8;
162 uint64_t is_io:1;
163 uint64_t reserved:13;
164 uint64_t mem_space:2;
165#endif
154 } s; 166 } s;
155} cvmx_pko_doorbell_address_t; 167} cvmx_pko_doorbell_address_t;
156 168
@@ -160,6 +172,7 @@ typedef union {
160typedef union { 172typedef union {
161 uint64_t u64; 173 uint64_t u64;
162 struct { 174 struct {
175#ifdef __BIG_ENDIAN_BITFIELD
163 /* 176 /*
164 * The size of the reg1 operation - could be 8, 16, 177 * The size of the reg1 operation - could be 8, 16,
165 * 32, or 64 bits. 178 * 32, or 64 bits.
@@ -229,6 +242,24 @@ typedef union {
229 uint64_t segs:6; 242 uint64_t segs:6;
230 /* Including L2, but no trailing CRC */ 243 /* Including L2, but no trailing CRC */
231 uint64_t total_bytes:16; 244 uint64_t total_bytes:16;
245#else
246 uint64_t total_bytes:16;
247 uint64_t segs:6;
248 uint64_t dontfree:1;
249 uint64_t ignore_i:1;
250 uint64_t ipoffp1:7;
251 uint64_t gather:1;
252 uint64_t rsp:1;
253 uint64_t wqp:1;
254 uint64_t n2:1;
255 uint64_t le:1;
256 uint64_t reg0:11;
257 uint64_t subone0:1;
258 uint64_t reg1:11;
259 uint64_t subone1:1;
260 uint64_t size0:2;
261 uint64_t size1:2;
262#endif
232 } s; 263 } s;
233} cvmx_pko_command_word0_t; 264} cvmx_pko_command_word0_t;
234 265
diff --git a/arch/mips/include/asm/octeon/cvmx-pow.h b/arch/mips/include/asm/octeon/cvmx-pow.h
index 2188e65afb86..d5565d758ddd 100644
--- a/arch/mips/include/asm/octeon/cvmx-pow.h
+++ b/arch/mips/include/asm/octeon/cvmx-pow.h
@@ -178,6 +178,7 @@ typedef enum {
178typedef union { 178typedef union {
179 uint64_t u64; 179 uint64_t u64;
180 struct { 180 struct {
181#ifdef __BIG_ENDIAN_BITFIELD
181 /* 182 /*
182 * Don't reschedule this entry. no_sched is used for 183 * Don't reschedule this entry. no_sched is used for
183 * CVMX_POW_TAG_OP_SWTAG_DESCH and 184 * CVMX_POW_TAG_OP_SWTAG_DESCH and
@@ -217,6 +218,17 @@ typedef union {
217 * CVMX_POW_TAG_OP_*_NSCHED 218 * CVMX_POW_TAG_OP_*_NSCHED
218 */ 219 */
219 uint64_t tag:32; 220 uint64_t tag:32;
221#else
222 uint64_t tag:32;
223 uint64_t type:3;
224 uint64_t grp:4;
225 uint64_t qos:3;
226 uint64_t unused2:2;
227 cvmx_pow_tag_op_t op:4;
228 uint64_t index:13;
229 uint64_t unused:2;
230 uint64_t no_sched:1;
231#endif
220 } s; 232 } s;
221} cvmx_pow_tag_req_t; 233} cvmx_pow_tag_req_t;
222 234
@@ -230,6 +242,7 @@ typedef union {
230 * Address for new work request loads (did<2:0> == 0) 242 * Address for new work request loads (did<2:0> == 0)
231 */ 243 */
232 struct { 244 struct {
245#ifdef __BIG_ENDIAN_BITFIELD
233 /* Mips64 address region. Should be CVMX_IO_SEG */ 246 /* Mips64 address region. Should be CVMX_IO_SEG */
234 uint64_t mem_region:2; 247 uint64_t mem_region:2;
235 /* Must be zero */ 248 /* Must be zero */
@@ -247,12 +260,22 @@ typedef union {
247 uint64_t wait:1; 260 uint64_t wait:1;
248 /* Must be zero */ 261 /* Must be zero */
249 uint64_t reserved_0_2:3; 262 uint64_t reserved_0_2:3;
263#else
264 uint64_t reserved_0_2:3;
265 uint64_t wait:1;
266 uint64_t reserved_4_39:36;
267 uint64_t did:8;
268 uint64_t is_io:1;
269 uint64_t reserved_49_61:13;
270 uint64_t mem_region:2;
271#endif
250 } swork; 272 } swork;
251 273
252 /** 274 /**
253 * Address for loads to get POW internal status 275 * Address for loads to get POW internal status
254 */ 276 */
255 struct { 277 struct {
278#ifdef __BIG_ENDIAN_BITFIELD
256 /* Mips64 address region. Should be CVMX_IO_SEG */ 279 /* Mips64 address region. Should be CVMX_IO_SEG */
257 uint64_t mem_region:2; 280 uint64_t mem_region:2;
258 /* Must be zero */ 281 /* Must be zero */
@@ -282,12 +305,25 @@ typedef union {
282 uint64_t get_wqp:1; 305 uint64_t get_wqp:1;
283 /* Must be zero */ 306 /* Must be zero */
284 uint64_t reserved_0_2:3; 307 uint64_t reserved_0_2:3;
308#else
309 uint64_t reserved_0_2:3;
310 uint64_t get_wqp:1;
311 uint64_t get_cur:1;
312 uint64_t get_rev:1;
313 uint64_t coreid:4;
314 uint64_t reserved_10_39:30;
315 uint64_t did:8;
316 uint64_t is_io:1;
317 uint64_t reserved_49_61:13;
318 uint64_t mem_region:2;
319#endif
285 } sstatus; 320 } sstatus;
286 321
287 /** 322 /**
288 * Address for memory loads to get POW internal state 323 * Address for memory loads to get POW internal state
289 */ 324 */
290 struct { 325 struct {
326#ifdef __BIG_ENDIAN_BITFIELD
291 /* Mips64 address region. Should be CVMX_IO_SEG */ 327 /* Mips64 address region. Should be CVMX_IO_SEG */
292 uint64_t mem_region:2; 328 uint64_t mem_region:2;
293 /* Must be zero */ 329 /* Must be zero */
@@ -314,12 +350,24 @@ typedef union {
314 uint64_t get_wqp:1; 350 uint64_t get_wqp:1;
315 /* Must be zero */ 351 /* Must be zero */
316 uint64_t reserved_0_2:3; 352 uint64_t reserved_0_2:3;
353#else
354 uint64_t reserved_0_2:3;
355 uint64_t get_wqp:1;
356 uint64_t get_des:1;
357 uint64_t index:11;
358 uint64_t reserved_16_39:24;
359 uint64_t did:8;
360 uint64_t is_io:1;
361 uint64_t reserved_49_61:13;
362 uint64_t mem_region:2;
363#endif
317 } smemload; 364 } smemload;
318 365
319 /** 366 /**
320 * Address for index/pointer loads 367 * Address for index/pointer loads
321 */ 368 */
322 struct { 369 struct {
370#ifdef __BIG_ENDIAN_BITFIELD
323 /* Mips64 address region. Should be CVMX_IO_SEG */ 371 /* Mips64 address region. Should be CVMX_IO_SEG */
324 uint64_t mem_region:2; 372 uint64_t mem_region:2;
325 /* Must be zero */ 373 /* Must be zero */
@@ -366,6 +414,17 @@ typedef union {
366 uint64_t get_rmt:1; 414 uint64_t get_rmt:1;
367 /* Must be zero */ 415 /* Must be zero */
368 uint64_t reserved_0_2:3; 416 uint64_t reserved_0_2:3;
417#else
418 uint64_t reserved_0_2:3;
419 uint64_t get_rmt:1;
420 uint64_t get_des_get_tail:1;
421 uint64_t qosgrp:4;
422 uint64_t reserved_9_39:31;
423 uint64_t did:8;
424 uint64_t is_io:1;
425 uint64_t reserved_49_61:13;
426 uint64_t mem_region:2;
427#endif
369 } sindexload; 428 } sindexload;
370 429
371 /** 430 /**
@@ -377,6 +436,7 @@ typedef union {
377 * available.) 436 * available.)
378 */ 437 */
379 struct { 438 struct {
439#ifdef __BIG_ENDIAN_BITFIELD
380 /* Mips64 address region. Should be CVMX_IO_SEG */ 440 /* Mips64 address region. Should be CVMX_IO_SEG */
381 uint64_t mem_region:2; 441 uint64_t mem_region:2;
382 /* Must be zero */ 442 /* Must be zero */
@@ -387,6 +447,13 @@ typedef union {
387 uint64_t did:8; 447 uint64_t did:8;
388 /* Must be zero */ 448 /* Must be zero */
389 uint64_t reserved_0_39:40; 449 uint64_t reserved_0_39:40;
450#else
451 uint64_t reserved_0_39:40;
452 uint64_t did:8;
453 uint64_t is_io:1;
454 uint64_t reserved_49_61:13;
455 uint64_t mem_region:2;
456#endif
390 } snull_rd; 457 } snull_rd;
391} cvmx_pow_load_addr_t; 458} cvmx_pow_load_addr_t;
392 459
@@ -401,6 +468,7 @@ typedef union {
401 * Response to new work request loads 468 * Response to new work request loads
402 */ 469 */
403 struct { 470 struct {
471#ifdef __BIG_ENDIAN_BITFIELD
404 /* 472 /*
405 * Set when no new work queue entry was returned. * 473 * Set when no new work queue entry was returned. *
406 * If there was de-scheduled work, the HW will 474 * If there was de-scheduled work, the HW will
@@ -419,12 +487,18 @@ typedef union {
419 uint64_t reserved_40_62:23; 487 uint64_t reserved_40_62:23;
420 /* 36 in O1 -- the work queue pointer */ 488 /* 36 in O1 -- the work queue pointer */
421 uint64_t addr:40; 489 uint64_t addr:40;
490#else
491 uint64_t addr:40;
492 uint64_t reserved_40_62:23;
493 uint64_t no_work:1;
494#endif
422 } s_work; 495 } s_work;
423 496
424 /** 497 /**
425 * Result for a POW Status Load (when get_cur==0 and get_wqp==0) 498 * Result for a POW Status Load (when get_cur==0 and get_wqp==0)
426 */ 499 */
427 struct { 500 struct {
501#ifdef __BIG_ENDIAN_BITFIELD
428 uint64_t reserved_62_63:2; 502 uint64_t reserved_62_63:2;
429 /* Set when there is a pending non-NULL SWTAG or 503 /* Set when there is a pending non-NULL SWTAG or
430 * SWTAG_FULL, and the POW entry has not left the list 504 * SWTAG_FULL, and the POW entry has not left the list
@@ -476,12 +550,32 @@ typedef union {
476 * AND pend_desched_switch) are set. 550 * AND pend_desched_switch) are set.
477 */ 551 */
478 uint64_t pend_tag:32; 552 uint64_t pend_tag:32;
553#else
554 uint64_t pend_tag:32;
555 uint64_t pend_type:2;
556 uint64_t reserved_34_35:2;
557 uint64_t pend_grp:4;
558 uint64_t pend_index:11;
559 uint64_t reserved_51:1;
560 uint64_t pend_nosched_clr:1;
561 uint64_t pend_null_rd:1;
562 uint64_t pend_new_work_wait:1;
563 uint64_t pend_new_work:1;
564 uint64_t pend_nosched:1;
565 uint64_t pend_desched_switch:1;
566 uint64_t pend_desched:1;
567 uint64_t pend_switch_null:1;
568 uint64_t pend_switch_full:1;
569 uint64_t pend_switch:1;
570 uint64_t reserved_62_63:2;
571#endif
479 } s_sstatus0; 572 } s_sstatus0;
480 573
481 /** 574 /**
482 * Result for a POW Status Load (when get_cur==0 and get_wqp==1) 575 * Result for a POW Status Load (when get_cur==0 and get_wqp==1)
483 */ 576 */
484 struct { 577 struct {
578#ifdef __BIG_ENDIAN_BITFIELD
485 uint64_t reserved_62_63:2; 579 uint64_t reserved_62_63:2;
486 /* 580 /*
487 * Set when there is a pending non-NULL SWTAG or 581 * Set when there is a pending non-NULL SWTAG or
@@ -529,6 +623,23 @@ typedef union {
529 uint64_t pend_grp:4; 623 uint64_t pend_grp:4;
530 /* This is the wqp when pend_nosched_clr is set. */ 624 /* This is the wqp when pend_nosched_clr is set. */
531 uint64_t pend_wqp:36; 625 uint64_t pend_wqp:36;
626#else
627 uint64_t pend_wqp:36;
628 uint64_t pend_grp:4;
629 uint64_t pend_index:11;
630 uint64_t reserved_51:1;
631 uint64_t pend_nosched_clr:1;
632 uint64_t pend_null_rd:1;
633 uint64_t pend_new_work_wait:1;
634 uint64_t pend_new_work:1;
635 uint64_t pend_nosched:1;
636 uint64_t pend_desched_switch:1;
637 uint64_t pend_desched:1;
638 uint64_t pend_switch_null:1;
639 uint64_t pend_switch_full:1;
640 uint64_t pend_switch:1;
641 uint64_t reserved_62_63:2;
642#endif
532 } s_sstatus1; 643 } s_sstatus1;
533 644
534 /** 645 /**
@@ -536,6 +647,7 @@ typedef union {
536 * get_rev==0) 647 * get_rev==0)
537 */ 648 */
538 struct { 649 struct {
650#ifdef __BIG_ENDIAN_BITFIELD
539 uint64_t reserved_62_63:2; 651 uint64_t reserved_62_63:2;
540 /* 652 /*
541 * Points to the next POW entry in the tag list when 653 * Points to the next POW entry in the tag list when
@@ -573,12 +685,23 @@ typedef union {
573 * SWTAG_DESCHED). 685 * SWTAG_DESCHED).
574 */ 686 */
575 uint64_t tag:32; 687 uint64_t tag:32;
688#else
689 uint64_t tag:32;
690 uint64_t tag_type:2;
691 uint64_t tail:1;
692 uint64_t head:1;
693 uint64_t grp:4;
694 uint64_t index:11;
695 uint64_t link_index:11;
696 uint64_t reserved_62_63:2;
697#endif
576 } s_sstatus2; 698 } s_sstatus2;
577 699
578 /** 700 /**
579 * Result for a POW Status Load (when get_cur==1, get_wqp==0, and get_rev==1) 701 * Result for a POW Status Load (when get_cur==1, get_wqp==0, and get_rev==1)
580 */ 702 */
581 struct { 703 struct {
704#ifdef __BIG_ENDIAN_BITFIELD
582 uint64_t reserved_62_63:2; 705 uint64_t reserved_62_63:2;
583 /* 706 /*
584 * Points to the prior POW entry in the tag list when 707 * Points to the prior POW entry in the tag list when
@@ -617,6 +740,16 @@ typedef union {
617 * SWTAG_DESCHED). 740 * SWTAG_DESCHED).
618 */ 741 */
619 uint64_t tag:32; 742 uint64_t tag:32;
743#else
744 uint64_t tag:32;
745 uint64_t tag_type:2;
746 uint64_t tail:1;
747 uint64_t head:1;
748 uint64_t grp:4;
749 uint64_t index:11;
750 uint64_t revlink_index:11;
751 uint64_t reserved_62_63:2;
752#endif
620 } s_sstatus3; 753 } s_sstatus3;
621 754
622 /** 755 /**
@@ -624,6 +757,7 @@ typedef union {
624 * get_rev==0) 757 * get_rev==0)
625 */ 758 */
626 struct { 759 struct {
760#ifdef __BIG_ENDIAN_BITFIELD
627 uint64_t reserved_62_63:2; 761 uint64_t reserved_62_63:2;
628 /* 762 /*
629 * Points to the next POW entry in the tag list when 763 * Points to the next POW entry in the tag list when
@@ -642,6 +776,13 @@ typedef union {
642 * list entered on SWTAG_FULL). 776 * list entered on SWTAG_FULL).
643 */ 777 */
644 uint64_t wqp:36; 778 uint64_t wqp:36;
779#else
780 uint64_t wqp:36;
781 uint64_t grp:4;
782 uint64_t index:11;
783 uint64_t link_index:11;
784 uint64_t reserved_62_63:2;
785#endif
645 } s_sstatus4; 786 } s_sstatus4;
646 787
647 /** 788 /**
@@ -649,6 +790,7 @@ typedef union {
649 * get_rev==1) 790 * get_rev==1)
650 */ 791 */
651 struct { 792 struct {
793#ifdef __BIG_ENDIAN_BITFIELD
652 uint64_t reserved_62_63:2; 794 uint64_t reserved_62_63:2;
653 /* 795 /*
654 * Points to the prior POW entry in the tag list when 796 * Points to the prior POW entry in the tag list when
@@ -669,12 +811,20 @@ typedef union {
669 * list entered on SWTAG_FULL). 811 * list entered on SWTAG_FULL).
670 */ 812 */
671 uint64_t wqp:36; 813 uint64_t wqp:36;
814#else
815 uint64_t wqp:36;
816 uint64_t grp:4;
817 uint64_t index:11;
818 uint64_t revlink_index:11;
819 uint64_t reserved_62_63:2;
820#endif
672 } s_sstatus5; 821 } s_sstatus5;
673 822
674 /** 823 /**
675 * Result For POW Memory Load (get_des == 0 and get_wqp == 0) 824 * Result For POW Memory Load (get_des == 0 and get_wqp == 0)
676 */ 825 */
677 struct { 826 struct {
827#ifdef __BIG_ENDIAN_BITFIELD
678 uint64_t reserved_51_63:13; 828 uint64_t reserved_51_63:13;
679 /* 829 /*
680 * The next entry in the input, free, descheduled_head 830 * The next entry in the input, free, descheduled_head
@@ -695,12 +845,22 @@ typedef union {
695 uint64_t tag_type:2; 845 uint64_t tag_type:2;
696 /* The tag of the POW entry. */ 846 /* The tag of the POW entry. */
697 uint64_t tag:32; 847 uint64_t tag:32;
848#else
849 uint64_t tag:32;
850 uint64_t tag_type:2;
851 uint64_t tail:1;
852 uint64_t reserved_35:1;
853 uint64_t grp:4;
854 uint64_t next_index:11;
855 uint64_t reserved_51_63:13;
856#endif
698 } s_smemload0; 857 } s_smemload0;
699 858
700 /** 859 /**
701 * Result For POW Memory Load (get_des == 0 and get_wqp == 1) 860 * Result For POW Memory Load (get_des == 0 and get_wqp == 1)
702 */ 861 */
703 struct { 862 struct {
863#ifdef __BIG_ENDIAN_BITFIELD
704 uint64_t reserved_51_63:13; 864 uint64_t reserved_51_63:13;
705 /* 865 /*
706 * The next entry in the input, free, descheduled_head 866 * The next entry in the input, free, descheduled_head
@@ -712,12 +872,19 @@ typedef union {
712 uint64_t grp:4; 872 uint64_t grp:4;
713 /* The WQP held in the POW entry. */ 873 /* The WQP held in the POW entry. */
714 uint64_t wqp:36; 874 uint64_t wqp:36;
875#else
876 uint64_t wqp:36;
877 uint64_t grp:4;
878 uint64_t next_index:11;
879 uint64_t reserved_51_63:13;
880#endif
715 } s_smemload1; 881 } s_smemload1;
716 882
717 /** 883 /**
718 * Result For POW Memory Load (get_des == 1) 884 * Result For POW Memory Load (get_des == 1)
719 */ 885 */
720 struct { 886 struct {
887#ifdef __BIG_ENDIAN_BITFIELD
721 uint64_t reserved_51_63:13; 888 uint64_t reserved_51_63:13;
722 /* 889 /*
723 * The next entry in the tag list connected to the 890 * The next entry in the tag list connected to the
@@ -740,12 +907,22 @@ typedef union {
740 * is set. 907 * is set.
741 */ 908 */
742 uint64_t pend_tag:32; 909 uint64_t pend_tag:32;
910#else
911 uint64_t pend_tag:32;
912 uint64_t pend_type:2;
913 uint64_t pend_switch:1;
914 uint64_t nosched:1;
915 uint64_t grp:4;
916 uint64_t fwd_index:11;
917 uint64_t reserved_51_63:13;
918#endif
743 } s_smemload2; 919 } s_smemload2;
744 920
745 /** 921 /**
746 * Result For POW Index/Pointer Load (get_rmt == 0/get_des_get_tail == 0) 922 * Result For POW Index/Pointer Load (get_rmt == 0/get_des_get_tail == 0)
747 */ 923 */
748 struct { 924 struct {
925#ifdef __BIG_ENDIAN_BITFIELD
749 uint64_t reserved_52_63:12; 926 uint64_t reserved_52_63:12;
750 /* 927 /*
751 * set when there is one or more POW entries on the 928 * set when there is one or more POW entries on the
@@ -791,12 +968,28 @@ typedef union {
791 * the input Q list selected by qosgrp. 968 * the input Q list selected by qosgrp.
792 */ 969 */
793 uint64_t loc_tail:11; 970 uint64_t loc_tail:11;
971#else
972 uint64_t loc_tail:11;
973 uint64_t reserved_11:1;
974 uint64_t loc_head:11;
975 uint64_t reserved_23:1;
976 uint64_t loc_one:1;
977 uint64_t loc_val:1;
978 uint64_t free_tail:11;
979 uint64_t reserved_37:1;
980 uint64_t free_head:11;
981 uint64_t reserved_49:1;
982 uint64_t free_one:1;
983 uint64_t free_val:1;
984 uint64_t reserved_52_63:12;
985#endif
794 } sindexload0; 986 } sindexload0;
795 987
796 /** 988 /**
797 * Result For POW Index/Pointer Load (get_rmt == 0/get_des_get_tail == 1) 989 * Result For POW Index/Pointer Load (get_rmt == 0/get_des_get_tail == 1)
798 */ 990 */
799 struct { 991 struct {
992#ifdef __BIG_ENDIAN_BITFIELD
800 uint64_t reserved_52_63:12; 993 uint64_t reserved_52_63:12;
801 /* 994 /*
802 * set when there is one or more POW entries on the 995 * set when there is one or more POW entries on the
@@ -843,12 +1036,28 @@ typedef union {
843 * head on the descheduled list selected by qosgrp. 1036 * head on the descheduled list selected by qosgrp.
844 */ 1037 */
845 uint64_t des_tail:11; 1038 uint64_t des_tail:11;
1039#else
1040 uint64_t des_tail:11;
1041 uint64_t reserved_11:1;
1042 uint64_t des_head:11;
1043 uint64_t reserved_23:1;
1044 uint64_t des_one:1;
1045 uint64_t des_val:1;
1046 uint64_t nosched_tail:11;
1047 uint64_t reserved_37:1;
1048 uint64_t nosched_head:11;
1049 uint64_t reserved_49:1;
1050 uint64_t nosched_one:1;
1051 uint64_t nosched_val:1;
1052 uint64_t reserved_52_63:12;
1053#endif
846 } sindexload1; 1054 } sindexload1;
847 1055
848 /** 1056 /**
849 * Result For POW Index/Pointer Load (get_rmt == 1/get_des_get_tail == 0) 1057 * Result For POW Index/Pointer Load (get_rmt == 1/get_des_get_tail == 0)
850 */ 1058 */
851 struct { 1059 struct {
1060#ifdef __BIG_ENDIAN_BITFIELD
852 uint64_t reserved_39_63:25; 1061 uint64_t reserved_39_63:25;
853 /* 1062 /*
854 * Set when this DRAM list is the current head 1063 * Set when this DRAM list is the current head
@@ -877,6 +1086,13 @@ typedef union {
877 * qosgrp. 1086 * qosgrp.
878 */ 1087 */
879 uint64_t rmt_head:36; 1088 uint64_t rmt_head:36;
1089#else
1090 uint64_t rmt_head:36;
1091 uint64_t rmt_one:1;
1092 uint64_t rmt_val:1;
1093 uint64_t rmt_is_head:1;
1094 uint64_t reserved_39_63:25;
1095#endif
880 } sindexload2; 1096 } sindexload2;
881 1097
882 /** 1098 /**
@@ -884,6 +1100,7 @@ typedef union {
884 * 1/get_des_get_tail == 1) 1100 * 1/get_des_get_tail == 1)
885 */ 1101 */
886 struct { 1102 struct {
1103#ifdef __BIG_ENDIAN_BITFIELD
887 uint64_t reserved_39_63:25; 1104 uint64_t reserved_39_63:25;
888 /* 1105 /*
889 * set when this DRAM list is the current head 1106 * set when this DRAM list is the current head
@@ -912,12 +1129,20 @@ typedef union {
912 * qosgrp. 1129 * qosgrp.
913 */ 1130 */
914 uint64_t rmt_tail:36; 1131 uint64_t rmt_tail:36;
1132#else
1133 uint64_t rmt_tail:36;
1134 uint64_t rmt_one:1;
1135 uint64_t rmt_val:1;
1136 uint64_t rmt_is_head:1;
1137 uint64_t reserved_39_63:25;
1138#endif
915 } sindexload3; 1139 } sindexload3;
916 1140
917 /** 1141 /**
918 * Response to NULL_RD request loads 1142 * Response to NULL_RD request loads
919 */ 1143 */
920 struct { 1144 struct {
1145#ifdef __BIG_ENDIAN_BITFIELD
921 uint64_t unused:62; 1146 uint64_t unused:62;
922 /* of type cvmx_pow_tag_type_t. state is one of the 1147 /* of type cvmx_pow_tag_type_t. state is one of the
923 * following: 1148 * following:
@@ -928,6 +1153,10 @@ typedef union {
928 * - CVMX_POW_TAG_TYPE_NULL_NULL 1153 * - CVMX_POW_TAG_TYPE_NULL_NULL
929 */ 1154 */
930 uint64_t state:2; 1155 uint64_t state:2;
1156#else
1157 uint64_t state:2;
1158 uint64_t unused:62;
1159#endif
931 } s_null_rd; 1160 } s_null_rd;
932 1161
933} cvmx_pow_tag_load_resp_t; 1162} cvmx_pow_tag_load_resp_t;
@@ -962,6 +1191,7 @@ typedef union {
962 uint64_t u64; 1191 uint64_t u64;
963 1192
964 struct { 1193 struct {
1194#ifdef __BIG_ENDIAN_BITFIELD
965 /* Memory region. Should be CVMX_IO_SEG in most cases */ 1195 /* Memory region. Should be CVMX_IO_SEG in most cases */
966 uint64_t mem_reg:2; 1196 uint64_t mem_reg:2;
967 uint64_t reserved_49_61:13; /* Must be zero */ 1197 uint64_t reserved_49_61:13; /* Must be zero */
@@ -971,6 +1201,14 @@ typedef union {
971 uint64_t reserved_36_39:4; /* Must be zero */ 1201 uint64_t reserved_36_39:4; /* Must be zero */
972 /* Address field. addr<2:0> must be zero */ 1202 /* Address field. addr<2:0> must be zero */
973 uint64_t addr:36; 1203 uint64_t addr:36;
1204#else
1205 uint64_t addr:36;
1206 uint64_t reserved_36_39:4;
1207 uint64_t did:8;
1208 uint64_t is_io:1;
1209 uint64_t reserved_49_61:13;
1210 uint64_t mem_reg:2;
1211#endif
974 } stag; 1212 } stag;
975} cvmx_pow_tag_store_addr_t; 1213} cvmx_pow_tag_store_addr_t;
976 1214
@@ -981,6 +1219,7 @@ typedef union {
981 uint64_t u64; 1219 uint64_t u64;
982 1220
983 struct { 1221 struct {
1222#ifdef __BIG_ENDIAN_BITFIELD
984 /* 1223 /*
985 * the (64-bit word) location in scratchpad to write 1224 * the (64-bit word) location in scratchpad to write
986 * to (if len != 0) 1225 * to (if len != 0)
@@ -994,6 +1233,14 @@ typedef union {
994 /* if set, don't return load response until work is available */ 1233 /* if set, don't return load response until work is available */
995 uint64_t wait:1; 1234 uint64_t wait:1;
996 uint64_t unused2:3; 1235 uint64_t unused2:3;
1236#else
1237 uint64_t unused2:3;
1238 uint64_t wait:1;
1239 uint64_t unused:36;
1240 uint64_t did:8;
1241 uint64_t len:8;
1242 uint64_t scraddr:8;
1243#endif
997 } s; 1244 } s;
998 1245
999} cvmx_pow_iobdma_store_t; 1246} cvmx_pow_iobdma_store_t;
diff --git a/arch/mips/include/asm/octeon/cvmx-wqe.h b/arch/mips/include/asm/octeon/cvmx-wqe.h
index aa0d3d0de75c..2d6d0c7127a7 100644
--- a/arch/mips/include/asm/octeon/cvmx-wqe.h
+++ b/arch/mips/include/asm/octeon/cvmx-wqe.h
@@ -57,6 +57,7 @@ typedef union {
57 57
58 /* Use this struct if the hardware determines that the packet is IP */ 58 /* Use this struct if the hardware determines that the packet is IP */
59 struct { 59 struct {
60#ifdef __BIG_ENDIAN_BITFIELD
60 /* HW sets this to the number of buffers used by this packet */ 61 /* HW sets this to the number of buffers used by this packet */
61 uint64_t bufs:8; 62 uint64_t bufs:8;
62 /* HW sets to the number of L2 bytes prior to the IP */ 63 /* HW sets to the number of L2 bytes prior to the IP */
@@ -166,13 +167,45 @@ typedef union {
166 * the slow path */ 167 * the slow path */
167 /* type is cvmx_pip_err_t */ 168 /* type is cvmx_pip_err_t */
168 uint64_t err_code:8; 169 uint64_t err_code:8;
170#else
171 uint64_t err_code:8;
172 uint64_t rcv_error:1;
173 uint64_t not_IP:1;
174 uint64_t is_mcast:1;
175 uint64_t is_bcast:1;
176 uint64_t IP_exc:1;
177 uint64_t is_frag:1;
178 uint64_t L4_error:1;
179 uint64_t software:1;
180 uint64_t is_v6:1;
181 uint64_t dec_ipsec:1;
182 uint64_t tcp_or_udp:1;
183 uint64_t dec_ipcomp:1;
184 uint64_t unassigned2:4;
185 uint64_t unassigned2a:4;
186 uint64_t pr:4;
187 uint64_t vlan_id:12;
188 uint64_t vlan_cfi:1;
189 uint64_t unassigned:1;
190 uint64_t vlan_stacked:1;
191 uint64_t vlan_valid:1;
192 uint64_t ip_offset:8;
193 uint64_t bufs:8;
194#endif
169 } s; 195 } s;
170 196
171 /* use this to get at the 16 vlan bits */ 197 /* use this to get at the 16 vlan bits */
172 struct { 198 struct {
199#ifdef __BIG_ENDIAN_BITFIELD
173 uint64_t unused1:16; 200 uint64_t unused1:16;
174 uint64_t vlan:16; 201 uint64_t vlan:16;
175 uint64_t unused2:32; 202 uint64_t unused2:32;
203#else
204 uint64_t unused2:32;
205 uint64_t vlan:16;
206 uint64_t unused1:16;
207
208#endif
176 } svlan; 209 } svlan;
177 210
178 /* 211 /*
@@ -180,6 +213,7 @@ typedef union {
180 * the packet is ip. 213 * the packet is ip.
181 */ 214 */
182 struct { 215 struct {
216#ifdef __BIG_ENDIAN_BITFIELD
183 /* 217 /*
184 * HW sets this to the number of buffers used by this 218 * HW sets this to the number of buffers used by this
185 * packet. 219 * packet.
@@ -296,6 +330,27 @@ typedef union {
296 */ 330 */
297 /* type is cvmx_pip_err_t (union, so can't use directly */ 331 /* type is cvmx_pip_err_t (union, so can't use directly */
298 uint64_t err_code:8; 332 uint64_t err_code:8;
333#else
334 uint64_t err_code:8;
335 uint64_t rcv_error:1;
336 uint64_t not_IP:1;
337 uint64_t is_mcast:1;
338 uint64_t is_bcast:1;
339 uint64_t is_arp:1;
340 uint64_t is_rarp:1;
341 uint64_t unassigned3:1;
342 uint64_t software:1;
343 uint64_t unassigned2:4;
344 uint64_t unassigned2a:8;
345 uint64_t pr:4;
346 uint64_t vlan_id:12;
347 uint64_t vlan_cfi:1;
348 uint64_t unassigned:1;
349 uint64_t vlan_stacked:1;
350 uint64_t vlan_valid:1;
351 uint64_t unused:8;
352 uint64_t bufs:8;
353#endif
299 } snoip; 354 } snoip;
300 355
301} cvmx_pip_wqe_word2; 356} cvmx_pip_wqe_word2;
@@ -312,6 +367,7 @@ typedef struct {
312 * HW WRITE: the following 64 bits are filled by HW when a packet arrives 367 * HW WRITE: the following 64 bits are filled by HW when a packet arrives
313 */ 368 */
314 369
370#ifdef __BIG_ENDIAN_BITFIELD
315 /** 371 /**
316 * raw chksum result generated by the HW 372 * raw chksum result generated by the HW
317 */ 373 */
@@ -327,12 +383,18 @@ typedef struct {
327 * (Only 36 bits used in Octeon 1) 383 * (Only 36 bits used in Octeon 1)
328 */ 384 */
329 uint64_t next_ptr:40; 385 uint64_t next_ptr:40;
386#else
387 uint64_t next_ptr:40;
388 uint8_t unused;
389 uint16_t hw_chksum;
390#endif
330 391
331 /***************************************************************** 392 /*****************************************************************
332 * WORD 1 393 * WORD 1
333 * HW WRITE: the following 64 bits are filled by HW when a packet arrives 394 * HW WRITE: the following 64 bits are filled by HW when a packet arrives
334 */ 395 */
335 396
397#ifdef __BIG_ENDIAN_BITFIELD
336 /** 398 /**
337 * HW sets to the total number of bytes in the packet 399 * HW sets to the total number of bytes in the packet
338 */ 400 */
@@ -359,6 +421,15 @@ typedef struct {
359 * the synchronization/ordering tag 421 * the synchronization/ordering tag
360 */ 422 */
361 uint64_t tag:32; 423 uint64_t tag:32;
424#else
425 uint64_t tag:32;
426 uint64_t tag_type:2;
427 uint64_t zero_2:1;
428 uint64_t grp:4;
429 uint64_t qos:3;
430 uint64_t ipprt:6;
431 uint64_t len:16;
432#endif
362 433
363 /** 434 /**
364 * WORD 2 HW WRITE: the following 64-bits are filled in by 435 * WORD 2 HW WRITE: the following 64-bits are filled in by
diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h
index 33db1c806b01..774bb45834cb 100644
--- a/arch/mips/include/asm/octeon/cvmx.h
+++ b/arch/mips/include/asm/octeon/cvmx.h
@@ -436,14 +436,6 @@ static inline uint64_t cvmx_get_cycle_global(void)
436 436
437/***************************************************************************/ 437/***************************************************************************/
438 438
439static inline void cvmx_reset_octeon(void)
440{
441 union cvmx_ciu_soft_rst ciu_soft_rst;
442 ciu_soft_rst.u64 = 0;
443 ciu_soft_rst.s.soft_rst = 1;
444 cvmx_write_csr(CVMX_CIU_SOFT_RST, ciu_soft_rst.u64);
445}
446
447/* Return the number of cores available in the chip */ 439/* Return the number of cores available in the chip */
448static inline uint32_t cvmx_octeon_num_cores(void) 440static inline uint32_t cvmx_octeon_num_cores(void)
449{ 441{
diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h
index 041596570856..de9f74ee5dd0 100644
--- a/arch/mips/include/asm/octeon/octeon.h
+++ b/arch/mips/include/asm/octeon/octeon.h
@@ -335,4 +335,6 @@ void octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t);
335 335
336extern void octeon_fixup_irqs(void); 336extern void octeon_fixup_irqs(void);
337 337
338extern struct semaphore octeon_bootbus_sem;
339
338#endif /* __ASM_OCTEON_OCTEON_H */ 340#endif /* __ASM_OCTEON_OCTEON_H */
diff --git a/arch/mips/include/asm/octeon/pci-octeon.h b/arch/mips/include/asm/octeon/pci-octeon.h
index 64ba56a02843..1884609741a8 100644
--- a/arch/mips/include/asm/octeon/pci-octeon.h
+++ b/arch/mips/include/asm/octeon/pci-octeon.h
@@ -11,9 +11,6 @@
11 11
12#include <linux/pci.h> 12#include <linux/pci.h>
13 13
14/* Some PCI cards require delays when accessing config space. */
15#define PCI_CONFIG_SPACE_DELAY 10000
16
17/* 14/*
18 * The physical memory base mapped by BAR1. 256MB at the end of the 15 * The physical memory base mapped by BAR1. 256MB at the end of the
19 * first 4GB. 16 * first 4GB.
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index 154b70a10483..89dd7fed1a57 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -105,8 +105,6 @@ static inline void clear_user_page(void *addr, unsigned long vaddr,
105 flush_data_cache_page((unsigned long)addr); 105 flush_data_cache_page((unsigned long)addr);
106} 106}
107 107
108extern void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
109 struct page *to);
110struct vm_area_struct; 108struct vm_area_struct;
111extern void copy_user_highpage(struct page *to, struct page *from, 109extern void copy_user_highpage(struct page *to, struct page *from,
112 unsigned long vaddr, struct vm_area_struct *vma); 110 unsigned long vaddr, struct vm_area_struct *vma);
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 193b4c6b7541..d9692993fc83 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -35,6 +35,8 @@ struct pci_controller {
35 struct resource *io_resource; 35 struct resource *io_resource;
36 unsigned long io_offset; 36 unsigned long io_offset;
37 unsigned long io_map_base; 37 unsigned long io_map_base;
38 struct resource *busn_resource;
39 unsigned long busn_offset;
38 40
39 unsigned int index; 41 unsigned int index;
40 /* For compatibility with current (as of July 2003) pciutils 42 /* For compatibility with current (as of July 2003) pciutils
diff --git a/arch/mips/include/asm/pci/bridge.h b/arch/mips/include/asm/pci/bridge.h
index af2c8a351ca7..8d7a63b52ac7 100644
--- a/arch/mips/include/asm/pci/bridge.h
+++ b/arch/mips/include/asm/pci/bridge.h
@@ -835,6 +835,7 @@ struct bridge_controller {
835 struct pci_controller pc; 835 struct pci_controller pc;
836 struct resource mem; 836 struct resource mem;
837 struct resource io; 837 struct resource io;
838 struct resource busn;
838 bridge_t *base; 839 bridge_t *base;
839 nasid_t nasid; 840 nasid_t nasid;
840 unsigned int widget_id; 841 unsigned int widget_id;
diff --git a/arch/mips/include/asm/pgtable-32.h b/arch/mips/include/asm/pgtable-32.h
index a6be006b6f75..7d56686c0e62 100644
--- a/arch/mips/include/asm/pgtable-32.h
+++ b/arch/mips/include/asm/pgtable-32.h
@@ -105,13 +105,16 @@ static inline void pmd_clear(pmd_t *pmdp)
105 105
106#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 106#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
107#define pte_page(x) pfn_to_page(pte_pfn(x)) 107#define pte_page(x) pfn_to_page(pte_pfn(x))
108#define pte_pfn(x) ((unsigned long)((x).pte_high >> 6)) 108#define pte_pfn(x) (((unsigned long)((x).pte_high >> _PFN_SHIFT)) | (unsigned long)((x).pte_low << _PAGE_PRESENT_SHIFT))
109static inline pte_t 109static inline pte_t
110pfn_pte(unsigned long pfn, pgprot_t prot) 110pfn_pte(unsigned long pfn, pgprot_t prot)
111{ 111{
112 pte_t pte; 112 pte_t pte;
113 pte.pte_high = (pfn << 6) | (pgprot_val(prot) & 0x3f); 113
114 pte.pte_low = pgprot_val(prot); 114 pte.pte_low = (pfn >> _PAGE_PRESENT_SHIFT) |
115 (pgprot_val(prot) & ~_PFNX_MASK);
116 pte.pte_high = (pfn << _PFN_SHIFT) |
117 (pgprot_val(prot) & ~_PFN_MASK);
115 return pte; 118 return pte;
116} 119}
117 120
@@ -166,9 +169,9 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
166#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 169#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
167 170
168/* Swap entries must have VALID and GLOBAL bits cleared. */ 171/* Swap entries must have VALID and GLOBAL bits cleared. */
169#define __swp_type(x) (((x).val >> 2) & 0x1f) 172#define __swp_type(x) (((x).val >> 4) & 0x1f)
170#define __swp_offset(x) ((x).val >> 7) 173#define __swp_offset(x) ((x).val >> 9)
171#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 2) | ((offset) << 7) }) 174#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 4) | ((offset) << 9) })
172#define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_high }) 175#define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_high })
173#define __swp_entry_to_pte(x) ((pte_t) { 0, (x).val }) 176#define __swp_entry_to_pte(x) ((pte_t) { 0, (x).val })
174 177
diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
index 1659bb91ae21..cf661a2fb141 100644
--- a/arch/mips/include/asm/pgtable-64.h
+++ b/arch/mips/include/asm/pgtable-64.h
@@ -279,14 +279,14 @@ extern void pgd_init(unsigned long page);
279extern void pmd_init(unsigned long page, unsigned long pagetable); 279extern void pmd_init(unsigned long page, unsigned long pagetable);
280 280
281/* 281/*
282 * Non-present pages: high 24 bits are offset, next 8 bits type, 282 * Non-present pages: high 40 bits are offset, next 8 bits type,
283 * low 32 bits zero. 283 * low 16 bits zero.
284 */ 284 */
285static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset) 285static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
286{ pte_t pte; pte_val(pte) = (type << 32) | (offset << 40); return pte; } 286{ pte_t pte; pte_val(pte) = (type << 16) | (offset << 24); return pte; }
287 287
288#define __swp_type(x) (((x).val >> 32) & 0xff) 288#define __swp_type(x) (((x).val >> 16) & 0xff)
289#define __swp_offset(x) ((x).val >> 40) 289#define __swp_offset(x) ((x).val >> 24)
290#define __swp_entry(type, offset) ((swp_entry_t) { pte_val(mk_swap_pte((type), (offset))) }) 290#define __swp_entry(type, offset) ((swp_entry_t) { pte_val(mk_swap_pte((type), (offset))) })
291#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 291#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
292#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 292#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h
index 91747c282bb3..18ae5ddef118 100644
--- a/arch/mips/include/asm/pgtable-bits.h
+++ b/arch/mips/include/asm/pgtable-bits.h
@@ -37,7 +37,11 @@
37/* 37/*
38 * The following bits are implemented by the TLB hardware 38 * The following bits are implemented by the TLB hardware
39 */ 39 */
40#define _PAGE_GLOBAL_SHIFT 0 40#define _PAGE_NO_EXEC_SHIFT 0
41#define _PAGE_NO_EXEC (1 << _PAGE_NO_EXEC_SHIFT)
42#define _PAGE_NO_READ_SHIFT (_PAGE_NO_EXEC_SHIFT + 1)
43#define _PAGE_NO_READ (1 << _PAGE_NO_READ_SHIFT)
44#define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1)
41#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT) 45#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
42#define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1) 46#define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1)
43#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT) 47#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT)
@@ -49,7 +53,7 @@
49/* 53/*
50 * The following bits are implemented in software 54 * The following bits are implemented in software
51 */ 55 */
52#define _PAGE_PRESENT_SHIFT (_CACHE_SHIFT + 3) 56#define _PAGE_PRESENT_SHIFT (24)
53#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT) 57#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
54#define _PAGE_READ_SHIFT (_PAGE_PRESENT_SHIFT + 1) 58#define _PAGE_READ_SHIFT (_PAGE_PRESENT_SHIFT + 1)
55#define _PAGE_READ (1 << _PAGE_READ_SHIFT) 59#define _PAGE_READ (1 << _PAGE_READ_SHIFT)
@@ -62,6 +66,11 @@
62 66
63#define _PFN_SHIFT (PAGE_SHIFT - 12 + _CACHE_SHIFT + 3) 67#define _PFN_SHIFT (PAGE_SHIFT - 12 + _CACHE_SHIFT + 3)
64 68
69/*
70 * Bits for extended EntryLo0/EntryLo1 registers
71 */
72#define _PFNX_MASK 0xffffff
73
65#elif defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) 74#elif defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
66 75
67/* 76/*
@@ -95,11 +104,7 @@
95 104
96#else 105#else
97/* 106/*
98 * When using the RI/XI bit support, we have 13 bits of flags below 107 * Below are the "Normal" R4K cases
99 * the physical address. The RI/XI bits are placed such that a SRL 5
100 * can strip off the software bits, then a ROTR 2 can move the RI/XI
101 * into bits [63:62]. This also limits physical address to 56 bits,
102 * which is more than we need right now.
103 */ 108 */
104 109
105/* 110/*
@@ -107,38 +112,59 @@
107 */ 112 */
108#define _PAGE_PRESENT_SHIFT 0 113#define _PAGE_PRESENT_SHIFT 0
109#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT) 114#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
110#define _PAGE_READ_SHIFT (cpu_has_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1) 115/* R2 or later cores check for RI/XI support to determine _PAGE_READ */
111#define _PAGE_READ ({BUG_ON(cpu_has_rixi); 1 << _PAGE_READ_SHIFT; }) 116#ifdef CONFIG_CPU_MIPSR2
117#define _PAGE_WRITE_SHIFT (_PAGE_PRESENT_SHIFT + 1)
118#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
119#else
120#define _PAGE_READ_SHIFT (_PAGE_PRESENT_SHIFT + 1)
121#define _PAGE_READ (1 << _PAGE_READ_SHIFT)
112#define _PAGE_WRITE_SHIFT (_PAGE_READ_SHIFT + 1) 122#define _PAGE_WRITE_SHIFT (_PAGE_READ_SHIFT + 1)
113#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT) 123#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
124#endif
114#define _PAGE_ACCESSED_SHIFT (_PAGE_WRITE_SHIFT + 1) 125#define _PAGE_ACCESSED_SHIFT (_PAGE_WRITE_SHIFT + 1)
115#define _PAGE_ACCESSED (1 << _PAGE_ACCESSED_SHIFT) 126#define _PAGE_ACCESSED (1 << _PAGE_ACCESSED_SHIFT)
116#define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1) 127#define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1)
117#define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT) 128#define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT)
118 129
119#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT 130#if defined(CONFIG_64BIT) && defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)
120/* huge tlb page */ 131/* Huge TLB page */
121#define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT + 1) 132#define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
122#define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT) 133#define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT)
123#define _PAGE_SPLITTING_SHIFT (_PAGE_HUGE_SHIFT + 1) 134#define _PAGE_SPLITTING_SHIFT (_PAGE_HUGE_SHIFT + 1)
124#define _PAGE_SPLITTING (1 << _PAGE_SPLITTING_SHIFT) 135#define _PAGE_SPLITTING (1 << _PAGE_SPLITTING_SHIFT)
136
137/* Only R2 or newer cores have the XI bit */
138#ifdef CONFIG_CPU_MIPSR2
139#define _PAGE_NO_EXEC_SHIFT (_PAGE_SPLITTING_SHIFT + 1)
125#else 140#else
126#define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT) 141#define _PAGE_GLOBAL_SHIFT (_PAGE_SPLITTING_SHIFT + 1)
127#define _PAGE_HUGE ({BUG(); 1; }) /* Dummy value */ 142#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
128#define _PAGE_SPLITTING_SHIFT (_PAGE_HUGE_SHIFT) 143#endif /* CONFIG_CPU_MIPSR2 */
129#define _PAGE_SPLITTING ({BUG(); 1; }) /* Dummy value */
130#endif
131 144
132/* Page cannot be executed */ 145#endif /* CONFIG_64BIT && CONFIG_MIPS_HUGE_TLB_SUPPORT */
133#define _PAGE_NO_EXEC_SHIFT (cpu_has_rixi ? _PAGE_SPLITTING_SHIFT + 1 : _PAGE_SPLITTING_SHIFT)
134#define _PAGE_NO_EXEC ({BUG_ON(!cpu_has_rixi); 1 << _PAGE_NO_EXEC_SHIFT; })
135 146
136/* Page cannot be read */ 147#ifdef CONFIG_CPU_MIPSR2
137#define _PAGE_NO_READ_SHIFT (cpu_has_rixi ? _PAGE_NO_EXEC_SHIFT + 1 : _PAGE_NO_EXEC_SHIFT) 148/* XI - page cannot be executed */
138#define _PAGE_NO_READ ({BUG_ON(!cpu_has_rixi); 1 << _PAGE_NO_READ_SHIFT; }) 149#ifndef _PAGE_NO_EXEC_SHIFT
150#define _PAGE_NO_EXEC_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
151#endif
152#define _PAGE_NO_EXEC (cpu_has_rixi ? (1 << _PAGE_NO_EXEC_SHIFT) : 0)
153
154/* RI - page cannot be read */
155#define _PAGE_READ_SHIFT (_PAGE_NO_EXEC_SHIFT + 1)
156#define _PAGE_READ (cpu_has_rixi ? 0 : (1 << _PAGE_READ_SHIFT))
157#define _PAGE_NO_READ_SHIFT _PAGE_READ_SHIFT
158#define _PAGE_NO_READ (cpu_has_rixi ? (1 << _PAGE_READ_SHIFT) : 0)
139 159
140#define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1) 160#define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1)
141#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT) 161#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
162
163#else /* !CONFIG_CPU_MIPSR2 */
164#define _PAGE_GLOBAL_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
165#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
166#endif /* CONFIG_CPU_MIPSR2 */
167
142#define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1) 168#define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1)
143#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT) 169#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT)
144#define _PAGE_DIRTY_SHIFT (_PAGE_VALID_SHIFT + 1) 170#define _PAGE_DIRTY_SHIFT (_PAGE_VALID_SHIFT + 1)
@@ -150,18 +176,26 @@
150 176
151#endif /* defined(CONFIG_PHYS_ADDR_T_64BIT && defined(CONFIG_CPU_MIPS32) */ 177#endif /* defined(CONFIG_PHYS_ADDR_T_64BIT && defined(CONFIG_CPU_MIPS32) */
152 178
179#ifndef _PAGE_NO_EXEC
180#define _PAGE_NO_EXEC 0
181#endif
182#ifndef _PAGE_NO_READ
183#define _PAGE_NO_READ 0
184#endif
185
153#define _PAGE_SILENT_READ _PAGE_VALID 186#define _PAGE_SILENT_READ _PAGE_VALID
154#define _PAGE_SILENT_WRITE _PAGE_DIRTY 187#define _PAGE_SILENT_WRITE _PAGE_DIRTY
155 188
156#define _PFN_MASK (~((1 << (_PFN_SHIFT)) - 1)) 189#define _PFN_MASK (~((1 << (_PFN_SHIFT)) - 1))
157 190
158#ifndef _PAGE_NO_READ 191/*
159#define _PAGE_NO_READ ({BUG(); 0; }) 192 * The final layouts of the PTE bits are:
160#define _PAGE_NO_READ_SHIFT ({BUG(); 0; }) 193 *
161#endif 194 * 64-bit, R1 or earlier: CCC D V G [S H] M A W R P
162#ifndef _PAGE_NO_EXEC 195 * 32-bit, R1 or earler: CCC D V G M A W R P
163#define _PAGE_NO_EXEC ({BUG(); 0; }) 196 * 64-bit, R2 or later: CCC D V G RI/R XI [S H] M A W P
164#endif 197 * 32-bit, R2 or later: CCC D V G RI/R XI M A W P
198 */
165 199
166 200
167#ifndef __ASSEMBLY__ 201#ifndef __ASSEMBLY__
@@ -171,6 +205,7 @@
171 */ 205 */
172static inline uint64_t pte_to_entrylo(unsigned long pte_val) 206static inline uint64_t pte_to_entrylo(unsigned long pte_val)
173{ 207{
208#ifdef CONFIG_CPU_MIPSR2
174 if (cpu_has_rixi) { 209 if (cpu_has_rixi) {
175 int sa; 210 int sa;
176#ifdef CONFIG_32BIT 211#ifdef CONFIG_32BIT
@@ -186,6 +221,7 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)
186 return (pte_val >> _PAGE_GLOBAL_SHIFT) | 221 return (pte_val >> _PAGE_GLOBAL_SHIFT) |
187 ((pte_val & (_PAGE_NO_EXEC | _PAGE_NO_READ)) << sa); 222 ((pte_val & (_PAGE_NO_EXEC | _PAGE_NO_READ)) << sa);
188 } 223 }
224#endif
189 225
190 return pte_val >> _PAGE_GLOBAL_SHIFT; 226 return pte_val >> _PAGE_GLOBAL_SHIFT;
191} 227}
@@ -245,7 +281,7 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)
245#define _CACHE_UNCACHED_ACCELERATED (7<<_CACHE_SHIFT) 281#define _CACHE_UNCACHED_ACCELERATED (7<<_CACHE_SHIFT)
246#endif 282#endif
247 283
248#define __READABLE (_PAGE_SILENT_READ | _PAGE_ACCESSED | (cpu_has_rixi ? 0 : _PAGE_READ)) 284#define __READABLE (_PAGE_SILENT_READ | _PAGE_READ | _PAGE_ACCESSED)
249#define __WRITEABLE (_PAGE_SILENT_WRITE | _PAGE_WRITE | _PAGE_MODIFIED) 285#define __WRITEABLE (_PAGE_SILENT_WRITE | _PAGE_WRITE | _PAGE_MODIFIED)
250 286
251#define _PAGE_CHG_MASK (_PAGE_ACCESSED | _PAGE_MODIFIED | \ 287#define _PAGE_CHG_MASK (_PAGE_ACCESSED | _PAGE_MODIFIED | \
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
index bef782c4a44b..819af9d057a8 100644
--- a/arch/mips/include/asm/pgtable.h
+++ b/arch/mips/include/asm/pgtable.h
@@ -24,17 +24,17 @@ struct mm_struct;
24struct vm_area_struct; 24struct vm_area_struct;
25 25
26#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT) 26#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
27#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | (cpu_has_rixi ? 0 : _PAGE_READ) | \ 27#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | \
28 _page_cachable_default) 28 _page_cachable_default)
29#define PAGE_COPY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \ 29#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_NO_EXEC | \
30 (cpu_has_rixi ? _PAGE_NO_EXEC : 0) | _page_cachable_default) 30 _page_cachable_default)
31#define PAGE_READONLY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \ 31#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | \
32 _page_cachable_default) 32 _page_cachable_default)
33#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ 33#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
34 _PAGE_GLOBAL | _page_cachable_default) 34 _PAGE_GLOBAL | _page_cachable_default)
35#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ 35#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
36 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT) 36 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
37#define PAGE_USERIO __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \ 37#define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
38 _page_cachable_default) 38 _page_cachable_default)
39#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \ 39#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
40 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED) 40 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
@@ -127,13 +127,9 @@ do { \
127 } \ 127 } \
128} while(0) 128} while(0)
129 129
130
131extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
132 pte_t pteval);
133
134#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 130#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
135 131
136#define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL)) 132#define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL))
137#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT) 133#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
138 134
139static inline void set_pte(pte_t *ptep, pte_t pte) 135static inline void set_pte(pte_t *ptep, pte_t pte)
@@ -142,18 +138,17 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
142 smp_wmb(); 138 smp_wmb();
143 ptep->pte_low = pte.pte_low; 139 ptep->pte_low = pte.pte_low;
144 140
145 if (pte.pte_low & _PAGE_GLOBAL) { 141 if (pte.pte_high & _PAGE_GLOBAL) {
146 pte_t *buddy = ptep_buddy(ptep); 142 pte_t *buddy = ptep_buddy(ptep);
147 /* 143 /*
148 * Make sure the buddy is global too (if it's !none, 144 * Make sure the buddy is global too (if it's !none,
149 * it better already be global) 145 * it better already be global)
150 */ 146 */
151 if (pte_none(*buddy)) { 147 if (pte_none(*buddy))
152 buddy->pte_low |= _PAGE_GLOBAL;
153 buddy->pte_high |= _PAGE_GLOBAL; 148 buddy->pte_high |= _PAGE_GLOBAL;
154 }
155 } 149 }
156} 150}
151#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
157 152
158static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 153static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
159{ 154{
@@ -161,8 +156,8 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt
161 156
162 htw_stop(); 157 htw_stop();
163 /* Preserve global status for the pair */ 158 /* Preserve global status for the pair */
164 if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL) 159 if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
165 null.pte_low = null.pte_high = _PAGE_GLOBAL; 160 null.pte_high = _PAGE_GLOBAL;
166 161
167 set_pte_at(mm, addr, ptep, null); 162 set_pte_at(mm, addr, ptep, null);
168 htw_start(); 163 htw_start();
@@ -192,6 +187,7 @@ static inline void set_pte(pte_t *ptep, pte_t pteval)
192 } 187 }
193#endif 188#endif
194} 189}
190#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
195 191
196static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 192static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
197{ 193{
@@ -242,21 +238,21 @@ static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
242 238
243static inline pte_t pte_wrprotect(pte_t pte) 239static inline pte_t pte_wrprotect(pte_t pte)
244{ 240{
245 pte.pte_low &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); 241 pte.pte_low &= ~_PAGE_WRITE;
246 pte.pte_high &= ~_PAGE_SILENT_WRITE; 242 pte.pte_high &= ~_PAGE_SILENT_WRITE;
247 return pte; 243 return pte;
248} 244}
249 245
250static inline pte_t pte_mkclean(pte_t pte) 246static inline pte_t pte_mkclean(pte_t pte)
251{ 247{
252 pte.pte_low &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE); 248 pte.pte_low &= ~_PAGE_MODIFIED;
253 pte.pte_high &= ~_PAGE_SILENT_WRITE; 249 pte.pte_high &= ~_PAGE_SILENT_WRITE;
254 return pte; 250 return pte;
255} 251}
256 252
257static inline pte_t pte_mkold(pte_t pte) 253static inline pte_t pte_mkold(pte_t pte)
258{ 254{
259 pte.pte_low &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ); 255 pte.pte_low &= ~_PAGE_ACCESSED;
260 pte.pte_high &= ~_PAGE_SILENT_READ; 256 pte.pte_high &= ~_PAGE_SILENT_READ;
261 return pte; 257 return pte;
262} 258}
@@ -264,30 +260,24 @@ static inline pte_t pte_mkold(pte_t pte)
264static inline pte_t pte_mkwrite(pte_t pte) 260static inline pte_t pte_mkwrite(pte_t pte)
265{ 261{
266 pte.pte_low |= _PAGE_WRITE; 262 pte.pte_low |= _PAGE_WRITE;
267 if (pte.pte_low & _PAGE_MODIFIED) { 263 if (pte.pte_low & _PAGE_MODIFIED)
268 pte.pte_low |= _PAGE_SILENT_WRITE;
269 pte.pte_high |= _PAGE_SILENT_WRITE; 264 pte.pte_high |= _PAGE_SILENT_WRITE;
270 }
271 return pte; 265 return pte;
272} 266}
273 267
274static inline pte_t pte_mkdirty(pte_t pte) 268static inline pte_t pte_mkdirty(pte_t pte)
275{ 269{
276 pte.pte_low |= _PAGE_MODIFIED; 270 pte.pte_low |= _PAGE_MODIFIED;
277 if (pte.pte_low & _PAGE_WRITE) { 271 if (pte.pte_low & _PAGE_WRITE)
278 pte.pte_low |= _PAGE_SILENT_WRITE;
279 pte.pte_high |= _PAGE_SILENT_WRITE; 272 pte.pte_high |= _PAGE_SILENT_WRITE;
280 }
281 return pte; 273 return pte;
282} 274}
283 275
284static inline pte_t pte_mkyoung(pte_t pte) 276static inline pte_t pte_mkyoung(pte_t pte)
285{ 277{
286 pte.pte_low |= _PAGE_ACCESSED; 278 pte.pte_low |= _PAGE_ACCESSED;
287 if (pte.pte_low & _PAGE_READ) { 279 if (pte.pte_low & _PAGE_READ)
288 pte.pte_low |= _PAGE_SILENT_READ;
289 pte.pte_high |= _PAGE_SILENT_READ; 280 pte.pte_high |= _PAGE_SILENT_READ;
290 }
291 return pte; 281 return pte;
292} 282}
293#else 283#else
@@ -332,13 +322,13 @@ static inline pte_t pte_mkdirty(pte_t pte)
332static inline pte_t pte_mkyoung(pte_t pte) 322static inline pte_t pte_mkyoung(pte_t pte)
333{ 323{
334 pte_val(pte) |= _PAGE_ACCESSED; 324 pte_val(pte) |= _PAGE_ACCESSED;
335 if (cpu_has_rixi) { 325#ifdef CONFIG_CPU_MIPSR2
336 if (!(pte_val(pte) & _PAGE_NO_READ)) 326 if (!(pte_val(pte) & _PAGE_NO_READ))
337 pte_val(pte) |= _PAGE_SILENT_READ; 327 pte_val(pte) |= _PAGE_SILENT_READ;
338 } else { 328 else
339 if (pte_val(pte) & _PAGE_READ) 329#endif
340 pte_val(pte) |= _PAGE_SILENT_READ; 330 if (pte_val(pte) & _PAGE_READ)
341 } 331 pte_val(pte) |= _PAGE_SILENT_READ;
342 return pte; 332 return pte;
343} 333}
344 334
@@ -391,10 +381,10 @@ static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
391#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 381#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
392static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 382static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
393{ 383{
394 pte.pte_low &= _PAGE_CHG_MASK; 384 pte.pte_low &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK);
395 pte.pte_high &= (_PFN_MASK | _CACHE_MASK); 385 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
396 pte.pte_low |= pgprot_val(newprot); 386 pte.pte_low |= pgprot_val(newprot) & ~_PFNX_MASK;
397 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK); 387 pte.pte_high |= pgprot_val(newprot) & ~_PFN_MASK;
398 return pte; 388 return pte;
399} 389}
400#else 390#else
@@ -407,12 +397,15 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
407 397
408extern void __update_tlb(struct vm_area_struct *vma, unsigned long address, 398extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
409 pte_t pte); 399 pte_t pte);
400extern void __update_cache(struct vm_area_struct *vma, unsigned long address,
401 pte_t pte);
410 402
411static inline void update_mmu_cache(struct vm_area_struct *vma, 403static inline void update_mmu_cache(struct vm_area_struct *vma,
412 unsigned long address, pte_t *ptep) 404 unsigned long address, pte_t *ptep)
413{ 405{
414 pte_t pte = *ptep; 406 pte_t pte = *ptep;
415 __update_tlb(vma, address, pte); 407 __update_tlb(vma, address, pte);
408 __update_cache(vma, address, pte);
416} 409}
417 410
418static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 411static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
@@ -534,13 +527,13 @@ static inline pmd_t pmd_mkyoung(pmd_t pmd)
534{ 527{
535 pmd_val(pmd) |= _PAGE_ACCESSED; 528 pmd_val(pmd) |= _PAGE_ACCESSED;
536 529
537 if (cpu_has_rixi) { 530#ifdef CONFIG_CPU_MIPSR2
538 if (!(pmd_val(pmd) & _PAGE_NO_READ)) 531 if (!(pmd_val(pmd) & _PAGE_NO_READ))
539 pmd_val(pmd) |= _PAGE_SILENT_READ; 532 pmd_val(pmd) |= _PAGE_SILENT_READ;
540 } else { 533 else
541 if (pmd_val(pmd) & _PAGE_READ) 534#endif
542 pmd_val(pmd) |= _PAGE_SILENT_READ; 535 if (pmd_val(pmd) & _PAGE_READ)
543 } 536 pmd_val(pmd) |= _PAGE_SILENT_READ;
544 537
545 return pmd; 538 return pmd;
546} 539}
diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h
index 1b22d2da88a1..38902bf97adc 100644
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -12,6 +12,8 @@
12#ifndef _ASM_R4KCACHE_H 12#ifndef _ASM_R4KCACHE_H
13#define _ASM_R4KCACHE_H 13#define _ASM_R4KCACHE_H
14 14
15#include <linux/stringify.h>
16
15#include <asm/asm.h> 17#include <asm/asm.h>
16#include <asm/cacheops.h> 18#include <asm/cacheops.h>
17#include <asm/compiler.h> 19#include <asm/compiler.h>
@@ -344,7 +346,7 @@ static inline void invalidate_tcache_page(unsigned long addr)
344 " cache %1, 0x0a0(%0); cache %1, 0x0b0(%0)\n" \ 346 " cache %1, 0x0a0(%0); cache %1, 0x0b0(%0)\n" \
345 " cache %1, 0x0c0(%0); cache %1, 0x0d0(%0)\n" \ 347 " cache %1, 0x0c0(%0); cache %1, 0x0d0(%0)\n" \
346 " cache %1, 0x0e0(%0); cache %1, 0x0f0(%0)\n" \ 348 " cache %1, 0x0e0(%0); cache %1, 0x0f0(%0)\n" \
347 " addiu $1, $0, 0x100 \n" \ 349 " "__stringify(LONG_ADDIU)" $1, %0, 0x100 \n" \
348 " cache %1, 0x000($1); cache %1, 0x010($1)\n" \ 350 " cache %1, 0x000($1); cache %1, 0x010($1)\n" \
349 " cache %1, 0x020($1); cache %1, 0x030($1)\n" \ 351 " cache %1, 0x020($1); cache %1, 0x030($1)\n" \
350 " cache %1, 0x040($1); cache %1, 0x050($1)\n" \ 352 " cache %1, 0x040($1); cache %1, 0x050($1)\n" \
@@ -368,17 +370,17 @@ static inline void invalidate_tcache_page(unsigned long addr)
368 " cache %1, 0x040(%0); cache %1, 0x060(%0)\n" \ 370 " cache %1, 0x040(%0); cache %1, 0x060(%0)\n" \
369 " cache %1, 0x080(%0); cache %1, 0x0a0(%0)\n" \ 371 " cache %1, 0x080(%0); cache %1, 0x0a0(%0)\n" \
370 " cache %1, 0x0c0(%0); cache %1, 0x0e0(%0)\n" \ 372 " cache %1, 0x0c0(%0); cache %1, 0x0e0(%0)\n" \
371 " addiu $1, %0, 0x100\n" \ 373 " "__stringify(LONG_ADDIU)" $1, %0, 0x100 \n" \
372 " cache %1, 0x000($1); cache %1, 0x020($1)\n" \ 374 " cache %1, 0x000($1); cache %1, 0x020($1)\n" \
373 " cache %1, 0x040($1); cache %1, 0x060($1)\n" \ 375 " cache %1, 0x040($1); cache %1, 0x060($1)\n" \
374 " cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \ 376 " cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \
375 " cache %1, 0x0c0($1); cache %1, 0x0e0($1)\n" \ 377 " cache %1, 0x0c0($1); cache %1, 0x0e0($1)\n" \
376 " addiu $1, $1, 0x100\n" \ 378 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
377 " cache %1, 0x000($1); cache %1, 0x020($1)\n" \ 379 " cache %1, 0x000($1); cache %1, 0x020($1)\n" \
378 " cache %1, 0x040($1); cache %1, 0x060($1)\n" \ 380 " cache %1, 0x040($1); cache %1, 0x060($1)\n" \
379 " cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \ 381 " cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \
380 " cache %1, 0x0c0($1); cache %1, 0x0e0($1)\n" \ 382 " cache %1, 0x0c0($1); cache %1, 0x0e0($1)\n" \
381 " addiu $1, $1, 0x100\n" \ 383 " "__stringify(LONG_ADDIU)" $1, $1, 0x100\n" \
382 " cache %1, 0x000($1); cache %1, 0x020($1)\n" \ 384 " cache %1, 0x000($1); cache %1, 0x020($1)\n" \
383 " cache %1, 0x040($1); cache %1, 0x060($1)\n" \ 385 " cache %1, 0x040($1); cache %1, 0x060($1)\n" \
384 " cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \ 386 " cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \
@@ -396,25 +398,25 @@ static inline void invalidate_tcache_page(unsigned long addr)
396 " .set noat\n" \ 398 " .set noat\n" \
397 " cache %1, 0x000(%0); cache %1, 0x040(%0)\n" \ 399 " cache %1, 0x000(%0); cache %1, 0x040(%0)\n" \
398 " cache %1, 0x080(%0); cache %1, 0x0c0(%0)\n" \ 400 " cache %1, 0x080(%0); cache %1, 0x0c0(%0)\n" \
399 " addiu $1, %0, 0x100\n" \ 401 " "__stringify(LONG_ADDIU)" $1, %0, 0x100 \n" \
400 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \ 402 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
401 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \ 403 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
402 " addiu $1, %0, 0x100\n" \ 404 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
403 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \ 405 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
404 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \ 406 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
405 " addiu $1, %0, 0x100\n" \ 407 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
406 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \ 408 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
407 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \ 409 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
408 " addiu $1, %0, 0x100\n" \ 410 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
409 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \ 411 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
410 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \ 412 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
411 " addiu $1, %0, 0x100\n" \ 413 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
412 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \ 414 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
413 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \ 415 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
414 " addiu $1, %0, 0x100\n" \ 416 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
415 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \ 417 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
416 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \ 418 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
417 " addiu $1, %0, 0x100\n" \ 419 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
418 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \ 420 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
419 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \ 421 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
420 " .set pop\n" \ 422 " .set pop\n" \
@@ -429,39 +431,38 @@ static inline void invalidate_tcache_page(unsigned long addr)
429 " .set mips64r6\n" \ 431 " .set mips64r6\n" \
430 " .set noat\n" \ 432 " .set noat\n" \
431 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 433 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
432 " addiu $1, %0, 0x100\n" \ 434 " "__stringify(LONG_ADDIU)" $1, %0, 0x100 \n" \
433 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 435 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
434 " addiu $1, %0, 0x100\n" \ 436 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
435 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 437 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
436 " addiu $1, %0, 0x100\n" \ 438 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
437 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 439 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
438 " addiu $1, %0, 0x100\n" \ 440 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
439 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 441 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
440 " addiu $1, %0, 0x100\n" \ 442 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
441 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 443 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
442 " addiu $1, %0, 0x100\n" \ 444 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
443 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 445 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
444 " addiu $1, %0, 0x100\n" \ 446 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
445 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 447 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
446 " addiu $1, %0, 0x100\n" \ 448 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
447 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 449 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
448 " addiu $1, %0, 0x100\n" \ 450 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
449 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 451 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
450 " addiu $1, %0, 0x100\n" \ 452 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
451 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 453 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
452 " addiu $1, %0, 0x100\n" \ 454 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
453 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 455 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
454 " addiu $1, %0, 0x100\n" \ 456 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
455 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 457 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
456 " addiu $1, %0, 0x100\n" \ 458 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
457 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 459 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
458 " addiu $1, %0, 0x100\n" \ 460 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
459 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 461 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
460 " addiu $1, %0, 0x100\n" \ 462 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
461 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 463 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
462 " addiu $1, %0, 0x100\n" \ 464 " "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
463 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \ 465 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
464 " addiu $1, %0, 0x100\n" \
465 " .set pop\n" \ 466 " .set pop\n" \
466 : \ 467 : \
467 : "r" (base), \ 468 : "r" (base), \
diff --git a/arch/mips/include/asm/seccomp.h b/arch/mips/include/asm/seccomp.h
index f29c75cf83c6..1d8a2e2c75c1 100644
--- a/arch/mips/include/asm/seccomp.h
+++ b/arch/mips/include/asm/seccomp.h
@@ -2,11 +2,6 @@
2 2
3#include <linux/unistd.h> 3#include <linux/unistd.h>
4 4
5#define __NR_seccomp_read __NR_read
6#define __NR_seccomp_write __NR_write
7#define __NR_seccomp_exit __NR_exit
8#define __NR_seccomp_sigreturn __NR_rt_sigreturn
9
10/* 5/*
11 * Kludge alert: 6 * Kludge alert:
12 * 7 *
@@ -29,4 +24,6 @@
29 24
30#endif /* CONFIG_MIPS32_O32 */ 25#endif /* CONFIG_MIPS32_O32 */
31 26
27#include <asm-generic/seccomp.h>
28
32#endif /* __ASM_SECCOMP_H */ 29#endif /* __ASM_SECCOMP_H */
diff --git a/arch/mips/include/asm/sgi/sgi.h b/arch/mips/include/asm/sgi/sgi.h
index 645cea7c0f8e..b61557151e3f 100644
--- a/arch/mips/include/asm/sgi/sgi.h
+++ b/arch/mips/include/asm/sgi/sgi.h
@@ -22,14 +22,15 @@ enum sgi_mach {
22 ip17, /* R4K UP */ 22 ip17, /* R4K UP */
23 ip19, /* R4K MP */ 23 ip19, /* R4K MP */
24 ip20, /* R4K UP, Indigo */ 24 ip20, /* R4K UP, Indigo */
25 ip21, /* TFP MP */ 25 ip21, /* R8k/TFP MP */
26 ip22, /* R4x00 UP, Indigo2 */ 26 ip22, /* R4x00 UP, Indy, Indigo2 */
27 ip25, /* R10k MP */ 27 ip25, /* R10k MP */
28 ip26, /* TFP UP, Indigo2 */ 28 ip26, /* R8k/TFP UP, Indigo2 */
29 ip27, /* R10k MP, R12k MP, Origin */ 29 ip27, /* R10k MP, R12k MP, R14k MP, Origin 200/2k, Onyx2 */
30 ip28, /* R10k UP, Indigo2 */ 30 ip28, /* R10k UP, Indigo2 Impact R10k */
31 ip30, /* Octane */ 31 ip30, /* R10k MP, R12k MP, R14k MP, Octane */
32 ip32, /* O2 */ 32 ip32, /* R5k UP, RM5200 UP, RM7k UP, R10k UP, R12k UP, O2 */
33 ip35, /* R14k MP, R16k MP, Origin 300/3k, Onyx3, Fuel, Tezro */
33}; 34};
34 35
35extern enum sgi_mach sgimach; 36extern enum sgi_mach sgimach;
diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
index b4548690ade9..1fca2e0793dc 100644
--- a/arch/mips/include/asm/spinlock.h
+++ b/arch/mips/include/asm/spinlock.h
@@ -263,7 +263,7 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
263 if (R10000_LLSC_WAR) { 263 if (R10000_LLSC_WAR) {
264 __asm__ __volatile__( 264 __asm__ __volatile__(
265 "1: ll %1, %2 # arch_read_unlock \n" 265 "1: ll %1, %2 # arch_read_unlock \n"
266 " addiu %1, 1 \n" 266 " addiu %1, -1 \n"
267 " sc %1, %0 \n" 267 " sc %1, %0 \n"
268 " beqzl %1, 1b \n" 268 " beqzl %1, 1b \n"
269 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp) 269 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp)
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index 8408a30c47f3..9c0014e87c17 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -53,10 +53,10 @@ struct thread_info {
53#define init_stack (init_thread_union.stack) 53#define init_stack (init_thread_union.stack)
54 54
55/* How to get the thread information struct from C. */ 55/* How to get the thread information struct from C. */
56register struct thread_info *__current_thread_info __asm__("$28");
57
56static inline struct thread_info *current_thread_info(void) 58static inline struct thread_info *current_thread_info(void)
57{ 59{
58 register struct thread_info *__current_thread_info __asm__("$28");
59
60 return __current_thread_info; 60 return __current_thread_info;
61} 61}
62 62
diff --git a/arch/mips/jz4740/Platform b/arch/mips/jz4740/Platform
index ba91be9c21ef..c41d30080098 100644
--- a/arch/mips/jz4740/Platform
+++ b/arch/mips/jz4740/Platform
@@ -1,3 +1,4 @@
1platform-$(CONFIG_MACH_JZ4740) += jz4740/ 1platform-$(CONFIG_MACH_JZ4740) += jz4740/
2cflags-$(CONFIG_MACH_JZ4740) += -I$(srctree)/arch/mips/include/asm/mach-jz4740 2cflags-$(CONFIG_MACH_JZ4740) += -I$(srctree)/arch/mips/include/asm/mach-jz4740
3load-$(CONFIG_MACH_JZ4740) += 0xffffffff80010000 3load-$(CONFIG_MACH_JZ4740) += 0xffffffff80010000
4zload-$(CONFIG_MACH_JZ4740) += 0xffffffff80600000
diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c
index 5e430ce9ac7e..72b0cecbc17c 100644
--- a/arch/mips/jz4740/time.c
+++ b/arch/mips/jz4740/time.c
@@ -18,6 +18,7 @@
18#include <linux/time.h> 18#include <linux/time.h>
19 19
20#include <linux/clockchips.h> 20#include <linux/clockchips.h>
21#include <linux/sched_clock.h>
21 22
22#include <asm/mach-jz4740/irq.h> 23#include <asm/mach-jz4740/irq.h>
23#include <asm/mach-jz4740/timer.h> 24#include <asm/mach-jz4740/timer.h>
@@ -43,6 +44,11 @@ static struct clocksource jz4740_clocksource = {
43 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 44 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
44}; 45};
45 46
47static u64 notrace jz4740_read_sched_clock(void)
48{
49 return jz4740_timer_get_count(TIMER_CLOCKSOURCE);
50}
51
46static irqreturn_t jz4740_clockevent_irq(int irq, void *devid) 52static irqreturn_t jz4740_clockevent_irq(int irq, void *devid)
47{ 53{
48 struct clock_event_device *cd = devid; 54 struct clock_event_device *cd = devid;
@@ -126,6 +132,8 @@ void __init plat_time_init(void)
126 if (ret) 132 if (ret)
127 printk(KERN_ERR "Failed to register clocksource: %d\n", ret); 133 printk(KERN_ERR "Failed to register clocksource: %d\n", ret);
128 134
135 sched_clock_register(jz4740_read_sched_clock, 16, clk_rate);
136
129 setup_irq(JZ4740_IRQ_TCU0, &timer_irqaction); 137 setup_irq(JZ4740_IRQ_TCU0, &timer_irqaction);
130 138
131 ctrl = JZ_TIMER_CTRL_PRESCALE_16 | JZ_TIMER_CTRL_SRC_EXT; 139 ctrl = JZ_TIMER_CTRL_PRESCALE_16 | JZ_TIMER_CTRL_SRC_EXT;
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index c2e0f45ddf6c..c0c5e5972256 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -36,8 +36,10 @@ int __isa_exception_epc(struct pt_regs *regs)
36 return epc; 36 return epc;
37 } 37 }
38 if (cpu_has_mips16) { 38 if (cpu_has_mips16) {
39 if (((union mips16e_instruction)inst).ri.opcode 39 union mips16e_instruction inst_mips16e;
40 == MIPS16e_jal_op) 40
41 inst_mips16e.full = inst;
42 if (inst_mips16e.ri.opcode == MIPS16e_jal_op)
41 epc += 4; 43 epc += 4;
42 else 44 else
43 epc += 2; 45 epc += 2;
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 82bd2b278a24..d70c4d893219 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -37,6 +37,24 @@ void mips_set_clock_mode(enum clock_event_mode mode,
37DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device); 37DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device);
38int cp0_timer_irq_installed; 38int cp0_timer_irq_installed;
39 39
40/*
41 * Possibly handle a performance counter interrupt.
42 * Return true if the timer interrupt should not be checked
43 */
44static inline int handle_perf_irq(int r2)
45{
46 /*
47 * The performance counter overflow interrupt may be shared with the
48 * timer interrupt (cp0_perfcount_irq < 0). If it is and a
49 * performance counter has overflowed (perf_irq() == IRQ_HANDLED)
50 * and we can't reliably determine if a counter interrupt has also
51 * happened (!r2) then don't check for a timer interrupt.
52 */
53 return (cp0_perfcount_irq < 0) &&
54 perf_irq() == IRQ_HANDLED &&
55 !r2;
56}
57
40irqreturn_t c0_compare_interrupt(int irq, void *dev_id) 58irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
41{ 59{
42 const int r2 = cpu_has_mips_r2_r6; 60 const int r2 = cpu_has_mips_r2_r6;
@@ -50,27 +68,32 @@ irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
50 * the performance counter interrupt handler anyway. 68 * the performance counter interrupt handler anyway.
51 */ 69 */
52 if (handle_perf_irq(r2)) 70 if (handle_perf_irq(r2))
53 goto out; 71 return IRQ_HANDLED;
54 72
55 /* 73 /*
56 * The same applies to performance counter interrupts. But with the 74 * The same applies to performance counter interrupts. But with the
57 * above we now know that the reason we got here must be a timer 75 * above we now know that the reason we got here must be a timer
58 * interrupt. Being the paranoiacs we are we check anyway. 76 * interrupt. Being the paranoiacs we are we check anyway.
59 */ 77 */
60 if (!r2 || (read_c0_cause() & (1 << 30))) { 78 if (!r2 || (read_c0_cause() & CAUSEF_TI)) {
61 /* Clear Count/Compare Interrupt */ 79 /* Clear Count/Compare Interrupt */
62 write_c0_compare(read_c0_compare()); 80 write_c0_compare(read_c0_compare());
63 cd = &per_cpu(mips_clockevent_device, cpu); 81 cd = &per_cpu(mips_clockevent_device, cpu);
64 cd->event_handler(cd); 82 cd->event_handler(cd);
83
84 return IRQ_HANDLED;
65 } 85 }
66 86
67out: 87 return IRQ_NONE;
68 return IRQ_HANDLED;
69} 88}
70 89
71struct irqaction c0_compare_irqaction = { 90struct irqaction c0_compare_irqaction = {
72 .handler = c0_compare_interrupt, 91 .handler = c0_compare_interrupt,
73 .flags = IRQF_PERCPU | IRQF_TIMER, 92 /*
93 * IRQF_SHARED: The timer interrupt may be shared with other interrupts
94 * such as perf counter and FDC interrupts.
95 */
96 .flags = IRQF_PERCPU | IRQF_TIMER | IRQF_SHARED,
74 .name = "timer", 97 .name = "timer",
75}; 98};
76 99
diff --git a/arch/mips/kernel/cevt-txx9.c b/arch/mips/kernel/cevt-txx9.c
index 2ae08462e46e..723932441ecc 100644
--- a/arch/mips/kernel/cevt-txx9.c
+++ b/arch/mips/kernel/cevt-txx9.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/irq.h> 16#include <linux/irq.h>
17#include <linux/sched_clock.h>
17#include <asm/time.h> 18#include <asm/time.h>
18#include <asm/txx9tmr.h> 19#include <asm/txx9tmr.h>
19 20
@@ -46,6 +47,11 @@ static struct txx9_clocksource txx9_clocksource = {
46 }, 47 },
47}; 48};
48 49
50static u64 notrace txx9_read_sched_clock(void)
51{
52 return __raw_readl(&txx9_clocksource.tmrptr->trr);
53}
54
49void __init txx9_clocksource_init(unsigned long baseaddr, 55void __init txx9_clocksource_init(unsigned long baseaddr,
50 unsigned int imbusclk) 56 unsigned int imbusclk)
51{ 57{
@@ -61,6 +67,9 @@ void __init txx9_clocksource_init(unsigned long baseaddr,
61 __raw_writel(1 << TXX9_CLOCKSOURCE_BITS, &tmrptr->cpra); 67 __raw_writel(1 << TXX9_CLOCKSOURCE_BITS, &tmrptr->cpra);
62 __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr); 68 __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr);
63 txx9_clocksource.tmrptr = tmrptr; 69 txx9_clocksource.tmrptr = tmrptr;
70
71 sched_clock_register(txx9_read_sched_clock, TXX9_CLOCKSOURCE_BITS,
72 TIMER_CLK(imbusclk));
64} 73}
65 74
66struct txx9_clock_event_device { 75struct txx9_clock_event_device {
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 48dfb9de853d..e36515dcd3b2 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -20,6 +20,7 @@
20 20
21#include <asm/bugs.h> 21#include <asm/bugs.h>
22#include <asm/cpu.h> 22#include <asm/cpu.h>
23#include <asm/cpu-features.h>
23#include <asm/cpu-type.h> 24#include <asm/cpu-type.h>
24#include <asm/fpu.h> 25#include <asm/fpu.h>
25#include <asm/mipsregs.h> 26#include <asm/mipsregs.h>
@@ -31,11 +32,127 @@
31#include <asm/spram.h> 32#include <asm/spram.h>
32#include <asm/uaccess.h> 33#include <asm/uaccess.h>
33 34
35/*
36 * Get the FPU Implementation/Revision.
37 */
38static inline unsigned long cpu_get_fpu_id(void)
39{
40 unsigned long tmp, fpu_id;
41
42 tmp = read_c0_status();
43 __enable_fpu(FPU_AS_IS);
44 fpu_id = read_32bit_cp1_register(CP1_REVISION);
45 write_c0_status(tmp);
46 return fpu_id;
47}
48
49/*
50 * Check if the CPU has an external FPU.
51 */
52static inline int __cpu_has_fpu(void)
53{
54 return (cpu_get_fpu_id() & FPIR_IMP_MASK) != FPIR_IMP_NONE;
55}
56
57static inline unsigned long cpu_get_msa_id(void)
58{
59 unsigned long status, msa_id;
60
61 status = read_c0_status();
62 __enable_fpu(FPU_64BIT);
63 enable_msa();
64 msa_id = read_msa_ir();
65 disable_msa();
66 write_c0_status(status);
67 return msa_id;
68}
69
70/*
71 * Determine the FCSR mask for FPU hardware.
72 */
73static inline void cpu_set_fpu_fcsr_mask(struct cpuinfo_mips *c)
74{
75 unsigned long sr, mask, fcsr, fcsr0, fcsr1;
76
77 mask = FPU_CSR_ALL_X | FPU_CSR_ALL_E | FPU_CSR_ALL_S | FPU_CSR_RM;
78
79 sr = read_c0_status();
80 __enable_fpu(FPU_AS_IS);
81
82 fcsr = read_32bit_cp1_register(CP1_STATUS);
83
84 fcsr0 = fcsr & mask;
85 write_32bit_cp1_register(CP1_STATUS, fcsr0);
86 fcsr0 = read_32bit_cp1_register(CP1_STATUS);
87
88 fcsr1 = fcsr | ~mask;
89 write_32bit_cp1_register(CP1_STATUS, fcsr1);
90 fcsr1 = read_32bit_cp1_register(CP1_STATUS);
91
92 write_32bit_cp1_register(CP1_STATUS, fcsr);
93
94 write_c0_status(sr);
95
96 c->fpu_msk31 = ~(fcsr0 ^ fcsr1) & ~mask;
97}
98
99/*
100 * Set the FIR feature flags for the FPU emulator.
101 */
102static void cpu_set_nofpu_id(struct cpuinfo_mips *c)
103{
104 u32 value;
105
106 value = 0;
107 if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 |
108 MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2 |
109 MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6))
110 value |= MIPS_FPIR_D | MIPS_FPIR_S;
111 if (c->isa_level & (MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2 |
112 MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6))
113 value |= MIPS_FPIR_F64 | MIPS_FPIR_L | MIPS_FPIR_W;
114 c->fpu_id = value;
115}
116
117/* Determined FPU emulator mask to use for the boot CPU with "nofpu". */
118static unsigned int mips_nofpu_msk31;
119
120/*
121 * Set options for FPU hardware.
122 */
123static void cpu_set_fpu_opts(struct cpuinfo_mips *c)
124{
125 c->fpu_id = cpu_get_fpu_id();
126 mips_nofpu_msk31 = c->fpu_msk31;
127
128 if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 |
129 MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2 |
130 MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6)) {
131 if (c->fpu_id & MIPS_FPIR_3D)
132 c->ases |= MIPS_ASE_MIPS3D;
133 if (c->fpu_id & MIPS_FPIR_FREP)
134 c->options |= MIPS_CPU_FRE;
135 }
136
137 cpu_set_fpu_fcsr_mask(c);
138}
139
140/*
141 * Set options for the FPU emulator.
142 */
143static void cpu_set_nofpu_opts(struct cpuinfo_mips *c)
144{
145 c->options &= ~MIPS_CPU_FPU;
146 c->fpu_msk31 = mips_nofpu_msk31;
147
148 cpu_set_nofpu_id(c);
149}
150
34static int mips_fpu_disabled; 151static int mips_fpu_disabled;
35 152
36static int __init fpu_disable(char *s) 153static int __init fpu_disable(char *s)
37{ 154{
38 cpu_data[0].options &= ~MIPS_CPU_FPU; 155 cpu_set_nofpu_opts(&boot_cpu_data);
39 mips_fpu_disabled = 1; 156 mips_fpu_disabled = 1;
40 157
41 return 1; 158 return 1;
@@ -178,41 +295,6 @@ static inline void set_elf_platform(int cpu, const char *plat)
178 __elf_platform = plat; 295 __elf_platform = plat;
179} 296}
180 297
181/*
182 * Get the FPU Implementation/Revision.
183 */
184static inline unsigned long cpu_get_fpu_id(void)
185{
186 unsigned long tmp, fpu_id;
187
188 tmp = read_c0_status();
189 __enable_fpu(FPU_AS_IS);
190 fpu_id = read_32bit_cp1_register(CP1_REVISION);
191 write_c0_status(tmp);
192 return fpu_id;
193}
194
195/*
196 * Check the CPU has an FPU the official way.
197 */
198static inline int __cpu_has_fpu(void)
199{
200 return (cpu_get_fpu_id() & FPIR_IMP_MASK) != FPIR_IMP_NONE;
201}
202
203static inline unsigned long cpu_get_msa_id(void)
204{
205 unsigned long status, msa_id;
206
207 status = read_c0_status();
208 __enable_fpu(FPU_64BIT);
209 enable_msa();
210 msa_id = read_msa_ir();
211 disable_msa();
212 write_c0_status(status);
213 return msa_id;
214}
215
216static inline void cpu_probe_vmbits(struct cpuinfo_mips *c) 298static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
217{ 299{
218#ifdef __NEED_VMBITS_PROBE 300#ifdef __NEED_VMBITS_PROBE
@@ -441,6 +523,8 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
441 c->htw_seq = 0; 523 c->htw_seq = 0;
442 c->options |= MIPS_CPU_HTW; 524 c->options |= MIPS_CPU_HTW;
443 } 525 }
526 if (config3 & MIPS_CONF3_CDMM)
527 c->options |= MIPS_CPU_CDMM;
444 528
445 return config3 & MIPS_CONF_M; 529 return config3 & MIPS_CONF_M;
446} 530}
@@ -516,6 +600,10 @@ static inline unsigned int decode_config5(struct cpuinfo_mips *c)
516 c->options |= MIPS_CPU_MAAR; 600 c->options |= MIPS_CPU_MAAR;
517 if (config5 & MIPS_CONF5_LLB) 601 if (config5 & MIPS_CONF5_LLB)
518 c->options |= MIPS_CPU_RW_LLB; 602 c->options |= MIPS_CPU_RW_LLB;
603#ifdef CONFIG_XPA
604 if (config5 & MIPS_CONF5_MVH)
605 c->options |= MIPS_CPU_XPA;
606#endif
519 607
520 return config5 & MIPS_CONF_M; 608 return config5 & MIPS_CONF_M;
521} 609}
@@ -575,6 +663,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
575 case PRID_IMP_R2000: 663 case PRID_IMP_R2000:
576 c->cputype = CPU_R2000; 664 c->cputype = CPU_R2000;
577 __cpu_name[cpu] = "R2000"; 665 __cpu_name[cpu] = "R2000";
666 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS;
578 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | 667 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
579 MIPS_CPU_NOFPUEX; 668 MIPS_CPU_NOFPUEX;
580 if (__cpu_has_fpu()) 669 if (__cpu_has_fpu())
@@ -594,6 +683,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
594 c->cputype = CPU_R3000; 683 c->cputype = CPU_R3000;
595 __cpu_name[cpu] = "R3000"; 684 __cpu_name[cpu] = "R3000";
596 } 685 }
686 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS;
597 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | 687 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
598 MIPS_CPU_NOFPUEX; 688 MIPS_CPU_NOFPUEX;
599 if (__cpu_has_fpu()) 689 if (__cpu_has_fpu())
@@ -642,6 +732,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
642 } 732 }
643 733
644 set_isa(c, MIPS_CPU_ISA_III); 734 set_isa(c, MIPS_CPU_ISA_III);
735 c->fpu_msk31 |= FPU_CSR_CONDX;
645 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | 736 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
646 MIPS_CPU_WATCH | MIPS_CPU_VCE | 737 MIPS_CPU_WATCH | MIPS_CPU_VCE |
647 MIPS_CPU_LLSC; 738 MIPS_CPU_LLSC;
@@ -649,6 +740,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
649 break; 740 break;
650 case PRID_IMP_VR41XX: 741 case PRID_IMP_VR41XX:
651 set_isa(c, MIPS_CPU_ISA_III); 742 set_isa(c, MIPS_CPU_ISA_III);
743 c->fpu_msk31 |= FPU_CSR_CONDX;
652 c->options = R4K_OPTS; 744 c->options = R4K_OPTS;
653 c->tlbsize = 32; 745 c->tlbsize = 32;
654 switch (c->processor_id & 0xf0) { 746 switch (c->processor_id & 0xf0) {
@@ -690,6 +782,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
690 c->cputype = CPU_R4300; 782 c->cputype = CPU_R4300;
691 __cpu_name[cpu] = "R4300"; 783 __cpu_name[cpu] = "R4300";
692 set_isa(c, MIPS_CPU_ISA_III); 784 set_isa(c, MIPS_CPU_ISA_III);
785 c->fpu_msk31 |= FPU_CSR_CONDX;
693 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | 786 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
694 MIPS_CPU_LLSC; 787 MIPS_CPU_LLSC;
695 c->tlbsize = 32; 788 c->tlbsize = 32;
@@ -698,6 +791,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
698 c->cputype = CPU_R4600; 791 c->cputype = CPU_R4600;
699 __cpu_name[cpu] = "R4600"; 792 __cpu_name[cpu] = "R4600";
700 set_isa(c, MIPS_CPU_ISA_III); 793 set_isa(c, MIPS_CPU_ISA_III);
794 c->fpu_msk31 |= FPU_CSR_CONDX;
701 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | 795 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
702 MIPS_CPU_LLSC; 796 MIPS_CPU_LLSC;
703 c->tlbsize = 48; 797 c->tlbsize = 48;
@@ -713,11 +807,13 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
713 c->cputype = CPU_R4650; 807 c->cputype = CPU_R4650;
714 __cpu_name[cpu] = "R4650"; 808 __cpu_name[cpu] = "R4650";
715 set_isa(c, MIPS_CPU_ISA_III); 809 set_isa(c, MIPS_CPU_ISA_III);
810 c->fpu_msk31 |= FPU_CSR_CONDX;
716 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC; 811 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC;
717 c->tlbsize = 48; 812 c->tlbsize = 48;
718 break; 813 break;
719 #endif 814 #endif
720 case PRID_IMP_TX39: 815 case PRID_IMP_TX39:
816 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS;
721 c->options = MIPS_CPU_TLB | MIPS_CPU_TX39_CACHE; 817 c->options = MIPS_CPU_TLB | MIPS_CPU_TX39_CACHE;
722 818
723 if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) { 819 if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) {
@@ -743,6 +839,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
743 c->cputype = CPU_R4700; 839 c->cputype = CPU_R4700;
744 __cpu_name[cpu] = "R4700"; 840 __cpu_name[cpu] = "R4700";
745 set_isa(c, MIPS_CPU_ISA_III); 841 set_isa(c, MIPS_CPU_ISA_III);
842 c->fpu_msk31 |= FPU_CSR_CONDX;
746 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | 843 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
747 MIPS_CPU_LLSC; 844 MIPS_CPU_LLSC;
748 c->tlbsize = 48; 845 c->tlbsize = 48;
@@ -751,6 +848,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
751 c->cputype = CPU_TX49XX; 848 c->cputype = CPU_TX49XX;
752 __cpu_name[cpu] = "R49XX"; 849 __cpu_name[cpu] = "R49XX";
753 set_isa(c, MIPS_CPU_ISA_III); 850 set_isa(c, MIPS_CPU_ISA_III);
851 c->fpu_msk31 |= FPU_CSR_CONDX;
754 c->options = R4K_OPTS | MIPS_CPU_LLSC; 852 c->options = R4K_OPTS | MIPS_CPU_LLSC;
755 if (!(c->processor_id & 0x08)) 853 if (!(c->processor_id & 0x08))
756 c->options |= MIPS_CPU_FPU | MIPS_CPU_32FPR; 854 c->options |= MIPS_CPU_FPU | MIPS_CPU_32FPR;
@@ -792,6 +890,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
792 c->cputype = CPU_R6000; 890 c->cputype = CPU_R6000;
793 __cpu_name[cpu] = "R6000"; 891 __cpu_name[cpu] = "R6000";
794 set_isa(c, MIPS_CPU_ISA_II); 892 set_isa(c, MIPS_CPU_ISA_II);
893 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS;
795 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU | 894 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
796 MIPS_CPU_LLSC; 895 MIPS_CPU_LLSC;
797 c->tlbsize = 32; 896 c->tlbsize = 32;
@@ -800,6 +899,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
800 c->cputype = CPU_R6000A; 899 c->cputype = CPU_R6000A;
801 __cpu_name[cpu] = "R6000A"; 900 __cpu_name[cpu] = "R6000A";
802 set_isa(c, MIPS_CPU_ISA_II); 901 set_isa(c, MIPS_CPU_ISA_II);
902 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS;
803 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU | 903 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
804 MIPS_CPU_LLSC; 904 MIPS_CPU_LLSC;
805 c->tlbsize = 32; 905 c->tlbsize = 32;
@@ -850,8 +950,13 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
850 c->tlbsize = 64; 950 c->tlbsize = 64;
851 break; 951 break;
852 case PRID_IMP_R14000: 952 case PRID_IMP_R14000:
853 c->cputype = CPU_R14000; 953 if (((c->processor_id >> 4) & 0x0f) > 2) {
854 __cpu_name[cpu] = "R14000"; 954 c->cputype = CPU_R16000;
955 __cpu_name[cpu] = "R16000";
956 } else {
957 c->cputype = CPU_R14000;
958 __cpu_name[cpu] = "R14000";
959 }
855 set_isa(c, MIPS_CPU_ISA_IV); 960 set_isa(c, MIPS_CPU_ISA_IV);
856 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | 961 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
857 MIPS_CPU_FPU | MIPS_CPU_32FPR | 962 MIPS_CPU_FPU | MIPS_CPU_32FPR |
@@ -866,12 +971,14 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
866 __cpu_name[cpu] = "ICT Loongson-2"; 971 __cpu_name[cpu] = "ICT Loongson-2";
867 set_elf_platform(cpu, "loongson2e"); 972 set_elf_platform(cpu, "loongson2e");
868 set_isa(c, MIPS_CPU_ISA_III); 973 set_isa(c, MIPS_CPU_ISA_III);
974 c->fpu_msk31 |= FPU_CSR_CONDX;
869 break; 975 break;
870 case PRID_REV_LOONGSON2F: 976 case PRID_REV_LOONGSON2F:
871 c->cputype = CPU_LOONGSON2; 977 c->cputype = CPU_LOONGSON2;
872 __cpu_name[cpu] = "ICT Loongson-2"; 978 __cpu_name[cpu] = "ICT Loongson-2";
873 set_elf_platform(cpu, "loongson2f"); 979 set_elf_platform(cpu, "loongson2f");
874 set_isa(c, MIPS_CPU_ISA_III); 980 set_isa(c, MIPS_CPU_ISA_III);
981 c->fpu_msk31 |= FPU_CSR_CONDX;
875 break; 982 break;
876 case PRID_REV_LOONGSON3A: 983 case PRID_REV_LOONGSON3A:
877 c->cputype = CPU_LOONGSON3; 984 c->cputype = CPU_LOONGSON3;
@@ -1308,6 +1415,9 @@ void cpu_probe(void)
1308 c->cputype = CPU_UNKNOWN; 1415 c->cputype = CPU_UNKNOWN;
1309 c->writecombine = _CACHE_UNCACHED; 1416 c->writecombine = _CACHE_UNCACHED;
1310 1417
1418 c->fpu_csr31 = FPU_CSR_RN;
1419 c->fpu_msk31 = FPU_CSR_RSVD | FPU_CSR_ABS2008 | FPU_CSR_NAN2008;
1420
1311 c->processor_id = read_c0_prid(); 1421 c->processor_id = read_c0_prid();
1312 switch (c->processor_id & PRID_COMP_MASK) { 1422 switch (c->processor_id & PRID_COMP_MASK) {
1313 case PRID_COMP_LEGACY: 1423 case PRID_COMP_LEGACY:
@@ -1364,16 +1474,10 @@ void cpu_probe(void)
1364 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); 1474 ~(1 << MIPS_PWCTL_PWEN_SHIFT));
1365 } 1475 }
1366 1476
1367 if (c->options & MIPS_CPU_FPU) { 1477 if (c->options & MIPS_CPU_FPU)
1368 c->fpu_id = cpu_get_fpu_id(); 1478 cpu_set_fpu_opts(c);
1369 1479 else
1370 if (c->isa_level & cpu_has_mips_r) { 1480 cpu_set_nofpu_opts(c);
1371 if (c->fpu_id & MIPS_FPIR_3D)
1372 c->ases |= MIPS_ASE_MIPS3D;
1373 if (c->fpu_id & MIPS_FPIR_FREP)
1374 c->options |= MIPS_CPU_FRE;
1375 }
1376 }
1377 1481
1378 if (cpu_has_mips_r2_r6) { 1482 if (cpu_has_mips_r2_r6) {
1379 c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1; 1483 c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
diff --git a/arch/mips/kernel/csrc-bcm1480.c b/arch/mips/kernel/csrc-bcm1480.c
index 468f3eba4132..7f65b53d1b24 100644
--- a/arch/mips/kernel/csrc-bcm1480.c
+++ b/arch/mips/kernel/csrc-bcm1480.c
@@ -10,12 +10,9 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 13 */
18#include <linux/clocksource.h> 14#include <linux/clocksource.h>
15#include <linux/sched_clock.h>
19 16
20#include <asm/addrspace.h> 17#include <asm/addrspace.h>
21#include <asm/io.h> 18#include <asm/io.h>
@@ -41,6 +38,11 @@ struct clocksource bcm1480_clocksource = {
41 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 38 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
42}; 39};
43 40
41static u64 notrace sb1480_read_sched_clock(void)
42{
43 return __raw_readq(IOADDR(A_SCD_ZBBUS_CYCLE_COUNT));
44}
45
44void __init sb1480_clocksource_init(void) 46void __init sb1480_clocksource_init(void)
45{ 47{
46 struct clocksource *cs = &bcm1480_clocksource; 48 struct clocksource *cs = &bcm1480_clocksource;
@@ -50,4 +52,6 @@ void __init sb1480_clocksource_init(void)
50 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); 52 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
51 zbbus = ((plldiv >> 1) * 50000000) + ((plldiv & 1) * 25000000); 53 zbbus = ((plldiv >> 1) * 50000000) + ((plldiv & 1) * 25000000);
52 clocksource_register_hz(cs, zbbus); 54 clocksource_register_hz(cs, zbbus);
55
56 sched_clock_register(sb1480_read_sched_clock, 64, zbbus);
53} 57}
diff --git a/arch/mips/kernel/csrc-ioasic.c b/arch/mips/kernel/csrc-ioasic.c
index 6cbbf6e106b9..722f5589cd1d 100644
--- a/arch/mips/kernel/csrc-ioasic.c
+++ b/arch/mips/kernel/csrc-ioasic.c
@@ -12,12 +12,9 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */ 15 */
20#include <linux/clocksource.h> 16#include <linux/clocksource.h>
17#include <linux/sched_clock.h>
21#include <linux/init.h> 18#include <linux/init.h>
22 19
23#include <asm/ds1287.h> 20#include <asm/ds1287.h>
@@ -37,6 +34,11 @@ static struct clocksource clocksource_dec = {
37 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 34 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
38}; 35};
39 36
37static u64 notrace dec_ioasic_read_sched_clock(void)
38{
39 return ioasic_read(IO_REG_FCTR);
40}
41
40int __init dec_ioasic_clocksource_init(void) 42int __init dec_ioasic_clocksource_init(void)
41{ 43{
42 unsigned int freq; 44 unsigned int freq;
@@ -65,5 +67,8 @@ int __init dec_ioasic_clocksource_init(void)
65 67
66 clocksource_dec.rating = 200 + freq / 10000000; 68 clocksource_dec.rating = 200 + freq / 10000000;
67 clocksource_register_hz(&clocksource_dec, freq); 69 clocksource_register_hz(&clocksource_dec, freq);
70
71 sched_clock_register(dec_ioasic_read_sched_clock, 32, freq);
72
68 return 0; 73 return 0;
69} 74}
diff --git a/arch/mips/kernel/csrc-r4k.c b/arch/mips/kernel/csrc-r4k.c
index decd1fa38d55..e5ed7ada1433 100644
--- a/arch/mips/kernel/csrc-r4k.c
+++ b/arch/mips/kernel/csrc-r4k.c
@@ -7,6 +7,7 @@
7 */ 7 */
8#include <linux/clocksource.h> 8#include <linux/clocksource.h>
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/sched_clock.h>
10 11
11#include <asm/time.h> 12#include <asm/time.h>
12 13
@@ -22,6 +23,11 @@ static struct clocksource clocksource_mips = {
22 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 23 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
23}; 24};
24 25
26static u64 notrace r4k_read_sched_clock(void)
27{
28 return read_c0_count();
29}
30
25int __init init_r4k_clocksource(void) 31int __init init_r4k_clocksource(void)
26{ 32{
27 if (!cpu_has_counter || !mips_hpt_frequency) 33 if (!cpu_has_counter || !mips_hpt_frequency)
@@ -32,5 +38,7 @@ int __init init_r4k_clocksource(void)
32 38
33 clocksource_register_hz(&clocksource_mips, mips_hpt_frequency); 39 clocksource_register_hz(&clocksource_mips, mips_hpt_frequency);
34 40
41 sched_clock_register(r4k_read_sched_clock, 32, mips_hpt_frequency);
42
35 return 0; 43 return 0;
36} 44}
diff --git a/arch/mips/kernel/csrc-sb1250.c b/arch/mips/kernel/csrc-sb1250.c
index 6ecb77d82063..d915652b4d56 100644
--- a/arch/mips/kernel/csrc-sb1250.c
+++ b/arch/mips/kernel/csrc-sb1250.c
@@ -10,12 +10,9 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 13 */
18#include <linux/clocksource.h> 14#include <linux/clocksource.h>
15#include <linux/sched_clock.h>
19 16
20#include <asm/addrspace.h> 17#include <asm/addrspace.h>
21#include <asm/io.h> 18#include <asm/io.h>
@@ -33,15 +30,22 @@
33 * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over 30 * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over
34 * again. 31 * again.
35 */ 32 */
36static cycle_t sb1250_hpt_read(struct clocksource *cs) 33static inline cycle_t sb1250_hpt_get_cycles(void)
37{ 34{
38 unsigned int count; 35 unsigned int count;
36 void __iomem *addr;
39 37
40 count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT)))); 38 addr = IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT));
39 count = G_SCD_TIMER_CNT(__raw_readq(addr));
41 40
42 return SB1250_HPT_VALUE - count; 41 return SB1250_HPT_VALUE - count;
43} 42}
44 43
44static cycle_t sb1250_hpt_read(struct clocksource *cs)
45{
46 return sb1250_hpt_get_cycles();
47}
48
45struct clocksource bcm1250_clocksource = { 49struct clocksource bcm1250_clocksource = {
46 .name = "bcm1250-counter-3", 50 .name = "bcm1250-counter-3",
47 .rating = 200, 51 .rating = 200,
@@ -50,6 +54,11 @@ struct clocksource bcm1250_clocksource = {
50 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 54 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
51}; 55};
52 56
57static u64 notrace sb1250_read_sched_clock(void)
58{
59 return sb1250_hpt_get_cycles();
60}
61
53void __init sb1250_clocksource_init(void) 62void __init sb1250_clocksource_init(void)
54{ 63{
55 struct clocksource *cs = &bcm1250_clocksource; 64 struct clocksource *cs = &bcm1250_clocksource;
@@ -66,4 +75,6 @@ void __init sb1250_clocksource_init(void)
66 R_SCD_TIMER_CFG))); 75 R_SCD_TIMER_CFG)));
67 76
68 clocksource_register_hz(cs, V_SCD_TIMER_FREQ); 77 clocksource_register_hz(cs, V_SCD_TIMER_FREQ);
78
79 sched_clock_register(sb1250_read_sched_clock, 23, V_SCD_TIMER_FREQ);
69} 80}
diff --git a/arch/mips/kernel/elf.c b/arch/mips/kernel/elf.c
index d2c09f6475c5..be4899f3c393 100644
--- a/arch/mips/kernel/elf.c
+++ b/arch/mips/kernel/elf.c
@@ -131,16 +131,6 @@ int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
131 return 0; 131 return 0;
132} 132}
133 133
134static inline unsigned get_fp_abi(int in_abi)
135{
136 /* If the ABI requirement is provided, simply return that */
137 if (in_abi != MIPS_ABI_FP_UNKNOWN)
138 return in_abi;
139
140 /* Unknown ABI */
141 return MIPS_ABI_FP_UNKNOWN;
142}
143
144int arch_check_elf(void *_ehdr, bool has_interpreter, 134int arch_check_elf(void *_ehdr, bool has_interpreter,
145 struct arch_elf_state *state) 135 struct arch_elf_state *state)
146{ 136{
@@ -151,10 +141,10 @@ int arch_check_elf(void *_ehdr, bool has_interpreter,
151 if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT)) 141 if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT))
152 return 0; 142 return 0;
153 143
154 fp_abi = get_fp_abi(state->fp_abi); 144 fp_abi = state->fp_abi;
155 145
156 if (has_interpreter) { 146 if (has_interpreter) {
157 interp_fp_abi = get_fp_abi(state->interp_fp_abi); 147 interp_fp_abi = state->interp_fp_abi;
158 148
159 abi0 = min(fp_abi, interp_fp_abi); 149 abi0 = min(fp_abi, interp_fp_abi);
160 abi1 = max(fp_abi, interp_fp_abi); 150 abi1 = max(fp_abi, interp_fp_abi);
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index af41ba6db960..7791840cf22c 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -10,6 +10,7 @@
10 10
11#include <asm/asm.h> 11#include <asm/asm.h>
12#include <asm/asmmacro.h> 12#include <asm/asmmacro.h>
13#include <asm/compiler.h>
13#include <asm/regdef.h> 14#include <asm/regdef.h>
14#include <asm/mipsregs.h> 15#include <asm/mipsregs.h>
15#include <asm/stackframe.h> 16#include <asm/stackframe.h>
@@ -185,7 +186,7 @@ syscall_exit_work:
185 * For C code use the inline version named instruction_hazard(). 186 * For C code use the inline version named instruction_hazard().
186 */ 187 */
187LEAF(mips_ihb) 188LEAF(mips_ihb)
188 .set mips32r2 189 .set MIPS_ISA_LEVEL_RAW
189 jr.hb ra 190 jr.hb ra
190 nop 191 nop
191 END(mips_ihb) 192 END(mips_ihb)
diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
index 368c88b7eb6c..e4f62b7875d2 100644
--- a/arch/mips/kernel/idle.c
+++ b/arch/mips/kernel/idle.c
@@ -176,6 +176,17 @@ void __init check_wait(void)
176 cpu_wait = rm7k_wait_irqoff; 176 cpu_wait = rm7k_wait_irqoff;
177 break; 177 break;
178 178
179 case CPU_PROAPTIV:
180 case CPU_P5600:
181 /*
182 * Incoming Fast Debug Channel (FDC) data during a wait
183 * instruction causes the wait never to resume, even if an
184 * interrupt is received. Avoid using wait at all if FDC data is
185 * likely to be received.
186 */
187 if (IS_ENABLED(CONFIG_MIPS_EJTAG_FDC_TTY))
188 break;
189 /* fall through */
179 case CPU_M14KC: 190 case CPU_M14KC:
180 case CPU_M14KEC: 191 case CPU_M14KEC:
181 case CPU_24K: 192 case CPU_24K:
@@ -183,8 +194,6 @@ void __init check_wait(void)
183 case CPU_1004K: 194 case CPU_1004K:
184 case CPU_1074K: 195 case CPU_1074K:
185 case CPU_INTERAPTIV: 196 case CPU_INTERAPTIV:
186 case CPU_PROAPTIV:
187 case CPU_P5600:
188 case CPU_M5150: 197 case CPU_M5150:
189 case CPU_QEMU_GENERIC: 198 case CPU_QEMU_GENERIC:
190 cpu_wait = r4k_wait; 199 cpu_wait = r4k_wait;
diff --git a/arch/mips/kernel/mips-r2-to-r6-emul.c b/arch/mips/kernel/mips-r2-to-r6-emul.c
index 64d17e41093b..f2977f00911b 100644
--- a/arch/mips/kernel/mips-r2-to-r6-emul.c
+++ b/arch/mips/kernel/mips-r2-to-r6-emul.c
@@ -187,7 +187,7 @@ static inline int mipsr6_emul(struct pt_regs *regs, u32 ir)
187} 187}
188 188
189/** 189/**
190 * movt_func - Emulate a MOVT instruction 190 * movf_func - Emulate a MOVF instruction
191 * @regs: Process register set 191 * @regs: Process register set
192 * @ir: Instruction 192 * @ir: Instruction
193 * 193 *
@@ -200,9 +200,12 @@ static int movf_func(struct pt_regs *regs, u32 ir)
200 200
201 csr = current->thread.fpu.fcr31; 201 csr = current->thread.fpu.fcr31;
202 cond = fpucondbit[MIPSInst_RT(ir) >> 2]; 202 cond = fpucondbit[MIPSInst_RT(ir) >> 2];
203
203 if (((csr & cond) == 0) && MIPSInst_RD(ir)) 204 if (((csr & cond) == 0) && MIPSInst_RD(ir))
204 regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)]; 205 regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
206
205 MIPS_R2_STATS(movs); 207 MIPS_R2_STATS(movs);
208
206 return 0; 209 return 0;
207} 210}
208 211
@@ -895,8 +898,9 @@ static inline int mipsr2_find_op_func(struct pt_regs *regs, u32 inst,
895 * mipsr2_decoder: Decode and emulate a MIPS R2 instruction 898 * mipsr2_decoder: Decode and emulate a MIPS R2 instruction
896 * @regs: Process register set 899 * @regs: Process register set
897 * @inst: Instruction to decode and emulate 900 * @inst: Instruction to decode and emulate
901 * @fcr31: Floating Point Control and Status Register returned
898 */ 902 */
899int mipsr2_decoder(struct pt_regs *regs, u32 inst) 903int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31)
900{ 904{
901 int err = 0; 905 int err = 0;
902 unsigned long vaddr; 906 unsigned long vaddr;
@@ -1165,6 +1169,13 @@ fpu_emul:
1165 1169
1166 err = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 0, 1170 err = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 0,
1167 &fault_addr); 1171 &fault_addr);
1172 *fcr31 = current->thread.fpu.fcr31;
1173
1174 /*
1175 * We can't allow the emulated instruction to leave any of
1176 * the cause bits set in $fcr31.
1177 */
1178 current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
1168 1179
1169 /* 1180 /*
1170 * this is a tricky issue - lose_fpu() uses LL/SC atomics 1181 * this is a tricky issue - lose_fpu() uses LL/SC atomics
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index 9466184d0039..cc1b6fadf089 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -558,8 +558,10 @@ static int mipspmu_get_irq(void)
558 if (mipspmu.irq >= 0) { 558 if (mipspmu.irq >= 0) {
559 /* Request my own irq handler. */ 559 /* Request my own irq handler. */
560 err = request_irq(mipspmu.irq, mipsxx_pmu_handle_irq, 560 err = request_irq(mipspmu.irq, mipsxx_pmu_handle_irq,
561 IRQF_PERCPU | IRQF_NOBALANCING | IRQF_NO_THREAD, 561 IRQF_PERCPU | IRQF_NOBALANCING |
562 "mips_perf_pmu", NULL); 562 IRQF_NO_THREAD | IRQF_NO_SUSPEND |
563 IRQF_SHARED,
564 "mips_perf_pmu", &mipspmu);
563 if (err) { 565 if (err) {
564 pr_warn("Unable to request IRQ%d for MIPS performance counters!\n", 566 pr_warn("Unable to request IRQ%d for MIPS performance counters!\n",
565 mipspmu.irq); 567 mipspmu.irq);
@@ -582,7 +584,7 @@ static int mipspmu_get_irq(void)
582static void mipspmu_free_irq(void) 584static void mipspmu_free_irq(void)
583{ 585{
584 if (mipspmu.irq >= 0) 586 if (mipspmu.irq >= 0)
585 free_irq(mipspmu.irq, NULL); 587 free_irq(mipspmu.irq, &mipspmu);
586 else if (cp0_perfcount_irq < 0) 588 else if (cp0_perfcount_irq < 0)
587 perf_irq = save_perf_irq; 589 perf_irq = save_perf_irq;
588} 590}
@@ -775,6 +777,7 @@ static int n_counters(void)
775 777
776 case CPU_R12000: 778 case CPU_R12000:
777 case CPU_R14000: 779 case CPU_R14000:
780 case CPU_R16000:
778 counters = 4; 781 counters = 4;
779 break; 782 break;
780 783
@@ -822,6 +825,13 @@ static const struct mips_perf_event mipsxxcore_event_map2
822 [PERF_COUNT_HW_BRANCH_MISSES] = { 0x27, CNTR_ODD, T }, 825 [PERF_COUNT_HW_BRANCH_MISSES] = { 0x27, CNTR_ODD, T },
823}; 826};
824 827
828static const struct mips_perf_event loongson3_event_map[PERF_COUNT_HW_MAX] = {
829 [PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN },
830 [PERF_COUNT_HW_INSTRUCTIONS] = { 0x00, CNTR_ODD },
831 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = { 0x01, CNTR_EVEN },
832 [PERF_COUNT_HW_BRANCH_MISSES] = { 0x01, CNTR_ODD },
833};
834
825static const struct mips_perf_event octeon_event_map[PERF_COUNT_HW_MAX] = { 835static const struct mips_perf_event octeon_event_map[PERF_COUNT_HW_MAX] = {
826 [PERF_COUNT_HW_CPU_CYCLES] = { 0x01, CNTR_ALL }, 836 [PERF_COUNT_HW_CPU_CYCLES] = { 0x01, CNTR_ALL },
827 [PERF_COUNT_HW_INSTRUCTIONS] = { 0x03, CNTR_ALL }, 837 [PERF_COUNT_HW_INSTRUCTIONS] = { 0x03, CNTR_ALL },
@@ -1005,6 +1015,61 @@ static const struct mips_perf_event mipsxxcore_cache_map2
1005}, 1015},
1006}; 1016};
1007 1017
1018static const struct mips_perf_event loongson3_cache_map
1019 [PERF_COUNT_HW_CACHE_MAX]
1020 [PERF_COUNT_HW_CACHE_OP_MAX]
1021 [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
1022[C(L1D)] = {
1023 /*
1024 * Like some other architectures (e.g. ARM), the performance
1025 * counters don't differentiate between read and write
1026 * accesses/misses, so this isn't strictly correct, but it's the
1027 * best we can do. Writes and reads get combined.
1028 */
1029 [C(OP_READ)] = {
1030 [C(RESULT_MISS)] = { 0x04, CNTR_ODD },
1031 },
1032 [C(OP_WRITE)] = {
1033 [C(RESULT_MISS)] = { 0x04, CNTR_ODD },
1034 },
1035},
1036[C(L1I)] = {
1037 [C(OP_READ)] = {
1038 [C(RESULT_MISS)] = { 0x04, CNTR_EVEN },
1039 },
1040 [C(OP_WRITE)] = {
1041 [C(RESULT_MISS)] = { 0x04, CNTR_EVEN },
1042 },
1043},
1044[C(DTLB)] = {
1045 [C(OP_READ)] = {
1046 [C(RESULT_MISS)] = { 0x09, CNTR_ODD },
1047 },
1048 [C(OP_WRITE)] = {
1049 [C(RESULT_MISS)] = { 0x09, CNTR_ODD },
1050 },
1051},
1052[C(ITLB)] = {
1053 [C(OP_READ)] = {
1054 [C(RESULT_MISS)] = { 0x0c, CNTR_ODD },
1055 },
1056 [C(OP_WRITE)] = {
1057 [C(RESULT_MISS)] = { 0x0c, CNTR_ODD },
1058 },
1059},
1060[C(BPU)] = {
1061 /* Using the same code for *HW_BRANCH* */
1062 [C(OP_READ)] = {
1063 [C(RESULT_ACCESS)] = { 0x02, CNTR_EVEN },
1064 [C(RESULT_MISS)] = { 0x02, CNTR_ODD },
1065 },
1066 [C(OP_WRITE)] = {
1067 [C(RESULT_ACCESS)] = { 0x02, CNTR_EVEN },
1068 [C(RESULT_MISS)] = { 0x02, CNTR_ODD },
1069 },
1070},
1071};
1072
1008/* BMIPS5000 */ 1073/* BMIPS5000 */
1009static const struct mips_perf_event bmips5000_cache_map 1074static const struct mips_perf_event bmips5000_cache_map
1010 [PERF_COUNT_HW_CACHE_MAX] 1075 [PERF_COUNT_HW_CACHE_MAX]
@@ -1539,6 +1604,10 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config)
1539 else 1604 else
1540 raw_event.cntr_mask = 1605 raw_event.cntr_mask =
1541 raw_id > 127 ? CNTR_ODD : CNTR_EVEN; 1606 raw_id > 127 ? CNTR_ODD : CNTR_EVEN;
1607 break;
1608 case CPU_LOONGSON3:
1609 raw_event.cntr_mask = raw_id > 127 ? CNTR_ODD : CNTR_EVEN;
1610 break;
1542 } 1611 }
1543 1612
1544 raw_event.event_id = base_id; 1613 raw_event.event_id = base_id;
@@ -1615,8 +1684,7 @@ init_hw_perf_events(void)
1615 1684
1616 if (get_c0_perfcount_int) 1685 if (get_c0_perfcount_int)
1617 irq = get_c0_perfcount_int(); 1686 irq = get_c0_perfcount_int();
1618 else if ((cp0_perfcount_irq >= 0) && 1687 else if (cp0_perfcount_irq >= 0)
1619 (cp0_compare_irq != cp0_perfcount_irq))
1620 irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq; 1688 irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
1621 else 1689 else
1622 irq = -1; 1690 irq = -1;
@@ -1669,6 +1737,11 @@ init_hw_perf_events(void)
1669 mipspmu.general_event_map = &mipsxxcore_event_map; 1737 mipspmu.general_event_map = &mipsxxcore_event_map;
1670 mipspmu.cache_event_map = &mipsxxcore_cache_map; 1738 mipspmu.cache_event_map = &mipsxxcore_cache_map;
1671 break; 1739 break;
1740 case CPU_LOONGSON3:
1741 mipspmu.name = "mips/loongson3";
1742 mipspmu.general_event_map = &loongson3_event_map;
1743 mipspmu.cache_event_map = &loongson3_cache_map;
1744 break;
1672 case CPU_CAVIUM_OCTEON: 1745 case CPU_CAVIUM_OCTEON:
1673 case CPU_CAVIUM_OCTEON_PLUS: 1746 case CPU_CAVIUM_OCTEON_PLUS:
1674 case CPU_CAVIUM_OCTEON2: 1747 case CPU_CAVIUM_OCTEON2:
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 130af7d26a9c..298b2b773d12 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -120,6 +120,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
120 if (cpu_has_msa) seq_printf(m, "%s", " msa"); 120 if (cpu_has_msa) seq_printf(m, "%s", " msa");
121 if (cpu_has_eva) seq_printf(m, "%s", " eva"); 121 if (cpu_has_eva) seq_printf(m, "%s", " eva");
122 if (cpu_has_htw) seq_printf(m, "%s", " htw"); 122 if (cpu_has_htw) seq_printf(m, "%s", " htw");
123 if (cpu_has_xpa) seq_printf(m, "%s", " xpa");
123 seq_printf(m, "\n"); 124 seq_printf(m, "\n");
124 125
125 if (cpu_has_mmips) { 126 if (cpu_has_mmips) {
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index bf85cc180d91..d295bd1e4996 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -107,8 +107,11 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
107 return 0; 107 return 0;
108} 108}
109 109
110/*
111 * Copy architecture-specific thread state
112 */
110int copy_thread(unsigned long clone_flags, unsigned long usp, 113int copy_thread(unsigned long clone_flags, unsigned long usp,
111 unsigned long arg, struct task_struct *p) 114 unsigned long kthread_arg, struct task_struct *p)
112{ 115{
113 struct thread_info *ti = task_thread_info(p); 116 struct thread_info *ti = task_thread_info(p);
114 struct pt_regs *childregs, *regs = current_pt_regs(); 117 struct pt_regs *childregs, *regs = current_pt_regs();
@@ -123,11 +126,12 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
123 childksp = (unsigned long) childregs; 126 childksp = (unsigned long) childregs;
124 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1); 127 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
125 if (unlikely(p->flags & PF_KTHREAD)) { 128 if (unlikely(p->flags & PF_KTHREAD)) {
129 /* kernel thread */
126 unsigned long status = p->thread.cp0_status; 130 unsigned long status = p->thread.cp0_status;
127 memset(childregs, 0, sizeof(struct pt_regs)); 131 memset(childregs, 0, sizeof(struct pt_regs));
128 ti->addr_limit = KERNEL_DS; 132 ti->addr_limit = KERNEL_DS;
129 p->thread.reg16 = usp; /* fn */ 133 p->thread.reg16 = usp; /* fn */
130 p->thread.reg17 = arg; 134 p->thread.reg17 = kthread_arg;
131 p->thread.reg29 = childksp; 135 p->thread.reg29 = childksp;
132 p->thread.reg31 = (unsigned long) ret_from_kernel_thread; 136 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
133#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) 137#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
@@ -139,6 +143,8 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
139 childregs->cp0_status = status; 143 childregs->cp0_status = status;
140 return 0; 144 return 0;
141 } 145 }
146
147 /* user thread */
142 *childregs = *regs; 148 *childregs = *regs;
143 childregs->regs[7] = 0; /* Clear error flag */ 149 childregs->regs[7] = 0; /* Clear error flag */
144 childregs->regs[2] = 0; /* Child gets zero as return value */ 150 childregs->regs[2] = 0; /* Child gets zero as return value */
diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c
index 452d4350ce42..e303cb1ef2f4 100644
--- a/arch/mips/kernel/prom.c
+++ b/arch/mips/kernel/prom.c
@@ -64,7 +64,10 @@ int __init __dt_register_buses(const char *bus0, const char *bus1)
64 panic("device tree not present"); 64 panic("device tree not present");
65 65
66 strlcpy(of_ids[0].compatible, bus0, sizeof(of_ids[0].compatible)); 66 strlcpy(of_ids[0].compatible, bus0, sizeof(of_ids[0].compatible));
67 strlcpy(of_ids[1].compatible, bus1, sizeof(of_ids[1].compatible)); 67 if (bus1) {
68 strlcpy(of_ids[1].compatible, bus1,
69 sizeof(of_ids[1].compatible));
70 }
68 71
69 if (of_platform_populate(NULL, of_ids, NULL, NULL)) 72 if (of_platform_populate(NULL, of_ids, NULL, NULL))
70 panic("failed to populate DT"); 73 panic("failed to populate DT");
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 7da6e324dd35..d544e774eea6 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -32,6 +32,7 @@
32 32
33#include <asm/byteorder.h> 33#include <asm/byteorder.h>
34#include <asm/cpu.h> 34#include <asm/cpu.h>
35#include <asm/cpu-info.h>
35#include <asm/dsp.h> 36#include <asm/dsp.h>
36#include <asm/fpu.h> 37#include <asm/fpu.h>
37#include <asm/mipsregs.h> 38#include <asm/mipsregs.h>
@@ -157,6 +158,9 @@ int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
157{ 158{
158 union fpureg *fregs; 159 union fpureg *fregs;
159 u64 fpr_val; 160 u64 fpr_val;
161 u32 fcr31;
162 u32 value;
163 u32 mask;
160 int i; 164 int i;
161 165
162 if (!access_ok(VERIFY_READ, data, 33 * 8)) 166 if (!access_ok(VERIFY_READ, data, 33 * 8))
@@ -170,8 +174,10 @@ int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
170 set_fpr64(&fregs[i], 0, fpr_val); 174 set_fpr64(&fregs[i], 0, fpr_val);
171 } 175 }
172 176
173 __get_user(child->thread.fpu.fcr31, data + 64); 177 __get_user(value, data + 64);
174 child->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X; 178 fcr31 = child->thread.fpu.fcr31;
179 mask = current_cpu_data.fpu_msk31;
180 child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
175 181
176 /* FIR may not be written. */ 182 /* FIR may not be written. */
177 183
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index 435ea652f5fa..5087a4b72e6b 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -115,11 +115,9 @@ LEAF(_restore_fp)
115 * the property that no matter whether considered as single or as double 115 * the property that no matter whether considered as single or as double
116 * precision represents signaling NANS. 116 * precision represents signaling NANS.
117 * 117 *
118 * We initialize fcr31 to rounding to nearest, no exceptions. 118 * The value to initialize fcr31 to comes in $a0.
119 */ 119 */
120 120
121#define FPU_DEFAULT 0x00000000
122
123 .set push 121 .set push
124 SET_HARDFLOAT 122 SET_HARDFLOAT
125 123
@@ -129,8 +127,7 @@ LEAF(_init_fpu)
129 or t0, t1 127 or t0, t1
130 mtc0 t0, CP0_STATUS 128 mtc0 t0, CP0_STATUS
131 129
132 li t1, FPU_DEFAULT 130 ctc1 a0, fcr31
133 ctc1 t1, fcr31
134 131
135 li t0, -1 132 li t0, -1
136 133
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index 3b1a36f13a7d..04cbbde3521b 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -165,11 +165,9 @@ LEAF(_init_msa_upper)
165 * the property that no matter whether considered as single or as double 165 * the property that no matter whether considered as single or as double
166 * precision represents signaling NANS. 166 * precision represents signaling NANS.
167 * 167 *
168 * We initialize fcr31 to rounding to nearest, no exceptions. 168 * The value to initialize fcr31 to comes in $a0.
169 */ 169 */
170 170
171#define FPU_DEFAULT 0x00000000
172
173 .set push 171 .set push
174 SET_HARDFLOAT 172 SET_HARDFLOAT
175 173
@@ -180,8 +178,7 @@ LEAF(_init_fpu)
180 mtc0 t0, CP0_STATUS 178 mtc0 t0, CP0_STATUS
181 enable_fpu_hazard 179 enable_fpu_hazard
182 180
183 li t1, FPU_DEFAULT 181 ctc1 a0, fcr31
184 ctc1 t1, fcr31
185 182
186 li t1, -1 # SNaN 183 li t1, -1 # SNaN
187 184
diff --git a/arch/mips/kernel/reset.c b/arch/mips/kernel/reset.c
index 07fc5244aed4..7c746d3458e7 100644
--- a/arch/mips/kernel/reset.c
+++ b/arch/mips/kernel/reset.c
@@ -11,6 +11,7 @@
11#include <linux/pm.h> 11#include <linux/pm.h>
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/reboot.h> 13#include <linux/reboot.h>
14#include <linux/delay.h>
14 15
15#include <asm/reboot.h> 16#include <asm/reboot.h>
16 17
@@ -29,16 +30,40 @@ void machine_restart(char *command)
29{ 30{
30 if (_machine_restart) 31 if (_machine_restart)
31 _machine_restart(command); 32 _machine_restart(command);
33
34#ifdef CONFIG_SMP
35 preempt_disable();
36 smp_send_stop();
37#endif
38 do_kernel_restart(command);
39 mdelay(1000);
40 pr_emerg("Reboot failed -- System halted\n");
41 local_irq_disable();
42 while (1);
32} 43}
33 44
34void machine_halt(void) 45void machine_halt(void)
35{ 46{
36 if (_machine_halt) 47 if (_machine_halt)
37 _machine_halt(); 48 _machine_halt();
49
50#ifdef CONFIG_SMP
51 preempt_disable();
52 smp_send_stop();
53#endif
54 local_irq_disable();
55 while (1);
38} 56}
39 57
40void machine_power_off(void) 58void machine_power_off(void)
41{ 59{
42 if (pm_power_off) 60 if (pm_power_off)
43 pm_power_off(); 61 pm_power_off();
62
63#ifdef CONFIG_SMP
64 preempt_disable();
65 smp_send_stop();
66#endif
67 local_irq_disable();
68 while (1);
44} 69}
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 058929041368..be73c491182b 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -31,6 +31,7 @@
31#include <asm/bootinfo.h> 31#include <asm/bootinfo.h>
32#include <asm/bugs.h> 32#include <asm/bugs.h>
33#include <asm/cache.h> 33#include <asm/cache.h>
34#include <asm/cdmm.h>
34#include <asm/cpu.h> 35#include <asm/cpu.h>
35#include <asm/sections.h> 36#include <asm/sections.h>
36#include <asm/setup.h> 37#include <asm/setup.h>
@@ -763,6 +764,7 @@ void __init setup_arch(char **cmdline_p)
763 cpu_probe(); 764 cpu_probe();
764 prom_init(); 765 prom_init();
765 766
767 setup_early_fdc_console();
766#ifdef CONFIG_EARLY_PRINTK 768#ifdef CONFIG_EARLY_PRINTK
767 setup_early_printk(); 769 setup_early_printk();
768#endif 770#endif
diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c
index bed7590e475f..d5589bedd0a4 100644
--- a/arch/mips/kernel/smp-cps.c
+++ b/arch/mips/kernel/smp-cps.c
@@ -88,6 +88,12 @@ static void __init cps_smp_setup(void)
88 88
89 /* Make core 0 coherent with everything */ 89 /* Make core 0 coherent with everything */
90 write_gcr_cl_coherence(0xff); 90 write_gcr_cl_coherence(0xff);
91
92#ifdef CONFIG_MIPS_MT_FPAFF
93 /* If we have an FPU, enroll ourselves in the FPU-full mask */
94 if (cpu_has_fpu)
95 cpu_set(0, mt_fpu_cpumask);
96#endif /* CONFIG_MIPS_MT_FPAFF */
91} 97}
92 98
93static void __init cps_prepare_cpus(unsigned int max_cpus) 99static void __init cps_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 1c0d8c50b7e1..5b020bda3e05 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -176,10 +176,8 @@ static void stop_this_cpu(void *dummy)
176 * Remove this CPU: 176 * Remove this CPU:
177 */ 177 */
178 set_cpu_online(smp_processor_id(), false); 178 set_cpu_online(smp_processor_id(), false);
179 for (;;) { 179 local_irq_disable();
180 if (cpu_wait) 180 while (1);
181 (*cpu_wait)(); /* Wait if available. */
182 }
183} 181}
184 182
185void smp_send_stop(void) 183void smp_send_stop(void)
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 5b4d711f878d..e334c641a81b 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -12,6 +12,7 @@
12 * Copyright (C) 2000, 2001, 2012 MIPS Technologies, Inc. All rights reserved. 12 * Copyright (C) 2000, 2001, 2012 MIPS Technologies, Inc. All rights reserved.
13 * Copyright (C) 2014, Imagination Technologies Ltd. 13 * Copyright (C) 2014, Imagination Technologies Ltd.
14 */ 14 */
15#include <linux/bitops.h>
15#include <linux/bug.h> 16#include <linux/bug.h>
16#include <linux/compiler.h> 17#include <linux/compiler.h>
17#include <linux/context_tracking.h> 18#include <linux/context_tracking.h>
@@ -699,36 +700,60 @@ asmlinkage void do_ov(struct pt_regs *regs)
699 exception_exit(prev_state); 700 exception_exit(prev_state);
700} 701}
701 702
702int process_fpemu_return(int sig, void __user *fault_addr) 703int process_fpemu_return(int sig, void __user *fault_addr, unsigned long fcr31)
703{ 704{
704 /* 705 struct siginfo si = { 0 };
705 * We can't allow the emulated instruction to leave any of the cause 706
706 * bits set in FCSR. If they were then the kernel would take an FP 707 switch (sig) {
707 * exception when restoring FP context. 708 case 0:
708 */ 709 return 0;
709 current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
710 710
711 if (sig == SIGSEGV || sig == SIGBUS) { 711 case SIGFPE:
712 struct siginfo si = {0};
713 si.si_addr = fault_addr; 712 si.si_addr = fault_addr;
714 si.si_signo = sig; 713 si.si_signo = sig;
715 if (sig == SIGSEGV) { 714 /*
716 down_read(&current->mm->mmap_sem); 715 * Inexact can happen together with Overflow or Underflow.
717 if (find_vma(current->mm, (unsigned long)fault_addr)) 716 * Respect the mask to deliver the correct exception.
718 si.si_code = SEGV_ACCERR; 717 */
719 else 718 fcr31 &= (fcr31 & FPU_CSR_ALL_E) <<
720 si.si_code = SEGV_MAPERR; 719 (ffs(FPU_CSR_ALL_X) - ffs(FPU_CSR_ALL_E));
721 up_read(&current->mm->mmap_sem); 720 if (fcr31 & FPU_CSR_INV_X)
722 } else { 721 si.si_code = FPE_FLTINV;
723 si.si_code = BUS_ADRERR; 722 else if (fcr31 & FPU_CSR_DIV_X)
724 } 723 si.si_code = FPE_FLTDIV;
724 else if (fcr31 & FPU_CSR_OVF_X)
725 si.si_code = FPE_FLTOVF;
726 else if (fcr31 & FPU_CSR_UDF_X)
727 si.si_code = FPE_FLTUND;
728 else if (fcr31 & FPU_CSR_INE_X)
729 si.si_code = FPE_FLTRES;
730 else
731 si.si_code = __SI_FAULT;
732 force_sig_info(sig, &si, current);
733 return 1;
734
735 case SIGBUS:
736 si.si_addr = fault_addr;
737 si.si_signo = sig;
738 si.si_code = BUS_ADRERR;
739 force_sig_info(sig, &si, current);
740 return 1;
741
742 case SIGSEGV:
743 si.si_addr = fault_addr;
744 si.si_signo = sig;
745 down_read(&current->mm->mmap_sem);
746 if (find_vma(current->mm, (unsigned long)fault_addr))
747 si.si_code = SEGV_ACCERR;
748 else
749 si.si_code = SEGV_MAPERR;
750 up_read(&current->mm->mmap_sem);
725 force_sig_info(sig, &si, current); 751 force_sig_info(sig, &si, current);
726 return 1; 752 return 1;
727 } else if (sig) { 753
754 default:
728 force_sig(sig, current); 755 force_sig(sig, current);
729 return 1; 756 return 1;
730 } else {
731 return 0;
732 } 757 }
733} 758}
734 759
@@ -736,7 +761,8 @@ static int simulate_fp(struct pt_regs *regs, unsigned int opcode,
736 unsigned long old_epc, unsigned long old_ra) 761 unsigned long old_epc, unsigned long old_ra)
737{ 762{
738 union mips_instruction inst = { .word = opcode }; 763 union mips_instruction inst = { .word = opcode };
739 void __user *fault_addr = NULL; 764 void __user *fault_addr;
765 unsigned long fcr31;
740 int sig; 766 int sig;
741 767
742 /* If it's obviously not an FP instruction, skip it */ 768 /* If it's obviously not an FP instruction, skip it */
@@ -766,13 +792,20 @@ static int simulate_fp(struct pt_regs *regs, unsigned int opcode,
766 /* Run the emulator */ 792 /* Run the emulator */
767 sig = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 1, 793 sig = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 1,
768 &fault_addr); 794 &fault_addr);
795 fcr31 = current->thread.fpu.fcr31;
769 796
770 /* If something went wrong, signal */ 797 /*
771 process_fpemu_return(sig, fault_addr); 798 * We can't allow the emulated instruction to leave any of
799 * the cause bits set in $fcr31.
800 */
801 current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
772 802
773 /* Restore the hardware register state */ 803 /* Restore the hardware register state */
774 own_fpu(1); 804 own_fpu(1);
775 805
806 /* Send a signal if required. */
807 process_fpemu_return(sig, fault_addr, fcr31);
808
776 return 0; 809 return 0;
777} 810}
778 811
@@ -782,7 +815,8 @@ static int simulate_fp(struct pt_regs *regs, unsigned int opcode,
782asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31) 815asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
783{ 816{
784 enum ctx_state prev_state; 817 enum ctx_state prev_state;
785 siginfo_t info = {0}; 818 void __user *fault_addr;
819 int sig;
786 820
787 prev_state = exception_enter(); 821 prev_state = exception_enter();
788 if (notify_die(DIE_FP, "FP exception", regs, 0, regs_to_trapnr(regs), 822 if (notify_die(DIE_FP, "FP exception", regs, 0, regs_to_trapnr(regs),
@@ -796,9 +830,6 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
796 die_if_kernel("FP exception in kernel code", regs); 830 die_if_kernel("FP exception in kernel code", regs);
797 831
798 if (fcr31 & FPU_CSR_UNI_X) { 832 if (fcr31 & FPU_CSR_UNI_X) {
799 int sig;
800 void __user *fault_addr = NULL;
801
802 /* 833 /*
803 * Unimplemented operation exception. If we've got the full 834 * Unimplemented operation exception. If we've got the full
804 * software emulator on-board, let's use it... 835 * software emulator on-board, let's use it...
@@ -815,30 +846,23 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
815 /* Run the emulator */ 846 /* Run the emulator */
816 sig = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 1, 847 sig = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 1,
817 &fault_addr); 848 &fault_addr);
849 fcr31 = current->thread.fpu.fcr31;
818 850
819 /* If something went wrong, signal */ 851 /*
820 process_fpemu_return(sig, fault_addr); 852 * We can't allow the emulated instruction to leave any of
853 * the cause bits set in $fcr31.
854 */
855 current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
821 856
822 /* Restore the hardware register state */ 857 /* Restore the hardware register state */
823 own_fpu(1); /* Using the FPU again. */ 858 own_fpu(1); /* Using the FPU again. */
859 } else {
860 sig = SIGFPE;
861 fault_addr = (void __user *) regs->cp0_epc;
862 }
824 863
825 goto out; 864 /* Send a signal if required. */
826 } else if (fcr31 & FPU_CSR_INV_X) 865 process_fpemu_return(sig, fault_addr, fcr31);
827 info.si_code = FPE_FLTINV;
828 else if (fcr31 & FPU_CSR_DIV_X)
829 info.si_code = FPE_FLTDIV;
830 else if (fcr31 & FPU_CSR_OVF_X)
831 info.si_code = FPE_FLTOVF;
832 else if (fcr31 & FPU_CSR_UDF_X)
833 info.si_code = FPE_FLTUND;
834 else if (fcr31 & FPU_CSR_INE_X)
835 info.si_code = FPE_FLTRES;
836 else
837 info.si_code = __SI_FAULT;
838 info.si_signo = SIGFPE;
839 info.si_errno = 0;
840 info.si_addr = (void __user *) regs->cp0_epc;
841 force_sig_info(SIGFPE, &info, current);
842 866
843out: 867out:
844 exception_exit(prev_state); 868 exception_exit(prev_state);
@@ -885,9 +909,9 @@ void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
885 break; 909 break;
886 case BRK_MEMU: 910 case BRK_MEMU:
887 /* 911 /*
888 * Address errors may be deliberately induced by the FPU 912 * This breakpoint code is used by the FPU emulator to retake
889 * emulator to retake control of the CPU after executing the 913 * control of the CPU after executing the instruction from the
890 * instruction in the delay slot of an emulated branch. 914 * delay slot of an emulated branch.
891 * 915 *
892 * Terminate if exception was recognized as a delay slot return 916 * Terminate if exception was recognized as a delay slot return
893 * otherwise handle as normal. 917 * otherwise handle as normal.
@@ -907,10 +931,9 @@ void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
907 931
908asmlinkage void do_bp(struct pt_regs *regs) 932asmlinkage void do_bp(struct pt_regs *regs)
909{ 933{
934 unsigned long epc = msk_isa16_mode(exception_epc(regs));
910 unsigned int opcode, bcode; 935 unsigned int opcode, bcode;
911 enum ctx_state prev_state; 936 enum ctx_state prev_state;
912 unsigned long epc;
913 u16 instr[2];
914 mm_segment_t seg; 937 mm_segment_t seg;
915 938
916 seg = get_fs(); 939 seg = get_fs();
@@ -919,26 +942,28 @@ asmlinkage void do_bp(struct pt_regs *regs)
919 942
920 prev_state = exception_enter(); 943 prev_state = exception_enter();
921 if (get_isa16_mode(regs->cp0_epc)) { 944 if (get_isa16_mode(regs->cp0_epc)) {
922 /* Calculate EPC. */ 945 u16 instr[2];
923 epc = exception_epc(regs); 946
924 if (cpu_has_mmips) { 947 if (__get_user(instr[0], (u16 __user *)epc))
925 if ((__get_user(instr[0], (u16 __user *)msk_isa16_mode(epc)) || 948 goto out_sigsegv;
926 (__get_user(instr[1], (u16 __user *)msk_isa16_mode(epc + 2))))) 949
927 goto out_sigsegv; 950 if (!cpu_has_mmips) {
928 opcode = (instr[0] << 16) | instr[1];
929 } else {
930 /* MIPS16e mode */ 951 /* MIPS16e mode */
931 if (__get_user(instr[0], 952 bcode = (instr[0] >> 5) & 0x3f;
932 (u16 __user *)msk_isa16_mode(epc))) 953 } else if (mm_insn_16bit(instr[0])) {
954 /* 16-bit microMIPS BREAK */
955 bcode = instr[0] & 0xf;
956 } else {
957 /* 32-bit microMIPS BREAK */
958 if (__get_user(instr[1], (u16 __user *)(epc + 2)))
933 goto out_sigsegv; 959 goto out_sigsegv;
934 bcode = (instr[0] >> 6) & 0x3f; 960 opcode = (instr[0] << 16) | instr[1];
935 do_trap_or_bp(regs, bcode, "Break"); 961 bcode = (opcode >> 6) & ((1 << 20) - 1);
936 goto out;
937 } 962 }
938 } else { 963 } else {
939 if (__get_user(opcode, 964 if (__get_user(opcode, (unsigned int __user *)epc))
940 (unsigned int __user *) exception_epc(regs)))
941 goto out_sigsegv; 965 goto out_sigsegv;
966 bcode = (opcode >> 6) & ((1 << 20) - 1);
942 } 967 }
943 968
944 /* 969 /*
@@ -947,9 +972,8 @@ asmlinkage void do_bp(struct pt_regs *regs)
947 * Gas is bug-compatible, but not always, grrr... 972 * Gas is bug-compatible, but not always, grrr...
948 * We handle both cases with a simple heuristics. --macro 973 * We handle both cases with a simple heuristics. --macro
949 */ 974 */
950 bcode = ((opcode >> 6) & ((1 << 20) - 1));
951 if (bcode >= (1 << 10)) 975 if (bcode >= (1 << 10))
952 bcode >>= 10; 976 bcode = ((bcode & ((1 << 10) - 1)) << 10) | (bcode >> 10);
953 977
954 /* 978 /*
955 * notify the kprobe handlers, if instruction is likely to 979 * notify the kprobe handlers, if instruction is likely to
@@ -1039,22 +1063,24 @@ asmlinkage void do_ri(struct pt_regs *regs)
1039 * as quickly as possible. 1063 * as quickly as possible.
1040 */ 1064 */
1041 if (mipsr2_emulation && cpu_has_mips_r6 && 1065 if (mipsr2_emulation && cpu_has_mips_r6 &&
1042 likely(user_mode(regs))) { 1066 likely(user_mode(regs)) &&
1043 if (likely(get_user(opcode, epc) >= 0)) { 1067 likely(get_user(opcode, epc) >= 0)) {
1044 status = mipsr2_decoder(regs, opcode); 1068 unsigned long fcr31 = 0;
1045 switch (status) { 1069
1046 case 0: 1070 status = mipsr2_decoder(regs, opcode, &fcr31);
1047 case SIGEMT: 1071 switch (status) {
1048 task_thread_info(current)->r2_emul_return = 1; 1072 case 0:
1049 return; 1073 case SIGEMT:
1050 case SIGILL: 1074 task_thread_info(current)->r2_emul_return = 1;
1051 goto no_r2_instr; 1075 return;
1052 default: 1076 case SIGILL:
1053 process_fpemu_return(status, 1077 goto no_r2_instr;
1054 &current->thread.cp0_baduaddr); 1078 default:
1055 task_thread_info(current)->r2_emul_return = 1; 1079 process_fpemu_return(status,
1056 return; 1080 &current->thread.cp0_baduaddr,
1057 } 1081 fcr31);
1082 task_thread_info(current)->r2_emul_return = 1;
1083 return;
1058 } 1084 }
1059 } 1085 }
1060 1086
@@ -1299,10 +1325,13 @@ asmlinkage void do_cpu(struct pt_regs *regs)
1299 enum ctx_state prev_state; 1325 enum ctx_state prev_state;
1300 unsigned int __user *epc; 1326 unsigned int __user *epc;
1301 unsigned long old_epc, old31; 1327 unsigned long old_epc, old31;
1328 void __user *fault_addr;
1302 unsigned int opcode; 1329 unsigned int opcode;
1330 unsigned long fcr31;
1303 unsigned int cpid; 1331 unsigned int cpid;
1304 int status, err; 1332 int status, err;
1305 unsigned long __maybe_unused flags; 1333 unsigned long __maybe_unused flags;
1334 int sig;
1306 1335
1307 prev_state = exception_enter(); 1336 prev_state = exception_enter();
1308 cpid = (regs->cp0_cause >> CAUSEB_CE) & 3; 1337 cpid = (regs->cp0_cause >> CAUSEB_CE) & 3;
@@ -1319,7 +1348,7 @@ asmlinkage void do_cpu(struct pt_regs *regs)
1319 status = -1; 1348 status = -1;
1320 1349
1321 if (unlikely(compute_return_epc(regs) < 0)) 1350 if (unlikely(compute_return_epc(regs) < 0))
1322 goto out; 1351 break;
1323 1352
1324 if (get_isa16_mode(regs->cp0_epc)) { 1353 if (get_isa16_mode(regs->cp0_epc)) {
1325 unsigned short mmop[2] = { 0 }; 1354 unsigned short mmop[2] = { 0 };
@@ -1352,49 +1381,54 @@ asmlinkage void do_cpu(struct pt_regs *regs)
1352 force_sig(status, current); 1381 force_sig(status, current);
1353 } 1382 }
1354 1383
1355 goto out; 1384 break;
1356 1385
1357 case 3: 1386 case 3:
1358 /* 1387 /*
1359 * Old (MIPS I and MIPS II) processors will set this code 1388 * The COP3 opcode space and consequently the CP0.Status.CU3
1360 * for COP1X opcode instructions that replaced the original 1389 * bit and the CP0.Cause.CE=3 encoding have been removed as
1361 * COP3 space. We don't limit COP1 space instructions in 1390 * of the MIPS III ISA. From the MIPS IV and MIPS32r2 ISAs
1362 * the emulator according to the CPU ISA, so we want to 1391 * up the space has been reused for COP1X instructions, that
1363 * treat COP1X instructions consistently regardless of which 1392 * are enabled by the CP0.Status.CU1 bit and consequently
1364 * code the CPU chose. Therefore we redirect this trap to 1393 * use the CP0.Cause.CE=1 encoding for Coprocessor Unusable
1365 * the FP emulator too. 1394 * exceptions. Some FPU-less processors that implement one
1366 * 1395 * of these ISAs however use this code erroneously for COP1X
1367 * Then some newer FPU-less processors use this code 1396 * instructions. Therefore we redirect this trap to the FP
1368 * erroneously too, so they are covered by this choice 1397 * emulator too.
1369 * as well.
1370 */ 1398 */
1371 if (raw_cpu_has_fpu) 1399 if (raw_cpu_has_fpu || !cpu_has_mips_4_5_64_r2_r6) {
1400 force_sig(SIGILL, current);
1372 break; 1401 break;
1402 }
1373 /* Fall through. */ 1403 /* Fall through. */
1374 1404
1375 case 1: 1405 case 1:
1376 err = enable_restore_fp_context(0); 1406 err = enable_restore_fp_context(0);
1377 1407
1378 if (!raw_cpu_has_fpu || err) { 1408 if (raw_cpu_has_fpu && !err)
1379 int sig; 1409 break;
1380 void __user *fault_addr = NULL;
1381 sig = fpu_emulator_cop1Handler(regs,
1382 &current->thread.fpu,
1383 0, &fault_addr);
1384 if (!process_fpemu_return(sig, fault_addr) && !err)
1385 mt_ase_fp_affinity();
1386 }
1387 1410
1388 goto out; 1411 sig = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 0,
1412 &fault_addr);
1413 fcr31 = current->thread.fpu.fcr31;
1414
1415 /*
1416 * We can't allow the emulated instruction to leave
1417 * any of the cause bits set in $fcr31.
1418 */
1419 current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
1420
1421 /* Send a signal if required. */
1422 if (!process_fpemu_return(sig, fault_addr, fcr31) && !err)
1423 mt_ase_fp_affinity();
1424
1425 break;
1389 1426
1390 case 2: 1427 case 2:
1391 raw_notifier_call_chain(&cu2_chain, CU2_EXCEPTION, regs); 1428 raw_notifier_call_chain(&cu2_chain, CU2_EXCEPTION, regs);
1392 goto out; 1429 break;
1393 } 1430 }
1394 1431
1395 force_sig(SIGILL, current);
1396
1397out:
1398 exception_exit(prev_state); 1432 exception_exit(prev_state);
1399} 1433}
1400 1434
@@ -1984,6 +2018,12 @@ int cp0_compare_irq_shift;
1984int cp0_perfcount_irq; 2018int cp0_perfcount_irq;
1985EXPORT_SYMBOL_GPL(cp0_perfcount_irq); 2019EXPORT_SYMBOL_GPL(cp0_perfcount_irq);
1986 2020
2021/*
2022 * Fast debug channel IRQ or -1 if not present
2023 */
2024int cp0_fdc_irq;
2025EXPORT_SYMBOL_GPL(cp0_fdc_irq);
2026
1987static int noulri; 2027static int noulri;
1988 2028
1989static int __init ulri_disable(char *s) 2029static int __init ulri_disable(char *s)
@@ -2065,17 +2105,21 @@ void per_cpu_trap_init(bool is_boot_cpu)
2065 * 2105 *
2066 * o read IntCtl.IPTI to determine the timer interrupt 2106 * o read IntCtl.IPTI to determine the timer interrupt
2067 * o read IntCtl.IPPCI to determine the performance counter interrupt 2107 * o read IntCtl.IPPCI to determine the performance counter interrupt
2108 * o read IntCtl.IPFDC to determine the fast debug channel interrupt
2068 */ 2109 */
2069 if (cpu_has_mips_r2_r6) { 2110 if (cpu_has_mips_r2_r6) {
2070 cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP; 2111 cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP;
2071 cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7; 2112 cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7;
2072 cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7; 2113 cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7;
2073 if (cp0_perfcount_irq == cp0_compare_irq) 2114 cp0_fdc_irq = (read_c0_intctl() >> INTCTLB_IPFDC) & 7;
2074 cp0_perfcount_irq = -1; 2115 if (!cp0_fdc_irq)
2116 cp0_fdc_irq = -1;
2117
2075 } else { 2118 } else {
2076 cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ; 2119 cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
2077 cp0_compare_irq_shift = CP0_LEGACY_PERFCNT_IRQ; 2120 cp0_compare_irq_shift = CP0_LEGACY_PERFCNT_IRQ;
2078 cp0_perfcount_irq = -1; 2121 cp0_perfcount_irq = -1;
2122 cp0_fdc_irq = -1;
2079 } 2123 }
2080 2124
2081 if (!cpu_data[cpu].asid_cache) 2125 if (!cpu_data[cpu].asid_cache)
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index bbb69695a0a1..af84bef0c90d 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -89,8 +89,6 @@
89#include <asm/fpu_emulator.h> 89#include <asm/fpu_emulator.h>
90#include <asm/inst.h> 90#include <asm/inst.h>
91#include <asm/uaccess.h> 91#include <asm/uaccess.h>
92#include <asm/fpu.h>
93#include <asm/fpu_emulator.h>
94 92
95#define STR(x) __STR(x) 93#define STR(x) __STR(x)
96#define __STR(x) #x 94#define __STR(x) #x
@@ -109,10 +107,11 @@ static u32 unaligned_action;
109extern void show_registers(struct pt_regs *regs); 107extern void show_registers(struct pt_regs *regs);
110 108
111#ifdef __BIG_ENDIAN 109#ifdef __BIG_ENDIAN
112#define LoadHW(addr, value, res) \ 110#define _LoadHW(addr, value, res, type) \
111do { \
113 __asm__ __volatile__ (".set\tnoat\n" \ 112 __asm__ __volatile__ (".set\tnoat\n" \
114 "1:\t"user_lb("%0", "0(%2)")"\n" \ 113 "1:\t"type##_lb("%0", "0(%2)")"\n" \
115 "2:\t"user_lbu("$1", "1(%2)")"\n\t" \ 114 "2:\t"type##_lbu("$1", "1(%2)")"\n\t"\
116 "sll\t%0, 0x8\n\t" \ 115 "sll\t%0, 0x8\n\t" \
117 "or\t%0, $1\n\t" \ 116 "or\t%0, $1\n\t" \
118 "li\t%1, 0\n" \ 117 "li\t%1, 0\n" \
@@ -127,13 +126,15 @@ extern void show_registers(struct pt_regs *regs);
127 STR(PTR)"\t2b, 4b\n\t" \ 126 STR(PTR)"\t2b, 4b\n\t" \
128 ".previous" \ 127 ".previous" \
129 : "=&r" (value), "=r" (res) \ 128 : "=&r" (value), "=r" (res) \
130 : "r" (addr), "i" (-EFAULT)); 129 : "r" (addr), "i" (-EFAULT)); \
130} while(0)
131 131
132#ifndef CONFIG_CPU_MIPSR6 132#ifndef CONFIG_CPU_MIPSR6
133#define LoadW(addr, value, res) \ 133#define _LoadW(addr, value, res, type) \
134do { \
134 __asm__ __volatile__ ( \ 135 __asm__ __volatile__ ( \
135 "1:\t"user_lwl("%0", "(%2)")"\n" \ 136 "1:\t"type##_lwl("%0", "(%2)")"\n" \
136 "2:\t"user_lwr("%0", "3(%2)")"\n\t" \ 137 "2:\t"type##_lwr("%0", "3(%2)")"\n\t"\
137 "li\t%1, 0\n" \ 138 "li\t%1, 0\n" \
138 "3:\n\t" \ 139 "3:\n\t" \
139 ".insn\n\t" \ 140 ".insn\n\t" \
@@ -146,21 +147,24 @@ extern void show_registers(struct pt_regs *regs);
146 STR(PTR)"\t2b, 4b\n\t" \ 147 STR(PTR)"\t2b, 4b\n\t" \
147 ".previous" \ 148 ".previous" \
148 : "=&r" (value), "=r" (res) \ 149 : "=&r" (value), "=r" (res) \
149 : "r" (addr), "i" (-EFAULT)); 150 : "r" (addr), "i" (-EFAULT)); \
151} while(0)
152
150#else 153#else
151/* MIPSR6 has no lwl instruction */ 154/* MIPSR6 has no lwl instruction */
152#define LoadW(addr, value, res) \ 155#define _LoadW(addr, value, res, type) \
156do { \
153 __asm__ __volatile__ ( \ 157 __asm__ __volatile__ ( \
154 ".set\tpush\n" \ 158 ".set\tpush\n" \
155 ".set\tnoat\n\t" \ 159 ".set\tnoat\n\t" \
156 "1:"user_lb("%0", "0(%2)")"\n\t" \ 160 "1:"type##_lb("%0", "0(%2)")"\n\t" \
157 "2:"user_lbu("$1", "1(%2)")"\n\t" \ 161 "2:"type##_lbu("$1", "1(%2)")"\n\t" \
158 "sll\t%0, 0x8\n\t" \ 162 "sll\t%0, 0x8\n\t" \
159 "or\t%0, $1\n\t" \ 163 "or\t%0, $1\n\t" \
160 "3:"user_lbu("$1", "2(%2)")"\n\t" \ 164 "3:"type##_lbu("$1", "2(%2)")"\n\t" \
161 "sll\t%0, 0x8\n\t" \ 165 "sll\t%0, 0x8\n\t" \
162 "or\t%0, $1\n\t" \ 166 "or\t%0, $1\n\t" \
163 "4:"user_lbu("$1", "3(%2)")"\n\t" \ 167 "4:"type##_lbu("$1", "3(%2)")"\n\t" \
164 "sll\t%0, 0x8\n\t" \ 168 "sll\t%0, 0x8\n\t" \
165 "or\t%0, $1\n\t" \ 169 "or\t%0, $1\n\t" \
166 "li\t%1, 0\n" \ 170 "li\t%1, 0\n" \
@@ -178,14 +182,17 @@ extern void show_registers(struct pt_regs *regs);
178 STR(PTR)"\t4b, 11b\n\t" \ 182 STR(PTR)"\t4b, 11b\n\t" \
179 ".previous" \ 183 ".previous" \
180 : "=&r" (value), "=r" (res) \ 184 : "=&r" (value), "=r" (res) \
181 : "r" (addr), "i" (-EFAULT)); 185 : "r" (addr), "i" (-EFAULT)); \
186} while(0)
187
182#endif /* CONFIG_CPU_MIPSR6 */ 188#endif /* CONFIG_CPU_MIPSR6 */
183 189
184#define LoadHWU(addr, value, res) \ 190#define _LoadHWU(addr, value, res, type) \
191do { \
185 __asm__ __volatile__ ( \ 192 __asm__ __volatile__ ( \
186 ".set\tnoat\n" \ 193 ".set\tnoat\n" \
187 "1:\t"user_lbu("%0", "0(%2)")"\n" \ 194 "1:\t"type##_lbu("%0", "0(%2)")"\n" \
188 "2:\t"user_lbu("$1", "1(%2)")"\n\t" \ 195 "2:\t"type##_lbu("$1", "1(%2)")"\n\t"\
189 "sll\t%0, 0x8\n\t" \ 196 "sll\t%0, 0x8\n\t" \
190 "or\t%0, $1\n\t" \ 197 "or\t%0, $1\n\t" \
191 "li\t%1, 0\n" \ 198 "li\t%1, 0\n" \
@@ -201,13 +208,15 @@ extern void show_registers(struct pt_regs *regs);
201 STR(PTR)"\t2b, 4b\n\t" \ 208 STR(PTR)"\t2b, 4b\n\t" \
202 ".previous" \ 209 ".previous" \
203 : "=&r" (value), "=r" (res) \ 210 : "=&r" (value), "=r" (res) \
204 : "r" (addr), "i" (-EFAULT)); 211 : "r" (addr), "i" (-EFAULT)); \
212} while(0)
205 213
206#ifndef CONFIG_CPU_MIPSR6 214#ifndef CONFIG_CPU_MIPSR6
207#define LoadWU(addr, value, res) \ 215#define _LoadWU(addr, value, res, type) \
216do { \
208 __asm__ __volatile__ ( \ 217 __asm__ __volatile__ ( \
209 "1:\t"user_lwl("%0", "(%2)")"\n" \ 218 "1:\t"type##_lwl("%0", "(%2)")"\n" \
210 "2:\t"user_lwr("%0", "3(%2)")"\n\t" \ 219 "2:\t"type##_lwr("%0", "3(%2)")"\n\t"\
211 "dsll\t%0, %0, 32\n\t" \ 220 "dsll\t%0, %0, 32\n\t" \
212 "dsrl\t%0, %0, 32\n\t" \ 221 "dsrl\t%0, %0, 32\n\t" \
213 "li\t%1, 0\n" \ 222 "li\t%1, 0\n" \
@@ -222,9 +231,11 @@ extern void show_registers(struct pt_regs *regs);
222 STR(PTR)"\t2b, 4b\n\t" \ 231 STR(PTR)"\t2b, 4b\n\t" \
223 ".previous" \ 232 ".previous" \
224 : "=&r" (value), "=r" (res) \ 233 : "=&r" (value), "=r" (res) \
225 : "r" (addr), "i" (-EFAULT)); 234 : "r" (addr), "i" (-EFAULT)); \
235} while(0)
226 236
227#define LoadDW(addr, value, res) \ 237#define _LoadDW(addr, value, res) \
238do { \
228 __asm__ __volatile__ ( \ 239 __asm__ __volatile__ ( \
229 "1:\tldl\t%0, (%2)\n" \ 240 "1:\tldl\t%0, (%2)\n" \
230 "2:\tldr\t%0, 7(%2)\n\t" \ 241 "2:\tldr\t%0, 7(%2)\n\t" \
@@ -240,21 +251,24 @@ extern void show_registers(struct pt_regs *regs);
240 STR(PTR)"\t2b, 4b\n\t" \ 251 STR(PTR)"\t2b, 4b\n\t" \
241 ".previous" \ 252 ".previous" \
242 : "=&r" (value), "=r" (res) \ 253 : "=&r" (value), "=r" (res) \
243 : "r" (addr), "i" (-EFAULT)); 254 : "r" (addr), "i" (-EFAULT)); \
255} while(0)
256
244#else 257#else
245/* MIPSR6 has not lwl and ldl instructions */ 258/* MIPSR6 has not lwl and ldl instructions */
246#define LoadWU(addr, value, res) \ 259#define _LoadWU(addr, value, res, type) \
260do { \
247 __asm__ __volatile__ ( \ 261 __asm__ __volatile__ ( \
248 ".set\tpush\n\t" \ 262 ".set\tpush\n\t" \
249 ".set\tnoat\n\t" \ 263 ".set\tnoat\n\t" \
250 "1:"user_lbu("%0", "0(%2)")"\n\t" \ 264 "1:"type##_lbu("%0", "0(%2)")"\n\t" \
251 "2:"user_lbu("$1", "1(%2)")"\n\t" \ 265 "2:"type##_lbu("$1", "1(%2)")"\n\t" \
252 "sll\t%0, 0x8\n\t" \ 266 "sll\t%0, 0x8\n\t" \
253 "or\t%0, $1\n\t" \ 267 "or\t%0, $1\n\t" \
254 "3:"user_lbu("$1", "2(%2)")"\n\t" \ 268 "3:"type##_lbu("$1", "2(%2)")"\n\t" \
255 "sll\t%0, 0x8\n\t" \ 269 "sll\t%0, 0x8\n\t" \
256 "or\t%0, $1\n\t" \ 270 "or\t%0, $1\n\t" \
257 "4:"user_lbu("$1", "3(%2)")"\n\t" \ 271 "4:"type##_lbu("$1", "3(%2)")"\n\t" \
258 "sll\t%0, 0x8\n\t" \ 272 "sll\t%0, 0x8\n\t" \
259 "or\t%0, $1\n\t" \ 273 "or\t%0, $1\n\t" \
260 "li\t%1, 0\n" \ 274 "li\t%1, 0\n" \
@@ -272,9 +286,11 @@ extern void show_registers(struct pt_regs *regs);
272 STR(PTR)"\t4b, 11b\n\t" \ 286 STR(PTR)"\t4b, 11b\n\t" \
273 ".previous" \ 287 ".previous" \
274 : "=&r" (value), "=r" (res) \ 288 : "=&r" (value), "=r" (res) \
275 : "r" (addr), "i" (-EFAULT)); 289 : "r" (addr), "i" (-EFAULT)); \
290} while(0)
276 291
277#define LoadDW(addr, value, res) \ 292#define _LoadDW(addr, value, res) \
293do { \
278 __asm__ __volatile__ ( \ 294 __asm__ __volatile__ ( \
279 ".set\tpush\n\t" \ 295 ".set\tpush\n\t" \
280 ".set\tnoat\n\t" \ 296 ".set\tnoat\n\t" \
@@ -319,16 +335,19 @@ extern void show_registers(struct pt_regs *regs);
319 STR(PTR)"\t8b, 11b\n\t" \ 335 STR(PTR)"\t8b, 11b\n\t" \
320 ".previous" \ 336 ".previous" \
321 : "=&r" (value), "=r" (res) \ 337 : "=&r" (value), "=r" (res) \
322 : "r" (addr), "i" (-EFAULT)); 338 : "r" (addr), "i" (-EFAULT)); \
339} while(0)
340
323#endif /* CONFIG_CPU_MIPSR6 */ 341#endif /* CONFIG_CPU_MIPSR6 */
324 342
325 343
326#define StoreHW(addr, value, res) \ 344#define _StoreHW(addr, value, res, type) \
345do { \
327 __asm__ __volatile__ ( \ 346 __asm__ __volatile__ ( \
328 ".set\tnoat\n" \ 347 ".set\tnoat\n" \
329 "1:\t"user_sb("%1", "1(%2)")"\n" \ 348 "1:\t"type##_sb("%1", "1(%2)")"\n" \
330 "srl\t$1, %1, 0x8\n" \ 349 "srl\t$1, %1, 0x8\n" \
331 "2:\t"user_sb("$1", "0(%2)")"\n" \ 350 "2:\t"type##_sb("$1", "0(%2)")"\n" \
332 ".set\tat\n\t" \ 351 ".set\tat\n\t" \
333 "li\t%0, 0\n" \ 352 "li\t%0, 0\n" \
334 "3:\n\t" \ 353 "3:\n\t" \
@@ -342,13 +361,15 @@ extern void show_registers(struct pt_regs *regs);
342 STR(PTR)"\t2b, 4b\n\t" \ 361 STR(PTR)"\t2b, 4b\n\t" \
343 ".previous" \ 362 ".previous" \
344 : "=r" (res) \ 363 : "=r" (res) \
345 : "r" (value), "r" (addr), "i" (-EFAULT)); 364 : "r" (value), "r" (addr), "i" (-EFAULT));\
365} while(0)
346 366
347#ifndef CONFIG_CPU_MIPSR6 367#ifndef CONFIG_CPU_MIPSR6
348#define StoreW(addr, value, res) \ 368#define _StoreW(addr, value, res, type) \
369do { \
349 __asm__ __volatile__ ( \ 370 __asm__ __volatile__ ( \
350 "1:\t"user_swl("%1", "(%2)")"\n" \ 371 "1:\t"type##_swl("%1", "(%2)")"\n" \
351 "2:\t"user_swr("%1", "3(%2)")"\n\t" \ 372 "2:\t"type##_swr("%1", "3(%2)")"\n\t"\
352 "li\t%0, 0\n" \ 373 "li\t%0, 0\n" \
353 "3:\n\t" \ 374 "3:\n\t" \
354 ".insn\n\t" \ 375 ".insn\n\t" \
@@ -361,9 +382,11 @@ extern void show_registers(struct pt_regs *regs);
361 STR(PTR)"\t2b, 4b\n\t" \ 382 STR(PTR)"\t2b, 4b\n\t" \
362 ".previous" \ 383 ".previous" \
363 : "=r" (res) \ 384 : "=r" (res) \
364 : "r" (value), "r" (addr), "i" (-EFAULT)); 385 : "r" (value), "r" (addr), "i" (-EFAULT)); \
386} while(0)
365 387
366#define StoreDW(addr, value, res) \ 388#define _StoreDW(addr, value, res) \
389do { \
367 __asm__ __volatile__ ( \ 390 __asm__ __volatile__ ( \
368 "1:\tsdl\t%1,(%2)\n" \ 391 "1:\tsdl\t%1,(%2)\n" \
369 "2:\tsdr\t%1, 7(%2)\n\t" \ 392 "2:\tsdr\t%1, 7(%2)\n\t" \
@@ -379,20 +402,23 @@ extern void show_registers(struct pt_regs *regs);
379 STR(PTR)"\t2b, 4b\n\t" \ 402 STR(PTR)"\t2b, 4b\n\t" \
380 ".previous" \ 403 ".previous" \
381 : "=r" (res) \ 404 : "=r" (res) \
382 : "r" (value), "r" (addr), "i" (-EFAULT)); 405 : "r" (value), "r" (addr), "i" (-EFAULT)); \
406} while(0)
407
383#else 408#else
384/* MIPSR6 has no swl and sdl instructions */ 409/* MIPSR6 has no swl and sdl instructions */
385#define StoreW(addr, value, res) \ 410#define _StoreW(addr, value, res, type) \
411do { \
386 __asm__ __volatile__ ( \ 412 __asm__ __volatile__ ( \
387 ".set\tpush\n\t" \ 413 ".set\tpush\n\t" \
388 ".set\tnoat\n\t" \ 414 ".set\tnoat\n\t" \
389 "1:"user_sb("%1", "3(%2)")"\n\t" \ 415 "1:"type##_sb("%1", "3(%2)")"\n\t" \
390 "srl\t$1, %1, 0x8\n\t" \ 416 "srl\t$1, %1, 0x8\n\t" \
391 "2:"user_sb("$1", "2(%2)")"\n\t" \ 417 "2:"type##_sb("$1", "2(%2)")"\n\t" \
392 "srl\t$1, $1, 0x8\n\t" \ 418 "srl\t$1, $1, 0x8\n\t" \
393 "3:"user_sb("$1", "1(%2)")"\n\t" \ 419 "3:"type##_sb("$1", "1(%2)")"\n\t" \
394 "srl\t$1, $1, 0x8\n\t" \ 420 "srl\t$1, $1, 0x8\n\t" \
395 "4:"user_sb("$1", "0(%2)")"\n\t" \ 421 "4:"type##_sb("$1", "0(%2)")"\n\t" \
396 ".set\tpop\n\t" \ 422 ".set\tpop\n\t" \
397 "li\t%0, 0\n" \ 423 "li\t%0, 0\n" \
398 "10:\n\t" \ 424 "10:\n\t" \
@@ -409,9 +435,11 @@ extern void show_registers(struct pt_regs *regs);
409 ".previous" \ 435 ".previous" \
410 : "=&r" (res) \ 436 : "=&r" (res) \
411 : "r" (value), "r" (addr), "i" (-EFAULT) \ 437 : "r" (value), "r" (addr), "i" (-EFAULT) \
412 : "memory"); 438 : "memory"); \
439} while(0)
413 440
414#define StoreDW(addr, value, res) \ 441#define StoreDW(addr, value, res) \
442do { \
415 __asm__ __volatile__ ( \ 443 __asm__ __volatile__ ( \
416 ".set\tpush\n\t" \ 444 ".set\tpush\n\t" \
417 ".set\tnoat\n\t" \ 445 ".set\tnoat\n\t" \
@@ -451,15 +479,18 @@ extern void show_registers(struct pt_regs *regs);
451 ".previous" \ 479 ".previous" \
452 : "=&r" (res) \ 480 : "=&r" (res) \
453 : "r" (value), "r" (addr), "i" (-EFAULT) \ 481 : "r" (value), "r" (addr), "i" (-EFAULT) \
454 : "memory"); 482 : "memory"); \
483} while(0)
484
455#endif /* CONFIG_CPU_MIPSR6 */ 485#endif /* CONFIG_CPU_MIPSR6 */
456 486
457#else /* __BIG_ENDIAN */ 487#else /* __BIG_ENDIAN */
458 488
459#define LoadHW(addr, value, res) \ 489#define _LoadHW(addr, value, res, type) \
490do { \
460 __asm__ __volatile__ (".set\tnoat\n" \ 491 __asm__ __volatile__ (".set\tnoat\n" \
461 "1:\t"user_lb("%0", "1(%2)")"\n" \ 492 "1:\t"type##_lb("%0", "1(%2)")"\n" \
462 "2:\t"user_lbu("$1", "0(%2)")"\n\t" \ 493 "2:\t"type##_lbu("$1", "0(%2)")"\n\t"\
463 "sll\t%0, 0x8\n\t" \ 494 "sll\t%0, 0x8\n\t" \
464 "or\t%0, $1\n\t" \ 495 "or\t%0, $1\n\t" \
465 "li\t%1, 0\n" \ 496 "li\t%1, 0\n" \
@@ -474,13 +505,15 @@ extern void show_registers(struct pt_regs *regs);
474 STR(PTR)"\t2b, 4b\n\t" \ 505 STR(PTR)"\t2b, 4b\n\t" \
475 ".previous" \ 506 ".previous" \
476 : "=&r" (value), "=r" (res) \ 507 : "=&r" (value), "=r" (res) \
477 : "r" (addr), "i" (-EFAULT)); 508 : "r" (addr), "i" (-EFAULT)); \
509} while(0)
478 510
479#ifndef CONFIG_CPU_MIPSR6 511#ifndef CONFIG_CPU_MIPSR6
480#define LoadW(addr, value, res) \ 512#define _LoadW(addr, value, res, type) \
513do { \
481 __asm__ __volatile__ ( \ 514 __asm__ __volatile__ ( \
482 "1:\t"user_lwl("%0", "3(%2)")"\n" \ 515 "1:\t"type##_lwl("%0", "3(%2)")"\n" \
483 "2:\t"user_lwr("%0", "(%2)")"\n\t" \ 516 "2:\t"type##_lwr("%0", "(%2)")"\n\t"\
484 "li\t%1, 0\n" \ 517 "li\t%1, 0\n" \
485 "3:\n\t" \ 518 "3:\n\t" \
486 ".insn\n\t" \ 519 ".insn\n\t" \
@@ -493,21 +526,24 @@ extern void show_registers(struct pt_regs *regs);
493 STR(PTR)"\t2b, 4b\n\t" \ 526 STR(PTR)"\t2b, 4b\n\t" \
494 ".previous" \ 527 ".previous" \
495 : "=&r" (value), "=r" (res) \ 528 : "=&r" (value), "=r" (res) \
496 : "r" (addr), "i" (-EFAULT)); 529 : "r" (addr), "i" (-EFAULT)); \
530} while(0)
531
497#else 532#else
498/* MIPSR6 has no lwl instruction */ 533/* MIPSR6 has no lwl instruction */
499#define LoadW(addr, value, res) \ 534#define _LoadW(addr, value, res, type) \
535do { \
500 __asm__ __volatile__ ( \ 536 __asm__ __volatile__ ( \
501 ".set\tpush\n" \ 537 ".set\tpush\n" \
502 ".set\tnoat\n\t" \ 538 ".set\tnoat\n\t" \
503 "1:"user_lb("%0", "3(%2)")"\n\t" \ 539 "1:"type##_lb("%0", "3(%2)")"\n\t" \
504 "2:"user_lbu("$1", "2(%2)")"\n\t" \ 540 "2:"type##_lbu("$1", "2(%2)")"\n\t" \
505 "sll\t%0, 0x8\n\t" \ 541 "sll\t%0, 0x8\n\t" \
506 "or\t%0, $1\n\t" \ 542 "or\t%0, $1\n\t" \
507 "3:"user_lbu("$1", "1(%2)")"\n\t" \ 543 "3:"type##_lbu("$1", "1(%2)")"\n\t" \
508 "sll\t%0, 0x8\n\t" \ 544 "sll\t%0, 0x8\n\t" \
509 "or\t%0, $1\n\t" \ 545 "or\t%0, $1\n\t" \
510 "4:"user_lbu("$1", "0(%2)")"\n\t" \ 546 "4:"type##_lbu("$1", "0(%2)")"\n\t" \
511 "sll\t%0, 0x8\n\t" \ 547 "sll\t%0, 0x8\n\t" \
512 "or\t%0, $1\n\t" \ 548 "or\t%0, $1\n\t" \
513 "li\t%1, 0\n" \ 549 "li\t%1, 0\n" \
@@ -525,15 +561,18 @@ extern void show_registers(struct pt_regs *regs);
525 STR(PTR)"\t4b, 11b\n\t" \ 561 STR(PTR)"\t4b, 11b\n\t" \
526 ".previous" \ 562 ".previous" \
527 : "=&r" (value), "=r" (res) \ 563 : "=&r" (value), "=r" (res) \
528 : "r" (addr), "i" (-EFAULT)); 564 : "r" (addr), "i" (-EFAULT)); \
565} while(0)
566
529#endif /* CONFIG_CPU_MIPSR6 */ 567#endif /* CONFIG_CPU_MIPSR6 */
530 568
531 569
532#define LoadHWU(addr, value, res) \ 570#define _LoadHWU(addr, value, res, type) \
571do { \
533 __asm__ __volatile__ ( \ 572 __asm__ __volatile__ ( \
534 ".set\tnoat\n" \ 573 ".set\tnoat\n" \
535 "1:\t"user_lbu("%0", "1(%2)")"\n" \ 574 "1:\t"type##_lbu("%0", "1(%2)")"\n" \
536 "2:\t"user_lbu("$1", "0(%2)")"\n\t" \ 575 "2:\t"type##_lbu("$1", "0(%2)")"\n\t"\
537 "sll\t%0, 0x8\n\t" \ 576 "sll\t%0, 0x8\n\t" \
538 "or\t%0, $1\n\t" \ 577 "or\t%0, $1\n\t" \
539 "li\t%1, 0\n" \ 578 "li\t%1, 0\n" \
@@ -549,13 +588,15 @@ extern void show_registers(struct pt_regs *regs);
549 STR(PTR)"\t2b, 4b\n\t" \ 588 STR(PTR)"\t2b, 4b\n\t" \
550 ".previous" \ 589 ".previous" \
551 : "=&r" (value), "=r" (res) \ 590 : "=&r" (value), "=r" (res) \
552 : "r" (addr), "i" (-EFAULT)); 591 : "r" (addr), "i" (-EFAULT)); \
592} while(0)
553 593
554#ifndef CONFIG_CPU_MIPSR6 594#ifndef CONFIG_CPU_MIPSR6
555#define LoadWU(addr, value, res) \ 595#define _LoadWU(addr, value, res, type) \
596do { \
556 __asm__ __volatile__ ( \ 597 __asm__ __volatile__ ( \
557 "1:\t"user_lwl("%0", "3(%2)")"\n" \ 598 "1:\t"type##_lwl("%0", "3(%2)")"\n" \
558 "2:\t"user_lwr("%0", "(%2)")"\n\t" \ 599 "2:\t"type##_lwr("%0", "(%2)")"\n\t"\
559 "dsll\t%0, %0, 32\n\t" \ 600 "dsll\t%0, %0, 32\n\t" \
560 "dsrl\t%0, %0, 32\n\t" \ 601 "dsrl\t%0, %0, 32\n\t" \
561 "li\t%1, 0\n" \ 602 "li\t%1, 0\n" \
@@ -570,9 +611,11 @@ extern void show_registers(struct pt_regs *regs);
570 STR(PTR)"\t2b, 4b\n\t" \ 611 STR(PTR)"\t2b, 4b\n\t" \
571 ".previous" \ 612 ".previous" \
572 : "=&r" (value), "=r" (res) \ 613 : "=&r" (value), "=r" (res) \
573 : "r" (addr), "i" (-EFAULT)); 614 : "r" (addr), "i" (-EFAULT)); \
615} while(0)
574 616
575#define LoadDW(addr, value, res) \ 617#define _LoadDW(addr, value, res) \
618do { \
576 __asm__ __volatile__ ( \ 619 __asm__ __volatile__ ( \
577 "1:\tldl\t%0, 7(%2)\n" \ 620 "1:\tldl\t%0, 7(%2)\n" \
578 "2:\tldr\t%0, (%2)\n\t" \ 621 "2:\tldr\t%0, (%2)\n\t" \
@@ -588,21 +631,24 @@ extern void show_registers(struct pt_regs *regs);
588 STR(PTR)"\t2b, 4b\n\t" \ 631 STR(PTR)"\t2b, 4b\n\t" \
589 ".previous" \ 632 ".previous" \
590 : "=&r" (value), "=r" (res) \ 633 : "=&r" (value), "=r" (res) \
591 : "r" (addr), "i" (-EFAULT)); 634 : "r" (addr), "i" (-EFAULT)); \
635} while(0)
636
592#else 637#else
593/* MIPSR6 has not lwl and ldl instructions */ 638/* MIPSR6 has not lwl and ldl instructions */
594#define LoadWU(addr, value, res) \ 639#define _LoadWU(addr, value, res, type) \
640do { \
595 __asm__ __volatile__ ( \ 641 __asm__ __volatile__ ( \
596 ".set\tpush\n\t" \ 642 ".set\tpush\n\t" \
597 ".set\tnoat\n\t" \ 643 ".set\tnoat\n\t" \
598 "1:"user_lbu("%0", "3(%2)")"\n\t" \ 644 "1:"type##_lbu("%0", "3(%2)")"\n\t" \
599 "2:"user_lbu("$1", "2(%2)")"\n\t" \ 645 "2:"type##_lbu("$1", "2(%2)")"\n\t" \
600 "sll\t%0, 0x8\n\t" \ 646 "sll\t%0, 0x8\n\t" \
601 "or\t%0, $1\n\t" \ 647 "or\t%0, $1\n\t" \
602 "3:"user_lbu("$1", "1(%2)")"\n\t" \ 648 "3:"type##_lbu("$1", "1(%2)")"\n\t" \
603 "sll\t%0, 0x8\n\t" \ 649 "sll\t%0, 0x8\n\t" \
604 "or\t%0, $1\n\t" \ 650 "or\t%0, $1\n\t" \
605 "4:"user_lbu("$1", "0(%2)")"\n\t" \ 651 "4:"type##_lbu("$1", "0(%2)")"\n\t" \
606 "sll\t%0, 0x8\n\t" \ 652 "sll\t%0, 0x8\n\t" \
607 "or\t%0, $1\n\t" \ 653 "or\t%0, $1\n\t" \
608 "li\t%1, 0\n" \ 654 "li\t%1, 0\n" \
@@ -620,9 +666,11 @@ extern void show_registers(struct pt_regs *regs);
620 STR(PTR)"\t4b, 11b\n\t" \ 666 STR(PTR)"\t4b, 11b\n\t" \
621 ".previous" \ 667 ".previous" \
622 : "=&r" (value), "=r" (res) \ 668 : "=&r" (value), "=r" (res) \
623 : "r" (addr), "i" (-EFAULT)); 669 : "r" (addr), "i" (-EFAULT)); \
670} while(0)
624 671
625#define LoadDW(addr, value, res) \ 672#define _LoadDW(addr, value, res) \
673do { \
626 __asm__ __volatile__ ( \ 674 __asm__ __volatile__ ( \
627 ".set\tpush\n\t" \ 675 ".set\tpush\n\t" \
628 ".set\tnoat\n\t" \ 676 ".set\tnoat\n\t" \
@@ -667,15 +715,17 @@ extern void show_registers(struct pt_regs *regs);
667 STR(PTR)"\t8b, 11b\n\t" \ 715 STR(PTR)"\t8b, 11b\n\t" \
668 ".previous" \ 716 ".previous" \
669 : "=&r" (value), "=r" (res) \ 717 : "=&r" (value), "=r" (res) \
670 : "r" (addr), "i" (-EFAULT)); 718 : "r" (addr), "i" (-EFAULT)); \
719} while(0)
671#endif /* CONFIG_CPU_MIPSR6 */ 720#endif /* CONFIG_CPU_MIPSR6 */
672 721
673#define StoreHW(addr, value, res) \ 722#define _StoreHW(addr, value, res, type) \
723do { \
674 __asm__ __volatile__ ( \ 724 __asm__ __volatile__ ( \
675 ".set\tnoat\n" \ 725 ".set\tnoat\n" \
676 "1:\t"user_sb("%1", "0(%2)")"\n" \ 726 "1:\t"type##_sb("%1", "0(%2)")"\n" \
677 "srl\t$1,%1, 0x8\n" \ 727 "srl\t$1,%1, 0x8\n" \
678 "2:\t"user_sb("$1", "1(%2)")"\n" \ 728 "2:\t"type##_sb("$1", "1(%2)")"\n" \
679 ".set\tat\n\t" \ 729 ".set\tat\n\t" \
680 "li\t%0, 0\n" \ 730 "li\t%0, 0\n" \
681 "3:\n\t" \ 731 "3:\n\t" \
@@ -689,12 +739,15 @@ extern void show_registers(struct pt_regs *regs);
689 STR(PTR)"\t2b, 4b\n\t" \ 739 STR(PTR)"\t2b, 4b\n\t" \
690 ".previous" \ 740 ".previous" \
691 : "=r" (res) \ 741 : "=r" (res) \
692 : "r" (value), "r" (addr), "i" (-EFAULT)); 742 : "r" (value), "r" (addr), "i" (-EFAULT));\
743} while(0)
744
693#ifndef CONFIG_CPU_MIPSR6 745#ifndef CONFIG_CPU_MIPSR6
694#define StoreW(addr, value, res) \ 746#define _StoreW(addr, value, res, type) \
747do { \
695 __asm__ __volatile__ ( \ 748 __asm__ __volatile__ ( \
696 "1:\t"user_swl("%1", "3(%2)")"\n" \ 749 "1:\t"type##_swl("%1", "3(%2)")"\n" \
697 "2:\t"user_swr("%1", "(%2)")"\n\t" \ 750 "2:\t"type##_swr("%1", "(%2)")"\n\t"\
698 "li\t%0, 0\n" \ 751 "li\t%0, 0\n" \
699 "3:\n\t" \ 752 "3:\n\t" \
700 ".insn\n\t" \ 753 ".insn\n\t" \
@@ -707,9 +760,11 @@ extern void show_registers(struct pt_regs *regs);
707 STR(PTR)"\t2b, 4b\n\t" \ 760 STR(PTR)"\t2b, 4b\n\t" \
708 ".previous" \ 761 ".previous" \
709 : "=r" (res) \ 762 : "=r" (res) \
710 : "r" (value), "r" (addr), "i" (-EFAULT)); 763 : "r" (value), "r" (addr), "i" (-EFAULT)); \
764} while(0)
711 765
712#define StoreDW(addr, value, res) \ 766#define _StoreDW(addr, value, res) \
767do { \
713 __asm__ __volatile__ ( \ 768 __asm__ __volatile__ ( \
714 "1:\tsdl\t%1, 7(%2)\n" \ 769 "1:\tsdl\t%1, 7(%2)\n" \
715 "2:\tsdr\t%1, (%2)\n\t" \ 770 "2:\tsdr\t%1, (%2)\n\t" \
@@ -725,20 +780,23 @@ extern void show_registers(struct pt_regs *regs);
725 STR(PTR)"\t2b, 4b\n\t" \ 780 STR(PTR)"\t2b, 4b\n\t" \
726 ".previous" \ 781 ".previous" \
727 : "=r" (res) \ 782 : "=r" (res) \
728 : "r" (value), "r" (addr), "i" (-EFAULT)); 783 : "r" (value), "r" (addr), "i" (-EFAULT)); \
784} while(0)
785
729#else 786#else
730/* MIPSR6 has no swl and sdl instructions */ 787/* MIPSR6 has no swl and sdl instructions */
731#define StoreW(addr, value, res) \ 788#define _StoreW(addr, value, res, type) \
789do { \
732 __asm__ __volatile__ ( \ 790 __asm__ __volatile__ ( \
733 ".set\tpush\n\t" \ 791 ".set\tpush\n\t" \
734 ".set\tnoat\n\t" \ 792 ".set\tnoat\n\t" \
735 "1:"user_sb("%1", "0(%2)")"\n\t" \ 793 "1:"type##_sb("%1", "0(%2)")"\n\t" \
736 "srl\t$1, %1, 0x8\n\t" \ 794 "srl\t$1, %1, 0x8\n\t" \
737 "2:"user_sb("$1", "1(%2)")"\n\t" \ 795 "2:"type##_sb("$1", "1(%2)")"\n\t" \
738 "srl\t$1, $1, 0x8\n\t" \ 796 "srl\t$1, $1, 0x8\n\t" \
739 "3:"user_sb("$1", "2(%2)")"\n\t" \ 797 "3:"type##_sb("$1", "2(%2)")"\n\t" \
740 "srl\t$1, $1, 0x8\n\t" \ 798 "srl\t$1, $1, 0x8\n\t" \
741 "4:"user_sb("$1", "3(%2)")"\n\t" \ 799 "4:"type##_sb("$1", "3(%2)")"\n\t" \
742 ".set\tpop\n\t" \ 800 ".set\tpop\n\t" \
743 "li\t%0, 0\n" \ 801 "li\t%0, 0\n" \
744 "10:\n\t" \ 802 "10:\n\t" \
@@ -755,9 +813,11 @@ extern void show_registers(struct pt_regs *regs);
755 ".previous" \ 813 ".previous" \
756 : "=&r" (res) \ 814 : "=&r" (res) \
757 : "r" (value), "r" (addr), "i" (-EFAULT) \ 815 : "r" (value), "r" (addr), "i" (-EFAULT) \
758 : "memory"); 816 : "memory"); \
817} while(0)
759 818
760#define StoreDW(addr, value, res) \ 819#define _StoreDW(addr, value, res) \
820do { \
761 __asm__ __volatile__ ( \ 821 __asm__ __volatile__ ( \
762 ".set\tpush\n\t" \ 822 ".set\tpush\n\t" \
763 ".set\tnoat\n\t" \ 823 ".set\tnoat\n\t" \
@@ -797,10 +857,28 @@ extern void show_registers(struct pt_regs *regs);
797 ".previous" \ 857 ".previous" \
798 : "=&r" (res) \ 858 : "=&r" (res) \
799 : "r" (value), "r" (addr), "i" (-EFAULT) \ 859 : "r" (value), "r" (addr), "i" (-EFAULT) \
800 : "memory"); 860 : "memory"); \
861} while(0)
862
801#endif /* CONFIG_CPU_MIPSR6 */ 863#endif /* CONFIG_CPU_MIPSR6 */
802#endif 864#endif
803 865
866#define LoadHWU(addr, value, res) _LoadHWU(addr, value, res, kernel)
867#define LoadHWUE(addr, value, res) _LoadHWU(addr, value, res, user)
868#define LoadWU(addr, value, res) _LoadWU(addr, value, res, kernel)
869#define LoadWUE(addr, value, res) _LoadWU(addr, value, res, user)
870#define LoadHW(addr, value, res) _LoadHW(addr, value, res, kernel)
871#define LoadHWE(addr, value, res) _LoadHW(addr, value, res, user)
872#define LoadW(addr, value, res) _LoadW(addr, value, res, kernel)
873#define LoadWE(addr, value, res) _LoadW(addr, value, res, user)
874#define LoadDW(addr, value, res) _LoadDW(addr, value, res)
875
876#define StoreHW(addr, value, res) _StoreHW(addr, value, res, kernel)
877#define StoreHWE(addr, value, res) _StoreHW(addr, value, res, user)
878#define StoreW(addr, value, res) _StoreW(addr, value, res, kernel)
879#define StoreWE(addr, value, res) _StoreW(addr, value, res, user)
880#define StoreDW(addr, value, res) _StoreDW(addr, value, res)
881
804static void emulate_load_store_insn(struct pt_regs *regs, 882static void emulate_load_store_insn(struct pt_regs *regs,
805 void __user *addr, unsigned int __user *pc) 883 void __user *addr, unsigned int __user *pc)
806{ 884{
@@ -872,7 +950,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
872 set_fs(seg); 950 set_fs(seg);
873 goto sigbus; 951 goto sigbus;
874 } 952 }
875 LoadHW(addr, value, res); 953 LoadHWE(addr, value, res);
876 if (res) { 954 if (res) {
877 set_fs(seg); 955 set_fs(seg);
878 goto fault; 956 goto fault;
@@ -885,7 +963,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
885 set_fs(seg); 963 set_fs(seg);
886 goto sigbus; 964 goto sigbus;
887 } 965 }
888 LoadW(addr, value, res); 966 LoadWE(addr, value, res);
889 if (res) { 967 if (res) {
890 set_fs(seg); 968 set_fs(seg);
891 goto fault; 969 goto fault;
@@ -898,7 +976,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
898 set_fs(seg); 976 set_fs(seg);
899 goto sigbus; 977 goto sigbus;
900 } 978 }
901 LoadHWU(addr, value, res); 979 LoadHWUE(addr, value, res);
902 if (res) { 980 if (res) {
903 set_fs(seg); 981 set_fs(seg);
904 goto fault; 982 goto fault;
@@ -913,7 +991,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
913 } 991 }
914 compute_return_epc(regs); 992 compute_return_epc(regs);
915 value = regs->regs[insn.spec3_format.rt]; 993 value = regs->regs[insn.spec3_format.rt];
916 StoreHW(addr, value, res); 994 StoreHWE(addr, value, res);
917 if (res) { 995 if (res) {
918 set_fs(seg); 996 set_fs(seg);
919 goto fault; 997 goto fault;
@@ -926,7 +1004,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
926 } 1004 }
927 compute_return_epc(regs); 1005 compute_return_epc(regs);
928 value = regs->regs[insn.spec3_format.rt]; 1006 value = regs->regs[insn.spec3_format.rt];
929 StoreW(addr, value, res); 1007 StoreWE(addr, value, res);
930 if (res) { 1008 if (res) {
931 set_fs(seg); 1009 set_fs(seg);
932 goto fault; 1010 goto fault;
@@ -943,7 +1021,15 @@ static void emulate_load_store_insn(struct pt_regs *regs,
943 if (!access_ok(VERIFY_READ, addr, 2)) 1021 if (!access_ok(VERIFY_READ, addr, 2))
944 goto sigbus; 1022 goto sigbus;
945 1023
946 LoadHW(addr, value, res); 1024 if (config_enabled(CONFIG_EVA)) {
1025 if (segment_eq(get_fs(), get_ds()))
1026 LoadHW(addr, value, res);
1027 else
1028 LoadHWE(addr, value, res);
1029 } else {
1030 LoadHW(addr, value, res);
1031 }
1032
947 if (res) 1033 if (res)
948 goto fault; 1034 goto fault;
949 compute_return_epc(regs); 1035 compute_return_epc(regs);
@@ -954,7 +1040,15 @@ static void emulate_load_store_insn(struct pt_regs *regs,
954 if (!access_ok(VERIFY_READ, addr, 4)) 1040 if (!access_ok(VERIFY_READ, addr, 4))
955 goto sigbus; 1041 goto sigbus;
956 1042
957 LoadW(addr, value, res); 1043 if (config_enabled(CONFIG_EVA)) {
1044 if (segment_eq(get_fs(), get_ds()))
1045 LoadW(addr, value, res);
1046 else
1047 LoadWE(addr, value, res);
1048 } else {
1049 LoadW(addr, value, res);
1050 }
1051
958 if (res) 1052 if (res)
959 goto fault; 1053 goto fault;
960 compute_return_epc(regs); 1054 compute_return_epc(regs);
@@ -965,7 +1059,15 @@ static void emulate_load_store_insn(struct pt_regs *regs,
965 if (!access_ok(VERIFY_READ, addr, 2)) 1059 if (!access_ok(VERIFY_READ, addr, 2))
966 goto sigbus; 1060 goto sigbus;
967 1061
968 LoadHWU(addr, value, res); 1062 if (config_enabled(CONFIG_EVA)) {
1063 if (segment_eq(get_fs(), get_ds()))
1064 LoadHWU(addr, value, res);
1065 else
1066 LoadHWUE(addr, value, res);
1067 } else {
1068 LoadHWU(addr, value, res);
1069 }
1070
969 if (res) 1071 if (res)
970 goto fault; 1072 goto fault;
971 compute_return_epc(regs); 1073 compute_return_epc(regs);
@@ -1024,7 +1126,16 @@ static void emulate_load_store_insn(struct pt_regs *regs,
1024 1126
1025 compute_return_epc(regs); 1127 compute_return_epc(regs);
1026 value = regs->regs[insn.i_format.rt]; 1128 value = regs->regs[insn.i_format.rt];
1027 StoreHW(addr, value, res); 1129
1130 if (config_enabled(CONFIG_EVA)) {
1131 if (segment_eq(get_fs(), get_ds()))
1132 StoreHW(addr, value, res);
1133 else
1134 StoreHWE(addr, value, res);
1135 } else {
1136 StoreHW(addr, value, res);
1137 }
1138
1028 if (res) 1139 if (res)
1029 goto fault; 1140 goto fault;
1030 break; 1141 break;
@@ -1035,7 +1146,16 @@ static void emulate_load_store_insn(struct pt_regs *regs,
1035 1146
1036 compute_return_epc(regs); 1147 compute_return_epc(regs);
1037 value = regs->regs[insn.i_format.rt]; 1148 value = regs->regs[insn.i_format.rt];
1038 StoreW(addr, value, res); 1149
1150 if (config_enabled(CONFIG_EVA)) {
1151 if (segment_eq(get_fs(), get_ds()))
1152 StoreW(addr, value, res);
1153 else
1154 StoreWE(addr, value, res);
1155 } else {
1156 StoreW(addr, value, res);
1157 }
1158
1039 if (res) 1159 if (res)
1040 goto fault; 1160 goto fault;
1041 break; 1161 break;
@@ -1076,7 +1196,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
1076 own_fpu(1); /* Restore FPU state. */ 1196 own_fpu(1); /* Restore FPU state. */
1077 1197
1078 /* Signal if something went wrong. */ 1198 /* Signal if something went wrong. */
1079 process_fpemu_return(res, fault_addr); 1199 process_fpemu_return(res, fault_addr, 0);
1080 1200
1081 if (res == 0) 1201 if (res == 0)
1082 break; 1202 break;
@@ -1511,7 +1631,7 @@ fpu_emul:
1511 own_fpu(1); /* restore FPU state */ 1631 own_fpu(1); /* restore FPU state */
1512 1632
1513 /* If something went wrong, signal */ 1633 /* If something went wrong, signal */
1514 process_fpemu_return(res, fault_addr); 1634 process_fpemu_return(res, fault_addr, 0);
1515 1635
1516 if (res == 0) 1636 if (res == 0)
1517 goto success; 1637 goto success;
diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c
index 39ab3e786e59..0db099ecc016 100644
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -41,7 +41,7 @@ int ltq_soc_type(void)
41 return soc_info.type; 41 return soc_info.type;
42} 42}
43 43
44void prom_free_prom_memory(void) 44void __init prom_free_prom_memory(void)
45{ 45{
46} 46}
47 47
diff --git a/arch/mips/lantiq/xway/vmmc.c b/arch/mips/lantiq/xway/vmmc.c
index 696cd57f6f13..d001bc38908a 100644
--- a/arch/mips/lantiq/xway/vmmc.c
+++ b/arch/mips/lantiq/xway/vmmc.c
@@ -61,7 +61,6 @@ static struct platform_driver vmmc_driver = {
61 .probe = vmmc_probe, 61 .probe = vmmc_probe,
62 .driver = { 62 .driver = {
63 .name = "lantiq,vmmc", 63 .name = "lantiq,vmmc",
64 .owner = THIS_MODULE,
65 .of_match_table = vmmc_match, 64 .of_match_table = vmmc_match,
66 }, 65 },
67}; 66};
diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c
index cf9b4633257e..a57959e648a6 100644
--- a/arch/mips/lasat/sysctl.c
+++ b/arch/mips/lasat/sysctl.c
@@ -53,21 +53,6 @@ int proc_dolasatstring(struct ctl_table *table, int write,
53 return 0; 53 return 0;
54} 54}
55 55
56/* proc function to write EEPROM after changing int entry */
57int proc_dolasatint(struct ctl_table *table, int write,
58 void *buffer, size_t *lenp, loff_t *ppos)
59{
60 int r;
61
62 r = proc_dointvec(table, write, buffer, lenp, ppos);
63 if ((!write) || r)
64 return r;
65
66 lasat_write_eeprom_info();
67
68 return 0;
69}
70
71#ifdef CONFIG_DS1603 56#ifdef CONFIG_DS1603
72static int rtctmp; 57static int rtctmp;
73 58
diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S
index 4c721e247ac9..ed88647b57e2 100644
--- a/arch/mips/lib/csum_partial.S
+++ b/arch/mips/lib/csum_partial.S
@@ -76,10 +76,10 @@
76 LOAD _t1, (offset + UNIT(1))(src); \ 76 LOAD _t1, (offset + UNIT(1))(src); \
77 LOAD _t2, (offset + UNIT(2))(src); \ 77 LOAD _t2, (offset + UNIT(2))(src); \
78 LOAD _t3, (offset + UNIT(3))(src); \ 78 LOAD _t3, (offset + UNIT(3))(src); \
79 ADDC(_t0, _t1); \
80 ADDC(_t2, _t3); \
79 ADDC(sum, _t0); \ 81 ADDC(sum, _t0); \
80 ADDC(sum, _t1); \ 82 ADDC(sum, _t2)
81 ADDC(sum, _t2); \
82 ADDC(sum, _t3)
83 83
84#ifdef USE_DOUBLE 84#ifdef USE_DOUBLE
85#define CSUM_BIGCHUNK(src, offset, sum, _t0, _t1, _t2, _t3) \ 85#define CSUM_BIGCHUNK(src, offset, sum, _t0, _t1, _t2, _t3) \
@@ -504,21 +504,21 @@ LEAF(csum_partial)
504 SUB len, len, 8*NBYTES 504 SUB len, len, 8*NBYTES
505 ADD src, src, 8*NBYTES 505 ADD src, src, 8*NBYTES
506 STORE(t0, UNIT(0)(dst), .Ls_exc\@) 506 STORE(t0, UNIT(0)(dst), .Ls_exc\@)
507 ADDC(sum, t0) 507 ADDC(t0, t1)
508 STORE(t1, UNIT(1)(dst), .Ls_exc\@) 508 STORE(t1, UNIT(1)(dst), .Ls_exc\@)
509 ADDC(sum, t1) 509 ADDC(sum, t0)
510 STORE(t2, UNIT(2)(dst), .Ls_exc\@) 510 STORE(t2, UNIT(2)(dst), .Ls_exc\@)
511 ADDC(sum, t2) 511 ADDC(t2, t3)
512 STORE(t3, UNIT(3)(dst), .Ls_exc\@) 512 STORE(t3, UNIT(3)(dst), .Ls_exc\@)
513 ADDC(sum, t3) 513 ADDC(sum, t2)
514 STORE(t4, UNIT(4)(dst), .Ls_exc\@) 514 STORE(t4, UNIT(4)(dst), .Ls_exc\@)
515 ADDC(sum, t4) 515 ADDC(t4, t5)
516 STORE(t5, UNIT(5)(dst), .Ls_exc\@) 516 STORE(t5, UNIT(5)(dst), .Ls_exc\@)
517 ADDC(sum, t5) 517 ADDC(sum, t4)
518 STORE(t6, UNIT(6)(dst), .Ls_exc\@) 518 STORE(t6, UNIT(6)(dst), .Ls_exc\@)
519 ADDC(sum, t6) 519 ADDC(t6, t7)
520 STORE(t7, UNIT(7)(dst), .Ls_exc\@) 520 STORE(t7, UNIT(7)(dst), .Ls_exc\@)
521 ADDC(sum, t7) 521 ADDC(sum, t6)
522 .set reorder /* DADDI_WAR */ 522 .set reorder /* DADDI_WAR */
523 ADD dst, dst, 8*NBYTES 523 ADD dst, dst, 8*NBYTES
524 bgez len, 1b 524 bgez len, 1b
@@ -544,13 +544,13 @@ LEAF(csum_partial)
544 SUB len, len, 4*NBYTES 544 SUB len, len, 4*NBYTES
545 ADD src, src, 4*NBYTES 545 ADD src, src, 4*NBYTES
546 STORE(t0, UNIT(0)(dst), .Ls_exc\@) 546 STORE(t0, UNIT(0)(dst), .Ls_exc\@)
547 ADDC(sum, t0) 547 ADDC(t0, t1)
548 STORE(t1, UNIT(1)(dst), .Ls_exc\@) 548 STORE(t1, UNIT(1)(dst), .Ls_exc\@)
549 ADDC(sum, t1) 549 ADDC(sum, t0)
550 STORE(t2, UNIT(2)(dst), .Ls_exc\@) 550 STORE(t2, UNIT(2)(dst), .Ls_exc\@)
551 ADDC(sum, t2) 551 ADDC(t2, t3)
552 STORE(t3, UNIT(3)(dst), .Ls_exc\@) 552 STORE(t3, UNIT(3)(dst), .Ls_exc\@)
553 ADDC(sum, t3) 553 ADDC(sum, t2)
554 .set reorder /* DADDI_WAR */ 554 .set reorder /* DADDI_WAR */
555 ADD dst, dst, 4*NBYTES 555 ADD dst, dst, 4*NBYTES
556 beqz len, .Ldone\@ 556 beqz len, .Ldone\@
@@ -649,13 +649,13 @@ LEAF(csum_partial)
649 nop # improves slotting 649 nop # improves slotting
650#endif 650#endif
651 STORE(t0, UNIT(0)(dst), .Ls_exc\@) 651 STORE(t0, UNIT(0)(dst), .Ls_exc\@)
652 ADDC(sum, t0) 652 ADDC(t0, t1)
653 STORE(t1, UNIT(1)(dst), .Ls_exc\@) 653 STORE(t1, UNIT(1)(dst), .Ls_exc\@)
654 ADDC(sum, t1) 654 ADDC(sum, t0)
655 STORE(t2, UNIT(2)(dst), .Ls_exc\@) 655 STORE(t2, UNIT(2)(dst), .Ls_exc\@)
656 ADDC(sum, t2) 656 ADDC(t2, t3)
657 STORE(t3, UNIT(3)(dst), .Ls_exc\@) 657 STORE(t3, UNIT(3)(dst), .Ls_exc\@)
658 ADDC(sum, t3) 658 ADDC(sum, t2)
659 .set reorder /* DADDI_WAR */ 659 .set reorder /* DADDI_WAR */
660 ADD dst, dst, 4*NBYTES 660 ADD dst, dst, 4*NBYTES
661 bne len, rem, 1b 661 bne len, rem, 1b
diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c
index 045ea3d47c87..22f04ca2ff3e 100644
--- a/arch/mips/loongson/common/env.c
+++ b/arch/mips/loongson/common/env.c
@@ -29,6 +29,7 @@ struct efi_memory_map_loongson *loongson_memmap;
29struct loongson_system_configuration loongson_sysconf; 29struct loongson_system_configuration loongson_sysconf;
30 30
31u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180}; 31u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180};
32u64 loongson_chiptemp[MAX_PACKAGES];
32u64 loongson_freqctrl[MAX_PACKAGES]; 33u64 loongson_freqctrl[MAX_PACKAGES];
33 34
34unsigned long long smp_group[4]; 35unsigned long long smp_group[4];
@@ -97,6 +98,10 @@ void __init prom_init_env(void)
97 loongson_chipcfg[1] = 0x900010001fe00180; 98 loongson_chipcfg[1] = 0x900010001fe00180;
98 loongson_chipcfg[2] = 0x900020001fe00180; 99 loongson_chipcfg[2] = 0x900020001fe00180;
99 loongson_chipcfg[3] = 0x900030001fe00180; 100 loongson_chipcfg[3] = 0x900030001fe00180;
101 loongson_chiptemp[0] = 0x900000001fe0019c;
102 loongson_chiptemp[1] = 0x900010001fe0019c;
103 loongson_chiptemp[2] = 0x900020001fe0019c;
104 loongson_chiptemp[3] = 0x900030001fe0019c;
100 loongson_sysconf.ht_control_base = 0x90000EFDFB000000; 105 loongson_sysconf.ht_control_base = 0x90000EFDFB000000;
101 loongson_sysconf.workarounds = WORKAROUND_CPUFREQ; 106 loongson_sysconf.workarounds = WORKAROUND_CPUFREQ;
102 } else if (ecpu->cputype == Loongson_3B) { 107 } else if (ecpu->cputype == Loongson_3B) {
@@ -110,6 +115,10 @@ void __init prom_init_env(void)
110 loongson_chipcfg[1] = 0x900020001fe00180; 115 loongson_chipcfg[1] = 0x900020001fe00180;
111 loongson_chipcfg[2] = 0x900040001fe00180; 116 loongson_chipcfg[2] = 0x900040001fe00180;
112 loongson_chipcfg[3] = 0x900060001fe00180; 117 loongson_chipcfg[3] = 0x900060001fe00180;
118 loongson_chiptemp[0] = 0x900000001fe0019c;
119 loongson_chiptemp[1] = 0x900020001fe0019c;
120 loongson_chiptemp[2] = 0x900040001fe0019c;
121 loongson_chiptemp[3] = 0x900060001fe0019c;
113 loongson_freqctrl[0] = 0x900000001fe001d0; 122 loongson_freqctrl[0] = 0x900000001fe001d0;
114 loongson_freqctrl[1] = 0x900020001fe001d0; 123 loongson_freqctrl[1] = 0x900020001fe001d0;
115 loongson_freqctrl[2] = 0x900040001fe001d0; 124 loongson_freqctrl[2] = 0x900040001fe001d0;
diff --git a/arch/mips/loongson/common/pci.c b/arch/mips/loongson/common/pci.c
index 003ab4e618b3..4e2575643781 100644
--- a/arch/mips/loongson/common/pci.c
+++ b/arch/mips/loongson/common/pci.c
@@ -78,6 +78,8 @@ static void __init setup_pcimap(void)
78#endif 78#endif
79} 79}
80 80
81extern int sbx00_acpi_init(void);
82
81static int __init pcibios_init(void) 83static int __init pcibios_init(void)
82{ 84{
83 setup_pcimap(); 85 setup_pcimap();
@@ -89,6 +91,10 @@ static int __init pcibios_init(void)
89#endif 91#endif
90 register_pci_controller(&loongson_pci_controller); 92 register_pci_controller(&loongson_pci_controller);
91 93
94#ifdef CONFIG_CPU_LOONGSON3
95 sbx00_acpi_init();
96#endif
97
92 return 0; 98 return 0;
93} 99}
94 100
diff --git a/arch/mips/loongson/loongson-3/cop2-ex.c b/arch/mips/loongson/loongson-3/cop2-ex.c
index b03e37d2071a..ea13764d0a03 100644
--- a/arch/mips/loongson/loongson-3/cop2-ex.c
+++ b/arch/mips/loongson/loongson-3/cop2-ex.c
@@ -43,7 +43,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
43 if (!fpu_owned) { 43 if (!fpu_owned) {
44 set_thread_flag(TIF_USEDFPU); 44 set_thread_flag(TIF_USEDFPU);
45 if (!used_math()) { 45 if (!used_math()) {
46 _init_fpu(); 46 _init_fpu(current->thread.fpu.fcr31);
47 set_used_math(); 47 set_used_math();
48 } else 48 } else
49 _restore_fp(current); 49 _restore_fp(current);
diff --git a/arch/mips/loongson/loongson-3/irq.c b/arch/mips/loongson/loongson-3/irq.c
index 21221edda7a9..0f75b6b3d218 100644
--- a/arch/mips/loongson/loongson-3/irq.c
+++ b/arch/mips/loongson/loongson-3/irq.c
@@ -44,6 +44,7 @@ void mach_irq_dispatch(unsigned int pending)
44 44
45static struct irqaction cascade_irqaction = { 45static struct irqaction cascade_irqaction = {
46 .handler = no_action, 46 .handler = no_action,
47 .flags = IRQF_NO_SUSPEND,
47 .name = "cascade", 48 .name = "cascade",
48}; 49};
49 50
diff --git a/arch/mips/math-emu/Makefile b/arch/mips/math-emu/Makefile
index 619cfc1a2442..2e5f96275c38 100644
--- a/arch/mips/math-emu/Makefile
+++ b/arch/mips/math-emu/Makefile
@@ -2,12 +2,15 @@
2# Makefile for the Linux/MIPS kernel FPU emulation. 2# Makefile for the Linux/MIPS kernel FPU emulation.
3# 3#
4 4
5obj-y += cp1emu.o ieee754dp.o ieee754sp.o ieee754.o dp_div.o dp_mul.o \ 5obj-y += cp1emu.o ieee754dp.o ieee754sp.o ieee754.o \
6 dp_sub.o dp_add.o dp_fsp.o dp_cmp.o dp_simple.o dp_tint.o \ 6 dp_div.o dp_mul.o dp_sub.o dp_add.o dp_fsp.o dp_cmp.o dp_simple.o \
7 dp_fint.o dp_tlong.o dp_flong.o sp_div.o sp_mul.o sp_sub.o \ 7 dp_tint.o dp_fint.o \
8 sp_add.o sp_fdp.o sp_cmp.o sp_simple.o sp_tint.o sp_fint.o \ 8 sp_div.o sp_mul.o sp_sub.o sp_add.o sp_fdp.o sp_cmp.o sp_simple.o \
9 sp_tlong.o sp_flong.o dsemul.o 9 sp_tint.o sp_fint.o \
10 dsemul.o
10 11
11lib-y += ieee754d.o dp_sqrt.o sp_sqrt.o 12lib-y += ieee754d.o \
13 dp_tlong.o dp_flong.o dp_sqrt.o \
14 sp_tlong.o sp_flong.o sp_sqrt.o
12 15
13obj-$(CONFIG_DEBUG_FS) += me-debugfs.o 16obj-$(CONFIG_DEBUG_FS) += me-debugfs.o
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index b30bf65c7d7d..d31c537ace1d 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -45,6 +45,7 @@
45#include <asm/signal.h> 45#include <asm/signal.h>
46#include <asm/uaccess.h> 46#include <asm/uaccess.h>
47 47
48#include <asm/cpu-info.h>
48#include <asm/processor.h> 49#include <asm/processor.h>
49#include <asm/fpu_emulator.h> 50#include <asm/fpu_emulator.h>
50#include <asm/fpu.h> 51#include <asm/fpu.h>
@@ -63,14 +64,14 @@ static int fpux_emu(struct pt_regs *,
63/* Control registers */ 64/* Control registers */
64 65
65#define FPCREG_RID 0 /* $0 = revision id */ 66#define FPCREG_RID 0 /* $0 = revision id */
67#define FPCREG_FCCR 25 /* $25 = fccr */
68#define FPCREG_FEXR 26 /* $26 = fexr */
69#define FPCREG_FENR 28 /* $28 = fenr */
66#define FPCREG_CSR 31 /* $31 = csr */ 70#define FPCREG_CSR 31 /* $31 = csr */
67 71
68/* Determine rounding mode from the RM bits of the FCSR */
69#define modeindex(v) ((v) & FPU_CSR_RM)
70
71/* convert condition code register number to csr bit */ 72/* convert condition code register number to csr bit */
72const unsigned int fpucondbit[8] = { 73const unsigned int fpucondbit[8] = {
73 FPU_CSR_COND0, 74 FPU_CSR_COND,
74 FPU_CSR_COND1, 75 FPU_CSR_COND1,
75 FPU_CSR_COND2, 76 FPU_CSR_COND2,
76 FPU_CSR_COND3, 77 FPU_CSR_COND3,
@@ -843,6 +844,127 @@ do { \
843#define DPTOREG(dp, x) DITOREG((dp).bits, x) 844#define DPTOREG(dp, x) DITOREG((dp).bits, x)
844 845
845/* 846/*
847 * Emulate a CFC1 instruction.
848 */
849static inline void cop1_cfc(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
850 mips_instruction ir)
851{
852 u32 fcr31 = ctx->fcr31;
853 u32 value = 0;
854
855 switch (MIPSInst_RD(ir)) {
856 case FPCREG_CSR:
857 value = fcr31;
858 pr_debug("%p gpr[%d]<-csr=%08x\n",
859 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
860 break;
861
862 case FPCREG_FENR:
863 if (!cpu_has_mips_r)
864 break;
865 value = (fcr31 >> (FPU_CSR_FS_S - MIPS_FENR_FS_S)) &
866 MIPS_FENR_FS;
867 value |= fcr31 & (FPU_CSR_ALL_E | FPU_CSR_RM);
868 pr_debug("%p gpr[%d]<-enr=%08x\n",
869 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
870 break;
871
872 case FPCREG_FEXR:
873 if (!cpu_has_mips_r)
874 break;
875 value = fcr31 & (FPU_CSR_ALL_X | FPU_CSR_ALL_S);
876 pr_debug("%p gpr[%d]<-exr=%08x\n",
877 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
878 break;
879
880 case FPCREG_FCCR:
881 if (!cpu_has_mips_r)
882 break;
883 value = (fcr31 >> (FPU_CSR_COND_S - MIPS_FCCR_COND0_S)) &
884 MIPS_FCCR_COND0;
885 value |= (fcr31 >> (FPU_CSR_COND1_S - MIPS_FCCR_COND1_S)) &
886 (MIPS_FCCR_CONDX & ~MIPS_FCCR_COND0);
887 pr_debug("%p gpr[%d]<-ccr=%08x\n",
888 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
889 break;
890
891 case FPCREG_RID:
892 value = current_cpu_data.fpu_id;
893 break;
894
895 default:
896 break;
897 }
898
899 if (MIPSInst_RT(ir))
900 xcp->regs[MIPSInst_RT(ir)] = value;
901}
902
903/*
904 * Emulate a CTC1 instruction.
905 */
906static inline void cop1_ctc(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
907 mips_instruction ir)
908{
909 u32 fcr31 = ctx->fcr31;
910 u32 value;
911 u32 mask;
912
913 if (MIPSInst_RT(ir) == 0)
914 value = 0;
915 else
916 value = xcp->regs[MIPSInst_RT(ir)];
917
918 switch (MIPSInst_RD(ir)) {
919 case FPCREG_CSR:
920 pr_debug("%p gpr[%d]->csr=%08x\n",
921 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
922
923 /* Preserve read-only bits. */
924 mask = current_cpu_data.fpu_msk31;
925 fcr31 = (value & ~mask) | (fcr31 & mask);
926 break;
927
928 case FPCREG_FENR:
929 if (!cpu_has_mips_r)
930 break;
931 pr_debug("%p gpr[%d]->enr=%08x\n",
932 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
933 fcr31 &= ~(FPU_CSR_FS | FPU_CSR_ALL_E | FPU_CSR_RM);
934 fcr31 |= (value << (FPU_CSR_FS_S - MIPS_FENR_FS_S)) &
935 FPU_CSR_FS;
936 fcr31 |= value & (FPU_CSR_ALL_E | FPU_CSR_RM);
937 break;
938
939 case FPCREG_FEXR:
940 if (!cpu_has_mips_r)
941 break;
942 pr_debug("%p gpr[%d]->exr=%08x\n",
943 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
944 fcr31 &= ~(FPU_CSR_ALL_X | FPU_CSR_ALL_S);
945 fcr31 |= value & (FPU_CSR_ALL_X | FPU_CSR_ALL_S);
946 break;
947
948 case FPCREG_FCCR:
949 if (!cpu_has_mips_r)
950 break;
951 pr_debug("%p gpr[%d]->ccr=%08x\n",
952 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
953 fcr31 &= ~(FPU_CSR_CONDX | FPU_CSR_COND);
954 fcr31 |= (value << (FPU_CSR_COND_S - MIPS_FCCR_COND0_S)) &
955 FPU_CSR_COND;
956 fcr31 |= (value << (FPU_CSR_COND1_S - MIPS_FCCR_COND1_S)) &
957 FPU_CSR_CONDX;
958 break;
959
960 default:
961 break;
962 }
963
964 ctx->fcr31 = fcr31;
965}
966
967/*
846 * Emulate the single floating point instruction pointed at by EPC. 968 * Emulate the single floating point instruction pointed at by EPC.
847 * Two instructions if the instruction is in a branch delay slot. 969 * Two instructions if the instruction is in a branch delay slot.
848 */ 970 */
@@ -856,7 +978,6 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
856 int likely, pc_inc; 978 int likely, pc_inc;
857 u32 __user *wva; 979 u32 __user *wva;
858 u64 __user *dva; 980 u64 __user *dva;
859 u32 value;
860 u32 wval; 981 u32 wval;
861 u64 dval; 982 u64 dval;
862 int sig; 983 int sig;
@@ -1049,42 +1170,12 @@ emul:
1049 1170
1050 case cfc_op: 1171 case cfc_op:
1051 /* cop control register rd -> gpr[rt] */ 1172 /* cop control register rd -> gpr[rt] */
1052 if (MIPSInst_RD(ir) == FPCREG_CSR) { 1173 cop1_cfc(xcp, ctx, ir);
1053 value = ctx->fcr31;
1054 value = (value & ~FPU_CSR_RM) | modeindex(value);
1055 pr_debug("%p gpr[%d]<-csr=%08x\n",
1056 (void *) (xcp->cp0_epc),
1057 MIPSInst_RT(ir), value);
1058 }
1059 else if (MIPSInst_RD(ir) == FPCREG_RID)
1060 value = 0;
1061 else
1062 value = 0;
1063 if (MIPSInst_RT(ir))
1064 xcp->regs[MIPSInst_RT(ir)] = value;
1065 break; 1174 break;
1066 1175
1067 case ctc_op: 1176 case ctc_op:
1068 /* copregister rd <- rt */ 1177 /* copregister rd <- rt */
1069 if (MIPSInst_RT(ir) == 0) 1178 cop1_ctc(xcp, ctx, ir);
1070 value = 0;
1071 else
1072 value = xcp->regs[MIPSInst_RT(ir)];
1073
1074 /* we only have one writable control reg
1075 */
1076 if (MIPSInst_RD(ir) == FPCREG_CSR) {
1077 pr_debug("%p gpr[%d]->csr=%08x\n",
1078 (void *) (xcp->cp0_epc),
1079 MIPSInst_RT(ir), value);
1080
1081 /*
1082 * Don't write reserved bits,
1083 * and convert to ieee library modes
1084 */
1085 ctx->fcr31 = (value & ~(FPU_CSR_RSVD | FPU_CSR_RM)) |
1086 modeindex(value);
1087 }
1088 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { 1179 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
1089 return SIGFPE; 1180 return SIGFPE;
1090 } 1181 }
@@ -1103,17 +1194,18 @@ emul:
1103 likely = 0; 1194 likely = 0;
1104 switch (MIPSInst_RT(ir) & 3) { 1195 switch (MIPSInst_RT(ir) & 3) {
1105 case bcfl_op: 1196 case bcfl_op:
1106 likely = 1; 1197 if (cpu_has_mips_2_3_4_5_r)
1198 likely = 1;
1199 /* Fall through */
1107 case bcf_op: 1200 case bcf_op:
1108 cond = !cond; 1201 cond = !cond;
1109 break; 1202 break;
1110 case bctl_op: 1203 case bctl_op:
1111 likely = 1; 1204 if (cpu_has_mips_2_3_4_5_r)
1205 likely = 1;
1206 /* Fall through */
1112 case bct_op: 1207 case bct_op:
1113 break; 1208 break;
1114 default:
1115 /* thats an illegal instruction */
1116 return SIGILL;
1117 } 1209 }
1118 1210
1119 set_delay_slot(xcp); 1211 set_delay_slot(xcp);
@@ -1121,6 +1213,14 @@ emul:
1121 /* 1213 /*
1122 * Branch taken: emulate dslot instruction 1214 * Branch taken: emulate dslot instruction
1123 */ 1215 */
1216 unsigned long bcpc;
1217
1218 /*
1219 * Remember EPC at the branch to point back
1220 * at so that any delay-slot instruction
1221 * signal is not silently ignored.
1222 */
1223 bcpc = xcp->cp0_epc;
1124 xcp->cp0_epc += dec_insn.pc_inc; 1224 xcp->cp0_epc += dec_insn.pc_inc;
1125 1225
1126 contpc = MIPSInst_SIMM(ir); 1226 contpc = MIPSInst_SIMM(ir);
@@ -1146,63 +1246,77 @@ emul:
1146 * Single step the non-CP1 1246 * Single step the non-CP1
1147 * instruction in the dslot. 1247 * instruction in the dslot.
1148 */ 1248 */
1149 return mips_dsemul(xcp, ir, contpc); 1249 sig = mips_dsemul(xcp, ir,
1250 contpc);
1251 if (sig)
1252 xcp->cp0_epc = bcpc;
1253 /*
1254 * SIGILL forces out of
1255 * the emulation loop.
1256 */
1257 return sig ? sig : SIGILL;
1150 } 1258 }
1151 } else 1259 } else
1152 contpc = (xcp->cp0_epc + (contpc << 2)); 1260 contpc = (xcp->cp0_epc + (contpc << 2));
1153 1261
1154 switch (MIPSInst_OPCODE(ir)) { 1262 switch (MIPSInst_OPCODE(ir)) {
1155 case lwc1_op: 1263 case lwc1_op:
1156 goto emul;
1157
1158 case swc1_op: 1264 case swc1_op:
1159 goto emul; 1265 goto emul;
1160 1266
1161 case ldc1_op: 1267 case ldc1_op:
1162 case sdc1_op: 1268 case sdc1_op:
1163 if (cpu_has_mips_2_3_4_5 || 1269 if (cpu_has_mips_2_3_4_5_r)
1164 cpu_has_mips64)
1165 goto emul; 1270 goto emul;
1166 1271
1167 return SIGILL; 1272 goto bc_sigill;
1168 goto emul;
1169 1273
1170 case cop1_op: 1274 case cop1_op:
1171 goto emul; 1275 goto emul;
1172 1276
1173 case cop1x_op: 1277 case cop1x_op:
1174 if (cpu_has_mips_4_5 || cpu_has_mips64 || cpu_has_mips32r2) 1278 if (cpu_has_mips_4_5_64_r2_r6)
1175 /* its one of ours */ 1279 /* its one of ours */
1176 goto emul; 1280 goto emul;
1177 1281
1178 return SIGILL; 1282 goto bc_sigill;
1179 1283
1180 case spec_op: 1284 case spec_op:
1181 if (!cpu_has_mips_4_5_r) 1285 switch (MIPSInst_FUNC(ir)) {
1182 return SIGILL; 1286 case movc_op:
1287 if (cpu_has_mips_4_5_r)
1288 goto emul;
1183 1289
1184 if (MIPSInst_FUNC(ir) == movc_op) 1290 goto bc_sigill;
1185 goto emul; 1291 }
1186 break; 1292 break;
1293
1294 bc_sigill:
1295 xcp->cp0_epc = bcpc;
1296 return SIGILL;
1187 } 1297 }
1188 1298
1189 /* 1299 /*
1190 * Single step the non-cp1 1300 * Single step the non-cp1
1191 * instruction in the dslot 1301 * instruction in the dslot
1192 */ 1302 */
1193 return mips_dsemul(xcp, ir, contpc); 1303 sig = mips_dsemul(xcp, ir, contpc);
1304 if (sig)
1305 xcp->cp0_epc = bcpc;
1306 /* SIGILL forces out of the emulation loop. */
1307 return sig ? sig : SIGILL;
1194 } else if (likely) { /* branch not taken */ 1308 } else if (likely) { /* branch not taken */
1195 /* 1309 /*
1196 * branch likely nullifies 1310 * branch likely nullifies
1197 * dslot if not taken 1311 * dslot if not taken
1198 */ 1312 */
1199 xcp->cp0_epc += dec_insn.pc_inc; 1313 xcp->cp0_epc += dec_insn.pc_inc;
1200 contpc += dec_insn.pc_inc; 1314 contpc += dec_insn.pc_inc;
1201 /* 1315 /*
1202 * else continue & execute 1316 * else continue & execute
1203 * dslot as normal insn 1317 * dslot as normal insn
1204 */ 1318 */
1205 } 1319 }
1206 break; 1320 break;
1207 1321
1208 default: 1322 default:
@@ -1216,7 +1330,7 @@ emul:
1216 break; 1330 break;
1217 1331
1218 case cop1x_op: 1332 case cop1x_op:
1219 if (!cpu_has_mips_4_5 && !cpu_has_mips64 && !cpu_has_mips32r2) 1333 if (!cpu_has_mips_4_5_64_r2_r6)
1220 return SIGILL; 1334 return SIGILL;
1221 1335
1222 sig = fpux_emu(xcp, ctx, ir, fault_addr); 1336 sig = fpux_emu(xcp, ctx, ir, fault_addr);
@@ -1549,7 +1663,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1549 1663
1550 /* unary ops */ 1664 /* unary ops */
1551 case fsqrt_op: 1665 case fsqrt_op:
1552 if (!cpu_has_mips_4_5_r) 1666 if (!cpu_has_mips_2_3_4_5_r)
1553 return SIGILL; 1667 return SIGILL;
1554 1668
1555 handler.u = ieee754sp_sqrt; 1669 handler.u = ieee754sp_sqrt;
@@ -1561,14 +1675,14 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1561 * achieve full IEEE-754 accuracy - however this emulator does. 1675 * achieve full IEEE-754 accuracy - however this emulator does.
1562 */ 1676 */
1563 case frsqrt_op: 1677 case frsqrt_op:
1564 if (!cpu_has_mips_4_5_r2_r6) 1678 if (!cpu_has_mips_4_5_64_r2_r6)
1565 return SIGILL; 1679 return SIGILL;
1566 1680
1567 handler.u = fpemu_sp_rsqrt; 1681 handler.u = fpemu_sp_rsqrt;
1568 goto scopuop; 1682 goto scopuop;
1569 1683
1570 case frecip_op: 1684 case frecip_op:
1571 if (!cpu_has_mips_4_5_r2_r6) 1685 if (!cpu_has_mips_4_5_64_r2_r6)
1572 return SIGILL; 1686 return SIGILL;
1573 1687
1574 handler.u = fpemu_sp_recip; 1688 handler.u = fpemu_sp_recip;
@@ -1670,19 +1784,19 @@ copcsr:
1670 case ftrunc_op: 1784 case ftrunc_op:
1671 case fceil_op: 1785 case fceil_op:
1672 case ffloor_op: 1786 case ffloor_op:
1673 if (!cpu_has_mips_2_3_4_5 && !cpu_has_mips64) 1787 if (!cpu_has_mips_2_3_4_5_r)
1674 return SIGILL; 1788 return SIGILL;
1675 1789
1676 oldrm = ieee754_csr.rm; 1790 oldrm = ieee754_csr.rm;
1677 SPFROMREG(fs, MIPSInst_FS(ir)); 1791 SPFROMREG(fs, MIPSInst_FS(ir));
1678 ieee754_csr.rm = modeindex(MIPSInst_FUNC(ir)); 1792 ieee754_csr.rm = MIPSInst_FUNC(ir);
1679 rv.w = ieee754sp_tint(fs); 1793 rv.w = ieee754sp_tint(fs);
1680 ieee754_csr.rm = oldrm; 1794 ieee754_csr.rm = oldrm;
1681 rfmt = w_fmt; 1795 rfmt = w_fmt;
1682 goto copcsr; 1796 goto copcsr;
1683 1797
1684 case fcvtl_op: 1798 case fcvtl_op:
1685 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64) 1799 if (!cpu_has_mips_3_4_5_64_r2_r6)
1686 return SIGILL; 1800 return SIGILL;
1687 1801
1688 SPFROMREG(fs, MIPSInst_FS(ir)); 1802 SPFROMREG(fs, MIPSInst_FS(ir));
@@ -1694,12 +1808,12 @@ copcsr:
1694 case ftruncl_op: 1808 case ftruncl_op:
1695 case fceill_op: 1809 case fceill_op:
1696 case ffloorl_op: 1810 case ffloorl_op:
1697 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64) 1811 if (!cpu_has_mips_3_4_5_64_r2_r6)
1698 return SIGILL; 1812 return SIGILL;
1699 1813
1700 oldrm = ieee754_csr.rm; 1814 oldrm = ieee754_csr.rm;
1701 SPFROMREG(fs, MIPSInst_FS(ir)); 1815 SPFROMREG(fs, MIPSInst_FS(ir));
1702 ieee754_csr.rm = modeindex(MIPSInst_FUNC(ir)); 1816 ieee754_csr.rm = MIPSInst_FUNC(ir);
1703 rv.l = ieee754sp_tlong(fs); 1817 rv.l = ieee754sp_tlong(fs);
1704 ieee754_csr.rm = oldrm; 1818 ieee754_csr.rm = oldrm;
1705 rfmt = l_fmt; 1819 rfmt = l_fmt;
@@ -1763,13 +1877,13 @@ copcsr:
1763 * achieve full IEEE-754 accuracy - however this emulator does. 1877 * achieve full IEEE-754 accuracy - however this emulator does.
1764 */ 1878 */
1765 case frsqrt_op: 1879 case frsqrt_op:
1766 if (!cpu_has_mips_4_5_r2_r6) 1880 if (!cpu_has_mips_4_5_64_r2_r6)
1767 return SIGILL; 1881 return SIGILL;
1768 1882
1769 handler.u = fpemu_dp_rsqrt; 1883 handler.u = fpemu_dp_rsqrt;
1770 goto dcopuop; 1884 goto dcopuop;
1771 case frecip_op: 1885 case frecip_op:
1772 if (!cpu_has_mips_4_5_r2_r6) 1886 if (!cpu_has_mips_4_5_64_r2_r6)
1773 return SIGILL; 1887 return SIGILL;
1774 1888
1775 handler.u = fpemu_dp_recip; 1889 handler.u = fpemu_dp_recip;
@@ -1852,14 +1966,14 @@ dcopuop:
1852 1966
1853 oldrm = ieee754_csr.rm; 1967 oldrm = ieee754_csr.rm;
1854 DPFROMREG(fs, MIPSInst_FS(ir)); 1968 DPFROMREG(fs, MIPSInst_FS(ir));
1855 ieee754_csr.rm = modeindex(MIPSInst_FUNC(ir)); 1969 ieee754_csr.rm = MIPSInst_FUNC(ir);
1856 rv.w = ieee754dp_tint(fs); 1970 rv.w = ieee754dp_tint(fs);
1857 ieee754_csr.rm = oldrm; 1971 ieee754_csr.rm = oldrm;
1858 rfmt = w_fmt; 1972 rfmt = w_fmt;
1859 goto copcsr; 1973 goto copcsr;
1860 1974
1861 case fcvtl_op: 1975 case fcvtl_op:
1862 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64) 1976 if (!cpu_has_mips_3_4_5_64_r2_r6)
1863 return SIGILL; 1977 return SIGILL;
1864 1978
1865 DPFROMREG(fs, MIPSInst_FS(ir)); 1979 DPFROMREG(fs, MIPSInst_FS(ir));
@@ -1871,12 +1985,12 @@ dcopuop:
1871 case ftruncl_op: 1985 case ftruncl_op:
1872 case fceill_op: 1986 case fceill_op:
1873 case ffloorl_op: 1987 case ffloorl_op:
1874 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64) 1988 if (!cpu_has_mips_3_4_5_64_r2_r6)
1875 return SIGILL; 1989 return SIGILL;
1876 1990
1877 oldrm = ieee754_csr.rm; 1991 oldrm = ieee754_csr.rm;
1878 DPFROMREG(fs, MIPSInst_FS(ir)); 1992 DPFROMREG(fs, MIPSInst_FS(ir));
1879 ieee754_csr.rm = modeindex(MIPSInst_FUNC(ir)); 1993 ieee754_csr.rm = MIPSInst_FUNC(ir);
1880 rv.l = ieee754dp_tlong(fs); 1994 rv.l = ieee754dp_tlong(fs);
1881 ieee754_csr.rm = oldrm; 1995 ieee754_csr.rm = oldrm;
1882 rfmt = l_fmt; 1996 rfmt = l_fmt;
@@ -1930,7 +2044,7 @@ dcopuop:
1930 2044
1931 case l_fmt: 2045 case l_fmt:
1932 2046
1933 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64) 2047 if (!cpu_has_mips_3_4_5_64_r2_r6)
1934 return SIGILL; 2048 return SIGILL;
1935 2049
1936 DIFROMREG(bits, MIPSInst_FS(ir)); 2050 DIFROMREG(bits, MIPSInst_FS(ir));
@@ -1994,7 +2108,7 @@ dcopuop:
1994 SITOREG(rv.w, MIPSInst_FD(ir)); 2108 SITOREG(rv.w, MIPSInst_FD(ir));
1995 break; 2109 break;
1996 case l_fmt: 2110 case l_fmt:
1997 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64) 2111 if (!cpu_has_mips_3_4_5_64_r2_r6)
1998 return SIGILL; 2112 return SIGILL;
1999 2113
2000 DITOREG(rv.l, MIPSInst_FD(ir)); 2114 DITOREG(rv.l, MIPSInst_FD(ir));
@@ -2081,10 +2195,8 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
2081 xcp->cp0_epc += dec_insn.pc_inc; /* Skip NOPs */ 2195 xcp->cp0_epc += dec_insn.pc_inc; /* Skip NOPs */
2082 else { 2196 else {
2083 /* 2197 /*
2084 * The 'ieee754_csr' is an alias of 2198 * The 'ieee754_csr' is an alias of ctx->fcr31.
2085 * ctx->fcr31. No need to copy ctx->fcr31 to 2199 * No need to copy ctx->fcr31 to ieee754_csr.
2086 * ieee754_csr. But ieee754_csr.rm is ieee
2087 * library modes. (not mips rounding mode)
2088 */ 2200 */
2089 sig = cop1Emulate(xcp, ctx, dec_insn, fault_addr); 2201 sig = cop1Emulate(xcp, ctx, dec_insn, fault_addr);
2090 } 2202 }
diff --git a/arch/mips/math-emu/dp_add.c b/arch/mips/math-emu/dp_add.c
index 7f64577df984..8954ef031f84 100644
--- a/arch/mips/math-emu/dp_add.c
+++ b/arch/mips/math-emu/dp_add.c
@@ -37,19 +37,20 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
37 FLUSHYDP; 37 FLUSHYDP;
38 38
39 switch (CLPAIR(xc, yc)) { 39 switch (CLPAIR(xc, yc)) {
40 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
41 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN): 40 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
42 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
43 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN): 41 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
44 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN): 42 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
45 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN): 43 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
46 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN): 44 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
45 return ieee754dp_nanxcpt(y);
46
47 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
48 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
47 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO): 49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
48 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM): 50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM): 51 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): 52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
51 ieee754_setcx(IEEE754_INVALID_OPERATION); 53 return ieee754dp_nanxcpt(x);
52 return ieee754dp_nanxcpt(ieee754dp_indef());
53 54
54 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): 55 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
55 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): 56 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
@@ -150,8 +151,6 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
150 * leaving result in xm, xs and xe. 151 * leaving result in xm, xs and xe.
151 */ 152 */
152 xm = xm + ym; 153 xm = xm + ym;
153 xe = xe;
154 xs = xs;
155 154
156 if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */ 155 if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */
157 xm = XDPSRS1(xm); 156 xm = XDPSRS1(xm);
@@ -160,11 +159,8 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
160 } else { 159 } else {
161 if (xm >= ym) { 160 if (xm >= ym) {
162 xm = xm - ym; 161 xm = xm - ym;
163 xe = xe;
164 xs = xs;
165 } else { 162 } else {
166 xm = ym - xm; 163 xm = ym - xm;
167 xe = xe;
168 xs = ys; 164 xs = ys;
169 } 165 }
170 if (xm == 0) 166 if (xm == 0)
diff --git a/arch/mips/math-emu/dp_cmp.c b/arch/mips/math-emu/dp_cmp.c
index 30f95f6e9ac4..a29880e29ae4 100644
--- a/arch/mips/math-emu/dp_cmp.c
+++ b/arch/mips/math-emu/dp_cmp.c
@@ -35,16 +35,11 @@ int ieee754dp_cmp(union ieee754dp x, union ieee754dp y, int cmp, int sig)
35 FLUSHYDP; 35 FLUSHYDP;
36 ieee754_clearcx(); /* Even clear inexact flag here */ 36 ieee754_clearcx(); /* Even clear inexact flag here */
37 37
38 if (ieee754dp_isnan(x) || ieee754dp_isnan(y)) { 38 if (ieee754_class_nan(xc) || ieee754_class_nan(yc)) {
39 if (sig || xc == IEEE754_CLASS_SNAN || yc == IEEE754_CLASS_SNAN) 39 if (sig ||
40 xc == IEEE754_CLASS_SNAN || yc == IEEE754_CLASS_SNAN)
40 ieee754_setcx(IEEE754_INVALID_OPERATION); 41 ieee754_setcx(IEEE754_INVALID_OPERATION);
41 if (cmp & IEEE754_CUN) 42 return (cmp & IEEE754_CUN) != 0;
42 return 1;
43 if (cmp & (IEEE754_CLT | IEEE754_CGT)) {
44 if (sig && ieee754_setandtestcx(IEEE754_INVALID_OPERATION))
45 return 0;
46 }
47 return 0;
48 } else { 43 } else {
49 vx = x.bits; 44 vx = x.bits;
50 vy = y.bits; 45 vy = y.bits;
diff --git a/arch/mips/math-emu/dp_div.c b/arch/mips/math-emu/dp_div.c
index bef0e55e5938..f4746f7c5f63 100644
--- a/arch/mips/math-emu/dp_div.c
+++ b/arch/mips/math-emu/dp_div.c
@@ -39,19 +39,20 @@ union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y)
39 FLUSHYDP; 39 FLUSHYDP;
40 40
41 switch (CLPAIR(xc, yc)) { 41 switch (CLPAIR(xc, yc)) {
42 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
43 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN): 42 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
44 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
45 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN): 43 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
46 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN): 44 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
47 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN): 45 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
48 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN): 46 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
47 return ieee754dp_nanxcpt(y);
48
49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO): 51 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM): 52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
51 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM): 53 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): 54 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
53 ieee754_setcx(IEEE754_INVALID_OPERATION); 55 return ieee754dp_nanxcpt(x);
54 return ieee754dp_nanxcpt(ieee754dp_indef());
55 56
56 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): 57 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
57 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): 58 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
diff --git a/arch/mips/math-emu/dp_fsp.c b/arch/mips/math-emu/dp_fsp.c
index ffb69c5830b0..57d09ca5403a 100644
--- a/arch/mips/math-emu/dp_fsp.c
+++ b/arch/mips/math-emu/dp_fsp.c
@@ -22,6 +22,12 @@
22#include "ieee754sp.h" 22#include "ieee754sp.h"
23#include "ieee754dp.h" 23#include "ieee754dp.h"
24 24
25static inline union ieee754dp ieee754dp_nan_fsp(int xs, u64 xm)
26{
27 return builddp(xs, DP_EMAX + 1 + DP_EBIAS,
28 xm << (DP_FBITS - SP_FBITS));
29}
30
25union ieee754dp ieee754dp_fsp(union ieee754sp x) 31union ieee754dp ieee754dp_fsp(union ieee754sp x)
26{ 32{
27 COMPXSP; 33 COMPXSP;
@@ -34,15 +40,11 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x)
34 40
35 switch (xc) { 41 switch (xc) {
36 case IEEE754_CLASS_SNAN: 42 case IEEE754_CLASS_SNAN:
37 ieee754_setcx(IEEE754_INVALID_OPERATION); 43 return ieee754dp_nanxcpt(ieee754dp_nan_fsp(xs, xm));
38 return ieee754dp_nanxcpt(ieee754dp_indef());
39 44
40 case IEEE754_CLASS_QNAN: 45 case IEEE754_CLASS_QNAN:
41 return ieee754dp_nanxcpt(builddp(xs, 46 return ieee754dp_nan_fsp(xs, xm);
42 DP_EMAX + 1 + DP_EBIAS, 47
43 ((u64) xm
44 << (DP_FBITS -
45 SP_FBITS))));
46 case IEEE754_CLASS_INF: 48 case IEEE754_CLASS_INF:
47 return ieee754dp_inf(xs); 49 return ieee754dp_inf(xs);
48 50
diff --git a/arch/mips/math-emu/dp_mul.c b/arch/mips/math-emu/dp_mul.c
index d3acdedb5b9d..d0901f03fa19 100644
--- a/arch/mips/math-emu/dp_mul.c
+++ b/arch/mips/math-emu/dp_mul.c
@@ -47,19 +47,20 @@ union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y)
47 FLUSHYDP; 47 FLUSHYDP;
48 48
49 switch (CLPAIR(xc, yc)) { 49 switch (CLPAIR(xc, yc)) {
50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
51 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN): 50 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
53 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN): 51 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
54 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN): 52 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
55 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN): 53 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
56 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN): 54 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
55 return ieee754dp_nanxcpt(y);
56
57 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
58 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
57 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO): 59 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
58 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM): 60 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
59 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM): 61 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
60 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): 62 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
61 ieee754_setcx(IEEE754_INVALID_OPERATION); 63 return ieee754dp_nanxcpt(x);
62 return ieee754dp_nanxcpt(ieee754dp_indef());
63 64
64 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): 65 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
65 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): 66 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
diff --git a/arch/mips/math-emu/dp_simple.c b/arch/mips/math-emu/dp_simple.c
index bccbe90efceb..926d56bf37f2 100644
--- a/arch/mips/math-emu/dp_simple.c
+++ b/arch/mips/math-emu/dp_simple.c
@@ -23,44 +23,27 @@
23 23
24union ieee754dp ieee754dp_neg(union ieee754dp x) 24union ieee754dp ieee754dp_neg(union ieee754dp x)
25{ 25{
26 COMPXDP; 26 unsigned int oldrm;
27 27 union ieee754dp y;
28 EXPLODEXDP; 28
29 ieee754_clearcx(); 29 oldrm = ieee754_csr.rm;
30 FLUSHXDP; 30 ieee754_csr.rm = FPU_CSR_RD;
31 31 y = ieee754dp_sub(ieee754dp_zero(0), x);
32 /* 32 ieee754_csr.rm = oldrm;
33 * Invert the sign ALWAYS to prevent an endless recursion on 33 return y;
34 * pow() in libc.
35 */
36 /* quick fix up */
37 DPSIGN(x) ^= 1;
38
39 if (xc == IEEE754_CLASS_SNAN) {
40 union ieee754dp y = ieee754dp_indef();
41 ieee754_setcx(IEEE754_INVALID_OPERATION);
42 DPSIGN(y) = DPSIGN(x);
43 return ieee754dp_nanxcpt(y);
44 }
45
46 return x;
47} 34}
48 35
49union ieee754dp ieee754dp_abs(union ieee754dp x) 36union ieee754dp ieee754dp_abs(union ieee754dp x)
50{ 37{
51 COMPXDP; 38 unsigned int oldrm;
52 39 union ieee754dp y;
53 EXPLODEXDP; 40
54 ieee754_clearcx(); 41 oldrm = ieee754_csr.rm;
55 FLUSHXDP; 42 ieee754_csr.rm = FPU_CSR_RD;
56 43 if (DPSIGN(x))
57 /* Clear sign ALWAYS, irrespective of NaN */ 44 y = ieee754dp_sub(ieee754dp_zero(0), x);
58 DPSIGN(x) = 0; 45 else
59 46 y = ieee754dp_add(ieee754dp_zero(0), x);
60 if (xc == IEEE754_CLASS_SNAN) { 47 ieee754_csr.rm = oldrm;
61 ieee754_setcx(IEEE754_INVALID_OPERATION); 48 return y;
62 return ieee754dp_nanxcpt(ieee754dp_indef());
63 }
64
65 return x;
66} 49}
diff --git a/arch/mips/math-emu/dp_sqrt.c b/arch/mips/math-emu/dp_sqrt.c
index 041bbb6124bb..cd5bc083001e 100644
--- a/arch/mips/math-emu/dp_sqrt.c
+++ b/arch/mips/math-emu/dp_sqrt.c
@@ -42,13 +42,12 @@ union ieee754dp ieee754dp_sqrt(union ieee754dp x)
42 42
43 /* x == INF or NAN? */ 43 /* x == INF or NAN? */
44 switch (xc) { 44 switch (xc) {
45 case IEEE754_CLASS_QNAN: 45 case IEEE754_CLASS_SNAN:
46 /* sqrt(Nan) = Nan */
47 return ieee754dp_nanxcpt(x); 46 return ieee754dp_nanxcpt(x);
48 47
49 case IEEE754_CLASS_SNAN: 48 case IEEE754_CLASS_QNAN:
50 ieee754_setcx(IEEE754_INVALID_OPERATION); 49 /* sqrt(Nan) = Nan */
51 return ieee754dp_nanxcpt(ieee754dp_indef()); 50 return x;
52 51
53 case IEEE754_CLASS_ZERO: 52 case IEEE754_CLASS_ZERO:
54 /* sqrt(0) = 0 */ 53 /* sqrt(0) = 0 */
@@ -58,7 +57,7 @@ union ieee754dp ieee754dp_sqrt(union ieee754dp x)
58 if (xs) { 57 if (xs) {
59 /* sqrt(-Inf) = Nan */ 58 /* sqrt(-Inf) = Nan */
60 ieee754_setcx(IEEE754_INVALID_OPERATION); 59 ieee754_setcx(IEEE754_INVALID_OPERATION);
61 return ieee754dp_nanxcpt(ieee754dp_indef()); 60 return ieee754dp_indef();
62 } 61 }
63 /* sqrt(+Inf) = Inf */ 62 /* sqrt(+Inf) = Inf */
64 return x; 63 return x;
@@ -71,7 +70,7 @@ union ieee754dp ieee754dp_sqrt(union ieee754dp x)
71 if (xs) { 70 if (xs) {
72 /* sqrt(-x) = Nan */ 71 /* sqrt(-x) = Nan */
73 ieee754_setcx(IEEE754_INVALID_OPERATION); 72 ieee754_setcx(IEEE754_INVALID_OPERATION);
74 return ieee754dp_nanxcpt(ieee754dp_indef()); 73 return ieee754dp_indef();
75 } 74 }
76 break; 75 break;
77 } 76 }
diff --git a/arch/mips/math-emu/dp_sub.c b/arch/mips/math-emu/dp_sub.c
index 7a174029043a..fc17a781b9ae 100644
--- a/arch/mips/math-emu/dp_sub.c
+++ b/arch/mips/math-emu/dp_sub.c
@@ -37,19 +37,20 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
37 FLUSHYDP; 37 FLUSHYDP;
38 38
39 switch (CLPAIR(xc, yc)) { 39 switch (CLPAIR(xc, yc)) {
40 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
41 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN): 40 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
42 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
43 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN): 41 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
44 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN): 42 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
45 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN): 43 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
46 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN): 44 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
45 return ieee754dp_nanxcpt(y);
46
47 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
48 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
47 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO): 49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
48 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM): 50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM): 51 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): 52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
51 ieee754_setcx(IEEE754_INVALID_OPERATION); 53 return ieee754dp_nanxcpt(x);
52 return ieee754dp_nanxcpt(ieee754dp_indef());
53 54
54 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): 55 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
55 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): 56 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
@@ -153,8 +154,6 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
153 /* generate 28 bit result of adding two 27 bit numbers 154 /* generate 28 bit result of adding two 27 bit numbers
154 */ 155 */
155 xm = xm + ym; 156 xm = xm + ym;
156 xe = xe;
157 xs = xs;
158 157
159 if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */ 158 if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */
160 xm = XDPSRS1(xm); /* shift preserving sticky */ 159 xm = XDPSRS1(xm); /* shift preserving sticky */
@@ -163,11 +162,8 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
163 } else { 162 } else {
164 if (xm >= ym) { 163 if (xm >= ym) {
165 xm = xm - ym; 164 xm = xm - ym;
166 xe = xe;
167 xs = xs;
168 } else { 165 } else {
169 xm = ym - xm; 166 xm = ym - xm;
170 xe = xe;
171 xs = ys; 167 xs = ys;
172 } 168 }
173 if (xm == 0) { 169 if (xm == 0) {
diff --git a/arch/mips/math-emu/dsemul.c b/arch/mips/math-emu/dsemul.c
index 4f514f3724cb..e0b5cc27d78b 100644
--- a/arch/mips/math-emu/dsemul.c
+++ b/arch/mips/math-emu/dsemul.c
@@ -94,9 +94,9 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
94 regs->cp0_epc = ((unsigned long) &fr->emul) | 94 regs->cp0_epc = ((unsigned long) &fr->emul) |
95 get_isa16_mode(regs->cp0_epc); 95 get_isa16_mode(regs->cp0_epc);
96 96
97 flush_cache_sigtramp((unsigned long)&fr->badinst); 97 flush_cache_sigtramp((unsigned long)&fr->emul);
98 98
99 return SIGILL; /* force out of emulation loop */ 99 return 0;
100} 100}
101 101
102int do_dsemulret(struct pt_regs *xcp) 102int do_dsemulret(struct pt_regs *xcp)
@@ -158,6 +158,6 @@ int do_dsemulret(struct pt_regs *xcp)
158 158
159 /* Set EPC to return to post-branch instruction */ 159 /* Set EPC to return to post-branch instruction */
160 xcp->cp0_epc = epc; 160 xcp->cp0_epc = epc;
161 161 MIPS_FPU_EMU_INC_STATS(ds_emul);
162 return 1; 162 return 1;
163} 163}
diff --git a/arch/mips/math-emu/ieee754.h b/arch/mips/math-emu/ieee754.h
index 43c4fb522ac2..a5ca108ce467 100644
--- a/arch/mips/math-emu/ieee754.h
+++ b/arch/mips/math-emu/ieee754.h
@@ -126,84 +126,21 @@ enum {
126#define IEEE754_CGT 0x04 126#define IEEE754_CGT 0x04
127#define IEEE754_CUN 0x08 127#define IEEE754_CUN 0x08
128 128
129/* "normal" comparisons
130*/
131static inline int ieee754sp_eq(union ieee754sp x, union ieee754sp y)
132{
133 return ieee754sp_cmp(x, y, IEEE754_CEQ, 0);
134}
135
136static inline int ieee754sp_ne(union ieee754sp x, union ieee754sp y)
137{
138 return ieee754sp_cmp(x, y,
139 IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0);
140}
141
142static inline int ieee754sp_lt(union ieee754sp x, union ieee754sp y)
143{
144 return ieee754sp_cmp(x, y, IEEE754_CLT, 0);
145}
146
147static inline int ieee754sp_le(union ieee754sp x, union ieee754sp y)
148{
149 return ieee754sp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0);
150}
151
152static inline int ieee754sp_gt(union ieee754sp x, union ieee754sp y)
153{
154 return ieee754sp_cmp(x, y, IEEE754_CGT, 0);
155}
156
157
158static inline int ieee754sp_ge(union ieee754sp x, union ieee754sp y)
159{
160 return ieee754sp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0);
161}
162
163static inline int ieee754dp_eq(union ieee754dp x, union ieee754dp y)
164{
165 return ieee754dp_cmp(x, y, IEEE754_CEQ, 0);
166}
167
168static inline int ieee754dp_ne(union ieee754dp x, union ieee754dp y)
169{
170 return ieee754dp_cmp(x, y,
171 IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0);
172}
173
174static inline int ieee754dp_lt(union ieee754dp x, union ieee754dp y)
175{
176 return ieee754dp_cmp(x, y, IEEE754_CLT, 0);
177}
178
179static inline int ieee754dp_le(union ieee754dp x, union ieee754dp y)
180{
181 return ieee754dp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0);
182}
183
184static inline int ieee754dp_gt(union ieee754dp x, union ieee754dp y)
185{
186 return ieee754dp_cmp(x, y, IEEE754_CGT, 0);
187}
188
189static inline int ieee754dp_ge(union ieee754dp x, union ieee754dp y)
190{
191 return ieee754dp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0);
192}
193
194/* 129/*
195 * The control status register 130 * The control status register
196 */ 131 */
197struct _ieee754_csr { 132struct _ieee754_csr {
198 __BITFIELD_FIELD(unsigned pad0:7, 133 __BITFIELD_FIELD(unsigned fcc:7, /* condition[7:1] */
199 __BITFIELD_FIELD(unsigned nod:1, /* set 1 for no denormalised numbers */ 134 __BITFIELD_FIELD(unsigned nod:1, /* set 1 for no denormals */
200 __BITFIELD_FIELD(unsigned c:1, /* condition */ 135 __BITFIELD_FIELD(unsigned c:1, /* condition[0] */
201 __BITFIELD_FIELD(unsigned pad1:5, 136 __BITFIELD_FIELD(unsigned pad0:3,
137 __BITFIELD_FIELD(unsigned abs2008:1, /* IEEE 754-2008 ABS/NEG.fmt */
138 __BITFIELD_FIELD(unsigned nan2008:1, /* IEEE 754-2008 NaN mode */
202 __BITFIELD_FIELD(unsigned cx:6, /* exceptions this operation */ 139 __BITFIELD_FIELD(unsigned cx:6, /* exceptions this operation */
203 __BITFIELD_FIELD(unsigned mx:5, /* exception enable mask */ 140 __BITFIELD_FIELD(unsigned mx:5, /* exception enable mask */
204 __BITFIELD_FIELD(unsigned sx:5, /* exceptions total */ 141 __BITFIELD_FIELD(unsigned sx:5, /* exceptions total */
205 __BITFIELD_FIELD(unsigned rm:2, /* current rounding mode */ 142 __BITFIELD_FIELD(unsigned rm:2, /* current rounding mode */
206 ;)))))))) 143 ;))))))))))
207}; 144};
208#define ieee754_csr (*(struct _ieee754_csr *)(&current->thread.fpu.fcr31)) 145#define ieee754_csr (*(struct _ieee754_csr *)(&current->thread.fpu.fcr31))
209 146
@@ -257,23 +194,23 @@ static inline int ieee754_sxtest(unsigned n)
257union ieee754sp ieee754sp_dump(char *s, union ieee754sp x); 194union ieee754sp ieee754sp_dump(char *s, union ieee754sp x);
258union ieee754dp ieee754dp_dump(char *s, union ieee754dp x); 195union ieee754dp ieee754dp_dump(char *s, union ieee754dp x);
259 196
260#define IEEE754_SPCVAL_PZERO 0 197#define IEEE754_SPCVAL_PZERO 0 /* +0.0 */
261#define IEEE754_SPCVAL_NZERO 1 198#define IEEE754_SPCVAL_NZERO 1 /* -0.0 */
262#define IEEE754_SPCVAL_PONE 2 199#define IEEE754_SPCVAL_PONE 2 /* +1.0 */
263#define IEEE754_SPCVAL_NONE 3 200#define IEEE754_SPCVAL_NONE 3 /* -1.0 */
264#define IEEE754_SPCVAL_PTEN 4 201#define IEEE754_SPCVAL_PTEN 4 /* +10.0 */
265#define IEEE754_SPCVAL_NTEN 5 202#define IEEE754_SPCVAL_NTEN 5 /* -10.0 */
266#define IEEE754_SPCVAL_PINFINITY 6 203#define IEEE754_SPCVAL_PINFINITY 6 /* +inf */
267#define IEEE754_SPCVAL_NINFINITY 7 204#define IEEE754_SPCVAL_NINFINITY 7 /* -inf */
268#define IEEE754_SPCVAL_INDEF 8 205#define IEEE754_SPCVAL_INDEF 8 /* quiet NaN */
269#define IEEE754_SPCVAL_PMAX 9 /* +max norm */ 206#define IEEE754_SPCVAL_PMAX 9 /* +max norm */
270#define IEEE754_SPCVAL_NMAX 10 /* -max norm */ 207#define IEEE754_SPCVAL_NMAX 10 /* -max norm */
271#define IEEE754_SPCVAL_PMIN 11 /* +min norm */ 208#define IEEE754_SPCVAL_PMIN 11 /* +min norm */
272#define IEEE754_SPCVAL_NMIN 12 /* +min norm */ 209#define IEEE754_SPCVAL_NMIN 12 /* -min norm */
273#define IEEE754_SPCVAL_PMIND 13 /* +min denorm */ 210#define IEEE754_SPCVAL_PMIND 13 /* +min denorm */
274#define IEEE754_SPCVAL_NMIND 14 /* +min denorm */ 211#define IEEE754_SPCVAL_NMIND 14 /* -min denorm */
275#define IEEE754_SPCVAL_P1E31 15 /* + 1.0e31 */ 212#define IEEE754_SPCVAL_P1E31 15 /* + 1.0e31 */
276#define IEEE754_SPCVAL_P1E63 16 /* + 1.0e63 */ 213#define IEEE754_SPCVAL_P1E63 16 /* + 1.0e63 */
277 214
278extern const union ieee754dp __ieee754dp_spcvals[]; 215extern const union ieee754dp __ieee754dp_spcvals[];
279extern const union ieee754sp __ieee754sp_spcvals[]; 216extern const union ieee754sp __ieee754sp_spcvals[];
diff --git a/arch/mips/math-emu/ieee754dp.c b/arch/mips/math-emu/ieee754dp.c
index 068f45a415fc..522d843f2ffd 100644
--- a/arch/mips/math-emu/ieee754dp.c
+++ b/arch/mips/math-emu/ieee754dp.c
@@ -30,9 +30,9 @@ int ieee754dp_class(union ieee754dp x)
30 return xc; 30 return xc;
31} 31}
32 32
33int ieee754dp_isnan(union ieee754dp x) 33static inline int ieee754dp_isnan(union ieee754dp x)
34{ 34{
35 return ieee754dp_class(x) >= IEEE754_CLASS_SNAN; 35 return ieee754_class_nan(ieee754dp_class(x));
36} 36}
37 37
38static inline int ieee754dp_issnan(union ieee754dp x) 38static inline int ieee754dp_issnan(union ieee754dp x)
@@ -42,23 +42,16 @@ static inline int ieee754dp_issnan(union ieee754dp x)
42} 42}
43 43
44 44
45/*
46 * Raise the Invalid Operation IEEE 754 exception
47 * and convert the signaling NaN supplied to a quiet NaN.
48 */
45union ieee754dp __cold ieee754dp_nanxcpt(union ieee754dp r) 49union ieee754dp __cold ieee754dp_nanxcpt(union ieee754dp r)
46{ 50{
47 assert(ieee754dp_isnan(r)); 51 assert(ieee754dp_issnan(r));
48
49 if (!ieee754dp_issnan(r)) /* QNAN does not cause invalid op !! */
50 return r;
51
52 if (!ieee754_setandtestcx(IEEE754_INVALID_OPERATION)) {
53 /* not enabled convert to a quiet NaN */
54 DPMANT(r) &= (~DP_MBIT(DP_FBITS-1));
55 if (ieee754dp_isnan(r))
56 return r;
57 else
58 return ieee754dp_indef();
59 }
60 52
61 return r; 53 ieee754_setcx(IEEE754_INVALID_OPERATION);
54 return ieee754dp_indef();
62} 55}
63 56
64static u64 ieee754dp_get_rounding(int sn, u64 xm) 57static u64 ieee754dp_get_rounding(int sn, u64 xm)
diff --git a/arch/mips/math-emu/ieee754dp.h b/arch/mips/math-emu/ieee754dp.h
index 61fd6fd31350..e2babd98fee3 100644
--- a/arch/mips/math-emu/ieee754dp.h
+++ b/arch/mips/math-emu/ieee754dp.h
@@ -77,6 +77,5 @@ static inline union ieee754dp builddp(int s, int bx, u64 m)
77 return r; 77 return r;
78} 78}
79 79
80extern int ieee754dp_isnan(union ieee754dp);
81extern union ieee754dp __cold ieee754dp_nanxcpt(union ieee754dp); 80extern union ieee754dp __cold ieee754dp_nanxcpt(union ieee754dp);
82extern union ieee754dp ieee754dp_format(int, int, u64); 81extern union ieee754dp ieee754dp_format(int, int, u64);
diff --git a/arch/mips/math-emu/ieee754int.h b/arch/mips/math-emu/ieee754int.h
index f0365bb86747..05389d5e3a93 100644
--- a/arch/mips/math-emu/ieee754int.h
+++ b/arch/mips/math-emu/ieee754int.h
@@ -44,6 +44,11 @@ static inline int ieee754_setandtestcx(const unsigned int x)
44 return ieee754_csr.mx & x; 44 return ieee754_csr.mx & x;
45} 45}
46 46
47static inline int ieee754_class_nan(int xc)
48{
49 return xc >= IEEE754_CLASS_SNAN;
50}
51
47#define COMPXSP \ 52#define COMPXSP \
48 unsigned xm; int xe; int xs __maybe_unused; int xc 53 unsigned xm; int xe; int xs __maybe_unused; int xc
49 54
diff --git a/arch/mips/math-emu/ieee754sp.c b/arch/mips/math-emu/ieee754sp.c
index ba88301579c2..ca8e35e33bf7 100644
--- a/arch/mips/math-emu/ieee754sp.c
+++ b/arch/mips/math-emu/ieee754sp.c
@@ -30,9 +30,9 @@ int ieee754sp_class(union ieee754sp x)
30 return xc; 30 return xc;
31} 31}
32 32
33int ieee754sp_isnan(union ieee754sp x) 33static inline int ieee754sp_isnan(union ieee754sp x)
34{ 34{
35 return ieee754sp_class(x) >= IEEE754_CLASS_SNAN; 35 return ieee754_class_nan(ieee754sp_class(x));
36} 36}
37 37
38static inline int ieee754sp_issnan(union ieee754sp x) 38static inline int ieee754sp_issnan(union ieee754sp x)
@@ -42,23 +42,16 @@ static inline int ieee754sp_issnan(union ieee754sp x)
42} 42}
43 43
44 44
45/*
46 * Raise the Invalid Operation IEEE 754 exception
47 * and convert the signaling NaN supplied to a quiet NaN.
48 */
45union ieee754sp __cold ieee754sp_nanxcpt(union ieee754sp r) 49union ieee754sp __cold ieee754sp_nanxcpt(union ieee754sp r)
46{ 50{
47 assert(ieee754sp_isnan(r)); 51 assert(ieee754sp_issnan(r));
48
49 if (!ieee754sp_issnan(r)) /* QNAN does not cause invalid op !! */
50 return r;
51
52 if (!ieee754_setandtestcx(IEEE754_INVALID_OPERATION)) {
53 /* not enabled convert to a quiet NaN */
54 SPMANT(r) &= (~SP_MBIT(SP_FBITS-1));
55 if (ieee754sp_isnan(r))
56 return r;
57 else
58 return ieee754sp_indef();
59 }
60 52
61 return r; 53 ieee754_setcx(IEEE754_INVALID_OPERATION);
54 return ieee754sp_indef();
62} 55}
63 56
64static unsigned ieee754sp_get_rounding(int sn, unsigned xm) 57static unsigned ieee754sp_get_rounding(int sn, unsigned xm)
diff --git a/arch/mips/math-emu/ieee754sp.h b/arch/mips/math-emu/ieee754sp.h
index ad268e332318..374a3f00a589 100644
--- a/arch/mips/math-emu/ieee754sp.h
+++ b/arch/mips/math-emu/ieee754sp.h
@@ -82,6 +82,5 @@ static inline union ieee754sp buildsp(int s, int bx, unsigned m)
82 return r; 82 return r;
83} 83}
84 84
85extern int ieee754sp_isnan(union ieee754sp);
86extern union ieee754sp __cold ieee754sp_nanxcpt(union ieee754sp); 85extern union ieee754sp __cold ieee754sp_nanxcpt(union ieee754sp);
87extern union ieee754sp ieee754sp_format(int, int, unsigned); 86extern union ieee754sp ieee754sp_format(int, int, unsigned);
diff --git a/arch/mips/math-emu/me-debugfs.c b/arch/mips/math-emu/me-debugfs.c
index becdd63e14a9..f308e0f05fc5 100644
--- a/arch/mips/math-emu/me-debugfs.c
+++ b/arch/mips/math-emu/me-debugfs.c
@@ -61,6 +61,7 @@ do { \
61 FPU_STAT_CREATE(ieee754_overflow); 61 FPU_STAT_CREATE(ieee754_overflow);
62 FPU_STAT_CREATE(ieee754_zerodiv); 62 FPU_STAT_CREATE(ieee754_zerodiv);
63 FPU_STAT_CREATE(ieee754_invalidop); 63 FPU_STAT_CREATE(ieee754_invalidop);
64 FPU_STAT_CREATE(ds_emul);
64 65
65 return 0; 66 return 0;
66} 67}
diff --git a/arch/mips/math-emu/sp_add.c b/arch/mips/math-emu/sp_add.c
index 2d84d460cb67..f1c87b07d3b4 100644
--- a/arch/mips/math-emu/sp_add.c
+++ b/arch/mips/math-emu/sp_add.c
@@ -37,19 +37,20 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
37 FLUSHYSP; 37 FLUSHYSP;
38 38
39 switch (CLPAIR(xc, yc)) { 39 switch (CLPAIR(xc, yc)) {
40 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
41 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN): 40 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
42 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
43 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN): 41 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
44 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN): 42 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
45 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN): 43 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
46 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN): 44 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
45 return ieee754sp_nanxcpt(y);
46
47 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
48 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
47 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO): 49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
48 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM): 50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM): 51 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): 52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
51 ieee754_setcx(IEEE754_INVALID_OPERATION); 53 return ieee754sp_nanxcpt(x);
52 return ieee754sp_nanxcpt(ieee754sp_indef());
53 54
54 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): 55 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
55 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): 56 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
@@ -148,8 +149,6 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
148 * leaving result in xm, xs and xe. 149 * leaving result in xm, xs and xe.
149 */ 150 */
150 xm = xm + ym; 151 xm = xm + ym;
151 xe = xe;
152 xs = xs;
153 152
154 if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */ 153 if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */
155 SPXSRSX1(); 154 SPXSRSX1();
@@ -157,11 +156,8 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
157 } else { 156 } else {
158 if (xm >= ym) { 157 if (xm >= ym) {
159 xm = xm - ym; 158 xm = xm - ym;
160 xe = xe;
161 xs = xs;
162 } else { 159 } else {
163 xm = ym - xm; 160 xm = ym - xm;
164 xe = xe;
165 xs = ys; 161 xs = ys;
166 } 162 }
167 if (xm == 0) 163 if (xm == 0)
diff --git a/arch/mips/math-emu/sp_cmp.c b/arch/mips/math-emu/sp_cmp.c
index addbccb2f556..67b82f1e2c4a 100644
--- a/arch/mips/math-emu/sp_cmp.c
+++ b/arch/mips/math-emu/sp_cmp.c
@@ -35,16 +35,11 @@ int ieee754sp_cmp(union ieee754sp x, union ieee754sp y, int cmp, int sig)
35 FLUSHYSP; 35 FLUSHYSP;
36 ieee754_clearcx(); /* Even clear inexact flag here */ 36 ieee754_clearcx(); /* Even clear inexact flag here */
37 37
38 if (ieee754sp_isnan(x) || ieee754sp_isnan(y)) { 38 if (ieee754_class_nan(xc) || ieee754_class_nan(yc)) {
39 if (sig || xc == IEEE754_CLASS_SNAN || yc == IEEE754_CLASS_SNAN) 39 if (sig ||
40 xc == IEEE754_CLASS_SNAN || yc == IEEE754_CLASS_SNAN)
40 ieee754_setcx(IEEE754_INVALID_OPERATION); 41 ieee754_setcx(IEEE754_INVALID_OPERATION);
41 if (cmp & IEEE754_CUN) 42 return (cmp & IEEE754_CUN) != 0;
42 return 1;
43 if (cmp & (IEEE754_CLT | IEEE754_CGT)) {
44 if (sig && ieee754_setandtestcx(IEEE754_INVALID_OPERATION))
45 return 0;
46 }
47 return 0;
48 } else { 43 } else {
49 vx = x.bits; 44 vx = x.bits;
50 vy = y.bits; 45 vy = y.bits;
diff --git a/arch/mips/math-emu/sp_div.c b/arch/mips/math-emu/sp_div.c
index 721f317aa877..27f6db3a0a4c 100644
--- a/arch/mips/math-emu/sp_div.c
+++ b/arch/mips/math-emu/sp_div.c
@@ -39,19 +39,20 @@ union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y)
39 FLUSHYSP; 39 FLUSHYSP;
40 40
41 switch (CLPAIR(xc, yc)) { 41 switch (CLPAIR(xc, yc)) {
42 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
43 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN): 42 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
44 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
45 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN): 43 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
46 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN): 44 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
47 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN): 45 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
48 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN): 46 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
47 return ieee754sp_nanxcpt(y);
48
49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO): 51 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM): 52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
51 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM): 53 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): 54 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
53 ieee754_setcx(IEEE754_INVALID_OPERATION); 55 return ieee754sp_nanxcpt(x);
54 return ieee754sp_nanxcpt(ieee754sp_indef());
55 56
56 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): 57 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
57 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): 58 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
diff --git a/arch/mips/math-emu/sp_fdp.c b/arch/mips/math-emu/sp_fdp.c
index 1b266fb16973..3797148893ad 100644
--- a/arch/mips/math-emu/sp_fdp.c
+++ b/arch/mips/math-emu/sp_fdp.c
@@ -22,12 +22,19 @@
22#include "ieee754sp.h" 22#include "ieee754sp.h"
23#include "ieee754dp.h" 23#include "ieee754dp.h"
24 24
25static inline union ieee754sp ieee754sp_nan_fdp(int xs, u64 xm)
26{
27 return buildsp(xs, SP_EMAX + 1 + SP_EBIAS,
28 xm >> (DP_FBITS - SP_FBITS));
29}
30
25union ieee754sp ieee754sp_fdp(union ieee754dp x) 31union ieee754sp ieee754sp_fdp(union ieee754dp x)
26{ 32{
33 union ieee754sp y;
27 u32 rm; 34 u32 rm;
28 35
29 COMPXDP; 36 COMPXDP;
30 union ieee754sp nan; 37 COMPYSP;
31 38
32 EXPLODEXDP; 39 EXPLODEXDP;
33 40
@@ -37,15 +44,14 @@ union ieee754sp ieee754sp_fdp(union ieee754dp x)
37 44
38 switch (xc) { 45 switch (xc) {
39 case IEEE754_CLASS_SNAN: 46 case IEEE754_CLASS_SNAN:
40 ieee754_setcx(IEEE754_INVALID_OPERATION); 47 return ieee754sp_nanxcpt(ieee754sp_nan_fdp(xs, xm));
41 return ieee754sp_nanxcpt(ieee754sp_indef());
42 48
43 case IEEE754_CLASS_QNAN: 49 case IEEE754_CLASS_QNAN:
44 nan = buildsp(xs, SP_EMAX + 1 + SP_EBIAS, (u32) 50 y = ieee754sp_nan_fdp(xs, xm);
45 (xm >> (DP_FBITS - SP_FBITS))); 51 EXPLODEYSP;
46 if (!ieee754sp_isnan(nan)) 52 if (!ieee754_class_nan(yc))
47 nan = ieee754sp_indef(); 53 y = ieee754sp_indef();
48 return ieee754sp_nanxcpt(nan); 54 return y;
49 55
50 case IEEE754_CLASS_INF: 56 case IEEE754_CLASS_INF:
51 return ieee754sp_inf(xs); 57 return ieee754sp_inf(xs);
diff --git a/arch/mips/math-emu/sp_mul.c b/arch/mips/math-emu/sp_mul.c
index 890c13a2965e..d910c43a6f30 100644
--- a/arch/mips/math-emu/sp_mul.c
+++ b/arch/mips/math-emu/sp_mul.c
@@ -47,19 +47,20 @@ union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y)
47 FLUSHYSP; 47 FLUSHYSP;
48 48
49 switch (CLPAIR(xc, yc)) { 49 switch (CLPAIR(xc, yc)) {
50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
51 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN): 50 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
53 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN): 51 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
54 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN): 52 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
55 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN): 53 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
56 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN): 54 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
55 return ieee754sp_nanxcpt(y);
56
57 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
58 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
57 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO): 59 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
58 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM): 60 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
59 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM): 61 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
60 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): 62 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
61 ieee754_setcx(IEEE754_INVALID_OPERATION); 63 return ieee754sp_nanxcpt(x);
62 return ieee754sp_nanxcpt(ieee754sp_indef());
63 64
64 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): 65 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
65 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): 66 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
diff --git a/arch/mips/math-emu/sp_simple.c b/arch/mips/math-emu/sp_simple.c
index f1ffaa9a17e0..c50e9451f2d2 100644
--- a/arch/mips/math-emu/sp_simple.c
+++ b/arch/mips/math-emu/sp_simple.c
@@ -23,44 +23,27 @@
23 23
24union ieee754sp ieee754sp_neg(union ieee754sp x) 24union ieee754sp ieee754sp_neg(union ieee754sp x)
25{ 25{
26 COMPXSP; 26 unsigned int oldrm;
27 27 union ieee754sp y;
28 EXPLODEXSP; 28
29 ieee754_clearcx(); 29 oldrm = ieee754_csr.rm;
30 FLUSHXSP; 30 ieee754_csr.rm = FPU_CSR_RD;
31 31 y = ieee754sp_sub(ieee754sp_zero(0), x);
32 /* 32 ieee754_csr.rm = oldrm;
33 * Invert the sign ALWAYS to prevent an endless recursion on 33 return y;
34 * pow() in libc.
35 */
36 /* quick fix up */
37 SPSIGN(x) ^= 1;
38
39 if (xc == IEEE754_CLASS_SNAN) {
40 union ieee754sp y = ieee754sp_indef();
41 ieee754_setcx(IEEE754_INVALID_OPERATION);
42 SPSIGN(y) = SPSIGN(x);
43 return ieee754sp_nanxcpt(y);
44 }
45
46 return x;
47} 34}
48 35
49union ieee754sp ieee754sp_abs(union ieee754sp x) 36union ieee754sp ieee754sp_abs(union ieee754sp x)
50{ 37{
51 COMPXSP; 38 unsigned int oldrm;
52 39 union ieee754sp y;
53 EXPLODEXSP; 40
54 ieee754_clearcx(); 41 oldrm = ieee754_csr.rm;
55 FLUSHXSP; 42 ieee754_csr.rm = FPU_CSR_RD;
56 43 if (SPSIGN(x))
57 /* Clear sign ALWAYS, irrespective of NaN */ 44 y = ieee754sp_sub(ieee754sp_zero(0), x);
58 SPSIGN(x) = 0; 45 else
59 46 y = ieee754sp_add(ieee754sp_zero(0), x);
60 if (xc == IEEE754_CLASS_SNAN) { 47 ieee754_csr.rm = oldrm;
61 ieee754_setcx(IEEE754_INVALID_OPERATION); 48 return y;
62 return ieee754sp_nanxcpt(ieee754sp_indef());
63 }
64
65 return x;
66} 49}
diff --git a/arch/mips/math-emu/sp_sqrt.c b/arch/mips/math-emu/sp_sqrt.c
index b7c098a86f95..67059c33a250 100644
--- a/arch/mips/math-emu/sp_sqrt.c
+++ b/arch/mips/math-emu/sp_sqrt.c
@@ -35,13 +35,12 @@ union ieee754sp ieee754sp_sqrt(union ieee754sp x)
35 35
36 /* x == INF or NAN? */ 36 /* x == INF or NAN? */
37 switch (xc) { 37 switch (xc) {
38 case IEEE754_CLASS_QNAN: 38 case IEEE754_CLASS_SNAN:
39 /* sqrt(Nan) = Nan */
40 return ieee754sp_nanxcpt(x); 39 return ieee754sp_nanxcpt(x);
41 40
42 case IEEE754_CLASS_SNAN: 41 case IEEE754_CLASS_QNAN:
43 ieee754_setcx(IEEE754_INVALID_OPERATION); 42 /* sqrt(Nan) = Nan */
44 return ieee754sp_nanxcpt(ieee754sp_indef()); 43 return x;
45 44
46 case IEEE754_CLASS_ZERO: 45 case IEEE754_CLASS_ZERO:
47 /* sqrt(0) = 0 */ 46 /* sqrt(0) = 0 */
@@ -51,7 +50,7 @@ union ieee754sp ieee754sp_sqrt(union ieee754sp x)
51 if (xs) { 50 if (xs) {
52 /* sqrt(-Inf) = Nan */ 51 /* sqrt(-Inf) = Nan */
53 ieee754_setcx(IEEE754_INVALID_OPERATION); 52 ieee754_setcx(IEEE754_INVALID_OPERATION);
54 return ieee754sp_nanxcpt(ieee754sp_indef()); 53 return ieee754sp_indef();
55 } 54 }
56 /* sqrt(+Inf) = Inf */ 55 /* sqrt(+Inf) = Inf */
57 return x; 56 return x;
@@ -61,7 +60,7 @@ union ieee754sp ieee754sp_sqrt(union ieee754sp x)
61 if (xs) { 60 if (xs) {
62 /* sqrt(-x) = Nan */ 61 /* sqrt(-x) = Nan */
63 ieee754_setcx(IEEE754_INVALID_OPERATION); 62 ieee754_setcx(IEEE754_INVALID_OPERATION);
64 return ieee754sp_nanxcpt(ieee754sp_indef()); 63 return ieee754sp_indef();
65 } 64 }
66 break; 65 break;
67 } 66 }
diff --git a/arch/mips/math-emu/sp_sub.c b/arch/mips/math-emu/sp_sub.c
index 8592e49032b8..ec5f937a8b3e 100644
--- a/arch/mips/math-emu/sp_sub.c
+++ b/arch/mips/math-emu/sp_sub.c
@@ -37,19 +37,20 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
37 FLUSHYSP; 37 FLUSHYSP;
38 38
39 switch (CLPAIR(xc, yc)) { 39 switch (CLPAIR(xc, yc)) {
40 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
41 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN): 40 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
42 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
43 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN): 41 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
44 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN): 42 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
45 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN): 43 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
46 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN): 44 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
45 return ieee754sp_nanxcpt(y);
46
47 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
48 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
47 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO): 49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
48 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM): 50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM): 51 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): 52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
51 ieee754_setcx(IEEE754_INVALID_OPERATION); 53 return ieee754sp_nanxcpt(x);
52 return ieee754sp_nanxcpt(ieee754sp_indef());
53 54
54 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): 55 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
55 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): 56 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
@@ -148,8 +149,6 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
148 /* generate 28 bit result of adding two 27 bit numbers 149 /* generate 28 bit result of adding two 27 bit numbers
149 */ 150 */
150 xm = xm + ym; 151 xm = xm + ym;
151 xe = xe;
152 xs = xs;
153 152
154 if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */ 153 if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */
155 SPXSRSX1(); /* shift preserving sticky */ 154 SPXSRSX1(); /* shift preserving sticky */
@@ -157,11 +156,8 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
157 } else { 156 } else {
158 if (xm >= ym) { 157 if (xm >= ym) {
159 xm = xm - ym; 158 xm = xm - ym;
160 xe = xe;
161 xs = xs;
162 } else { 159 } else {
163 xm = ym - xm; 160 xm = ym - xm;
164 xe = xe;
165 xs = ys; 161 xs = ys;
166 } 162 }
167 if (xm == 0) { 163 if (xm == 0) {
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 3f8059602765..0dbb65a51ce5 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -430,6 +430,7 @@ static inline void local_r4k___flush_cache_all(void * args)
430 case CPU_R10000: 430 case CPU_R10000:
431 case CPU_R12000: 431 case CPU_R12000:
432 case CPU_R14000: 432 case CPU_R14000:
433 case CPU_R16000:
433 /* 434 /*
434 * These caches are inclusive caches, that is, if something 435 * These caches are inclusive caches, that is, if something
435 * is not cached in the S-cache, we know it also won't be 436 * is not cached in the S-cache, we know it also won't be
@@ -506,7 +507,7 @@ static inline void local_r4k_flush_cache_mm(void * args)
506 507
507 /* 508 /*
508 * Kludge alert. For obscure reasons R4000SC and R4400SC go nuts if we 509 * Kludge alert. For obscure reasons R4000SC and R4400SC go nuts if we
509 * only flush the primary caches but R10000 and R12000 behave sane ... 510 * only flush the primary caches but R1x000 behave sane ...
510 * R4000SC and R4400SC indexed S-cache ops also invalidate primary 511 * R4000SC and R4400SC indexed S-cache ops also invalidate primary
511 * caches, so we can bail out early. 512 * caches, so we can bail out early.
512 */ 513 */
@@ -888,33 +889,39 @@ static inline void rm7k_erratum31(void)
888 } 889 }
889} 890}
890 891
891static inline void alias_74k_erratum(struct cpuinfo_mips *c) 892static inline int alias_74k_erratum(struct cpuinfo_mips *c)
892{ 893{
893 unsigned int imp = c->processor_id & PRID_IMP_MASK; 894 unsigned int imp = c->processor_id & PRID_IMP_MASK;
894 unsigned int rev = c->processor_id & PRID_REV_MASK; 895 unsigned int rev = c->processor_id & PRID_REV_MASK;
896 int present = 0;
895 897
896 /* 898 /*
897 * Early versions of the 74K do not update the cache tags on a 899 * Early versions of the 74K do not update the cache tags on a
898 * vtag miss/ptag hit which can occur in the case of KSEG0/KUSEG 900 * vtag miss/ptag hit which can occur in the case of KSEG0/KUSEG
899 * aliases. In this case it is better to treat the cache as always 901 * aliases. In this case it is better to treat the cache as always
900 * having aliases. 902 * having aliases. Also disable the synonym tag update feature
903 * where available. In this case no opportunistic tag update will
904 * happen where a load causes a virtual address miss but a physical
905 * address hit during a D-cache look-up.
901 */ 906 */
902 switch (imp) { 907 switch (imp) {
903 case PRID_IMP_74K: 908 case PRID_IMP_74K:
904 if (rev <= PRID_REV_ENCODE_332(2, 4, 0)) 909 if (rev <= PRID_REV_ENCODE_332(2, 4, 0))
905 c->dcache.flags |= MIPS_CACHE_VTAG; 910 present = 1;
906 if (rev == PRID_REV_ENCODE_332(2, 4, 0)) 911 if (rev == PRID_REV_ENCODE_332(2, 4, 0))
907 write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND); 912 write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
908 break; 913 break;
909 case PRID_IMP_1074K: 914 case PRID_IMP_1074K:
910 if (rev <= PRID_REV_ENCODE_332(1, 1, 0)) { 915 if (rev <= PRID_REV_ENCODE_332(1, 1, 0)) {
911 c->dcache.flags |= MIPS_CACHE_VTAG; 916 present = 1;
912 write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND); 917 write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
913 } 918 }
914 break; 919 break;
915 default: 920 default:
916 BUG(); 921 BUG();
917 } 922 }
923
924 return present;
918} 925}
919 926
920static void b5k_instruction_hazard(void) 927static void b5k_instruction_hazard(void)
@@ -938,6 +945,7 @@ static void probe_pcache(void)
938 struct cpuinfo_mips *c = &current_cpu_data; 945 struct cpuinfo_mips *c = &current_cpu_data;
939 unsigned int config = read_c0_config(); 946 unsigned int config = read_c0_config();
940 unsigned int prid = read_c0_prid(); 947 unsigned int prid = read_c0_prid();
948 int has_74k_erratum = 0;
941 unsigned long config1; 949 unsigned long config1;
942 unsigned int lsize; 950 unsigned int lsize;
943 951
@@ -1012,6 +1020,7 @@ static void probe_pcache(void)
1012 case CPU_R10000: 1020 case CPU_R10000:
1013 case CPU_R12000: 1021 case CPU_R12000:
1014 case CPU_R14000: 1022 case CPU_R14000:
1023 case CPU_R16000:
1015 icache_size = 1 << (12 + ((config & R10K_CONF_IC) >> 29)); 1024 icache_size = 1 << (12 + ((config & R10K_CONF_IC) >> 29));
1016 c->icache.linesz = 64; 1025 c->icache.linesz = 64;
1017 c->icache.ways = 2; 1026 c->icache.ways = 2;
@@ -1223,8 +1232,8 @@ static void probe_pcache(void)
1223 dcache_size / (c->dcache.linesz * c->dcache.ways) : 0; 1232 dcache_size / (c->dcache.linesz * c->dcache.ways) : 0;
1224 1233
1225 /* 1234 /*
1226 * R10000 and R12000 P-caches are odd in a positive way. They're 32kB 1235 * R1x000 P-caches are odd in a positive way. They're 32kB 2-way
1227 * 2-way virtually indexed so normally would suffer from aliases. So 1236 * virtually indexed so normally would suffer from aliases. So
1228 * normally they'd suffer from aliases but magic in the hardware deals 1237 * normally they'd suffer from aliases but magic in the hardware deals
1229 * with that for us so we don't need to take care ourselves. 1238 * with that for us so we don't need to take care ourselves.
1230 */ 1239 */
@@ -1240,11 +1249,12 @@ static void probe_pcache(void)
1240 case CPU_R10000: 1249 case CPU_R10000:
1241 case CPU_R12000: 1250 case CPU_R12000:
1242 case CPU_R14000: 1251 case CPU_R14000:
1252 case CPU_R16000:
1243 break; 1253 break;
1244 1254
1245 case CPU_74K: 1255 case CPU_74K:
1246 case CPU_1074K: 1256 case CPU_1074K:
1247 alias_74k_erratum(c); 1257 has_74k_erratum = alias_74k_erratum(c);
1248 /* Fall through. */ 1258 /* Fall through. */
1249 case CPU_M14KC: 1259 case CPU_M14KC:
1250 case CPU_M14KEC: 1260 case CPU_M14KEC:
@@ -1259,7 +1269,7 @@ static void probe_pcache(void)
1259 if (!(read_c0_config7() & MIPS_CONF7_IAR) && 1269 if (!(read_c0_config7() & MIPS_CONF7_IAR) &&
1260 (c->icache.waysize > PAGE_SIZE)) 1270 (c->icache.waysize > PAGE_SIZE))
1261 c->icache.flags |= MIPS_CACHE_ALIASES; 1271 c->icache.flags |= MIPS_CACHE_ALIASES;
1262 if (read_c0_config7() & MIPS_CONF7_AR) { 1272 if (!has_74k_erratum && (read_c0_config7() & MIPS_CONF7_AR)) {
1263 /* 1273 /*
1264 * Effectively physically indexed dcache, 1274 * Effectively physically indexed dcache,
1265 * thus no virtual aliases. 1275 * thus no virtual aliases.
@@ -1268,7 +1278,7 @@ static void probe_pcache(void)
1268 break; 1278 break;
1269 } 1279 }
1270 default: 1280 default:
1271 if (c->dcache.waysize > PAGE_SIZE) 1281 if (has_74k_erratum || c->dcache.waysize > PAGE_SIZE)
1272 c->dcache.flags |= MIPS_CACHE_ALIASES; 1282 c->dcache.flags |= MIPS_CACHE_ALIASES;
1273 } 1283 }
1274 1284
@@ -1438,6 +1448,7 @@ static void setup_scache(void)
1438 case CPU_R10000: 1448 case CPU_R10000:
1439 case CPU_R12000: 1449 case CPU_R12000:
1440 case CPU_R14000: 1450 case CPU_R14000:
1451 case CPU_R16000:
1441 scache_size = 0x80000 << ((config & R10K_CONF_SS) >> 16); 1452 scache_size = 0x80000 << ((config & R10K_CONF_SS) >> 16);
1442 c->scache.linesz = 64 << ((config >> 13) & 1); 1453 c->scache.linesz = 64 << ((config >> 13) & 1);
1443 c->scache.ways = 2; 1454 c->scache.ways = 2;
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 7e3ea7766822..77d96db8253c 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -119,36 +119,37 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr)
119 119
120EXPORT_SYMBOL(__flush_anon_page); 120EXPORT_SYMBOL(__flush_anon_page);
121 121
122static void mips_flush_dcache_from_pte(pte_t pteval, unsigned long address) 122void __flush_icache_page(struct vm_area_struct *vma, struct page *page)
123{
124 unsigned long addr;
125
126 if (PageHighMem(page))
127 return;
128
129 addr = (unsigned long) page_address(page);
130 flush_data_cache_page(addr);
131}
132EXPORT_SYMBOL_GPL(__flush_icache_page);
133
134void __update_cache(struct vm_area_struct *vma, unsigned long address,
135 pte_t pte)
123{ 136{
124 struct page *page; 137 struct page *page;
125 unsigned long pfn = pte_pfn(pteval); 138 unsigned long pfn, addr;
139 int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc;
126 140
141 pfn = pte_pfn(pte);
127 if (unlikely(!pfn_valid(pfn))) 142 if (unlikely(!pfn_valid(pfn)))
128 return; 143 return;
129
130 page = pfn_to_page(pfn); 144 page = pfn_to_page(pfn);
131 if (page_mapping(page) && Page_dcache_dirty(page)) { 145 if (page_mapping(page) && Page_dcache_dirty(page)) {
132 unsigned long page_addr = (unsigned long) page_address(page); 146 addr = (unsigned long) page_address(page);
133 147 if (exec || pages_do_alias(addr, address & PAGE_MASK))
134 if (!cpu_has_ic_fills_f_dc || 148 flush_data_cache_page(addr);
135 pages_do_alias(page_addr, address & PAGE_MASK))
136 flush_data_cache_page(page_addr);
137 ClearPageDcacheDirty(page); 149 ClearPageDcacheDirty(page);
138 } 150 }
139} 151}
140 152
141void set_pte_at(struct mm_struct *mm, unsigned long addr,
142 pte_t *ptep, pte_t pteval)
143{
144 if (cpu_has_dc_aliases || !cpu_has_ic_fills_f_dc) {
145 if (pte_present(pteval))
146 mips_flush_dcache_from_pte(pteval, addr);
147 }
148
149 set_pte(ptep, pteval);
150}
151
152unsigned long _page_cachable_default; 153unsigned long _page_cachable_default;
153EXPORT_SYMBOL(_page_cachable_default); 154EXPORT_SYMBOL(_page_cachable_default);
154 155
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index af5f046e627e..609d1241b0c4 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -258,7 +258,7 @@ static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
258 if (cpu_needs_post_dma_flush(dev)) 258 if (cpu_needs_post_dma_flush(dev))
259 __dma_sync(dma_addr_to_page(dev, dma_addr), 259 __dma_sync(dma_addr_to_page(dev, dma_addr),
260 dma_addr & ~PAGE_MASK, size, direction); 260 dma_addr & ~PAGE_MASK, size, direction);
261 261 plat_post_dma_flush(dev);
262 plat_unmap_dma_mem(dev, dma_addr, size, direction); 262 plat_unmap_dma_mem(dev, dma_addr, size, direction);
263} 263}
264 264
@@ -312,6 +312,7 @@ static void mips_dma_sync_single_for_cpu(struct device *dev,
312 if (cpu_needs_post_dma_flush(dev)) 312 if (cpu_needs_post_dma_flush(dev))
313 __dma_sync(dma_addr_to_page(dev, dma_handle), 313 __dma_sync(dma_addr_to_page(dev, dma_handle),
314 dma_handle & ~PAGE_MASK, size, direction); 314 dma_handle & ~PAGE_MASK, size, direction);
315 plat_post_dma_flush(dev);
315} 316}
316 317
317static void mips_dma_sync_single_for_device(struct device *dev, 318static void mips_dma_sync_single_for_device(struct device *dev,
@@ -331,6 +332,7 @@ static void mips_dma_sync_sg_for_cpu(struct device *dev,
331 for (i = 0; i < nelems; i++, sg++) 332 for (i = 0; i < nelems; i++, sg++)
332 __dma_sync(sg_page(sg), sg->offset, sg->length, 333 __dma_sync(sg_page(sg), sg->offset, sg->length,
333 direction); 334 direction);
335 plat_post_dma_flush(dev);
334} 336}
335 337
336static void mips_dma_sync_sg_for_device(struct device *dev, 338static void mips_dma_sync_sg_for_device(struct device *dev,
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 448cde372af0..faa5c9822ecc 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -96,7 +96,7 @@ static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot)
96 vaddr = __fix_to_virt(FIX_CMAP_END - idx); 96 vaddr = __fix_to_virt(FIX_CMAP_END - idx);
97 pte = mk_pte(page, prot); 97 pte = mk_pte(page, prot);
98#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 98#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
99 entrylo = pte.pte_high; 99 entrylo = pte_to_entrylo(pte.pte_high);
100#else 100#else
101 entrylo = pte_to_entrylo(pte_val(pte)); 101 entrylo = pte_to_entrylo(pte_val(pte));
102#endif 102#endif
@@ -106,6 +106,11 @@ static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot)
106 write_c0_entryhi(vaddr & (PAGE_MASK << 1)); 106 write_c0_entryhi(vaddr & (PAGE_MASK << 1));
107 write_c0_entrylo0(entrylo); 107 write_c0_entrylo0(entrylo);
108 write_c0_entrylo1(entrylo); 108 write_c0_entrylo1(entrylo);
109#ifdef CONFIG_XPA
110 entrylo = (pte.pte_low & _PFNX_MASK);
111 writex_c0_entrylo0(entrylo);
112 writex_c0_entrylo1(entrylo);
113#endif
109 tlbidx = read_c0_wired(); 114 tlbidx = read_c0_wired();
110 write_c0_wired(tlbidx + 1); 115 write_c0_wired(tlbidx + 1);
111 write_c0_index(tlbidx); 116 write_c0_index(tlbidx);
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index 3f85f921801b..885d73ffd6fb 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -157,6 +157,7 @@ static void set_prefetch_parameters(void)
157 case CPU_R10000: 157 case CPU_R10000:
158 case CPU_R12000: 158 case CPU_R12000:
159 case CPU_R14000: 159 case CPU_R14000:
160 case CPU_R16000:
160 /* 161 /*
161 * Those values have been experimentally tuned for an 162 * Those values have been experimentally tuned for an
162 * Origin 200. 163 * Origin 200.
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index b2afa49beab0..a27a088e6f9f 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -333,9 +333,17 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
333 ptep = pte_offset_map(pmdp, address); 333 ptep = pte_offset_map(pmdp, address);
334 334
335#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 335#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
336#ifdef CONFIG_XPA
337 write_c0_entrylo0(pte_to_entrylo(ptep->pte_high));
338 writex_c0_entrylo0(ptep->pte_low & _PFNX_MASK);
339 ptep++;
340 write_c0_entrylo1(pte_to_entrylo(ptep->pte_high));
341 writex_c0_entrylo1(ptep->pte_low & _PFNX_MASK);
342#else
336 write_c0_entrylo0(ptep->pte_high); 343 write_c0_entrylo0(ptep->pte_high);
337 ptep++; 344 ptep++;
338 write_c0_entrylo1(ptep->pte_high); 345 write_c0_entrylo1(ptep->pte_high);
346#endif
339#else 347#else
340 write_c0_entrylo0(pte_to_entrylo(pte_val(*ptep++))); 348 write_c0_entrylo0(pte_to_entrylo(pte_val(*ptep++)));
341 write_c0_entrylo1(pte_to_entrylo(pte_val(*ptep))); 349 write_c0_entrylo1(pte_to_entrylo(pte_val(*ptep)));
@@ -355,6 +363,9 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
355void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, 363void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
356 unsigned long entryhi, unsigned long pagemask) 364 unsigned long entryhi, unsigned long pagemask)
357{ 365{
366#ifdef CONFIG_XPA
367 panic("Broken for XPA kernels");
368#else
358 unsigned long flags; 369 unsigned long flags;
359 unsigned long wired; 370 unsigned long wired;
360 unsigned long old_pagemask; 371 unsigned long old_pagemask;
@@ -383,6 +394,7 @@ void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
383 write_c0_pagemask(old_pagemask); 394 write_c0_pagemask(old_pagemask);
384 local_flush_tlb_all(); 395 local_flush_tlb_all();
385 local_irq_restore(flags); 396 local_irq_restore(flags);
397#endif
386} 398}
387 399
388#ifdef CONFIG_TRANSPARENT_HUGEPAGE 400#ifdef CONFIG_TRANSPARENT_HUGEPAGE
@@ -477,7 +489,8 @@ static void r4k_tlb_configure(void)
477 write_c0_wired(0); 489 write_c0_wired(0);
478 if (current_cpu_type() == CPU_R10000 || 490 if (current_cpu_type() == CPU_R10000 ||
479 current_cpu_type() == CPU_R12000 || 491 current_cpu_type() == CPU_R12000 ||
480 current_cpu_type() == CPU_R14000) 492 current_cpu_type() == CPU_R14000 ||
493 current_cpu_type() == CPU_R16000)
481 write_c0_framemask(0); 494 write_c0_framemask(0);
482 495
483 if (cpu_has_rixi) { 496 if (cpu_has_rixi) {
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index d75ff73a2012..97c87027c17f 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -35,6 +35,17 @@
35#include <asm/uasm.h> 35#include <asm/uasm.h>
36#include <asm/setup.h> 36#include <asm/setup.h>
37 37
38static int __cpuinitdata mips_xpa_disabled;
39
40static int __init xpa_disable(char *s)
41{
42 mips_xpa_disabled = 1;
43
44 return 1;
45}
46
47__setup("noxpa", xpa_disable);
48
38/* 49/*
39 * TLB load/store/modify handlers. 50 * TLB load/store/modify handlers.
40 * 51 *
@@ -231,14 +242,14 @@ static void output_pgtable_bits_defines(void)
231 pr_define("_PAGE_HUGE_SHIFT %d\n", _PAGE_HUGE_SHIFT); 242 pr_define("_PAGE_HUGE_SHIFT %d\n", _PAGE_HUGE_SHIFT);
232 pr_define("_PAGE_SPLITTING_SHIFT %d\n", _PAGE_SPLITTING_SHIFT); 243 pr_define("_PAGE_SPLITTING_SHIFT %d\n", _PAGE_SPLITTING_SHIFT);
233#endif 244#endif
245#ifdef CONFIG_CPU_MIPSR2
234 if (cpu_has_rixi) { 246 if (cpu_has_rixi) {
235#ifdef _PAGE_NO_EXEC_SHIFT 247#ifdef _PAGE_NO_EXEC_SHIFT
236 pr_define("_PAGE_NO_EXEC_SHIFT %d\n", _PAGE_NO_EXEC_SHIFT); 248 pr_define("_PAGE_NO_EXEC_SHIFT %d\n", _PAGE_NO_EXEC_SHIFT);
237#endif
238#ifdef _PAGE_NO_READ_SHIFT
239 pr_define("_PAGE_NO_READ_SHIFT %d\n", _PAGE_NO_READ_SHIFT); 249 pr_define("_PAGE_NO_READ_SHIFT %d\n", _PAGE_NO_READ_SHIFT);
240#endif 250#endif
241 } 251 }
252#endif
242 pr_define("_PAGE_GLOBAL_SHIFT %d\n", _PAGE_GLOBAL_SHIFT); 253 pr_define("_PAGE_GLOBAL_SHIFT %d\n", _PAGE_GLOBAL_SHIFT);
243 pr_define("_PAGE_VALID_SHIFT %d\n", _PAGE_VALID_SHIFT); 254 pr_define("_PAGE_VALID_SHIFT %d\n", _PAGE_VALID_SHIFT);
244 pr_define("_PAGE_DIRTY_SHIFT %d\n", _PAGE_DIRTY_SHIFT); 255 pr_define("_PAGE_DIRTY_SHIFT %d\n", _PAGE_DIRTY_SHIFT);
@@ -501,26 +512,9 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
501 case tlb_indexed: tlbw = uasm_i_tlbwi; break; 512 case tlb_indexed: tlbw = uasm_i_tlbwi; break;
502 } 513 }
503 514
504 if (cpu_has_mips_r2_exec_hazard) { 515 if (cpu_has_mips_r2_r6) {
505 /* 516 if (cpu_has_mips_r2_exec_hazard)
506 * The architecture spec says an ehb is required here,
507 * but a number of cores do not have the hazard and
508 * using an ehb causes an expensive pipeline stall.
509 */
510 switch (current_cpu_type()) {
511 case CPU_M14KC:
512 case CPU_74K:
513 case CPU_1074K:
514 case CPU_PROAPTIV:
515 case CPU_P5600:
516 case CPU_M5150:
517 case CPU_QEMU_GENERIC:
518 break;
519
520 default:
521 uasm_i_ehb(p); 517 uasm_i_ehb(p);
522 break;
523 }
524 tlbw(p); 518 tlbw(p);
525 return; 519 return;
526 } 520 }
@@ -569,6 +563,7 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
569 case CPU_R10000: 563 case CPU_R10000:
570 case CPU_R12000: 564 case CPU_R12000:
571 case CPU_R14000: 565 case CPU_R14000:
566 case CPU_R16000:
572 case CPU_4KC: 567 case CPU_4KC:
573 case CPU_4KEC: 568 case CPU_4KEC:
574 case CPU_M14KC: 569 case CPU_M14KC:
@@ -1027,12 +1022,27 @@ static void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep)
1027 } else { 1022 } else {
1028 int pte_off_even = sizeof(pte_t) / 2; 1023 int pte_off_even = sizeof(pte_t) / 2;
1029 int pte_off_odd = pte_off_even + sizeof(pte_t); 1024 int pte_off_odd = pte_off_even + sizeof(pte_t);
1025#ifdef CONFIG_XPA
1026 const int scratch = 1; /* Our extra working register */
1030 1027
1031 /* The pte entries are pre-shifted */ 1028 uasm_i_addu(p, scratch, 0, ptep);
1032 uasm_i_lw(p, tmp, pte_off_even, ptep); /* get even pte */ 1029#endif
1033 UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */ 1030 uasm_i_lw(p, tmp, pte_off_even, ptep); /* even pte */
1034 uasm_i_lw(p, ptep, pte_off_odd, ptep); /* get odd pte */ 1031 uasm_i_lw(p, ptep, pte_off_odd, ptep); /* odd pte */
1035 UASM_i_MTC0(p, ptep, C0_ENTRYLO1); /* load it */ 1032 UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL));
1033 UASM_i_ROTR(p, ptep, ptep, ilog2(_PAGE_GLOBAL));
1034 UASM_i_MTC0(p, tmp, C0_ENTRYLO0);
1035 UASM_i_MTC0(p, ptep, C0_ENTRYLO1);
1036#ifdef CONFIG_XPA
1037 uasm_i_lw(p, tmp, 0, scratch);
1038 uasm_i_lw(p, ptep, sizeof(pte_t), scratch);
1039 uasm_i_lui(p, scratch, 0xff);
1040 uasm_i_ori(p, scratch, scratch, 0xffff);
1041 uasm_i_and(p, tmp, scratch, tmp);
1042 uasm_i_and(p, ptep, scratch, ptep);
1043 uasm_i_mthc0(p, tmp, C0_ENTRYLO0);
1044 uasm_i_mthc0(p, ptep, C0_ENTRYLO1);
1045#endif
1036 } 1046 }
1037#else 1047#else
1038 UASM_i_LW(p, tmp, 0, ptep); /* get even pte */ 1048 UASM_i_LW(p, tmp, 0, ptep); /* get even pte */
@@ -1533,8 +1543,14 @@ iPTE_SW(u32 **p, struct uasm_reloc **r, unsigned int pte, unsigned int ptr,
1533{ 1543{
1534#ifdef CONFIG_PHYS_ADDR_T_64BIT 1544#ifdef CONFIG_PHYS_ADDR_T_64BIT
1535 unsigned int hwmode = mode & (_PAGE_VALID | _PAGE_DIRTY); 1545 unsigned int hwmode = mode & (_PAGE_VALID | _PAGE_DIRTY);
1536#endif
1537 1546
1547 if (!cpu_has_64bits) {
1548 const int scratch = 1; /* Our extra working register */
1549
1550 uasm_i_lui(p, scratch, (mode >> 16));
1551 uasm_i_or(p, pte, pte, scratch);
1552 } else
1553#endif
1538 uasm_i_ori(p, pte, pte, mode); 1554 uasm_i_ori(p, pte, pte, mode);
1539#ifdef CONFIG_SMP 1555#ifdef CONFIG_SMP
1540# ifdef CONFIG_PHYS_ADDR_T_64BIT 1556# ifdef CONFIG_PHYS_ADDR_T_64BIT
@@ -1598,15 +1614,17 @@ build_pte_present(u32 **p, struct uasm_reloc **r,
1598 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid); 1614 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid);
1599 uasm_i_nop(p); 1615 uasm_i_nop(p);
1600 } else { 1616 } else {
1601 uasm_i_andi(p, t, pte, _PAGE_PRESENT); 1617 uasm_i_srl(p, t, pte, _PAGE_PRESENT_SHIFT);
1618 uasm_i_andi(p, t, t, 1);
1602 uasm_il_beqz(p, r, t, lid); 1619 uasm_il_beqz(p, r, t, lid);
1603 if (pte == t) 1620 if (pte == t)
1604 /* You lose the SMP race :-(*/ 1621 /* You lose the SMP race :-(*/
1605 iPTE_LW(p, pte, ptr); 1622 iPTE_LW(p, pte, ptr);
1606 } 1623 }
1607 } else { 1624 } else {
1608 uasm_i_andi(p, t, pte, _PAGE_PRESENT | _PAGE_READ); 1625 uasm_i_srl(p, t, pte, _PAGE_PRESENT_SHIFT);
1609 uasm_i_xori(p, t, t, _PAGE_PRESENT | _PAGE_READ); 1626 uasm_i_andi(p, t, t, 3);
1627 uasm_i_xori(p, t, t, 3);
1610 uasm_il_bnez(p, r, t, lid); 1628 uasm_il_bnez(p, r, t, lid);
1611 if (pte == t) 1629 if (pte == t)
1612 /* You lose the SMP race :-(*/ 1630 /* You lose the SMP race :-(*/
@@ -1635,8 +1653,9 @@ build_pte_writable(u32 **p, struct uasm_reloc **r,
1635{ 1653{
1636 int t = scratch >= 0 ? scratch : pte; 1654 int t = scratch >= 0 ? scratch : pte;
1637 1655
1638 uasm_i_andi(p, t, pte, _PAGE_PRESENT | _PAGE_WRITE); 1656 uasm_i_srl(p, t, pte, _PAGE_PRESENT_SHIFT);
1639 uasm_i_xori(p, t, t, _PAGE_PRESENT | _PAGE_WRITE); 1657 uasm_i_andi(p, t, t, 5);
1658 uasm_i_xori(p, t, t, 5);
1640 uasm_il_bnez(p, r, t, lid); 1659 uasm_il_bnez(p, r, t, lid);
1641 if (pte == t) 1660 if (pte == t)
1642 /* You lose the SMP race :-(*/ 1661 /* You lose the SMP race :-(*/
@@ -1672,7 +1691,8 @@ build_pte_modifiable(u32 **p, struct uasm_reloc **r,
1672 uasm_i_nop(p); 1691 uasm_i_nop(p);
1673 } else { 1692 } else {
1674 int t = scratch >= 0 ? scratch : pte; 1693 int t = scratch >= 0 ? scratch : pte;
1675 uasm_i_andi(p, t, pte, _PAGE_WRITE); 1694 uasm_i_srl(p, t, pte, _PAGE_WRITE_SHIFT);
1695 uasm_i_andi(p, t, t, 1);
1676 uasm_il_beqz(p, r, t, lid); 1696 uasm_il_beqz(p, r, t, lid);
1677 if (pte == t) 1697 if (pte == t)
1678 /* You lose the SMP race :-(*/ 1698 /* You lose the SMP race :-(*/
@@ -2285,6 +2305,11 @@ static void config_htw_params(void)
2285 2305
2286 pwsize = ilog2(PTRS_PER_PGD) << MIPS_PWSIZE_GDW_SHIFT; 2306 pwsize = ilog2(PTRS_PER_PGD) << MIPS_PWSIZE_GDW_SHIFT;
2287 pwsize |= ilog2(PTRS_PER_PTE) << MIPS_PWSIZE_PTW_SHIFT; 2307 pwsize |= ilog2(PTRS_PER_PTE) << MIPS_PWSIZE_PTW_SHIFT;
2308
2309 /* If XPA has been enabled, PTEs are 64-bit in size. */
2310 if (read_c0_pagegrain() & PG_ELPA)
2311 pwsize |= 1;
2312
2288 write_c0_pwsize(pwsize); 2313 write_c0_pwsize(pwsize);
2289 2314
2290 /* Make sure everything is set before we enable the HTW */ 2315 /* Make sure everything is set before we enable the HTW */
@@ -2298,6 +2323,28 @@ static void config_htw_params(void)
2298 print_htw_config(); 2323 print_htw_config();
2299} 2324}
2300 2325
2326static void config_xpa_params(void)
2327{
2328#ifdef CONFIG_XPA
2329 unsigned int pagegrain;
2330
2331 if (mips_xpa_disabled) {
2332 pr_info("Extended Physical Addressing (XPA) disabled\n");
2333 return;
2334 }
2335
2336 pagegrain = read_c0_pagegrain();
2337 write_c0_pagegrain(pagegrain | PG_ELPA);
2338 back_to_back_c0_hazard();
2339 pagegrain = read_c0_pagegrain();
2340
2341 if (pagegrain & PG_ELPA)
2342 pr_info("Extended Physical Addressing (XPA) enabled\n");
2343 else
2344 panic("Extended Physical Addressing (XPA) disabled");
2345#endif
2346}
2347
2301void build_tlb_refill_handler(void) 2348void build_tlb_refill_handler(void)
2302{ 2349{
2303 /* 2350 /*
@@ -2362,8 +2409,9 @@ void build_tlb_refill_handler(void)
2362 } 2409 }
2363 if (cpu_has_local_ebase) 2410 if (cpu_has_local_ebase)
2364 build_r4000_tlb_refill_handler(); 2411 build_r4000_tlb_refill_handler();
2412 if (cpu_has_xpa)
2413 config_xpa_params();
2365 if (cpu_has_htw) 2414 if (cpu_has_htw)
2366 config_htw_params(); 2415 config_htw_params();
2367
2368 } 2416 }
2369} 2417}
diff --git a/arch/mips/mti-malta/malta-memory.c b/arch/mips/mti-malta/malta-memory.c
index 8fddd2cdbff7..b769657be4d4 100644
--- a/arch/mips/mti-malta/malta-memory.c
+++ b/arch/mips/mti-malta/malta-memory.c
@@ -16,6 +16,7 @@
16#include <linux/string.h> 16#include <linux/string.h>
17 17
18#include <asm/bootinfo.h> 18#include <asm/bootinfo.h>
19#include <asm/cdmm.h>
19#include <asm/maar.h> 20#include <asm/maar.h>
20#include <asm/sections.h> 21#include <asm/sections.h>
21#include <asm/fw/fw.h> 22#include <asm/fw/fw.h>
@@ -53,6 +54,12 @@ fw_memblock_t * __init fw_getmdesc(int eva)
53 pr_warn("memsize not set in YAMON, set to default (32Mb)\n"); 54 pr_warn("memsize not set in YAMON, set to default (32Mb)\n");
54 physical_memsize = 0x02000000; 55 physical_memsize = 0x02000000;
55 } else { 56 } else {
57 if (memsize > (256 << 20)) { /* memsize should be capped to 256M */
58 pr_warn("Unsupported memsize value (0x%lx) detected! "
59 "Using 0x10000000 (256M) instead\n",
60 memsize);
61 memsize = 256 << 20;
62 }
56 /* If ememsize is set, then set physical_memsize to that */ 63 /* If ememsize is set, then set physical_memsize to that */
57 physical_memsize = ememsize ? : memsize; 64 physical_memsize = ememsize ? : memsize;
58 } 65 }
@@ -196,3 +203,9 @@ unsigned platform_maar_init(unsigned num_pairs)
196 203
197 return maar_config(cfg, num_cfg, num_pairs); 204 return maar_config(cfg, num_cfg, num_pairs);
198} 205}
206
207phys_addr_t mips_cdmm_phys_base(void)
208{
209 /* This address is "typically unused" */
210 return 0x1fc10000;
211}
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
index ce02dbdedc62..185e68261f45 100644
--- a/arch/mips/mti-malta/malta-time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -87,8 +87,10 @@ static void __init estimate_frequencies(void)
87 87
88 /* Initialize counters. */ 88 /* Initialize counters. */
89 start = read_c0_count(); 89 start = read_c0_count();
90 if (gic_present) 90 if (gic_present) {
91 gic_start_count();
91 gicstart = gic_read_count(); 92 gicstart = gic_read_count();
93 }
92 94
93 /* Read counter exactly on falling edge of update flag. */ 95 /* Read counter exactly on falling edge of update flag. */
94 while (CMOS_READ(RTC_REG_A) & RTC_UIP); 96 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
@@ -115,6 +117,22 @@ void read_persistent_clock(struct timespec *ts)
115 ts->tv_nsec = 0; 117 ts->tv_nsec = 0;
116} 118}
117 119
120int get_c0_fdc_int(void)
121{
122 int mips_cpu_fdc_irq;
123
124 if (cpu_has_veic)
125 mips_cpu_fdc_irq = -1;
126 else if (gic_present)
127 mips_cpu_fdc_irq = gic_get_c0_fdc_int();
128 else if (cp0_fdc_irq >= 0)
129 mips_cpu_fdc_irq = MIPS_CPU_IRQ_BASE + cp0_fdc_irq;
130 else
131 mips_cpu_fdc_irq = -1;
132
133 return mips_cpu_fdc_irq;
134}
135
118int get_c0_perfcount_int(void) 136int get_c0_perfcount_int(void)
119{ 137{
120 if (cpu_has_veic) { 138 if (cpu_has_veic) {
diff --git a/arch/mips/mti-sead3/Makefile b/arch/mips/mti-sead3/Makefile
index 2ae49e99eb67..ecd71db6258b 100644
--- a/arch/mips/mti-sead3/Makefile
+++ b/arch/mips/mti-sead3/Makefile
@@ -9,14 +9,11 @@
9# Steven J. Hill <sjhill@mips.com> 9# Steven J. Hill <sjhill@mips.com>
10# 10#
11obj-y := sead3-lcd.o sead3-display.o sead3-init.o \ 11obj-y := sead3-lcd.o sead3-display.o sead3-init.o \
12 sead3-int.o sead3-mtd.o sead3-net.o \ 12 sead3-int.o sead3-platform.o sead3-reset.o \
13 sead3-platform.o sead3-reset.o \
14 sead3-setup.o sead3-time.o 13 sead3-setup.o sead3-time.o
15 14
16obj-y += sead3-i2c-dev.o sead3-i2c.o \ 15obj-y += leds-sead3.o
17 leds-sead3.o sead3-leds.o
18 16
19obj-$(CONFIG_EARLY_PRINTK) += sead3-console.o 17obj-$(CONFIG_EARLY_PRINTK) += sead3-console.o
20obj-$(CONFIG_USB_EHCI_HCD) += sead3-ehci.o
21 18
22CFLAGS_sead3-setup.o = -I$(src)/../../../scripts/dtc/libfdt 19CFLAGS_sead3-setup.o = -I$(src)/../../../scripts/dtc/libfdt
diff --git a/arch/mips/mti-sead3/leds-sead3.c b/arch/mips/mti-sead3/leds-sead3.c
index 3abe47b316aa..c938ceeb8848 100644
--- a/arch/mips/mti-sead3/leds-sead3.c
+++ b/arch/mips/mti-sead3/leds-sead3.c
@@ -4,6 +4,7 @@
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved. 6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 * Copyright (C) 2015 Imagination Technologies, Inc.
7 */ 8 */
8#include <linux/kernel.h> 9#include <linux/kernel.h>
9#include <linux/module.h> 10#include <linux/module.h>
@@ -13,22 +14,18 @@
13#include <linux/err.h> 14#include <linux/err.h>
14#include <linux/io.h> 15#include <linux/io.h>
15 16
16#define DRVNAME "sead3-led" 17#include <asm/mips-boards/sead3-addr.h>
17
18static struct platform_device *pdev;
19 18
20static void sead3_pled_set(struct led_classdev *led_cdev, 19static void sead3_pled_set(struct led_classdev *led_cdev,
21 enum led_brightness value) 20 enum led_brightness value)
22{ 21{
23 pr_debug("sead3_pled_set\n"); 22 writel(value, (void __iomem *)SEAD3_CPLD_P_LED);
24 writel(value, (void __iomem *)0xBF000210); /* FIXME */
25} 23}
26 24
27static void sead3_fled_set(struct led_classdev *led_cdev, 25static void sead3_fled_set(struct led_classdev *led_cdev,
28 enum led_brightness value) 26 enum led_brightness value)
29{ 27{
30 pr_debug("sead3_fled_set\n"); 28 writel(value, (void __iomem *)SEAD3_CPLD_F_LED);
31 writel(value, (void __iomem *)0xBF000218); /* FIXME */
32} 29}
33 30
34static struct led_classdev sead3_pled = { 31static struct led_classdev sead3_pled = {
@@ -69,37 +66,11 @@ static struct platform_driver sead3_led_driver = {
69 .probe = sead3_led_probe, 66 .probe = sead3_led_probe,
70 .remove = sead3_led_remove, 67 .remove = sead3_led_remove,
71 .driver = { 68 .driver = {
72 .name = DRVNAME, 69 .name = "sead3-led",
73 }, 70 },
74}; 71};
75 72
76static int __init sead3_led_init(void) 73module_platform_driver(sead3_led_driver);
77{
78 int ret;
79
80 ret = platform_driver_register(&sead3_led_driver);
81 if (ret < 0)
82 goto out;
83
84 pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0);
85 if (IS_ERR(pdev)) {
86 ret = PTR_ERR(pdev);
87 platform_driver_unregister(&sead3_led_driver);
88 goto out;
89 }
90
91out:
92 return ret;
93}
94
95static void __exit sead3_led_exit(void)
96{
97 platform_device_unregister(pdev);
98 platform_driver_unregister(&sead3_led_driver);
99}
100
101module_init(sead3_led_init);
102module_exit(sead3_led_exit);
103 74
104MODULE_AUTHOR("Kristian Kielhofner <kris@krisk.org>"); 75MODULE_AUTHOR("Kristian Kielhofner <kris@krisk.org>");
105MODULE_DESCRIPTION("SEAD3 LED driver"); 76MODULE_DESCRIPTION("SEAD3 LED driver");
diff --git a/arch/mips/mti-sead3/sead3-ehci.c b/arch/mips/mti-sead3/sead3-ehci.c
deleted file mode 100644
index 014dd7ba4d68..000000000000
--- a/arch/mips/mti-sead3/sead3-ehci.c
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/module.h>
9#include <linux/irq.h>
10#include <linux/dma-mapping.h>
11#include <linux/platform_device.h>
12#include <linux/irqchip/mips-gic.h>
13
14#include <asm/mips-boards/sead3int.h>
15
16struct resource ehci_resources[] = {
17 {
18 .start = 0x1b200000,
19 .end = 0x1b200fff,
20 .flags = IORESOURCE_MEM
21 },
22 {
23 .flags = IORESOURCE_IRQ
24 }
25};
26
27u64 sead3_usbdev_dma_mask = DMA_BIT_MASK(32);
28
29static struct platform_device ehci_device = {
30 .name = "sead3-ehci",
31 .id = 0,
32 .dev = {
33 .dma_mask = &sead3_usbdev_dma_mask,
34 .coherent_dma_mask = DMA_BIT_MASK(32)
35 },
36 .num_resources = ARRAY_SIZE(ehci_resources),
37 .resource = ehci_resources
38};
39
40static int __init ehci_init(void)
41{
42 if (gic_present)
43 ehci_resources[1].start = MIPS_GIC_IRQ_BASE + GIC_INT_EHCI;
44 else
45 ehci_resources[1].start = MIPS_CPU_IRQ_BASE + CPU_INT_EHCI;
46 return platform_device_register(&ehci_device);
47}
48
49module_init(ehci_init);
50
51MODULE_AUTHOR("Chris Dearman <chris@mips.com>");
52MODULE_LICENSE("GPL");
53MODULE_DESCRIPTION("EHCI probe driver for SEAD3");
diff --git a/arch/mips/mti-sead3/sead3-i2c-dev.c b/arch/mips/mti-sead3/sead3-i2c-dev.c
deleted file mode 100644
index eca0b53a71dd..000000000000
--- a/arch/mips/mti-sead3/sead3-i2c-dev.c
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/init.h>
9#include <linux/i2c.h>
10
11static struct i2c_board_info __initdata sead3_i2c_devices[] = {
12 {
13 I2C_BOARD_INFO("adt7476", 0x2c),
14 .irq = 0,
15 },
16 {
17 I2C_BOARD_INFO("m41t80", 0x68),
18 .irq = 0,
19 },
20};
21
22static int __init sead3_i2c_init(void)
23{
24 int err;
25
26 err = i2c_register_board_info(0, sead3_i2c_devices,
27 ARRAY_SIZE(sead3_i2c_devices));
28 if (err < 0)
29 pr_err("sead3-i2c-dev: cannot register board I2C devices\n");
30 return err;
31}
32
33arch_initcall(sead3_i2c_init);
diff --git a/arch/mips/mti-sead3/sead3-i2c-drv.c b/arch/mips/mti-sead3/sead3-i2c-drv.c
deleted file mode 100644
index 2bebf0974e39..000000000000
--- a/arch/mips/mti-sead3/sead3-i2c-drv.c
+++ /dev/null
@@ -1,404 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/init.h>
9#include <linux/module.h>
10#include <linux/slab.h>
11#include <linux/delay.h>
12#include <linux/i2c.h>
13#include <linux/platform_device.h>
14
15#define PIC32_I2CxCON 0x0000
16#define PIC32_I2CCON_ON (1<<15)
17#define PIC32_I2CCON_ACKDT (1<<5)
18#define PIC32_I2CCON_ACKEN (1<<4)
19#define PIC32_I2CCON_RCEN (1<<3)
20#define PIC32_I2CCON_PEN (1<<2)
21#define PIC32_I2CCON_RSEN (1<<1)
22#define PIC32_I2CCON_SEN (1<<0)
23#define PIC32_I2CxCONCLR 0x0004
24#define PIC32_I2CxCONSET 0x0008
25#define PIC32_I2CxSTAT 0x0010
26#define PIC32_I2CxSTATCLR 0x0014
27#define PIC32_I2CSTAT_ACKSTAT (1<<15)
28#define PIC32_I2CSTAT_TRSTAT (1<<14)
29#define PIC32_I2CSTAT_BCL (1<<10)
30#define PIC32_I2CSTAT_IWCOL (1<<7)
31#define PIC32_I2CSTAT_I2COV (1<<6)
32#define PIC32_I2CxBRG 0x0040
33#define PIC32_I2CxTRN 0x0050
34#define PIC32_I2CxRCV 0x0060
35
36static DEFINE_SPINLOCK(pic32_bus_lock);
37
38static void __iomem *bus_xfer = (void __iomem *)0xbf000600;
39static void __iomem *bus_status = (void __iomem *)0xbf000060;
40
41#define DELAY() udelay(100)
42
43static inline unsigned int ioready(void)
44{
45 return readl(bus_status) & 1;
46}
47
48static inline void wait_ioready(void)
49{
50 do { } while (!ioready());
51}
52
53static inline void wait_ioclear(void)
54{
55 do { } while (ioready());
56}
57
58static inline void check_ioclear(void)
59{
60 if (ioready()) {
61 do {
62 (void) readl(bus_xfer);
63 DELAY();
64 } while (ioready());
65 }
66}
67
68static u32 pic32_bus_readl(u32 reg)
69{
70 unsigned long flags;
71 u32 status, val;
72
73 spin_lock_irqsave(&pic32_bus_lock, flags);
74
75 check_ioclear();
76 writel((0x01 << 24) | (reg & 0x00ffffff), bus_xfer);
77 DELAY();
78 wait_ioready();
79 status = readl(bus_xfer);
80 DELAY();
81 val = readl(bus_xfer);
82 wait_ioclear();
83
84 spin_unlock_irqrestore(&pic32_bus_lock, flags);
85
86 return val;
87}
88
89static void pic32_bus_writel(u32 val, u32 reg)
90{
91 unsigned long flags;
92 u32 status;
93
94 spin_lock_irqsave(&pic32_bus_lock, flags);
95
96 check_ioclear();
97 writel((0x10 << 24) | (reg & 0x00ffffff), bus_xfer);
98 DELAY();
99 writel(val, bus_xfer);
100 DELAY();
101 wait_ioready();
102 status = readl(bus_xfer);
103 wait_ioclear();
104
105 spin_unlock_irqrestore(&pic32_bus_lock, flags);
106}
107
108struct pic32_i2c_platform_data {
109 u32 base;
110 struct i2c_adapter adap;
111 u32 xfer_timeout;
112 u32 ack_timeout;
113 u32 ctl_timeout;
114};
115
116static inline void pic32_i2c_start(struct pic32_i2c_platform_data *adap)
117{
118 pic32_bus_writel(PIC32_I2CCON_SEN, adap->base + PIC32_I2CxCONSET);
119}
120
121static inline void pic32_i2c_stop(struct pic32_i2c_platform_data *adap)
122{
123 pic32_bus_writel(PIC32_I2CCON_PEN, adap->base + PIC32_I2CxCONSET);
124}
125
126static inline void pic32_i2c_ack(struct pic32_i2c_platform_data *adap)
127{
128 pic32_bus_writel(PIC32_I2CCON_ACKDT, adap->base + PIC32_I2CxCONCLR);
129 pic32_bus_writel(PIC32_I2CCON_ACKEN, adap->base + PIC32_I2CxCONSET);
130}
131
132static inline void pic32_i2c_nack(struct pic32_i2c_platform_data *adap)
133{
134 pic32_bus_writel(PIC32_I2CCON_ACKDT, adap->base + PIC32_I2CxCONSET);
135 pic32_bus_writel(PIC32_I2CCON_ACKEN, adap->base + PIC32_I2CxCONSET);
136}
137
138static inline int pic32_i2c_idle(struct pic32_i2c_platform_data *adap)
139{
140 int i;
141
142 for (i = 0; i < adap->ctl_timeout; i++) {
143 if (((pic32_bus_readl(adap->base + PIC32_I2CxCON) &
144 (PIC32_I2CCON_ACKEN | PIC32_I2CCON_RCEN |
145 PIC32_I2CCON_PEN | PIC32_I2CCON_RSEN |
146 PIC32_I2CCON_SEN)) == 0) &&
147 ((pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
148 (PIC32_I2CSTAT_TRSTAT)) == 0))
149 return 0;
150 udelay(1);
151 }
152 return -ETIMEDOUT;
153}
154
155static inline u32 pic32_i2c_master_write(struct pic32_i2c_platform_data *adap,
156 u32 byte)
157{
158 pic32_bus_writel(byte, adap->base + PIC32_I2CxTRN);
159 return pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
160 PIC32_I2CSTAT_IWCOL;
161}
162
163static inline u32 pic32_i2c_master_read(struct pic32_i2c_platform_data *adap)
164{
165 pic32_bus_writel(PIC32_I2CCON_RCEN, adap->base + PIC32_I2CxCONSET);
166 while (pic32_bus_readl(adap->base + PIC32_I2CxCON) & PIC32_I2CCON_RCEN)
167 ;
168 pic32_bus_writel(PIC32_I2CSTAT_I2COV, adap->base + PIC32_I2CxSTATCLR);
169 return pic32_bus_readl(adap->base + PIC32_I2CxRCV);
170}
171
172static int pic32_i2c_address(struct pic32_i2c_platform_data *adap,
173 unsigned int addr, int rd)
174{
175 pic32_i2c_idle(adap);
176 pic32_i2c_start(adap);
177 pic32_i2c_idle(adap);
178
179 addr <<= 1;
180 if (rd)
181 addr |= 1;
182
183 if (pic32_i2c_master_write(adap, addr))
184 return -EIO;
185 pic32_i2c_idle(adap);
186 if (pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
187 PIC32_I2CSTAT_ACKSTAT)
188 return -EIO;
189 return 0;
190}
191
192static int sead3_i2c_read(struct pic32_i2c_platform_data *adap,
193 unsigned char *buf, unsigned int len)
194{
195 u32 data;
196 int i;
197
198 i = 0;
199 while (i < len) {
200 data = pic32_i2c_master_read(adap);
201 buf[i++] = data;
202 if (i < len)
203 pic32_i2c_ack(adap);
204 else
205 pic32_i2c_nack(adap);
206 }
207
208 pic32_i2c_stop(adap);
209 pic32_i2c_idle(adap);
210 return 0;
211}
212
213static int sead3_i2c_write(struct pic32_i2c_platform_data *adap,
214 unsigned char *buf, unsigned int len)
215{
216 int i;
217 u32 data;
218
219 i = 0;
220 while (i < len) {
221 data = buf[i];
222 if (pic32_i2c_master_write(adap, data))
223 return -EIO;
224 pic32_i2c_idle(adap);
225 if (pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
226 PIC32_I2CSTAT_ACKSTAT)
227 return -EIO;
228 i++;
229 }
230
231 pic32_i2c_stop(adap);
232 pic32_i2c_idle(adap);
233 return 0;
234}
235
236static int sead3_pic32_platform_xfer(struct i2c_adapter *i2c_adap,
237 struct i2c_msg *msgs, int num)
238{
239 struct pic32_i2c_platform_data *adap = i2c_adap->algo_data;
240 struct i2c_msg *p;
241 int i, err = 0;
242
243 for (i = 0; i < num; i++) {
244#define __BUFSIZE 80
245 int ii;
246 static char buf[__BUFSIZE];
247 char *b = buf;
248
249 p = &msgs[i];
250 b += sprintf(buf, " [%d bytes]", p->len);
251 if ((p->flags & I2C_M_RD) == 0) {
252 for (ii = 0; ii < p->len; ii++) {
253 if (b < &buf[__BUFSIZE-4]) {
254 b += sprintf(b, " %02x", p->buf[ii]);
255 } else {
256 strcat(b, "...");
257 break;
258 }
259 }
260 }
261 }
262
263 for (i = 0; !err && i < num; i++) {
264 p = &msgs[i];
265 err = pic32_i2c_address(adap, p->addr, p->flags & I2C_M_RD);
266 if (err || !p->len)
267 continue;
268 if (p->flags & I2C_M_RD)
269 err = sead3_i2c_read(adap, p->buf, p->len);
270 else
271 err = sead3_i2c_write(adap, p->buf, p->len);
272 }
273
274 /* Return the number of messages processed, or the error code. */
275 if (err == 0)
276 err = num;
277
278 return err;
279}
280
281static u32 sead3_pic32_platform_func(struct i2c_adapter *adap)
282{
283 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
284}
285
286static const struct i2c_algorithm sead3_platform_algo = {
287 .master_xfer = sead3_pic32_platform_xfer,
288 .functionality = sead3_pic32_platform_func,
289};
290
291static void sead3_i2c_platform_setup(struct pic32_i2c_platform_data *priv)
292{
293 pic32_bus_writel(500, priv->base + PIC32_I2CxBRG);
294 pic32_bus_writel(PIC32_I2CCON_ON, priv->base + PIC32_I2CxCONCLR);
295 pic32_bus_writel(PIC32_I2CCON_ON, priv->base + PIC32_I2CxCONSET);
296 pic32_bus_writel(PIC32_I2CSTAT_BCL | PIC32_I2CSTAT_IWCOL,
297 priv->base + PIC32_I2CxSTATCLR);
298}
299
300static int sead3_i2c_platform_probe(struct platform_device *pdev)
301{
302 struct pic32_i2c_platform_data *priv;
303 struct resource *r;
304 int ret;
305
306 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
307 if (!r) {
308 ret = -ENODEV;
309 goto out;
310 }
311
312 priv = kzalloc(sizeof(struct pic32_i2c_platform_data), GFP_KERNEL);
313 if (!priv) {
314 ret = -ENOMEM;
315 goto out;
316 }
317
318 priv->base = r->start;
319 if (!priv->base) {
320 ret = -EBUSY;
321 goto out_mem;
322 }
323
324 priv->xfer_timeout = 200;
325 priv->ack_timeout = 200;
326 priv->ctl_timeout = 200;
327
328 priv->adap.nr = pdev->id;
329 priv->adap.algo = &sead3_platform_algo;
330 priv->adap.algo_data = priv;
331 priv->adap.dev.parent = &pdev->dev;
332 strlcpy(priv->adap.name, "SEAD3 PIC32", sizeof(priv->adap.name));
333
334 sead3_i2c_platform_setup(priv);
335
336 ret = i2c_add_numbered_adapter(&priv->adap);
337 if (ret == 0) {
338 platform_set_drvdata(pdev, priv);
339 return 0;
340 }
341
342out_mem:
343 kfree(priv);
344out:
345 return ret;
346}
347
348static int sead3_i2c_platform_remove(struct platform_device *pdev)
349{
350 struct pic32_i2c_platform_data *priv = platform_get_drvdata(pdev);
351
352 platform_set_drvdata(pdev, NULL);
353 i2c_del_adapter(&priv->adap);
354 kfree(priv);
355 return 0;
356}
357
358#ifdef CONFIG_PM
359static int sead3_i2c_platform_suspend(struct platform_device *pdev,
360 pm_message_t state)
361{
362 dev_dbg(&pdev->dev, "i2c_platform_disable\n");
363 return 0;
364}
365
366static int sead3_i2c_platform_resume(struct platform_device *pdev)
367{
368 struct pic32_i2c_platform_data *priv = platform_get_drvdata(pdev);
369
370 dev_dbg(&pdev->dev, "sead3_i2c_platform_setup\n");
371 sead3_i2c_platform_setup(priv);
372
373 return 0;
374}
375#else
376#define sead3_i2c_platform_suspend NULL
377#define sead3_i2c_platform_resume NULL
378#endif
379
380static struct platform_driver sead3_i2c_platform_driver = {
381 .driver = {
382 .name = "sead3-i2c",
383 },
384 .probe = sead3_i2c_platform_probe,
385 .remove = sead3_i2c_platform_remove,
386 .suspend = sead3_i2c_platform_suspend,
387 .resume = sead3_i2c_platform_resume,
388};
389
390static int __init sead3_i2c_platform_init(void)
391{
392 return platform_driver_register(&sead3_i2c_platform_driver);
393}
394module_init(sead3_i2c_platform_init);
395
396static void __exit sead3_i2c_platform_exit(void)
397{
398 platform_driver_unregister(&sead3_i2c_platform_driver);
399}
400module_exit(sead3_i2c_platform_exit);
401
402MODULE_AUTHOR("Chris Dearman, MIPS Technologies INC.");
403MODULE_DESCRIPTION("SEAD3 PIC32 I2C driver");
404MODULE_LICENSE("GPL");
diff --git a/arch/mips/mti-sead3/sead3-i2c.c b/arch/mips/mti-sead3/sead3-i2c.c
deleted file mode 100644
index 795ae83894e0..000000000000
--- a/arch/mips/mti-sead3/sead3-i2c.c
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/init.h>
9#include <linux/platform_device.h>
10
11struct resource sead3_i2c_resources[] = {
12 {
13 .start = 0x805200,
14 .end = 0x8053ff,
15 .flags = IORESOURCE_MEM,
16 },
17};
18
19static struct platform_device sead3_i2c_device = {
20 .name = "sead3-i2c",
21 .id = 0,
22 .num_resources = ARRAY_SIZE(sead3_i2c_resources),
23 .resource = sead3_i2c_resources,
24};
25
26static int __init sead3_i2c_init(void)
27{
28 return platform_device_register(&sead3_i2c_device);
29}
30
31device_initcall(sead3_i2c_init);
diff --git a/arch/mips/mti-sead3/sead3-init.c b/arch/mips/mti-sead3/sead3-init.c
index bfbd17b120a2..3572ea30173e 100644
--- a/arch/mips/mti-sead3/sead3-init.c
+++ b/arch/mips/mti-sead3/sead3-init.c
@@ -147,6 +147,6 @@ void __init prom_init(void)
147#endif 147#endif
148} 148}
149 149
150void prom_free_prom_memory(void) 150void __init prom_free_prom_memory(void)
151{ 151{
152} 152}
diff --git a/arch/mips/mti-sead3/sead3-leds.c b/arch/mips/mti-sead3/sead3-leds.c
deleted file mode 100644
index c427c5778186..000000000000
--- a/arch/mips/mti-sead3/sead3-leds.c
+++ /dev/null
@@ -1,79 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/init.h>
9#include <linux/leds.h>
10#include <linux/platform_device.h>
11
12#define LEDFLAGS(bits, shift) \
13 ((bits << 8) | (shift << 8))
14
15#define LEDBITS(id, shift, bits) \
16 .name = id #shift, \
17 .flags = LEDFLAGS(bits, shift)
18
19struct led_info led_data_info[] = {
20 { LEDBITS("bit", 0, 1) },
21 { LEDBITS("bit", 1, 1) },
22 { LEDBITS("bit", 2, 1) },
23 { LEDBITS("bit", 3, 1) },
24 { LEDBITS("bit", 4, 1) },
25 { LEDBITS("bit", 5, 1) },
26 { LEDBITS("bit", 6, 1) },
27 { LEDBITS("bit", 7, 1) },
28 { LEDBITS("all", 0, 8) },
29};
30
31static struct led_platform_data led_data = {
32 .num_leds = ARRAY_SIZE(led_data_info),
33 .leds = led_data_info
34};
35
36static struct resource pled_resources[] = {
37 {
38 .start = 0x1f000210,
39 .end = 0x1f000217,
40 .flags = IORESOURCE_MEM
41 }
42};
43
44static struct platform_device pled_device = {
45 .name = "sead3::pled",
46 .id = 0,
47 .dev = {
48 .platform_data = &led_data,
49 },
50 .num_resources = ARRAY_SIZE(pled_resources),
51 .resource = pled_resources
52};
53
54
55static struct resource fled_resources[] = {
56 {
57 .start = 0x1f000218,
58 .end = 0x1f00021f,
59 .flags = IORESOURCE_MEM
60 }
61};
62
63static struct platform_device fled_device = {
64 .name = "sead3::fled",
65 .id = 0,
66 .dev = {
67 .platform_data = &led_data,
68 },
69 .num_resources = ARRAY_SIZE(fled_resources),
70 .resource = fled_resources
71};
72
73static int __init led_init(void)
74{
75 platform_device_register(&pled_device);
76 return platform_device_register(&fled_device);
77}
78
79device_initcall(led_init);
diff --git a/arch/mips/mti-sead3/sead3-mtd.c b/arch/mips/mti-sead3/sead3-mtd.c
deleted file mode 100644
index f9c890d72677..000000000000
--- a/arch/mips/mti-sead3/sead3-mtd.c
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/init.h>
9#include <linux/platform_device.h>
10#include <linux/mtd/physmap.h>
11
12static struct mtd_partition sead3_mtd_partitions[] = {
13 {
14 .name = "User FS",
15 .offset = 0x00000000,
16 .size = 0x01fc0000,
17 }, {
18 .name = "Board Config",
19 .offset = 0x01fc0000,
20 .size = 0x00040000,
21 .mask_flags = MTD_WRITEABLE
22 },
23};
24
25static struct physmap_flash_data sead3_flash_data = {
26 .width = 4,
27 .nr_parts = ARRAY_SIZE(sead3_mtd_partitions),
28 .parts = sead3_mtd_partitions
29};
30
31static struct resource sead3_flash_resource = {
32 .start = 0x1c000000,
33 .end = 0x1dffffff,
34 .flags = IORESOURCE_MEM
35};
36
37static struct platform_device sead3_flash = {
38 .name = "physmap-flash",
39 .id = 0,
40 .dev = {
41 .platform_data = &sead3_flash_data,
42 },
43 .num_resources = 1,
44 .resource = &sead3_flash_resource,
45};
46
47static int __init sead3_mtd_init(void)
48{
49 platform_device_register(&sead3_flash);
50
51 return 0;
52}
53device_initcall(sead3_mtd_init);
diff --git a/arch/mips/mti-sead3/sead3-net.c b/arch/mips/mti-sead3/sead3-net.c
deleted file mode 100644
index 46176b804576..000000000000
--- a/arch/mips/mti-sead3/sead3-net.c
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/module.h>
9#include <linux/irq.h>
10#include <linux/irqchip/mips-gic.h>
11#include <linux/platform_device.h>
12#include <linux/smsc911x.h>
13
14#include <asm/mips-boards/sead3int.h>
15
16static struct smsc911x_platform_config sead3_smsc911x_data = {
17 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
18 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
19 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
20 .phy_interface = PHY_INTERFACE_MODE_MII,
21};
22
23struct resource sead3_net_resources[] = {
24 {
25 .start = 0x1f010000,
26 .end = 0x1f01ffff,
27 .flags = IORESOURCE_MEM
28 },
29 {
30 .flags = IORESOURCE_IRQ
31 }
32};
33
34static struct platform_device sead3_net_device = {
35 .name = "smsc911x",
36 .id = 0,
37 .dev = {
38 .platform_data = &sead3_smsc911x_data,
39 },
40 .num_resources = ARRAY_SIZE(sead3_net_resources),
41 .resource = sead3_net_resources
42};
43
44static int __init sead3_net_init(void)
45{
46 if (gic_present)
47 sead3_net_resources[1].start = MIPS_GIC_IRQ_BASE + GIC_INT_NET;
48 else
49 sead3_net_resources[1].start = MIPS_CPU_IRQ_BASE + CPU_INT_NET;
50 return platform_device_register(&sead3_net_device);
51}
52
53module_init(sead3_net_init);
54
55MODULE_AUTHOR("Chris Dearman <chris@mips.com>");
56MODULE_LICENSE("GPL");
57MODULE_DESCRIPTION("Network probe driver for SEAD-3");
diff --git a/arch/mips/mti-sead3/sead3-platform.c b/arch/mips/mti-sead3/sead3-platform.c
index 53ee6f1f018d..73b73efbfb05 100644
--- a/arch/mips/mti-sead3/sead3-platform.c
+++ b/arch/mips/mti-sead3/sead3-platform.c
@@ -5,10 +5,15 @@
5 * 5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved. 6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */ 7 */
8#include <linux/module.h> 8#include <linux/dma-mapping.h>
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/irq.h>
10#include <linux/irqchip/mips-gic.h> 11#include <linux/irqchip/mips-gic.h>
12#include <linux/leds.h>
13#include <linux/mtd/physmap.h>
14#include <linux/platform_device.h>
11#include <linux/serial_8250.h> 15#include <linux/serial_8250.h>
16#include <linux/smsc911x.h>
12 17
13#include <asm/mips-boards/sead3int.h> 18#include <asm/mips-boards/sead3int.h>
14 19
@@ -36,20 +41,183 @@ static struct platform_device uart8250_device = {
36 }, 41 },
37}; 42};
38 43
39static int __init uart8250_init(void) 44static struct smsc911x_platform_config sead3_smsc911x_data = {
45 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
46 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
47 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
48 .phy_interface = PHY_INTERFACE_MODE_MII,
49};
50
51static struct resource sead3_net_resources[] = {
52 {
53 .start = 0x1f010000,
54 .end = 0x1f01ffff,
55 .flags = IORESOURCE_MEM
56 }, {
57 .flags = IORESOURCE_IRQ
58 }
59};
60
61static struct platform_device sead3_net_device = {
62 .name = "smsc911x",
63 .id = 0,
64 .dev = {
65 .platform_data = &sead3_smsc911x_data,
66 },
67 .num_resources = ARRAY_SIZE(sead3_net_resources),
68 .resource = sead3_net_resources
69};
70
71static struct mtd_partition sead3_mtd_partitions[] = {
72 {
73 .name = "User FS",
74 .offset = 0x00000000,
75 .size = 0x01fc0000,
76 }, {
77 .name = "Board Config",
78 .offset = 0x01fc0000,
79 .size = 0x00040000,
80 .mask_flags = MTD_WRITEABLE
81 },
82};
83
84static struct physmap_flash_data sead3_flash_data = {
85 .width = 4,
86 .nr_parts = ARRAY_SIZE(sead3_mtd_partitions),
87 .parts = sead3_mtd_partitions
88};
89
90static struct resource sead3_flash_resource = {
91 .start = 0x1c000000,
92 .end = 0x1dffffff,
93 .flags = IORESOURCE_MEM
94};
95
96static struct platform_device sead3_flash = {
97 .name = "physmap-flash",
98 .id = 0,
99 .dev = {
100 .platform_data = &sead3_flash_data,
101 },
102 .num_resources = 1,
103 .resource = &sead3_flash_resource,
104};
105
106#define LEDFLAGS(bits, shift) \
107 ((bits << 8) | (shift << 8))
108
109#define LEDBITS(id, shift, bits) \
110 .name = id #shift, \
111 .flags = LEDFLAGS(bits, shift)
112
113static struct led_info led_data_info[] = {
114 { LEDBITS("bit", 0, 1) },
115 { LEDBITS("bit", 1, 1) },
116 { LEDBITS("bit", 2, 1) },
117 { LEDBITS("bit", 3, 1) },
118 { LEDBITS("bit", 4, 1) },
119 { LEDBITS("bit", 5, 1) },
120 { LEDBITS("bit", 6, 1) },
121 { LEDBITS("bit", 7, 1) },
122 { LEDBITS("all", 0, 8) },
123};
124
125static struct led_platform_data led_data = {
126 .num_leds = ARRAY_SIZE(led_data_info),
127 .leds = led_data_info
128};
129
130static struct resource pled_resources[] = {
131 {
132 .start = 0x1f000210,
133 .end = 0x1f000217,
134 .flags = IORESOURCE_MEM
135 }
136};
137
138static struct platform_device pled_device = {
139 .name = "sead3::pled",
140 .id = 0,
141 .dev = {
142 .platform_data = &led_data,
143 },
144 .num_resources = ARRAY_SIZE(pled_resources),
145 .resource = pled_resources
146};
147
148
149static struct resource fled_resources[] = {
150 {
151 .start = 0x1f000218,
152 .end = 0x1f00021f,
153 .flags = IORESOURCE_MEM
154 }
155};
156
157static struct platform_device fled_device = {
158 .name = "sead3::fled",
159 .id = 0,
160 .dev = {
161 .platform_data = &led_data,
162 },
163 .num_resources = ARRAY_SIZE(fled_resources),
164 .resource = fled_resources
165};
166
167static struct platform_device sead3_led_device = {
168 .name = "sead3-led",
169 .id = -1,
170};
171
172static struct resource ehci_resources[] = {
173 {
174 .start = 0x1b200000,
175 .end = 0x1b200fff,
176 .flags = IORESOURCE_MEM
177 }, {
178 .flags = IORESOURCE_IRQ
179 }
180};
181
182static u64 sead3_usbdev_dma_mask = DMA_BIT_MASK(32);
183
184static struct platform_device ehci_device = {
185 .name = "sead3-ehci",
186 .id = 0,
187 .dev = {
188 .dma_mask = &sead3_usbdev_dma_mask,
189 .coherent_dma_mask = DMA_BIT_MASK(32)
190 },
191 .num_resources = ARRAY_SIZE(ehci_resources),
192 .resource = ehci_resources
193};
194
195static struct platform_device *sead3_platform_devices[] __initdata = {
196 &uart8250_device,
197 &sead3_flash,
198 &pled_device,
199 &fled_device,
200 &sead3_led_device,
201 &ehci_device,
202 &sead3_net_device,
203};
204
205static int __init sead3_platforms_device_init(void)
40{ 206{
41 if (gic_present) { 207 if (gic_present) {
42 uart8250_data[0].irq = MIPS_GIC_IRQ_BASE + GIC_INT_UART0; 208 uart8250_data[0].irq = MIPS_GIC_IRQ_BASE + GIC_INT_UART0;
43 uart8250_data[1].irq = MIPS_GIC_IRQ_BASE + GIC_INT_UART1; 209 uart8250_data[1].irq = MIPS_GIC_IRQ_BASE + GIC_INT_UART1;
210 ehci_resources[1].start = MIPS_GIC_IRQ_BASE + GIC_INT_EHCI;
211 sead3_net_resources[1].start = MIPS_GIC_IRQ_BASE + GIC_INT_NET;
44 } else { 212 } else {
45 uart8250_data[0].irq = MIPS_CPU_IRQ_BASE + CPU_INT_UART0; 213 uart8250_data[0].irq = MIPS_CPU_IRQ_BASE + CPU_INT_UART0;
46 uart8250_data[1].irq = MIPS_CPU_IRQ_BASE + CPU_INT_UART1; 214 uart8250_data[1].irq = MIPS_CPU_IRQ_BASE + CPU_INT_UART1;
215 ehci_resources[1].start = MIPS_CPU_IRQ_BASE + CPU_INT_EHCI;
216 sead3_net_resources[1].start = MIPS_CPU_IRQ_BASE + CPU_INT_NET;
47 } 217 }
48 return platform_device_register(&uart8250_device);
49}
50 218
51module_init(uart8250_init); 219 return platform_add_devices(sead3_platform_devices,
220 ARRAY_SIZE(sead3_platform_devices));
221}
52 222
53MODULE_AUTHOR("Chris Dearman <chris@mips.com>"); 223device_initcall(sead3_platforms_device_init);
54MODULE_LICENSE("GPL");
55MODULE_DESCRIPTION("8250 UART probe driver for SEAD3");
diff --git a/arch/mips/netlogic/Kconfig b/arch/mips/netlogic/Kconfig
index 0823321c10e0..fb00606e352d 100644
--- a/arch/mips/netlogic/Kconfig
+++ b/arch/mips/netlogic/Kconfig
@@ -41,6 +41,15 @@ config DT_XLP_GVP
41 pointer to the kernel. The corresponding DTS file is at 41 pointer to the kernel. The corresponding DTS file is at
42 arch/mips/netlogic/dts/xlp_gvp.dts 42 arch/mips/netlogic/dts/xlp_gvp.dts
43 43
44config DT_XLP_RVP
45 bool "Built-in device tree for XLP RVP boards"
46 default y
47 help
48 Add an FDT blob for XLP RVP board into the kernel.
49 This DTB will be used if the firmware does not pass in a DTB
50 pointer to the kernel. The corresponding DTS file is at
51 arch/mips/netlogic/dts/xlp_rvp.dts
52
44config NLM_MULTINODE 53config NLM_MULTINODE
45 bool "Support for multi-chip boards" 54 bool "Support for multi-chip boards"
46 depends on NLM_XLP_BOARD 55 depends on NLM_XLP_BOARD
diff --git a/arch/mips/netlogic/common/irq.c b/arch/mips/netlogic/common/irq.c
index c100b9afa0ab..5f5d18b0e94d 100644
--- a/arch/mips/netlogic/common/irq.c
+++ b/arch/mips/netlogic/common/irq.c
@@ -230,16 +230,16 @@ static void nlm_init_node_irqs(int node)
230 } 230 }
231} 231}
232 232
233void nlm_smp_irq_init(int hwcpuid) 233void nlm_smp_irq_init(int hwtid)
234{ 234{
235 int node, cpu; 235 int cpu, node;
236 236
237 node = nlm_cpuid_to_node(hwcpuid); 237 cpu = hwtid % nlm_threads_per_node();
238 cpu = hwcpuid % nlm_threads_per_node(); 238 node = hwtid / nlm_threads_per_node();
239 239
240 if (cpu == 0 && node != 0) 240 if (cpu == 0 && node != 0)
241 nlm_init_node_irqs(node); 241 nlm_init_node_irqs(node);
242 write_c0_eimr(nlm_current_node()->irqmask); 242 write_c0_eimr(nlm_get_node(node)->irqmask);
243} 243}
244 244
245asmlinkage void plat_irq_dispatch(void) 245asmlinkage void plat_irq_dispatch(void)
diff --git a/arch/mips/netlogic/common/reset.S b/arch/mips/netlogic/common/reset.S
index 701c4bcb9e47..edbab9b8691f 100644
--- a/arch/mips/netlogic/common/reset.S
+++ b/arch/mips/netlogic/common/reset.S
@@ -60,7 +60,7 @@
60 li t0, LSU_DEFEATURE 60 li t0, LSU_DEFEATURE
61 mfcr t1, t0 61 mfcr t1, t0
62 62
63 lui t2, 0xc080 /* SUE, Enable Unaligned Access, L2HPE */ 63 lui t2, 0x4080 /* Enable Unaligned Access, L2HPE */
64 or t1, t1, t2 64 or t1, t1, t2
65 mtcr t1, t0 65 mtcr t1, t0
66 66
@@ -235,6 +235,26 @@ EXPORT(nlm_boot_siblings)
235 mfc0 v0, CP0_EBASE, 1 235 mfc0 v0, CP0_EBASE, 1
236 andi v0, 0x3ff /* v0 <- node/core */ 236 andi v0, 0x3ff /* v0 <- node/core */
237 237
238 /*
239 * Errata: to avoid potential live lock, setup IFU_BRUB_RESERVE
240 * when running 4 threads per core
241 */
242 andi v1, v0, 0x3 /* v1 <- thread id */
243 bnez v1, 2f
244 nop
245
246 /* thread 0 of each core. */
247 li t0, CKSEG1ADDR(RESET_DATA_PHYS)
248 lw t1, BOOT_THREAD_MODE(t0) /* t1 <- thread mode */
249 subu t1, 0x3 /* 4-thread per core mode? */
250 bnez t1, 2f
251 nop
252
253 li t0, IFU_BRUB_RESERVE
254 li t1, 0x55
255 mtcr t1, t0
256 _ehb
2572:
238 beqz v0, 4f /* boot cpu (cpuid == 0)? */ 258 beqz v0, 4f /* boot cpu (cpuid == 0)? */
239 nop 259 nop
240 260
diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c
index e743bdd6e20c..dc3e327fbbac 100644
--- a/arch/mips/netlogic/common/smp.c
+++ b/arch/mips/netlogic/common/smp.c
@@ -59,17 +59,17 @@
59 59
60void nlm_send_ipi_single(int logical_cpu, unsigned int action) 60void nlm_send_ipi_single(int logical_cpu, unsigned int action)
61{ 61{
62 int cpu, node; 62 unsigned int hwtid;
63 uint64_t picbase; 63 uint64_t picbase;
64 64
65 cpu = cpu_logical_map(logical_cpu); 65 /* node id is part of hwtid, and needed for send_ipi */
66 node = nlm_cpuid_to_node(cpu); 66 hwtid = cpu_logical_map(logical_cpu);
67 picbase = nlm_get_node(node)->picbase; 67 picbase = nlm_get_node(nlm_hwtid_to_node(hwtid))->picbase;
68 68
69 if (action & SMP_CALL_FUNCTION) 69 if (action & SMP_CALL_FUNCTION)
70 nlm_pic_send_ipi(picbase, cpu, IRQ_IPI_SMP_FUNCTION, 0); 70 nlm_pic_send_ipi(picbase, hwtid, IRQ_IPI_SMP_FUNCTION, 0);
71 if (action & SMP_RESCHEDULE_YOURSELF) 71 if (action & SMP_RESCHEDULE_YOURSELF)
72 nlm_pic_send_ipi(picbase, cpu, IRQ_IPI_SMP_RESCHEDULE, 0); 72 nlm_pic_send_ipi(picbase, hwtid, IRQ_IPI_SMP_RESCHEDULE, 0);
73} 73}
74 74
75void nlm_send_ipi_mask(const struct cpumask *mask, unsigned int action) 75void nlm_send_ipi_mask(const struct cpumask *mask, unsigned int action)
@@ -120,6 +120,7 @@ static void nlm_init_secondary(void)
120 120
121 hwtid = hard_smp_processor_id(); 121 hwtid = hard_smp_processor_id();
122 current_cpu_data.core = hwtid / NLM_THREADS_PER_CORE; 122 current_cpu_data.core = hwtid / NLM_THREADS_PER_CORE;
123 current_cpu_data.package = nlm_nodeid();
123 nlm_percpu_init(hwtid); 124 nlm_percpu_init(hwtid);
124 nlm_smp_irq_init(hwtid); 125 nlm_smp_irq_init(hwtid);
125} 126}
@@ -145,16 +146,18 @@ static cpumask_t phys_cpu_present_mask;
145 146
146void nlm_boot_secondary(int logical_cpu, struct task_struct *idle) 147void nlm_boot_secondary(int logical_cpu, struct task_struct *idle)
147{ 148{
148 int cpu, node; 149 uint64_t picbase;
150 int hwtid;
151
152 hwtid = cpu_logical_map(logical_cpu);
153 picbase = nlm_get_node(nlm_hwtid_to_node(hwtid))->picbase;
149 154
150 cpu = cpu_logical_map(logical_cpu);
151 node = nlm_cpuid_to_node(logical_cpu);
152 nlm_next_sp = (unsigned long)__KSTK_TOS(idle); 155 nlm_next_sp = (unsigned long)__KSTK_TOS(idle);
153 nlm_next_gp = (unsigned long)task_thread_info(idle); 156 nlm_next_gp = (unsigned long)task_thread_info(idle);
154 157
155 /* barrier for sp/gp store above */ 158 /* barrier for sp/gp store above */
156 __sync(); 159 __sync();
157 nlm_pic_send_ipi(nlm_get_node(node)->picbase, cpu, 1, 1); /* NMI */ 160 nlm_pic_send_ipi(picbase, hwtid, 1, 1); /* NMI */
158} 161}
159 162
160void __init nlm_smp_setup(void) 163void __init nlm_smp_setup(void)
@@ -182,7 +185,7 @@ void __init nlm_smp_setup(void)
182 __cpu_number_map[i] = num_cpus; 185 __cpu_number_map[i] = num_cpus;
183 __cpu_logical_map[num_cpus] = i; 186 __cpu_logical_map[num_cpus] = i;
184 set_cpu_possible(num_cpus, true); 187 set_cpu_possible(num_cpus, true);
185 node = nlm_cpuid_to_node(i); 188 node = nlm_hwtid_to_node(i);
186 cpumask_set_cpu(num_cpus, &nlm_get_node(node)->cpumask); 189 cpumask_set_cpu(num_cpus, &nlm_get_node(node)->cpumask);
187 ++num_cpus; 190 ++num_cpus;
188 } 191 }
diff --git a/arch/mips/netlogic/common/time.c b/arch/mips/netlogic/common/time.c
index 0c0a1a606f73..5873c83e65be 100644
--- a/arch/mips/netlogic/common/time.c
+++ b/arch/mips/netlogic/common/time.c
@@ -40,7 +40,6 @@
40#include <asm/netlogic/interrupt.h> 40#include <asm/netlogic/interrupt.h>
41#include <asm/netlogic/common.h> 41#include <asm/netlogic/common.h>
42#include <asm/netlogic/haldefs.h> 42#include <asm/netlogic/haldefs.h>
43#include <asm/netlogic/common.h>
44 43
45#if defined(CONFIG_CPU_XLP) 44#if defined(CONFIG_CPU_XLP)
46#include <asm/netlogic/xlp-hal/iomap.h> 45#include <asm/netlogic/xlp-hal/iomap.h>
diff --git a/arch/mips/netlogic/xlp/ahci-init-xlp2.c b/arch/mips/netlogic/xlp/ahci-init-xlp2.c
index c83dbf3689e2..7b066a44e679 100644
--- a/arch/mips/netlogic/xlp/ahci-init-xlp2.c
+++ b/arch/mips/netlogic/xlp/ahci-init-xlp2.c
@@ -203,6 +203,7 @@ static u8 read_phy_reg(u64 regbase, u32 addr, u32 physel)
203static void config_sata_phy(u64 regbase) 203static void config_sata_phy(u64 regbase)
204{ 204{
205 u32 port, i, reg; 205 u32 port, i, reg;
206 u8 val;
206 207
207 for (port = 0; port < 2; port++) { 208 for (port = 0; port < 2; port++) {
208 for (i = 0, reg = RXCDRCALFOSC0; reg <= CALDUTY; reg++, i++) 209 for (i = 0, reg = RXCDRCALFOSC0; reg <= CALDUTY; reg++, i++)
@@ -210,6 +211,18 @@ static void config_sata_phy(u64 regbase)
210 211
211 for (i = 0, reg = RXDPIF; reg <= PPMDRIFTMAX_HI; reg++, i++) 212 for (i = 0, reg = RXDPIF; reg <= PPMDRIFTMAX_HI; reg++, i++)
212 write_phy_reg(regbase, reg, port, sata_phy_config2[i]); 213 write_phy_reg(regbase, reg, port, sata_phy_config2[i]);
214
215 /* Fix for PHY link up failures at lower temperatures */
216 write_phy_reg(regbase, 0x800F, port, 0x1f);
217
218 val = read_phy_reg(regbase, 0x0029, port);
219 write_phy_reg(regbase, 0x0029, port, val | (0x7 << 1));
220
221 val = read_phy_reg(regbase, 0x0056, port);
222 write_phy_reg(regbase, 0x0056, port, val & ~(1 << 3));
223
224 val = read_phy_reg(regbase, 0x0018, port);
225 write_phy_reg(regbase, 0x0018, port, val & ~(0x7 << 0));
213 } 226 }
214} 227}
215 228
diff --git a/arch/mips/netlogic/xlp/ahci-init.c b/arch/mips/netlogic/xlp/ahci-init.c
index a9d0fae02103..92be1a3258b1 100644
--- a/arch/mips/netlogic/xlp/ahci-init.c
+++ b/arch/mips/netlogic/xlp/ahci-init.c
@@ -151,7 +151,7 @@ static void nlm_sata_firmware_init(int node)
151static int __init nlm_ahci_init(void) 151static int __init nlm_ahci_init(void)
152{ 152{
153 int node = 0; 153 int node = 0;
154 int chip = read_c0_prid() & PRID_REV_MASK; 154 int chip = read_c0_prid() & PRID_IMP_MASK;
155 155
156 if (chip == PRID_IMP_NETLOGIC_XLP3XX) 156 if (chip == PRID_IMP_NETLOGIC_XLP3XX)
157 nlm_sata_firmware_init(node); 157 nlm_sata_firmware_init(node);
diff --git a/arch/mips/netlogic/xlp/dt.c b/arch/mips/netlogic/xlp/dt.c
index 7cc46032b28e..a625bdb6d6aa 100644
--- a/arch/mips/netlogic/xlp/dt.c
+++ b/arch/mips/netlogic/xlp/dt.c
@@ -41,17 +41,21 @@
41 41
42#include <asm/prom.h> 42#include <asm/prom.h>
43 43
44extern u32 __dtb_xlp_evp_begin[], __dtb_xlp_svp_begin[], 44extern u32 __dtb_xlp_evp_begin[], __dtb_xlp_svp_begin[], __dtb_xlp_fvp_begin[],
45 __dtb_xlp_fvp_begin[], __dtb_xlp_gvp_begin[]; 45 __dtb_xlp_gvp_begin[], __dtb_xlp_rvp_begin[];
46static void *xlp_fdt_blob; 46static void *xlp_fdt_blob;
47 47
48void __init *xlp_dt_init(void *fdtp) 48void __init *xlp_dt_init(void *fdtp)
49{ 49{
50 if (!fdtp) { 50 if (!fdtp) {
51 switch (current_cpu_data.processor_id & PRID_IMP_MASK) { 51 switch (current_cpu_data.processor_id & PRID_IMP_MASK) {
52#ifdef CONFIG_DT_XLP_RVP
53 case PRID_IMP_NETLOGIC_XLP5XX:
54 fdtp = __dtb_xlp_rvp_begin;
55 break;
56#endif
52#ifdef CONFIG_DT_XLP_GVP 57#ifdef CONFIG_DT_XLP_GVP
53 case PRID_IMP_NETLOGIC_XLP9XX: 58 case PRID_IMP_NETLOGIC_XLP9XX:
54 case PRID_IMP_NETLOGIC_XLP5XX:
55 fdtp = __dtb_xlp_gvp_begin; 59 fdtp = __dtb_xlp_gvp_begin;
56 break; 60 break;
57#endif 61#endif
diff --git a/arch/mips/netlogic/xlp/nlm_hal.c b/arch/mips/netlogic/xlp/nlm_hal.c
index bc24beb3a426..a8f4144a0297 100644
--- a/arch/mips/netlogic/xlp/nlm_hal.c
+++ b/arch/mips/netlogic/xlp/nlm_hal.c
@@ -71,10 +71,20 @@ static int xlp9xx_irq_to_irt(int irq)
71 switch (irq) { 71 switch (irq) {
72 case PIC_GPIO_IRQ: 72 case PIC_GPIO_IRQ:
73 return 12; 73 return 12;
74 case PIC_I2C_0_IRQ:
75 return 125;
76 case PIC_I2C_1_IRQ:
77 return 126;
78 case PIC_I2C_2_IRQ:
79 return 127;
80 case PIC_I2C_3_IRQ:
81 return 128;
74 case PIC_9XX_XHCI_0_IRQ: 82 case PIC_9XX_XHCI_0_IRQ:
75 return 114; 83 return 114;
76 case PIC_9XX_XHCI_1_IRQ: 84 case PIC_9XX_XHCI_1_IRQ:
77 return 115; 85 return 115;
86 case PIC_9XX_XHCI_2_IRQ:
87 return 116;
78 case PIC_UART_0_IRQ: 88 case PIC_UART_0_IRQ:
79 return 133; 89 return 133;
80 case PIC_UART_1_IRQ: 90 case PIC_UART_1_IRQ:
@@ -170,16 +180,23 @@ static int xlp_irq_to_irt(int irq)
170 } 180 }
171 181
172 if (devoff != 0) { 182 if (devoff != 0) {
183 uint32_t val;
184
173 pcibase = nlm_pcicfg_base(devoff); 185 pcibase = nlm_pcicfg_base(devoff);
174 irt = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG) & 0xffff; 186 val = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG);
175 /* HW weirdness, I2C IRT entry has to be fixed up */ 187 if (val == 0xffffffff) {
176 switch (irq) { 188 irt = -1;
177 case PIC_I2C_1_IRQ: 189 } else {
178 irt = irt + 1; break; 190 irt = val & 0xffff;
179 case PIC_I2C_2_IRQ: 191 /* HW weirdness, I2C IRT entry has to be fixed up */
180 irt = irt + 2; break; 192 switch (irq) {
181 case PIC_I2C_3_IRQ: 193 case PIC_I2C_1_IRQ:
182 irt = irt + 3; break; 194 irt = irt + 1; break;
195 case PIC_I2C_2_IRQ:
196 irt = irt + 2; break;
197 case PIC_I2C_3_IRQ:
198 irt = irt + 3; break;
199 }
183 } 200 }
184 } else if (irq >= PIC_PCIE_LINK_LEGACY_IRQ(0) && 201 } else if (irq >= PIC_PCIE_LINK_LEGACY_IRQ(0) &&
185 irq <= PIC_PCIE_LINK_LEGACY_IRQ(3)) { 202 irq <= PIC_PCIE_LINK_LEGACY_IRQ(3)) {
@@ -325,7 +342,7 @@ static unsigned int nlm_xlp2_get_pic_frequency(int node)
325 /* Find the clock source PLL device for PIC */ 342 /* Find the clock source PLL device for PIC */
326 if (cpu_xlp9xx) { 343 if (cpu_xlp9xx) {
327 reg_select = nlm_read_sys_reg(clockbase, 344 reg_select = nlm_read_sys_reg(clockbase,
328 SYS_9XX_CLK_DEV_SEL) & 0x3; 345 SYS_9XX_CLK_DEV_SEL_REG) & 0x3;
329 switch (reg_select) { 346 switch (reg_select) {
330 case 0: 347 case 0:
331 ctrl_val0 = nlm_read_sys_reg(clockbase, 348 ctrl_val0 = nlm_read_sys_reg(clockbase,
@@ -354,7 +371,7 @@ static unsigned int nlm_xlp2_get_pic_frequency(int node)
354 } 371 }
355 } else { 372 } else {
356 reg_select = (nlm_read_sys_reg(sysbase, 373 reg_select = (nlm_read_sys_reg(sysbase,
357 SYS_CLK_DEV_SEL) >> 22) & 0x3; 374 SYS_CLK_DEV_SEL_REG) >> 22) & 0x3;
358 switch (reg_select) { 375 switch (reg_select) {
359 case 0: 376 case 0:
360 ctrl_val0 = nlm_read_sys_reg(sysbase, 377 ctrl_val0 = nlm_read_sys_reg(sysbase,
@@ -410,7 +427,7 @@ static unsigned int nlm_xlp2_get_pic_frequency(int node)
410 427
411 fdiv = fdiv/(1 << 13); 428 fdiv = fdiv/(1 << 13);
412 pll_out_freq_num = ((ref_clk >> 1) * (6 + mdiv)) + fdiv; 429 pll_out_freq_num = ((ref_clk >> 1) * (6 + mdiv)) + fdiv;
413 pll_out_freq_den = (1 << vco_post_div) * pll_post_div * 3; 430 pll_out_freq_den = (1 << vco_post_div) * pll_post_div * ref_div;
414 431
415 if (pll_out_freq_den > 0) 432 if (pll_out_freq_den > 0)
416 do_div(pll_out_freq_num, pll_out_freq_den); 433 do_div(pll_out_freq_num, pll_out_freq_den);
@@ -418,10 +435,10 @@ static unsigned int nlm_xlp2_get_pic_frequency(int node)
418 /* PIC post divider, which happens after PLL */ 435 /* PIC post divider, which happens after PLL */
419 if (cpu_xlp9xx) 436 if (cpu_xlp9xx)
420 pic_div = nlm_read_sys_reg(clockbase, 437 pic_div = nlm_read_sys_reg(clockbase,
421 SYS_9XX_CLK_DEV_DIV) & 0x3; 438 SYS_9XX_CLK_DEV_DIV_REG) & 0x3;
422 else 439 else
423 pic_div = (nlm_read_sys_reg(sysbase, 440 pic_div = (nlm_read_sys_reg(sysbase,
424 SYS_CLK_DEV_DIV) >> 22) & 0x3; 441 SYS_CLK_DEV_DIV_REG) >> 22) & 0x3;
425 do_div(pll_out_freq_num, 1 << pic_div); 442 do_div(pll_out_freq_num, 1 << pic_div);
426 443
427 return pll_out_freq_num; 444 return pll_out_freq_num;
@@ -442,19 +459,21 @@ unsigned int nlm_get_cpu_frequency(void)
442 459
443/* 460/*
444 * Fills upto 8 pairs of entries containing the DRAM map of a node 461 * Fills upto 8 pairs of entries containing the DRAM map of a node
445 * if n < 0, get dram map for all nodes 462 * if node < 0, get dram map for all nodes
446 */ 463 */
447int xlp_get_dram_map(int n, uint64_t *dram_map) 464int nlm_get_dram_map(int node, uint64_t *dram_map, int nentries)
448{ 465{
449 uint64_t bridgebase, base, lim; 466 uint64_t bridgebase, base, lim;
450 uint32_t val; 467 uint32_t val;
451 unsigned int barreg, limreg, xlatreg; 468 unsigned int barreg, limreg, xlatreg;
452 int i, node, rv; 469 int i, n, rv;
453 470
454 /* Look only at mapping on Node 0, we don't handle crazy configs */ 471 /* Look only at mapping on Node 0, we don't handle crazy configs */
455 bridgebase = nlm_get_bridge_regbase(0); 472 bridgebase = nlm_get_bridge_regbase(0);
456 rv = 0; 473 rv = 0;
457 for (i = 0; i < 8; i++) { 474 for (i = 0; i < 8; i++) {
475 if (rv + 1 >= nentries)
476 break;
458 if (cpu_is_xlp9xx()) { 477 if (cpu_is_xlp9xx()) {
459 barreg = BRIDGE_9XX_DRAM_BAR(i); 478 barreg = BRIDGE_9XX_DRAM_BAR(i);
460 limreg = BRIDGE_9XX_DRAM_LIMIT(i); 479 limreg = BRIDGE_9XX_DRAM_LIMIT(i);
@@ -464,10 +483,10 @@ int xlp_get_dram_map(int n, uint64_t *dram_map)
464 limreg = BRIDGE_DRAM_LIMIT(i); 483 limreg = BRIDGE_DRAM_LIMIT(i);
465 xlatreg = BRIDGE_DRAM_NODE_TRANSLN(i); 484 xlatreg = BRIDGE_DRAM_NODE_TRANSLN(i);
466 } 485 }
467 if (n >= 0) { 486 if (node >= 0) {
468 /* node specified, get node mapping of BAR */ 487 /* node specified, get node mapping of BAR */
469 val = nlm_read_bridge_reg(bridgebase, xlatreg); 488 val = nlm_read_bridge_reg(bridgebase, xlatreg);
470 node = (val >> 1) & 0x3; 489 n = (val >> 1) & 0x3;
471 if (n != node) 490 if (n != node)
472 continue; 491 continue;
473 } 492 }
diff --git a/arch/mips/netlogic/xlp/setup.c b/arch/mips/netlogic/xlp/setup.c
index 4fdd9fd29d1d..f743fd9da323 100644
--- a/arch/mips/netlogic/xlp/setup.c
+++ b/arch/mips/netlogic/xlp/setup.c
@@ -51,7 +51,6 @@ uint64_t nlm_io_base;
51struct nlm_soc_info nlm_nodes[NLM_NR_NODES]; 51struct nlm_soc_info nlm_nodes[NLM_NR_NODES];
52cpumask_t nlm_cpumask = CPU_MASK_CPU0; 52cpumask_t nlm_cpumask = CPU_MASK_CPU0;
53unsigned int nlm_threads_per_core; 53unsigned int nlm_threads_per_core;
54unsigned int xlp_cores_per_node;
55 54
56static void nlm_linux_exit(void) 55static void nlm_linux_exit(void)
57{ 56{
@@ -82,7 +81,7 @@ static void __init xlp_init_mem_from_bars(void)
82 uint64_t map[16]; 81 uint64_t map[16];
83 int i, n; 82 int i, n;
84 83
85 n = xlp_get_dram_map(-1, map); /* -1: info for all nodes */ 84 n = nlm_get_dram_map(-1, map, ARRAY_SIZE(map)); /* -1 : all nodes */
86 for (i = 0; i < n; i += 2) { 85 for (i = 0; i < n; i += 2) {
87 /* exclude 0x1000_0000-0x2000_0000, u-boot device */ 86 /* exclude 0x1000_0000-0x2000_0000, u-boot device */
88 if (map[i] <= 0x10000000 && map[i+1] > 0x10000000) 87 if (map[i] <= 0x10000000 && map[i+1] > 0x10000000)
@@ -163,10 +162,6 @@ void __init prom_init(void)
163 void *reset_vec; 162 void *reset_vec;
164 163
165 nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE); 164 nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
166 if (cpu_is_xlp9xx())
167 xlp_cores_per_node = 32;
168 else
169 xlp_cores_per_node = 8;
170 nlm_init_boot_cpu(); 165 nlm_init_boot_cpu();
171 xlp_mmu_init(); 166 xlp_mmu_init();
172 nlm_node_init(0); 167 nlm_node_init(0);
diff --git a/arch/mips/netlogic/xlp/usb-init-xlp2.c b/arch/mips/netlogic/xlp/usb-init-xlp2.c
index 17ade1ce5dfd..2524939a5e3a 100644
--- a/arch/mips/netlogic/xlp/usb-init-xlp2.c
+++ b/arch/mips/netlogic/xlp/usb-init-xlp2.c
@@ -128,6 +128,9 @@ static void xlp9xx_usb_ack(struct irq_data *data)
128 case PIC_9XX_XHCI_1_IRQ: 128 case PIC_9XX_XHCI_1_IRQ:
129 port_addr = nlm_xlpii_get_usb_regbase(node, 2); 129 port_addr = nlm_xlpii_get_usb_regbase(node, 2);
130 break; 130 break;
131 case PIC_9XX_XHCI_2_IRQ:
132 port_addr = nlm_xlpii_get_usb_regbase(node, 3);
133 break;
131 default: 134 default:
132 pr_err("No matching USB irq %d node %d!\n", irq, node); 135 pr_err("No matching USB irq %d node %d!\n", irq, node);
133 return; 136 return;
@@ -222,14 +225,16 @@ static int __init nlm_platform_xlpii_usb_init(void)
222 } 225 }
223 226
224 /* XLP 9XX, multi-node */ 227 /* XLP 9XX, multi-node */
225 pr_info("Initializing 9XX USB Interface\n"); 228 pr_info("Initializing 9XX/5XX USB Interface\n");
226 for (node = 0; node < NLM_NR_NODES; node++) { 229 for (node = 0; node < NLM_NR_NODES; node++) {
227 if (!nlm_node_present(node)) 230 if (!nlm_node_present(node))
228 continue; 231 continue;
229 nlm_xlpii_usb_hw_reset(node, 1); 232 nlm_xlpii_usb_hw_reset(node, 1);
230 nlm_xlpii_usb_hw_reset(node, 2); 233 nlm_xlpii_usb_hw_reset(node, 2);
234 nlm_xlpii_usb_hw_reset(node, 3);
231 nlm_set_pic_extra_ack(node, PIC_9XX_XHCI_0_IRQ, xlp9xx_usb_ack); 235 nlm_set_pic_extra_ack(node, PIC_9XX_XHCI_0_IRQ, xlp9xx_usb_ack);
232 nlm_set_pic_extra_ack(node, PIC_9XX_XHCI_1_IRQ, xlp9xx_usb_ack); 236 nlm_set_pic_extra_ack(node, PIC_9XX_XHCI_1_IRQ, xlp9xx_usb_ack);
237 nlm_set_pic_extra_ack(node, PIC_9XX_XHCI_2_IRQ, xlp9xx_usb_ack);
233 } 238 }
234 return 0; 239 return 0;
235} 240}
@@ -253,6 +258,9 @@ static void nlm_xlp9xx_usb_fixup_final(struct pci_dev *dev)
253 case 0x22: 258 case 0x22:
254 dev->irq = nlm_irq_to_xirq(node, PIC_9XX_XHCI_1_IRQ); 259 dev->irq = nlm_irq_to_xirq(node, PIC_9XX_XHCI_1_IRQ);
255 break; 260 break;
261 case 0x23:
262 dev->irq = nlm_irq_to_xirq(node, PIC_9XX_XHCI_2_IRQ);
263 break;
256 } 264 }
257} 265}
258 266
diff --git a/arch/mips/netlogic/xlp/wakeup.c b/arch/mips/netlogic/xlp/wakeup.c
index e5f44d2605a8..87d7846af2d0 100644
--- a/arch/mips/netlogic/xlp/wakeup.c
+++ b/arch/mips/netlogic/xlp/wakeup.c
@@ -99,7 +99,7 @@ static int wait_for_cpus(int cpu, int bootcpu)
99 do { 99 do {
100 notready = nlm_threads_per_core; 100 notready = nlm_threads_per_core;
101 for (i = 0; i < nlm_threads_per_core; i++) 101 for (i = 0; i < nlm_threads_per_core; i++)
102 if (cpu_ready[cpu + i] || cpu == bootcpu) 102 if (cpu_ready[cpu + i] || (cpu + i) == bootcpu)
103 --notready; 103 --notready;
104 } while (notready != 0 && --count > 0); 104 } while (notready != 0 && --count > 0);
105 105
@@ -111,7 +111,7 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask)
111 struct nlm_soc_info *nodep; 111 struct nlm_soc_info *nodep;
112 uint64_t syspcibase, fusebase; 112 uint64_t syspcibase, fusebase;
113 uint32_t syscoremask, mask, fusemask; 113 uint32_t syscoremask, mask, fusemask;
114 int core, n, cpu; 114 int core, n, cpu, ncores;
115 115
116 for (n = 0; n < NLM_NR_NODES; n++) { 116 for (n = 0; n < NLM_NR_NODES; n++) {
117 if (n != 0) { 117 if (n != 0) {
@@ -168,7 +168,8 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask)
168 syscoremask = (1 << hweight32(~fusemask & mask)) - 1; 168 syscoremask = (1 << hweight32(~fusemask & mask)) - 1;
169 169
170 pr_info("Node %d - SYS/FUSE coremask %x\n", n, syscoremask); 170 pr_info("Node %d - SYS/FUSE coremask %x\n", n, syscoremask);
171 for (core = 0; core < nlm_cores_per_node(); core++) { 171 ncores = nlm_cores_per_node();
172 for (core = 0; core < ncores; core++) {
172 /* we will be on node 0 core 0 */ 173 /* we will be on node 0 core 0 */
173 if (n == 0 && core == 0) 174 if (n == 0 && core == 0)
174 continue; 175 continue;
@@ -178,8 +179,7 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask)
178 continue; 179 continue;
179 180
180 /* see if at least the first hw thread is enabled */ 181 /* see if at least the first hw thread is enabled */
181 cpu = (n * nlm_cores_per_node() + core) 182 cpu = (n * ncores + core) * NLM_THREADS_PER_CORE;
182 * NLM_THREADS_PER_CORE;
183 if (!cpumask_test_cpu(cpu, wakeup_mask)) 183 if (!cpumask_test_cpu(cpu, wakeup_mask))
184 continue; 184 continue;
185 185
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index a26cbe372e06..81f58958cf08 100644
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -98,6 +98,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
98 case CPU_R10000: 98 case CPU_R10000:
99 case CPU_R12000: 99 case CPU_R12000:
100 case CPU_R14000: 100 case CPU_R14000:
101 case CPU_R16000:
101 case CPU_XLR: 102 case CPU_XLR:
102 lmodel = &op_model_mipsxx_ops; 103 lmodel = &op_model_mipsxx_ops;
103 break; 104 break;
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 01f721a85c5b..6a6e2cc55b89 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -246,7 +246,7 @@ static int mipsxx_perfcount_handler(void)
246 unsigned int counter; 246 unsigned int counter;
247 int handled = IRQ_NONE; 247 int handled = IRQ_NONE;
248 248
249 if (cpu_has_mips_r2 && !(read_c0_cause() & (1 << 26))) 249 if (cpu_has_mips_r2 && !(read_c0_cause() & CAUSEF_PCI))
250 return handled; 250 return handled;
251 251
252 switch (counters) { 252 switch (counters) {
@@ -296,6 +296,7 @@ static inline int n_counters(void)
296 296
297 case CPU_R12000: 297 case CPU_R12000:
298 case CPU_R14000: 298 case CPU_R14000:
299 case CPU_R16000:
299 counters = 4; 300 counters = 4;
300 break; 301 break;
301 302
@@ -411,6 +412,10 @@ static int __init mipsxx_init(void)
411 op_model_mipsxx_ops.cpu_type = "mips/r12000"; 412 op_model_mipsxx_ops.cpu_type = "mips/r12000";
412 break; 413 break;
413 414
415 case CPU_R16000:
416 op_model_mipsxx_ops.cpu_type = "mips/r16000";
417 break;
418
414 case CPU_SB1: 419 case CPU_SB1:
415 case CPU_SB1A: 420 case CPU_SB1A:
416 op_model_mipsxx_ops.cpu_type = "mips/sb1"; 421 op_model_mipsxx_ops.cpu_type = "mips/sb1";
@@ -435,15 +440,17 @@ static int __init mipsxx_init(void)
435 440
436 if (get_c0_perfcount_int) 441 if (get_c0_perfcount_int)
437 perfcount_irq = get_c0_perfcount_int(); 442 perfcount_irq = get_c0_perfcount_int();
438 else if ((cp0_perfcount_irq >= 0) && 443 else if (cp0_perfcount_irq >= 0)
439 (cp0_compare_irq != cp0_perfcount_irq))
440 perfcount_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq; 444 perfcount_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
441 else 445 else
442 perfcount_irq = -1; 446 perfcount_irq = -1;
443 447
444 if (perfcount_irq >= 0) 448 if (perfcount_irq >= 0)
445 return request_irq(perfcount_irq, mipsxx_perfcount_int, 449 return request_irq(perfcount_irq, mipsxx_perfcount_int,
446 0, "Perfcounter", save_perf_irq); 450 IRQF_PERCPU | IRQF_NOBALANCING |
451 IRQF_NO_THREAD | IRQF_NO_SUSPEND |
452 IRQF_SHARED,
453 "Perfcounter", save_perf_irq);
447 454
448 return 0; 455 return 0;
449} 456}
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 300591c6278d..2eda01e6e08f 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -43,7 +43,7 @@ obj-$(CONFIG_SIBYTE_BCM1x80) += pci-bcm1480.o pci-bcm1480ht.o
43obj-$(CONFIG_SNI_RM) += fixup-sni.o ops-sni.o 43obj-$(CONFIG_SNI_RM) += fixup-sni.o ops-sni.o
44obj-$(CONFIG_LANTIQ) += fixup-lantiq.o 44obj-$(CONFIG_LANTIQ) += fixup-lantiq.o
45obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o ops-lantiq.o 45obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o ops-lantiq.o
46obj-$(CONFIG_SOC_RT2880) += pci-rt2880.o 46obj-$(CONFIG_SOC_RT288X) += pci-rt2880.o
47obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o 47obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o
48obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o 48obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
49obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o 49obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
diff --git a/arch/mips/pci/msi-xlp.c b/arch/mips/pci/msi-xlp.c
index 6a40f24c91b4..3407495fcbe2 100644
--- a/arch/mips/pci/msi-xlp.c
+++ b/arch/mips/pci/msi-xlp.c
@@ -178,13 +178,6 @@ static void xlp_msi_mask_ack(struct irq_data *d)
178 else 178 else
179 nlm_write_reg(md->lnkbase, PCIE_MSI_STATUS, 1u << vec); 179 nlm_write_reg(md->lnkbase, PCIE_MSI_STATUS, 1u << vec);
180 180
181 /* Ack at eirr and PIC */
182 ack_c0_eirr(PIC_PCIE_LINK_MSI_IRQ(link));
183 if (cpu_is_xlp9xx())
184 nlm_pic_ack(md->node->picbase,
185 PIC_9XX_IRT_PCIE_LINK_INDEX(link));
186 else
187 nlm_pic_ack(md->node->picbase, PIC_IRT_PCIE_LINK_INDEX(link));
188} 181}
189 182
190static struct irq_chip xlp_msi_chip = { 183static struct irq_chip xlp_msi_chip = {
@@ -230,8 +223,6 @@ static void xlp_msix_mask_ack(struct irq_data *d)
230 } 223 }
231 nlm_write_reg(md->lnkbase, status_reg, 1u << bit); 224 nlm_write_reg(md->lnkbase, status_reg, 1u << bit);
232 225
233 /* Ack at eirr and PIC */
234 ack_c0_eirr(PIC_PCIE_MSIX_IRQ(link));
235 if (!cpu_is_xlp9xx()) 226 if (!cpu_is_xlp9xx())
236 nlm_pic_ack(md->node->picbase, 227 nlm_pic_ack(md->node->picbase,
237 PIC_IRT_PCIE_MSIX_INDEX(msixvec)); 228 PIC_IRT_PCIE_MSIX_INDEX(msixvec));
@@ -541,6 +532,14 @@ void nlm_dispatch_msi(int node, int lirq)
541 do_IRQ(irqbase + i); 532 do_IRQ(irqbase + i);
542 status &= status - 1; 533 status &= status - 1;
543 } 534 }
535
536 /* Ack at eirr and PIC */
537 ack_c0_eirr(PIC_PCIE_LINK_MSI_IRQ(link));
538 if (cpu_is_xlp9xx())
539 nlm_pic_ack(md->node->picbase,
540 PIC_9XX_IRT_PCIE_LINK_INDEX(link));
541 else
542 nlm_pic_ack(md->node->picbase, PIC_IRT_PCIE_LINK_INDEX(link));
544} 543}
545 544
546void nlm_dispatch_msix(int node, int lirq) 545void nlm_dispatch_msix(int node, int lirq)
@@ -567,4 +566,6 @@ void nlm_dispatch_msix(int node, int lirq)
567 do_IRQ(irqbase + i); 566 do_IRQ(irqbase + i);
568 status &= status - 1; 567 status &= status - 1;
569 } 568 }
569 /* Ack at eirr and PIC */
570 ack_c0_eirr(PIC_PCIE_MSIX_IRQ(link));
570} 571}
diff --git a/arch/mips/pci/pci-ar2315.c b/arch/mips/pci/pci-ar2315.c
index bd2b3b60da83..07a18228e63a 100644
--- a/arch/mips/pci/pci-ar2315.c
+++ b/arch/mips/pci/pci-ar2315.c
@@ -488,7 +488,6 @@ static struct platform_driver ar2315_pci_driver = {
488 .probe = ar2315_pci_probe, 488 .probe = ar2315_pci_probe,
489 .driver = { 489 .driver = {
490 .name = "ar2315-pci", 490 .name = "ar2315-pci",
491 .owner = THIS_MODULE,
492 }, 491 },
493}; 492};
494 493
diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c
index a04af55d89f1..c258cd406fbb 100644
--- a/arch/mips/pci/pci-octeon.c
+++ b/arch/mips/pci/pci-octeon.c
@@ -214,6 +214,8 @@ const char *octeon_get_pci_interrupts(void)
214 return "AAABAAAAAAAAAAAAAAAAAAAAAAAAAAAA"; 214 return "AAABAAAAAAAAAAAAAAAAAAAAAAAAAAAA";
215 case CVMX_BOARD_TYPE_BBGW_REF: 215 case CVMX_BOARD_TYPE_BBGW_REF:
216 return "AABCD"; 216 return "AABCD";
217 case CVMX_BOARD_TYPE_CUST_DSR1000N:
218 return "CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC";
217 case CVMX_BOARD_TYPE_THUNDER: 219 case CVMX_BOARD_TYPE_THUNDER:
218 case CVMX_BOARD_TYPE_EBH3000: 220 case CVMX_BOARD_TYPE_EBH3000:
219 default: 221 default:
@@ -271,9 +273,6 @@ static int octeon_read_config(struct pci_bus *bus, unsigned int devfn,
271 pci_addr.s.func = devfn & 0x7; 273 pci_addr.s.func = devfn & 0x7;
272 pci_addr.s.reg = reg; 274 pci_addr.s.reg = reg;
273 275
274#if PCI_CONFIG_SPACE_DELAY
275 udelay(PCI_CONFIG_SPACE_DELAY);
276#endif
277 switch (size) { 276 switch (size) {
278 case 4: 277 case 4:
279 *val = le32_to_cpu(cvmx_read64_uint32(pci_addr.u64)); 278 *val = le32_to_cpu(cvmx_read64_uint32(pci_addr.u64));
@@ -308,9 +307,6 @@ static int octeon_write_config(struct pci_bus *bus, unsigned int devfn,
308 pci_addr.s.func = devfn & 0x7; 307 pci_addr.s.func = devfn & 0x7;
309 pci_addr.s.reg = reg; 308 pci_addr.s.reg = reg;
310 309
311#if PCI_CONFIG_SPACE_DELAY
312 udelay(PCI_CONFIG_SPACE_DELAY);
313#endif
314 switch (size) { 310 switch (size) {
315 case 4: 311 case 4:
316 cvmx_write64_uint32(pci_addr.u64, cpu_to_le32(val)); 312 cvmx_write64_uint32(pci_addr.u64, cpu_to_le32(val));
diff --git a/arch/mips/pci/pci-rt2880.c b/arch/mips/pci/pci-rt2880.c
index a4574947e698..8a978022630b 100644
--- a/arch/mips/pci/pci-rt2880.c
+++ b/arch/mips/pci/pci-rt2880.c
@@ -267,7 +267,6 @@ static struct platform_driver rt288x_pci_driver = {
267 .probe = rt288x_pci_probe, 267 .probe = rt288x_pci_probe,
268 .driver = { 268 .driver = {
269 .name = "rt288x-pci", 269 .name = "rt288x-pci",
270 .owner = THIS_MODULE,
271 .of_match_table = rt288x_pci_match, 270 .of_match_table = rt288x_pci_match,
272 }, 271 },
273}; 272};
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 8bb13a4af68a..b8a0bf5766f2 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -91,7 +91,10 @@ static void pcibios_scanbus(struct pci_controller *hose)
91 91
92 pci_add_resource_offset(&resources, 92 pci_add_resource_offset(&resources,
93 hose->mem_resource, hose->mem_offset); 93 hose->mem_resource, hose->mem_offset);
94 pci_add_resource_offset(&resources, hose->io_resource, hose->io_offset); 94 pci_add_resource_offset(&resources,
95 hose->io_resource, hose->io_offset);
96 pci_add_resource_offset(&resources,
97 hose->busn_resource, hose->busn_offset);
95 bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose, 98 bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
96 &resources); 99 &resources);
97 hose->bus = bus; 100 hose->bus = bus;
diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c
index 1bb0b2bf8d6e..99f3db4f0a9b 100644
--- a/arch/mips/pci/pcie-octeon.c
+++ b/arch/mips/pci/pcie-octeon.c
@@ -1762,14 +1762,6 @@ static int octeon_pcie_write_config(unsigned int pcie_port, struct pci_bus *bus,
1762 default: 1762 default:
1763 return PCIBIOS_FUNC_NOT_SUPPORTED; 1763 return PCIBIOS_FUNC_NOT_SUPPORTED;
1764 } 1764 }
1765#if PCI_CONFIG_SPACE_DELAY
1766 /*
1767 * Delay on writes so that devices have time to come up. Some
1768 * bridges need this to allow time for the secondary busses to
1769 * work
1770 */
1771 udelay(PCI_CONFIG_SPACE_DELAY);
1772#endif
1773 return PCIBIOS_SUCCESSFUL; 1765 return PCIBIOS_SUCCESSFUL;
1774} 1766}
1775 1767
diff --git a/arch/mips/pistachio/Makefile b/arch/mips/pistachio/Makefile
new file mode 100644
index 000000000000..32189c6ebea5
--- /dev/null
+++ b/arch/mips/pistachio/Makefile
@@ -0,0 +1 @@
obj-y += init.o irq.o time.o
diff --git a/arch/mips/pistachio/Platform b/arch/mips/pistachio/Platform
new file mode 100644
index 000000000000..d80cd612df1f
--- /dev/null
+++ b/arch/mips/pistachio/Platform
@@ -0,0 +1,8 @@
1#
2# IMG Pistachio SoC
3#
4platform-$(CONFIG_MACH_PISTACHIO) += pistachio/
5cflags-$(CONFIG_MACH_PISTACHIO) += \
6 -I$(srctree)/arch/mips/include/asm/mach-pistachio
7load-$(CONFIG_MACH_PISTACHIO) += 0xffffffff80400000
8zload-$(CONFIG_MACH_PISTACHIO) += 0xffffffff81000000
diff --git a/arch/mips/pistachio/init.c b/arch/mips/pistachio/init.c
new file mode 100644
index 000000000000..d2dc836523a3
--- /dev/null
+++ b/arch/mips/pistachio/init.c
@@ -0,0 +1,131 @@
1/*
2 * Pistachio platform setup
3 *
4 * Copyright (C) 2014 Google, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/of_address.h>
14#include <linux/of_fdt.h>
15#include <linux/of_platform.h>
16
17#include <asm/cacheflush.h>
18#include <asm/dma-coherence.h>
19#include <asm/fw/fw.h>
20#include <asm/mips-boards/generic.h>
21#include <asm/mips-cm.h>
22#include <asm/mips-cpc.h>
23#include <asm/prom.h>
24#include <asm/smp-ops.h>
25#include <asm/traps.h>
26
27const char *get_system_type(void)
28{
29 return "IMG Pistachio SoC";
30}
31
32static void __init plat_setup_iocoherency(void)
33{
34 /*
35 * Kernel has been configured with software coherency
36 * but we might choose to turn it off and use hardware
37 * coherency instead.
38 */
39 if (mips_cm_numiocu() != 0) {
40 /* Nothing special needs to be done to enable coherency */
41 pr_info("CMP IOCU detected\n");
42 hw_coherentio = 1;
43 if (coherentio == 0)
44 pr_info("Hardware DMA cache coherency disabled\n");
45 else
46 pr_info("Hardware DMA cache coherency enabled\n");
47 } else {
48 if (coherentio == 1)
49 pr_info("Hardware DMA cache coherency unsupported, but enabled from command line!\n");
50 else
51 pr_info("Software DMA cache coherency enabled\n");
52 }
53}
54
55void __init plat_mem_setup(void)
56{
57 if (fw_arg0 != -2)
58 panic("Device-tree not present");
59
60 __dt_setup_arch((void *)fw_arg1);
61 strlcpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE);
62
63 plat_setup_iocoherency();
64}
65
66#define DEFAULT_CPC_BASE_ADDR 0x1bde0000
67
68phys_addr_t mips_cpc_default_phys_base(void)
69{
70 return DEFAULT_CPC_BASE_ADDR;
71}
72
73static void __init mips_nmi_setup(void)
74{
75 void *base;
76 extern char except_vec_nmi;
77
78 base = cpu_has_veic ?
79 (void *)(CAC_BASE + 0xa80) :
80 (void *)(CAC_BASE + 0x380);
81 memcpy(base, &except_vec_nmi, 0x80);
82 flush_icache_range((unsigned long)base,
83 (unsigned long)base + 0x80);
84}
85
86static void __init mips_ejtag_setup(void)
87{
88 void *base;
89 extern char except_vec_ejtag_debug;
90
91 base = cpu_has_veic ?
92 (void *)(CAC_BASE + 0xa00) :
93 (void *)(CAC_BASE + 0x300);
94 memcpy(base, &except_vec_ejtag_debug, 0x80);
95 flush_icache_range((unsigned long)base,
96 (unsigned long)base + 0x80);
97}
98
99void __init prom_init(void)
100{
101 board_nmi_handler_setup = mips_nmi_setup;
102 board_ejtag_handler_setup = mips_ejtag_setup;
103
104 mips_cm_probe();
105 mips_cpc_probe();
106 register_cps_smp_ops();
107}
108
109void __init prom_free_prom_memory(void)
110{
111}
112
113void __init device_tree_init(void)
114{
115 if (!initial_boot_params)
116 return;
117
118 unflatten_and_copy_device_tree();
119}
120
121static int __init plat_of_setup(void)
122{
123 if (!of_have_populated_dt())
124 panic("Device tree not present");
125
126 if (of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL))
127 panic("Failed to populate DT");
128
129 return 0;
130}
131arch_initcall(plat_of_setup);
diff --git a/arch/mips/pistachio/irq.c b/arch/mips/pistachio/irq.c
new file mode 100644
index 000000000000..0a6b24c24652
--- /dev/null
+++ b/arch/mips/pistachio/irq.c
@@ -0,0 +1,28 @@
1/*
2 * Pistachio IRQ setup
3 *
4 * Copyright (C) 2014 Google, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 */
10
11#include <linux/init.h>
12#include <linux/irqchip.h>
13#include <linux/irqchip/mips-gic.h>
14#include <linux/kernel.h>
15
16#include <asm/cpu-features.h>
17#include <asm/irq_cpu.h>
18
19void __init arch_init_irq(void)
20{
21 pr_info("EIC is %s\n", cpu_has_veic ? "on" : "off");
22 pr_info("VINT is %s\n", cpu_has_vint ? "on" : "off");
23
24 if (!cpu_has_veic)
25 mips_cpu_irq_init();
26
27 irqchip_init();
28}
diff --git a/arch/mips/pistachio/time.c b/arch/mips/pistachio/time.c
new file mode 100644
index 000000000000..67889fcea8aa
--- /dev/null
+++ b/arch/mips/pistachio/time.c
@@ -0,0 +1,52 @@
1/*
2 * Pistachio clocksource/timer setup
3 *
4 * Copyright (C) 2014 Google, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 */
10
11#include <linux/clk.h>
12#include <linux/clk-provider.h>
13#include <linux/clocksource.h>
14#include <linux/init.h>
15#include <linux/irqchip/mips-gic.h>
16#include <linux/of.h>
17
18#include <asm/time.h>
19
20unsigned int get_c0_compare_int(void)
21{
22 return gic_get_c0_compare_int();
23}
24
25int get_c0_perfcount_int(void)
26{
27 return gic_get_c0_perfcount_int();
28}
29
30void __init plat_time_init(void)
31{
32 struct device_node *np;
33 struct clk *clk;
34
35 of_clk_init(NULL);
36 clocksource_of_init();
37
38 np = of_get_cpu_node(0, NULL);
39 if (!np) {
40 pr_err("Failed to get CPU node\n");
41 return;
42 }
43
44 clk = of_clk_get(np, 0);
45 if (IS_ERR(clk)) {
46 pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
47 return;
48 }
49
50 mips_hpt_frequency = clk_get_rate(clk) / 2;
51 clk_put(clk);
52}
diff --git a/arch/mips/power/Makefile b/arch/mips/power/Makefile
index 73d56b87cb9b..70bd7883bc1b 100644
--- a/arch/mips/power/Makefile
+++ b/arch/mips/power/Makefile
@@ -1 +1 @@
obj-$(CONFIG_HIBERNATION) += cpu.o hibernate.o obj-$(CONFIG_HIBERNATION) += cpu.o hibernate.o hibernate_asm.o
diff --git a/arch/mips/power/hibernate.c b/arch/mips/power/hibernate.c
new file mode 100644
index 000000000000..19a9af68bcdb
--- /dev/null
+++ b/arch/mips/power/hibernate.c
@@ -0,0 +1,10 @@
1#include <asm/tlbflush.h>
2
3extern int restore_image(void);
4
5int swsusp_arch_resume(void)
6{
7 /* Avoid TLB mismatch during and after kernel resume */
8 local_flush_tlb_all();
9 return restore_image();
10}
diff --git a/arch/mips/power/hibernate.S b/arch/mips/power/hibernate_asm.S
index 32a7c828f073..b1fab951100f 100644
--- a/arch/mips/power/hibernate.S
+++ b/arch/mips/power/hibernate_asm.S
@@ -29,7 +29,7 @@ LEAF(swsusp_arch_suspend)
29 j swsusp_save 29 j swsusp_save
30END(swsusp_arch_suspend) 30END(swsusp_arch_suspend)
31 31
32LEAF(swsusp_arch_resume) 32LEAF(restore_image)
33 PTR_L t0, restore_pblist 33 PTR_L t0, restore_pblist
340: 340:
35 PTR_L t1, PBE_ADDRESS(t0) /* source */ 35 PTR_L t1, PBE_ADDRESS(t0) /* source */
@@ -43,7 +43,6 @@ LEAF(swsusp_arch_resume)
43 bne t1, t3, 1b 43 bne t1, t3, 1b
44 PTR_L t0, PBE_NEXT(t0) 44 PTR_L t0, PBE_NEXT(t0)
45 bnez t0, 0b 45 bnez t0, 0b
46 jal local_flush_tlb_all /* Avoid TLB mismatch after kernel resume */
47 PTR_LA t0, saved_regs 46 PTR_LA t0, saved_regs
48 PTR_L ra, PT_R31(t0) 47 PTR_L ra, PT_R31(t0)
49 PTR_L sp, PT_R29(t0) 48 PTR_L sp, PT_R29(t0)
@@ -59,4 +58,4 @@ LEAF(swsusp_arch_resume)
59 PTR_L s7, PT_R23(t0) 58 PTR_L s7, PT_R23(t0)
60 PTR_LI v0, 0x0 59 PTR_LI v0, 0x0
61 jr ra 60 jr ra
62END(swsusp_arch_resume) 61END(restore_image)
diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index b1c52ca580f9..e9bc8c96174e 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -7,6 +7,11 @@ config CLKEVT_RT3352
7 select CLKSRC_OF 7 select CLKSRC_OF
8 select CLKSRC_MMIO 8 select CLKSRC_MMIO
9 9
10config RALINK_ILL_ACC
11 bool
12 depends on SOC_RT305X
13 default y
14
10choice 15choice
11 prompt "Ralink SoC selection" 16 prompt "Ralink SoC selection"
12 default SOC_RT305X 17 default SOC_RT305X
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 1d97eaba0c5f..a6d10f607f34 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -7,6 +7,7 @@
7#include <linux/init.h> 7#include <linux/init.h>
8#include <linux/kernel.h> 8#include <linux/kernel.h>
9#include <linux/sched.h> 9#include <linux/sched.h>
10#include <linux/sched_clock.h>
10#include <linux/interrupt.h> 11#include <linux/interrupt.h>
11#include <linux/kernel_stat.h> 12#include <linux/kernel_stat.h>
12#include <linux/param.h> 13#include <linux/param.h>
@@ -159,11 +160,18 @@ struct clocksource hub_rt_clocksource = {
159 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 160 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
160}; 161};
161 162
163static u64 notrace hub_rt_read_sched_clock(void)
164{
165 return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT);
166}
167
162static void __init hub_rt_clocksource_init(void) 168static void __init hub_rt_clocksource_init(void)
163{ 169{
164 struct clocksource *cs = &hub_rt_clocksource; 170 struct clocksource *cs = &hub_rt_clocksource;
165 171
166 clocksource_register_hz(cs, CYCLES_PER_SEC); 172 clocksource_register_hz(cs, CYCLES_PER_SEC);
173
174 sched_clock_register(hub_rt_read_sched_clock, 52, CYCLES_PER_SEC);
167} 175}
168 176
169void __init plat_time_init(void) 177void __init plat_time_init(void)
diff --git a/arch/mips/sgi-ip32/ip32-platform.c b/arch/mips/sgi-ip32/ip32-platform.c
index 511e9ff2acfd..0134db2ad0a8 100644
--- a/arch/mips/sgi-ip32/ip32-platform.c
+++ b/arch/mips/sgi-ip32/ip32-platform.c
@@ -5,14 +5,16 @@
5 * 5 *
6 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org) 6 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
7 */ 7 */
8#include <linux/module.h>
9#include <linux/init.h> 8#include <linux/init.h>
10#include <linux/platform_device.h> 9#include <linux/platform_device.h>
11#include <linux/serial_8250.h> 10#include <linux/serial_8250.h>
11#include <linux/rtc/ds1685.h>
12 12
13#include <asm/ip32/mace.h> 13#include <asm/ip32/mace.h>
14#include <asm/ip32/ip32_ints.h> 14#include <asm/ip32/ip32_ints.h>
15 15
16extern void ip32_prepare_poweroff(void);
17
16#define MACEISA_SERIAL1_OFFS offsetof(struct sgi_mace, isa.serial1) 18#define MACEISA_SERIAL1_OFFS offsetof(struct sgi_mace, isa.serial1)
17#define MACEISA_SERIAL2_OFFS offsetof(struct sgi_mace, isa.serial2) 19#define MACEISA_SERIAL2_OFFS offsetof(struct sgi_mace, isa.serial2)
18 20
@@ -90,22 +92,47 @@ static __init int sgio2btns_devinit(void)
90 92
91device_initcall(sgio2btns_devinit); 93device_initcall(sgio2btns_devinit);
92 94
93static struct resource sgio2_cmos_rsrc[] = { 95#define MACE_RTC_RES_START (MACE_BASE + offsetof(struct sgi_mace, isa.rtc))
96#define MACE_RTC_RES_END (MACE_RTC_RES_START + 32767)
97
98static struct resource ip32_rtc_resources[] = {
94 { 99 {
95 .start = 0x70, 100 .start = MACEISA_RTC_IRQ,
96 .end = 0x71, 101 .end = MACEISA_RTC_IRQ,
97 .flags = IORESOURCE_IO 102 .flags = IORESOURCE_IRQ
103 }, {
104 .start = MACE_RTC_RES_START,
105 .end = MACE_RTC_RES_END,
106 .flags = IORESOURCE_MEM,
98 } 107 }
99}; 108};
100 109
101static __init int sgio2_cmos_devinit(void) 110/* RTC registers on IP32 are each padded by 256 bytes (0x100). */
111static struct ds1685_rtc_platform_data
112ip32_rtc_platform_data[] = {
113 {
114 .regstep = 0x100,
115 .bcd_mode = true,
116 .no_irq = false,
117 .uie_unsupported = false,
118 .alloc_io_resources = true,
119 .plat_prepare_poweroff = ip32_prepare_poweroff,
120 },
121};
122
123struct platform_device ip32_rtc_device = {
124 .name = "rtc-ds1685",
125 .id = -1,
126 .dev = {
127 .platform_data = ip32_rtc_platform_data,
128 },
129 .num_resources = ARRAY_SIZE(ip32_rtc_resources),
130 .resource = ip32_rtc_resources,
131};
132
133+static int __init sgio2_rtc_devinit(void)
102{ 134{
103 return IS_ERR(platform_device_register_simple("rtc_cmos", -1, 135 return platform_device_register(&ip32_rtc_device);
104 sgio2_cmos_rsrc, 1));
105} 136}
106 137
107device_initcall(sgio2_cmos_devinit); 138device_initcall(sgio2_cmos_devinit);
108
109MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
110MODULE_LICENSE("GPL");
111MODULE_DESCRIPTION("8250 UART probe driver for SGI IP32 aka O2");
diff --git a/arch/mips/sgi-ip32/ip32-reset.c b/arch/mips/sgi-ip32/ip32-reset.c
index 44b3470a0bbb..8bd415c8729f 100644
--- a/arch/mips/sgi-ip32/ip32-reset.c
+++ b/arch/mips/sgi-ip32/ip32-reset.c
@@ -11,10 +11,11 @@
11#include <linux/compiler.h> 11#include <linux/compiler.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/module.h>
14#include <linux/sched.h> 15#include <linux/sched.h>
15#include <linux/notifier.h> 16#include <linux/notifier.h>
16#include <linux/delay.h> 17#include <linux/delay.h>
17#include <linux/ds17287rtc.h> 18#include <linux/rtc/ds1685.h>
18#include <linux/interrupt.h> 19#include <linux/interrupt.h>
19#include <linux/pm.h> 20#include <linux/pm.h>
20 21
@@ -33,53 +34,40 @@
33#define POWERDOWN_FREQ (HZ / 4) 34#define POWERDOWN_FREQ (HZ / 4)
34#define PANIC_FREQ (HZ / 8) 35#define PANIC_FREQ (HZ / 8)
35 36
36static struct timer_list power_timer, blink_timer, debounce_timer; 37extern struct platform_device ip32_rtc_device;
37static int has_panicked, shuting_down;
38 38
39static void ip32_machine_restart(char *command) __noreturn; 39static struct timer_list power_timer, blink_timer;
40static void ip32_machine_halt(void) __noreturn; 40static int has_panicked, shutting_down;
41static void ip32_machine_power_off(void) __noreturn;
42 41
43static void ip32_machine_restart(char *cmd) 42static __noreturn void ip32_poweroff(void *data)
44{ 43{
45 crime->control = CRIME_CONTROL_HARD_RESET; 44 void (*poweroff_func)(struct platform_device *) =
46 while (1); 45 symbol_get(ds1685_rtc_poweroff);
47} 46
47#ifdef CONFIG_MODULES
48 /* If the first __symbol_get failed, our module wasn't loaded. */
49 if (!poweroff_func) {
50 request_module("rtc-ds1685");
51 poweroff_func = symbol_get(ds1685_rtc_poweroff);
52 }
53#endif
48 54
49static inline void ip32_machine_halt(void) 55 if (!poweroff_func)
50{ 56 pr_emerg("RTC not available for power-off. Spinning forever ...\n");
51 ip32_machine_power_off(); 57 else {
52} 58 (*poweroff_func)((struct platform_device *)data);
59 symbol_put(ds1685_rtc_poweroff);
60 }
53 61
54static void ip32_machine_power_off(void) 62 unreachable();
55{
56 unsigned char reg_a, xctrl_a, xctrl_b;
57
58 disable_irq(MACEISA_RTC_IRQ);
59 reg_a = CMOS_READ(RTC_REG_A);
60
61 /* setup for kickstart & wake-up (DS12287 Ref. Man. p. 19) */
62 reg_a &= ~DS_REGA_DV2;
63 reg_a |= DS_REGA_DV1;
64
65 CMOS_WRITE(reg_a | DS_REGA_DV0, RTC_REG_A);
66 wbflush();
67 xctrl_b = CMOS_READ(DS_B1_XCTRL4B)
68 | DS_XCTRL4B_ABE | DS_XCTRL4B_KFE;
69 CMOS_WRITE(xctrl_b, DS_B1_XCTRL4B);
70 xctrl_a = CMOS_READ(DS_B1_XCTRL4A) & ~DS_XCTRL4A_IFS;
71 CMOS_WRITE(xctrl_a, DS_B1_XCTRL4A);
72 wbflush();
73 /* adios amigos... */
74 CMOS_WRITE(xctrl_a | DS_XCTRL4A_PAB, DS_B1_XCTRL4A);
75 CMOS_WRITE(reg_a, RTC_REG_A);
76 wbflush();
77 while (1);
78} 63}
79 64
80static void power_timeout(unsigned long data) 65static void ip32_machine_restart(char *cmd) __noreturn;
66static void ip32_machine_restart(char *cmd)
81{ 67{
82 ip32_machine_power_off(); 68 msleep(20);
69 crime->control = CRIME_CONTROL_HARD_RESET;
70 unreachable();
83} 71}
84 72
85static void blink_timeout(unsigned long data) 73static void blink_timeout(unsigned long data)
@@ -89,44 +77,27 @@ static void blink_timeout(unsigned long data)
89 mod_timer(&blink_timer, jiffies + data); 77 mod_timer(&blink_timer, jiffies + data);
90} 78}
91 79
92static void debounce(unsigned long data) 80static void ip32_machine_halt(void)
93{ 81{
94 unsigned char reg_a, reg_c, xctrl_a; 82 ip32_poweroff(&ip32_rtc_device);
95 83}
96 reg_c = CMOS_READ(RTC_INTR_FLAGS);
97 reg_a = CMOS_READ(RTC_REG_A);
98 CMOS_WRITE(reg_a | DS_REGA_DV0, RTC_REG_A);
99 wbflush();
100 xctrl_a = CMOS_READ(DS_B1_XCTRL4A);
101 if ((xctrl_a & DS_XCTRL4A_IFS) || (reg_c & RTC_IRQF )) {
102 /* Interrupt still being sent. */
103 debounce_timer.expires = jiffies + 50;
104 add_timer(&debounce_timer);
105
106 /* clear interrupt source */
107 CMOS_WRITE(xctrl_a & ~DS_XCTRL4A_IFS, DS_B1_XCTRL4A);
108 CMOS_WRITE(reg_a & ~DS_REGA_DV0, RTC_REG_A);
109 return;
110 }
111 CMOS_WRITE(reg_a & ~DS_REGA_DV0, RTC_REG_A);
112
113 if (has_panicked)
114 ip32_machine_restart(NULL);
115 84
116 enable_irq(MACEISA_RTC_IRQ); 85static void power_timeout(unsigned long data)
86{
87 ip32_poweroff(&ip32_rtc_device);
117} 88}
118 89
119static inline void ip32_power_button(void) 90void ip32_prepare_poweroff(void)
120{ 91{
121 if (has_panicked) 92 if (has_panicked)
122 return; 93 return;
123 94
124 if (shuting_down || kill_cad_pid(SIGINT, 1)) { 95 if (shutting_down || kill_cad_pid(SIGINT, 1)) {
125 /* No init process or button pressed twice. */ 96 /* No init process or button pressed twice. */
126 ip32_machine_power_off(); 97 ip32_poweroff(&ip32_rtc_device);
127 } 98 }
128 99
129 shuting_down = 1; 100 shutting_down = 1;
130 blink_timer.data = POWERDOWN_FREQ; 101 blink_timer.data = POWERDOWN_FREQ;
131 blink_timeout(POWERDOWN_FREQ); 102 blink_timeout(POWERDOWN_FREQ);
132 103
@@ -136,27 +107,6 @@ static inline void ip32_power_button(void)
136 add_timer(&power_timer); 107 add_timer(&power_timer);
137} 108}
138 109
139static irqreturn_t ip32_rtc_int(int irq, void *dev_id)
140{
141 unsigned char reg_c;
142
143 reg_c = CMOS_READ(RTC_INTR_FLAGS);
144 if (!(reg_c & RTC_IRQF)) {
145 printk(KERN_WARNING
146 "%s: RTC IRQ without RTC_IRQF\n", __func__);
147 }
148 /* Wait until interrupt goes away */
149 disable_irq_nosync(MACEISA_RTC_IRQ);
150 init_timer(&debounce_timer);
151 debounce_timer.function = debounce;
152 debounce_timer.expires = jiffies + 50;
153 add_timer(&debounce_timer);
154
155 printk(KERN_DEBUG "Power button pressed\n");
156 ip32_power_button();
157 return IRQ_HANDLED;
158}
159
160static int panic_event(struct notifier_block *this, unsigned long event, 110static int panic_event(struct notifier_block *this, unsigned long event,
161 void *ptr) 111 void *ptr)
162{ 112{
@@ -190,15 +140,12 @@ static __init int ip32_reboot_setup(void)
190 140
191 _machine_restart = ip32_machine_restart; 141 _machine_restart = ip32_machine_restart;
192 _machine_halt = ip32_machine_halt; 142 _machine_halt = ip32_machine_halt;
193 pm_power_off = ip32_machine_power_off; 143 pm_power_off = ip32_machine_halt;
194 144
195 init_timer(&blink_timer); 145 init_timer(&blink_timer);
196 blink_timer.function = blink_timeout; 146 blink_timer.function = blink_timeout;
197 atomic_notifier_chain_register(&panic_notifier_list, &panic_block); 147 atomic_notifier_chain_register(&panic_notifier_list, &panic_block);
198 148
199 if (request_irq(MACEISA_RTC_IRQ, ip32_rtc_int, 0, "rtc", NULL))
200 panic("Can't allocate MACEISA RTC IRQ");
201
202 return 0; 149 return 0;
203} 150}
204 151
diff --git a/arch/parisc/include/asm/Kbuild b/arch/parisc/include/asm/Kbuild
index 8686237a3c3c..12b341d04f88 100644
--- a/arch/parisc/include/asm/Kbuild
+++ b/arch/parisc/include/asm/Kbuild
@@ -20,6 +20,7 @@ generic-y += param.h
20generic-y += percpu.h 20generic-y += percpu.h
21generic-y += poll.h 21generic-y += poll.h
22generic-y += preempt.h 22generic-y += preempt.h
23generic-y += seccomp.h
23generic-y += segment.h 24generic-y += segment.h
24generic-y += topology.h 25generic-y += topology.h
25generic-y += trace_clock.h 26generic-y += trace_clock.h
diff --git a/arch/parisc/include/asm/seccomp.h b/arch/parisc/include/asm/seccomp.h
deleted file mode 100644
index 015f7887aa29..000000000000
--- a/arch/parisc/include/asm/seccomp.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef _ASM_PARISC_SECCOMP_H
2#define _ASM_PARISC_SECCOMP_H
3
4#include <linux/unistd.h>
5
6#define __NR_seccomp_read __NR_read
7#define __NR_seccomp_write __NR_write
8#define __NR_seccomp_exit __NR_exit
9#define __NR_seccomp_sigreturn __NR_rt_sigreturn
10
11#define __NR_seccomp_read_32 __NR_read
12#define __NR_seccomp_write_32 __NR_write
13#define __NR_seccomp_exit_32 __NR_exit
14#define __NR_seccomp_sigreturn_32 __NR_rt_sigreturn
15
16#endif /* _ASM_PARISC_SECCOMP_H */
diff --git a/arch/powerpc/include/asm/seccomp.h b/arch/powerpc/include/asm/seccomp.h
new file mode 100644
index 000000000000..c1818e35cf02
--- /dev/null
+++ b/arch/powerpc/include/asm/seccomp.h
@@ -0,0 +1,10 @@
1#ifndef _ASM_POWERPC_SECCOMP_H
2#define _ASM_POWERPC_SECCOMP_H
3
4#include <linux/unistd.h>
5
6#define __NR_seccomp_sigreturn_32 __NR_sigreturn
7
8#include <asm-generic/seccomp.h>
9
10#endif /* _ASM_POWERPC_SECCOMP_H */
diff --git a/arch/powerpc/include/uapi/asm/Kbuild b/arch/powerpc/include/uapi/asm/Kbuild
index 7a3f795ac218..79c4068be278 100644
--- a/arch/powerpc/include/uapi/asm/Kbuild
+++ b/arch/powerpc/include/uapi/asm/Kbuild
@@ -25,7 +25,6 @@ header-y += posix_types.h
25header-y += ps3fb.h 25header-y += ps3fb.h
26header-y += ptrace.h 26header-y += ptrace.h
27header-y += resource.h 27header-y += resource.h
28header-y += seccomp.h
29header-y += sembuf.h 28header-y += sembuf.h
30header-y += setup.h 29header-y += setup.h
31header-y += shmbuf.h 30header-y += shmbuf.h
diff --git a/arch/powerpc/include/uapi/asm/seccomp.h b/arch/powerpc/include/uapi/asm/seccomp.h
deleted file mode 100644
index 00c1d9133cfe..000000000000
--- a/arch/powerpc/include/uapi/asm/seccomp.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef _ASM_POWERPC_SECCOMP_H
2#define _ASM_POWERPC_SECCOMP_H
3
4#include <linux/unistd.h>
5
6#define __NR_seccomp_read __NR_read
7#define __NR_seccomp_write __NR_write
8#define __NR_seccomp_exit __NR_exit
9#define __NR_seccomp_sigreturn __NR_rt_sigreturn
10
11#define __NR_seccomp_read_32 __NR_read
12#define __NR_seccomp_write_32 __NR_write
13#define __NR_seccomp_exit_32 __NR_exit
14#define __NR_seccomp_sigreturn_32 __NR_sigreturn
15
16#endif /* _ASM_POWERPC_SECCOMP_H */
diff --git a/arch/powerpc/oprofile/cell/spu_task_sync.c b/arch/powerpc/oprofile/cell/spu_task_sync.c
index 1c27831df1ac..ed7b0977072a 100644
--- a/arch/powerpc/oprofile/cell/spu_task_sync.c
+++ b/arch/powerpc/oprofile/cell/spu_task_sync.c
@@ -22,6 +22,7 @@
22#include <linux/kref.h> 22#include <linux/kref.h>
23#include <linux/mm.h> 23#include <linux/mm.h>
24#include <linux/fs.h> 24#include <linux/fs.h>
25#include <linux/file.h>
25#include <linux/module.h> 26#include <linux/module.h>
26#include <linux/notifier.h> 27#include <linux/notifier.h>
27#include <linux/numa.h> 28#include <linux/numa.h>
@@ -322,18 +323,20 @@ get_exec_dcookie_and_offset(struct spu *spu, unsigned int *offsetp,
322 unsigned long app_cookie = 0; 323 unsigned long app_cookie = 0;
323 unsigned int my_offset = 0; 324 unsigned int my_offset = 0;
324 struct vm_area_struct *vma; 325 struct vm_area_struct *vma;
326 struct file *exe_file;
325 struct mm_struct *mm = spu->mm; 327 struct mm_struct *mm = spu->mm;
326 328
327 if (!mm) 329 if (!mm)
328 goto out; 330 goto out;
329 331
330 down_read(&mm->mmap_sem); 332 exe_file = get_mm_exe_file(mm);
331 333 if (exe_file) {
332 if (mm->exe_file) { 334 app_cookie = fast_get_dcookie(&exe_file->f_path);
333 app_cookie = fast_get_dcookie(&mm->exe_file->f_path); 335 pr_debug("got dcookie for %pD\n", exe_file);
334 pr_debug("got dcookie for %pD\n", mm->exe_file); 336 fput(exe_file);
335 } 337 }
336 338
339 down_read(&mm->mmap_sem);
337 for (vma = mm->mmap; vma; vma = vma->vm_next) { 340 for (vma = mm->mmap; vma; vma = vma->vm_next) {
338 if (vma->vm_start > spu_ref || vma->vm_end <= spu_ref) 341 if (vma->vm_start > spu_ref || vma->vm_end <= spu_ref)
339 continue; 342 continue;
diff --git a/arch/sparc/include/asm/seccomp.h b/arch/sparc/include/asm/seccomp.h
index adca1bce41d4..5ef8826d44f8 100644
--- a/arch/sparc/include/asm/seccomp.h
+++ b/arch/sparc/include/asm/seccomp.h
@@ -1,15 +1,10 @@
1#ifndef _ASM_SECCOMP_H 1#ifndef _ASM_SECCOMP_H
2#define _ASM_SECCOMP_H
2 3
3#include <linux/unistd.h> 4#include <linux/unistd.h>
4 5
5#define __NR_seccomp_read __NR_read
6#define __NR_seccomp_write __NR_write
7#define __NR_seccomp_exit __NR_exit
8#define __NR_seccomp_sigreturn __NR_rt_sigreturn
9
10#define __NR_seccomp_read_32 __NR_read
11#define __NR_seccomp_write_32 __NR_write
12#define __NR_seccomp_exit_32 __NR_exit
13#define __NR_seccomp_sigreturn_32 __NR_sigreturn 6#define __NR_seccomp_sigreturn_32 __NR_sigreturn
14 7
8#include <asm-generic/seccomp.h>
9
15#endif /* _ASM_SECCOMP_H */ 10#endif /* _ASM_SECCOMP_H */
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index 0142d578b5a8..a07e31b50d3f 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -27,6 +27,7 @@ config TILE
27 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 27 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
28 select HAVE_DEBUG_STACKOVERFLOW 28 select HAVE_DEBUG_STACKOVERFLOW
29 select ARCH_WANT_FRAME_POINTERS 29 select ARCH_WANT_FRAME_POINTERS
30 select HAVE_CONTEXT_TRACKING
30 31
31# FIXME: investigate whether we need/want these options. 32# FIXME: investigate whether we need/want these options.
32# select HAVE_IOREMAP_PROT 33# select HAVE_IOREMAP_PROT
diff --git a/arch/tile/include/asm/Kbuild b/arch/tile/include/asm/Kbuild
index b4c488b65745..f5433e0e34e0 100644
--- a/arch/tile/include/asm/Kbuild
+++ b/arch/tile/include/asm/Kbuild
@@ -16,7 +16,6 @@ generic-y += ioctl.h
16generic-y += ioctls.h 16generic-y += ioctls.h
17generic-y += ipcbuf.h 17generic-y += ipcbuf.h
18generic-y += irq_regs.h 18generic-y += irq_regs.h
19generic-y += irq_work.h
20generic-y += local.h 19generic-y += local.h
21generic-y += local64.h 20generic-y += local64.h
22generic-y += mcs_spinlock.h 21generic-y += mcs_spinlock.h
diff --git a/arch/tile/include/asm/ftrace.h b/arch/tile/include/asm/ftrace.h
index 13a9bb81a8ab..738d239b792f 100644
--- a/arch/tile/include/asm/ftrace.h
+++ b/arch/tile/include/asm/ftrace.h
@@ -23,6 +23,8 @@
23#ifndef __ASSEMBLY__ 23#ifndef __ASSEMBLY__
24extern void __mcount(void); 24extern void __mcount(void);
25 25
26#define ARCH_SUPPORTS_FTRACE_OPS 1
27
26#ifdef CONFIG_DYNAMIC_FTRACE 28#ifdef CONFIG_DYNAMIC_FTRACE
27static inline unsigned long ftrace_call_adjust(unsigned long addr) 29static inline unsigned long ftrace_call_adjust(unsigned long addr)
28{ 30{
diff --git a/arch/tile/include/asm/irq_work.h b/arch/tile/include/asm/irq_work.h
new file mode 100644
index 000000000000..48af33a61a2c
--- /dev/null
+++ b/arch/tile/include/asm/irq_work.h
@@ -0,0 +1,14 @@
1#ifndef __ASM_IRQ_WORK_H
2#define __ASM_IRQ_WORK_H
3
4static inline bool arch_irq_work_has_interrupt(void)
5{
6#ifdef CONFIG_SMP
7 extern bool self_interrupt_ok;
8 return self_interrupt_ok;
9#else
10 return false;
11#endif
12}
13
14#endif /* __ASM_IRQ_WORK_H */
diff --git a/arch/tile/include/asm/smp.h b/arch/tile/include/asm/smp.h
index 9a326b64f7ae..735e7f144733 100644
--- a/arch/tile/include/asm/smp.h
+++ b/arch/tile/include/asm/smp.h
@@ -69,6 +69,7 @@ static inline int xy_to_cpu(int x, int y)
69#define MSG_TAG_STOP_CPU 2 69#define MSG_TAG_STOP_CPU 2
70#define MSG_TAG_CALL_FUNCTION_MANY 3 70#define MSG_TAG_CALL_FUNCTION_MANY 3
71#define MSG_TAG_CALL_FUNCTION_SINGLE 4 71#define MSG_TAG_CALL_FUNCTION_SINGLE 4
72#define MSG_TAG_IRQ_WORK 5
72 73
73/* Hook for the generic smp_call_function_many() routine. */ 74/* Hook for the generic smp_call_function_many() routine. */
74static inline void arch_send_call_function_ipi_mask(struct cpumask *mask) 75static inline void arch_send_call_function_ipi_mask(struct cpumask *mask)
diff --git a/arch/tile/include/asm/thread_info.h b/arch/tile/include/asm/thread_info.h
index 98ee10a0ae89..f804c39a5e4d 100644
--- a/arch/tile/include/asm/thread_info.h
+++ b/arch/tile/include/asm/thread_info.h
@@ -124,6 +124,7 @@ extern void _cpu_idle(void);
124#define TIF_NOTIFY_RESUME 8 /* callback before returning to user */ 124#define TIF_NOTIFY_RESUME 8 /* callback before returning to user */
125#define TIF_SYSCALL_TRACEPOINT 9 /* syscall tracepoint instrumentation */ 125#define TIF_SYSCALL_TRACEPOINT 9 /* syscall tracepoint instrumentation */
126#define TIF_POLLING_NRFLAG 10 /* idle is polling for TIF_NEED_RESCHED */ 126#define TIF_POLLING_NRFLAG 10 /* idle is polling for TIF_NEED_RESCHED */
127#define TIF_NOHZ 11 /* in adaptive nohz mode */
127 128
128#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 129#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
129#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 130#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
@@ -136,14 +137,16 @@ extern void _cpu_idle(void);
136#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 137#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
137#define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT) 138#define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
138#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 139#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
140#define _TIF_NOHZ (1<<TIF_NOHZ)
139 141
140/* Work to do on any return to user space. */ 142/* Work to do on any return to user space. */
141#define _TIF_ALLWORK_MASK \ 143#define _TIF_ALLWORK_MASK \
142 (_TIF_SIGPENDING|_TIF_NEED_RESCHED|_TIF_SINGLESTEP|\ 144 (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_SINGLESTEP | \
143 _TIF_ASYNC_TLB|_TIF_NOTIFY_RESUME) 145 _TIF_ASYNC_TLB | _TIF_NOTIFY_RESUME | _TIF_NOHZ)
144 146
145/* Work to do at syscall entry. */ 147/* Work to do at syscall entry. */
146#define _TIF_SYSCALL_ENTRY_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_TRACEPOINT) 148#define _TIF_SYSCALL_ENTRY_WORK \
149 (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_TRACEPOINT | _TIF_NOHZ)
147 150
148/* Work to do at syscall exit. */ 151/* Work to do at syscall exit. */
149#define _TIF_SYSCALL_EXIT_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_TRACEPOINT) 152#define _TIF_SYSCALL_EXIT_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_TRACEPOINT)
diff --git a/arch/tile/include/hv/hypervisor.h b/arch/tile/include/hv/hypervisor.h
index dfcdeb61ba34..e0e6af4e783b 100644
--- a/arch/tile/include/hv/hypervisor.h
+++ b/arch/tile/include/hv/hypervisor.h
@@ -961,7 +961,11 @@ typedef enum {
961 HV_INQ_TILES_HFH_CACHE = 2, 961 HV_INQ_TILES_HFH_CACHE = 2,
962 962
963 /** The set of tiles that can be legally used as a LOTAR for a PTE. */ 963 /** The set of tiles that can be legally used as a LOTAR for a PTE. */
964 HV_INQ_TILES_LOTAR = 3 964 HV_INQ_TILES_LOTAR = 3,
965
966 /** The set of "shared" driver tiles that the hypervisor may
967 * periodically interrupt. */
968 HV_INQ_TILES_SHARED = 4
965} HV_InqTileSet; 969} HV_InqTileSet;
966 970
967/** Returns specific information about various sets of tiles within the 971/** Returns specific information about various sets of tiles within the
diff --git a/arch/tile/kernel/compat_signal.c b/arch/tile/kernel/compat_signal.c
index 5cbc864398d3..e8c2c04143cd 100644
--- a/arch/tile/kernel/compat_signal.c
+++ b/arch/tile/kernel/compat_signal.c
@@ -68,7 +68,7 @@ int copy_siginfo_to_user32(struct compat_siginfo __user *to, const siginfo_t *fr
68 if (from->si_code < 0) { 68 if (from->si_code < 0) {
69 err |= __put_user(from->si_pid, &to->si_pid); 69 err |= __put_user(from->si_pid, &to->si_pid);
70 err |= __put_user(from->si_uid, &to->si_uid); 70 err |= __put_user(from->si_uid, &to->si_uid);
71 err |= __put_user(ptr_to_compat(from->si_ptr), &to->si_ptr); 71 err |= __put_user(from->si_int, &to->si_int);
72 } else { 72 } else {
73 /* 73 /*
74 * First 32bits of unions are always present: 74 * First 32bits of unions are always present:
@@ -93,8 +93,7 @@ int copy_siginfo_to_user32(struct compat_siginfo __user *to, const siginfo_t *fr
93 break; 93 break;
94 case __SI_TIMER >> 16: 94 case __SI_TIMER >> 16:
95 err |= __put_user(from->si_overrun, &to->si_overrun); 95 err |= __put_user(from->si_overrun, &to->si_overrun);
96 err |= __put_user(ptr_to_compat(from->si_ptr), 96 err |= __put_user(from->si_int, &to->si_int);
97 &to->si_ptr);
98 break; 97 break;
99 /* This is not generated by the kernel as of now. */ 98 /* This is not generated by the kernel as of now. */
100 case __SI_RT >> 16: 99 case __SI_RT >> 16:
@@ -110,19 +109,19 @@ int copy_siginfo_to_user32(struct compat_siginfo __user *to, const siginfo_t *fr
110int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from) 109int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from)
111{ 110{
112 int err; 111 int err;
113 u32 ptr32;
114 112
115 if (!access_ok(VERIFY_READ, from, sizeof(struct compat_siginfo))) 113 if (!access_ok(VERIFY_READ, from, sizeof(struct compat_siginfo)))
116 return -EFAULT; 114 return -EFAULT;
117 115
116 memset(to, 0, sizeof(*to));
117
118 err = __get_user(to->si_signo, &from->si_signo); 118 err = __get_user(to->si_signo, &from->si_signo);
119 err |= __get_user(to->si_errno, &from->si_errno); 119 err |= __get_user(to->si_errno, &from->si_errno);
120 err |= __get_user(to->si_code, &from->si_code); 120 err |= __get_user(to->si_code, &from->si_code);
121 121
122 err |= __get_user(to->si_pid, &from->si_pid); 122 err |= __get_user(to->si_pid, &from->si_pid);
123 err |= __get_user(to->si_uid, &from->si_uid); 123 err |= __get_user(to->si_uid, &from->si_uid);
124 err |= __get_user(ptr32, &from->si_ptr); 124 err |= __get_user(to->si_int, &from->si_int);
125 to->si_ptr = compat_ptr(ptr32);
126 125
127 return err; 126 return err;
128} 127}
diff --git a/arch/tile/kernel/ftrace.c b/arch/tile/kernel/ftrace.c
index 8d52d83cc516..0c0996175b1e 100644
--- a/arch/tile/kernel/ftrace.c
+++ b/arch/tile/kernel/ftrace.c
@@ -74,7 +74,11 @@ static unsigned long ftrace_gen_branch(unsigned long pc, unsigned long addr,
74 create_JumpOff_X1(pcrel_by_instr); 74 create_JumpOff_X1(pcrel_by_instr);
75 } 75 }
76 76
77 if (addr == FTRACE_ADDR) { 77 /*
78 * Also put { move r10, lr; jal ftrace_stub } in a bundle, which
79 * is used to replace the instruction in address ftrace_call.
80 */
81 if (addr == FTRACE_ADDR || addr == (unsigned long)ftrace_stub) {
78 /* opcode: or r10, lr, zero */ 82 /* opcode: or r10, lr, zero */
79 opcode_x0 = 83 opcode_x0 =
80 create_Dest_X0(10) | 84 create_Dest_X0(10) |
diff --git a/arch/tile/kernel/mcount_64.S b/arch/tile/kernel/mcount_64.S
index 3c2b8d5e1d1a..6c6702451962 100644
--- a/arch/tile/kernel/mcount_64.S
+++ b/arch/tile/kernel/mcount_64.S
@@ -81,7 +81,12 @@ STD_ENTRY(ftrace_caller)
81 81
82 /* arg1: self return address */ 82 /* arg1: self return address */
83 /* arg2: parent's return address */ 83 /* arg2: parent's return address */
84 { move r0, lr; move r1, r10 } 84 /* arg3: ftrace_ops */
85 /* arg4: regs (but make it NULL) */
86 { move r0, lr; moveli r2, hw2_last(function_trace_op) }
87 { move r1, r10; shl16insli r2, r2, hw1(function_trace_op) }
88 { movei r3, 0; shl16insli r2, r2, hw0(function_trace_op) }
89 ld r2,r2
85 90
86 .global ftrace_call 91 .global ftrace_call
87ftrace_call: 92ftrace_call:
diff --git a/arch/tile/kernel/process.c b/arch/tile/kernel/process.c
index 48e5773dd0b7..b403c2e3e263 100644
--- a/arch/tile/kernel/process.c
+++ b/arch/tile/kernel/process.c
@@ -27,6 +27,7 @@
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/tracehook.h> 28#include <linux/tracehook.h>
29#include <linux/signal.h> 29#include <linux/signal.h>
30#include <linux/context_tracking.h>
30#include <asm/stack.h> 31#include <asm/stack.h>
31#include <asm/switch_to.h> 32#include <asm/switch_to.h>
32#include <asm/homecache.h> 33#include <asm/homecache.h>
@@ -474,6 +475,8 @@ int do_work_pending(struct pt_regs *regs, u32 thread_info_flags)
474 if (!user_mode(regs)) 475 if (!user_mode(regs))
475 return 0; 476 return 0;
476 477
478 user_exit();
479
477 /* Enable interrupts; they are disabled again on return to caller. */ 480 /* Enable interrupts; they are disabled again on return to caller. */
478 local_irq_enable(); 481 local_irq_enable();
479 482
@@ -496,11 +499,12 @@ int do_work_pending(struct pt_regs *regs, u32 thread_info_flags)
496 tracehook_notify_resume(regs); 499 tracehook_notify_resume(regs);
497 return 1; 500 return 1;
498 } 501 }
499 if (thread_info_flags & _TIF_SINGLESTEP) { 502 if (thread_info_flags & _TIF_SINGLESTEP)
500 single_step_once(regs); 503 single_step_once(regs);
501 return 0; 504
502 } 505 user_enter();
503 panic("work_pending: bad flags %#x\n", thread_info_flags); 506
507 return 0;
504} 508}
505 509
506unsigned long get_wchan(struct task_struct *p) 510unsigned long get_wchan(struct task_struct *p)
diff --git a/arch/tile/kernel/ptrace.c b/arch/tile/kernel/ptrace.c
index de98c6ddf136..f84eed8243da 100644
--- a/arch/tile/kernel/ptrace.c
+++ b/arch/tile/kernel/ptrace.c
@@ -22,6 +22,7 @@
22#include <linux/regset.h> 22#include <linux/regset.h>
23#include <linux/elf.h> 23#include <linux/elf.h>
24#include <linux/tracehook.h> 24#include <linux/tracehook.h>
25#include <linux/context_tracking.h>
25#include <asm/traps.h> 26#include <asm/traps.h>
26#include <arch/chip.h> 27#include <arch/chip.h>
27 28
@@ -252,12 +253,21 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
252 253
253int do_syscall_trace_enter(struct pt_regs *regs) 254int do_syscall_trace_enter(struct pt_regs *regs)
254{ 255{
255 if (test_thread_flag(TIF_SYSCALL_TRACE)) { 256 u32 work = ACCESS_ONCE(current_thread_info()->flags);
257
258 /*
259 * If TIF_NOHZ is set, we are required to call user_exit() before
260 * doing anything that could touch RCU.
261 */
262 if (work & _TIF_NOHZ)
263 user_exit();
264
265 if (work & _TIF_SYSCALL_TRACE) {
256 if (tracehook_report_syscall_entry(regs)) 266 if (tracehook_report_syscall_entry(regs))
257 regs->regs[TREG_SYSCALL_NR] = -1; 267 regs->regs[TREG_SYSCALL_NR] = -1;
258 } 268 }
259 269
260 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) 270 if (work & _TIF_SYSCALL_TRACEPOINT)
261 trace_sys_enter(regs, regs->regs[TREG_SYSCALL_NR]); 271 trace_sys_enter(regs, regs->regs[TREG_SYSCALL_NR]);
262 272
263 return regs->regs[TREG_SYSCALL_NR]; 273 return regs->regs[TREG_SYSCALL_NR];
@@ -268,6 +278,12 @@ void do_syscall_trace_exit(struct pt_regs *regs)
268 long errno; 278 long errno;
269 279
270 /* 280 /*
281 * We may come here right after calling schedule_user()
282 * in which case we can be in RCU user mode.
283 */
284 user_exit();
285
286 /*
271 * The standard tile calling convention returns the value (or negative 287 * The standard tile calling convention returns the value (or negative
272 * errno) in r0, and zero (or positive errno) in r1. 288 * errno) in r0, and zero (or positive errno) in r1.
273 * It saves a couple of cycles on the hot path to do this work in 289 * It saves a couple of cycles on the hot path to do this work in
@@ -303,5 +319,7 @@ void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs)
303/* Handle synthetic interrupt delivered only by the simulator. */ 319/* Handle synthetic interrupt delivered only by the simulator. */
304void __kprobes do_breakpoint(struct pt_regs* regs, int fault_num) 320void __kprobes do_breakpoint(struct pt_regs* regs, int fault_num)
305{ 321{
322 enum ctx_state prev_state = exception_enter();
306 send_sigtrap(current, regs); 323 send_sigtrap(current, regs);
324 exception_exit(prev_state);
307} 325}
diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c
index f1f579914952..7833b2ccdfbc 100644
--- a/arch/tile/kernel/setup.c
+++ b/arch/tile/kernel/setup.c
@@ -32,6 +32,7 @@
32#include <linux/hugetlb.h> 32#include <linux/hugetlb.h>
33#include <linux/start_kernel.h> 33#include <linux/start_kernel.h>
34#include <linux/screen_info.h> 34#include <linux/screen_info.h>
35#include <linux/tick.h>
35#include <asm/setup.h> 36#include <asm/setup.h>
36#include <asm/sections.h> 37#include <asm/sections.h>
37#include <asm/cacheflush.h> 38#include <asm/cacheflush.h>
@@ -1390,6 +1391,28 @@ static int __init dataplane(char *str)
1390 1391
1391early_param("dataplane", dataplane); 1392early_param("dataplane", dataplane);
1392 1393
1394#ifdef CONFIG_NO_HZ_FULL
1395/* Warn if hypervisor shared cpus are marked as nohz_full. */
1396static int __init check_nohz_full_cpus(void)
1397{
1398 struct cpumask shared;
1399 int cpu;
1400
1401 if (hv_inquire_tiles(HV_INQ_TILES_SHARED,
1402 (HV_VirtAddr) shared.bits, sizeof(shared)) < 0) {
1403 pr_warn("WARNING: No support for inquiring hv shared tiles\n");
1404 return 0;
1405 }
1406 for_each_cpu(cpu, &shared) {
1407 if (tick_nohz_full_cpu(cpu))
1408 pr_warn("WARNING: nohz_full cpu %d receives hypervisor interrupts!\n",
1409 cpu);
1410 }
1411 return 0;
1412}
1413arch_initcall(check_nohz_full_cpus);
1414#endif
1415
1393#ifdef CONFIG_CMDLINE_BOOL 1416#ifdef CONFIG_CMDLINE_BOOL
1394static char __initdata builtin_cmdline[COMMAND_LINE_SIZE] = CONFIG_CMDLINE; 1417static char __initdata builtin_cmdline[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
1395#endif 1418#endif
diff --git a/arch/tile/kernel/single_step.c b/arch/tile/kernel/single_step.c
index 862973074bf9..53f7b9def07b 100644
--- a/arch/tile/kernel/single_step.c
+++ b/arch/tile/kernel/single_step.c
@@ -23,6 +23,7 @@
23#include <linux/types.h> 23#include <linux/types.h>
24#include <linux/err.h> 24#include <linux/err.h>
25#include <linux/prctl.h> 25#include <linux/prctl.h>
26#include <linux/context_tracking.h>
26#include <asm/cacheflush.h> 27#include <asm/cacheflush.h>
27#include <asm/traps.h> 28#include <asm/traps.h>
28#include <asm/uaccess.h> 29#include <asm/uaccess.h>
@@ -738,6 +739,7 @@ static DEFINE_PER_CPU(unsigned long, ss_saved_pc);
738 739
739void gx_singlestep_handle(struct pt_regs *regs, int fault_num) 740void gx_singlestep_handle(struct pt_regs *regs, int fault_num)
740{ 741{
742 enum ctx_state prev_state = exception_enter();
741 unsigned long *ss_pc = this_cpu_ptr(&ss_saved_pc); 743 unsigned long *ss_pc = this_cpu_ptr(&ss_saved_pc);
742 struct thread_info *info = (void *)current_thread_info(); 744 struct thread_info *info = (void *)current_thread_info();
743 int is_single_step = test_ti_thread_flag(info, TIF_SINGLESTEP); 745 int is_single_step = test_ti_thread_flag(info, TIF_SINGLESTEP);
@@ -754,6 +756,7 @@ void gx_singlestep_handle(struct pt_regs *regs, int fault_num)
754 __insn_mtspr(SPR_SINGLE_STEP_CONTROL_K, control); 756 __insn_mtspr(SPR_SINGLE_STEP_CONTROL_K, control);
755 send_sigtrap(current, regs); 757 send_sigtrap(current, regs);
756 } 758 }
759 exception_exit(prev_state);
757} 760}
758 761
759 762
diff --git a/arch/tile/kernel/smp.c b/arch/tile/kernel/smp.c
index d3c4ed780ce2..07e3ff5cc740 100644
--- a/arch/tile/kernel/smp.c
+++ b/arch/tile/kernel/smp.c
@@ -18,6 +18,7 @@
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/irq.h> 20#include <linux/irq.h>
21#include <linux/irq_work.h>
21#include <linux/module.h> 22#include <linux/module.h>
22#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
23#include <asm/homecache.h> 24#include <asm/homecache.h>
@@ -33,6 +34,8 @@ EXPORT_SYMBOL(smp_topology);
33static unsigned long __iomem *ipi_mappings[NR_CPUS]; 34static unsigned long __iomem *ipi_mappings[NR_CPUS];
34#endif 35#endif
35 36
37/* Does messaging work correctly to the local cpu? */
38bool self_interrupt_ok;
36 39
37/* 40/*
38 * Top-level send_IPI*() functions to send messages to other cpus. 41 * Top-level send_IPI*() functions to send messages to other cpus.
@@ -147,6 +150,10 @@ void evaluate_message(int tag)
147 generic_smp_call_function_single_interrupt(); 150 generic_smp_call_function_single_interrupt();
148 break; 151 break;
149 152
153 case MSG_TAG_IRQ_WORK: /* Invoke IRQ work */
154 irq_work_run();
155 break;
156
150 default: 157 default:
151 panic("Unknown IPI message tag %d", tag); 158 panic("Unknown IPI message tag %d", tag);
152 break; 159 break;
@@ -186,6 +193,15 @@ void flush_icache_range(unsigned long start, unsigned long end)
186EXPORT_SYMBOL(flush_icache_range); 193EXPORT_SYMBOL(flush_icache_range);
187 194
188 195
196#ifdef CONFIG_IRQ_WORK
197void arch_irq_work_raise(void)
198{
199 if (arch_irq_work_has_interrupt())
200 send_IPI_single(smp_processor_id(), MSG_TAG_IRQ_WORK);
201}
202#endif
203
204
189/* Called when smp_send_reschedule() triggers IRQ_RESCHEDULE. */ 205/* Called when smp_send_reschedule() triggers IRQ_RESCHEDULE. */
190static irqreturn_t handle_reschedule_ipi(int irq, void *token) 206static irqreturn_t handle_reschedule_ipi(int irq, void *token)
191{ 207{
@@ -203,8 +219,22 @@ static struct irqaction resched_action = {
203 219
204void __init ipi_init(void) 220void __init ipi_init(void)
205{ 221{
222 int cpu = smp_processor_id();
223 HV_Recipient recip = { .y = cpu_y(cpu), .x = cpu_x(cpu),
224 .state = HV_TO_BE_SENT };
225 int tag = MSG_TAG_CALL_FUNCTION_SINGLE;
226
227 /*
228 * Test if we can message ourselves for arch_irq_work_raise.
229 * This functionality is only available in the Tilera hypervisor
230 * in versions 4.3.4 and following.
231 */
232 if (hv_send_message(&recip, 1, (HV_VirtAddr)&tag, sizeof(tag)) == 1)
233 self_interrupt_ok = true;
234 else
235 pr_warn("Older hypervisor: disabling fast irq_work_raise\n");
236
206#if CHIP_HAS_IPI() 237#if CHIP_HAS_IPI()
207 int cpu;
208 /* Map IPI trigger MMIO addresses. */ 238 /* Map IPI trigger MMIO addresses. */
209 for_each_possible_cpu(cpu) { 239 for_each_possible_cpu(cpu) {
210 HV_Coord tile; 240 HV_Coord tile;
diff --git a/arch/tile/kernel/stack.c b/arch/tile/kernel/stack.c
index 7ff5afdbd3aa..c42dce50acd8 100644
--- a/arch/tile/kernel/stack.c
+++ b/arch/tile/kernel/stack.c
@@ -108,14 +108,15 @@ static struct pt_regs *valid_fault_handler(struct KBacktraceIterator* kbt)
108 p->sp < PAGE_OFFSET && p->sp != 0) { 108 p->sp < PAGE_OFFSET && p->sp != 0) {
109 if (kbt->verbose) 109 if (kbt->verbose)
110 pr_err(" <%s while in user mode>\n", fault); 110 pr_err(" <%s while in user mode>\n", fault);
111 } else if (kbt->verbose) { 111 } else {
112 pr_err(" (odd fault: pc %#lx, sp %#lx, ex1 %#lx?)\n", 112 if (kbt->verbose)
113 p->pc, p->sp, p->ex1); 113 pr_err(" (odd fault: pc %#lx, sp %#lx, ex1 %#lx?)\n",
114 p = NULL; 114 p->pc, p->sp, p->ex1);
115 return NULL;
115 } 116 }
116 if (!kbt->profile || ((1ULL << p->faultnum) & QUEUED_INTERRUPTS) == 0) 117 if (kbt->profile && ((1ULL << p->faultnum) & QUEUED_INTERRUPTS) != 0)
117 return p; 118 return NULL;
118 return NULL; 119 return p;
119} 120}
120 121
121/* Is the pc pointing to a sigreturn trampoline? */ 122/* Is the pc pointing to a sigreturn trampoline? */
diff --git a/arch/tile/kernel/traps.c b/arch/tile/kernel/traps.c
index bf841ca517bb..312fc134c1cb 100644
--- a/arch/tile/kernel/traps.c
+++ b/arch/tile/kernel/traps.c
@@ -20,6 +20,7 @@
20#include <linux/reboot.h> 20#include <linux/reboot.h>
21#include <linux/uaccess.h> 21#include <linux/uaccess.h>
22#include <linux/ptrace.h> 22#include <linux/ptrace.h>
23#include <linux/context_tracking.h>
23#include <asm/stack.h> 24#include <asm/stack.h>
24#include <asm/traps.h> 25#include <asm/traps.h>
25#include <asm/setup.h> 26#include <asm/setup.h>
@@ -253,6 +254,7 @@ static int do_bpt(struct pt_regs *regs)
253void __kprobes do_trap(struct pt_regs *regs, int fault_num, 254void __kprobes do_trap(struct pt_regs *regs, int fault_num,
254 unsigned long reason) 255 unsigned long reason)
255{ 256{
257 enum ctx_state prev_state = exception_enter();
256 siginfo_t info = { 0 }; 258 siginfo_t info = { 0 };
257 int signo, code; 259 int signo, code;
258 unsigned long address = 0; 260 unsigned long address = 0;
@@ -261,7 +263,7 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
261 263
262 /* Handle breakpoints, etc. */ 264 /* Handle breakpoints, etc. */
263 if (is_kernel && fault_num == INT_ILL && do_bpt(regs)) 265 if (is_kernel && fault_num == INT_ILL && do_bpt(regs))
264 return; 266 goto done;
265 267
266 /* Re-enable interrupts, if they were previously enabled. */ 268 /* Re-enable interrupts, if they were previously enabled. */
267 if (!(regs->flags & PT_FLAGS_DISABLE_IRQ)) 269 if (!(regs->flags & PT_FLAGS_DISABLE_IRQ))
@@ -275,7 +277,7 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
275 const char *name; 277 const char *name;
276 char buf[100]; 278 char buf[100];
277 if (fixup_exception(regs)) /* ILL_TRANS or UNALIGN_DATA */ 279 if (fixup_exception(regs)) /* ILL_TRANS or UNALIGN_DATA */
278 return; 280 goto done;
279 if (fault_num >= 0 && 281 if (fault_num >= 0 &&
280 fault_num < ARRAY_SIZE(int_name) && 282 fault_num < ARRAY_SIZE(int_name) &&
281 int_name[fault_num] != NULL) 283 int_name[fault_num] != NULL)
@@ -294,7 +296,6 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
294 fault_num, name, regs->pc, buf); 296 fault_num, name, regs->pc, buf);
295 show_regs(regs); 297 show_regs(regs);
296 do_exit(SIGKILL); /* FIXME: implement i386 die() */ 298 do_exit(SIGKILL); /* FIXME: implement i386 die() */
297 return;
298 } 299 }
299 300
300 switch (fault_num) { 301 switch (fault_num) {
@@ -308,7 +309,6 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
308 pr_err("Unreadable instruction for INT_ILL: %#lx\n", 309 pr_err("Unreadable instruction for INT_ILL: %#lx\n",
309 regs->pc); 310 regs->pc);
310 do_exit(SIGKILL); 311 do_exit(SIGKILL);
311 return;
312 } 312 }
313 if (!special_ill(instr, &signo, &code)) { 313 if (!special_ill(instr, &signo, &code)) {
314 signo = SIGILL; 314 signo = SIGILL;
@@ -319,7 +319,7 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
319 case INT_GPV: 319 case INT_GPV:
320#if CHIP_HAS_TILE_DMA() 320#if CHIP_HAS_TILE_DMA()
321 if (retry_gpv(reason)) 321 if (retry_gpv(reason))
322 return; 322 goto done;
323#endif 323#endif
324 /*FALLTHROUGH*/ 324 /*FALLTHROUGH*/
325 case INT_UDN_ACCESS: 325 case INT_UDN_ACCESS:
@@ -346,7 +346,7 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
346 if (!state || 346 if (!state ||
347 (void __user *)(regs->pc) != state->buffer) { 347 (void __user *)(regs->pc) != state->buffer) {
348 single_step_once(regs); 348 single_step_once(regs);
349 return; 349 goto done;
350 } 350 }
351 } 351 }
352#endif 352#endif
@@ -380,7 +380,6 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
380#endif 380#endif
381 default: 381 default:
382 panic("Unexpected do_trap interrupt number %d", fault_num); 382 panic("Unexpected do_trap interrupt number %d", fault_num);
383 return;
384 } 383 }
385 384
386 info.si_signo = signo; 385 info.si_signo = signo;
@@ -391,6 +390,9 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
391 if (signo != SIGTRAP) 390 if (signo != SIGTRAP)
392 trace_unhandled_signal("trap", regs, address, signo); 391 trace_unhandled_signal("trap", regs, address, signo);
393 force_sig_info(signo, &info, current); 392 force_sig_info(signo, &info, current);
393
394done:
395 exception_exit(prev_state);
394} 396}
395 397
396void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52) 398void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52)
diff --git a/arch/tile/kernel/unaligned.c b/arch/tile/kernel/unaligned.c
index 7d9a83be0aca..d075f92ccee0 100644
--- a/arch/tile/kernel/unaligned.c
+++ b/arch/tile/kernel/unaligned.c
@@ -25,6 +25,7 @@
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/compat.h> 26#include <linux/compat.h>
27#include <linux/prctl.h> 27#include <linux/prctl.h>
28#include <linux/context_tracking.h>
28#include <asm/cacheflush.h> 29#include <asm/cacheflush.h>
29#include <asm/traps.h> 30#include <asm/traps.h>
30#include <asm/uaccess.h> 31#include <asm/uaccess.h>
@@ -1448,6 +1449,7 @@ void jit_bundle_gen(struct pt_regs *regs, tilegx_bundle_bits bundle,
1448 1449
1449void do_unaligned(struct pt_regs *regs, int vecnum) 1450void do_unaligned(struct pt_regs *regs, int vecnum)
1450{ 1451{
1452 enum ctx_state prev_state = exception_enter();
1451 tilegx_bundle_bits __user *pc; 1453 tilegx_bundle_bits __user *pc;
1452 tilegx_bundle_bits bundle; 1454 tilegx_bundle_bits bundle;
1453 struct thread_info *info = current_thread_info(); 1455 struct thread_info *info = current_thread_info();
@@ -1487,12 +1489,11 @@ void do_unaligned(struct pt_regs *regs, int vecnum)
1487 (int)unaligned_fixup, 1489 (int)unaligned_fixup,
1488 (unsigned long long)regs->ex1, 1490 (unsigned long long)regs->ex1,
1489 (unsigned long long)regs->pc); 1491 (unsigned long long)regs->pc);
1490 return; 1492 } else {
1493 /* Not fixable. Go panic. */
1494 panic("Unalign exception in Kernel. pc=%lx",
1495 regs->pc);
1491 } 1496 }
1492 /* Not fixable. Go panic. */
1493 panic("Unalign exception in Kernel. pc=%lx",
1494 regs->pc);
1495 return;
1496 } else { 1497 } else {
1497 /* 1498 /*
1498 * Try to fix the exception. If we can't, panic the 1499 * Try to fix the exception. If we can't, panic the
@@ -1501,8 +1502,8 @@ void do_unaligned(struct pt_regs *regs, int vecnum)
1501 bundle = GX_INSN_BSWAP( 1502 bundle = GX_INSN_BSWAP(
1502 *((tilegx_bundle_bits *)(regs->pc))); 1503 *((tilegx_bundle_bits *)(regs->pc)));
1503 jit_bundle_gen(regs, bundle, align_ctl); 1504 jit_bundle_gen(regs, bundle, align_ctl);
1504 return;
1505 } 1505 }
1506 goto done;
1506 } 1507 }
1507 1508
1508 /* 1509 /*
@@ -1526,7 +1527,7 @@ void do_unaligned(struct pt_regs *regs, int vecnum)
1526 1527
1527 trace_unhandled_signal("unaligned fixup trap", regs, 0, SIGBUS); 1528 trace_unhandled_signal("unaligned fixup trap", regs, 0, SIGBUS);
1528 force_sig_info(info.si_signo, &info, current); 1529 force_sig_info(info.si_signo, &info, current);
1529 return; 1530 goto done;
1530 } 1531 }
1531 1532
1532 1533
@@ -1543,7 +1544,7 @@ void do_unaligned(struct pt_regs *regs, int vecnum)
1543 trace_unhandled_signal("segfault in unalign fixup", regs, 1544 trace_unhandled_signal("segfault in unalign fixup", regs,
1544 (unsigned long)info.si_addr, SIGSEGV); 1545 (unsigned long)info.si_addr, SIGSEGV);
1545 force_sig_info(info.si_signo, &info, current); 1546 force_sig_info(info.si_signo, &info, current);
1546 return; 1547 goto done;
1547 } 1548 }
1548 1549
1549 if (!info->unalign_jit_base) { 1550 if (!info->unalign_jit_base) {
@@ -1578,7 +1579,7 @@ void do_unaligned(struct pt_regs *regs, int vecnum)
1578 1579
1579 if (IS_ERR((void __force *)user_page)) { 1580 if (IS_ERR((void __force *)user_page)) {
1580 pr_err("Out of kernel pages trying do_mmap\n"); 1581 pr_err("Out of kernel pages trying do_mmap\n");
1581 return; 1582 goto done;
1582 } 1583 }
1583 1584
1584 /* Save the address in the thread_info struct */ 1585 /* Save the address in the thread_info struct */
@@ -1591,6 +1592,9 @@ void do_unaligned(struct pt_regs *regs, int vecnum)
1591 1592
1592 /* Generate unalign JIT */ 1593 /* Generate unalign JIT */
1593 jit_bundle_gen(regs, GX_INSN_BSWAP(bundle), align_ctl); 1594 jit_bundle_gen(regs, GX_INSN_BSWAP(bundle), align_ctl);
1595
1596done:
1597 exception_exit(prev_state);
1594} 1598}
1595 1599
1596#endif /* __tilegx__ */ 1600#endif /* __tilegx__ */
diff --git a/arch/tile/mm/elf.c b/arch/tile/mm/elf.c
index 23f044e8a7ab..f7ddae3725a4 100644
--- a/arch/tile/mm/elf.c
+++ b/arch/tile/mm/elf.c
@@ -17,6 +17,7 @@
17#include <linux/binfmts.h> 17#include <linux/binfmts.h>
18#include <linux/compat.h> 18#include <linux/compat.h>
19#include <linux/mman.h> 19#include <linux/mman.h>
20#include <linux/file.h>
20#include <linux/elf.h> 21#include <linux/elf.h>
21#include <asm/pgtable.h> 22#include <asm/pgtable.h>
22#include <asm/pgalloc.h> 23#include <asm/pgalloc.h>
@@ -39,30 +40,34 @@ static void sim_notify_exec(const char *binary_name)
39 40
40static int notify_exec(struct mm_struct *mm) 41static int notify_exec(struct mm_struct *mm)
41{ 42{
43 int ret = 0;
42 char *buf, *path; 44 char *buf, *path;
43 struct vm_area_struct *vma; 45 struct vm_area_struct *vma;
46 struct file *exe_file;
44 47
45 if (!sim_is_simulator()) 48 if (!sim_is_simulator())
46 return 1; 49 return 1;
47 50
48 if (mm->exe_file == NULL)
49 return 0;
50
51 for (vma = current->mm->mmap; ; vma = vma->vm_next) {
52 if (vma == NULL)
53 return 0;
54 if (vma->vm_file == mm->exe_file)
55 break;
56 }
57
58 buf = (char *) __get_free_page(GFP_KERNEL); 51 buf = (char *) __get_free_page(GFP_KERNEL);
59 if (buf == NULL) 52 if (buf == NULL)
60 return 0; 53 return 0;
61 54
62 path = d_path(&mm->exe_file->f_path, buf, PAGE_SIZE); 55 exe_file = get_mm_exe_file(mm);
63 if (IS_ERR(path)) { 56 if (exe_file == NULL)
64 free_page((unsigned long)buf); 57 goto done_free;
65 return 0; 58
59 path = d_path(&exe_file->f_path, buf, PAGE_SIZE);
60 if (IS_ERR(path))
61 goto done_put;
62
63 down_read(&mm->mmap_sem);
64 for (vma = current->mm->mmap; ; vma = vma->vm_next) {
65 if (vma == NULL) {
66 up_read(&mm->mmap_sem);
67 goto done_put;
68 }
69 if (vma->vm_file == exe_file)
70 break;
66 } 71 }
67 72
68 /* 73 /*
@@ -80,14 +85,20 @@ static int notify_exec(struct mm_struct *mm)
80 __insn_mtspr(SPR_SIM_CONTROL, 85 __insn_mtspr(SPR_SIM_CONTROL,
81 (SIM_CONTROL_DLOPEN 86 (SIM_CONTROL_DLOPEN
82 | (c << _SIM_CONTROL_OPERATOR_BITS))); 87 | (c << _SIM_CONTROL_OPERATOR_BITS)));
83 if (c == '\0') 88 if (c == '\0') {
89 ret = 1; /* success */
84 break; 90 break;
91 }
85 } 92 }
86 } 93 }
94 up_read(&mm->mmap_sem);
87 95
88 sim_notify_exec(path); 96 sim_notify_exec(path);
97done_put:
98 fput(exe_file);
99done_free:
89 free_page((unsigned long)buf); 100 free_page((unsigned long)buf);
90 return 1; 101 return ret;
91} 102}
92 103
93/* Notify a running simulator, if any, that we loaded an interpreter. */ 104/* Notify a running simulator, if any, that we loaded an interpreter. */
@@ -109,8 +120,6 @@ int arch_setup_additional_pages(struct linux_binprm *bprm,
109 struct mm_struct *mm = current->mm; 120 struct mm_struct *mm = current->mm;
110 int retval = 0; 121 int retval = 0;
111 122
112 down_write(&mm->mmap_sem);
113
114 /* 123 /*
115 * Notify the simulator that an exec just occurred. 124 * Notify the simulator that an exec just occurred.
116 * If we can't find the filename of the mapping, just use 125 * If we can't find the filename of the mapping, just use
@@ -119,6 +128,8 @@ int arch_setup_additional_pages(struct linux_binprm *bprm,
119 if (!notify_exec(mm)) 128 if (!notify_exec(mm))
120 sim_notify_exec(bprm->filename); 129 sim_notify_exec(bprm->filename);
121 130
131 down_write(&mm->mmap_sem);
132
122 retval = setup_vdso_pages(); 133 retval = setup_vdso_pages();
123 134
124#ifndef __tilegx__ 135#ifndef __tilegx__
diff --git a/arch/tile/mm/fault.c b/arch/tile/mm/fault.c
index 0f61a73534e6..e83cc999da02 100644
--- a/arch/tile/mm/fault.c
+++ b/arch/tile/mm/fault.c
@@ -35,6 +35,7 @@
35#include <linux/syscalls.h> 35#include <linux/syscalls.h>
36#include <linux/uaccess.h> 36#include <linux/uaccess.h>
37#include <linux/kdebug.h> 37#include <linux/kdebug.h>
38#include <linux/context_tracking.h>
38 39
39#include <asm/pgalloc.h> 40#include <asm/pgalloc.h>
40#include <asm/sections.h> 41#include <asm/sections.h>
@@ -702,6 +703,7 @@ void do_page_fault(struct pt_regs *regs, int fault_num,
702 unsigned long address, unsigned long write) 703 unsigned long address, unsigned long write)
703{ 704{
704 int is_page_fault; 705 int is_page_fault;
706 enum ctx_state prev_state = exception_enter();
705 707
706#ifdef CONFIG_KPROBES 708#ifdef CONFIG_KPROBES
707 /* 709 /*
@@ -711,7 +713,7 @@ void do_page_fault(struct pt_regs *regs, int fault_num,
711 */ 713 */
712 if (notify_die(DIE_PAGE_FAULT, "page fault", regs, -1, 714 if (notify_die(DIE_PAGE_FAULT, "page fault", regs, -1,
713 regs->faultnum, SIGSEGV) == NOTIFY_STOP) 715 regs->faultnum, SIGSEGV) == NOTIFY_STOP)
714 return; 716 goto done;
715#endif 717#endif
716 718
717#ifdef __tilegx__ 719#ifdef __tilegx__
@@ -750,7 +752,6 @@ void do_page_fault(struct pt_regs *regs, int fault_num,
750 current->comm, current->pid, pc, address); 752 current->comm, current->pid, pc, address);
751 show_regs(regs); 753 show_regs(regs);
752 do_group_exit(SIGKILL); 754 do_group_exit(SIGKILL);
753 return;
754 } 755 }
755 } 756 }
756#else 757#else
@@ -834,12 +835,15 @@ void do_page_fault(struct pt_regs *regs, int fault_num,
834 async->is_fault = is_page_fault; 835 async->is_fault = is_page_fault;
835 async->is_write = write; 836 async->is_write = write;
836 async->address = address; 837 async->address = address;
837 return; 838 goto done;
838 } 839 }
839 } 840 }
840#endif 841#endif
841 842
842 handle_page_fault(regs, fault_num, is_page_fault, address, write); 843 handle_page_fault(regs, fault_num, is_page_fault, address, write);
844
845done:
846 exception_exit(prev_state);
843} 847}
844 848
845 849
diff --git a/arch/tile/mm/init.c b/arch/tile/mm/init.c
index ace32d7d3864..5bd252e3fdc5 100644
--- a/arch/tile/mm/init.c
+++ b/arch/tile/mm/init.c
@@ -233,9 +233,12 @@ static pgprot_t __init init_pgprot(ulong address)
233 if (kdata_huge) 233 if (kdata_huge)
234 return construct_pgprot(PAGE_KERNEL, PAGE_HOME_HASH); 234 return construct_pgprot(PAGE_KERNEL, PAGE_HOME_HASH);
235 235
236 /* We map the aliased pages of permanent text inaccessible. */ 236 /*
237 * We map the aliased pages of permanent text so we can
238 * update them if necessary, for ftrace, etc.
239 */
237 if (address < (ulong) _sinittext - CODE_DELTA) 240 if (address < (ulong) _sinittext - CODE_DELTA)
238 return PAGE_NONE; 241 return construct_pgprot(PAGE_KERNEL, PAGE_HOME_HASH);
239 242
240 /* We map read-only data non-coherent for performance. */ 243 /* We map read-only data non-coherent for performance. */
241 if ((address >= (ulong) __start_rodata && 244 if ((address >= (ulong) __start_rodata &&
diff --git a/arch/x86/include/asm/seccomp.h b/arch/x86/include/asm/seccomp.h
index 0f3d7f099224..0c8c7c8861b4 100644
--- a/arch/x86/include/asm/seccomp.h
+++ b/arch/x86/include/asm/seccomp.h
@@ -1,5 +1,20 @@
1#ifndef _ASM_X86_SECCOMP_H
2#define _ASM_X86_SECCOMP_H
3
4#include <asm/unistd.h>
5
1#ifdef CONFIG_X86_32 6#ifdef CONFIG_X86_32
2# include <asm/seccomp_32.h> 7#define __NR_seccomp_sigreturn __NR_sigreturn
3#else
4# include <asm/seccomp_64.h>
5#endif 8#endif
9
10#ifdef CONFIG_COMPAT
11#include <asm/ia32_unistd.h>
12#define __NR_seccomp_read_32 __NR_ia32_read
13#define __NR_seccomp_write_32 __NR_ia32_write
14#define __NR_seccomp_exit_32 __NR_ia32_exit
15#define __NR_seccomp_sigreturn_32 __NR_ia32_sigreturn
16#endif
17
18#include <asm-generic/seccomp.h>
19
20#endif /* _ASM_X86_SECCOMP_H */
diff --git a/arch/x86/include/asm/seccomp_32.h b/arch/x86/include/asm/seccomp_32.h
deleted file mode 100644
index b811d6f5780c..000000000000
--- a/arch/x86/include/asm/seccomp_32.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef _ASM_X86_SECCOMP_32_H
2#define _ASM_X86_SECCOMP_32_H
3
4#include <linux/unistd.h>
5
6#define __NR_seccomp_read __NR_read
7#define __NR_seccomp_write __NR_write
8#define __NR_seccomp_exit __NR_exit
9#define __NR_seccomp_sigreturn __NR_sigreturn
10
11#endif /* _ASM_X86_SECCOMP_32_H */
diff --git a/arch/x86/include/asm/seccomp_64.h b/arch/x86/include/asm/seccomp_64.h
deleted file mode 100644
index 84ec1bd161a5..000000000000
--- a/arch/x86/include/asm/seccomp_64.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef _ASM_X86_SECCOMP_64_H
2#define _ASM_X86_SECCOMP_64_H
3
4#include <linux/unistd.h>
5#include <asm/ia32_unistd.h>
6
7#define __NR_seccomp_read __NR_read
8#define __NR_seccomp_write __NR_write
9#define __NR_seccomp_exit __NR_exit
10#define __NR_seccomp_sigreturn __NR_rt_sigreturn
11
12#define __NR_seccomp_read_32 __NR_ia32_read
13#define __NR_seccomp_write_32 __NR_ia32_write
14#define __NR_seccomp_exit_32 __NR_ia32_exit
15#define __NR_seccomp_sigreturn_32 __NR_ia32_sigreturn
16
17#endif /* _ASM_X86_SECCOMP_64_H */
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index e31d4949124a..87be10e8b57a 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -428,6 +428,36 @@ config DEFAULT_MEM_SIZE
428 428
429 If unsure, leave the default value here. 429 If unsure, leave the default value here.
430 430
431config XTFPGA_LCD
432 bool "Enable XTFPGA LCD driver"
433 depends on XTENSA_PLATFORM_XTFPGA
434 default n
435 help
436 There's a 2x16 LCD on most of XTFPGA boards, kernel may output
437 progress messages there during bootup/shutdown. It may be useful
438 during board bringup.
439
440 If unsure, say N.
441
442config XTFPGA_LCD_BASE_ADDR
443 hex "XTFPGA LCD base address"
444 depends on XTFPGA_LCD
445 default "0x0d0c0000"
446 help
447 Base address of the LCD controller inside KIO region.
448 Different boards from XTFPGA family have LCD controller at different
449 addresses. Please consult prototyping user guide for your board for
450 the correct address. Wrong address here may lead to hardware lockup.
451
452config XTFPGA_LCD_8BIT_ACCESS
453 bool "Use 8-bit access to XTFPGA LCD"
454 depends on XTFPGA_LCD
455 default n
456 help
457 LCD may be connected with 4- or 8-bit interface, 8-bit access may
458 only be used with 8-bit interface. Please consult prototyping user
459 guide for your board for the correct interface width.
460
431endmenu 461endmenu
432 462
433menu "Executable file formats" 463menu "Executable file formats"
diff --git a/arch/xtensa/boot/dts/xtfpga.dtsi b/arch/xtensa/boot/dts/xtfpga.dtsi
index dec9178840f6..cd0b9e34adc8 100644
--- a/arch/xtensa/boot/dts/xtfpga.dtsi
+++ b/arch/xtensa/boot/dts/xtfpga.dtsi
@@ -40,6 +40,12 @@
40 #clock-cells = <0>; 40 #clock-cells = <0>;
41 compatible = "fixed-clock"; 41 compatible = "fixed-clock";
42 }; 42 };
43
44 clk54: clk54 {
45 #clock-cells = <0>;
46 compatible = "fixed-clock";
47 clock-frequency = <54000000>;
48 };
43 }; 49 };
44 50
45 soc { 51 soc {
@@ -65,5 +71,63 @@
65 local-mac-address = [00 50 c2 13 6f 00]; 71 local-mac-address = [00 50 c2 13 6f 00];
66 clocks = <&osc>; 72 clocks = <&osc>;
67 }; 73 };
74
75 i2s0: xtfpga-i2s@0d080000 {
76 #sound-dai-cells = <0>;
77 compatible = "cdns,xtfpga-i2s";
78 reg = <0x0d080000 0x40>;
79 interrupts = <2 1>; /* external irq 2 */
80 clocks = <&cdce706 4>;
81 };
82
83 i2c0: i2c-master@0d090000 {
84 compatible = "opencores,i2c-ocores";
85 #address-cells = <1>;
86 #size-cells = <0>;
87 reg = <0x0d090000 0x20>;
88 reg-shift = <2>;
89 reg-io-width = <1>;
90 interrupts = <4 1>;
91 clocks = <&osc>;
92
93 cdce706: clock-synth@69 {
94 compatible = "ti,cdce706";
95 #clock-cells = <1>;
96 reg = <0x69>;
97 clocks = <&clk54>;
98 clock-names = "clk_in0";
99 };
100 };
101
102 spi0: spi-master@0d0a0000 {
103 compatible = "cdns,xtfpga-spi";
104 #address-cells = <1>;
105 #size-cells = <0>;
106 reg = <0x0d0a0000 0xc>;
107
108 tlv320aic23: sound-codec@0 {
109 #sound-dai-cells = <0>;
110 compatible = "tlv320aic23";
111 reg = <0>;
112 spi-max-frequency = <12500000>;
113 };
114 };
115 };
116
117 sound {
118 compatible = "simple-audio-card";
119 simple-audio-card,format = "i2s";
120 simple-audio-card,mclk-fs = <256>;
121
122 simple-audio-card,cpu {
123 sound-dai = <&i2s0>;
124 };
125
126 simple-audio-card,codec {
127 sound-dai = <&tlv320aic23>;
128 simple-audio-card,bitclock-master = <0>;
129 simple-audio-card,frame-master = <0>;
130 clocks = <&cdce706 4>;
131 };
68 }; 132 };
69}; 133};
diff --git a/arch/xtensa/configs/audio_kc705_defconfig b/arch/xtensa/configs/audio_kc705_defconfig
new file mode 100644
index 000000000000..c4904db15582
--- /dev/null
+++ b/arch/xtensa/configs/audio_kc705_defconfig
@@ -0,0 +1,142 @@
1CONFIG_SYSVIPC=y
2CONFIG_POSIX_MQUEUE=y
3CONFIG_FHANDLE=y
4CONFIG_IRQ_DOMAIN_DEBUG=y
5CONFIG_NO_HZ_IDLE=y
6CONFIG_HIGH_RES_TIMERS=y
7CONFIG_IRQ_TIME_ACCOUNTING=y
8CONFIG_BSD_PROCESS_ACCT=y
9CONFIG_CGROUP_DEBUG=y
10CONFIG_CGROUP_FREEZER=y
11CONFIG_CGROUP_DEVICE=y
12CONFIG_CPUSETS=y
13CONFIG_CGROUP_CPUACCT=y
14CONFIG_MEMCG=y
15CONFIG_NAMESPACES=y
16CONFIG_SCHED_AUTOGROUP=y
17CONFIG_RELAY=y
18CONFIG_BLK_DEV_INITRD=y
19CONFIG_EXPERT=y
20CONFIG_SYSCTL_SYSCALL=y
21CONFIG_KALLSYMS_ALL=y
22CONFIG_PROFILING=y
23CONFIG_OPROFILE=y
24CONFIG_MODULES=y
25CONFIG_MODULE_UNLOAD=y
26# CONFIG_IOSCHED_DEADLINE is not set
27# CONFIG_IOSCHED_CFQ is not set
28CONFIG_XTENSA_VARIANT_CUSTOM=y
29CONFIG_XTENSA_VARIANT_CUSTOM_NAME="test_kc705_hifi"
30CONFIG_XTENSA_UNALIGNED_USER=y
31CONFIG_PREEMPT=y
32CONFIG_HIGHMEM=y
33# CONFIG_PCI is not set
34CONFIG_XTENSA_PLATFORM_XTFPGA=y
35CONFIG_CMDLINE_BOOL=y
36CONFIG_CMDLINE="earlycon=uart8250,mmio32,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug"
37CONFIG_USE_OF=y
38CONFIG_BUILTIN_DTB="kc705"
39# CONFIG_COMPACTION is not set
40# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
41CONFIG_PM=y
42CONFIG_NET=y
43CONFIG_PACKET=y
44CONFIG_UNIX=y
45CONFIG_INET=y
46CONFIG_IP_MULTICAST=y
47CONFIG_IP_PNP=y
48CONFIG_IP_PNP_DHCP=y
49CONFIG_IP_PNP_BOOTP=y
50CONFIG_IP_PNP_RARP=y
51# CONFIG_IPV6 is not set
52CONFIG_NETFILTER=y
53# CONFIG_WIRELESS is not set
54CONFIG_DEVTMPFS=y
55CONFIG_DEVTMPFS_MOUNT=y
56# CONFIG_STANDALONE is not set
57CONFIG_MTD=y
58CONFIG_MTD_CFI=y
59CONFIG_MTD_JEDECPROBE=y
60CONFIG_MTD_CFI_INTELEXT=y
61CONFIG_MTD_CFI_AMDSTD=y
62CONFIG_MTD_CFI_STAA=y
63CONFIG_MTD_PHYSMAP_OF=y
64CONFIG_MTD_UBI=y
65CONFIG_BLK_DEV_LOOP=y
66CONFIG_BLK_DEV_RAM=y
67CONFIG_SCSI=y
68CONFIG_BLK_DEV_SD=y
69CONFIG_NETDEVICES=y
70# CONFIG_NET_VENDOR_ARC is not set
71# CONFIG_NET_VENDOR_BROADCOM is not set
72# CONFIG_NET_VENDOR_INTEL is not set
73# CONFIG_NET_VENDOR_MARVELL is not set
74# CONFIG_NET_VENDOR_MICREL is not set
75# CONFIG_NET_VENDOR_NATSEMI is not set
76# CONFIG_NET_VENDOR_SAMSUNG is not set
77# CONFIG_NET_VENDOR_SEEQ is not set
78# CONFIG_NET_VENDOR_SMSC is not set
79# CONFIG_NET_VENDOR_STMICRO is not set
80# CONFIG_NET_VENDOR_VIA is not set
81# CONFIG_NET_VENDOR_WIZNET is not set
82CONFIG_MARVELL_PHY=y
83# CONFIG_WLAN is not set
84# CONFIG_INPUT_MOUSEDEV is not set
85# CONFIG_INPUT_KEYBOARD is not set
86# CONFIG_INPUT_MOUSE is not set
87# CONFIG_SERIO is not set
88CONFIG_SERIAL_8250=y
89# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
90CONFIG_SERIAL_8250_CONSOLE=y
91CONFIG_SERIAL_OF_PLATFORM=y
92CONFIG_HW_RANDOM=y
93CONFIG_I2C=y
94CONFIG_I2C_OCORES=y
95CONFIG_SPI=y
96CONFIG_SPI_XTENSA_XTFPGA=y
97# CONFIG_HWMON is not set
98CONFIG_WATCHDOG=y
99CONFIG_WATCHDOG_NOWAYOUT=y
100CONFIG_SOFT_WATCHDOG=y
101# CONFIG_VGA_CONSOLE is not set
102CONFIG_SOUND=y
103CONFIG_SND=y
104CONFIG_SND_SOC=y
105CONFIG_SND_SOC_XTFPGA_I2S=y
106CONFIG_SND_SOC_TLV320AIC23_SPI=y
107CONFIG_SND_SIMPLE_CARD=y
108# CONFIG_USB_SUPPORT is not set
109CONFIG_COMMON_CLK_CDCE706=y
110# CONFIG_IOMMU_SUPPORT is not set
111CONFIG_EXT3_FS=y
112CONFIG_EXT4_FS=y
113CONFIG_FANOTIFY=y
114CONFIG_VFAT_FS=y
115CONFIG_PROC_KCORE=y
116CONFIG_TMPFS=y
117CONFIG_TMPFS_POSIX_ACL=y
118CONFIG_UBIFS_FS=y
119CONFIG_NFS_FS=y
120CONFIG_NFS_V4=y
121CONFIG_NFS_SWAP=y
122CONFIG_ROOT_NFS=y
123CONFIG_SUNRPC_DEBUG=y
124CONFIG_NLS_CODEPAGE_437=y
125CONFIG_NLS_ISO8859_1=y
126CONFIG_PRINTK_TIME=y
127CONFIG_DYNAMIC_DEBUG=y
128CONFIG_DEBUG_INFO=y
129CONFIG_MAGIC_SYSRQ=y
130CONFIG_LOCKUP_DETECTOR=y
131# CONFIG_SCHED_DEBUG is not set
132CONFIG_SCHEDSTATS=y
133CONFIG_TIMER_STATS=y
134CONFIG_DEBUG_RT_MUTEXES=y
135CONFIG_DEBUG_SPINLOCK=y
136CONFIG_DEBUG_MUTEXES=y
137CONFIG_DEBUG_ATOMIC_SLEEP=y
138CONFIG_STACKTRACE=y
139CONFIG_RCU_TRACE=y
140# CONFIG_FTRACE is not set
141# CONFIG_S32C1I_SELFTEST is not set
142CONFIG_CRYPTO_ANSI_CPRNG=y
diff --git a/arch/xtensa/include/uapi/asm/unistd.h b/arch/xtensa/include/uapi/asm/unistd.h
index db5bb72e2f4e..b95c30594355 100644
--- a/arch/xtensa/include/uapi/asm/unistd.h
+++ b/arch/xtensa/include/uapi/asm/unistd.h
@@ -715,7 +715,7 @@ __SYSCALL(323, sys_process_vm_writev, 6)
715__SYSCALL(324, sys_name_to_handle_at, 5) 715__SYSCALL(324, sys_name_to_handle_at, 5)
716#define __NR_open_by_handle_at 325 716#define __NR_open_by_handle_at 325
717__SYSCALL(325, sys_open_by_handle_at, 3) 717__SYSCALL(325, sys_open_by_handle_at, 3)
718#define __NR_sync_file_range 326 718#define __NR_sync_file_range2 326
719__SYSCALL(326, sys_sync_file_range2, 6) 719__SYSCALL(326, sys_sync_file_range2, 6)
720#define __NR_perf_event_open 327 720#define __NR_perf_event_open 327
721__SYSCALL(327, sys_perf_event_open, 5) 721__SYSCALL(327, sys_perf_event_open, 5)
@@ -749,8 +749,12 @@ __SYSCALL(337, sys_seccomp, 3)
749__SYSCALL(338, sys_getrandom, 3) 749__SYSCALL(338, sys_getrandom, 3)
750#define __NR_memfd_create 339 750#define __NR_memfd_create 339
751__SYSCALL(339, sys_memfd_create, 2) 751__SYSCALL(339, sys_memfd_create, 2)
752#define __NR_bpf 340
753__SYSCALL(340, sys_bpf, 3)
754#define __NR_execveat 341
755__SYSCALL(341, sys_execveat, 5)
752 756
753#define __NR_syscall_count 340 757#define __NR_syscall_count 342
754 758
755/* 759/*
756 * sysxtensa syscall handler 760 * sysxtensa syscall handler
diff --git a/arch/xtensa/kernel/Makefile b/arch/xtensa/kernel/Makefile
index 18d962a8c0c2..d3a0f0fd56dd 100644
--- a/arch/xtensa/kernel/Makefile
+++ b/arch/xtensa/kernel/Makefile
@@ -29,6 +29,7 @@ AFLAGS_head.o += -mtext-section-literals
29 29
30sed-y = -e 's/\*(\(\.[a-z]*it\|\.ref\|\)\.text)/*(\1.literal \1.text)/g' \ 30sed-y = -e 's/\*(\(\.[a-z]*it\|\.ref\|\)\.text)/*(\1.literal \1.text)/g' \
31 -e 's/\.text\.unlikely/.literal.unlikely .text.unlikely/g' \ 31 -e 's/\.text\.unlikely/.literal.unlikely .text.unlikely/g' \
32 -e 's/\*(\(\.text .*\))/*(.literal \1)/g' \
32 -e 's/\*(\(\.text\.[a-z]*\))/*(\1.literal \1)/g' 33 -e 's/\*(\(\.text\.[a-z]*\))/*(\1.literal \1)/g'
33 34
34quiet_cmd__cpp_lds_S = LDS $@ 35quiet_cmd__cpp_lds_S = LDS $@
diff --git a/arch/xtensa/platforms/iss/network.c b/arch/xtensa/platforms/iss/network.c
index d05f8feeb8d7..17b1ef3232e4 100644
--- a/arch/xtensa/platforms/iss/network.c
+++ b/arch/xtensa/platforms/iss/network.c
@@ -349,8 +349,8 @@ static void iss_net_timer(unsigned long priv)
349{ 349{
350 struct iss_net_private *lp = (struct iss_net_private *)priv; 350 struct iss_net_private *lp = (struct iss_net_private *)priv;
351 351
352 spin_lock(&lp->lock);
353 iss_net_poll(); 352 iss_net_poll();
353 spin_lock(&lp->lock);
354 mod_timer(&lp->timer, jiffies + lp->timer_val); 354 mod_timer(&lp->timer, jiffies + lp->timer_val);
355 spin_unlock(&lp->lock); 355 spin_unlock(&lp->lock);
356} 356}
@@ -361,7 +361,7 @@ static int iss_net_open(struct net_device *dev)
361 struct iss_net_private *lp = netdev_priv(dev); 361 struct iss_net_private *lp = netdev_priv(dev);
362 int err; 362 int err;
363 363
364 spin_lock(&lp->lock); 364 spin_lock_bh(&lp->lock);
365 365
366 err = lp->tp.open(lp); 366 err = lp->tp.open(lp);
367 if (err < 0) 367 if (err < 0)
@@ -376,9 +376,11 @@ static int iss_net_open(struct net_device *dev)
376 while ((err = iss_net_rx(dev)) > 0) 376 while ((err = iss_net_rx(dev)) > 0)
377 ; 377 ;
378 378
379 spin_lock(&opened_lock); 379 spin_unlock_bh(&lp->lock);
380 spin_lock_bh(&opened_lock);
380 list_add(&lp->opened_list, &opened); 381 list_add(&lp->opened_list, &opened);
381 spin_unlock(&opened_lock); 382 spin_unlock_bh(&opened_lock);
383 spin_lock_bh(&lp->lock);
382 384
383 init_timer(&lp->timer); 385 init_timer(&lp->timer);
384 lp->timer_val = ISS_NET_TIMER_VALUE; 386 lp->timer_val = ISS_NET_TIMER_VALUE;
@@ -387,7 +389,7 @@ static int iss_net_open(struct net_device *dev)
387 mod_timer(&lp->timer, jiffies + lp->timer_val); 389 mod_timer(&lp->timer, jiffies + lp->timer_val);
388 390
389out: 391out:
390 spin_unlock(&lp->lock); 392 spin_unlock_bh(&lp->lock);
391 return err; 393 return err;
392} 394}
393 395
@@ -395,7 +397,7 @@ static int iss_net_close(struct net_device *dev)
395{ 397{
396 struct iss_net_private *lp = netdev_priv(dev); 398 struct iss_net_private *lp = netdev_priv(dev);
397 netif_stop_queue(dev); 399 netif_stop_queue(dev);
398 spin_lock(&lp->lock); 400 spin_lock_bh(&lp->lock);
399 401
400 spin_lock(&opened_lock); 402 spin_lock(&opened_lock);
401 list_del(&opened); 403 list_del(&opened);
@@ -405,18 +407,17 @@ static int iss_net_close(struct net_device *dev)
405 407
406 lp->tp.close(lp); 408 lp->tp.close(lp);
407 409
408 spin_unlock(&lp->lock); 410 spin_unlock_bh(&lp->lock);
409 return 0; 411 return 0;
410} 412}
411 413
412static int iss_net_start_xmit(struct sk_buff *skb, struct net_device *dev) 414static int iss_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
413{ 415{
414 struct iss_net_private *lp = netdev_priv(dev); 416 struct iss_net_private *lp = netdev_priv(dev);
415 unsigned long flags;
416 int len; 417 int len;
417 418
418 netif_stop_queue(dev); 419 netif_stop_queue(dev);
419 spin_lock_irqsave(&lp->lock, flags); 420 spin_lock_bh(&lp->lock);
420 421
421 len = lp->tp.write(lp, &skb); 422 len = lp->tp.write(lp, &skb);
422 423
@@ -438,7 +439,7 @@ static int iss_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
438 pr_err("%s: %s failed(%d)\n", dev->name, __func__, len); 439 pr_err("%s: %s failed(%d)\n", dev->name, __func__, len);
439 } 440 }
440 441
441 spin_unlock_irqrestore(&lp->lock, flags); 442 spin_unlock_bh(&lp->lock);
442 443
443 dev_kfree_skb(skb); 444 dev_kfree_skb(skb);
444 return NETDEV_TX_OK; 445 return NETDEV_TX_OK;
@@ -466,9 +467,9 @@ static int iss_net_set_mac(struct net_device *dev, void *addr)
466 467
467 if (!is_valid_ether_addr(hwaddr->sa_data)) 468 if (!is_valid_ether_addr(hwaddr->sa_data))
468 return -EADDRNOTAVAIL; 469 return -EADDRNOTAVAIL;
469 spin_lock(&lp->lock); 470 spin_lock_bh(&lp->lock);
470 memcpy(dev->dev_addr, hwaddr->sa_data, ETH_ALEN); 471 memcpy(dev->dev_addr, hwaddr->sa_data, ETH_ALEN);
471 spin_unlock(&lp->lock); 472 spin_unlock_bh(&lp->lock);
472 return 0; 473 return 0;
473} 474}
474 475
@@ -520,11 +521,11 @@ static int iss_net_configure(int index, char *init)
520 *lp = (struct iss_net_private) { 521 *lp = (struct iss_net_private) {
521 .device_list = LIST_HEAD_INIT(lp->device_list), 522 .device_list = LIST_HEAD_INIT(lp->device_list),
522 .opened_list = LIST_HEAD_INIT(lp->opened_list), 523 .opened_list = LIST_HEAD_INIT(lp->opened_list),
523 .lock = __SPIN_LOCK_UNLOCKED(lp.lock),
524 .dev = dev, 524 .dev = dev,
525 .index = index, 525 .index = index,
526 }; 526 };
527 527
528 spin_lock_init(&lp->lock);
528 /* 529 /*
529 * If this name ends up conflicting with an existing registered 530 * If this name ends up conflicting with an existing registered
530 * netdevice, that is OK, register_netdev{,ice}() will notice this 531 * netdevice, that is OK, register_netdev{,ice}() will notice this
diff --git a/arch/xtensa/platforms/xtfpga/Makefile b/arch/xtensa/platforms/xtfpga/Makefile
index b9ae206340cd..7839d38b2337 100644
--- a/arch/xtensa/platforms/xtfpga/Makefile
+++ b/arch/xtensa/platforms/xtfpga/Makefile
@@ -6,4 +6,5 @@
6# 6#
7# Note 2! The CFLAGS definitions are in the main makefile... 7# Note 2! The CFLAGS definitions are in the main makefile...
8 8
9obj-y = setup.o lcd.o 9obj-y += setup.o
10obj-$(CONFIG_XTFPGA_LCD) += lcd.o
diff --git a/arch/xtensa/platforms/xtfpga/include/platform/hardware.h b/arch/xtensa/platforms/xtfpga/include/platform/hardware.h
index 6edd20bb4565..0a55bb9c5420 100644
--- a/arch/xtensa/platforms/xtfpga/include/platform/hardware.h
+++ b/arch/xtensa/platforms/xtfpga/include/platform/hardware.h
@@ -40,9 +40,6 @@
40 40
41/* UART */ 41/* UART */
42#define DUART16552_PADDR (XCHAL_KIO_PADDR + 0x0D050020) 42#define DUART16552_PADDR (XCHAL_KIO_PADDR + 0x0D050020)
43/* LCD instruction and data addresses. */
44#define LCD_INSTR_ADDR ((char *)IOADDR(0x0D040000))
45#define LCD_DATA_ADDR ((char *)IOADDR(0x0D040004))
46 43
47/* Misc. */ 44/* Misc. */
48#define XTFPGA_FPGAREGS_VADDR IOADDR(0x0D020000) 45#define XTFPGA_FPGAREGS_VADDR IOADDR(0x0D020000)
@@ -62,4 +59,7 @@
62 /* 5*rx buffs + 5*tx buffs */ 59 /* 5*rx buffs + 5*tx buffs */
63#define OETH_SRAMBUFF_SIZE (5 * 0x600 + 5 * 0x600) 60#define OETH_SRAMBUFF_SIZE (5 * 0x600 + 5 * 0x600)
64 61
62#define C67X00_PADDR (XCHAL_KIO_PADDR + 0x0D0D0000)
63#define C67X00_SIZE 0x10
64#define C67X00_IRQ 5
65#endif /* __XTENSA_XTAVNET_HARDWARE_H */ 65#endif /* __XTENSA_XTAVNET_HARDWARE_H */
diff --git a/arch/xtensa/platforms/xtfpga/include/platform/lcd.h b/arch/xtensa/platforms/xtfpga/include/platform/lcd.h
index 0e435645af5a..4c8541ed1139 100644
--- a/arch/xtensa/platforms/xtfpga/include/platform/lcd.h
+++ b/arch/xtensa/platforms/xtfpga/include/platform/lcd.h
@@ -11,10 +11,25 @@
11#ifndef __XTENSA_XTAVNET_LCD_H 11#ifndef __XTENSA_XTAVNET_LCD_H
12#define __XTENSA_XTAVNET_LCD_H 12#define __XTENSA_XTAVNET_LCD_H
13 13
14#ifdef CONFIG_XTFPGA_LCD
14/* Display string STR at position POS on the LCD. */ 15/* Display string STR at position POS on the LCD. */
15void lcd_disp_at_pos(char *str, unsigned char pos); 16void lcd_disp_at_pos(char *str, unsigned char pos);
16 17
17/* Shift the contents of the LCD display left or right. */ 18/* Shift the contents of the LCD display left or right. */
18void lcd_shiftleft(void); 19void lcd_shiftleft(void);
19void lcd_shiftright(void); 20void lcd_shiftright(void);
21#else
22static inline void lcd_disp_at_pos(char *str, unsigned char pos)
23{
24}
25
26static inline void lcd_shiftleft(void)
27{
28}
29
30static inline void lcd_shiftright(void)
31{
32}
33#endif
34
20#endif 35#endif
diff --git a/arch/xtensa/platforms/xtfpga/lcd.c b/arch/xtensa/platforms/xtfpga/lcd.c
index 2872301598df..4dc0c1b43f4b 100644
--- a/arch/xtensa/platforms/xtfpga/lcd.c
+++ b/arch/xtensa/platforms/xtfpga/lcd.c
@@ -1,50 +1,63 @@
1/* 1/*
2 * Driver for the LCD display on the Tensilica LX60 Board. 2 * Driver for the LCD display on the Tensilica XTFPGA board family.
3 * http://www.mytechcorp.com/cfdata/productFile/File1/MOC-16216B-B-A0A04.pdf
3 * 4 *
4 * This file is subject to the terms and conditions of the GNU General Public 5 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive 6 * License. See the file "COPYING" in the main directory of this archive
6 * for more details. 7 * for more details.
7 * 8 *
8 * Copyright (C) 2001, 2006 Tensilica Inc. 9 * Copyright (C) 2001, 2006 Tensilica Inc.
10 * Copyright (C) 2015 Cadence Design Systems Inc.
9 */ 11 */
10 12
11/* 13#include <linux/delay.h>
12 *
13 * FIXME: this code is from the examples from the LX60 user guide.
14 *
15 * The lcd_pause function does busy waiting, which is probably not
16 * great. Maybe the code could be changed to use kernel timers, or
17 * change the hardware to not need to wait.
18 */
19
20#include <linux/init.h> 14#include <linux/init.h>
21#include <linux/io.h> 15#include <linux/io.h>
22 16
23#include <platform/hardware.h> 17#include <platform/hardware.h>
24#include <platform/lcd.h> 18#include <platform/lcd.h>
25#include <linux/delay.h>
26 19
27#define LCD_PAUSE_ITERATIONS 4000 20/* LCD instruction and data addresses. */
21#define LCD_INSTR_ADDR ((char *)IOADDR(CONFIG_XTFPGA_LCD_BASE_ADDR))
22#define LCD_DATA_ADDR (LCD_INSTR_ADDR + 4)
23
28#define LCD_CLEAR 0x1 24#define LCD_CLEAR 0x1
29#define LCD_DISPLAY_ON 0xc 25#define LCD_DISPLAY_ON 0xc
30 26
31/* 8bit and 2 lines display */ 27/* 8bit and 2 lines display */
32#define LCD_DISPLAY_MODE8BIT 0x38 28#define LCD_DISPLAY_MODE8BIT 0x38
29#define LCD_DISPLAY_MODE4BIT 0x28
33#define LCD_DISPLAY_POS 0x80 30#define LCD_DISPLAY_POS 0x80
34#define LCD_SHIFT_LEFT 0x18 31#define LCD_SHIFT_LEFT 0x18
35#define LCD_SHIFT_RIGHT 0x1c 32#define LCD_SHIFT_RIGHT 0x1c
36 33
34static void lcd_put_byte(u8 *addr, u8 data)
35{
36#ifdef CONFIG_XTFPGA_LCD_8BIT_ACCESS
37 ACCESS_ONCE(*addr) = data;
38#else
39 ACCESS_ONCE(*addr) = data & 0xf0;
40 ACCESS_ONCE(*addr) = (data << 4) & 0xf0;
41#endif
42}
43
37static int __init lcd_init(void) 44static int __init lcd_init(void)
38{ 45{
39 *LCD_INSTR_ADDR = LCD_DISPLAY_MODE8BIT; 46 ACCESS_ONCE(*LCD_INSTR_ADDR) = LCD_DISPLAY_MODE8BIT;
40 mdelay(5); 47 mdelay(5);
41 *LCD_INSTR_ADDR = LCD_DISPLAY_MODE8BIT; 48 ACCESS_ONCE(*LCD_INSTR_ADDR) = LCD_DISPLAY_MODE8BIT;
42 udelay(200); 49 udelay(200);
43 *LCD_INSTR_ADDR = LCD_DISPLAY_MODE8BIT; 50 ACCESS_ONCE(*LCD_INSTR_ADDR) = LCD_DISPLAY_MODE8BIT;
51 udelay(50);
52#ifndef CONFIG_XTFPGA_LCD_8BIT_ACCESS
53 ACCESS_ONCE(*LCD_INSTR_ADDR) = LCD_DISPLAY_MODE4BIT;
54 udelay(50);
55 lcd_put_byte(LCD_INSTR_ADDR, LCD_DISPLAY_MODE4BIT);
44 udelay(50); 56 udelay(50);
45 *LCD_INSTR_ADDR = LCD_DISPLAY_ON; 57#endif
58 lcd_put_byte(LCD_INSTR_ADDR, LCD_DISPLAY_ON);
46 udelay(50); 59 udelay(50);
47 *LCD_INSTR_ADDR = LCD_CLEAR; 60 lcd_put_byte(LCD_INSTR_ADDR, LCD_CLEAR);
48 mdelay(10); 61 mdelay(10);
49 lcd_disp_at_pos("XTENSA LINUX", 0); 62 lcd_disp_at_pos("XTENSA LINUX", 0);
50 return 0; 63 return 0;
@@ -52,10 +65,10 @@ static int __init lcd_init(void)
52 65
53void lcd_disp_at_pos(char *str, unsigned char pos) 66void lcd_disp_at_pos(char *str, unsigned char pos)
54{ 67{
55 *LCD_INSTR_ADDR = LCD_DISPLAY_POS | pos; 68 lcd_put_byte(LCD_INSTR_ADDR, LCD_DISPLAY_POS | pos);
56 udelay(100); 69 udelay(100);
57 while (*str != 0) { 70 while (*str != 0) {
58 *LCD_DATA_ADDR = *str; 71 lcd_put_byte(LCD_DATA_ADDR, *str);
59 udelay(200); 72 udelay(200);
60 str++; 73 str++;
61 } 74 }
@@ -63,13 +76,13 @@ void lcd_disp_at_pos(char *str, unsigned char pos)
63 76
64void lcd_shiftleft(void) 77void lcd_shiftleft(void)
65{ 78{
66 *LCD_INSTR_ADDR = LCD_SHIFT_LEFT; 79 lcd_put_byte(LCD_INSTR_ADDR, LCD_SHIFT_LEFT);
67 udelay(50); 80 udelay(50);
68} 81}
69 82
70void lcd_shiftright(void) 83void lcd_shiftright(void)
71{ 84{
72 *LCD_INSTR_ADDR = LCD_SHIFT_RIGHT; 85 lcd_put_byte(LCD_INSTR_ADDR, LCD_SHIFT_RIGHT);
73 udelay(50); 86 udelay(50);
74} 87}
75 88
diff --git a/arch/xtensa/platforms/xtfpga/setup.c b/arch/xtensa/platforms/xtfpga/setup.c
index 57fd08b36f51..b4cf70e535ab 100644
--- a/arch/xtensa/platforms/xtfpga/setup.c
+++ b/arch/xtensa/platforms/xtfpga/setup.c
@@ -189,6 +189,7 @@ void __init platform_calibrate_ccount(void)
189#include <linux/serial_8250.h> 189#include <linux/serial_8250.h>
190#include <linux/if.h> 190#include <linux/if.h>
191#include <net/ethoc.h> 191#include <net/ethoc.h>
192#include <linux/usb/c67x00.h>
192 193
193/*---------------------------------------------------------------------------- 194/*----------------------------------------------------------------------------
194 * Ethernet -- OpenCores Ethernet MAC (ethoc driver) 195 * Ethernet -- OpenCores Ethernet MAC (ethoc driver)
@@ -233,6 +234,38 @@ static struct platform_device ethoc_device = {
233}; 234};
234 235
235/*---------------------------------------------------------------------------- 236/*----------------------------------------------------------------------------
237 * USB Host/Device -- Cypress CY7C67300
238 */
239
240static struct resource c67x00_res[] = {
241 [0] = { /* register space */
242 .start = C67X00_PADDR,
243 .end = C67X00_PADDR + C67X00_SIZE - 1,
244 .flags = IORESOURCE_MEM,
245 },
246 [1] = { /* IRQ number */
247 .start = C67X00_IRQ,
248 .end = C67X00_IRQ,
249 .flags = IORESOURCE_IRQ,
250 },
251};
252
253static struct c67x00_platform_data c67x00_pdata = {
254 .sie_config = C67X00_SIE1_HOST | C67X00_SIE2_UNUSED,
255 .hpi_regstep = 4,
256};
257
258static struct platform_device c67x00_device = {
259 .name = "c67x00",
260 .id = -1,
261 .num_resources = ARRAY_SIZE(c67x00_res),
262 .resource = c67x00_res,
263 .dev = {
264 .platform_data = &c67x00_pdata,
265 },
266};
267
268/*----------------------------------------------------------------------------
236 * UART 269 * UART
237 */ 270 */
238 271
@@ -268,6 +301,7 @@ static struct platform_device xtavnet_uart = {
268/* platform devices */ 301/* platform devices */
269static struct platform_device *platform_devices[] __initdata = { 302static struct platform_device *platform_devices[] __initdata = {
270 &ethoc_device, 303 &ethoc_device,
304 &c67x00_device,
271 &xtavnet_uart, 305 &xtavnet_uart,
272}; 306};
273 307
diff --git a/block/blk-core.c b/block/blk-core.c
index 794c3e7f01cf..fd154b94447a 100644
--- a/block/blk-core.c
+++ b/block/blk-core.c
@@ -557,6 +557,18 @@ void blk_cleanup_queue(struct request_queue *q)
557} 557}
558EXPORT_SYMBOL(blk_cleanup_queue); 558EXPORT_SYMBOL(blk_cleanup_queue);
559 559
560/* Allocate memory local to the request queue */
561static void *alloc_request_struct(gfp_t gfp_mask, void *data)
562{
563 int nid = (int)(long)data;
564 return kmem_cache_alloc_node(request_cachep, gfp_mask, nid);
565}
566
567static void free_request_struct(void *element, void *unused)
568{
569 kmem_cache_free(request_cachep, element);
570}
571
560int blk_init_rl(struct request_list *rl, struct request_queue *q, 572int blk_init_rl(struct request_list *rl, struct request_queue *q,
561 gfp_t gfp_mask) 573 gfp_t gfp_mask)
562{ 574{
@@ -569,9 +581,10 @@ int blk_init_rl(struct request_list *rl, struct request_queue *q,
569 init_waitqueue_head(&rl->wait[BLK_RW_SYNC]); 581 init_waitqueue_head(&rl->wait[BLK_RW_SYNC]);
570 init_waitqueue_head(&rl->wait[BLK_RW_ASYNC]); 582 init_waitqueue_head(&rl->wait[BLK_RW_ASYNC]);
571 583
572 rl->rq_pool = mempool_create_node(BLKDEV_MIN_RQ, mempool_alloc_slab, 584 rl->rq_pool = mempool_create_node(BLKDEV_MIN_RQ, alloc_request_struct,
573 mempool_free_slab, request_cachep, 585 free_request_struct,
574 gfp_mask, q->node); 586 (void *)(long)q->node, gfp_mask,
587 q->node);
575 if (!rl->rq_pool) 588 if (!rl->rq_pool)
576 return -ENOMEM; 589 return -ENOMEM;
577 590
diff --git a/block/blk-mq-sysfs.c b/block/blk-mq-sysfs.c
index 1630a20d5dcf..b79685e06b70 100644
--- a/block/blk-mq-sysfs.c
+++ b/block/blk-mq-sysfs.c
@@ -436,6 +436,7 @@ int blk_mq_register_disk(struct gendisk *disk)
436 436
437 return 0; 437 return 0;
438} 438}
439EXPORT_SYMBOL_GPL(blk_mq_register_disk);
439 440
440void blk_mq_sysfs_unregister(struct request_queue *q) 441void blk_mq_sysfs_unregister(struct request_queue *q)
441{ 442{
diff --git a/block/blk-mq.c b/block/blk-mq.c
index 33c428530193..ade8a2d1b0aa 100644
--- a/block/blk-mq.c
+++ b/block/blk-mq.c
@@ -33,7 +33,6 @@ static DEFINE_MUTEX(all_q_mutex);
33static LIST_HEAD(all_q_list); 33static LIST_HEAD(all_q_list);
34 34
35static void __blk_mq_run_hw_queue(struct blk_mq_hw_ctx *hctx); 35static void __blk_mq_run_hw_queue(struct blk_mq_hw_ctx *hctx);
36static void blk_mq_run_queues(struct request_queue *q);
37 36
38/* 37/*
39 * Check if any of the ctx's have pending work in this hardware queue 38 * Check if any of the ctx's have pending work in this hardware queue
@@ -42,7 +41,7 @@ static bool blk_mq_hctx_has_pending(struct blk_mq_hw_ctx *hctx)
42{ 41{
43 unsigned int i; 42 unsigned int i;
44 43
45 for (i = 0; i < hctx->ctx_map.map_size; i++) 44 for (i = 0; i < hctx->ctx_map.size; i++)
46 if (hctx->ctx_map.map[i].word) 45 if (hctx->ctx_map.map[i].word)
47 return true; 46 return true;
48 47
@@ -78,7 +77,7 @@ static void blk_mq_hctx_clear_pending(struct blk_mq_hw_ctx *hctx,
78 clear_bit(CTX_TO_BIT(hctx, ctx), &bm->word); 77 clear_bit(CTX_TO_BIT(hctx, ctx), &bm->word);
79} 78}
80 79
81static int blk_mq_queue_enter(struct request_queue *q) 80static int blk_mq_queue_enter(struct request_queue *q, gfp_t gfp)
82{ 81{
83 while (true) { 82 while (true) {
84 int ret; 83 int ret;
@@ -86,6 +85,9 @@ static int blk_mq_queue_enter(struct request_queue *q)
86 if (percpu_ref_tryget_live(&q->mq_usage_counter)) 85 if (percpu_ref_tryget_live(&q->mq_usage_counter))
87 return 0; 86 return 0;
88 87
88 if (!(gfp & __GFP_WAIT))
89 return -EBUSY;
90
89 ret = wait_event_interruptible(q->mq_freeze_wq, 91 ret = wait_event_interruptible(q->mq_freeze_wq,
90 !q->mq_freeze_depth || blk_queue_dying(q)); 92 !q->mq_freeze_depth || blk_queue_dying(q));
91 if (blk_queue_dying(q)) 93 if (blk_queue_dying(q))
@@ -118,7 +120,7 @@ void blk_mq_freeze_queue_start(struct request_queue *q)
118 120
119 if (freeze) { 121 if (freeze) {
120 percpu_ref_kill(&q->mq_usage_counter); 122 percpu_ref_kill(&q->mq_usage_counter);
121 blk_mq_run_queues(q); 123 blk_mq_run_hw_queues(q, false);
122 } 124 }
123} 125}
124EXPORT_SYMBOL_GPL(blk_mq_freeze_queue_start); 126EXPORT_SYMBOL_GPL(blk_mq_freeze_queue_start);
@@ -257,7 +259,7 @@ struct request *blk_mq_alloc_request(struct request_queue *q, int rw, gfp_t gfp,
257 struct blk_mq_alloc_data alloc_data; 259 struct blk_mq_alloc_data alloc_data;
258 int ret; 260 int ret;
259 261
260 ret = blk_mq_queue_enter(q); 262 ret = blk_mq_queue_enter(q, gfp);
261 if (ret) 263 if (ret)
262 return ERR_PTR(ret); 264 return ERR_PTR(ret);
263 265
@@ -728,7 +730,7 @@ static void flush_busy_ctxs(struct blk_mq_hw_ctx *hctx, struct list_head *list)
728 struct blk_mq_ctx *ctx; 730 struct blk_mq_ctx *ctx;
729 int i; 731 int i;
730 732
731 for (i = 0; i < hctx->ctx_map.map_size; i++) { 733 for (i = 0; i < hctx->ctx_map.size; i++) {
732 struct blk_align_bitmap *bm = &hctx->ctx_map.map[i]; 734 struct blk_align_bitmap *bm = &hctx->ctx_map.map[i];
733 unsigned int off, bit; 735 unsigned int off, bit;
734 736
@@ -904,7 +906,7 @@ void blk_mq_run_hw_queue(struct blk_mq_hw_ctx *hctx, bool async)
904 &hctx->run_work, 0); 906 &hctx->run_work, 0);
905} 907}
906 908
907static void blk_mq_run_queues(struct request_queue *q) 909void blk_mq_run_hw_queues(struct request_queue *q, bool async)
908{ 910{
909 struct blk_mq_hw_ctx *hctx; 911 struct blk_mq_hw_ctx *hctx;
910 int i; 912 int i;
@@ -915,9 +917,10 @@ static void blk_mq_run_queues(struct request_queue *q)
915 test_bit(BLK_MQ_S_STOPPED, &hctx->state)) 917 test_bit(BLK_MQ_S_STOPPED, &hctx->state))
916 continue; 918 continue;
917 919
918 blk_mq_run_hw_queue(hctx, false); 920 blk_mq_run_hw_queue(hctx, async);
919 } 921 }
920} 922}
923EXPORT_SYMBOL(blk_mq_run_hw_queues);
921 924
922void blk_mq_stop_hw_queue(struct blk_mq_hw_ctx *hctx) 925void blk_mq_stop_hw_queue(struct blk_mq_hw_ctx *hctx)
923{ 926{
@@ -1186,7 +1189,7 @@ static struct request *blk_mq_map_request(struct request_queue *q,
1186 int rw = bio_data_dir(bio); 1189 int rw = bio_data_dir(bio);
1187 struct blk_mq_alloc_data alloc_data; 1190 struct blk_mq_alloc_data alloc_data;
1188 1191
1189 if (unlikely(blk_mq_queue_enter(q))) { 1192 if (unlikely(blk_mq_queue_enter(q, GFP_KERNEL))) {
1190 bio_endio(bio, -EIO); 1193 bio_endio(bio, -EIO);
1191 return NULL; 1194 return NULL;
1192 } 1195 }
@@ -1517,8 +1520,6 @@ static int blk_mq_alloc_bitmap(struct blk_mq_ctxmap *bitmap, int node)
1517 if (!bitmap->map) 1520 if (!bitmap->map)
1518 return -ENOMEM; 1521 return -ENOMEM;
1519 1522
1520 bitmap->map_size = num_maps;
1521
1522 total = nr_cpu_ids; 1523 total = nr_cpu_ids;
1523 for (i = 0; i < num_maps; i++) { 1524 for (i = 0; i < num_maps; i++) {
1524 bitmap->map[i].depth = min(total, bitmap->bits_per_word); 1525 bitmap->map[i].depth = min(total, bitmap->bits_per_word);
@@ -1759,8 +1760,6 @@ static void blk_mq_init_cpu_queues(struct request_queue *q,
1759 continue; 1760 continue;
1760 1761
1761 hctx = q->mq_ops->map_queue(q, i); 1762 hctx = q->mq_ops->map_queue(q, i);
1762 cpumask_set_cpu(i, hctx->cpumask);
1763 hctx->nr_ctx++;
1764 1763
1765 /* 1764 /*
1766 * Set local node, IFF we have more than one hw queue. If 1765 * Set local node, IFF we have more than one hw queue. If
@@ -1797,6 +1796,8 @@ static void blk_mq_map_swqueue(struct request_queue *q)
1797 } 1796 }
1798 1797
1799 queue_for_each_hw_ctx(q, hctx, i) { 1798 queue_for_each_hw_ctx(q, hctx, i) {
1799 struct blk_mq_ctxmap *map = &hctx->ctx_map;
1800
1800 /* 1801 /*
1801 * If no software queues are mapped to this hardware queue, 1802 * If no software queues are mapped to this hardware queue,
1802 * disable it and free the request entries. 1803 * disable it and free the request entries.
@@ -1813,6 +1814,13 @@ static void blk_mq_map_swqueue(struct request_queue *q)
1813 } 1814 }
1814 1815
1815 /* 1816 /*
1817 * Set the map size to the number of mapped software queues.
1818 * This is more accurate and more efficient than looping
1819 * over all possibly mapped software queues.
1820 */
1821 map->size = DIV_ROUND_UP(hctx->nr_ctx, map->bits_per_word);
1822
1823 /*
1816 * Initialize batch roundrobin counts 1824 * Initialize batch roundrobin counts
1817 */ 1825 */
1818 hctx->next_cpu = cpumask_first(hctx->cpumask); 1826 hctx->next_cpu = cpumask_first(hctx->cpumask);
@@ -1889,9 +1897,25 @@ void blk_mq_release(struct request_queue *q)
1889 1897
1890struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *set) 1898struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *set)
1891{ 1899{
1900 struct request_queue *uninit_q, *q;
1901
1902 uninit_q = blk_alloc_queue_node(GFP_KERNEL, set->numa_node);
1903 if (!uninit_q)
1904 return ERR_PTR(-ENOMEM);
1905
1906 q = blk_mq_init_allocated_queue(set, uninit_q);
1907 if (IS_ERR(q))
1908 blk_cleanup_queue(uninit_q);
1909
1910 return q;
1911}
1912EXPORT_SYMBOL(blk_mq_init_queue);
1913
1914struct request_queue *blk_mq_init_allocated_queue(struct blk_mq_tag_set *set,
1915 struct request_queue *q)
1916{
1892 struct blk_mq_hw_ctx **hctxs; 1917 struct blk_mq_hw_ctx **hctxs;
1893 struct blk_mq_ctx __percpu *ctx; 1918 struct blk_mq_ctx __percpu *ctx;
1894 struct request_queue *q;
1895 unsigned int *map; 1919 unsigned int *map;
1896 int i; 1920 int i;
1897 1921
@@ -1926,20 +1950,16 @@ struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *set)
1926 hctxs[i]->queue_num = i; 1950 hctxs[i]->queue_num = i;
1927 } 1951 }
1928 1952
1929 q = blk_alloc_queue_node(GFP_KERNEL, set->numa_node);
1930 if (!q)
1931 goto err_hctxs;
1932
1933 /* 1953 /*
1934 * Init percpu_ref in atomic mode so that it's faster to shutdown. 1954 * Init percpu_ref in atomic mode so that it's faster to shutdown.
1935 * See blk_register_queue() for details. 1955 * See blk_register_queue() for details.
1936 */ 1956 */
1937 if (percpu_ref_init(&q->mq_usage_counter, blk_mq_usage_counter_release, 1957 if (percpu_ref_init(&q->mq_usage_counter, blk_mq_usage_counter_release,
1938 PERCPU_REF_INIT_ATOMIC, GFP_KERNEL)) 1958 PERCPU_REF_INIT_ATOMIC, GFP_KERNEL))
1939 goto err_mq_usage; 1959 goto err_hctxs;
1940 1960
1941 setup_timer(&q->timeout, blk_mq_rq_timer, (unsigned long) q); 1961 setup_timer(&q->timeout, blk_mq_rq_timer, (unsigned long) q);
1942 blk_queue_rq_timeout(q, 30000); 1962 blk_queue_rq_timeout(q, set->timeout ? set->timeout : 30000);
1943 1963
1944 q->nr_queues = nr_cpu_ids; 1964 q->nr_queues = nr_cpu_ids;
1945 q->nr_hw_queues = set->nr_hw_queues; 1965 q->nr_hw_queues = set->nr_hw_queues;
@@ -1965,9 +1985,6 @@ struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *set)
1965 else 1985 else
1966 blk_queue_make_request(q, blk_sq_make_request); 1986 blk_queue_make_request(q, blk_sq_make_request);
1967 1987
1968 if (set->timeout)
1969 blk_queue_rq_timeout(q, set->timeout);
1970
1971 /* 1988 /*
1972 * Do this after blk_queue_make_request() overrides it... 1989 * Do this after blk_queue_make_request() overrides it...
1973 */ 1990 */
@@ -1979,7 +1996,7 @@ struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *set)
1979 blk_mq_init_cpu_queues(q, set->nr_hw_queues); 1996 blk_mq_init_cpu_queues(q, set->nr_hw_queues);
1980 1997
1981 if (blk_mq_init_hw_queues(q, set)) 1998 if (blk_mq_init_hw_queues(q, set))
1982 goto err_mq_usage; 1999 goto err_hctxs;
1983 2000
1984 mutex_lock(&all_q_mutex); 2001 mutex_lock(&all_q_mutex);
1985 list_add_tail(&q->all_q_node, &all_q_list); 2002 list_add_tail(&q->all_q_node, &all_q_list);
@@ -1991,8 +2008,6 @@ struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *set)
1991 2008
1992 return q; 2009 return q;
1993 2010
1994err_mq_usage:
1995 blk_cleanup_queue(q);
1996err_hctxs: 2011err_hctxs:
1997 kfree(map); 2012 kfree(map);
1998 for (i = 0; i < set->nr_hw_queues; i++) { 2013 for (i = 0; i < set->nr_hw_queues; i++) {
@@ -2007,7 +2022,7 @@ err_percpu:
2007 free_percpu(ctx); 2022 free_percpu(ctx);
2008 return ERR_PTR(-ENOMEM); 2023 return ERR_PTR(-ENOMEM);
2009} 2024}
2010EXPORT_SYMBOL(blk_mq_init_queue); 2025EXPORT_SYMBOL(blk_mq_init_allocated_queue);
2011 2026
2012void blk_mq_free_queue(struct request_queue *q) 2027void blk_mq_free_queue(struct request_queue *q)
2013{ 2028{
@@ -2159,7 +2174,7 @@ int blk_mq_alloc_tag_set(struct blk_mq_tag_set *set)
2159 if (set->queue_depth < set->reserved_tags + BLK_MQ_TAG_MIN) 2174 if (set->queue_depth < set->reserved_tags + BLK_MQ_TAG_MIN)
2160 return -EINVAL; 2175 return -EINVAL;
2161 2176
2162 if (!set->nr_hw_queues || !set->ops->queue_rq || !set->ops->map_queue) 2177 if (!set->ops->queue_rq || !set->ops->map_queue)
2163 return -EINVAL; 2178 return -EINVAL;
2164 2179
2165 if (set->queue_depth > BLK_MQ_MAX_DEPTH) { 2180 if (set->queue_depth > BLK_MQ_MAX_DEPTH) {
diff --git a/drivers/acpi/acpica/acapps.h b/drivers/acpi/acpica/acapps.h
index d863016565b5..e9f0833e818d 100644
--- a/drivers/acpi/acpica/acapps.h
+++ b/drivers/acpi/acpica/acapps.h
@@ -64,15 +64,15 @@
64/* Macros for signons and file headers */ 64/* Macros for signons and file headers */
65 65
66#define ACPI_COMMON_SIGNON(utility_name) \ 66#define ACPI_COMMON_SIGNON(utility_name) \
67 "\n%s\n%s version %8.8X%s [%s]\n%s\n\n", \ 67 "\n%s\n%s version %8.8X%s\n%s\n\n", \
68 ACPICA_NAME, \ 68 ACPICA_NAME, \
69 utility_name, ((u32) ACPI_CA_VERSION), ACPI_WIDTH, __DATE__, \ 69 utility_name, ((u32) ACPI_CA_VERSION), ACPI_WIDTH, \
70 ACPICA_COPYRIGHT 70 ACPICA_COPYRIGHT
71 71
72#define ACPI_COMMON_HEADER(utility_name, prefix) \ 72#define ACPI_COMMON_HEADER(utility_name, prefix) \
73 "%s%s\n%s%s version %8.8X%s [%s]\n%s%s\n%s\n", \ 73 "%s%s\n%s%s version %8.8X%s\n%s%s\n%s\n", \
74 prefix, ACPICA_NAME, \ 74 prefix, ACPICA_NAME, \
75 prefix, utility_name, ((u32) ACPI_CA_VERSION), ACPI_WIDTH, __DATE__, \ 75 prefix, utility_name, ((u32) ACPI_CA_VERSION), ACPI_WIDTH, \
76 prefix, ACPICA_COPYRIGHT, \ 76 prefix, ACPICA_COPYRIGHT, \
77 prefix 77 prefix
78 78
diff --git a/drivers/acpi/acpica/acglobal.h b/drivers/acpi/acpica/acglobal.h
index a165d25343e8..a0c478784314 100644
--- a/drivers/acpi/acpica/acglobal.h
+++ b/drivers/acpi/acpica/acglobal.h
@@ -306,6 +306,7 @@ ACPI_INIT_GLOBAL(u8, acpi_gbl_db_output_flags, ACPI_DB_CONSOLE_OUTPUT);
306ACPI_INIT_GLOBAL(u8, acpi_gbl_no_resource_disassembly, FALSE); 306ACPI_INIT_GLOBAL(u8, acpi_gbl_no_resource_disassembly, FALSE);
307ACPI_INIT_GLOBAL(u8, acpi_gbl_ignore_noop_operator, FALSE); 307ACPI_INIT_GLOBAL(u8, acpi_gbl_ignore_noop_operator, FALSE);
308ACPI_INIT_GLOBAL(u8, acpi_gbl_cstyle_disassembly, TRUE); 308ACPI_INIT_GLOBAL(u8, acpi_gbl_cstyle_disassembly, TRUE);
309ACPI_INIT_GLOBAL(u8, acpi_gbl_force_aml_disassembly, FALSE);
309 310
310ACPI_GLOBAL(u8, acpi_gbl_db_opt_disasm); 311ACPI_GLOBAL(u8, acpi_gbl_db_opt_disasm);
311ACPI_GLOBAL(u8, acpi_gbl_db_opt_verbose); 312ACPI_GLOBAL(u8, acpi_gbl_db_opt_verbose);
@@ -321,9 +322,7 @@ ACPI_INIT_GLOBAL(u8, acpi_gbl_db_terminate_threads, FALSE);
321ACPI_INIT_GLOBAL(u8, acpi_gbl_abort_method, FALSE); 322ACPI_INIT_GLOBAL(u8, acpi_gbl_abort_method, FALSE);
322ACPI_INIT_GLOBAL(u8, acpi_gbl_method_executing, FALSE); 323ACPI_INIT_GLOBAL(u8, acpi_gbl_method_executing, FALSE);
323 324
324ACPI_GLOBAL(u8, acpi_gbl_db_opt_tables); 325ACPI_GLOBAL(u8, acpi_gbl_db_opt_no_ini_methods);
325ACPI_GLOBAL(u8, acpi_gbl_db_opt_stats);
326ACPI_GLOBAL(u8, acpi_gbl_db_opt_ini_methods);
327ACPI_GLOBAL(u8, acpi_gbl_db_opt_no_region_support); 326ACPI_GLOBAL(u8, acpi_gbl_db_opt_no_region_support);
328ACPI_GLOBAL(u8, acpi_gbl_db_output_to_file); 327ACPI_GLOBAL(u8, acpi_gbl_db_output_to_file);
329ACPI_GLOBAL(char *, acpi_gbl_db_buffer); 328ACPI_GLOBAL(char *, acpi_gbl_db_buffer);
diff --git a/drivers/acpi/acpica/aclocal.h b/drivers/acpi/acpica/aclocal.h
index 7add32e5d8c5..87b27521fcac 100644
--- a/drivers/acpi/acpica/aclocal.h
+++ b/drivers/acpi/acpica/aclocal.h
@@ -53,7 +53,7 @@ typedef u32 acpi_mutex_handle;
53 53
54/* Total number of aml opcodes defined */ 54/* Total number of aml opcodes defined */
55 55
56#define AML_NUM_OPCODES 0x81 56#define AML_NUM_OPCODES 0x82
57 57
58/* Forward declarations */ 58/* Forward declarations */
59 59
diff --git a/drivers/acpi/acpica/acmacros.h b/drivers/acpi/acpica/acmacros.h
index cf607fe69dbd..c240bdf824f2 100644
--- a/drivers/acpi/acpica/acmacros.h
+++ b/drivers/acpi/acpica/acmacros.h
@@ -63,23 +63,12 @@
63#define ACPI_SET64(ptr, val) (*ACPI_CAST64 (ptr) = (u64) (val)) 63#define ACPI_SET64(ptr, val) (*ACPI_CAST64 (ptr) = (u64) (val))
64 64
65/* 65/*
66 * printf() format helpers. These macros are workarounds for the difficulties 66 * printf() format helper. This macros is a workaround for the difficulties
67 * with emitting 64-bit integers and 64-bit pointers with the same code 67 * with emitting 64-bit integers and 64-bit pointers with the same code
68 * for both 32-bit and 64-bit hosts. 68 * for both 32-bit and 64-bit hosts.
69 */ 69 */
70#define ACPI_FORMAT_UINT64(i) ACPI_HIDWORD(i), ACPI_LODWORD(i) 70#define ACPI_FORMAT_UINT64(i) ACPI_HIDWORD(i), ACPI_LODWORD(i)
71 71
72#if ACPI_MACHINE_WIDTH == 64
73#define ACPI_FORMAT_NATIVE_UINT(i) ACPI_FORMAT_UINT64(i)
74#define ACPI_FORMAT_TO_UINT(i) ACPI_FORMAT_UINT64(i)
75#define ACPI_PRINTF_UINT "0x%8.8X%8.8X"
76
77#else
78#define ACPI_FORMAT_NATIVE_UINT(i) 0, (u32) (i)
79#define ACPI_FORMAT_TO_UINT(i) (u32) (i)
80#define ACPI_PRINTF_UINT "0x%8.8X"
81#endif
82
83/* 72/*
84 * Macros for moving data around to/from buffers that are possibly unaligned. 73 * Macros for moving data around to/from buffers that are possibly unaligned.
85 * If the hardware supports the transfer of unaligned data, just do the store. 74 * If the hardware supports the transfer of unaligned data, just do the store.
diff --git a/drivers/acpi/acpica/acopcode.h b/drivers/acpi/acpica/acopcode.h
index a5f17de45ac6..fd85ad05a24a 100644
--- a/drivers/acpi/acpica/acopcode.h
+++ b/drivers/acpi/acpica/acopcode.h
@@ -111,6 +111,7 @@
111#define ARGP_DWORD_OP ARGP_LIST1 (ARGP_DWORDDATA) 111#define ARGP_DWORD_OP ARGP_LIST1 (ARGP_DWORDDATA)
112#define ARGP_ELSE_OP ARGP_LIST2 (ARGP_PKGLENGTH, ARGP_TERMLIST) 112#define ARGP_ELSE_OP ARGP_LIST2 (ARGP_PKGLENGTH, ARGP_TERMLIST)
113#define ARGP_EVENT_OP ARGP_LIST1 (ARGP_NAME) 113#define ARGP_EVENT_OP ARGP_LIST1 (ARGP_NAME)
114#define ARGP_EXTERNAL_OP ARGP_LIST3 (ARGP_NAMESTRING, ARGP_BYTEDATA, ARGP_BYTEDATA)
114#define ARGP_FATAL_OP ARGP_LIST3 (ARGP_BYTEDATA, ARGP_DWORDDATA, ARGP_TERMARG) 115#define ARGP_FATAL_OP ARGP_LIST3 (ARGP_BYTEDATA, ARGP_DWORDDATA, ARGP_TERMARG)
115#define ARGP_FIELD_OP ARGP_LIST4 (ARGP_PKGLENGTH, ARGP_NAMESTRING, ARGP_BYTEDATA, ARGP_FIELDLIST) 116#define ARGP_FIELD_OP ARGP_LIST4 (ARGP_PKGLENGTH, ARGP_NAMESTRING, ARGP_BYTEDATA, ARGP_FIELDLIST)
116#define ARGP_FIND_SET_LEFT_BIT_OP ARGP_LIST2 (ARGP_TERMARG, ARGP_TARGET) 117#define ARGP_FIND_SET_LEFT_BIT_OP ARGP_LIST2 (ARGP_TERMARG, ARGP_TARGET)
@@ -243,6 +244,7 @@
243#define ARGI_DWORD_OP ARGI_INVALID_OPCODE 244#define ARGI_DWORD_OP ARGI_INVALID_OPCODE
244#define ARGI_ELSE_OP ARGI_INVALID_OPCODE 245#define ARGI_ELSE_OP ARGI_INVALID_OPCODE
245#define ARGI_EVENT_OP ARGI_INVALID_OPCODE 246#define ARGI_EVENT_OP ARGI_INVALID_OPCODE
247#define ARGI_EXTERNAL_OP ARGI_LIST3 (ARGI_STRING, ARGI_INTEGER, ARGI_INTEGER)
246#define ARGI_FATAL_OP ARGI_LIST3 (ARGI_INTEGER, ARGI_INTEGER, ARGI_INTEGER) 248#define ARGI_FATAL_OP ARGI_LIST3 (ARGI_INTEGER, ARGI_INTEGER, ARGI_INTEGER)
247#define ARGI_FIELD_OP ARGI_INVALID_OPCODE 249#define ARGI_FIELD_OP ARGI_INVALID_OPCODE
248#define ARGI_FIND_SET_LEFT_BIT_OP ARGI_LIST2 (ARGI_INTEGER, ARGI_TARGETREF) 250#define ARGI_FIND_SET_LEFT_BIT_OP ARGI_LIST2 (ARGI_INTEGER, ARGI_TARGETREF)
diff --git a/drivers/acpi/acpica/acresrc.h b/drivers/acpi/acpica/acresrc.h
index efc4c7124ccc..6357efb01b93 100644
--- a/drivers/acpi/acpica/acresrc.h
+++ b/drivers/acpi/acpica/acresrc.h
@@ -299,11 +299,13 @@ acpi_rs_set_resource_length(acpi_rsdesc_size total_length,
299 union aml_resource *aml); 299 union aml_resource *aml);
300 300
301/* 301/*
302 * rsdump 302 * rsdump - Debugger support
303 */ 303 */
304#ifdef ACPI_DEBUGGER
304void acpi_rs_dump_resource_list(struct acpi_resource *resource); 305void acpi_rs_dump_resource_list(struct acpi_resource *resource);
305 306
306void acpi_rs_dump_irq_list(u8 * route_table); 307void acpi_rs_dump_irq_list(u8 *route_table);
308#endif
307 309
308/* 310/*
309 * Resource conversion tables 311 * Resource conversion tables
diff --git a/drivers/acpi/acpica/acstruct.h b/drivers/acpi/acpica/acstruct.h
index d14b547b7cd5..87c7860b3394 100644
--- a/drivers/acpi/acpica/acstruct.h
+++ b/drivers/acpi/acpica/acstruct.h
@@ -68,11 +68,6 @@
68#define ACPI_WALK_METHOD 0x01 68#define ACPI_WALK_METHOD 0x01
69#define ACPI_WALK_METHOD_RESTART 0x02 69#define ACPI_WALK_METHOD_RESTART 0x02
70 70
71/* Flags for iASL compiler only */
72
73#define ACPI_WALK_CONST_REQUIRED 0x10
74#define ACPI_WALK_CONST_OPTIONAL 0x20
75
76struct acpi_walk_state { 71struct acpi_walk_state {
77 struct acpi_walk_state *next; /* Next walk_state in list */ 72 struct acpi_walk_state *next; /* Next walk_state in list */
78 u8 descriptor_type; /* To differentiate various internal objs */ 73 u8 descriptor_type; /* To differentiate various internal objs */
diff --git a/drivers/acpi/acpica/actables.h b/drivers/acpi/acpica/actables.h
index 1c127a43017b..7e0b6f1bec9c 100644
--- a/drivers/acpi/acpica/actables.h
+++ b/drivers/acpi/acpica/actables.h
@@ -58,7 +58,9 @@ u8 *acpi_tb_scan_memory_for_rsdp(u8 *start_address, u32 length);
58/* 58/*
59 * tbdata - table data structure management 59 * tbdata - table data structure management
60 */ 60 */
61acpi_status acpi_tb_get_next_root_index(u32 *table_index); 61acpi_status
62acpi_tb_get_next_table_descriptor(u32 *table_index,
63 struct acpi_table_desc **table_desc);
62 64
63void 65void
64acpi_tb_init_table_descriptor(struct acpi_table_desc *table_desc, 66acpi_tb_init_table_descriptor(struct acpi_table_desc *table_desc,
@@ -119,11 +121,6 @@ acpi_tb_install_standard_table(acpi_physical_address address,
119 u8 flags, 121 u8 flags,
120 u8 reload, u8 override, u32 *table_index); 122 u8 reload, u8 override, u32 *table_index);
121 123
122acpi_status
123acpi_tb_store_table(acpi_physical_address address,
124 struct acpi_table_header *table,
125 u32 length, u8 flags, u32 *table_index);
126
127void acpi_tb_uninstall_table(struct acpi_table_desc *table_desc); 124void acpi_tb_uninstall_table(struct acpi_table_desc *table_desc);
128 125
129void acpi_tb_terminate(void); 126void acpi_tb_terminate(void);
diff --git a/drivers/acpi/acpica/acutils.h b/drivers/acpi/acpica/acutils.h
index c2f03e8774ad..2b3c5bd222f1 100644
--- a/drivers/acpi/acpica/acutils.h
+++ b/drivers/acpi/acpica/acutils.h
@@ -502,6 +502,9 @@ const union acpi_predefined_info *acpi_ut_get_next_predefined_method(const union
502 502
503const union acpi_predefined_info *acpi_ut_match_predefined_method(char *name); 503const union acpi_predefined_info *acpi_ut_match_predefined_method(char *name);
504 504
505void acpi_ut_get_expected_return_types(char *buffer, u32 expected_btypes);
506
507#if (defined ACPI_ASL_COMPILER || defined ACPI_HELP_APP)
505const union acpi_predefined_info *acpi_ut_match_resource_name(char *name); 508const union acpi_predefined_info *acpi_ut_match_resource_name(char *name);
506 509
507void 510void
@@ -509,9 +512,8 @@ acpi_ut_display_predefined_method(char *buffer,
509 const union acpi_predefined_info *this_name, 512 const union acpi_predefined_info *this_name,
510 u8 multi_line); 513 u8 multi_line);
511 514
512void acpi_ut_get_expected_return_types(char *buffer, u32 expected_btypes);
513
514u32 acpi_ut_get_resource_bit_width(char *buffer, u16 types); 515u32 acpi_ut_get_resource_bit_width(char *buffer, u16 types);
516#endif
515 517
516/* 518/*
517 * utstate - Generic state creation/cache routines 519 * utstate - Generic state creation/cache routines
@@ -539,14 +541,6 @@ acpi_ut_create_update_state_and_push(union acpi_operand_object *object,
539 u16 action, 541 u16 action,
540 union acpi_generic_state **state_list); 542 union acpi_generic_state **state_list);
541 543
542#ifdef ACPI_FUTURE_USAGE
543acpi_status
544acpi_ut_create_pkg_state_and_push(void *internal_object,
545 void *external_object,
546 u16 index,
547 union acpi_generic_state **state_list);
548#endif /* ACPI_FUTURE_USAGE */
549
550union acpi_generic_state *acpi_ut_create_control_state(void); 544union acpi_generic_state *acpi_ut_create_control_state(void);
551 545
552void acpi_ut_delete_generic_state(union acpi_generic_state *state); 546void acpi_ut_delete_generic_state(union acpi_generic_state *state);
@@ -570,7 +564,9 @@ const struct acpi_exception_info *acpi_ut_validate_exception(acpi_status
570 564
571u8 acpi_ut_is_pci_root_bridge(char *id); 565u8 acpi_ut_is_pci_root_bridge(char *id);
572 566
567#if (defined ACPI_ASL_COMPILER || defined ACPI_EXEC_APP)
573u8 acpi_ut_is_aml_table(struct acpi_table_header *table); 568u8 acpi_ut_is_aml_table(struct acpi_table_header *table);
569#endif
574 570
575acpi_status 571acpi_status
576acpi_ut_walk_package_tree(union acpi_operand_object *source_object, 572acpi_ut_walk_package_tree(union acpi_operand_object *source_object,
@@ -629,15 +625,19 @@ acpi_ut_get_resource_end_tag(union acpi_operand_object *obj_desc, u8 **end_tag);
629 */ 625 */
630void acpi_ut_strupr(char *src_string); 626void acpi_ut_strupr(char *src_string);
631 627
628#ifdef ACPI_ASL_COMPILER
632void acpi_ut_strlwr(char *src_string); 629void acpi_ut_strlwr(char *src_string);
633 630
634int acpi_ut_stricmp(char *string1, char *string2); 631int acpi_ut_stricmp(char *string1, char *string2);
632#endif
635 633
636acpi_status acpi_ut_strtoul64(char *string, u32 base, u64 *ret_integer); 634acpi_status acpi_ut_strtoul64(char *string, u32 base, u64 *ret_integer);
637 635
638void acpi_ut_print_string(char *string, u16 max_length); 636void acpi_ut_print_string(char *string, u16 max_length);
639 637
638#if defined ACPI_ASL_COMPILER || defined ACPI_EXEC_APP
640void ut_convert_backslashes(char *pathname); 639void ut_convert_backslashes(char *pathname);
640#endif
641 641
642u8 acpi_ut_valid_acpi_name(char *name); 642u8 acpi_ut_valid_acpi_name(char *name);
643 643
@@ -785,6 +785,8 @@ int acpi_ut_file_printf(ACPI_FILE file, const char *format, ...);
785/* 785/*
786 * utuuid -- UUID support functions 786 * utuuid -- UUID support functions
787 */ 787 */
788#if (defined ACPI_ASL_COMPILER || defined ACPI_EXEC_APP || defined ACPI_HELP_APP)
788void acpi_ut_convert_string_to_uuid(char *in_string, u8 *uuid_buffer); 789void acpi_ut_convert_string_to_uuid(char *in_string, u8 *uuid_buffer);
790#endif
789 791
790#endif /* _ACUTILS_H */ 792#endif /* _ACUTILS_H */
diff --git a/drivers/acpi/acpica/amlcode.h b/drivers/acpi/acpica/amlcode.h
index 3a95068fc119..be9fd009cb28 100644
--- a/drivers/acpi/acpica/amlcode.h
+++ b/drivers/acpi/acpica/amlcode.h
@@ -65,6 +65,7 @@
65#define AML_PACKAGE_OP (u16) 0x12 65#define AML_PACKAGE_OP (u16) 0x12
66#define AML_VAR_PACKAGE_OP (u16) 0x13 /* ACPI 2.0 */ 66#define AML_VAR_PACKAGE_OP (u16) 0x13 /* ACPI 2.0 */
67#define AML_METHOD_OP (u16) 0x14 67#define AML_METHOD_OP (u16) 0x14
68#define AML_EXTERNAL_OP (u16) 0x15 /* ACPI 6.0 */
68#define AML_DUAL_NAME_PREFIX (u16) 0x2e 69#define AML_DUAL_NAME_PREFIX (u16) 0x2e
69#define AML_MULTI_NAME_PREFIX_OP (u16) 0x2f 70#define AML_MULTI_NAME_PREFIX_OP (u16) 0x2f
70#define AML_NAME_CHAR_SUBSEQ (u16) 0x30 71#define AML_NAME_CHAR_SUBSEQ (u16) 0x30
@@ -206,7 +207,6 @@
206#define AML_INT_RESERVEDFIELD_OP (u16) 0x0031 207#define AML_INT_RESERVEDFIELD_OP (u16) 0x0031
207#define AML_INT_ACCESSFIELD_OP (u16) 0x0032 208#define AML_INT_ACCESSFIELD_OP (u16) 0x0032
208#define AML_INT_BYTELIST_OP (u16) 0x0033 209#define AML_INT_BYTELIST_OP (u16) 0x0033
209#define AML_INT_STATICSTRING_OP (u16) 0x0034
210#define AML_INT_METHODCALL_OP (u16) 0x0035 210#define AML_INT_METHODCALL_OP (u16) 0x0035
211#define AML_INT_RETURN_VALUE_OP (u16) 0x0036 211#define AML_INT_RETURN_VALUE_OP (u16) 0x0036
212#define AML_INT_EVAL_SUBTREE_OP (u16) 0x0037 212#define AML_INT_EVAL_SUBTREE_OP (u16) 0x0037
diff --git a/drivers/acpi/acpica/dsopcode.c b/drivers/acpi/acpica/dsopcode.c
index 77244182ff02..ea0cc4e08f80 100644
--- a/drivers/acpi/acpica/dsopcode.c
+++ b/drivers/acpi/acpica/dsopcode.c
@@ -446,7 +446,7 @@ acpi_ds_eval_region_operands(struct acpi_walk_state *walk_state,
446 446
447 ACPI_DEBUG_PRINT((ACPI_DB_EXEC, "RgnObj %p Addr %8.8X%8.8X Len %X\n", 447 ACPI_DEBUG_PRINT((ACPI_DB_EXEC, "RgnObj %p Addr %8.8X%8.8X Len %X\n",
448 obj_desc, 448 obj_desc,
449 ACPI_FORMAT_NATIVE_UINT(obj_desc->region.address), 449 ACPI_FORMAT_UINT64(obj_desc->region.address),
450 obj_desc->region.length)); 450 obj_desc->region.length));
451 451
452 /* Now the address and length are valid for this opregion */ 452 /* Now the address and length are valid for this opregion */
@@ -539,13 +539,12 @@ acpi_ds_eval_table_region_operands(struct acpi_walk_state *walk_state,
539 return_ACPI_STATUS(AE_NOT_EXIST); 539 return_ACPI_STATUS(AE_NOT_EXIST);
540 } 540 }
541 541
542 obj_desc->region.address = 542 obj_desc->region.address = ACPI_PTR_TO_PHYSADDR(table);
543 (acpi_physical_address) ACPI_TO_INTEGER(table);
544 obj_desc->region.length = table->length; 543 obj_desc->region.length = table->length;
545 544
546 ACPI_DEBUG_PRINT((ACPI_DB_EXEC, "RgnObj %p Addr %8.8X%8.8X Len %X\n", 545 ACPI_DEBUG_PRINT((ACPI_DB_EXEC, "RgnObj %p Addr %8.8X%8.8X Len %X\n",
547 obj_desc, 546 obj_desc,
548 ACPI_FORMAT_NATIVE_UINT(obj_desc->region.address), 547 ACPI_FORMAT_UINT64(obj_desc->region.address),
549 obj_desc->region.length)); 548 obj_desc->region.length));
550 549
551 /* Now the address and length are valid for this opregion */ 550 /* Now the address and length are valid for this opregion */
diff --git a/drivers/acpi/acpica/dsutils.c b/drivers/acpi/acpica/dsutils.c
index e5ff89bcb3f5..deeddd6d2f05 100644
--- a/drivers/acpi/acpica/dsutils.c
+++ b/drivers/acpi/acpica/dsutils.c
@@ -564,6 +564,17 @@ acpi_ds_create_operand(struct acpi_walk_state *walk_state,
564 acpi_operand_object, 564 acpi_operand_object,
565 acpi_gbl_root_node); 565 acpi_gbl_root_node);
566 status = AE_OK; 566 status = AE_OK;
567 } else if (parent_op->common.aml_opcode ==
568 AML_EXTERNAL_OP) {
569
570 /* TBD: May only be temporary */
571
572 obj_desc =
573 acpi_ut_create_string_object((acpi_size) name_length);
574
575 ACPI_STRNCPY(obj_desc->string.pointer,
576 name_string, name_length);
577 status = AE_OK;
567 } else { 578 } else {
568 /* 579 /*
569 * We just plain didn't find it -- which is a 580 * We just plain didn't find it -- which is a
diff --git a/drivers/acpi/acpica/evgpe.c b/drivers/acpi/acpica/evgpe.c
index 5ed064e8673c..ccf793247447 100644
--- a/drivers/acpi/acpica/evgpe.c
+++ b/drivers/acpi/acpica/evgpe.c
@@ -92,6 +92,7 @@ acpi_ev_update_gpe_enable_mask(struct acpi_gpe_event_info *gpe_event_info)
92 ACPI_SET_BIT(gpe_register_info->enable_for_run, 92 ACPI_SET_BIT(gpe_register_info->enable_for_run,
93 (u8)register_bit); 93 (u8)register_bit);
94 } 94 }
95 gpe_register_info->enable_mask = gpe_register_info->enable_for_run;
95 96
96 return_ACPI_STATUS(AE_OK); 97 return_ACPI_STATUS(AE_OK);
97} 98}
@@ -123,7 +124,7 @@ acpi_status acpi_ev_enable_gpe(struct acpi_gpe_event_info *gpe_event_info)
123 124
124 /* Enable the requested GPE */ 125 /* Enable the requested GPE */
125 126
126 status = acpi_hw_low_set_gpe(gpe_event_info, ACPI_GPE_ENABLE_SAVE); 127 status = acpi_hw_low_set_gpe(gpe_event_info, ACPI_GPE_ENABLE);
127 return_ACPI_STATUS(status); 128 return_ACPI_STATUS(status);
128} 129}
129 130
@@ -202,7 +203,7 @@ acpi_ev_remove_gpe_reference(struct acpi_gpe_event_info *gpe_event_info)
202 if (ACPI_SUCCESS(status)) { 203 if (ACPI_SUCCESS(status)) {
203 status = 204 status =
204 acpi_hw_low_set_gpe(gpe_event_info, 205 acpi_hw_low_set_gpe(gpe_event_info,
205 ACPI_GPE_DISABLE_SAVE); 206 ACPI_GPE_DISABLE);
206 } 207 }
207 208
208 if (ACPI_FAILURE(status)) { 209 if (ACPI_FAILURE(status)) {
diff --git a/drivers/acpi/acpica/evregion.c b/drivers/acpi/acpica/evregion.c
index 9abace3401f9..2ba28a63fb68 100644
--- a/drivers/acpi/acpica/evregion.c
+++ b/drivers/acpi/acpica/evregion.c
@@ -272,7 +272,7 @@ acpi_ev_address_space_dispatch(union acpi_operand_object *region_obj,
272 ACPI_DEBUG_PRINT((ACPI_DB_OPREGION, 272 ACPI_DEBUG_PRINT((ACPI_DB_OPREGION,
273 "Handler %p (@%p) Address %8.8X%8.8X [%s]\n", 273 "Handler %p (@%p) Address %8.8X%8.8X [%s]\n",
274 &region_obj->region.handler->address_space, handler, 274 &region_obj->region.handler->address_space, handler,
275 ACPI_FORMAT_NATIVE_UINT(address), 275 ACPI_FORMAT_UINT64(address),
276 acpi_ut_get_region_name(region_obj->region. 276 acpi_ut_get_region_name(region_obj->region.
277 space_id))); 277 space_id)));
278 278
diff --git a/drivers/acpi/acpica/evxfevnt.c b/drivers/acpi/acpica/evxfevnt.c
index df06a23c4197..faad911d46b5 100644
--- a/drivers/acpi/acpica/evxfevnt.c
+++ b/drivers/acpi/acpica/evxfevnt.c
@@ -356,7 +356,8 @@ acpi_status acpi_get_event_status(u32 event, acpi_event_status * event_status)
356 } 356 }
357 357
358 if (in_byte) { 358 if (in_byte) {
359 local_event_status |= ACPI_EVENT_FLAG_ENABLED; 359 local_event_status |=
360 (ACPI_EVENT_FLAG_ENABLED | ACPI_EVENT_FLAG_ENABLE_SET);
360 } 361 }
361 362
362 /* Fixed event currently active? */ 363 /* Fixed event currently active? */
@@ -369,7 +370,7 @@ acpi_status acpi_get_event_status(u32 event, acpi_event_status * event_status)
369 } 370 }
370 371
371 if (in_byte) { 372 if (in_byte) {
372 local_event_status |= ACPI_EVENT_FLAG_SET; 373 local_event_status |= ACPI_EVENT_FLAG_STATUS_SET;
373 } 374 }
374 375
375 (*event_status) = local_event_status; 376 (*event_status) = local_event_status;
diff --git a/drivers/acpi/acpica/exdump.c b/drivers/acpi/acpica/exdump.c
index 7c213b6b6472..1da52bef632e 100644
--- a/drivers/acpi/acpica/exdump.c
+++ b/drivers/acpi/acpica/exdump.c
@@ -767,8 +767,8 @@ void acpi_ex_dump_operand(union acpi_operand_object *obj_desc, u32 depth)
767 acpi_os_printf("\n"); 767 acpi_os_printf("\n");
768 } else { 768 } else {
769 acpi_os_printf(" base %8.8X%8.8X Length %X\n", 769 acpi_os_printf(" base %8.8X%8.8X Length %X\n",
770 ACPI_FORMAT_NATIVE_UINT(obj_desc->region. 770 ACPI_FORMAT_UINT64(obj_desc->region.
771 address), 771 address),
772 obj_desc->region.length); 772 obj_desc->region.length);
773 } 773 }
774 break; 774 break;
diff --git a/drivers/acpi/acpica/exfldio.c b/drivers/acpi/acpica/exfldio.c
index 49479927e7f7..725a3746a2df 100644
--- a/drivers/acpi/acpica/exfldio.c
+++ b/drivers/acpi/acpica/exfldio.c
@@ -263,17 +263,15 @@ acpi_ex_access_region(union acpi_operand_object *obj_desc,
263 } 263 }
264 264
265 ACPI_DEBUG_PRINT_RAW((ACPI_DB_BFIELD, 265 ACPI_DEBUG_PRINT_RAW((ACPI_DB_BFIELD,
266 " Region [%s:%X], Width %X, ByteBase %X, Offset %X at %p\n", 266 " Region [%s:%X], Width %X, ByteBase %X, Offset %X at %8.8X%8.8X\n",
267 acpi_ut_get_region_name(rgn_desc->region. 267 acpi_ut_get_region_name(rgn_desc->region.
268 space_id), 268 space_id),
269 rgn_desc->region.space_id, 269 rgn_desc->region.space_id,
270 obj_desc->common_field.access_byte_width, 270 obj_desc->common_field.access_byte_width,
271 obj_desc->common_field.base_byte_offset, 271 obj_desc->common_field.base_byte_offset,
272 field_datum_byte_offset, ACPI_CAST_PTR(void, 272 field_datum_byte_offset,
273 (rgn_desc-> 273 ACPI_FORMAT_UINT64(rgn_desc->region.address +
274 region. 274 region_offset)));
275 address +
276 region_offset))));
277 275
278 /* Invoke the appropriate address_space/op_region handler */ 276 /* Invoke the appropriate address_space/op_region handler */
279 277
diff --git a/drivers/acpi/acpica/exoparg3.c b/drivers/acpi/acpica/exoparg3.c
index b813fed95e56..1c64a988cbee 100644
--- a/drivers/acpi/acpica/exoparg3.c
+++ b/drivers/acpi/acpica/exoparg3.c
@@ -114,7 +114,18 @@ acpi_status acpi_ex_opcode_3A_0T_0R(struct acpi_walk_state *walk_state)
114 /* Might return while OS is shutting down, just continue */ 114 /* Might return while OS is shutting down, just continue */
115 115
116 ACPI_FREE(fatal); 116 ACPI_FREE(fatal);
117 break; 117 goto cleanup;
118
119 case AML_EXTERNAL_OP:
120 /*
121 * If the interpreter sees this opcode, just ignore it. The External
122 * op is intended for use by disassemblers in order to properly
123 * disassemble control method invocations. The opcode or group of
124 * opcodes should be surrounded by an "if (0)" clause to ensure that
125 * AML interpreters never see the opcode.
126 */
127 status = AE_OK;
128 goto cleanup;
118 129
119 default: 130 default:
120 131
diff --git a/drivers/acpi/acpica/exregion.c b/drivers/acpi/acpica/exregion.c
index 0fe188e238ef..f6c2f5499935 100644
--- a/drivers/acpi/acpica/exregion.c
+++ b/drivers/acpi/acpica/exregion.c
@@ -165,8 +165,8 @@ acpi_ex_system_memory_space_handler(u32 function,
165 * one page, which is similar to the original code that used a 4k 165 * one page, which is similar to the original code that used a 4k
166 * maximum window. 166 * maximum window.
167 */ 167 */
168 page_boundary_map_length = 168 page_boundary_map_length = (acpi_size)
169 ACPI_ROUND_UP(address, ACPI_DEFAULT_PAGE_SIZE) - address; 169 (ACPI_ROUND_UP(address, ACPI_DEFAULT_PAGE_SIZE) - address);
170 if (page_boundary_map_length == 0) { 170 if (page_boundary_map_length == 0) {
171 page_boundary_map_length = ACPI_DEFAULT_PAGE_SIZE; 171 page_boundary_map_length = ACPI_DEFAULT_PAGE_SIZE;
172 } 172 }
@@ -177,12 +177,13 @@ acpi_ex_system_memory_space_handler(u32 function,
177 177
178 /* Create a new mapping starting at the address given */ 178 /* Create a new mapping starting at the address given */
179 179
180 mem_info->mapped_logical_address = acpi_os_map_memory((acpi_physical_address) address, map_length); 180 mem_info->mapped_logical_address =
181 acpi_os_map_memory(address, map_length);
181 if (!mem_info->mapped_logical_address) { 182 if (!mem_info->mapped_logical_address) {
182 ACPI_ERROR((AE_INFO, 183 ACPI_ERROR((AE_INFO,
183 "Could not map memory at 0x%8.8X%8.8X, size %u", 184 "Could not map memory at 0x%8.8X%8.8X, size %u",
184 ACPI_FORMAT_NATIVE_UINT(address), 185 ACPI_FORMAT_UINT64(address),
185 (u32) map_length)); 186 (u32)map_length));
186 mem_info->mapped_length = 0; 187 mem_info->mapped_length = 0;
187 return_ACPI_STATUS(AE_NO_MEMORY); 188 return_ACPI_STATUS(AE_NO_MEMORY);
188 } 189 }
@@ -202,8 +203,7 @@ acpi_ex_system_memory_space_handler(u32 function,
202 203
203 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 204 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
204 "System-Memory (width %u) R/W %u Address=%8.8X%8.8X\n", 205 "System-Memory (width %u) R/W %u Address=%8.8X%8.8X\n",
205 bit_width, function, 206 bit_width, function, ACPI_FORMAT_UINT64(address)));
206 ACPI_FORMAT_NATIVE_UINT(address)));
207 207
208 /* 208 /*
209 * Perform the memory read or write 209 * Perform the memory read or write
@@ -318,8 +318,7 @@ acpi_ex_system_io_space_handler(u32 function,
318 318
319 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 319 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
320 "System-IO (width %u) R/W %u Address=%8.8X%8.8X\n", 320 "System-IO (width %u) R/W %u Address=%8.8X%8.8X\n",
321 bit_width, function, 321 bit_width, function, ACPI_FORMAT_UINT64(address)));
322 ACPI_FORMAT_NATIVE_UINT(address)));
323 322
324 /* Decode the function parameter */ 323 /* Decode the function parameter */
325 324
diff --git a/drivers/acpi/acpica/hwgpe.c b/drivers/acpi/acpica/hwgpe.c
index 84bc550f4f1d..73cfa5947ff3 100644
--- a/drivers/acpi/acpica/hwgpe.c
+++ b/drivers/acpi/acpica/hwgpe.c
@@ -89,6 +89,8 @@ u32 acpi_hw_get_gpe_register_bit(struct acpi_gpe_event_info *gpe_event_info)
89 * RETURN: Status 89 * RETURN: Status
90 * 90 *
91 * DESCRIPTION: Enable or disable a single GPE in the parent enable register. 91 * DESCRIPTION: Enable or disable a single GPE in the parent enable register.
92 * The enable_mask field of the involved GPE register must be
93 * updated by the caller if necessary.
92 * 94 *
93 ******************************************************************************/ 95 ******************************************************************************/
94 96
@@ -119,7 +121,7 @@ acpi_hw_low_set_gpe(struct acpi_gpe_event_info *gpe_event_info, u32 action)
119 /* Set or clear just the bit that corresponds to this GPE */ 121 /* Set or clear just the bit that corresponds to this GPE */
120 122
121 register_bit = acpi_hw_get_gpe_register_bit(gpe_event_info); 123 register_bit = acpi_hw_get_gpe_register_bit(gpe_event_info);
122 switch (action & ~ACPI_GPE_SAVE_MASK) { 124 switch (action) {
123 case ACPI_GPE_CONDITIONAL_ENABLE: 125 case ACPI_GPE_CONDITIONAL_ENABLE:
124 126
125 /* Only enable if the corresponding enable_mask bit is set */ 127 /* Only enable if the corresponding enable_mask bit is set */
@@ -149,9 +151,6 @@ acpi_hw_low_set_gpe(struct acpi_gpe_event_info *gpe_event_info, u32 action)
149 /* Write the updated enable mask */ 151 /* Write the updated enable mask */
150 152
151 status = acpi_hw_write(enable_mask, &gpe_register_info->enable_address); 153 status = acpi_hw_write(enable_mask, &gpe_register_info->enable_address);
152 if (ACPI_SUCCESS(status) && (action & ACPI_GPE_SAVE_MASK)) {
153 gpe_register_info->enable_mask = (u8)enable_mask;
154 }
155 return (status); 154 return (status);
156} 155}
157 156
@@ -250,6 +249,17 @@ acpi_hw_get_gpe_status(struct acpi_gpe_event_info * gpe_event_info,
250 local_event_status |= ACPI_EVENT_FLAG_WAKE_ENABLED; 249 local_event_status |= ACPI_EVENT_FLAG_WAKE_ENABLED;
251 } 250 }
252 251
252 /* GPE currently enabled (enable bit == 1)? */
253
254 status = acpi_hw_read(&in_byte, &gpe_register_info->enable_address);
255 if (ACPI_FAILURE(status)) {
256 return (status);
257 }
258
259 if (register_bit & in_byte) {
260 local_event_status |= ACPI_EVENT_FLAG_ENABLE_SET;
261 }
262
253 /* GPE currently active (status bit == 1)? */ 263 /* GPE currently active (status bit == 1)? */
254 264
255 status = acpi_hw_read(&in_byte, &gpe_register_info->status_address); 265 status = acpi_hw_read(&in_byte, &gpe_register_info->status_address);
@@ -258,7 +268,7 @@ acpi_hw_get_gpe_status(struct acpi_gpe_event_info * gpe_event_info,
258 } 268 }
259 269
260 if (register_bit & in_byte) { 270 if (register_bit & in_byte) {
261 local_event_status |= ACPI_EVENT_FLAG_SET; 271 local_event_status |= ACPI_EVENT_FLAG_STATUS_SET;
262 } 272 }
263 273
264 /* Set return value */ 274 /* Set return value */
@@ -286,10 +296,8 @@ acpi_hw_gpe_enable_write(u8 enable_mask,
286{ 296{
287 acpi_status status; 297 acpi_status status;
288 298
299 gpe_register_info->enable_mask = enable_mask;
289 status = acpi_hw_write(enable_mask, &gpe_register_info->enable_address); 300 status = acpi_hw_write(enable_mask, &gpe_register_info->enable_address);
290 if (ACPI_SUCCESS(status)) {
291 gpe_register_info->enable_mask = enable_mask;
292 }
293 return (status); 301 return (status);
294} 302}
295 303
diff --git a/drivers/acpi/acpica/hwvalid.c b/drivers/acpi/acpica/hwvalid.c
index 2bd33fe56cb3..29033d71417b 100644
--- a/drivers/acpi/acpica/hwvalid.c
+++ b/drivers/acpi/acpica/hwvalid.c
@@ -142,17 +142,17 @@ acpi_hw_validate_io_request(acpi_io_address address, u32 bit_width)
142 byte_width = ACPI_DIV_8(bit_width); 142 byte_width = ACPI_DIV_8(bit_width);
143 last_address = address + byte_width - 1; 143 last_address = address + byte_width - 1;
144 144
145 ACPI_DEBUG_PRINT((ACPI_DB_IO, "Address %p LastAddress %p Length %X", 145 ACPI_DEBUG_PRINT((ACPI_DB_IO,
146 ACPI_CAST_PTR(void, address), ACPI_CAST_PTR(void, 146 "Address %8.8X%8.8X LastAddress %8.8X%8.8X Length %X",
147 last_address), 147 ACPI_FORMAT_UINT64(address),
148 byte_width)); 148 ACPI_FORMAT_UINT64(last_address), byte_width));
149 149
150 /* Maximum 16-bit address in I/O space */ 150 /* Maximum 16-bit address in I/O space */
151 151
152 if (last_address > ACPI_UINT16_MAX) { 152 if (last_address > ACPI_UINT16_MAX) {
153 ACPI_ERROR((AE_INFO, 153 ACPI_ERROR((AE_INFO,
154 "Illegal I/O port address/length above 64K: %p/0x%X", 154 "Illegal I/O port address/length above 64K: %8.8X%8.8X/0x%X",
155 ACPI_CAST_PTR(void, address), byte_width)); 155 ACPI_FORMAT_UINT64(address), byte_width));
156 return_ACPI_STATUS(AE_LIMIT); 156 return_ACPI_STATUS(AE_LIMIT);
157 } 157 }
158 158
@@ -181,8 +181,8 @@ acpi_hw_validate_io_request(acpi_io_address address, u32 bit_width)
181 181
182 if (acpi_gbl_osi_data >= port_info->osi_dependency) { 182 if (acpi_gbl_osi_data >= port_info->osi_dependency) {
183 ACPI_DEBUG_PRINT((ACPI_DB_IO, 183 ACPI_DEBUG_PRINT((ACPI_DB_IO,
184 "Denied AML access to port 0x%p/%X (%s 0x%.4X-0x%.4X)", 184 "Denied AML access to port 0x%8.8X%8.8X/%X (%s 0x%.4X-0x%.4X)",
185 ACPI_CAST_PTR(void, address), 185 ACPI_FORMAT_UINT64(address),
186 byte_width, port_info->name, 186 byte_width, port_info->name,
187 port_info->start, 187 port_info->start,
188 port_info->end)); 188 port_info->end));
diff --git a/drivers/acpi/acpica/nsdump.c b/drivers/acpi/acpica/nsdump.c
index 80f097eb7381..d259393505fa 100644
--- a/drivers/acpi/acpica/nsdump.c
+++ b/drivers/acpi/acpica/nsdump.c
@@ -271,12 +271,11 @@ acpi_ns_dump_one_object(acpi_handle obj_handle,
271 switch (type) { 271 switch (type) {
272 case ACPI_TYPE_PROCESSOR: 272 case ACPI_TYPE_PROCESSOR:
273 273
274 acpi_os_printf("ID %02X Len %02X Addr %p\n", 274 acpi_os_printf("ID %02X Len %02X Addr %8.8X%8.8X\n",
275 obj_desc->processor.proc_id, 275 obj_desc->processor.proc_id,
276 obj_desc->processor.length, 276 obj_desc->processor.length,
277 ACPI_CAST_PTR(void, 277 ACPI_FORMAT_UINT64(obj_desc->processor.
278 obj_desc->processor. 278 address));
279 address));
280 break; 279 break;
281 280
282 case ACPI_TYPE_DEVICE: 281 case ACPI_TYPE_DEVICE:
@@ -347,8 +346,9 @@ acpi_ns_dump_one_object(acpi_handle obj_handle,
347 space_id)); 346 space_id));
348 if (obj_desc->region.flags & AOPOBJ_DATA_VALID) { 347 if (obj_desc->region.flags & AOPOBJ_DATA_VALID) {
349 acpi_os_printf(" Addr %8.8X%8.8X Len %.4X\n", 348 acpi_os_printf(" Addr %8.8X%8.8X Len %.4X\n",
350 ACPI_FORMAT_NATIVE_UINT 349 ACPI_FORMAT_UINT64(obj_desc->
351 (obj_desc->region.address), 350 region.
351 address),
352 obj_desc->region.length); 352 obj_desc->region.length);
353 } else { 353 } else {
354 acpi_os_printf 354 acpi_os_printf
diff --git a/drivers/acpi/acpica/psopcode.c b/drivers/acpi/acpica/psopcode.c
index 1af4a405e351..ed90fddf2487 100644
--- a/drivers/acpi/acpica/psopcode.c
+++ b/drivers/acpi/acpica/psopcode.c
@@ -646,7 +646,13 @@ const struct acpi_opcode_info acpi_gbl_aml_op_info[AML_NUM_OPCODES] = {
646 AML_CLASS_INTERNAL, AML_TYPE_BOGUS, AML_HAS_ARGS), 646 AML_CLASS_INTERNAL, AML_TYPE_BOGUS, AML_HAS_ARGS),
647/* 80 */ ACPI_OP("-ExtAccessField-", ARGP_CONNECTFIELD_OP, 647/* 80 */ ACPI_OP("-ExtAccessField-", ARGP_CONNECTFIELD_OP,
648 ARGI_CONNECTFIELD_OP, ACPI_TYPE_ANY, 648 ARGI_CONNECTFIELD_OP, ACPI_TYPE_ANY,
649 AML_CLASS_INTERNAL, AML_TYPE_BOGUS, 0) 649 AML_CLASS_INTERNAL, AML_TYPE_BOGUS, 0),
650
651/* ACPI 6.0 opcodes */
652
653 /* 81 */ ACPI_OP("External", ARGP_EXTERNAL_OP, ARGI_EXTERNAL_OP,
654 ACPI_TYPE_ANY, AML_CLASS_EXECUTE, /* ? */
655 AML_TYPE_EXEC_3A_0T_0R, AML_FLAGS_EXEC_3A_0T_0R)
650 656
651/*! [End] no source code translation !*/ 657/*! [End] no source code translation !*/
652}; 658};
diff --git a/drivers/acpi/acpica/psopinfo.c b/drivers/acpi/acpica/psopinfo.c
index e18e7c47f482..20e1a35169fc 100644
--- a/drivers/acpi/acpica/psopinfo.c
+++ b/drivers/acpi/acpica/psopinfo.c
@@ -210,7 +210,7 @@ const u8 acpi_gbl_short_op_index[256] = {
210/* 8 9 A B C D E F */ 210/* 8 9 A B C D E F */
211/* 0x00 */ 0x00, 0x01, _UNK, _UNK, _UNK, _UNK, 0x02, _UNK, 211/* 0x00 */ 0x00, 0x01, _UNK, _UNK, _UNK, _UNK, 0x02, _UNK,
212/* 0x08 */ 0x03, _UNK, 0x04, 0x05, 0x06, 0x07, 0x6E, _UNK, 212/* 0x08 */ 0x03, _UNK, 0x04, 0x05, 0x06, 0x07, 0x6E, _UNK,
213/* 0x10 */ 0x08, 0x09, 0x0a, 0x6F, 0x0b, _UNK, _UNK, _UNK, 213/* 0x10 */ 0x08, 0x09, 0x0a, 0x6F, 0x0b, 0x81, _UNK, _UNK,
214/* 0x18 */ _UNK, _UNK, _UNK, _UNK, _UNK, _UNK, _UNK, _UNK, 214/* 0x18 */ _UNK, _UNK, _UNK, _UNK, _UNK, _UNK, _UNK, _UNK,
215/* 0x20 */ _UNK, _UNK, _UNK, _UNK, _UNK, _UNK, _UNK, _UNK, 215/* 0x20 */ _UNK, _UNK, _UNK, _UNK, _UNK, _UNK, _UNK, _UNK,
216/* 0x28 */ _UNK, _UNK, _UNK, _UNK, _UNK, 0x63, _PFX, _PFX, 216/* 0x28 */ _UNK, _UNK, _UNK, _UNK, _UNK, 0x63, _PFX, _PFX,
diff --git a/drivers/acpi/acpica/rsdump.c b/drivers/acpi/acpica/rsdump.c
index 1539394c8c52..c428bb33204e 100644
--- a/drivers/acpi/acpica/rsdump.c
+++ b/drivers/acpi/acpica/rsdump.c
@@ -1,6 +1,6 @@
1/******************************************************************************* 1/*******************************************************************************
2 * 2 *
3 * Module Name: rsdump - Functions to display the resource structures. 3 * Module Name: rsdump - AML debugger support for resource structures.
4 * 4 *
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
@@ -48,7 +48,10 @@
48#define _COMPONENT ACPI_RESOURCES 48#define _COMPONENT ACPI_RESOURCES
49ACPI_MODULE_NAME("rsdump") 49ACPI_MODULE_NAME("rsdump")
50 50
51#if defined(ACPI_DEBUG_OUTPUT) || defined(ACPI_DISASSEMBLER) || defined(ACPI_DEBUGGER) 51/*
52 * All functions in this module are used by the AML Debugger only
53 */
54#if defined(ACPI_DEBUGGER)
52/* Local prototypes */ 55/* Local prototypes */
53static void acpi_rs_out_string(char *title, char *value); 56static void acpi_rs_out_string(char *title, char *value);
54 57
@@ -80,6 +83,116 @@ acpi_rs_dump_descriptor(void *resource, struct acpi_rsdump_info *table);
80 83
81/******************************************************************************* 84/*******************************************************************************
82 * 85 *
86 * FUNCTION: acpi_rs_dump_resource_list
87 *
88 * PARAMETERS: resource_list - Pointer to a resource descriptor list
89 *
90 * RETURN: None
91 *
92 * DESCRIPTION: Dispatches the structure to the correct dump routine.
93 *
94 ******************************************************************************/
95
96void acpi_rs_dump_resource_list(struct acpi_resource *resource_list)
97{
98 u32 count = 0;
99 u32 type;
100
101 ACPI_FUNCTION_ENTRY();
102
103 /* Check if debug output enabled */
104
105 if (!ACPI_IS_DEBUG_ENABLED(ACPI_LV_RESOURCES, _COMPONENT)) {
106 return;
107 }
108
109 /* Walk list and dump all resource descriptors (END_TAG terminates) */
110
111 do {
112 acpi_os_printf("\n[%02X] ", count);
113 count++;
114
115 /* Validate Type before dispatch */
116
117 type = resource_list->type;
118 if (type > ACPI_RESOURCE_TYPE_MAX) {
119 acpi_os_printf
120 ("Invalid descriptor type (%X) in resource list\n",
121 resource_list->type);
122 return;
123 }
124
125 /* Sanity check the length. It must not be zero, or we loop forever */
126
127 if (!resource_list->length) {
128 acpi_os_printf
129 ("Invalid zero length descriptor in resource list\n");
130 return;
131 }
132
133 /* Dump the resource descriptor */
134
135 if (type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
136 acpi_rs_dump_descriptor(&resource_list->data,
137 acpi_gbl_dump_serial_bus_dispatch
138 [resource_list->data.
139 common_serial_bus.type]);
140 } else {
141 acpi_rs_dump_descriptor(&resource_list->data,
142 acpi_gbl_dump_resource_dispatch
143 [type]);
144 }
145
146 /* Point to the next resource structure */
147
148 resource_list = ACPI_NEXT_RESOURCE(resource_list);
149
150 /* Exit when END_TAG descriptor is reached */
151
152 } while (type != ACPI_RESOURCE_TYPE_END_TAG);
153}
154
155/*******************************************************************************
156 *
157 * FUNCTION: acpi_rs_dump_irq_list
158 *
159 * PARAMETERS: route_table - Pointer to the routing table to dump.
160 *
161 * RETURN: None
162 *
163 * DESCRIPTION: Print IRQ routing table
164 *
165 ******************************************************************************/
166
167void acpi_rs_dump_irq_list(u8 *route_table)
168{
169 struct acpi_pci_routing_table *prt_element;
170 u8 count;
171
172 ACPI_FUNCTION_ENTRY();
173
174 /* Check if debug output enabled */
175
176 if (!ACPI_IS_DEBUG_ENABLED(ACPI_LV_RESOURCES, _COMPONENT)) {
177 return;
178 }
179
180 prt_element = ACPI_CAST_PTR(struct acpi_pci_routing_table, route_table);
181
182 /* Dump all table elements, Exit on zero length element */
183
184 for (count = 0; prt_element->length; count++) {
185 acpi_os_printf("\n[%02X] PCI IRQ Routing Table Package\n",
186 count);
187 acpi_rs_dump_descriptor(prt_element, acpi_rs_dump_prt);
188
189 prt_element = ACPI_ADD_PTR(struct acpi_pci_routing_table,
190 prt_element, prt_element->length);
191 }
192}
193
194/*******************************************************************************
195 *
83 * FUNCTION: acpi_rs_dump_descriptor 196 * FUNCTION: acpi_rs_dump_descriptor
84 * 197 *
85 * PARAMETERS: resource - Buffer containing the resource 198 * PARAMETERS: resource - Buffer containing the resource
@@ -357,116 +470,6 @@ static void acpi_rs_dump_address_common(union acpi_resource_data *resource)
357 470
358/******************************************************************************* 471/*******************************************************************************
359 * 472 *
360 * FUNCTION: acpi_rs_dump_resource_list
361 *
362 * PARAMETERS: resource_list - Pointer to a resource descriptor list
363 *
364 * RETURN: None
365 *
366 * DESCRIPTION: Dispatches the structure to the correct dump routine.
367 *
368 ******************************************************************************/
369
370void acpi_rs_dump_resource_list(struct acpi_resource *resource_list)
371{
372 u32 count = 0;
373 u32 type;
374
375 ACPI_FUNCTION_ENTRY();
376
377 /* Check if debug output enabled */
378
379 if (!ACPI_IS_DEBUG_ENABLED(ACPI_LV_RESOURCES, _COMPONENT)) {
380 return;
381 }
382
383 /* Walk list and dump all resource descriptors (END_TAG terminates) */
384
385 do {
386 acpi_os_printf("\n[%02X] ", count);
387 count++;
388
389 /* Validate Type before dispatch */
390
391 type = resource_list->type;
392 if (type > ACPI_RESOURCE_TYPE_MAX) {
393 acpi_os_printf
394 ("Invalid descriptor type (%X) in resource list\n",
395 resource_list->type);
396 return;
397 }
398
399 /* Sanity check the length. It must not be zero, or we loop forever */
400
401 if (!resource_list->length) {
402 acpi_os_printf
403 ("Invalid zero length descriptor in resource list\n");
404 return;
405 }
406
407 /* Dump the resource descriptor */
408
409 if (type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
410 acpi_rs_dump_descriptor(&resource_list->data,
411 acpi_gbl_dump_serial_bus_dispatch
412 [resource_list->data.
413 common_serial_bus.type]);
414 } else {
415 acpi_rs_dump_descriptor(&resource_list->data,
416 acpi_gbl_dump_resource_dispatch
417 [type]);
418 }
419
420 /* Point to the next resource structure */
421
422 resource_list = ACPI_NEXT_RESOURCE(resource_list);
423
424 /* Exit when END_TAG descriptor is reached */
425
426 } while (type != ACPI_RESOURCE_TYPE_END_TAG);
427}
428
429/*******************************************************************************
430 *
431 * FUNCTION: acpi_rs_dump_irq_list
432 *
433 * PARAMETERS: route_table - Pointer to the routing table to dump.
434 *
435 * RETURN: None
436 *
437 * DESCRIPTION: Print IRQ routing table
438 *
439 ******************************************************************************/
440
441void acpi_rs_dump_irq_list(u8 * route_table)
442{
443 struct acpi_pci_routing_table *prt_element;
444 u8 count;
445
446 ACPI_FUNCTION_ENTRY();
447
448 /* Check if debug output enabled */
449
450 if (!ACPI_IS_DEBUG_ENABLED(ACPI_LV_RESOURCES, _COMPONENT)) {
451 return;
452 }
453
454 prt_element = ACPI_CAST_PTR(struct acpi_pci_routing_table, route_table);
455
456 /* Dump all table elements, Exit on zero length element */
457
458 for (count = 0; prt_element->length; count++) {
459 acpi_os_printf("\n[%02X] PCI IRQ Routing Table Package\n",
460 count);
461 acpi_rs_dump_descriptor(prt_element, acpi_rs_dump_prt);
462
463 prt_element = ACPI_ADD_PTR(struct acpi_pci_routing_table,
464 prt_element, prt_element->length);
465 }
466}
467
468/*******************************************************************************
469 *
470 * FUNCTION: acpi_rs_out* 473 * FUNCTION: acpi_rs_out*
471 * 474 *
472 * PARAMETERS: title - Name of the resource field 475 * PARAMETERS: title - Name of the resource field
diff --git a/drivers/acpi/acpica/tbdata.c b/drivers/acpi/acpica/tbdata.c
index 6a144957aadd..d7f8386455bd 100644
--- a/drivers/acpi/acpica/tbdata.c
+++ b/drivers/acpi/acpica/tbdata.c
@@ -113,9 +113,9 @@ acpi_tb_acquire_table(struct acpi_table_desc *table_desc,
113 case ACPI_TABLE_ORIGIN_INTERNAL_VIRTUAL: 113 case ACPI_TABLE_ORIGIN_INTERNAL_VIRTUAL:
114 case ACPI_TABLE_ORIGIN_EXTERNAL_VIRTUAL: 114 case ACPI_TABLE_ORIGIN_EXTERNAL_VIRTUAL:
115 115
116 table = 116 table = ACPI_CAST_PTR(struct acpi_table_header,
117 ACPI_CAST_PTR(struct acpi_table_header, 117 ACPI_PHYSADDR_TO_PTR(table_desc->
118 table_desc->address); 118 address));
119 break; 119 break;
120 120
121 default: 121 default:
@@ -214,7 +214,8 @@ acpi_tb_acquire_temp_table(struct acpi_table_desc *table_desc,
214 case ACPI_TABLE_ORIGIN_INTERNAL_VIRTUAL: 214 case ACPI_TABLE_ORIGIN_INTERNAL_VIRTUAL:
215 case ACPI_TABLE_ORIGIN_EXTERNAL_VIRTUAL: 215 case ACPI_TABLE_ORIGIN_EXTERNAL_VIRTUAL:
216 216
217 table_header = ACPI_CAST_PTR(struct acpi_table_header, address); 217 table_header = ACPI_CAST_PTR(struct acpi_table_header,
218 ACPI_PHYSADDR_TO_PTR(address));
218 if (!table_header) { 219 if (!table_header) {
219 return (AE_NO_MEMORY); 220 return (AE_NO_MEMORY);
220 } 221 }
@@ -398,14 +399,14 @@ acpi_tb_verify_temp_table(struct acpi_table_desc * table_desc, char *signature)
398 table_desc->length); 399 table_desc->length);
399 if (ACPI_FAILURE(status)) { 400 if (ACPI_FAILURE(status)) {
400 ACPI_EXCEPTION((AE_INFO, AE_NO_MEMORY, 401 ACPI_EXCEPTION((AE_INFO, AE_NO_MEMORY,
401 "%4.4s " ACPI_PRINTF_UINT 402 "%4.4s 0x%8.8X%8.8X"
402 " Attempted table install failed", 403 " Attempted table install failed",
403 acpi_ut_valid_acpi_name(table_desc-> 404 acpi_ut_valid_acpi_name(table_desc->
404 signature. 405 signature.
405 ascii) ? 406 ascii) ?
406 table_desc->signature.ascii : "????", 407 table_desc->signature.ascii : "????",
407 ACPI_FORMAT_TO_UINT(table_desc-> 408 ACPI_FORMAT_UINT64(table_desc->
408 address))); 409 address)));
409 goto invalidate_and_exit; 410 goto invalidate_and_exit;
410 } 411 }
411 } 412 }
@@ -483,19 +484,23 @@ acpi_status acpi_tb_resize_root_table_list(void)
483 484
484/******************************************************************************* 485/*******************************************************************************
485 * 486 *
486 * FUNCTION: acpi_tb_get_next_root_index 487 * FUNCTION: acpi_tb_get_next_table_descriptor
487 * 488 *
488 * PARAMETERS: table_index - Where table index is returned 489 * PARAMETERS: table_index - Where table index is returned
490 * table_desc - Where table descriptor is returned
489 * 491 *
490 * RETURN: Status and table index. 492 * RETURN: Status and table index/descriptor.
491 * 493 *
492 * DESCRIPTION: Allocate a new ACPI table entry to the global table list 494 * DESCRIPTION: Allocate a new ACPI table entry to the global table list
493 * 495 *
494 ******************************************************************************/ 496 ******************************************************************************/
495 497
496acpi_status acpi_tb_get_next_root_index(u32 *table_index) 498acpi_status
499acpi_tb_get_next_table_descriptor(u32 *table_index,
500 struct acpi_table_desc **table_desc)
497{ 501{
498 acpi_status status; 502 acpi_status status;
503 u32 i;
499 504
500 /* Ensure that there is room for the table in the Root Table List */ 505 /* Ensure that there is room for the table in the Root Table List */
501 506
@@ -507,8 +512,16 @@ acpi_status acpi_tb_get_next_root_index(u32 *table_index)
507 } 512 }
508 } 513 }
509 514
510 *table_index = acpi_gbl_root_table_list.current_table_count; 515 i = acpi_gbl_root_table_list.current_table_count;
511 acpi_gbl_root_table_list.current_table_count++; 516 acpi_gbl_root_table_list.current_table_count++;
517
518 if (table_index) {
519 *table_index = i;
520 }
521 if (table_desc) {
522 *table_desc = &acpi_gbl_root_table_list.tables[i];
523 }
524
512 return (AE_OK); 525 return (AE_OK);
513} 526}
514 527
diff --git a/drivers/acpi/acpica/tbinstal.c b/drivers/acpi/acpica/tbinstal.c
index 9bad45e63a45..008a251780f4 100644
--- a/drivers/acpi/acpica/tbinstal.c
+++ b/drivers/acpi/acpica/tbinstal.c
@@ -187,8 +187,9 @@ acpi_tb_install_fixed_table(acpi_physical_address address,
187 status = acpi_tb_acquire_temp_table(&new_table_desc, address, 187 status = acpi_tb_acquire_temp_table(&new_table_desc, address,
188 ACPI_TABLE_ORIGIN_INTERNAL_PHYSICAL); 188 ACPI_TABLE_ORIGIN_INTERNAL_PHYSICAL);
189 if (ACPI_FAILURE(status)) { 189 if (ACPI_FAILURE(status)) {
190 ACPI_ERROR((AE_INFO, "Could not acquire table length at %p", 190 ACPI_ERROR((AE_INFO,
191 ACPI_CAST_PTR(void, address))); 191 "Could not acquire table length at %8.8X%8.8X",
192 ACPI_FORMAT_UINT64(address)));
192 return_ACPI_STATUS(status); 193 return_ACPI_STATUS(status);
193 } 194 }
194 195
@@ -246,8 +247,9 @@ acpi_tb_install_standard_table(acpi_physical_address address,
246 247
247 status = acpi_tb_acquire_temp_table(&new_table_desc, address, flags); 248 status = acpi_tb_acquire_temp_table(&new_table_desc, address, flags);
248 if (ACPI_FAILURE(status)) { 249 if (ACPI_FAILURE(status)) {
249 ACPI_ERROR((AE_INFO, "Could not acquire table length at %p", 250 ACPI_ERROR((AE_INFO,
250 ACPI_CAST_PTR(void, address))); 251 "Could not acquire table length at %8.8X%8.8X",
252 ACPI_FORMAT_UINT64(address)));
251 return_ACPI_STATUS(status); 253 return_ACPI_STATUS(status);
252 } 254 }
253 255
@@ -258,9 +260,10 @@ acpi_tb_install_standard_table(acpi_physical_address address,
258 if (!reload && 260 if (!reload &&
259 acpi_gbl_disable_ssdt_table_install && 261 acpi_gbl_disable_ssdt_table_install &&
260 ACPI_COMPARE_NAME(&new_table_desc.signature, ACPI_SIG_SSDT)) { 262 ACPI_COMPARE_NAME(&new_table_desc.signature, ACPI_SIG_SSDT)) {
261 ACPI_INFO((AE_INFO, "Ignoring installation of %4.4s at %p", 263 ACPI_INFO((AE_INFO,
262 new_table_desc.signature.ascii, ACPI_CAST_PTR(void, 264 "Ignoring installation of %4.4s at %8.8X%8.8X",
263 address))); 265 new_table_desc.signature.ascii,
266 ACPI_FORMAT_UINT64(address)));
264 goto release_and_exit; 267 goto release_and_exit;
265 } 268 }
266 269
@@ -346,7 +349,6 @@ acpi_tb_install_standard_table(acpi_physical_address address,
346 */ 349 */
347 acpi_tb_uninstall_table(&new_table_desc); 350 acpi_tb_uninstall_table(&new_table_desc);
348 *table_index = i; 351 *table_index = i;
349 (void)acpi_ut_release_mutex(ACPI_MTX_TABLES);
350 return_ACPI_STATUS(AE_OK); 352 return_ACPI_STATUS(AE_OK);
351 } 353 }
352 } 354 }
@@ -354,7 +356,7 @@ acpi_tb_install_standard_table(acpi_physical_address address,
354 356
355 /* Add the table to the global root table list */ 357 /* Add the table to the global root table list */
356 358
357 status = acpi_tb_get_next_root_index(&i); 359 status = acpi_tb_get_next_table_descriptor(&i, NULL);
358 if (ACPI_FAILURE(status)) { 360 if (ACPI_FAILURE(status)) {
359 goto release_and_exit; 361 goto release_and_exit;
360 } 362 }
@@ -429,11 +431,11 @@ finish_override:
429 return; 431 return;
430 } 432 }
431 433
432 ACPI_INFO((AE_INFO, "%4.4s " ACPI_PRINTF_UINT 434 ACPI_INFO((AE_INFO, "%4.4s 0x%8.8X%8.8X"
433 " %s table override, new table: " ACPI_PRINTF_UINT, 435 " %s table override, new table: 0x%8.8X%8.8X",
434 old_table_desc->signature.ascii, 436 old_table_desc->signature.ascii,
435 ACPI_FORMAT_TO_UINT(old_table_desc->address), 437 ACPI_FORMAT_UINT64(old_table_desc->address),
436 override_type, ACPI_FORMAT_TO_UINT(new_table_desc.address))); 438 override_type, ACPI_FORMAT_UINT64(new_table_desc.address)));
437 439
438 /* We can now uninstall the original table */ 440 /* We can now uninstall the original table */
439 441
@@ -455,43 +457,6 @@ finish_override:
455 457
456/******************************************************************************* 458/*******************************************************************************
457 * 459 *
458 * FUNCTION: acpi_tb_store_table
459 *
460 * PARAMETERS: address - Table address
461 * table - Table header
462 * length - Table length
463 * flags - Install flags
464 * table_index - Where the table index is returned
465 *
466 * RETURN: Status and table index.
467 *
468 * DESCRIPTION: Add an ACPI table to the global table list
469 *
470 ******************************************************************************/
471
472acpi_status
473acpi_tb_store_table(acpi_physical_address address,
474 struct acpi_table_header * table,
475 u32 length, u8 flags, u32 *table_index)
476{
477 acpi_status status;
478 struct acpi_table_desc *table_desc;
479
480 status = acpi_tb_get_next_root_index(table_index);
481 if (ACPI_FAILURE(status)) {
482 return (status);
483 }
484
485 /* Initialize added table */
486
487 table_desc = &acpi_gbl_root_table_list.tables[*table_index];
488 acpi_tb_init_table_descriptor(table_desc, address, flags, table);
489 table_desc->pointer = table;
490 return (AE_OK);
491}
492
493/*******************************************************************************
494 *
495 * FUNCTION: acpi_tb_uninstall_table 460 * FUNCTION: acpi_tb_uninstall_table
496 * 461 *
497 * PARAMETERS: table_desc - Table descriptor 462 * PARAMETERS: table_desc - Table descriptor
@@ -517,7 +482,7 @@ void acpi_tb_uninstall_table(struct acpi_table_desc *table_desc)
517 482
518 if ((table_desc->flags & ACPI_TABLE_ORIGIN_MASK) == 483 if ((table_desc->flags & ACPI_TABLE_ORIGIN_MASK) ==
519 ACPI_TABLE_ORIGIN_INTERNAL_VIRTUAL) { 484 ACPI_TABLE_ORIGIN_INTERNAL_VIRTUAL) {
520 ACPI_FREE(ACPI_CAST_PTR(void, table_desc->address)); 485 ACPI_FREE(ACPI_PHYSADDR_TO_PTR(table_desc->address));
521 } 486 }
522 487
523 table_desc->address = ACPI_PTR_TO_PHYSADDR(NULL); 488 table_desc->address = ACPI_PTR_TO_PHYSADDR(NULL);
diff --git a/drivers/acpi/acpica/tbprint.c b/drivers/acpi/acpica/tbprint.c
index ef16c06e5091..77ba5c71c6e7 100644
--- a/drivers/acpi/acpica/tbprint.c
+++ b/drivers/acpi/acpica/tbprint.c
@@ -127,18 +127,12 @@ acpi_tb_print_table_header(acpi_physical_address address,
127{ 127{
128 struct acpi_table_header local_header; 128 struct acpi_table_header local_header;
129 129
130 /*
131 * The reason that we use ACPI_PRINTF_UINT and ACPI_FORMAT_TO_UINT is to
132 * support both 32-bit and 64-bit hosts/addresses in a consistent manner.
133 * The %p specifier does not emit uniform output on all hosts. On some,
134 * leading zeros are not supported.
135 */
136 if (ACPI_COMPARE_NAME(header->signature, ACPI_SIG_FACS)) { 130 if (ACPI_COMPARE_NAME(header->signature, ACPI_SIG_FACS)) {
137 131
138 /* FACS only has signature and length fields */ 132 /* FACS only has signature and length fields */
139 133
140 ACPI_INFO((AE_INFO, "%-4.4s " ACPI_PRINTF_UINT " %06X", 134 ACPI_INFO((AE_INFO, "%-4.4s 0x%8.8X%8.8X %06X",
141 header->signature, ACPI_FORMAT_TO_UINT(address), 135 header->signature, ACPI_FORMAT_UINT64(address),
142 header->length)); 136 header->length));
143 } else if (ACPI_VALIDATE_RSDP_SIG(header->signature)) { 137 } else if (ACPI_VALIDATE_RSDP_SIG(header->signature)) {
144 138
@@ -149,9 +143,8 @@ acpi_tb_print_table_header(acpi_physical_address address,
149 header)->oem_id, ACPI_OEM_ID_SIZE); 143 header)->oem_id, ACPI_OEM_ID_SIZE);
150 acpi_tb_fix_string(local_header.oem_id, ACPI_OEM_ID_SIZE); 144 acpi_tb_fix_string(local_header.oem_id, ACPI_OEM_ID_SIZE);
151 145
152 ACPI_INFO((AE_INFO, 146 ACPI_INFO((AE_INFO, "RSDP 0x%8.8X%8.8X %06X (v%.2d %-6.6s)",
153 "RSDP " ACPI_PRINTF_UINT " %06X (v%.2d %-6.6s)", 147 ACPI_FORMAT_UINT64(address),
154 ACPI_FORMAT_TO_UINT(address),
155 (ACPI_CAST_PTR(struct acpi_table_rsdp, header)-> 148 (ACPI_CAST_PTR(struct acpi_table_rsdp, header)->
156 revision > 149 revision >
157 0) ? ACPI_CAST_PTR(struct acpi_table_rsdp, 150 0) ? ACPI_CAST_PTR(struct acpi_table_rsdp,
@@ -165,9 +158,9 @@ acpi_tb_print_table_header(acpi_physical_address address,
165 acpi_tb_cleanup_table_header(&local_header, header); 158 acpi_tb_cleanup_table_header(&local_header, header);
166 159
167 ACPI_INFO((AE_INFO, 160 ACPI_INFO((AE_INFO,
168 "%-4.4s " ACPI_PRINTF_UINT 161 "%-4.4s 0x%8.8X%8.8X"
169 " %06X (v%.2d %-6.6s %-8.8s %08X %-4.4s %08X)", 162 " %06X (v%.2d %-6.6s %-8.8s %08X %-4.4s %08X)",
170 local_header.signature, ACPI_FORMAT_TO_UINT(address), 163 local_header.signature, ACPI_FORMAT_UINT64(address),
171 local_header.length, local_header.revision, 164 local_header.length, local_header.revision,
172 local_header.oem_id, local_header.oem_table_id, 165 local_header.oem_id, local_header.oem_table_id,
173 local_header.oem_revision, 166 local_header.oem_revision,
diff --git a/drivers/acpi/acpica/tbxfroot.c b/drivers/acpi/acpica/tbxfroot.c
index eac52cf14f1a..fa76a3603aa1 100644
--- a/drivers/acpi/acpica/tbxfroot.c
+++ b/drivers/acpi/acpica/tbxfroot.c
@@ -142,7 +142,7 @@ acpi_status acpi_tb_validate_rsdp(struct acpi_table_rsdp * rsdp)
142 * 142 *
143 ******************************************************************************/ 143 ******************************************************************************/
144 144
145acpi_status __init acpi_find_root_pointer(acpi_size *table_address) 145acpi_status __init acpi_find_root_pointer(acpi_physical_address * table_address)
146{ 146{
147 u8 *table_ptr; 147 u8 *table_ptr;
148 u8 *mem_rover; 148 u8 *mem_rover;
@@ -200,7 +200,8 @@ acpi_status __init acpi_find_root_pointer(acpi_size *table_address)
200 physical_address += 200 physical_address +=
201 (u32) ACPI_PTR_DIFF(mem_rover, table_ptr); 201 (u32) ACPI_PTR_DIFF(mem_rover, table_ptr);
202 202
203 *table_address = physical_address; 203 *table_address =
204 (acpi_physical_address) physical_address;
204 return_ACPI_STATUS(AE_OK); 205 return_ACPI_STATUS(AE_OK);
205 } 206 }
206 } 207 }
@@ -233,7 +234,7 @@ acpi_status __init acpi_find_root_pointer(acpi_size *table_address)
233 (ACPI_HI_RSDP_WINDOW_BASE + 234 (ACPI_HI_RSDP_WINDOW_BASE +
234 ACPI_PTR_DIFF(mem_rover, table_ptr)); 235 ACPI_PTR_DIFF(mem_rover, table_ptr));
235 236
236 *table_address = physical_address; 237 *table_address = (acpi_physical_address) physical_address;
237 return_ACPI_STATUS(AE_OK); 238 return_ACPI_STATUS(AE_OK);
238 } 239 }
239 240
diff --git a/drivers/acpi/acpica/utaddress.c b/drivers/acpi/acpica/utaddress.c
index 1279f50da757..911ea8e7fe87 100644
--- a/drivers/acpi/acpica/utaddress.c
+++ b/drivers/acpi/acpica/utaddress.c
@@ -107,10 +107,10 @@ acpi_ut_add_address_range(acpi_adr_space_type space_id,
107 acpi_gbl_address_range_list[space_id] = range_info; 107 acpi_gbl_address_range_list[space_id] = range_info;
108 108
109 ACPI_DEBUG_PRINT((ACPI_DB_NAMES, 109 ACPI_DEBUG_PRINT((ACPI_DB_NAMES,
110 "\nAdded [%4.4s] address range: 0x%p-0x%p\n", 110 "\nAdded [%4.4s] address range: 0x%8.8X%8.8X-0x%8.8X%8.8X\n",
111 acpi_ut_get_node_name(range_info->region_node), 111 acpi_ut_get_node_name(range_info->region_node),
112 ACPI_CAST_PTR(void, address), 112 ACPI_FORMAT_UINT64(address),
113 ACPI_CAST_PTR(void, range_info->end_address))); 113 ACPI_FORMAT_UINT64(range_info->end_address)));
114 114
115 (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE); 115 (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
116 return_ACPI_STATUS(AE_OK); 116 return_ACPI_STATUS(AE_OK);
@@ -160,15 +160,13 @@ acpi_ut_remove_address_range(acpi_adr_space_type space_id,
160 } 160 }
161 161
162 ACPI_DEBUG_PRINT((ACPI_DB_NAMES, 162 ACPI_DEBUG_PRINT((ACPI_DB_NAMES,
163 "\nRemoved [%4.4s] address range: 0x%p-0x%p\n", 163 "\nRemoved [%4.4s] address range: 0x%8.8X%8.8X-0x%8.8X%8.8X\n",
164 acpi_ut_get_node_name(range_info-> 164 acpi_ut_get_node_name(range_info->
165 region_node), 165 region_node),
166 ACPI_CAST_PTR(void, 166 ACPI_FORMAT_UINT64(range_info->
167 range_info-> 167 start_address),
168 start_address), 168 ACPI_FORMAT_UINT64(range_info->
169 ACPI_CAST_PTR(void, 169 end_address)));
170 range_info->
171 end_address)));
172 170
173 ACPI_FREE(range_info); 171 ACPI_FREE(range_info);
174 return_VOID; 172 return_VOID;
@@ -245,16 +243,14 @@ acpi_ut_check_address_range(acpi_adr_space_type space_id,
245 region_node); 243 region_node);
246 244
247 ACPI_WARNING((AE_INFO, 245 ACPI_WARNING((AE_INFO,
248 "%s range 0x%p-0x%p conflicts with OpRegion 0x%p-0x%p (%s)", 246 "%s range 0x%8.8X%8.8X-0x%8.8X%8.8X conflicts with OpRegion 0x%8.8X%8.8X-0x%8.8X%8.8X (%s)",
249 acpi_ut_get_region_name(space_id), 247 acpi_ut_get_region_name(space_id),
250 ACPI_CAST_PTR(void, address), 248 ACPI_FORMAT_UINT64(address),
251 ACPI_CAST_PTR(void, end_address), 249 ACPI_FORMAT_UINT64(end_address),
252 ACPI_CAST_PTR(void, 250 ACPI_FORMAT_UINT64(range_info->
253 range_info-> 251 start_address),
254 start_address), 252 ACPI_FORMAT_UINT64(range_info->
255 ACPI_CAST_PTR(void, 253 end_address),
256 range_info->
257 end_address),
258 pathname)); 254 pathname));
259 ACPI_FREE(pathname); 255 ACPI_FREE(pathname);
260 } 256 }
diff --git a/drivers/acpi/acpica/utbuffer.c b/drivers/acpi/acpica/utbuffer.c
index 242bd071f007..a8c39643e618 100644
--- a/drivers/acpi/acpica/utbuffer.c
+++ b/drivers/acpi/acpica/utbuffer.c
@@ -150,6 +150,14 @@ void acpi_ut_dump_buffer(u8 *buffer, u32 count, u32 display, u32 base_offset)
150 return; 150 return;
151 } 151 }
152 152
153 /*
154 * Add comment characters so rest of line is ignored when
155 * compiled
156 */
157 if (j == 0) {
158 acpi_os_printf("// ");
159 }
160
153 buf_char = buffer[(acpi_size) i + j]; 161 buf_char = buffer[(acpi_size) i + j];
154 if (ACPI_IS_PRINT(buf_char)) { 162 if (ACPI_IS_PRINT(buf_char)) {
155 acpi_os_printf("%c", buf_char); 163 acpi_os_printf("%c", buf_char);
diff --git a/drivers/acpi/acpica/utglobal.c b/drivers/acpi/acpica/utglobal.c
index 5e8df9177da4..a72685c1e819 100644
--- a/drivers/acpi/acpica/utglobal.c
+++ b/drivers/acpi/acpica/utglobal.c
@@ -102,12 +102,19 @@ const struct acpi_predefined_names acpi_gbl_pre_defined_names[] = {
102 {"_SB_", ACPI_TYPE_DEVICE, NULL}, 102 {"_SB_", ACPI_TYPE_DEVICE, NULL},
103 {"_SI_", ACPI_TYPE_LOCAL_SCOPE, NULL}, 103 {"_SI_", ACPI_TYPE_LOCAL_SCOPE, NULL},
104 {"_TZ_", ACPI_TYPE_DEVICE, NULL}, 104 {"_TZ_", ACPI_TYPE_DEVICE, NULL},
105 {"_REV", ACPI_TYPE_INTEGER, (char *)ACPI_CA_SUPPORT_LEVEL}, 105 /*
106 * March, 2015:
107 * The _REV object is in the process of being deprecated, because
108 * other ACPI implementations permanently return 2. Thus, it
109 * has little or no value. Return 2 for compatibility with
110 * other ACPI implementations.
111 */
112 {"_REV", ACPI_TYPE_INTEGER, ACPI_CAST_PTR(char, 2)},
106 {"_OS_", ACPI_TYPE_STRING, ACPI_OS_NAME}, 113 {"_OS_", ACPI_TYPE_STRING, ACPI_OS_NAME},
107 {"_GL_", ACPI_TYPE_MUTEX, (char *)1}, 114 {"_GL_", ACPI_TYPE_MUTEX, ACPI_CAST_PTR(char, 1)},
108 115
109#if !defined (ACPI_NO_METHOD_EXECUTION) || defined (ACPI_CONSTANT_EVAL_ONLY) 116#if !defined (ACPI_NO_METHOD_EXECUTION) || defined (ACPI_CONSTANT_EVAL_ONLY)
110 {"_OSI", ACPI_TYPE_METHOD, (char *)1}, 117 {"_OSI", ACPI_TYPE_METHOD, ACPI_CAST_PTR(char, 1)},
111#endif 118#endif
112 119
113 /* Table terminator */ 120 /* Table terminator */
diff --git a/drivers/acpi/acpica/utmisc.c b/drivers/acpi/acpica/utmisc.c
index 56bbacd576f2..cbb7034d28d8 100644
--- a/drivers/acpi/acpica/utmisc.c
+++ b/drivers/acpi/acpica/utmisc.c
@@ -75,6 +75,7 @@ u8 acpi_ut_is_pci_root_bridge(char *id)
75 return (FALSE); 75 return (FALSE);
76} 76}
77 77
78#if (defined ACPI_ASL_COMPILER || defined ACPI_EXEC_APP)
78/******************************************************************************* 79/*******************************************************************************
79 * 80 *
80 * FUNCTION: acpi_ut_is_aml_table 81 * FUNCTION: acpi_ut_is_aml_table
@@ -102,6 +103,7 @@ u8 acpi_ut_is_aml_table(struct acpi_table_header *table)
102 103
103 return (FALSE); 104 return (FALSE);
104} 105}
106#endif
105 107
106/******************************************************************************* 108/*******************************************************************************
107 * 109 *
diff --git a/drivers/acpi/acpica/utosi.c b/drivers/acpi/acpica/utosi.c
index 574cd3118313..44035abdbf29 100644
--- a/drivers/acpi/acpica/utosi.c
+++ b/drivers/acpi/acpica/utosi.c
@@ -100,6 +100,7 @@ static struct acpi_interface_info acpi_default_supported_interfaces[] = {
100 {"Windows 2009", NULL, 0, ACPI_OSI_WIN_7}, /* Windows 7 and Server 2008 R2 - Added 09/2009 */ 100 {"Windows 2009", NULL, 0, ACPI_OSI_WIN_7}, /* Windows 7 and Server 2008 R2 - Added 09/2009 */
101 {"Windows 2012", NULL, 0, ACPI_OSI_WIN_8}, /* Windows 8 and Server 2012 - Added 08/2012 */ 101 {"Windows 2012", NULL, 0, ACPI_OSI_WIN_8}, /* Windows 8 and Server 2012 - Added 08/2012 */
102 {"Windows 2013", NULL, 0, ACPI_OSI_WIN_8}, /* Windows 8.1 and Server 2012 R2 - Added 01/2014 */ 102 {"Windows 2013", NULL, 0, ACPI_OSI_WIN_8}, /* Windows 8.1 and Server 2012 R2 - Added 01/2014 */
103 {"Windows 2015", NULL, 0, ACPI_OSI_WIN_10}, /* Windows 10 - Added 03/2015 */
103 104
104 /* Feature Group Strings */ 105 /* Feature Group Strings */
105 106
diff --git a/drivers/acpi/acpica/utprint.c b/drivers/acpi/acpica/utprint.c
index 82ca9142e10d..2be6bd4bdc09 100644
--- a/drivers/acpi/acpica/utprint.c
+++ b/drivers/acpi/acpica/utprint.c
@@ -357,11 +357,11 @@ int
357acpi_ut_vsnprintf(char *string, 357acpi_ut_vsnprintf(char *string,
358 acpi_size size, const char *format, va_list args) 358 acpi_size size, const char *format, va_list args)
359{ 359{
360 u8 base = 10; 360 u8 base;
361 u8 type = 0; 361 u8 type;
362 s32 width = -1; 362 s32 width;
363 s32 precision = -1; 363 s32 precision;
364 char qualifier = 0; 364 char qualifier;
365 u64 number; 365 u64 number;
366 char *pos; 366 char *pos;
367 char *end; 367 char *end;
@@ -380,6 +380,9 @@ acpi_ut_vsnprintf(char *string,
380 continue; 380 continue;
381 } 381 }
382 382
383 type = 0;
384 base = 10;
385
383 /* Process sign */ 386 /* Process sign */
384 387
385 do { 388 do {
diff --git a/drivers/acpi/acpica/utstate.c b/drivers/acpi/acpica/utstate.c
index 8274cc16edc3..f201171c5dda 100644
--- a/drivers/acpi/acpica/utstate.c
+++ b/drivers/acpi/acpica/utstate.c
@@ -49,39 +49,6 @@ ACPI_MODULE_NAME("utstate")
49 49
50/******************************************************************************* 50/*******************************************************************************
51 * 51 *
52 * FUNCTION: acpi_ut_create_pkg_state_and_push
53 *
54 * PARAMETERS: object - Object to be added to the new state
55 * action - Increment/Decrement
56 * state_list - List the state will be added to
57 *
58 * RETURN: Status
59 *
60 * DESCRIPTION: Create a new state and push it
61 *
62 ******************************************************************************/
63acpi_status
64acpi_ut_create_pkg_state_and_push(void *internal_object,
65 void *external_object,
66 u16 index,
67 union acpi_generic_state **state_list)
68{
69 union acpi_generic_state *state;
70
71 ACPI_FUNCTION_ENTRY();
72
73 state =
74 acpi_ut_create_pkg_state(internal_object, external_object, index);
75 if (!state) {
76 return (AE_NO_MEMORY);
77 }
78
79 acpi_ut_push_generic_state(state_list, state);
80 return (AE_OK);
81}
82
83/*******************************************************************************
84 *
85 * FUNCTION: acpi_ut_push_generic_state 52 * FUNCTION: acpi_ut_push_generic_state
86 * 53 *
87 * PARAMETERS: list_head - Head of the state stack 54 * PARAMETERS: list_head - Head of the state stack
@@ -92,7 +59,6 @@ acpi_ut_create_pkg_state_and_push(void *internal_object,
92 * DESCRIPTION: Push a state object onto a state stack 59 * DESCRIPTION: Push a state object onto a state stack
93 * 60 *
94 ******************************************************************************/ 61 ******************************************************************************/
95
96void 62void
97acpi_ut_push_generic_state(union acpi_generic_state **list_head, 63acpi_ut_push_generic_state(union acpi_generic_state **list_head,
98 union acpi_generic_state *state) 64 union acpi_generic_state *state)
diff --git a/drivers/acpi/acpica/utuuid.c b/drivers/acpi/acpica/utuuid.c
index c6149a212149..e6cab669bd9c 100644
--- a/drivers/acpi/acpica/utuuid.c
+++ b/drivers/acpi/acpica/utuuid.c
@@ -47,6 +47,7 @@
47#define _COMPONENT ACPI_COMPILER 47#define _COMPONENT ACPI_COMPILER
48ACPI_MODULE_NAME("utuuid") 48ACPI_MODULE_NAME("utuuid")
49 49
50#if (defined ACPI_ASL_COMPILER || defined ACPI_EXEC_APP || defined ACPI_HELP_APP)
50/* 51/*
51 * UUID support functions. 52 * UUID support functions.
52 * 53 *
@@ -94,3 +95,4 @@ void acpi_ut_convert_string_to_uuid(char *in_string, u8 *uuid_buffer)
94 1]); 95 1]);
95 } 96 }
96} 97}
98#endif
diff --git a/drivers/bcma/driver_mips.c b/drivers/bcma/driver_mips.c
index 04faf6df959f..24424f3fef96 100644
--- a/drivers/bcma/driver_mips.c
+++ b/drivers/bcma/driver_mips.c
@@ -21,7 +21,7 @@
21#include <linux/serial_reg.h> 21#include <linux/serial_reg.h>
22#include <linux/time.h> 22#include <linux/time.h>
23#ifdef CONFIG_BCM47XX 23#ifdef CONFIG_BCM47XX
24#include <bcm47xx_nvram.h> 24#include <linux/bcm47xx_nvram.h>
25#endif 25#endif
26 26
27enum bcma_boot_dev { 27enum bcma_boot_dev {
diff --git a/drivers/block/drbd/drbd_main.c b/drivers/block/drbd/drbd_main.c
index 1fc83427199c..81fde9ef7f8e 100644
--- a/drivers/block/drbd/drbd_main.c
+++ b/drivers/block/drbd/drbd_main.c
@@ -2107,13 +2107,12 @@ static int drbd_create_mempools(void)
2107 if (drbd_md_io_page_pool == NULL) 2107 if (drbd_md_io_page_pool == NULL)
2108 goto Enomem; 2108 goto Enomem;
2109 2109
2110 drbd_request_mempool = mempool_create(number, 2110 drbd_request_mempool = mempool_create_slab_pool(number,
2111 mempool_alloc_slab, mempool_free_slab, drbd_request_cache); 2111 drbd_request_cache);
2112 if (drbd_request_mempool == NULL) 2112 if (drbd_request_mempool == NULL)
2113 goto Enomem; 2113 goto Enomem;
2114 2114
2115 drbd_ee_mempool = mempool_create(number, 2115 drbd_ee_mempool = mempool_create_slab_pool(number, drbd_ee_cache);
2116 mempool_alloc_slab, mempool_free_slab, drbd_ee_cache);
2117 if (drbd_ee_mempool == NULL) 2116 if (drbd_ee_mempool == NULL)
2118 goto Enomem; 2117 goto Enomem;
2119 2118
diff --git a/drivers/block/drbd/drbd_req.c b/drivers/block/drbd/drbd_req.c
index 34f2f0ba409b..3907202fb9d9 100644
--- a/drivers/block/drbd/drbd_req.c
+++ b/drivers/block/drbd/drbd_req.c
@@ -52,9 +52,10 @@ static struct drbd_request *drbd_req_new(struct drbd_device *device,
52{ 52{
53 struct drbd_request *req; 53 struct drbd_request *req;
54 54
55 req = mempool_alloc(drbd_request_mempool, GFP_NOIO | __GFP_ZERO); 55 req = mempool_alloc(drbd_request_mempool, GFP_NOIO);
56 if (!req) 56 if (!req)
57 return NULL; 57 return NULL;
58 memset(req, 0, sizeof(*req));
58 59
59 drbd_req_make_private_bio(req, bio_src); 60 drbd_req_make_private_bio(req, bio_src);
60 req->rq_state = bio_data_dir(bio_src) == WRITE ? RQ_WRITE : 0; 61 req->rq_state = bio_data_dir(bio_src) == WRITE ? RQ_WRITE : 0;
diff --git a/drivers/block/loop.c b/drivers/block/loop.c
index c4fd1e45ce1e..ae3fcb4199e9 100644
--- a/drivers/block/loop.c
+++ b/drivers/block/loop.c
@@ -88,28 +88,6 @@ static int part_shift;
88 88
89static struct workqueue_struct *loop_wq; 89static struct workqueue_struct *loop_wq;
90 90
91/*
92 * Transfer functions
93 */
94static int transfer_none(struct loop_device *lo, int cmd,
95 struct page *raw_page, unsigned raw_off,
96 struct page *loop_page, unsigned loop_off,
97 int size, sector_t real_block)
98{
99 char *raw_buf = kmap_atomic(raw_page) + raw_off;
100 char *loop_buf = kmap_atomic(loop_page) + loop_off;
101
102 if (cmd == READ)
103 memcpy(loop_buf, raw_buf, size);
104 else
105 memcpy(raw_buf, loop_buf, size);
106
107 kunmap_atomic(loop_buf);
108 kunmap_atomic(raw_buf);
109 cond_resched();
110 return 0;
111}
112
113static int transfer_xor(struct loop_device *lo, int cmd, 91static int transfer_xor(struct loop_device *lo, int cmd,
114 struct page *raw_page, unsigned raw_off, 92 struct page *raw_page, unsigned raw_off,
115 struct page *loop_page, unsigned loop_off, 93 struct page *loop_page, unsigned loop_off,
@@ -148,14 +126,13 @@ static int xor_init(struct loop_device *lo, const struct loop_info64 *info)
148 126
149static struct loop_func_table none_funcs = { 127static struct loop_func_table none_funcs = {
150 .number = LO_CRYPT_NONE, 128 .number = LO_CRYPT_NONE,
151 .transfer = transfer_none, 129};
152};
153 130
154static struct loop_func_table xor_funcs = { 131static struct loop_func_table xor_funcs = {
155 .number = LO_CRYPT_XOR, 132 .number = LO_CRYPT_XOR,
156 .transfer = transfer_xor, 133 .transfer = transfer_xor,
157 .init = xor_init 134 .init = xor_init
158}; 135};
159 136
160/* xfer_funcs[0] is special - its release function is never called */ 137/* xfer_funcs[0] is special - its release function is never called */
161static struct loop_func_table *xfer_funcs[MAX_LO_CRYPT] = { 138static struct loop_func_table *xfer_funcs[MAX_LO_CRYPT] = {
@@ -215,207 +192,169 @@ lo_do_transfer(struct loop_device *lo, int cmd,
215 struct page *lpage, unsigned loffs, 192 struct page *lpage, unsigned loffs,
216 int size, sector_t rblock) 193 int size, sector_t rblock)
217{ 194{
218 if (unlikely(!lo->transfer)) 195 int ret;
196
197 ret = lo->transfer(lo, cmd, rpage, roffs, lpage, loffs, size, rblock);
198 if (likely(!ret))
219 return 0; 199 return 0;
220 200
221 return lo->transfer(lo, cmd, rpage, roffs, lpage, loffs, size, rblock); 201 printk_ratelimited(KERN_ERR
202 "loop: Transfer error at byte offset %llu, length %i.\n",
203 (unsigned long long)rblock << 9, size);
204 return ret;
222} 205}
223 206
224/** 207static int lo_write_bvec(struct file *file, struct bio_vec *bvec, loff_t *ppos)
225 * __do_lo_send_write - helper for writing data to a loop device
226 *
227 * This helper just factors out common code between do_lo_send_direct_write()
228 * and do_lo_send_write().
229 */
230static int __do_lo_send_write(struct file *file,
231 u8 *buf, const int len, loff_t pos)
232{ 208{
233 struct kvec kvec = {.iov_base = buf, .iov_len = len}; 209 struct iov_iter i;
234 struct iov_iter from;
235 ssize_t bw; 210 ssize_t bw;
236 211
237 iov_iter_kvec(&from, ITER_KVEC | WRITE, &kvec, 1, len); 212 iov_iter_bvec(&i, ITER_BVEC, bvec, 1, bvec->bv_len);
238 213
239 file_start_write(file); 214 file_start_write(file);
240 bw = vfs_iter_write(file, &from, &pos); 215 bw = vfs_iter_write(file, &i, ppos);
241 file_end_write(file); 216 file_end_write(file);
242 if (likely(bw == len)) 217
218 if (likely(bw == bvec->bv_len))
243 return 0; 219 return 0;
244 printk_ratelimited(KERN_ERR "loop: Write error at byte offset %llu, length %i.\n", 220
245 (unsigned long long)pos, len); 221 printk_ratelimited(KERN_ERR
222 "loop: Write error at byte offset %llu, length %i.\n",
223 (unsigned long long)*ppos, bvec->bv_len);
246 if (bw >= 0) 224 if (bw >= 0)
247 bw = -EIO; 225 bw = -EIO;
248 return bw; 226 return bw;
249} 227}
250 228
251/** 229static int lo_write_simple(struct loop_device *lo, struct request *rq,
252 * do_lo_send_direct_write - helper for writing data to a loop device 230 loff_t pos)
253 *
254 * This is the fast, non-transforming version that does not need double
255 * buffering.
256 */
257static int do_lo_send_direct_write(struct loop_device *lo,
258 struct bio_vec *bvec, loff_t pos, struct page *page)
259{ 231{
260 ssize_t bw = __do_lo_send_write(lo->lo_backing_file, 232 struct bio_vec bvec;
261 kmap(bvec->bv_page) + bvec->bv_offset, 233 struct req_iterator iter;
262 bvec->bv_len, pos); 234 int ret = 0;
263 kunmap(bvec->bv_page); 235
264 cond_resched(); 236 rq_for_each_segment(bvec, rq, iter) {
265 return bw; 237 ret = lo_write_bvec(lo->lo_backing_file, &bvec, &pos);
238 if (ret < 0)
239 break;
240 cond_resched();
241 }
242
243 return ret;
266} 244}
267 245
268/** 246/*
269 * do_lo_send_write - helper for writing data to a loop device
270 *
271 * This is the slow, transforming version that needs to double buffer the 247 * This is the slow, transforming version that needs to double buffer the
272 * data as it cannot do the transformations in place without having direct 248 * data as it cannot do the transformations in place without having direct
273 * access to the destination pages of the backing file. 249 * access to the destination pages of the backing file.
274 */ 250 */
275static int do_lo_send_write(struct loop_device *lo, struct bio_vec *bvec, 251static int lo_write_transfer(struct loop_device *lo, struct request *rq,
276 loff_t pos, struct page *page) 252 loff_t pos)
277{ 253{
278 int ret = lo_do_transfer(lo, WRITE, page, 0, bvec->bv_page, 254 struct bio_vec bvec, b;
279 bvec->bv_offset, bvec->bv_len, pos >> 9);
280 if (likely(!ret))
281 return __do_lo_send_write(lo->lo_backing_file,
282 page_address(page), bvec->bv_len,
283 pos);
284 printk_ratelimited(KERN_ERR "loop: Transfer error at byte offset %llu, "
285 "length %i.\n", (unsigned long long)pos, bvec->bv_len);
286 if (ret > 0)
287 ret = -EIO;
288 return ret;
289}
290
291static int lo_send(struct loop_device *lo, struct request *rq, loff_t pos)
292{
293 int (*do_lo_send)(struct loop_device *, struct bio_vec *, loff_t,
294 struct page *page);
295 struct bio_vec bvec;
296 struct req_iterator iter; 255 struct req_iterator iter;
297 struct page *page = NULL; 256 struct page *page;
298 int ret = 0; 257 int ret = 0;
299 258
300 if (lo->transfer != transfer_none) { 259 page = alloc_page(GFP_NOIO);
301 page = alloc_page(GFP_NOIO | __GFP_HIGHMEM); 260 if (unlikely(!page))
302 if (unlikely(!page)) 261 return -ENOMEM;
303 goto fail;
304 kmap(page);
305 do_lo_send = do_lo_send_write;
306 } else {
307 do_lo_send = do_lo_send_direct_write;
308 }
309 262
310 rq_for_each_segment(bvec, rq, iter) { 263 rq_for_each_segment(bvec, rq, iter) {
311 ret = do_lo_send(lo, &bvec, pos, page); 264 ret = lo_do_transfer(lo, WRITE, page, 0, bvec.bv_page,
265 bvec.bv_offset, bvec.bv_len, pos >> 9);
266 if (unlikely(ret))
267 break;
268
269 b.bv_page = page;
270 b.bv_offset = 0;
271 b.bv_len = bvec.bv_len;
272 ret = lo_write_bvec(lo->lo_backing_file, &b, &pos);
312 if (ret < 0) 273 if (ret < 0)
313 break; 274 break;
314 pos += bvec.bv_len;
315 } 275 }
316 if (page) { 276
317 kunmap(page); 277 __free_page(page);
318 __free_page(page);
319 }
320out:
321 return ret; 278 return ret;
322fail:
323 printk_ratelimited(KERN_ERR "loop: Failed to allocate temporary page for write.\n");
324 ret = -ENOMEM;
325 goto out;
326} 279}
327 280
328struct lo_read_data { 281static int lo_read_simple(struct loop_device *lo, struct request *rq,
329 struct loop_device *lo; 282 loff_t pos)
330 struct page *page; 283{
331 unsigned offset; 284 struct bio_vec bvec;
332 int bsize; 285 struct req_iterator iter;
333}; 286 struct iov_iter i;
287 ssize_t len;
334 288
335static int 289 rq_for_each_segment(bvec, rq, iter) {
336lo_splice_actor(struct pipe_inode_info *pipe, struct pipe_buffer *buf, 290 iov_iter_bvec(&i, ITER_BVEC, &bvec, 1, bvec.bv_len);
337 struct splice_desc *sd) 291 len = vfs_iter_read(lo->lo_backing_file, &i, &pos);
338{ 292 if (len < 0)
339 struct lo_read_data *p = sd->u.data; 293 return len;
340 struct loop_device *lo = p->lo;
341 struct page *page = buf->page;
342 sector_t IV;
343 int size;
344
345 IV = ((sector_t) page->index << (PAGE_CACHE_SHIFT - 9)) +
346 (buf->offset >> 9);
347 size = sd->len;
348 if (size > p->bsize)
349 size = p->bsize;
350
351 if (lo_do_transfer(lo, READ, page, buf->offset, p->page, p->offset, size, IV)) {
352 printk_ratelimited(KERN_ERR "loop: transfer error block %ld\n",
353 page->index);
354 size = -EINVAL;
355 }
356 294
357 flush_dcache_page(p->page); 295 flush_dcache_page(bvec.bv_page);
358 296
359 if (size > 0) 297 if (len != bvec.bv_len) {
360 p->offset += size; 298 struct bio *bio;
361 299
362 return size; 300 __rq_for_each_bio(bio, rq)
363} 301 zero_fill_bio(bio);
302 break;
303 }
304 cond_resched();
305 }
364 306
365static int 307 return 0;
366lo_direct_splice_actor(struct pipe_inode_info *pipe, struct splice_desc *sd)
367{
368 return __splice_from_pipe(pipe, sd, lo_splice_actor);
369} 308}
370 309
371static ssize_t 310static int lo_read_transfer(struct loop_device *lo, struct request *rq,
372do_lo_receive(struct loop_device *lo, 311 loff_t pos)
373 struct bio_vec *bvec, int bsize, loff_t pos)
374{ 312{
375 struct lo_read_data cookie; 313 struct bio_vec bvec, b;
376 struct splice_desc sd; 314 struct req_iterator iter;
377 struct file *file; 315 struct iov_iter i;
378 ssize_t retval; 316 struct page *page;
317 ssize_t len;
318 int ret = 0;
379 319
380 cookie.lo = lo; 320 page = alloc_page(GFP_NOIO);
381 cookie.page = bvec->bv_page; 321 if (unlikely(!page))
382 cookie.offset = bvec->bv_offset; 322 return -ENOMEM;
383 cookie.bsize = bsize;
384 323
385 sd.len = 0; 324 rq_for_each_segment(bvec, rq, iter) {
386 sd.total_len = bvec->bv_len; 325 loff_t offset = pos;
387 sd.flags = 0;
388 sd.pos = pos;
389 sd.u.data = &cookie;
390 326
391 file = lo->lo_backing_file; 327 b.bv_page = page;
392 retval = splice_direct_to_actor(file, &sd, lo_direct_splice_actor); 328 b.bv_offset = 0;
329 b.bv_len = bvec.bv_len;
393 330
394 return retval; 331 iov_iter_bvec(&i, ITER_BVEC, &b, 1, b.bv_len);
395} 332 len = vfs_iter_read(lo->lo_backing_file, &i, &pos);
333 if (len < 0) {
334 ret = len;
335 goto out_free_page;
336 }
396 337
397static int 338 ret = lo_do_transfer(lo, READ, page, 0, bvec.bv_page,
398lo_receive(struct loop_device *lo, struct request *rq, int bsize, loff_t pos) 339 bvec.bv_offset, len, offset >> 9);
399{ 340 if (ret)
400 struct bio_vec bvec; 341 goto out_free_page;
401 struct req_iterator iter;
402 ssize_t s;
403 342
404 rq_for_each_segment(bvec, rq, iter) { 343 flush_dcache_page(bvec.bv_page);
405 s = do_lo_receive(lo, &bvec, bsize, pos);
406 if (s < 0)
407 return s;
408 344
409 if (s != bvec.bv_len) { 345 if (len != bvec.bv_len) {
410 struct bio *bio; 346 struct bio *bio;
411 347
412 __rq_for_each_bio(bio, rq) 348 __rq_for_each_bio(bio, rq)
413 zero_fill_bio(bio); 349 zero_fill_bio(bio);
414 break; 350 break;
415 } 351 }
416 pos += bvec.bv_len;
417 } 352 }
418 return 0; 353
354 ret = 0;
355out_free_page:
356 __free_page(page);
357 return ret;
419} 358}
420 359
421static int lo_discard(struct loop_device *lo, struct request *rq, loff_t pos) 360static int lo_discard(struct loop_device *lo, struct request *rq, loff_t pos)
@@ -464,10 +403,17 @@ static int do_req_filebacked(struct loop_device *lo, struct request *rq)
464 ret = lo_req_flush(lo, rq); 403 ret = lo_req_flush(lo, rq);
465 else if (rq->cmd_flags & REQ_DISCARD) 404 else if (rq->cmd_flags & REQ_DISCARD)
466 ret = lo_discard(lo, rq, pos); 405 ret = lo_discard(lo, rq, pos);
406 else if (lo->transfer)
407 ret = lo_write_transfer(lo, rq, pos);
467 else 408 else
468 ret = lo_send(lo, rq, pos); 409 ret = lo_write_simple(lo, rq, pos);
469 } else 410
470 ret = lo_receive(lo, rq, lo->lo_blocksize, pos); 411 } else {
412 if (lo->transfer)
413 ret = lo_read_transfer(lo, rq, pos);
414 else
415 ret = lo_read_simple(lo, rq, pos);
416 }
471 417
472 return ret; 418 return ret;
473} 419}
@@ -788,7 +734,7 @@ static int loop_set_fd(struct loop_device *lo, fmode_t mode,
788 lo->lo_device = bdev; 734 lo->lo_device = bdev;
789 lo->lo_flags = lo_flags; 735 lo->lo_flags = lo_flags;
790 lo->lo_backing_file = file; 736 lo->lo_backing_file = file;
791 lo->transfer = transfer_none; 737 lo->transfer = NULL;
792 lo->ioctl = NULL; 738 lo->ioctl = NULL;
793 lo->lo_sizelimit = 0; 739 lo->lo_sizelimit = 0;
794 lo->old_gfp_mask = mapping_gfp_mask(mapping); 740 lo->old_gfp_mask = mapping_gfp_mask(mapping);
@@ -1007,7 +953,7 @@ loop_set_status(struct loop_device *lo, const struct loop_info64 *info)
1007 memcpy(lo->lo_encrypt_key, info->lo_encrypt_key, 953 memcpy(lo->lo_encrypt_key, info->lo_encrypt_key,
1008 info->lo_encrypt_key_size); 954 info->lo_encrypt_key_size);
1009 lo->lo_key_owner = uid; 955 lo->lo_key_owner = uid;
1010 } 956 }
1011 957
1012 return 0; 958 return 0;
1013} 959}
diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
index a98c41f72c63..39e5f7fae3ef 100644
--- a/drivers/block/nbd.c
+++ b/drivers/block/nbd.c
@@ -32,28 +32,36 @@
32#include <net/sock.h> 32#include <net/sock.h>
33#include <linux/net.h> 33#include <linux/net.h>
34#include <linux/kthread.h> 34#include <linux/kthread.h>
35#include <linux/types.h>
35 36
36#include <asm/uaccess.h> 37#include <asm/uaccess.h>
37#include <asm/types.h> 38#include <asm/types.h>
38 39
39#include <linux/nbd.h> 40#include <linux/nbd.h>
40 41
41#define NBD_MAGIC 0x68797548 42struct nbd_device {
43 int flags;
44 int harderror; /* Code of hard error */
45 struct socket * sock; /* If == NULL, device is not ready, yet */
46 int magic;
47
48 spinlock_t queue_lock;
49 struct list_head queue_head; /* Requests waiting result */
50 struct request *active_req;
51 wait_queue_head_t active_wq;
52 struct list_head waiting_queue; /* Requests to be sent */
53 wait_queue_head_t waiting_wq;
54
55 struct mutex tx_lock;
56 struct gendisk *disk;
57 int blksize;
58 loff_t bytesize;
59 pid_t pid; /* pid of nbd-client, if attached */
60 int xmit_timeout;
61 int disconnect; /* a disconnect has been requested by user */
62};
42 63
43#ifdef NDEBUG 64#define NBD_MAGIC 0x68797548
44#define dprintk(flags, fmt...)
45#else /* NDEBUG */
46#define dprintk(flags, fmt...) do { \
47 if (debugflags & (flags)) printk(KERN_DEBUG fmt); \
48} while (0)
49#define DBG_IOCTL 0x0004
50#define DBG_INIT 0x0010
51#define DBG_EXIT 0x0020
52#define DBG_BLKDEV 0x0100
53#define DBG_RX 0x0200
54#define DBG_TX 0x0400
55static unsigned int debugflags;
56#endif /* NDEBUG */
57 65
58static unsigned int nbds_max = 16; 66static unsigned int nbds_max = 16;
59static struct nbd_device *nbd_dev; 67static struct nbd_device *nbd_dev;
@@ -71,25 +79,9 @@ static int max_part;
71 */ 79 */
72static DEFINE_SPINLOCK(nbd_lock); 80static DEFINE_SPINLOCK(nbd_lock);
73 81
74#ifndef NDEBUG 82static inline struct device *nbd_to_dev(struct nbd_device *nbd)
75static const char *ioctl_cmd_to_ascii(int cmd)
76{ 83{
77 switch (cmd) { 84 return disk_to_dev(nbd->disk);
78 case NBD_SET_SOCK: return "set-sock";
79 case NBD_SET_BLKSIZE: return "set-blksize";
80 case NBD_SET_SIZE: return "set-size";
81 case NBD_SET_TIMEOUT: return "set-timeout";
82 case NBD_SET_FLAGS: return "set-flags";
83 case NBD_DO_IT: return "do-it";
84 case NBD_CLEAR_SOCK: return "clear-sock";
85 case NBD_CLEAR_QUE: return "clear-que";
86 case NBD_PRINT_DEBUG: return "print-debug";
87 case NBD_SET_SIZE_BLOCKS: return "set-size-blocks";
88 case NBD_DISCONNECT: return "disconnect";
89 case BLKROSET: return "set-read-only";
90 case BLKFLSBUF: return "flush-buffer-cache";
91 }
92 return "unknown";
93} 85}
94 86
95static const char *nbdcmd_to_ascii(int cmd) 87static const char *nbdcmd_to_ascii(int cmd)
@@ -103,30 +95,26 @@ static const char *nbdcmd_to_ascii(int cmd)
103 } 95 }
104 return "invalid"; 96 return "invalid";
105} 97}
106#endif /* NDEBUG */
107 98
108static void nbd_end_request(struct request *req) 99static void nbd_end_request(struct nbd_device *nbd, struct request *req)
109{ 100{
110 int error = req->errors ? -EIO : 0; 101 int error = req->errors ? -EIO : 0;
111 struct request_queue *q = req->q; 102 struct request_queue *q = req->q;
112 unsigned long flags; 103 unsigned long flags;
113 104
114 dprintk(DBG_BLKDEV, "%s: request %p: %s\n", req->rq_disk->disk_name, 105 dev_dbg(nbd_to_dev(nbd), "request %p: %s\n", req,
115 req, error ? "failed" : "done"); 106 error ? "failed" : "done");
116 107
117 spin_lock_irqsave(q->queue_lock, flags); 108 spin_lock_irqsave(q->queue_lock, flags);
118 __blk_end_request_all(req, error); 109 __blk_end_request_all(req, error);
119 spin_unlock_irqrestore(q->queue_lock, flags); 110 spin_unlock_irqrestore(q->queue_lock, flags);
120} 111}
121 112
113/*
114 * Forcibly shutdown the socket causing all listeners to error
115 */
122static void sock_shutdown(struct nbd_device *nbd, int lock) 116static void sock_shutdown(struct nbd_device *nbd, int lock)
123{ 117{
124 /* Forcibly shutdown the socket causing all listeners
125 * to error
126 *
127 * FIXME: This code is duplicated from sys_shutdown, but
128 * there should be a more generic interface rather than
129 * calling socket ops directly here */
130 if (lock) 118 if (lock)
131 mutex_lock(&nbd->tx_lock); 119 mutex_lock(&nbd->tx_lock);
132 if (nbd->sock) { 120 if (nbd->sock) {
@@ -253,17 +241,15 @@ static int nbd_send_req(struct nbd_device *nbd, struct request *req)
253 } 241 }
254 memcpy(request.handle, &req, sizeof(req)); 242 memcpy(request.handle, &req, sizeof(req));
255 243
256 dprintk(DBG_TX, "%s: request %p: sending control (%s@%llu,%uB)\n", 244 dev_dbg(nbd_to_dev(nbd), "request %p: sending control (%s@%llu,%uB)\n",
257 nbd->disk->disk_name, req, 245 req, nbdcmd_to_ascii(nbd_cmd(req)),
258 nbdcmd_to_ascii(nbd_cmd(req)), 246 (unsigned long long)blk_rq_pos(req) << 9, blk_rq_bytes(req));
259 (unsigned long long)blk_rq_pos(req) << 9,
260 blk_rq_bytes(req));
261 result = sock_xmit(nbd, 1, &request, sizeof(request), 247 result = sock_xmit(nbd, 1, &request, sizeof(request),
262 (nbd_cmd(req) == NBD_CMD_WRITE) ? MSG_MORE : 0); 248 (nbd_cmd(req) == NBD_CMD_WRITE) ? MSG_MORE : 0);
263 if (result <= 0) { 249 if (result <= 0) {
264 dev_err(disk_to_dev(nbd->disk), 250 dev_err(disk_to_dev(nbd->disk),
265 "Send control failed (result %d)\n", result); 251 "Send control failed (result %d)\n", result);
266 goto error_out; 252 return -EIO;
267 } 253 }
268 254
269 if (nbd_cmd(req) == NBD_CMD_WRITE) { 255 if (nbd_cmd(req) == NBD_CMD_WRITE) {
@@ -277,21 +263,18 @@ static int nbd_send_req(struct nbd_device *nbd, struct request *req)
277 flags = 0; 263 flags = 0;
278 if (!rq_iter_last(bvec, iter)) 264 if (!rq_iter_last(bvec, iter))
279 flags = MSG_MORE; 265 flags = MSG_MORE;
280 dprintk(DBG_TX, "%s: request %p: sending %d bytes data\n", 266 dev_dbg(nbd_to_dev(nbd), "request %p: sending %d bytes data\n",
281 nbd->disk->disk_name, req, bvec.bv_len); 267 req, bvec.bv_len);
282 result = sock_send_bvec(nbd, &bvec, flags); 268 result = sock_send_bvec(nbd, &bvec, flags);
283 if (result <= 0) { 269 if (result <= 0) {
284 dev_err(disk_to_dev(nbd->disk), 270 dev_err(disk_to_dev(nbd->disk),
285 "Send data failed (result %d)\n", 271 "Send data failed (result %d)\n",
286 result); 272 result);
287 goto error_out; 273 return -EIO;
288 } 274 }
289 } 275 }
290 } 276 }
291 return 0; 277 return 0;
292
293error_out:
294 return -EIO;
295} 278}
296 279
297static struct request *nbd_find_request(struct nbd_device *nbd, 280static struct request *nbd_find_request(struct nbd_device *nbd,
@@ -302,7 +285,7 @@ static struct request *nbd_find_request(struct nbd_device *nbd,
302 285
303 err = wait_event_interruptible(nbd->active_wq, nbd->active_req != xreq); 286 err = wait_event_interruptible(nbd->active_wq, nbd->active_req != xreq);
304 if (unlikely(err)) 287 if (unlikely(err))
305 goto out; 288 return ERR_PTR(err);
306 289
307 spin_lock(&nbd->queue_lock); 290 spin_lock(&nbd->queue_lock);
308 list_for_each_entry_safe(req, tmp, &nbd->queue_head, queuelist) { 291 list_for_each_entry_safe(req, tmp, &nbd->queue_head, queuelist) {
@@ -314,10 +297,7 @@ static struct request *nbd_find_request(struct nbd_device *nbd,
314 } 297 }
315 spin_unlock(&nbd->queue_lock); 298 spin_unlock(&nbd->queue_lock);
316 299
317 err = -ENOENT; 300 return ERR_PTR(-ENOENT);
318
319out:
320 return ERR_PTR(err);
321} 301}
322 302
323static inline int sock_recv_bvec(struct nbd_device *nbd, struct bio_vec *bvec) 303static inline int sock_recv_bvec(struct nbd_device *nbd, struct bio_vec *bvec)
@@ -371,8 +351,7 @@ static struct request *nbd_read_stat(struct nbd_device *nbd)
371 return req; 351 return req;
372 } 352 }
373 353
374 dprintk(DBG_RX, "%s: request %p: got reply\n", 354 dev_dbg(nbd_to_dev(nbd), "request %p: got reply\n", req);
375 nbd->disk->disk_name, req);
376 if (nbd_cmd(req) == NBD_CMD_READ) { 355 if (nbd_cmd(req) == NBD_CMD_READ) {
377 struct req_iterator iter; 356 struct req_iterator iter;
378 struct bio_vec bvec; 357 struct bio_vec bvec;
@@ -385,8 +364,8 @@ static struct request *nbd_read_stat(struct nbd_device *nbd)
385 req->errors++; 364 req->errors++;
386 return req; 365 return req;
387 } 366 }
388 dprintk(DBG_RX, "%s: request %p: got %d bytes data\n", 367 dev_dbg(nbd_to_dev(nbd), "request %p: got %d bytes data\n",
389 nbd->disk->disk_name, req, bvec.bv_len); 368 req, bvec.bv_len);
390 } 369 }
391 } 370 }
392 return req; 371 return req;
@@ -426,7 +405,7 @@ static int nbd_do_it(struct nbd_device *nbd)
426 } 405 }
427 406
428 while ((req = nbd_read_stat(nbd)) != NULL) 407 while ((req = nbd_read_stat(nbd)) != NULL)
429 nbd_end_request(req); 408 nbd_end_request(nbd, req);
430 409
431 device_remove_file(disk_to_dev(nbd->disk), &pid_attr); 410 device_remove_file(disk_to_dev(nbd->disk), &pid_attr);
432 nbd->pid = 0; 411 nbd->pid = 0;
@@ -455,7 +434,7 @@ static void nbd_clear_que(struct nbd_device *nbd)
455 queuelist); 434 queuelist);
456 list_del_init(&req->queuelist); 435 list_del_init(&req->queuelist);
457 req->errors++; 436 req->errors++;
458 nbd_end_request(req); 437 nbd_end_request(nbd, req);
459 } 438 }
460 439
461 while (!list_empty(&nbd->waiting_queue)) { 440 while (!list_empty(&nbd->waiting_queue)) {
@@ -463,7 +442,7 @@ static void nbd_clear_que(struct nbd_device *nbd)
463 queuelist); 442 queuelist);
464 list_del_init(&req->queuelist); 443 list_del_init(&req->queuelist);
465 req->errors++; 444 req->errors++;
466 nbd_end_request(req); 445 nbd_end_request(nbd, req);
467 } 446 }
468} 447}
469 448
@@ -507,7 +486,7 @@ static void nbd_handle_req(struct nbd_device *nbd, struct request *req)
507 if (nbd_send_req(nbd, req) != 0) { 486 if (nbd_send_req(nbd, req) != 0) {
508 dev_err(disk_to_dev(nbd->disk), "Request send failed\n"); 487 dev_err(disk_to_dev(nbd->disk), "Request send failed\n");
509 req->errors++; 488 req->errors++;
510 nbd_end_request(req); 489 nbd_end_request(nbd, req);
511 } else { 490 } else {
512 spin_lock(&nbd->queue_lock); 491 spin_lock(&nbd->queue_lock);
513 list_add_tail(&req->queuelist, &nbd->queue_head); 492 list_add_tail(&req->queuelist, &nbd->queue_head);
@@ -522,7 +501,7 @@ static void nbd_handle_req(struct nbd_device *nbd, struct request *req)
522 501
523error_out: 502error_out:
524 req->errors++; 503 req->errors++;
525 nbd_end_request(req); 504 nbd_end_request(nbd, req);
526} 505}
527 506
528static int nbd_thread(void *data) 507static int nbd_thread(void *data)
@@ -570,18 +549,18 @@ static void do_nbd_request(struct request_queue *q)
570 549
571 spin_unlock_irq(q->queue_lock); 550 spin_unlock_irq(q->queue_lock);
572 551
573 dprintk(DBG_BLKDEV, "%s: request %p: dequeued (flags=%x)\n",
574 req->rq_disk->disk_name, req, req->cmd_type);
575
576 nbd = req->rq_disk->private_data; 552 nbd = req->rq_disk->private_data;
577 553
578 BUG_ON(nbd->magic != NBD_MAGIC); 554 BUG_ON(nbd->magic != NBD_MAGIC);
579 555
556 dev_dbg(nbd_to_dev(nbd), "request %p: dequeued (flags=%x)\n",
557 req, req->cmd_type);
558
580 if (unlikely(!nbd->sock)) { 559 if (unlikely(!nbd->sock)) {
581 dev_err(disk_to_dev(nbd->disk), 560 dev_err(disk_to_dev(nbd->disk),
582 "Attempted send on closed socket\n"); 561 "Attempted send on closed socket\n");
583 req->errors++; 562 req->errors++;
584 nbd_end_request(req); 563 nbd_end_request(nbd, req);
585 spin_lock_irq(q->queue_lock); 564 spin_lock_irq(q->queue_lock);
586 continue; 565 continue;
587 } 566 }
@@ -706,13 +685,13 @@ static int __nbd_ioctl(struct block_device *bdev, struct nbd_device *nbd,
706 else 685 else
707 blk_queue_flush(nbd->disk->queue, 0); 686 blk_queue_flush(nbd->disk->queue, 0);
708 687
709 thread = kthread_create(nbd_thread, nbd, "%s", 688 thread = kthread_run(nbd_thread, nbd, "%s",
710 nbd->disk->disk_name); 689 nbd->disk->disk_name);
711 if (IS_ERR(thread)) { 690 if (IS_ERR(thread)) {
712 mutex_lock(&nbd->tx_lock); 691 mutex_lock(&nbd->tx_lock);
713 return PTR_ERR(thread); 692 return PTR_ERR(thread);
714 } 693 }
715 wake_up_process(thread); 694
716 error = nbd_do_it(nbd); 695 error = nbd_do_it(nbd);
717 kthread_stop(thread); 696 kthread_stop(thread);
718 697
@@ -768,10 +747,6 @@ static int nbd_ioctl(struct block_device *bdev, fmode_t mode,
768 747
769 BUG_ON(nbd->magic != NBD_MAGIC); 748 BUG_ON(nbd->magic != NBD_MAGIC);
770 749
771 /* Anyone capable of this syscall can do *real bad* things */
772 dprintk(DBG_IOCTL, "%s: nbd_ioctl cmd=%s(0x%x) arg=%lu\n",
773 nbd->disk->disk_name, ioctl_cmd_to_ascii(cmd), cmd, arg);
774
775 mutex_lock(&nbd->tx_lock); 750 mutex_lock(&nbd->tx_lock);
776 error = __nbd_ioctl(bdev, nbd, cmd, arg); 751 error = __nbd_ioctl(bdev, nbd, cmd, arg);
777 mutex_unlock(&nbd->tx_lock); 752 mutex_unlock(&nbd->tx_lock);
@@ -861,7 +836,6 @@ static int __init nbd_init(void)
861 } 836 }
862 837
863 printk(KERN_INFO "nbd: registered device at major %d\n", NBD_MAJOR); 838 printk(KERN_INFO "nbd: registered device at major %d\n", NBD_MAJOR);
864 dprintk(DBG_INIT, "nbd: debugflags=0x%x\n", debugflags);
865 839
866 for (i = 0; i < nbds_max; i++) { 840 for (i = 0; i < nbds_max; i++) {
867 struct gendisk *disk = nbd_dev[i].disk; 841 struct gendisk *disk = nbd_dev[i].disk;
@@ -920,7 +894,3 @@ module_param(nbds_max, int, 0444);
920MODULE_PARM_DESC(nbds_max, "number of network block devices to initialize (default: 16)"); 894MODULE_PARM_DESC(nbds_max, "number of network block devices to initialize (default: 16)");
921module_param(max_part, int, 0444); 895module_param(max_part, int, 0444);
922MODULE_PARM_DESC(max_part, "number of partitions per device (default: 0)"); 896MODULE_PARM_DESC(max_part, "number of partitions per device (default: 0)");
923#ifndef NDEBUG
924module_param(debugflags, int, 0644);
925MODULE_PARM_DESC(debugflags, "flags for controlling debug output");
926#endif
diff --git a/drivers/block/nvme-core.c b/drivers/block/nvme-core.c
index e23be20a3417..85b8036deaa3 100644
--- a/drivers/block/nvme-core.c
+++ b/drivers/block/nvme-core.c
@@ -44,7 +44,7 @@
44 44
45#define NVME_MINORS (1U << MINORBITS) 45#define NVME_MINORS (1U << MINORBITS)
46#define NVME_Q_DEPTH 1024 46#define NVME_Q_DEPTH 1024
47#define NVME_AQ_DEPTH 64 47#define NVME_AQ_DEPTH 256
48#define SQ_SIZE(depth) (depth * sizeof(struct nvme_command)) 48#define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
49#define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion)) 49#define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
50#define ADMIN_TIMEOUT (admin_timeout * HZ) 50#define ADMIN_TIMEOUT (admin_timeout * HZ)
@@ -152,6 +152,7 @@ struct nvme_cmd_info {
152 */ 152 */
153#define NVME_INT_PAGES 2 153#define NVME_INT_PAGES 2
154#define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size) 154#define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
155#define NVME_INT_MASK 0x01
155 156
156/* 157/*
157 * Will slightly overestimate the number of pages needed. This is OK 158 * Will slightly overestimate the number of pages needed. This is OK
@@ -257,7 +258,7 @@ static void *iod_get_private(struct nvme_iod *iod)
257 */ 258 */
258static bool iod_should_kfree(struct nvme_iod *iod) 259static bool iod_should_kfree(struct nvme_iod *iod)
259{ 260{
260 return (iod->private & 0x01) == 0; 261 return (iod->private & NVME_INT_MASK) == 0;
261} 262}
262 263
263/* Special values must be less than 0x1000 */ 264/* Special values must be less than 0x1000 */
@@ -301,8 +302,6 @@ static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
301static void async_req_completion(struct nvme_queue *nvmeq, void *ctx, 302static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
302 struct nvme_completion *cqe) 303 struct nvme_completion *cqe)
303{ 304{
304 struct request *req = ctx;
305
306 u32 result = le32_to_cpup(&cqe->result); 305 u32 result = le32_to_cpup(&cqe->result);
307 u16 status = le16_to_cpup(&cqe->status) >> 1; 306 u16 status = le16_to_cpup(&cqe->status) >> 1;
308 307
@@ -311,8 +310,6 @@ static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
311 if (status == NVME_SC_SUCCESS) 310 if (status == NVME_SC_SUCCESS)
312 dev_warn(nvmeq->q_dmadev, 311 dev_warn(nvmeq->q_dmadev,
313 "async event result %08x\n", result); 312 "async event result %08x\n", result);
314
315 blk_mq_free_hctx_request(nvmeq->hctx, req);
316} 313}
317 314
318static void abort_completion(struct nvme_queue *nvmeq, void *ctx, 315static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
@@ -432,7 +429,6 @@ static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
432{ 429{
433 unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) : 430 unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
434 sizeof(struct nvme_dsm_range); 431 sizeof(struct nvme_dsm_range);
435 unsigned long mask = 0;
436 struct nvme_iod *iod; 432 struct nvme_iod *iod;
437 433
438 if (rq->nr_phys_segments <= NVME_INT_PAGES && 434 if (rq->nr_phys_segments <= NVME_INT_PAGES &&
@@ -440,9 +436,8 @@ static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
440 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq); 436 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
441 437
442 iod = cmd->iod; 438 iod = cmd->iod;
443 mask = 0x01;
444 iod_init(iod, size, rq->nr_phys_segments, 439 iod_init(iod, size, rq->nr_phys_segments,
445 (unsigned long) rq | 0x01); 440 (unsigned long) rq | NVME_INT_MASK);
446 return iod; 441 return iod;
447 } 442 }
448 443
@@ -522,8 +517,6 @@ static void nvme_dif_remap(struct request *req,
522 return; 517 return;
523 518
524 pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset; 519 pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
525 if (!pmap)
526 return;
527 520
528 p = pmap; 521 p = pmap;
529 virt = bip_get_seed(bip); 522 virt = bip_get_seed(bip);
@@ -645,12 +638,12 @@ int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod, int total_len,
645 struct scatterlist *sg = iod->sg; 638 struct scatterlist *sg = iod->sg;
646 int dma_len = sg_dma_len(sg); 639 int dma_len = sg_dma_len(sg);
647 u64 dma_addr = sg_dma_address(sg); 640 u64 dma_addr = sg_dma_address(sg);
648 int offset = offset_in_page(dma_addr); 641 u32 page_size = dev->page_size;
642 int offset = dma_addr & (page_size - 1);
649 __le64 *prp_list; 643 __le64 *prp_list;
650 __le64 **list = iod_list(iod); 644 __le64 **list = iod_list(iod);
651 dma_addr_t prp_dma; 645 dma_addr_t prp_dma;
652 int nprps, i; 646 int nprps, i;
653 u32 page_size = dev->page_size;
654 647
655 length -= (page_size - offset); 648 length -= (page_size - offset);
656 if (length <= 0) 649 if (length <= 0)
@@ -1028,18 +1021,19 @@ static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1028 struct nvme_cmd_info *cmd_info; 1021 struct nvme_cmd_info *cmd_info;
1029 struct request *req; 1022 struct request *req;
1030 1023
1031 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, false); 1024 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1032 if (IS_ERR(req)) 1025 if (IS_ERR(req))
1033 return PTR_ERR(req); 1026 return PTR_ERR(req);
1034 1027
1035 req->cmd_flags |= REQ_NO_TIMEOUT; 1028 req->cmd_flags |= REQ_NO_TIMEOUT;
1036 cmd_info = blk_mq_rq_to_pdu(req); 1029 cmd_info = blk_mq_rq_to_pdu(req);
1037 nvme_set_info(cmd_info, req, async_req_completion); 1030 nvme_set_info(cmd_info, NULL, async_req_completion);
1038 1031
1039 memset(&c, 0, sizeof(c)); 1032 memset(&c, 0, sizeof(c));
1040 c.common.opcode = nvme_admin_async_event; 1033 c.common.opcode = nvme_admin_async_event;
1041 c.common.command_id = req->tag; 1034 c.common.command_id = req->tag;
1042 1035
1036 blk_mq_free_hctx_request(nvmeq->hctx, req);
1043 return __nvme_submit_cmd(nvmeq, &c); 1037 return __nvme_submit_cmd(nvmeq, &c);
1044} 1038}
1045 1039
@@ -1347,6 +1341,9 @@ static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1347 nvmeq->cq_vector = -1; 1341 nvmeq->cq_vector = -1;
1348 spin_unlock_irq(&nvmeq->q_lock); 1342 spin_unlock_irq(&nvmeq->q_lock);
1349 1343
1344 if (!nvmeq->qid && nvmeq->dev->admin_q)
1345 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1346
1350 irq_set_affinity_hint(vector, NULL); 1347 irq_set_affinity_hint(vector, NULL);
1351 free_irq(vector, nvmeq); 1348 free_irq(vector, nvmeq);
1352 1349
@@ -1378,8 +1375,6 @@ static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1378 adapter_delete_sq(dev, qid); 1375 adapter_delete_sq(dev, qid);
1379 adapter_delete_cq(dev, qid); 1376 adapter_delete_cq(dev, qid);
1380 } 1377 }
1381 if (!qid && dev->admin_q)
1382 blk_mq_freeze_queue_start(dev->admin_q);
1383 1378
1384 spin_lock_irq(&nvmeq->q_lock); 1379 spin_lock_irq(&nvmeq->q_lock);
1385 nvme_process_cq(nvmeq); 1380 nvme_process_cq(nvmeq);
@@ -1583,6 +1578,7 @@ static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1583 dev->admin_tagset.ops = &nvme_mq_admin_ops; 1578 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1584 dev->admin_tagset.nr_hw_queues = 1; 1579 dev->admin_tagset.nr_hw_queues = 1;
1585 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1; 1580 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1581 dev->admin_tagset.reserved_tags = 1;
1586 dev->admin_tagset.timeout = ADMIN_TIMEOUT; 1582 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1587 dev->admin_tagset.numa_node = dev_to_node(&dev->pci_dev->dev); 1583 dev->admin_tagset.numa_node = dev_to_node(&dev->pci_dev->dev);
1588 dev->admin_tagset.cmd_size = nvme_cmd_size(dev); 1584 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
@@ -1749,25 +1745,31 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1749 struct nvme_dev *dev = ns->dev; 1745 struct nvme_dev *dev = ns->dev;
1750 struct nvme_user_io io; 1746 struct nvme_user_io io;
1751 struct nvme_command c; 1747 struct nvme_command c;
1752 unsigned length, meta_len; 1748 unsigned length, meta_len, prp_len;
1753 int status, i; 1749 int status, write;
1754 struct nvme_iod *iod, *meta_iod = NULL; 1750 struct nvme_iod *iod;
1755 dma_addr_t meta_dma_addr; 1751 dma_addr_t meta_dma = 0;
1756 void *meta, *uninitialized_var(meta_mem); 1752 void *meta = NULL;
1757 1753
1758 if (copy_from_user(&io, uio, sizeof(io))) 1754 if (copy_from_user(&io, uio, sizeof(io)))
1759 return -EFAULT; 1755 return -EFAULT;
1760 length = (io.nblocks + 1) << ns->lba_shift; 1756 length = (io.nblocks + 1) << ns->lba_shift;
1761 meta_len = (io.nblocks + 1) * ns->ms; 1757 meta_len = (io.nblocks + 1) * ns->ms;
1762 1758
1763 if (meta_len && ((io.metadata & 3) || !io.metadata)) 1759 if (meta_len && ((io.metadata & 3) || !io.metadata) && !ns->ext)
1764 return -EINVAL; 1760 return -EINVAL;
1761 else if (meta_len && ns->ext) {
1762 length += meta_len;
1763 meta_len = 0;
1764 }
1765
1766 write = io.opcode & 1;
1765 1767
1766 switch (io.opcode) { 1768 switch (io.opcode) {
1767 case nvme_cmd_write: 1769 case nvme_cmd_write:
1768 case nvme_cmd_read: 1770 case nvme_cmd_read:
1769 case nvme_cmd_compare: 1771 case nvme_cmd_compare:
1770 iod = nvme_map_user_pages(dev, io.opcode & 1, io.addr, length); 1772 iod = nvme_map_user_pages(dev, write, io.addr, length);
1771 break; 1773 break;
1772 default: 1774 default:
1773 return -EINVAL; 1775 return -EINVAL;
@@ -1776,6 +1778,27 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1776 if (IS_ERR(iod)) 1778 if (IS_ERR(iod))
1777 return PTR_ERR(iod); 1779 return PTR_ERR(iod);
1778 1780
1781 prp_len = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1782 if (length != prp_len) {
1783 status = -ENOMEM;
1784 goto unmap;
1785 }
1786 if (meta_len) {
1787 meta = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
1788 &meta_dma, GFP_KERNEL);
1789 if (!meta) {
1790 status = -ENOMEM;
1791 goto unmap;
1792 }
1793 if (write) {
1794 if (copy_from_user(meta, (void __user *)io.metadata,
1795 meta_len)) {
1796 status = -EFAULT;
1797 goto unmap;
1798 }
1799 }
1800 }
1801
1779 memset(&c, 0, sizeof(c)); 1802 memset(&c, 0, sizeof(c));
1780 c.rw.opcode = io.opcode; 1803 c.rw.opcode = io.opcode;
1781 c.rw.flags = io.flags; 1804 c.rw.flags = io.flags;
@@ -1787,75 +1810,21 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1787 c.rw.reftag = cpu_to_le32(io.reftag); 1810 c.rw.reftag = cpu_to_le32(io.reftag);
1788 c.rw.apptag = cpu_to_le16(io.apptag); 1811 c.rw.apptag = cpu_to_le16(io.apptag);
1789 c.rw.appmask = cpu_to_le16(io.appmask); 1812 c.rw.appmask = cpu_to_le16(io.appmask);
1790
1791 if (meta_len) {
1792 meta_iod = nvme_map_user_pages(dev, io.opcode & 1, io.metadata,
1793 meta_len);
1794 if (IS_ERR(meta_iod)) {
1795 status = PTR_ERR(meta_iod);
1796 meta_iod = NULL;
1797 goto unmap;
1798 }
1799
1800 meta_mem = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
1801 &meta_dma_addr, GFP_KERNEL);
1802 if (!meta_mem) {
1803 status = -ENOMEM;
1804 goto unmap;
1805 }
1806
1807 if (io.opcode & 1) {
1808 int meta_offset = 0;
1809
1810 for (i = 0; i < meta_iod->nents; i++) {
1811 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1812 meta_iod->sg[i].offset;
1813 memcpy(meta_mem + meta_offset, meta,
1814 meta_iod->sg[i].length);
1815 kunmap_atomic(meta);
1816 meta_offset += meta_iod->sg[i].length;
1817 }
1818 }
1819
1820 c.rw.metadata = cpu_to_le64(meta_dma_addr);
1821 }
1822
1823 length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1824 c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg)); 1813 c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1825 c.rw.prp2 = cpu_to_le64(iod->first_dma); 1814 c.rw.prp2 = cpu_to_le64(iod->first_dma);
1826 1815 c.rw.metadata = cpu_to_le64(meta_dma);
1827 if (length != (io.nblocks + 1) << ns->lba_shift) 1816 status = nvme_submit_io_cmd(dev, ns, &c, NULL);
1828 status = -ENOMEM;
1829 else
1830 status = nvme_submit_io_cmd(dev, ns, &c, NULL);
1831
1832 if (meta_len) {
1833 if (status == NVME_SC_SUCCESS && !(io.opcode & 1)) {
1834 int meta_offset = 0;
1835
1836 for (i = 0; i < meta_iod->nents; i++) {
1837 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1838 meta_iod->sg[i].offset;
1839 memcpy(meta, meta_mem + meta_offset,
1840 meta_iod->sg[i].length);
1841 kunmap_atomic(meta);
1842 meta_offset += meta_iod->sg[i].length;
1843 }
1844 }
1845
1846 dma_free_coherent(&dev->pci_dev->dev, meta_len, meta_mem,
1847 meta_dma_addr);
1848 }
1849
1850 unmap: 1817 unmap:
1851 nvme_unmap_user_pages(dev, io.opcode & 1, iod); 1818 nvme_unmap_user_pages(dev, write, iod);
1852 nvme_free_iod(dev, iod); 1819 nvme_free_iod(dev, iod);
1853 1820 if (meta) {
1854 if (meta_iod) { 1821 if (status == NVME_SC_SUCCESS && !write) {
1855 nvme_unmap_user_pages(dev, io.opcode & 1, meta_iod); 1822 if (copy_to_user((void __user *)io.metadata, meta,
1856 nvme_free_iod(dev, meta_iod); 1823 meta_len))
1824 status = -EFAULT;
1825 }
1826 dma_free_coherent(&dev->pci_dev->dev, meta_len, meta, meta_dma);
1857 } 1827 }
1858
1859 return status; 1828 return status;
1860} 1829}
1861 1830
@@ -2018,7 +1987,8 @@ static int nvme_revalidate_disk(struct gendisk *disk)
2018 struct nvme_dev *dev = ns->dev; 1987 struct nvme_dev *dev = ns->dev;
2019 struct nvme_id_ns *id; 1988 struct nvme_id_ns *id;
2020 dma_addr_t dma_addr; 1989 dma_addr_t dma_addr;
2021 int lbaf, pi_type, old_ms; 1990 u8 lbaf, pi_type;
1991 u16 old_ms;
2022 unsigned short bs; 1992 unsigned short bs;
2023 1993
2024 id = dma_alloc_coherent(&dev->pci_dev->dev, 4096, &dma_addr, 1994 id = dma_alloc_coherent(&dev->pci_dev->dev, 4096, &dma_addr,
@@ -2039,6 +2009,7 @@ static int nvme_revalidate_disk(struct gendisk *disk)
2039 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK; 2009 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2040 ns->lba_shift = id->lbaf[lbaf].ds; 2010 ns->lba_shift = id->lbaf[lbaf].ds;
2041 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms); 2011 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2012 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2042 2013
2043 /* 2014 /*
2044 * If identify namespace failed, use default 512 byte block size so 2015 * If identify namespace failed, use default 512 byte block size so
@@ -2055,14 +2026,14 @@ static int nvme_revalidate_disk(struct gendisk *disk)
2055 if (blk_get_integrity(disk) && (ns->pi_type != pi_type || 2026 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2056 ns->ms != old_ms || 2027 ns->ms != old_ms ||
2057 bs != queue_logical_block_size(disk->queue) || 2028 bs != queue_logical_block_size(disk->queue) ||
2058 (ns->ms && id->flbas & NVME_NS_FLBAS_META_EXT))) 2029 (ns->ms && ns->ext)))
2059 blk_integrity_unregister(disk); 2030 blk_integrity_unregister(disk);
2060 2031
2061 ns->pi_type = pi_type; 2032 ns->pi_type = pi_type;
2062 blk_queue_logical_block_size(ns->queue, bs); 2033 blk_queue_logical_block_size(ns->queue, bs);
2063 2034
2064 if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) && 2035 if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2065 !(id->flbas & NVME_NS_FLBAS_META_EXT)) 2036 !ns->ext)
2066 nvme_init_integrity(ns); 2037 nvme_init_integrity(ns);
2067 2038
2068 if (id->ncap == 0 || (ns->ms && !blk_get_integrity(disk))) 2039 if (id->ncap == 0 || (ns->ms && !blk_get_integrity(disk)))
@@ -2334,7 +2305,6 @@ static int nvme_dev_add(struct nvme_dev *dev)
2334 dev->oncs = le16_to_cpup(&ctrl->oncs); 2305 dev->oncs = le16_to_cpup(&ctrl->oncs);
2335 dev->abort_limit = ctrl->acl + 1; 2306 dev->abort_limit = ctrl->acl + 1;
2336 dev->vwc = ctrl->vwc; 2307 dev->vwc = ctrl->vwc;
2337 dev->event_limit = min(ctrl->aerl + 1, 8);
2338 memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn)); 2308 memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2339 memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn)); 2309 memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2340 memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr)); 2310 memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
@@ -2881,6 +2851,7 @@ static int nvme_dev_start(struct nvme_dev *dev)
2881 2851
2882 nvme_set_irq_hints(dev); 2852 nvme_set_irq_hints(dev);
2883 2853
2854 dev->event_limit = 1;
2884 return result; 2855 return result;
2885 2856
2886 free_tags: 2857 free_tags:
@@ -3166,8 +3137,10 @@ static int __init nvme_init(void)
3166 nvme_char_major = result; 3137 nvme_char_major = result;
3167 3138
3168 nvme_class = class_create(THIS_MODULE, "nvme"); 3139 nvme_class = class_create(THIS_MODULE, "nvme");
3169 if (!nvme_class) 3140 if (IS_ERR(nvme_class)) {
3141 result = PTR_ERR(nvme_class);
3170 goto unregister_chrdev; 3142 goto unregister_chrdev;
3143 }
3171 3144
3172 result = pci_register_driver(&nvme_driver); 3145 result = pci_register_driver(&nvme_driver);
3173 if (result) 3146 if (result)
diff --git a/drivers/block/nvme-scsi.c b/drivers/block/nvme-scsi.c
index e10196e0182d..6b736b00f63e 100644
--- a/drivers/block/nvme-scsi.c
+++ b/drivers/block/nvme-scsi.c
@@ -55,6 +55,7 @@ static int sg_version_num = 30534; /* 2 digits for each component */
55#define VPD_SERIAL_NUMBER 0x80 55#define VPD_SERIAL_NUMBER 0x80
56#define VPD_DEVICE_IDENTIFIERS 0x83 56#define VPD_DEVICE_IDENTIFIERS 0x83
57#define VPD_EXTENDED_INQUIRY 0x86 57#define VPD_EXTENDED_INQUIRY 0x86
58#define VPD_BLOCK_LIMITS 0xB0
58#define VPD_BLOCK_DEV_CHARACTERISTICS 0xB1 59#define VPD_BLOCK_DEV_CHARACTERISTICS 0xB1
59 60
60/* CDB offsets */ 61/* CDB offsets */
@@ -132,9 +133,10 @@ static int sg_version_num = 30534; /* 2 digits for each component */
132#define INQ_UNIT_SERIAL_NUMBER_PAGE 0x80 133#define INQ_UNIT_SERIAL_NUMBER_PAGE 0x80
133#define INQ_DEVICE_IDENTIFICATION_PAGE 0x83 134#define INQ_DEVICE_IDENTIFICATION_PAGE 0x83
134#define INQ_EXTENDED_INQUIRY_DATA_PAGE 0x86 135#define INQ_EXTENDED_INQUIRY_DATA_PAGE 0x86
136#define INQ_BDEV_LIMITS_PAGE 0xB0
135#define INQ_BDEV_CHARACTERISTICS_PAGE 0xB1 137#define INQ_BDEV_CHARACTERISTICS_PAGE 0xB1
136#define INQ_SERIAL_NUMBER_LENGTH 0x14 138#define INQ_SERIAL_NUMBER_LENGTH 0x14
137#define INQ_NUM_SUPPORTED_VPD_PAGES 5 139#define INQ_NUM_SUPPORTED_VPD_PAGES 6
138#define VERSION_SPC_4 0x06 140#define VERSION_SPC_4 0x06
139#define ACA_UNSUPPORTED 0 141#define ACA_UNSUPPORTED 0
140#define STANDARD_INQUIRY_LENGTH 36 142#define STANDARD_INQUIRY_LENGTH 36
@@ -747,6 +749,7 @@ static int nvme_trans_supported_vpd_pages(struct nvme_ns *ns,
747 inq_response[6] = INQ_DEVICE_IDENTIFICATION_PAGE; 749 inq_response[6] = INQ_DEVICE_IDENTIFICATION_PAGE;
748 inq_response[7] = INQ_EXTENDED_INQUIRY_DATA_PAGE; 750 inq_response[7] = INQ_EXTENDED_INQUIRY_DATA_PAGE;
749 inq_response[8] = INQ_BDEV_CHARACTERISTICS_PAGE; 751 inq_response[8] = INQ_BDEV_CHARACTERISTICS_PAGE;
752 inq_response[9] = INQ_BDEV_LIMITS_PAGE;
750 753
751 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH); 754 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
752 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len); 755 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
@@ -938,6 +941,25 @@ static int nvme_trans_ext_inq_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
938 return res; 941 return res;
939} 942}
940 943
944static int nvme_trans_bdev_limits_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
945 u8 *inq_response, int alloc_len)
946{
947 __be32 max_sectors = cpu_to_be32(queue_max_hw_sectors(ns->queue));
948 __be32 max_discard = cpu_to_be32(ns->queue->limits.max_discard_sectors);
949 __be32 discard_desc_count = cpu_to_be32(0x100);
950
951 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
952 inq_response[1] = VPD_BLOCK_LIMITS;
953 inq_response[3] = 0x3c; /* Page Length */
954 memcpy(&inq_response[8], &max_sectors, sizeof(u32));
955 memcpy(&inq_response[20], &max_discard, sizeof(u32));
956
957 if (max_discard)
958 memcpy(&inq_response[24], &discard_desc_count, sizeof(u32));
959
960 return nvme_trans_copy_to_user(hdr, inq_response, 0x3c);
961}
962
941static int nvme_trans_bdev_char_page(struct nvme_ns *ns, struct sg_io_hdr *hdr, 963static int nvme_trans_bdev_char_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
942 int alloc_len) 964 int alloc_len)
943{ 965{
@@ -2268,6 +2290,10 @@ static int nvme_trans_inquiry(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2268 case VPD_EXTENDED_INQUIRY: 2290 case VPD_EXTENDED_INQUIRY:
2269 res = nvme_trans_ext_inq_page(ns, hdr, alloc_len); 2291 res = nvme_trans_ext_inq_page(ns, hdr, alloc_len);
2270 break; 2292 break;
2293 case VPD_BLOCK_LIMITS:
2294 res = nvme_trans_bdev_limits_page(ns, hdr, inq_response,
2295 alloc_len);
2296 break;
2271 case VPD_BLOCK_DEV_CHARACTERISTICS: 2297 case VPD_BLOCK_DEV_CHARACTERISTICS:
2272 res = nvme_trans_bdev_char_page(ns, hdr, alloc_len); 2298 res = nvme_trans_bdev_char_page(ns, hdr, alloc_len);
2273 break; 2299 break;
diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c
index 655e570b9b31..5ea2f0bbbc7c 100644
--- a/drivers/block/virtio_blk.c
+++ b/drivers/block/virtio_blk.c
@@ -342,7 +342,7 @@ static void virtblk_config_changed_work(struct work_struct *work)
342 struct request_queue *q = vblk->disk->queue; 342 struct request_queue *q = vblk->disk->queue;
343 char cap_str_2[10], cap_str_10[10]; 343 char cap_str_2[10], cap_str_10[10];
344 char *envp[] = { "RESIZE=1", NULL }; 344 char *envp[] = { "RESIZE=1", NULL };
345 u64 capacity, size; 345 u64 capacity;
346 346
347 /* Host must always specify the capacity. */ 347 /* Host must always specify the capacity. */
348 virtio_cread(vdev, struct virtio_blk_config, capacity, &capacity); 348 virtio_cread(vdev, struct virtio_blk_config, capacity, &capacity);
@@ -354,9 +354,10 @@ static void virtblk_config_changed_work(struct work_struct *work)
354 capacity = (sector_t)-1; 354 capacity = (sector_t)-1;
355 } 355 }
356 356
357 size = capacity * queue_logical_block_size(q); 357 string_get_size(capacity, queue_logical_block_size(q),
358 string_get_size(size, STRING_UNITS_2, cap_str_2, sizeof(cap_str_2)); 358 STRING_UNITS_2, cap_str_2, sizeof(cap_str_2));
359 string_get_size(size, STRING_UNITS_10, cap_str_10, sizeof(cap_str_10)); 359 string_get_size(capacity, queue_logical_block_size(q),
360 STRING_UNITS_10, cap_str_10, sizeof(cap_str_10));
360 361
361 dev_notice(&vdev->dev, 362 dev_notice(&vdev->dev,
362 "new size: %llu %d-byte logical blocks (%s/%s)\n", 363 "new size: %llu %d-byte logical blocks (%s/%s)\n",
diff --git a/drivers/block/xen-blkback/blkback.c b/drivers/block/xen-blkback/blkback.c
index 2a04d341e598..bd2b3bbbb22c 100644
--- a/drivers/block/xen-blkback/blkback.c
+++ b/drivers/block/xen-blkback/blkback.c
@@ -34,6 +34,8 @@
34 * IN THE SOFTWARE. 34 * IN THE SOFTWARE.
35 */ 35 */
36 36
37#define pr_fmt(fmt) "xen-blkback: " fmt
38
37#include <linux/spinlock.h> 39#include <linux/spinlock.h>
38#include <linux/kthread.h> 40#include <linux/kthread.h>
39#include <linux/list.h> 41#include <linux/list.h>
@@ -211,7 +213,7 @@ static int add_persistent_gnt(struct xen_blkif *blkif,
211 else if (persistent_gnt->gnt > this->gnt) 213 else if (persistent_gnt->gnt > this->gnt)
212 new = &((*new)->rb_right); 214 new = &((*new)->rb_right);
213 else { 215 else {
214 pr_alert_ratelimited(DRV_PFX " trying to add a gref that's already in the tree\n"); 216 pr_alert_ratelimited("trying to add a gref that's already in the tree\n");
215 return -EINVAL; 217 return -EINVAL;
216 } 218 }
217 } 219 }
@@ -242,7 +244,7 @@ static struct persistent_gnt *get_persistent_gnt(struct xen_blkif *blkif,
242 node = node->rb_right; 244 node = node->rb_right;
243 else { 245 else {
244 if(test_bit(PERSISTENT_GNT_ACTIVE, data->flags)) { 246 if(test_bit(PERSISTENT_GNT_ACTIVE, data->flags)) {
245 pr_alert_ratelimited(DRV_PFX " requesting a grant already in use\n"); 247 pr_alert_ratelimited("requesting a grant already in use\n");
246 return NULL; 248 return NULL;
247 } 249 }
248 set_bit(PERSISTENT_GNT_ACTIVE, data->flags); 250 set_bit(PERSISTENT_GNT_ACTIVE, data->flags);
@@ -257,7 +259,7 @@ static void put_persistent_gnt(struct xen_blkif *blkif,
257 struct persistent_gnt *persistent_gnt) 259 struct persistent_gnt *persistent_gnt)
258{ 260{
259 if(!test_bit(PERSISTENT_GNT_ACTIVE, persistent_gnt->flags)) 261 if(!test_bit(PERSISTENT_GNT_ACTIVE, persistent_gnt->flags))
260 pr_alert_ratelimited(DRV_PFX " freeing a grant already unused"); 262 pr_alert_ratelimited("freeing a grant already unused\n");
261 set_bit(PERSISTENT_GNT_WAS_ACTIVE, persistent_gnt->flags); 263 set_bit(PERSISTENT_GNT_WAS_ACTIVE, persistent_gnt->flags);
262 clear_bit(PERSISTENT_GNT_ACTIVE, persistent_gnt->flags); 264 clear_bit(PERSISTENT_GNT_ACTIVE, persistent_gnt->flags);
263 atomic_dec(&blkif->persistent_gnt_in_use); 265 atomic_dec(&blkif->persistent_gnt_in_use);
@@ -374,7 +376,7 @@ static void purge_persistent_gnt(struct xen_blkif *blkif)
374 } 376 }
375 377
376 if (work_pending(&blkif->persistent_purge_work)) { 378 if (work_pending(&blkif->persistent_purge_work)) {
377 pr_alert_ratelimited(DRV_PFX "Scheduled work from previous purge is still pending, cannot purge list\n"); 379 pr_alert_ratelimited("Scheduled work from previous purge is still pending, cannot purge list\n");
378 return; 380 return;
379 } 381 }
380 382
@@ -396,7 +398,7 @@ static void purge_persistent_gnt(struct xen_blkif *blkif)
396 398
397 total = num_clean; 399 total = num_clean;
398 400
399 pr_debug(DRV_PFX "Going to purge %u persistent grants\n", num_clean); 401 pr_debug("Going to purge %u persistent grants\n", num_clean);
400 402
401 BUG_ON(!list_empty(&blkif->persistent_purge_list)); 403 BUG_ON(!list_empty(&blkif->persistent_purge_list));
402 root = &blkif->persistent_gnts; 404 root = &blkif->persistent_gnts;
@@ -428,13 +430,13 @@ purge_list:
428 * with the requested num 430 * with the requested num
429 */ 431 */
430 if (!scan_used && !clean_used) { 432 if (!scan_used && !clean_used) {
431 pr_debug(DRV_PFX "Still missing %u purged frames\n", num_clean); 433 pr_debug("Still missing %u purged frames\n", num_clean);
432 scan_used = true; 434 scan_used = true;
433 goto purge_list; 435 goto purge_list;
434 } 436 }
435finished: 437finished:
436 if (!clean_used) { 438 if (!clean_used) {
437 pr_debug(DRV_PFX "Finished scanning for grants to clean, removing used flag\n"); 439 pr_debug("Finished scanning for grants to clean, removing used flag\n");
438 clean_used = true; 440 clean_used = true;
439 goto purge_list; 441 goto purge_list;
440 } 442 }
@@ -444,7 +446,7 @@ finished:
444 446
445 /* We can defer this work */ 447 /* We can defer this work */
446 schedule_work(&blkif->persistent_purge_work); 448 schedule_work(&blkif->persistent_purge_work);
447 pr_debug(DRV_PFX "Purged %u/%u\n", (total - num_clean), total); 449 pr_debug("Purged %u/%u\n", (total - num_clean), total);
448 return; 450 return;
449} 451}
450 452
@@ -520,20 +522,20 @@ static void xen_vbd_resize(struct xen_blkif *blkif)
520 struct xenbus_device *dev = xen_blkbk_xenbus(blkif->be); 522 struct xenbus_device *dev = xen_blkbk_xenbus(blkif->be);
521 unsigned long long new_size = vbd_sz(vbd); 523 unsigned long long new_size = vbd_sz(vbd);
522 524
523 pr_info(DRV_PFX "VBD Resize: Domid: %d, Device: (%d, %d)\n", 525 pr_info("VBD Resize: Domid: %d, Device: (%d, %d)\n",
524 blkif->domid, MAJOR(vbd->pdevice), MINOR(vbd->pdevice)); 526 blkif->domid, MAJOR(vbd->pdevice), MINOR(vbd->pdevice));
525 pr_info(DRV_PFX "VBD Resize: new size %llu\n", new_size); 527 pr_info("VBD Resize: new size %llu\n", new_size);
526 vbd->size = new_size; 528 vbd->size = new_size;
527again: 529again:
528 err = xenbus_transaction_start(&xbt); 530 err = xenbus_transaction_start(&xbt);
529 if (err) { 531 if (err) {
530 pr_warn(DRV_PFX "Error starting transaction"); 532 pr_warn("Error starting transaction\n");
531 return; 533 return;
532 } 534 }
533 err = xenbus_printf(xbt, dev->nodename, "sectors", "%llu", 535 err = xenbus_printf(xbt, dev->nodename, "sectors", "%llu",
534 (unsigned long long)vbd_sz(vbd)); 536 (unsigned long long)vbd_sz(vbd));
535 if (err) { 537 if (err) {
536 pr_warn(DRV_PFX "Error writing new size"); 538 pr_warn("Error writing new size\n");
537 goto abort; 539 goto abort;
538 } 540 }
539 /* 541 /*
@@ -543,7 +545,7 @@ again:
543 */ 545 */
544 err = xenbus_printf(xbt, dev->nodename, "state", "%d", dev->state); 546 err = xenbus_printf(xbt, dev->nodename, "state", "%d", dev->state);
545 if (err) { 547 if (err) {
546 pr_warn(DRV_PFX "Error writing the state"); 548 pr_warn("Error writing the state\n");
547 goto abort; 549 goto abort;
548 } 550 }
549 551
@@ -551,7 +553,7 @@ again:
551 if (err == -EAGAIN) 553 if (err == -EAGAIN)
552 goto again; 554 goto again;
553 if (err) 555 if (err)
554 pr_warn(DRV_PFX "Error ending transaction"); 556 pr_warn("Error ending transaction\n");
555 return; 557 return;
556abort: 558abort:
557 xenbus_transaction_end(xbt, 1); 559 xenbus_transaction_end(xbt, 1);
@@ -578,7 +580,7 @@ irqreturn_t xen_blkif_be_int(int irq, void *dev_id)
578 580
579static void print_stats(struct xen_blkif *blkif) 581static void print_stats(struct xen_blkif *blkif)
580{ 582{
581 pr_info("xen-blkback (%s): oo %3llu | rd %4llu | wr %4llu | f %4llu" 583 pr_info("(%s): oo %3llu | rd %4llu | wr %4llu | f %4llu"
582 " | ds %4llu | pg: %4u/%4d\n", 584 " | ds %4llu | pg: %4u/%4d\n",
583 current->comm, blkif->st_oo_req, 585 current->comm, blkif->st_oo_req,
584 blkif->st_rd_req, blkif->st_wr_req, 586 blkif->st_rd_req, blkif->st_wr_req,
@@ -855,7 +857,7 @@ again:
855 /* This is a newly mapped grant */ 857 /* This is a newly mapped grant */
856 BUG_ON(new_map_idx >= segs_to_map); 858 BUG_ON(new_map_idx >= segs_to_map);
857 if (unlikely(map[new_map_idx].status != 0)) { 859 if (unlikely(map[new_map_idx].status != 0)) {
858 pr_debug(DRV_PFX "invalid buffer -- could not remap it\n"); 860 pr_debug("invalid buffer -- could not remap it\n");
859 put_free_pages(blkif, &pages[seg_idx]->page, 1); 861 put_free_pages(blkif, &pages[seg_idx]->page, 1);
860 pages[seg_idx]->handle = BLKBACK_INVALID_HANDLE; 862 pages[seg_idx]->handle = BLKBACK_INVALID_HANDLE;
861 ret |= 1; 863 ret |= 1;
@@ -891,14 +893,14 @@ again:
891 goto next; 893 goto next;
892 } 894 }
893 pages[seg_idx]->persistent_gnt = persistent_gnt; 895 pages[seg_idx]->persistent_gnt = persistent_gnt;
894 pr_debug(DRV_PFX " grant %u added to the tree of persistent grants, using %u/%u\n", 896 pr_debug("grant %u added to the tree of persistent grants, using %u/%u\n",
895 persistent_gnt->gnt, blkif->persistent_gnt_c, 897 persistent_gnt->gnt, blkif->persistent_gnt_c,
896 xen_blkif_max_pgrants); 898 xen_blkif_max_pgrants);
897 goto next; 899 goto next;
898 } 900 }
899 if (use_persistent_gnts && !blkif->vbd.overflow_max_grants) { 901 if (use_persistent_gnts && !blkif->vbd.overflow_max_grants) {
900 blkif->vbd.overflow_max_grants = 1; 902 blkif->vbd.overflow_max_grants = 1;
901 pr_debug(DRV_PFX " domain %u, device %#x is using maximum number of persistent grants\n", 903 pr_debug("domain %u, device %#x is using maximum number of persistent grants\n",
902 blkif->domid, blkif->vbd.handle); 904 blkif->domid, blkif->vbd.handle);
903 } 905 }
904 /* 906 /*
@@ -916,7 +918,7 @@ next:
916 return ret; 918 return ret;
917 919
918out_of_memory: 920out_of_memory:
919 pr_alert(DRV_PFX "%s: out of memory\n", __func__); 921 pr_alert("%s: out of memory\n", __func__);
920 put_free_pages(blkif, pages_to_gnt, segs_to_map); 922 put_free_pages(blkif, pages_to_gnt, segs_to_map);
921 return -ENOMEM; 923 return -ENOMEM;
922} 924}
@@ -996,7 +998,7 @@ static int dispatch_discard_io(struct xen_blkif *blkif,
996 998
997 err = xen_vbd_translate(&preq, blkif, WRITE); 999 err = xen_vbd_translate(&preq, blkif, WRITE);
998 if (err) { 1000 if (err) {
999 pr_warn(DRV_PFX "access denied: DISCARD [%llu->%llu] on dev=%04x\n", 1001 pr_warn("access denied: DISCARD [%llu->%llu] on dev=%04x\n",
1000 preq.sector_number, 1002 preq.sector_number,
1001 preq.sector_number + preq.nr_sects, blkif->vbd.pdevice); 1003 preq.sector_number + preq.nr_sects, blkif->vbd.pdevice);
1002 goto fail_response; 1004 goto fail_response;
@@ -1012,7 +1014,7 @@ static int dispatch_discard_io(struct xen_blkif *blkif,
1012 GFP_KERNEL, secure); 1014 GFP_KERNEL, secure);
1013fail_response: 1015fail_response:
1014 if (err == -EOPNOTSUPP) { 1016 if (err == -EOPNOTSUPP) {
1015 pr_debug(DRV_PFX "discard op failed, not supported\n"); 1017 pr_debug("discard op failed, not supported\n");
1016 status = BLKIF_RSP_EOPNOTSUPP; 1018 status = BLKIF_RSP_EOPNOTSUPP;
1017 } else if (err) 1019 } else if (err)
1018 status = BLKIF_RSP_ERROR; 1020 status = BLKIF_RSP_ERROR;
@@ -1056,16 +1058,16 @@ static void __end_block_io_op(struct pending_req *pending_req, int error)
1056 /* An error fails the entire request. */ 1058 /* An error fails the entire request. */
1057 if ((pending_req->operation == BLKIF_OP_FLUSH_DISKCACHE) && 1059 if ((pending_req->operation == BLKIF_OP_FLUSH_DISKCACHE) &&
1058 (error == -EOPNOTSUPP)) { 1060 (error == -EOPNOTSUPP)) {
1059 pr_debug(DRV_PFX "flush diskcache op failed, not supported\n"); 1061 pr_debug("flush diskcache op failed, not supported\n");
1060 xen_blkbk_flush_diskcache(XBT_NIL, pending_req->blkif->be, 0); 1062 xen_blkbk_flush_diskcache(XBT_NIL, pending_req->blkif->be, 0);
1061 pending_req->status = BLKIF_RSP_EOPNOTSUPP; 1063 pending_req->status = BLKIF_RSP_EOPNOTSUPP;
1062 } else if ((pending_req->operation == BLKIF_OP_WRITE_BARRIER) && 1064 } else if ((pending_req->operation == BLKIF_OP_WRITE_BARRIER) &&
1063 (error == -EOPNOTSUPP)) { 1065 (error == -EOPNOTSUPP)) {
1064 pr_debug(DRV_PFX "write barrier op failed, not supported\n"); 1066 pr_debug("write barrier op failed, not supported\n");
1065 xen_blkbk_barrier(XBT_NIL, pending_req->blkif->be, 0); 1067 xen_blkbk_barrier(XBT_NIL, pending_req->blkif->be, 0);
1066 pending_req->status = BLKIF_RSP_EOPNOTSUPP; 1068 pending_req->status = BLKIF_RSP_EOPNOTSUPP;
1067 } else if (error) { 1069 } else if (error) {
1068 pr_debug(DRV_PFX "Buffer not up-to-date at end of operation," 1070 pr_debug("Buffer not up-to-date at end of operation,"
1069 " error=%d\n", error); 1071 " error=%d\n", error);
1070 pending_req->status = BLKIF_RSP_ERROR; 1072 pending_req->status = BLKIF_RSP_ERROR;
1071 } 1073 }
@@ -1110,7 +1112,7 @@ __do_block_io_op(struct xen_blkif *blkif)
1110 1112
1111 if (RING_REQUEST_PROD_OVERFLOW(&blk_rings->common, rp)) { 1113 if (RING_REQUEST_PROD_OVERFLOW(&blk_rings->common, rp)) {
1112 rc = blk_rings->common.rsp_prod_pvt; 1114 rc = blk_rings->common.rsp_prod_pvt;
1113 pr_warn(DRV_PFX "Frontend provided bogus ring requests (%d - %d = %d). Halting ring processing on dev=%04x\n", 1115 pr_warn("Frontend provided bogus ring requests (%d - %d = %d). Halting ring processing on dev=%04x\n",
1114 rp, rc, rp - rc, blkif->vbd.pdevice); 1116 rp, rc, rp - rc, blkif->vbd.pdevice);
1115 return -EACCES; 1117 return -EACCES;
1116 } 1118 }
@@ -1217,8 +1219,7 @@ static int dispatch_rw_block_io(struct xen_blkif *blkif,
1217 if ((req->operation == BLKIF_OP_INDIRECT) && 1219 if ((req->operation == BLKIF_OP_INDIRECT) &&
1218 (req_operation != BLKIF_OP_READ) && 1220 (req_operation != BLKIF_OP_READ) &&
1219 (req_operation != BLKIF_OP_WRITE)) { 1221 (req_operation != BLKIF_OP_WRITE)) {
1220 pr_debug(DRV_PFX "Invalid indirect operation (%u)\n", 1222 pr_debug("Invalid indirect operation (%u)\n", req_operation);
1221 req_operation);
1222 goto fail_response; 1223 goto fail_response;
1223 } 1224 }
1224 1225
@@ -1252,8 +1253,7 @@ static int dispatch_rw_block_io(struct xen_blkif *blkif,
1252 (nseg > BLKIF_MAX_SEGMENTS_PER_REQUEST)) || 1253 (nseg > BLKIF_MAX_SEGMENTS_PER_REQUEST)) ||
1253 unlikely((req->operation == BLKIF_OP_INDIRECT) && 1254 unlikely((req->operation == BLKIF_OP_INDIRECT) &&
1254 (nseg > MAX_INDIRECT_SEGMENTS))) { 1255 (nseg > MAX_INDIRECT_SEGMENTS))) {
1255 pr_debug(DRV_PFX "Bad number of segments in request (%d)\n", 1256 pr_debug("Bad number of segments in request (%d)\n", nseg);
1256 nseg);
1257 /* Haven't submitted any bio's yet. */ 1257 /* Haven't submitted any bio's yet. */
1258 goto fail_response; 1258 goto fail_response;
1259 } 1259 }
@@ -1288,7 +1288,7 @@ static int dispatch_rw_block_io(struct xen_blkif *blkif,
1288 } 1288 }
1289 1289
1290 if (xen_vbd_translate(&preq, blkif, operation) != 0) { 1290 if (xen_vbd_translate(&preq, blkif, operation) != 0) {
1291 pr_debug(DRV_PFX "access denied: %s of [%llu,%llu] on dev=%04x\n", 1291 pr_debug("access denied: %s of [%llu,%llu] on dev=%04x\n",
1292 operation == READ ? "read" : "write", 1292 operation == READ ? "read" : "write",
1293 preq.sector_number, 1293 preq.sector_number,
1294 preq.sector_number + preq.nr_sects, 1294 preq.sector_number + preq.nr_sects,
@@ -1303,7 +1303,7 @@ static int dispatch_rw_block_io(struct xen_blkif *blkif,
1303 for (i = 0; i < nseg; i++) { 1303 for (i = 0; i < nseg; i++) {
1304 if (((int)preq.sector_number|(int)seg[i].nsec) & 1304 if (((int)preq.sector_number|(int)seg[i].nsec) &
1305 ((bdev_logical_block_size(preq.bdev) >> 9) - 1)) { 1305 ((bdev_logical_block_size(preq.bdev) >> 9) - 1)) {
1306 pr_debug(DRV_PFX "Misaligned I/O request from domain %d", 1306 pr_debug("Misaligned I/O request from domain %d\n",
1307 blkif->domid); 1307 blkif->domid);
1308 goto fail_response; 1308 goto fail_response;
1309 } 1309 }
diff --git a/drivers/block/xen-blkback/common.h b/drivers/block/xen-blkback/common.h
index 375d28851860..f620b5d3f77c 100644
--- a/drivers/block/xen-blkback/common.h
+++ b/drivers/block/xen-blkback/common.h
@@ -44,12 +44,6 @@
44#include <xen/interface/io/blkif.h> 44#include <xen/interface/io/blkif.h>
45#include <xen/interface/io/protocols.h> 45#include <xen/interface/io/protocols.h>
46 46
47#define DRV_PFX "xen-blkback:"
48#define DPRINTK(fmt, args...) \
49 pr_debug(DRV_PFX "(%s:%d) " fmt ".\n", \
50 __func__, __LINE__, ##args)
51
52
53/* 47/*
54 * This is the maximum number of segments that would be allowed in indirect 48 * This is the maximum number of segments that would be allowed in indirect
55 * requests. This value will also be passed to the frontend. 49 * requests. This value will also be passed to the frontend.
diff --git a/drivers/block/xen-blkback/xenbus.c b/drivers/block/xen-blkback/xenbus.c
index ff3025922c14..6ab69ad61ee1 100644
--- a/drivers/block/xen-blkback/xenbus.c
+++ b/drivers/block/xen-blkback/xenbus.c
@@ -14,6 +14,8 @@
14 14
15*/ 15*/
16 16
17#define pr_fmt(fmt) "xen-blkback: " fmt
18
17#include <stdarg.h> 19#include <stdarg.h>
18#include <linux/module.h> 20#include <linux/module.h>
19#include <linux/kthread.h> 21#include <linux/kthread.h>
@@ -21,6 +23,9 @@
21#include <xen/grant_table.h> 23#include <xen/grant_table.h>
22#include "common.h" 24#include "common.h"
23 25
26/* Enlarge the array size in order to fully show blkback name. */
27#define BLKBACK_NAME_LEN (20)
28
24struct backend_info { 29struct backend_info {
25 struct xenbus_device *dev; 30 struct xenbus_device *dev;
26 struct xen_blkif *blkif; 31 struct xen_blkif *blkif;
@@ -70,7 +75,7 @@ static int blkback_name(struct xen_blkif *blkif, char *buf)
70 else 75 else
71 devname = devpath; 76 devname = devpath;
72 77
73 snprintf(buf, TASK_COMM_LEN, "blkback.%d.%s", blkif->domid, devname); 78 snprintf(buf, BLKBACK_NAME_LEN, "blkback.%d.%s", blkif->domid, devname);
74 kfree(devpath); 79 kfree(devpath);
75 80
76 return 0; 81 return 0;
@@ -79,7 +84,7 @@ static int blkback_name(struct xen_blkif *blkif, char *buf)
79static void xen_update_blkif_status(struct xen_blkif *blkif) 84static void xen_update_blkif_status(struct xen_blkif *blkif)
80{ 85{
81 int err; 86 int err;
82 char name[TASK_COMM_LEN]; 87 char name[BLKBACK_NAME_LEN];
83 88
84 /* Not ready to connect? */ 89 /* Not ready to connect? */
85 if (!blkif->irq || !blkif->vbd.bdev) 90 if (!blkif->irq || !blkif->vbd.bdev)
@@ -424,14 +429,14 @@ static int xen_vbd_create(struct xen_blkif *blkif, blkif_vdev_t handle,
424 FMODE_READ : FMODE_WRITE, NULL); 429 FMODE_READ : FMODE_WRITE, NULL);
425 430
426 if (IS_ERR(bdev)) { 431 if (IS_ERR(bdev)) {
427 DPRINTK("xen_vbd_create: device %08x could not be opened.\n", 432 pr_warn("xen_vbd_create: device %08x could not be opened\n",
428 vbd->pdevice); 433 vbd->pdevice);
429 return -ENOENT; 434 return -ENOENT;
430 } 435 }
431 436
432 vbd->bdev = bdev; 437 vbd->bdev = bdev;
433 if (vbd->bdev->bd_disk == NULL) { 438 if (vbd->bdev->bd_disk == NULL) {
434 DPRINTK("xen_vbd_create: device %08x doesn't exist.\n", 439 pr_warn("xen_vbd_create: device %08x doesn't exist\n",
435 vbd->pdevice); 440 vbd->pdevice);
436 xen_vbd_free(vbd); 441 xen_vbd_free(vbd);
437 return -ENOENT; 442 return -ENOENT;
@@ -450,7 +455,7 @@ static int xen_vbd_create(struct xen_blkif *blkif, blkif_vdev_t handle,
450 if (q && blk_queue_secdiscard(q)) 455 if (q && blk_queue_secdiscard(q))
451 vbd->discard_secure = true; 456 vbd->discard_secure = true;
452 457
453 DPRINTK("Successful creation of handle=%04x (dom=%u)\n", 458 pr_debug("Successful creation of handle=%04x (dom=%u)\n",
454 handle, blkif->domid); 459 handle, blkif->domid);
455 return 0; 460 return 0;
456} 461}
@@ -458,7 +463,7 @@ static int xen_blkbk_remove(struct xenbus_device *dev)
458{ 463{
459 struct backend_info *be = dev_get_drvdata(&dev->dev); 464 struct backend_info *be = dev_get_drvdata(&dev->dev);
460 465
461 DPRINTK(""); 466 pr_debug("%s %p %d\n", __func__, dev, dev->otherend_id);
462 467
463 if (be->major || be->minor) 468 if (be->major || be->minor)
464 xenvbd_sysfs_delif(dev); 469 xenvbd_sysfs_delif(dev);
@@ -564,6 +569,10 @@ static int xen_blkbk_probe(struct xenbus_device *dev,
564 int err; 569 int err;
565 struct backend_info *be = kzalloc(sizeof(struct backend_info), 570 struct backend_info *be = kzalloc(sizeof(struct backend_info),
566 GFP_KERNEL); 571 GFP_KERNEL);
572
573 /* match the pr_debug in xen_blkbk_remove */
574 pr_debug("%s %p %d\n", __func__, dev, dev->otherend_id);
575
567 if (!be) { 576 if (!be) {
568 xenbus_dev_fatal(dev, -ENOMEM, 577 xenbus_dev_fatal(dev, -ENOMEM,
569 "allocating backend structure"); 578 "allocating backend structure");
@@ -595,7 +604,7 @@ static int xen_blkbk_probe(struct xenbus_device *dev,
595 return 0; 604 return 0;
596 605
597fail: 606fail:
598 DPRINTK("failed"); 607 pr_warn("%s failed\n", __func__);
599 xen_blkbk_remove(dev); 608 xen_blkbk_remove(dev);
600 return err; 609 return err;
601} 610}
@@ -619,7 +628,7 @@ static void backend_changed(struct xenbus_watch *watch,
619 unsigned long handle; 628 unsigned long handle;
620 char *device_type; 629 char *device_type;
621 630
622 DPRINTK(""); 631 pr_debug("%s %p %d\n", __func__, dev, dev->otherend_id);
623 632
624 err = xenbus_scanf(XBT_NIL, dev->nodename, "physical-device", "%x:%x", 633 err = xenbus_scanf(XBT_NIL, dev->nodename, "physical-device", "%x:%x",
625 &major, &minor); 634 &major, &minor);
@@ -638,7 +647,7 @@ static void backend_changed(struct xenbus_watch *watch,
638 647
639 if (be->major | be->minor) { 648 if (be->major | be->minor) {
640 if (be->major != major || be->minor != minor) 649 if (be->major != major || be->minor != minor)
641 pr_warn(DRV_PFX "changing physical device (from %x:%x to %x:%x) not supported.\n", 650 pr_warn("changing physical device (from %x:%x to %x:%x) not supported.\n",
642 be->major, be->minor, major, minor); 651 be->major, be->minor, major, minor);
643 return; 652 return;
644 } 653 }
@@ -699,13 +708,12 @@ static void frontend_changed(struct xenbus_device *dev,
699 struct backend_info *be = dev_get_drvdata(&dev->dev); 708 struct backend_info *be = dev_get_drvdata(&dev->dev);
700 int err; 709 int err;
701 710
702 DPRINTK("%s", xenbus_strstate(frontend_state)); 711 pr_debug("%s %p %s\n", __func__, dev, xenbus_strstate(frontend_state));
703 712
704 switch (frontend_state) { 713 switch (frontend_state) {
705 case XenbusStateInitialising: 714 case XenbusStateInitialising:
706 if (dev->state == XenbusStateClosed) { 715 if (dev->state == XenbusStateClosed) {
707 pr_info(DRV_PFX "%s: prepare for reconnect\n", 716 pr_info("%s: prepare for reconnect\n", dev->nodename);
708 dev->nodename);
709 xenbus_switch_state(dev, XenbusStateInitWait); 717 xenbus_switch_state(dev, XenbusStateInitWait);
710 } 718 }
711 break; 719 break;
@@ -772,7 +780,7 @@ static void connect(struct backend_info *be)
772 int err; 780 int err;
773 struct xenbus_device *dev = be->dev; 781 struct xenbus_device *dev = be->dev;
774 782
775 DPRINTK("%s", dev->otherend); 783 pr_debug("%s %s\n", __func__, dev->otherend);
776 784
777 /* Supply the information about the device the frontend needs */ 785 /* Supply the information about the device the frontend needs */
778again: 786again:
@@ -858,7 +866,7 @@ static int connect_ring(struct backend_info *be)
858 char protocol[64] = ""; 866 char protocol[64] = "";
859 int err; 867 int err;
860 868
861 DPRINTK("%s", dev->otherend); 869 pr_debug("%s %s\n", __func__, dev->otherend);
862 870
863 err = xenbus_gather(XBT_NIL, dev->otherend, "ring-ref", "%lu", 871 err = xenbus_gather(XBT_NIL, dev->otherend, "ring-ref", "%lu",
864 &ring_ref, "event-channel", "%u", &evtchn, NULL); 872 &ring_ref, "event-channel", "%u", &evtchn, NULL);
@@ -893,7 +901,7 @@ static int connect_ring(struct backend_info *be)
893 be->blkif->vbd.feature_gnt_persistent = pers_grants; 901 be->blkif->vbd.feature_gnt_persistent = pers_grants;
894 be->blkif->vbd.overflow_max_grants = 0; 902 be->blkif->vbd.overflow_max_grants = 0;
895 903
896 pr_info(DRV_PFX "ring-ref %ld, event-channel %d, protocol %d (%s) %s\n", 904 pr_info("ring-ref %ld, event-channel %d, protocol %d (%s) %s\n",
897 ring_ref, evtchn, be->blkif->blk_protocol, protocol, 905 ring_ref, evtchn, be->blkif->blk_protocol, protocol,
898 pers_grants ? "persistent grants" : ""); 906 pers_grants ? "persistent grants" : "");
899 907
diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
index b99729e36860..cbddbaddb347 100644
--- a/drivers/bus/Kconfig
+++ b/drivers/bus/Kconfig
@@ -20,6 +20,19 @@ config IMX_WEIM
20 The WEIM(Wireless External Interface Module) works like a bus. 20 The WEIM(Wireless External Interface Module) works like a bus.
21 You can attach many different devices on it, such as NOR, onenand. 21 You can attach many different devices on it, such as NOR, onenand.
22 22
23config MIPS_CDMM
24 bool "MIPS Common Device Memory Map (CDMM) Driver"
25 depends on CPU_MIPSR2
26 help
27 Driver needed for the MIPS Common Device Memory Map bus in MIPS
28 cores. This bus is for per-CPU tightly coupled devices such as the
29 Fast Debug Channel (FDC).
30
31 For this to work, either your bootloader needs to enable the CDMM
32 region at an unused physical address on the boot CPU, or else your
33 platform code needs to implement mips_cdmm_phys_base() (see
34 asm/cdmm.h).
35
23config MVEBU_MBUS 36config MVEBU_MBUS
24 bool 37 bool
25 depends on PLAT_ORION 38 depends on PLAT_ORION
diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile
index 2973c18cbcc2..807dd17ef2f8 100644
--- a/drivers/bus/Makefile
+++ b/drivers/bus/Makefile
@@ -4,6 +4,7 @@
4 4
5obj-$(CONFIG_BRCMSTB_GISB_ARB) += brcmstb_gisb.o 5obj-$(CONFIG_BRCMSTB_GISB_ARB) += brcmstb_gisb.o
6obj-$(CONFIG_IMX_WEIM) += imx-weim.o 6obj-$(CONFIG_IMX_WEIM) += imx-weim.o
7obj-$(CONFIG_MIPS_CDMM) += mips_cdmm.o
7obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o 8obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o
8obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o 9obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
9 10
diff --git a/drivers/bus/mips_cdmm.c b/drivers/bus/mips_cdmm.c
new file mode 100644
index 000000000000..5bd792c68f9b
--- /dev/null
+++ b/drivers/bus/mips_cdmm.c
@@ -0,0 +1,716 @@
1/*
2 * Bus driver for MIPS Common Device Memory Map (CDMM).
3 *
4 * Copyright (C) 2014-2015 Imagination Technologies Ltd.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/atomic.h>
12#include <linux/err.h>
13#include <linux/cpu.h>
14#include <linux/cpumask.h>
15#include <linux/io.h>
16#include <linux/platform_device.h>
17#include <linux/slab.h>
18#include <linux/smp.h>
19#include <asm/cdmm.h>
20#include <asm/hazards.h>
21#include <asm/mipsregs.h>
22
23/* Access control and status register fields */
24#define CDMM_ACSR_DEVTYPE_SHIFT 24
25#define CDMM_ACSR_DEVTYPE (255ul << CDMM_ACSR_DEVTYPE_SHIFT)
26#define CDMM_ACSR_DEVSIZE_SHIFT 16
27#define CDMM_ACSR_DEVSIZE (31ul << CDMM_ACSR_DEVSIZE_SHIFT)
28#define CDMM_ACSR_DEVREV_SHIFT 12
29#define CDMM_ACSR_DEVREV (15ul << CDMM_ACSR_DEVREV_SHIFT)
30#define CDMM_ACSR_UW (1ul << 3)
31#define CDMM_ACSR_UR (1ul << 2)
32#define CDMM_ACSR_SW (1ul << 1)
33#define CDMM_ACSR_SR (1ul << 0)
34
35/* Each block of device registers is 64 bytes */
36#define CDMM_DRB_SIZE 64
37
38#define to_mips_cdmm_driver(d) container_of(d, struct mips_cdmm_driver, drv)
39
40/* Default physical base address */
41static phys_addr_t mips_cdmm_default_base;
42
43/* Bus operations */
44
45static const struct mips_cdmm_device_id *
46mips_cdmm_lookup(const struct mips_cdmm_device_id *table,
47 struct mips_cdmm_device *dev)
48{
49 int ret = 0;
50
51 for (; table->type; ++table) {
52 ret = (dev->type == table->type);
53 if (ret)
54 break;
55 }
56
57 return ret ? table : NULL;
58}
59
60static int mips_cdmm_match(struct device *dev, struct device_driver *drv)
61{
62 struct mips_cdmm_device *cdev = to_mips_cdmm_device(dev);
63 struct mips_cdmm_driver *cdrv = to_mips_cdmm_driver(drv);
64
65 return mips_cdmm_lookup(cdrv->id_table, cdev) != NULL;
66}
67
68static int mips_cdmm_uevent(struct device *dev, struct kobj_uevent_env *env)
69{
70 struct mips_cdmm_device *cdev = to_mips_cdmm_device(dev);
71 int retval = 0;
72
73 retval = add_uevent_var(env, "CDMM_CPU=%u", cdev->cpu);
74 if (retval)
75 return retval;
76
77 retval = add_uevent_var(env, "CDMM_TYPE=0x%02x", cdev->type);
78 if (retval)
79 return retval;
80
81 retval = add_uevent_var(env, "CDMM_REV=%u", cdev->rev);
82 if (retval)
83 return retval;
84
85 retval = add_uevent_var(env, "MODALIAS=mipscdmm:t%02X", cdev->type);
86 return retval;
87}
88
89/* Device attributes */
90
91#define CDMM_ATTR(name, fmt, arg...) \
92static ssize_t name##_show(struct device *_dev, \
93 struct device_attribute *attr, char *buf) \
94{ \
95 struct mips_cdmm_device *dev = to_mips_cdmm_device(_dev); \
96 return sprintf(buf, fmt, arg); \
97} \
98static DEVICE_ATTR_RO(name);
99
100CDMM_ATTR(cpu, "%u\n", dev->cpu);
101CDMM_ATTR(type, "0x%02x\n", dev->type);
102CDMM_ATTR(revision, "%u\n", dev->rev);
103CDMM_ATTR(modalias, "mipscdmm:t%02X\n", dev->type);
104CDMM_ATTR(resource, "\t%016llx\t%016llx\t%016lx\n",
105 (unsigned long long)dev->res.start,
106 (unsigned long long)dev->res.end,
107 dev->res.flags);
108
109static struct attribute *mips_cdmm_dev_attrs[] = {
110 &dev_attr_cpu.attr,
111 &dev_attr_type.attr,
112 &dev_attr_revision.attr,
113 &dev_attr_modalias.attr,
114 &dev_attr_resource.attr,
115 NULL,
116};
117ATTRIBUTE_GROUPS(mips_cdmm_dev);
118
119struct bus_type mips_cdmm_bustype = {
120 .name = "cdmm",
121 .dev_groups = mips_cdmm_dev_groups,
122 .match = mips_cdmm_match,
123 .uevent = mips_cdmm_uevent,
124};
125EXPORT_SYMBOL_GPL(mips_cdmm_bustype);
126
127/*
128 * Standard driver callback helpers.
129 *
130 * All the CDMM driver callbacks need to be executed on the appropriate CPU from
131 * workqueues. For the standard driver callbacks we need a work function
132 * (mips_cdmm_{void,int}_work()) to do the actual call from the right CPU, and a
133 * wrapper function (generated with BUILD_PERCPU_HELPER) to arrange for the work
134 * function to be called on that CPU.
135 */
136
137/**
138 * struct mips_cdmm_work_dev - Data for per-device call work.
139 * @fn: CDMM driver callback function to call for the device.
140 * @dev: CDMM device to pass to @fn.
141 */
142struct mips_cdmm_work_dev {
143 void *fn;
144 struct mips_cdmm_device *dev;
145};
146
147/**
148 * mips_cdmm_void_work() - Call a void returning CDMM driver callback.
149 * @data: struct mips_cdmm_work_dev pointer.
150 *
151 * A work_on_cpu() callback function to call an arbitrary CDMM driver callback
152 * function which doesn't return a value.
153 */
154static long mips_cdmm_void_work(void *data)
155{
156 struct mips_cdmm_work_dev *work = data;
157 void (*fn)(struct mips_cdmm_device *) = work->fn;
158
159 fn(work->dev);
160 return 0;
161}
162
163/**
164 * mips_cdmm_int_work() - Call an int returning CDMM driver callback.
165 * @data: struct mips_cdmm_work_dev pointer.
166 *
167 * A work_on_cpu() callback function to call an arbitrary CDMM driver callback
168 * function which returns an int.
169 */
170static long mips_cdmm_int_work(void *data)
171{
172 struct mips_cdmm_work_dev *work = data;
173 int (*fn)(struct mips_cdmm_device *) = work->fn;
174
175 return fn(work->dev);
176}
177
178#define _BUILD_RET_void
179#define _BUILD_RET_int return
180
181/**
182 * BUILD_PERCPU_HELPER() - Helper to call a CDMM driver callback on right CPU.
183 * @_ret: Return type (void or int).
184 * @_name: Name of CDMM driver callback function.
185 *
186 * Generates a specific device callback function to call a CDMM driver callback
187 * function on the appropriate CPU for the device, and if applicable return the
188 * result.
189 */
190#define BUILD_PERCPU_HELPER(_ret, _name) \
191static _ret mips_cdmm_##_name(struct device *dev) \
192{ \
193 struct mips_cdmm_device *cdev = to_mips_cdmm_device(dev); \
194 struct mips_cdmm_driver *cdrv = to_mips_cdmm_driver(dev->driver); \
195 struct mips_cdmm_work_dev work = { \
196 .fn = cdrv->_name, \
197 .dev = cdev, \
198 }; \
199 \
200 _BUILD_RET_##_ret work_on_cpu(cdev->cpu, \
201 mips_cdmm_##_ret##_work, &work); \
202}
203
204/* Driver callback functions */
205BUILD_PERCPU_HELPER(int, probe) /* int mips_cdmm_probe(struct device) */
206BUILD_PERCPU_HELPER(int, remove) /* int mips_cdmm_remove(struct device) */
207BUILD_PERCPU_HELPER(void, shutdown) /* void mips_cdmm_shutdown(struct device) */
208
209
210/* Driver registration */
211
212/**
213 * mips_cdmm_driver_register() - Register a CDMM driver.
214 * @drv: CDMM driver information.
215 *
216 * Register a CDMM driver with the CDMM subsystem. The driver will be informed
217 * of matching devices which are discovered.
218 *
219 * Returns: 0 on success.
220 */
221int mips_cdmm_driver_register(struct mips_cdmm_driver *drv)
222{
223 drv->drv.bus = &mips_cdmm_bustype;
224
225 if (drv->probe)
226 drv->drv.probe = mips_cdmm_probe;
227 if (drv->remove)
228 drv->drv.remove = mips_cdmm_remove;
229 if (drv->shutdown)
230 drv->drv.shutdown = mips_cdmm_shutdown;
231
232 return driver_register(&drv->drv);
233}
234EXPORT_SYMBOL_GPL(mips_cdmm_driver_register);
235
236/**
237 * mips_cdmm_driver_unregister() - Unregister a CDMM driver.
238 * @drv: CDMM driver information.
239 *
240 * Unregister a CDMM driver from the CDMM subsystem.
241 */
242void mips_cdmm_driver_unregister(struct mips_cdmm_driver *drv)
243{
244 driver_unregister(&drv->drv);
245}
246EXPORT_SYMBOL_GPL(mips_cdmm_driver_unregister);
247
248
249/* CDMM initialisation and bus discovery */
250
251/**
252 * struct mips_cdmm_bus - Info about CDMM bus.
253 * @phys: Physical address at which it is mapped.
254 * @regs: Virtual address where registers can be accessed.
255 * @drbs: Total number of DRBs.
256 * @drbs_reserved: Number of DRBs reserved.
257 * @discovered: Whether the devices on the bus have been discovered yet.
258 * @offline: Whether the CDMM bus is going offline (or very early
259 * coming back online), in which case it should be
260 * reconfigured each time.
261 */
262struct mips_cdmm_bus {
263 phys_addr_t phys;
264 void __iomem *regs;
265 unsigned int drbs;
266 unsigned int drbs_reserved;
267 bool discovered;
268 bool offline;
269};
270
271static struct mips_cdmm_bus mips_cdmm_boot_bus;
272static DEFINE_PER_CPU(struct mips_cdmm_bus *, mips_cdmm_buses);
273static atomic_t mips_cdmm_next_id = ATOMIC_INIT(-1);
274
275/**
276 * mips_cdmm_get_bus() - Get the per-CPU CDMM bus information.
277 *
278 * Get information about the per-CPU CDMM bus, if the bus is present.
279 *
280 * The caller must prevent migration to another CPU, either by disabling
281 * pre-emption or by running from a pinned kernel thread.
282 *
283 * Returns: Pointer to CDMM bus information for the current CPU.
284 * May return ERR_PTR(-errno) in case of error, so check with
285 * IS_ERR().
286 */
287static struct mips_cdmm_bus *mips_cdmm_get_bus(void)
288{
289 struct mips_cdmm_bus *bus, **bus_p;
290 unsigned long flags;
291 unsigned int cpu;
292
293 if (!cpu_has_cdmm)
294 return ERR_PTR(-ENODEV);
295
296 cpu = smp_processor_id();
297 /* Avoid early use of per-cpu primitives before initialised */
298 if (cpu == 0)
299 return &mips_cdmm_boot_bus;
300
301 /* Get bus pointer */
302 bus_p = per_cpu_ptr(&mips_cdmm_buses, cpu);
303 local_irq_save(flags);
304 bus = *bus_p;
305 /* Attempt allocation if NULL */
306 if (unlikely(!bus)) {
307 bus = kzalloc(sizeof(*bus), GFP_ATOMIC);
308 if (unlikely(!bus))
309 bus = ERR_PTR(-ENOMEM);
310 else
311 *bus_p = bus;
312 }
313 local_irq_restore(flags);
314 return bus;
315}
316
317/**
318 * mips_cdmm_cur_base() - Find current physical base address of CDMM region.
319 *
320 * Returns: Physical base address of CDMM region according to cdmmbase CP0
321 * register, or 0 if the CDMM region is disabled.
322 */
323static phys_addr_t mips_cdmm_cur_base(void)
324{
325 unsigned long cdmmbase = read_c0_cdmmbase();
326
327 if (!(cdmmbase & MIPS_CDMMBASE_EN))
328 return 0;
329
330 return (cdmmbase >> MIPS_CDMMBASE_ADDR_SHIFT)
331 << MIPS_CDMMBASE_ADDR_START;
332}
333
334/**
335 * mips_cdmm_setup() - Ensure the CDMM bus is initialised and usable.
336 * @bus: Pointer to bus information for current CPU.
337 * IS_ERR(bus) is checked, so no need for caller to check.
338 *
339 * The caller must prevent migration to another CPU, either by disabling
340 * pre-emption or by running from a pinned kernel thread.
341 *
342 * Returns 0 on success, -errno on failure.
343 */
344static int mips_cdmm_setup(struct mips_cdmm_bus *bus)
345{
346 unsigned long cdmmbase, flags;
347 int ret = 0;
348
349 if (IS_ERR(bus))
350 return PTR_ERR(bus);
351
352 local_irq_save(flags);
353 /* Don't set up bus a second time unless marked offline */
354 if (bus->offline) {
355 /* If CDMM region is still set up, nothing to do */
356 if (bus->phys == mips_cdmm_cur_base())
357 goto out;
358 /*
359 * The CDMM region isn't set up as expected, so it needs
360 * reconfiguring, but then we can stop checking it.
361 */
362 bus->offline = false;
363 } else if (bus->phys > 1) {
364 goto out;
365 }
366
367 /* If the CDMM region is already configured, inherit that setup */
368 if (!bus->phys)
369 bus->phys = mips_cdmm_cur_base();
370 /* Otherwise, ask platform code for suggestions */
371 if (!bus->phys && mips_cdmm_phys_base)
372 bus->phys = mips_cdmm_phys_base();
373 /* Otherwise, copy what other CPUs have done */
374 if (!bus->phys)
375 bus->phys = mips_cdmm_default_base;
376 /* Otherwise, complain once */
377 if (!bus->phys) {
378 bus->phys = 1;
379 /*
380 * If you hit this, either your bootloader needs to set up the
381 * CDMM on the boot CPU, or else you need to implement
382 * mips_cdmm_phys_base() for your platform (see asm/cdmm.h).
383 */
384 pr_err("cdmm%u: Failed to choose a physical base\n",
385 smp_processor_id());
386 }
387 /* Already complained? */
388 if (bus->phys == 1) {
389 ret = -ENOMEM;
390 goto out;
391 }
392 /* Record our success for other CPUs to copy */
393 mips_cdmm_default_base = bus->phys;
394
395 pr_debug("cdmm%u: Enabling CDMM region at %pa\n",
396 smp_processor_id(), &bus->phys);
397
398 /* Enable CDMM */
399 cdmmbase = read_c0_cdmmbase();
400 cdmmbase &= (1ul << MIPS_CDMMBASE_ADDR_SHIFT) - 1;
401 cdmmbase |= (bus->phys >> MIPS_CDMMBASE_ADDR_START)
402 << MIPS_CDMMBASE_ADDR_SHIFT;
403 cdmmbase |= MIPS_CDMMBASE_EN;
404 write_c0_cdmmbase(cdmmbase);
405 tlbw_use_hazard();
406
407 bus->regs = (void __iomem *)CKSEG1ADDR(bus->phys);
408 bus->drbs = 1 + ((cdmmbase & MIPS_CDMMBASE_SIZE) >>
409 MIPS_CDMMBASE_SIZE_SHIFT);
410 bus->drbs_reserved = !!(cdmmbase & MIPS_CDMMBASE_CI);
411
412out:
413 local_irq_restore(flags);
414 return ret;
415}
416
417/**
418 * mips_cdmm_early_probe() - Minimally probe for a specific device on CDMM.
419 * @dev_type: CDMM type code to look for.
420 *
421 * Minimally configure the in-CPU Common Device Memory Map (CDMM) and look for a
422 * specific device. This can be used to find a device very early in boot for
423 * example to configure an early FDC console device.
424 *
425 * The caller must prevent migration to another CPU, either by disabling
426 * pre-emption or by running from a pinned kernel thread.
427 *
428 * Returns: MMIO pointer to device memory. The caller can read the ACSR
429 * register to find more information about the device (such as the
430 * version number or the number of blocks).
431 * May return IOMEM_ERR_PTR(-errno) in case of error, so check with
432 * IS_ERR().
433 */
434void __iomem *mips_cdmm_early_probe(unsigned int dev_type)
435{
436 struct mips_cdmm_bus *bus;
437 void __iomem *cdmm;
438 u32 acsr;
439 unsigned int drb, type, size;
440 int err;
441
442 if (WARN_ON(!dev_type))
443 return IOMEM_ERR_PTR(-ENODEV);
444
445 bus = mips_cdmm_get_bus();
446 err = mips_cdmm_setup(bus);
447 if (err)
448 return IOMEM_ERR_PTR(err);
449
450 /* Skip the first block if it's reserved for more registers */
451 drb = bus->drbs_reserved;
452 cdmm = bus->regs;
453
454 /* Look for a specific device type */
455 for (; drb < bus->drbs; drb += size + 1) {
456 acsr = readl(cdmm + drb * CDMM_DRB_SIZE);
457 type = (acsr & CDMM_ACSR_DEVTYPE) >> CDMM_ACSR_DEVTYPE_SHIFT;
458 if (type == dev_type)
459 return cdmm + drb * CDMM_DRB_SIZE;
460 size = (acsr & CDMM_ACSR_DEVSIZE) >> CDMM_ACSR_DEVSIZE_SHIFT;
461 }
462
463 return IOMEM_ERR_PTR(-ENODEV);
464}
465EXPORT_SYMBOL_GPL(mips_cdmm_early_probe);
466
467/**
468 * mips_cdmm_release() - Release a removed CDMM device.
469 * @dev: Device object
470 *
471 * Clean up the struct mips_cdmm_device for an unused CDMM device. This is
472 * called automatically by the driver core when a device is removed.
473 */
474static void mips_cdmm_release(struct device *dev)
475{
476 struct mips_cdmm_device *cdev = to_mips_cdmm_device(dev);
477
478 kfree(cdev);
479}
480
481/**
482 * mips_cdmm_bus_discover() - Discover the devices on the CDMM bus.
483 * @bus: CDMM bus information, must already be set up.
484 */
485static void mips_cdmm_bus_discover(struct mips_cdmm_bus *bus)
486{
487 void __iomem *cdmm;
488 u32 acsr;
489 unsigned int drb, type, size, rev;
490 struct mips_cdmm_device *dev;
491 unsigned int cpu = smp_processor_id();
492 int ret = 0;
493 int id = 0;
494
495 /* Skip the first block if it's reserved for more registers */
496 drb = bus->drbs_reserved;
497 cdmm = bus->regs;
498
499 /* Discover devices */
500 bus->discovered = true;
501 pr_info("cdmm%u discovery (%u blocks)\n", cpu, bus->drbs);
502 for (; drb < bus->drbs; drb += size + 1) {
503 acsr = readl(cdmm + drb * CDMM_DRB_SIZE);
504 type = (acsr & CDMM_ACSR_DEVTYPE) >> CDMM_ACSR_DEVTYPE_SHIFT;
505 size = (acsr & CDMM_ACSR_DEVSIZE) >> CDMM_ACSR_DEVSIZE_SHIFT;
506 rev = (acsr & CDMM_ACSR_DEVREV) >> CDMM_ACSR_DEVREV_SHIFT;
507
508 if (!type)
509 continue;
510
511 pr_info("cdmm%u-%u: @%u (%#x..%#x), type 0x%02x, rev %u\n",
512 cpu, id, drb, drb * CDMM_DRB_SIZE,
513 (drb + size + 1) * CDMM_DRB_SIZE - 1,
514 type, rev);
515
516 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
517 if (!dev)
518 break;
519
520 dev->cpu = cpu;
521 dev->res.start = bus->phys + drb * CDMM_DRB_SIZE;
522 dev->res.end = bus->phys +
523 (drb + size + 1) * CDMM_DRB_SIZE - 1;
524 dev->res.flags = IORESOURCE_MEM;
525 dev->type = type;
526 dev->rev = rev;
527 dev->dev.parent = get_cpu_device(cpu);
528 dev->dev.bus = &mips_cdmm_bustype;
529 dev->dev.id = atomic_inc_return(&mips_cdmm_next_id);
530 dev->dev.release = mips_cdmm_release;
531
532 dev_set_name(&dev->dev, "cdmm%u-%u", cpu, id);
533 ++id;
534 ret = device_register(&dev->dev);
535 if (ret) {
536 put_device(&dev->dev);
537 kfree(dev);
538 }
539 }
540}
541
542
543/*
544 * CPU hotplug and initialisation
545 *
546 * All the CDMM driver callbacks need to be executed on the appropriate CPU from
547 * workqueues. For the CPU callbacks, they need to be called for all devices on
548 * that CPU, so the work function calls bus_for_each_dev, using a helper
549 * (generated with BUILD_PERDEV_HELPER) to call the driver callback if the
550 * device's CPU matches.
551 */
552
553/**
554 * BUILD_PERDEV_HELPER() - Helper to call a CDMM driver callback if CPU matches.
555 * @_name: Name of CDMM driver callback function.
556 *
557 * Generates a bus_for_each_dev callback function to call a specific CDMM driver
558 * callback function for the device if the device's CPU matches that pointed to
559 * by the data argument.
560 *
561 * This is used for informing drivers for all devices on a given CPU of some
562 * event (such as the CPU going online/offline).
563 *
564 * It is expected to already be called from the appropriate CPU.
565 */
566#define BUILD_PERDEV_HELPER(_name) \
567static int mips_cdmm_##_name##_helper(struct device *dev, void *data) \
568{ \
569 struct mips_cdmm_device *cdev = to_mips_cdmm_device(dev); \
570 struct mips_cdmm_driver *cdrv; \
571 unsigned int cpu = *(unsigned int *)data; \
572 \
573 if (cdev->cpu != cpu || !dev->driver) \
574 return 0; \
575 \
576 cdrv = to_mips_cdmm_driver(dev->driver); \
577 if (!cdrv->_name) \
578 return 0; \
579 return cdrv->_name(cdev); \
580}
581
582/* bus_for_each_dev callback helper functions */
583BUILD_PERDEV_HELPER(cpu_down) /* int mips_cdmm_cpu_down_helper(...) */
584BUILD_PERDEV_HELPER(cpu_up) /* int mips_cdmm_cpu_up_helper(...) */
585
586/**
587 * mips_cdmm_bus_down() - Tear down the CDMM bus.
588 * @data: Pointer to unsigned int CPU number.
589 *
590 * This work_on_cpu callback function is executed on a given CPU to call the
591 * CDMM driver cpu_down callback for all devices on that CPU.
592 */
593static long mips_cdmm_bus_down(void *data)
594{
595 struct mips_cdmm_bus *bus;
596 long ret;
597
598 /* Inform all the devices on the bus */
599 ret = bus_for_each_dev(&mips_cdmm_bustype, NULL, data,
600 mips_cdmm_cpu_down_helper);
601
602 /*
603 * While bus is offline, each use of it should reconfigure it just in
604 * case it is first use when coming back online again.
605 */
606 bus = mips_cdmm_get_bus();
607 if (!IS_ERR(bus))
608 bus->offline = true;
609
610 return ret;
611}
612
613/**
614 * mips_cdmm_bus_up() - Bring up the CDMM bus.
615 * @data: Pointer to unsigned int CPU number.
616 *
617 * This work_on_cpu callback function is executed on a given CPU to discover
618 * CDMM devices on that CPU, or to call the CDMM driver cpu_up callback for all
619 * devices already discovered on that CPU.
620 *
621 * It is used during initialisation and when CPUs are brought online.
622 */
623static long mips_cdmm_bus_up(void *data)
624{
625 struct mips_cdmm_bus *bus;
626 long ret;
627
628 bus = mips_cdmm_get_bus();
629 ret = mips_cdmm_setup(bus);
630 if (ret)
631 return ret;
632
633 /* Bus now set up, so we can drop the offline flag if still set */
634 bus->offline = false;
635
636 if (!bus->discovered)
637 mips_cdmm_bus_discover(bus);
638 else
639 /* Inform all the devices on the bus */
640 ret = bus_for_each_dev(&mips_cdmm_bustype, NULL, data,
641 mips_cdmm_cpu_up_helper);
642
643 return ret;
644}
645
646/**
647 * mips_cdmm_cpu_notify() - Take action when a CPU is going online or offline.
648 * @nb: CPU notifier block .
649 * @action: Event that has taken place (CPU_*).
650 * @data: CPU number.
651 *
652 * This notifier is used to keep the CDMM buses updated as CPUs are offlined and
653 * onlined. When CPUs go offline or come back online, so does their CDMM bus, so
654 * devices must be informed. Also when CPUs come online for the first time the
655 * devices on the CDMM bus need discovering.
656 *
657 * Returns: NOTIFY_OK if event was used.
658 * NOTIFY_DONE if we didn't care.
659 */
660static int mips_cdmm_cpu_notify(struct notifier_block *nb,
661 unsigned long action, void *data)
662{
663 unsigned int cpu = (unsigned int)data;
664
665 switch (action & ~CPU_TASKS_FROZEN) {
666 case CPU_ONLINE:
667 case CPU_DOWN_FAILED:
668 work_on_cpu(cpu, mips_cdmm_bus_up, &cpu);
669 break;
670 case CPU_DOWN_PREPARE:
671 work_on_cpu(cpu, mips_cdmm_bus_down, &cpu);
672 break;
673 default:
674 return NOTIFY_DONE;
675 }
676
677 return NOTIFY_OK;
678}
679
680static struct notifier_block mips_cdmm_cpu_nb = {
681 .notifier_call = mips_cdmm_cpu_notify,
682};
683
684/**
685 * mips_cdmm_init() - Initialise CDMM bus.
686 *
687 * Initialise CDMM bus, discover CDMM devices for online CPUs, and arrange for
688 * hotplug notifications so the CDMM drivers can be kept up to date.
689 */
690static int __init mips_cdmm_init(void)
691{
692 unsigned int cpu;
693 int ret;
694
695 /* Register the bus */
696 ret = bus_register(&mips_cdmm_bustype);
697 if (ret)
698 return ret;
699
700 /* We want to be notified about new CPUs */
701 ret = register_cpu_notifier(&mips_cdmm_cpu_nb);
702 if (ret) {
703 pr_warn("cdmm: Failed to register CPU notifier\n");
704 goto out;
705 }
706
707 /* Discover devices on CDMM of online CPUs */
708 for_each_online_cpu(cpu)
709 work_on_cpu(cpu, mips_cdmm_bus_up, &cpu);
710
711 return 0;
712out:
713 bus_unregister(&mips_cdmm_bustype);
714 return ret;
715}
716subsys_initcall(mips_cdmm_init);
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index d478ceb69c5f..e43ff53f85a6 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -54,6 +54,7 @@ obj-$(CONFIG_ARCH_MMP) += mmp/
54endif 54endif
55obj-$(CONFIG_PLAT_ORION) += mvebu/ 55obj-$(CONFIG_PLAT_ORION) += mvebu/
56obj-$(CONFIG_ARCH_MXS) += mxs/ 56obj-$(CONFIG_ARCH_MXS) += mxs/
57obj-$(CONFIG_MACH_PISTACHIO) += pistachio/
57obj-$(CONFIG_COMMON_CLK_PXA) += pxa/ 58obj-$(CONFIG_COMMON_CLK_PXA) += pxa/
58obj-$(CONFIG_COMMON_CLK_QCOM) += qcom/ 59obj-$(CONFIG_COMMON_CLK_QCOM) += qcom/
59obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ 60obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
diff --git a/drivers/clk/bcm/clk-kona.c b/drivers/clk/bcm/clk-kona.c
index 05abae89262e..a0ef4f75d457 100644
--- a/drivers/clk/bcm/clk-kona.c
+++ b/drivers/clk/bcm/clk-kona.c
@@ -15,6 +15,7 @@
15#include "clk-kona.h" 15#include "clk-kona.h"
16 16
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/kernel.h>
18 19
19/* 20/*
20 * "Policies" affect the frequencies of bus clocks provided by a 21 * "Policies" affect the frequencies of bus clocks provided by a
@@ -51,21 +52,6 @@ static inline u32 bitfield_replace(u32 reg_val, u32 shift, u32 width, u32 val)
51 52
52/* Divider and scaling helpers */ 53/* Divider and scaling helpers */
53 54
54/*
55 * Implement DIV_ROUND_CLOSEST() for 64-bit dividend and both values
56 * unsigned. Note that unlike do_div(), the remainder is discarded
57 * and the return value is the quotient (not the remainder).
58 */
59u64 do_div_round_closest(u64 dividend, unsigned long divisor)
60{
61 u64 result;
62
63 result = dividend + ((u64)divisor >> 1);
64 (void)do_div(result, divisor);
65
66 return result;
67}
68
69/* Convert a divider into the scaled divisor value it represents. */ 55/* Convert a divider into the scaled divisor value it represents. */
70static inline u64 scaled_div_value(struct bcm_clk_div *div, u32 reg_div) 56static inline u64 scaled_div_value(struct bcm_clk_div *div, u32 reg_div)
71{ 57{
@@ -87,7 +73,7 @@ u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value, u32 billionths)
87 combined = (u64)div_value * BILLION + billionths; 73 combined = (u64)div_value * BILLION + billionths;
88 combined <<= div->u.s.frac_width; 74 combined <<= div->u.s.frac_width;
89 75
90 return do_div_round_closest(combined, BILLION); 76 return DIV_ROUND_CLOSEST_ULL(combined, BILLION);
91} 77}
92 78
93/* The scaled minimum divisor representable by a divider */ 79/* The scaled minimum divisor representable by a divider */
@@ -731,7 +717,7 @@ static unsigned long clk_recalc_rate(struct ccu_data *ccu,
731 scaled_rate = scale_rate(pre_div, parent_rate); 717 scaled_rate = scale_rate(pre_div, parent_rate);
732 scaled_rate = scale_rate(div, scaled_rate); 718 scaled_rate = scale_rate(div, scaled_rate);
733 scaled_div = divider_read_scaled(ccu, pre_div); 719 scaled_div = divider_read_scaled(ccu, pre_div);
734 scaled_parent_rate = do_div_round_closest(scaled_rate, 720 scaled_parent_rate = DIV_ROUND_CLOSEST_ULL(scaled_rate,
735 scaled_div); 721 scaled_div);
736 } else { 722 } else {
737 scaled_parent_rate = scale_rate(div, parent_rate); 723 scaled_parent_rate = scale_rate(div, parent_rate);
@@ -743,7 +729,7 @@ static unsigned long clk_recalc_rate(struct ccu_data *ccu,
743 * rate. 729 * rate.
744 */ 730 */
745 scaled_div = divider_read_scaled(ccu, div); 731 scaled_div = divider_read_scaled(ccu, div);
746 result = do_div_round_closest(scaled_parent_rate, scaled_div); 732 result = DIV_ROUND_CLOSEST_ULL(scaled_parent_rate, scaled_div);
747 733
748 return (unsigned long)result; 734 return (unsigned long)result;
749} 735}
@@ -790,7 +776,7 @@ static long round_rate(struct ccu_data *ccu, struct bcm_clk_div *div,
790 scaled_rate = scale_rate(pre_div, parent_rate); 776 scaled_rate = scale_rate(pre_div, parent_rate);
791 scaled_rate = scale_rate(div, scaled_rate); 777 scaled_rate = scale_rate(div, scaled_rate);
792 scaled_pre_div = divider_read_scaled(ccu, pre_div); 778 scaled_pre_div = divider_read_scaled(ccu, pre_div);
793 scaled_parent_rate = do_div_round_closest(scaled_rate, 779 scaled_parent_rate = DIV_ROUND_CLOSEST_ULL(scaled_rate,
794 scaled_pre_div); 780 scaled_pre_div);
795 } else { 781 } else {
796 scaled_parent_rate = scale_rate(div, parent_rate); 782 scaled_parent_rate = scale_rate(div, parent_rate);
@@ -802,7 +788,7 @@ static long round_rate(struct ccu_data *ccu, struct bcm_clk_div *div,
802 * the best we can do. 788 * the best we can do.
803 */ 789 */
804 if (!divider_is_fixed(div)) { 790 if (!divider_is_fixed(div)) {
805 best_scaled_div = do_div_round_closest(scaled_parent_rate, 791 best_scaled_div = DIV_ROUND_CLOSEST_ULL(scaled_parent_rate,
806 rate); 792 rate);
807 min_scaled_div = scaled_div_min(div); 793 min_scaled_div = scaled_div_min(div);
808 max_scaled_div = scaled_div_max(div); 794 max_scaled_div = scaled_div_max(div);
@@ -815,7 +801,7 @@ static long round_rate(struct ccu_data *ccu, struct bcm_clk_div *div,
815 } 801 }
816 802
817 /* OK, figure out the resulting rate */ 803 /* OK, figure out the resulting rate */
818 result = do_div_round_closest(scaled_parent_rate, best_scaled_div); 804 result = DIV_ROUND_CLOSEST_ULL(scaled_parent_rate, best_scaled_div);
819 805
820 if (scaled_div) 806 if (scaled_div)
821 *scaled_div = best_scaled_div; 807 *scaled_div = best_scaled_div;
diff --git a/drivers/clk/bcm/clk-kona.h b/drivers/clk/bcm/clk-kona.h
index 2537b3072910..6849a64baf6d 100644
--- a/drivers/clk/bcm/clk-kona.h
+++ b/drivers/clk/bcm/clk-kona.h
@@ -503,7 +503,6 @@ extern struct clk_ops kona_peri_clk_ops;
503 503
504/* Externally visible functions */ 504/* Externally visible functions */
505 505
506extern u64 do_div_round_closest(u64 dividend, unsigned long divisor);
507extern u64 scaled_div_max(struct bcm_clk_div *div); 506extern u64 scaled_div_max(struct bcm_clk_div *div);
508extern u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value, 507extern u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value,
509 u32 billionths); 508 u32 billionths);
diff --git a/drivers/clk/pistachio/Makefile b/drivers/clk/pistachio/Makefile
new file mode 100644
index 000000000000..f1e151fbef65
--- /dev/null
+++ b/drivers/clk/pistachio/Makefile
@@ -0,0 +1,3 @@
1obj-y += clk.o
2obj-y += clk-pll.o
3obj-y += clk-pistachio.o
diff --git a/drivers/clk/pistachio/clk-pistachio.c b/drivers/clk/pistachio/clk-pistachio.c
new file mode 100644
index 000000000000..8c0fe8828f99
--- /dev/null
+++ b/drivers/clk/pistachio/clk-pistachio.c
@@ -0,0 +1,329 @@
1/*
2 * Pistachio SoC clock controllers
3 *
4 * Copyright (C) 2014 Google, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 */
10
11#include <linux/clk-provider.h>
12#include <linux/init.h>
13#include <linux/io.h>
14#include <linux/kernel.h>
15#include <linux/of.h>
16
17#include <dt-bindings/clock/pistachio-clk.h>
18
19#include "clk.h"
20
21static struct pistachio_gate pistachio_gates[] __initdata = {
22 GATE(CLK_MIPS, "mips", "mips_div", 0x104, 0),
23 GATE(CLK_AUDIO_IN, "audio_in", "audio_clk_in_gate", 0x104, 1),
24 GATE(CLK_AUDIO, "audio", "audio_div", 0x104, 2),
25 GATE(CLK_I2S, "i2s", "i2s_div", 0x104, 3),
26 GATE(CLK_SPDIF, "spdif", "spdif_div", 0x104, 4),
27 GATE(CLK_AUDIO_DAC, "audio_dac", "audio_dac_div", 0x104, 5),
28 GATE(CLK_RPU_V, "rpu_v", "rpu_v_div", 0x104, 6),
29 GATE(CLK_RPU_L, "rpu_l", "rpu_l_div", 0x104, 7),
30 GATE(CLK_RPU_SLEEP, "rpu_sleep", "rpu_sleep_div", 0x104, 8),
31 GATE(CLK_WIFI_PLL_GATE, "wifi_pll_gate", "wifi_pll_mux", 0x104, 9),
32 GATE(CLK_RPU_CORE, "rpu_core", "rpu_core_div", 0x104, 10),
33 GATE(CLK_WIFI_ADC, "wifi_adc", "wifi_div8_mux", 0x104, 11),
34 GATE(CLK_WIFI_DAC, "wifi_dac", "wifi_div4_mux", 0x104, 12),
35 GATE(CLK_USB_PHY, "usb_phy", "usb_phy_div", 0x104, 13),
36 GATE(CLK_ENET_IN, "enet_in", "enet_clk_in_gate", 0x104, 14),
37 GATE(CLK_ENET, "enet", "enet_div", 0x104, 15),
38 GATE(CLK_UART0, "uart0", "uart0_div", 0x104, 16),
39 GATE(CLK_UART1, "uart1", "uart1_div", 0x104, 17),
40 GATE(CLK_PERIPH_SYS, "periph_sys", "sys_internal_div", 0x104, 18),
41 GATE(CLK_SPI0, "spi0", "spi0_div", 0x104, 19),
42 GATE(CLK_SPI1, "spi1", "spi1_div", 0x104, 20),
43 GATE(CLK_EVENT_TIMER, "event_timer", "event_timer_div", 0x104, 21),
44 GATE(CLK_AUX_ADC_INTERNAL, "aux_adc_internal", "sys_internal_div",
45 0x104, 22),
46 GATE(CLK_AUX_ADC, "aux_adc", "aux_adc_div", 0x104, 23),
47 GATE(CLK_SD_HOST, "sd_host", "sd_host_div", 0x104, 24),
48 GATE(CLK_BT, "bt", "bt_div", 0x104, 25),
49 GATE(CLK_BT_DIV4, "bt_div4", "bt_div4_div", 0x104, 26),
50 GATE(CLK_BT_DIV8, "bt_div8", "bt_div8_div", 0x104, 27),
51 GATE(CLK_BT_1MHZ, "bt_1mhz", "bt_1mhz_div", 0x104, 28),
52};
53
54static struct pistachio_fixed_factor pistachio_ffs[] __initdata = {
55 FIXED_FACTOR(CLK_WIFI_DIV4, "wifi_div4", "wifi_pll", 4),
56 FIXED_FACTOR(CLK_WIFI_DIV8, "wifi_div8", "wifi_pll", 8),
57};
58
59static struct pistachio_div pistachio_divs[] __initdata = {
60 DIV(CLK_MIPS_INTERNAL_DIV, "mips_internal_div", "mips_pll_mux",
61 0x204, 2),
62 DIV(CLK_MIPS_DIV, "mips_div", "mips_internal_div", 0x208, 8),
63 DIV_F(CLK_AUDIO_DIV, "audio_div", "audio_mux",
64 0x20c, 8, CLK_DIVIDER_ROUND_CLOSEST),
65 DIV_F(CLK_I2S_DIV, "i2s_div", "audio_pll_mux",
66 0x210, 8, CLK_DIVIDER_ROUND_CLOSEST),
67 DIV_F(CLK_SPDIF_DIV, "spdif_div", "audio_pll_mux",
68 0x214, 8, CLK_DIVIDER_ROUND_CLOSEST),
69 DIV_F(CLK_AUDIO_DAC_DIV, "audio_dac_div", "audio_pll_mux",
70 0x218, 8, CLK_DIVIDER_ROUND_CLOSEST),
71 DIV(CLK_RPU_V_DIV, "rpu_v_div", "rpu_v_pll_mux", 0x21c, 2),
72 DIV(CLK_RPU_L_DIV, "rpu_l_div", "rpu_l_mux", 0x220, 2),
73 DIV(CLK_RPU_SLEEP_DIV, "rpu_sleep_div", "xtal", 0x224, 10),
74 DIV(CLK_RPU_CORE_DIV, "rpu_core_div", "rpu_core_mux", 0x228, 3),
75 DIV(CLK_USB_PHY_DIV, "usb_phy_div", "sys_internal_div", 0x22c, 6),
76 DIV(CLK_ENET_DIV, "enet_div", "enet_mux", 0x230, 6),
77 DIV_F(CLK_UART0_INTERNAL_DIV, "uart0_internal_div", "sys_pll_mux",
78 0x234, 3, CLK_DIVIDER_ROUND_CLOSEST),
79 DIV_F(CLK_UART0_DIV, "uart0_div", "uart0_internal_div", 0x238, 10,
80 CLK_DIVIDER_ROUND_CLOSEST),
81 DIV_F(CLK_UART1_INTERNAL_DIV, "uart1_internal_div", "sys_pll_mux",
82 0x23c, 3, CLK_DIVIDER_ROUND_CLOSEST),
83 DIV_F(CLK_UART1_DIV, "uart1_div", "uart1_internal_div", 0x240, 10,
84 CLK_DIVIDER_ROUND_CLOSEST),
85 DIV(CLK_SYS_INTERNAL_DIV, "sys_internal_div", "sys_pll_mux", 0x244, 3),
86 DIV(CLK_SPI0_INTERNAL_DIV, "spi0_internal_div", "sys_pll_mux",
87 0x248, 3),
88 DIV(CLK_SPI0_DIV, "spi0_div", "spi0_internal_div", 0x24c, 7),
89 DIV(CLK_SPI1_INTERNAL_DIV, "spi1_internal_div", "sys_pll_mux",
90 0x250, 3),
91 DIV(CLK_SPI1_DIV, "spi1_div", "spi1_internal_div", 0x254, 7),
92 DIV(CLK_EVENT_TIMER_INTERNAL_DIV, "event_timer_internal_div",
93 "event_timer_mux", 0x258, 3),
94 DIV(CLK_EVENT_TIMER_DIV, "event_timer_div", "event_timer_internal_div",
95 0x25c, 12),
96 DIV(CLK_AUX_ADC_INTERNAL_DIV, "aux_adc_internal_div",
97 "aux_adc_internal", 0x260, 3),
98 DIV(CLK_AUX_ADC_DIV, "aux_adc_div", "aux_adc_internal_div", 0x264, 10),
99 DIV(CLK_SD_HOST_DIV, "sd_host_div", "sd_host_mux", 0x268, 6),
100 DIV(CLK_BT_DIV, "bt_div", "bt_pll_mux", 0x26c, 6),
101 DIV(CLK_BT_DIV4_DIV, "bt_div4_div", "bt_pll_mux", 0x270, 6),
102 DIV(CLK_BT_DIV8_DIV, "bt_div8_div", "bt_pll_mux", 0x274, 6),
103 DIV(CLK_BT_1MHZ_INTERNAL_DIV, "bt_1mhz_internal_div", "bt_pll_mux",
104 0x278, 3),
105 DIV(CLK_BT_1MHZ_DIV, "bt_1mhz_div", "bt_1mhz_internal_div", 0x27c, 10),
106};
107
108PNAME(mux_xtal_audio_refclk) = { "xtal", "audio_clk_in_gate" };
109PNAME(mux_xtal_mips) = { "xtal", "mips_pll" };
110PNAME(mux_xtal_audio) = { "xtal", "audio_pll", "audio_in" };
111PNAME(mux_audio_debug) = { "audio_pll_mux", "debug_mux" };
112PNAME(mux_xtal_rpu_v) = { "xtal", "rpu_v_pll" };
113PNAME(mux_xtal_rpu_l) = { "xtal", "rpu_l_pll" };
114PNAME(mux_rpu_l_mips) = { "rpu_l_pll_mux", "mips_pll_mux" };
115PNAME(mux_xtal_wifi) = { "xtal", "wifi_pll" };
116PNAME(mux_xtal_wifi_div4) = { "xtal", "wifi_div4" };
117PNAME(mux_xtal_wifi_div8) = { "xtal", "wifi_div8" };
118PNAME(mux_wifi_div4_rpu_l) = { "wifi_pll_gate", "wifi_div4_mux",
119 "rpu_l_pll_mux" };
120PNAME(mux_xtal_sys) = { "xtal", "sys_pll" };
121PNAME(mux_sys_enet) = { "sys_internal_div", "enet_in" };
122PNAME(mux_audio_sys) = { "audio_pll_mux", "sys_internal_div" };
123PNAME(mux_sys_bt) = { "sys_internal_div", "bt_pll_mux" };
124PNAME(mux_xtal_bt) = { "xtal", "bt_pll" };
125
126static struct pistachio_mux pistachio_muxes[] __initdata = {
127 MUX(CLK_AUDIO_REF_MUX, "audio_refclk_mux", mux_xtal_audio_refclk,
128 0x200, 0),
129 MUX(CLK_MIPS_PLL_MUX, "mips_pll_mux", mux_xtal_mips, 0x200, 1),
130 MUX(CLK_AUDIO_PLL_MUX, "audio_pll_mux", mux_xtal_audio, 0x200, 2),
131 MUX(CLK_AUDIO_MUX, "audio_mux", mux_audio_debug, 0x200, 4),
132 MUX(CLK_RPU_V_PLL_MUX, "rpu_v_pll_mux", mux_xtal_rpu_v, 0x200, 5),
133 MUX(CLK_RPU_L_PLL_MUX, "rpu_l_pll_mux", mux_xtal_rpu_l, 0x200, 6),
134 MUX(CLK_RPU_L_MUX, "rpu_l_mux", mux_rpu_l_mips, 0x200, 7),
135 MUX(CLK_WIFI_PLL_MUX, "wifi_pll_mux", mux_xtal_wifi, 0x200, 8),
136 MUX(CLK_WIFI_DIV4_MUX, "wifi_div4_mux", mux_xtal_wifi_div4, 0x200, 9),
137 MUX(CLK_WIFI_DIV8_MUX, "wifi_div8_mux", mux_xtal_wifi_div8, 0x200, 10),
138 MUX(CLK_RPU_CORE_MUX, "rpu_core_mux", mux_wifi_div4_rpu_l, 0x200, 11),
139 MUX(CLK_SYS_PLL_MUX, "sys_pll_mux", mux_xtal_sys, 0x200, 13),
140 MUX(CLK_ENET_MUX, "enet_mux", mux_sys_enet, 0x200, 14),
141 MUX(CLK_EVENT_TIMER_MUX, "event_timer_mux", mux_audio_sys, 0x200, 15),
142 MUX(CLK_SD_HOST_MUX, "sd_host_mux", mux_sys_bt, 0x200, 16),
143 MUX(CLK_BT_PLL_MUX, "bt_pll_mux", mux_xtal_bt, 0x200, 17),
144};
145
146static struct pistachio_pll pistachio_plls[] __initdata = {
147 PLL_FIXED(CLK_MIPS_PLL, "mips_pll", "xtal", PLL_GF40LP_LAINT, 0x0),
148 PLL_FIXED(CLK_AUDIO_PLL, "audio_pll", "audio_refclk_mux",
149 PLL_GF40LP_FRAC, 0xc),
150 PLL_FIXED(CLK_RPU_V_PLL, "rpu_v_pll", "xtal", PLL_GF40LP_LAINT, 0x20),
151 PLL_FIXED(CLK_RPU_L_PLL, "rpu_l_pll", "xtal", PLL_GF40LP_LAINT, 0x2c),
152 PLL_FIXED(CLK_SYS_PLL, "sys_pll", "xtal", PLL_GF40LP_FRAC, 0x38),
153 PLL_FIXED(CLK_WIFI_PLL, "wifi_pll", "xtal", PLL_GF40LP_FRAC, 0x4c),
154 PLL_FIXED(CLK_BT_PLL, "bt_pll", "xtal", PLL_GF40LP_LAINT, 0x60),
155};
156
157PNAME(mux_debug) = { "mips_pll_mux", "rpu_v_pll_mux",
158 "rpu_l_pll_mux", "sys_pll_mux",
159 "wifi_pll_mux", "bt_pll_mux" };
160static u32 mux_debug_idx[] = { 0x0, 0x1, 0x2, 0x4, 0x8, 0x10 };
161
162static unsigned int pistachio_critical_clks[] __initdata = {
163 CLK_MIPS,
164 CLK_PERIPH_SYS,
165};
166
167static void __init pistachio_clk_init(struct device_node *np)
168{
169 struct pistachio_clk_provider *p;
170 struct clk *debug_clk;
171
172 p = pistachio_clk_alloc_provider(np, CLK_NR_CLKS);
173 if (!p)
174 return;
175
176 pistachio_clk_register_pll(p, pistachio_plls,
177 ARRAY_SIZE(pistachio_plls));
178 pistachio_clk_register_mux(p, pistachio_muxes,
179 ARRAY_SIZE(pistachio_muxes));
180 pistachio_clk_register_div(p, pistachio_divs,
181 ARRAY_SIZE(pistachio_divs));
182 pistachio_clk_register_fixed_factor(p, pistachio_ffs,
183 ARRAY_SIZE(pistachio_ffs));
184 pistachio_clk_register_gate(p, pistachio_gates,
185 ARRAY_SIZE(pistachio_gates));
186
187 debug_clk = clk_register_mux_table(NULL, "debug_mux", mux_debug,
188 ARRAY_SIZE(mux_debug),
189 CLK_SET_RATE_NO_REPARENT,
190 p->base + 0x200, 18, 0x1f, 0,
191 mux_debug_idx, NULL);
192 p->clk_data.clks[CLK_DEBUG_MUX] = debug_clk;
193
194 pistachio_clk_register_provider(p);
195
196 pistachio_clk_force_enable(p, pistachio_critical_clks,
197 ARRAY_SIZE(pistachio_critical_clks));
198}
199CLK_OF_DECLARE(pistachio_clk, "img,pistachio-clk", pistachio_clk_init);
200
201static struct pistachio_gate pistachio_periph_gates[] __initdata = {
202 GATE(PERIPH_CLK_SYS, "sys", "periph_sys", 0x100, 0),
203 GATE(PERIPH_CLK_SYS_BUS, "bus_sys", "periph_sys", 0x100, 1),
204 GATE(PERIPH_CLK_DDR, "ddr", "periph_sys", 0x100, 2),
205 GATE(PERIPH_CLK_ROM, "rom", "rom_div", 0x100, 3),
206 GATE(PERIPH_CLK_COUNTER_FAST, "counter_fast", "counter_fast_div",
207 0x100, 4),
208 GATE(PERIPH_CLK_COUNTER_SLOW, "counter_slow", "counter_slow_div",
209 0x100, 5),
210 GATE(PERIPH_CLK_IR, "ir", "ir_div", 0x100, 6),
211 GATE(PERIPH_CLK_WD, "wd", "wd_div", 0x100, 7),
212 GATE(PERIPH_CLK_PDM, "pdm", "pdm_div", 0x100, 8),
213 GATE(PERIPH_CLK_PWM, "pwm", "pwm_div", 0x100, 9),
214 GATE(PERIPH_CLK_I2C0, "i2c0", "i2c0_div", 0x100, 10),
215 GATE(PERIPH_CLK_I2C1, "i2c1", "i2c1_div", 0x100, 11),
216 GATE(PERIPH_CLK_I2C2, "i2c2", "i2c2_div", 0x100, 12),
217 GATE(PERIPH_CLK_I2C3, "i2c3", "i2c3_div", 0x100, 13),
218};
219
220static struct pistachio_div pistachio_periph_divs[] __initdata = {
221 DIV(PERIPH_CLK_ROM_DIV, "rom_div", "periph_sys", 0x10c, 7),
222 DIV(PERIPH_CLK_COUNTER_FAST_DIV, "counter_fast_div", "periph_sys",
223 0x110, 7),
224 DIV(PERIPH_CLK_COUNTER_SLOW_PRE_DIV, "counter_slow_pre_div",
225 "periph_sys", 0x114, 7),
226 DIV(PERIPH_CLK_COUNTER_SLOW_DIV, "counter_slow_div",
227 "counter_slow_pre_div", 0x118, 7),
228 DIV_F(PERIPH_CLK_IR_PRE_DIV, "ir_pre_div", "periph_sys", 0x11c, 7,
229 CLK_DIVIDER_ROUND_CLOSEST),
230 DIV_F(PERIPH_CLK_IR_DIV, "ir_div", "ir_pre_div", 0x120, 7,
231 CLK_DIVIDER_ROUND_CLOSEST),
232 DIV_F(PERIPH_CLK_WD_PRE_DIV, "wd_pre_div", "periph_sys", 0x124, 7,
233 CLK_DIVIDER_ROUND_CLOSEST),
234 DIV_F(PERIPH_CLK_WD_DIV, "wd_div", "wd_pre_div", 0x128, 7,
235 CLK_DIVIDER_ROUND_CLOSEST),
236 DIV(PERIPH_CLK_PDM_PRE_DIV, "pdm_pre_div", "periph_sys", 0x12c, 7),
237 DIV(PERIPH_CLK_PDM_DIV, "pdm_div", "pdm_pre_div", 0x130, 7),
238 DIV(PERIPH_CLK_PWM_PRE_DIV, "pwm_pre_div", "periph_sys", 0x134, 7),
239 DIV(PERIPH_CLK_PWM_DIV, "pwm_div", "pwm_pre_div", 0x138, 7),
240 DIV(PERIPH_CLK_I2C0_PRE_DIV, "i2c0_pre_div", "periph_sys", 0x13c, 7),
241 DIV(PERIPH_CLK_I2C0_DIV, "i2c0_div", "i2c0_pre_div", 0x140, 7),
242 DIV(PERIPH_CLK_I2C1_PRE_DIV, "i2c1_pre_div", "periph_sys", 0x144, 7),
243 DIV(PERIPH_CLK_I2C1_DIV, "i2c1_div", "i2c1_pre_div", 0x148, 7),
244 DIV(PERIPH_CLK_I2C2_PRE_DIV, "i2c2_pre_div", "periph_sys", 0x14c, 7),
245 DIV(PERIPH_CLK_I2C2_DIV, "i2c2_div", "i2c2_pre_div", 0x150, 7),
246 DIV(PERIPH_CLK_I2C3_PRE_DIV, "i2c3_pre_div", "periph_sys", 0x154, 7),
247 DIV(PERIPH_CLK_I2C3_DIV, "i2c3_div", "i2c3_pre_div", 0x158, 7),
248};
249
250static void __init pistachio_clk_periph_init(struct device_node *np)
251{
252 struct pistachio_clk_provider *p;
253
254 p = pistachio_clk_alloc_provider(np, PERIPH_CLK_NR_CLKS);
255 if (!p)
256 return;
257
258 pistachio_clk_register_div(p, pistachio_periph_divs,
259 ARRAY_SIZE(pistachio_periph_divs));
260 pistachio_clk_register_gate(p, pistachio_periph_gates,
261 ARRAY_SIZE(pistachio_periph_gates));
262
263 pistachio_clk_register_provider(p);
264}
265CLK_OF_DECLARE(pistachio_clk_periph, "img,pistachio-clk-periph",
266 pistachio_clk_periph_init);
267
268static struct pistachio_gate pistachio_sys_gates[] __initdata = {
269 GATE(SYS_CLK_I2C0, "i2c0_sys", "sys", 0x8, 0),
270 GATE(SYS_CLK_I2C1, "i2c1_sys", "sys", 0x8, 1),
271 GATE(SYS_CLK_I2C2, "i2c2_sys", "sys", 0x8, 2),
272 GATE(SYS_CLK_I2C3, "i2c3_sys", "sys", 0x8, 3),
273 GATE(SYS_CLK_I2S_IN, "i2s_in_sys", "sys", 0x8, 4),
274 GATE(SYS_CLK_PAUD_OUT, "paud_out_sys", "sys", 0x8, 5),
275 GATE(SYS_CLK_SPDIF_OUT, "spdif_out_sys", "sys", 0x8, 6),
276 GATE(SYS_CLK_SPI0_MASTER, "spi0_master_sys", "sys", 0x8, 7),
277 GATE(SYS_CLK_SPI0_SLAVE, "spi0_slave_sys", "sys", 0x8, 8),
278 GATE(SYS_CLK_PWM, "pwm_sys", "sys", 0x8, 9),
279 GATE(SYS_CLK_UART0, "uart0_sys", "sys", 0x8, 10),
280 GATE(SYS_CLK_UART1, "uart1_sys", "sys", 0x8, 11),
281 GATE(SYS_CLK_SPI1, "spi1_sys", "sys", 0x8, 12),
282 GATE(SYS_CLK_MDC, "mdc_sys", "sys", 0x8, 13),
283 GATE(SYS_CLK_SD_HOST, "sd_host_sys", "sys", 0x8, 14),
284 GATE(SYS_CLK_ENET, "enet_sys", "sys", 0x8, 15),
285 GATE(SYS_CLK_IR, "ir_sys", "sys", 0x8, 16),
286 GATE(SYS_CLK_WD, "wd_sys", "sys", 0x8, 17),
287 GATE(SYS_CLK_TIMER, "timer_sys", "sys", 0x8, 18),
288 GATE(SYS_CLK_I2S_OUT, "i2s_out_sys", "sys", 0x8, 24),
289 GATE(SYS_CLK_SPDIF_IN, "spdif_in_sys", "sys", 0x8, 25),
290 GATE(SYS_CLK_EVENT_TIMER, "event_timer_sys", "sys", 0x8, 26),
291 GATE(SYS_CLK_HASH, "hash_sys", "sys", 0x8, 27),
292};
293
294static void __init pistachio_cr_periph_init(struct device_node *np)
295{
296 struct pistachio_clk_provider *p;
297
298 p = pistachio_clk_alloc_provider(np, SYS_CLK_NR_CLKS);
299 if (!p)
300 return;
301
302 pistachio_clk_register_gate(p, pistachio_sys_gates,
303 ARRAY_SIZE(pistachio_sys_gates));
304
305 pistachio_clk_register_provider(p);
306}
307CLK_OF_DECLARE(pistachio_cr_periph, "img,pistachio-cr-periph",
308 pistachio_cr_periph_init);
309
310static struct pistachio_gate pistachio_ext_gates[] __initdata = {
311 GATE(EXT_CLK_ENET_IN, "enet_clk_in_gate", "enet_clk_in", 0x58, 5),
312 GATE(EXT_CLK_AUDIO_IN, "audio_clk_in_gate", "audio_clk_in", 0x58, 8)
313};
314
315static void __init pistachio_cr_top_init(struct device_node *np)
316{
317 struct pistachio_clk_provider *p;
318
319 p = pistachio_clk_alloc_provider(np, EXT_CLK_NR_CLKS);
320 if (!p)
321 return;
322
323 pistachio_clk_register_gate(p, pistachio_ext_gates,
324 ARRAY_SIZE(pistachio_ext_gates));
325
326 pistachio_clk_register_provider(p);
327}
328CLK_OF_DECLARE(pistachio_cr_top, "img,pistachio-cr-top",
329 pistachio_cr_top_init);
diff --git a/drivers/clk/pistachio/clk-pll.c b/drivers/clk/pistachio/clk-pll.c
new file mode 100644
index 000000000000..de537560bf70
--- /dev/null
+++ b/drivers/clk/pistachio/clk-pll.c
@@ -0,0 +1,401 @@
1/*
2 * Copyright (C) 2014 Google, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 */
8
9#include <linux/clk-provider.h>
10#include <linux/io.h>
11#include <linux/kernel.h>
12#include <linux/slab.h>
13
14#include "clk.h"
15
16#define PLL_STATUS 0x0
17#define PLL_STATUS_LOCK BIT(0)
18
19#define PLL_CTRL1 0x4
20#define PLL_CTRL1_REFDIV_SHIFT 0
21#define PLL_CTRL1_REFDIV_MASK 0x3f
22#define PLL_CTRL1_FBDIV_SHIFT 6
23#define PLL_CTRL1_FBDIV_MASK 0xfff
24#define PLL_INT_CTRL1_POSTDIV1_SHIFT 18
25#define PLL_INT_CTRL1_POSTDIV1_MASK 0x7
26#define PLL_INT_CTRL1_POSTDIV2_SHIFT 21
27#define PLL_INT_CTRL1_POSTDIV2_MASK 0x7
28#define PLL_INT_CTRL1_PD BIT(24)
29#define PLL_INT_CTRL1_DSMPD BIT(25)
30#define PLL_INT_CTRL1_FOUTPOSTDIVPD BIT(26)
31#define PLL_INT_CTRL1_FOUTVCOPD BIT(27)
32
33#define PLL_CTRL2 0x8
34#define PLL_FRAC_CTRL2_FRAC_SHIFT 0
35#define PLL_FRAC_CTRL2_FRAC_MASK 0xffffff
36#define PLL_FRAC_CTRL2_POSTDIV1_SHIFT 24
37#define PLL_FRAC_CTRL2_POSTDIV1_MASK 0x7
38#define PLL_FRAC_CTRL2_POSTDIV2_SHIFT 27
39#define PLL_FRAC_CTRL2_POSTDIV2_MASK 0x7
40#define PLL_INT_CTRL2_BYPASS BIT(28)
41
42#define PLL_CTRL3 0xc
43#define PLL_FRAC_CTRL3_PD BIT(0)
44#define PLL_FRAC_CTRL3_DACPD BIT(1)
45#define PLL_FRAC_CTRL3_DSMPD BIT(2)
46#define PLL_FRAC_CTRL3_FOUTPOSTDIVPD BIT(3)
47#define PLL_FRAC_CTRL3_FOUT4PHASEPD BIT(4)
48#define PLL_FRAC_CTRL3_FOUTVCOPD BIT(5)
49
50#define PLL_CTRL4 0x10
51#define PLL_FRAC_CTRL4_BYPASS BIT(28)
52
53struct pistachio_clk_pll {
54 struct clk_hw hw;
55 void __iomem *base;
56 struct pistachio_pll_rate_table *rates;
57 unsigned int nr_rates;
58};
59
60static inline u32 pll_readl(struct pistachio_clk_pll *pll, u32 reg)
61{
62 return readl(pll->base + reg);
63}
64
65static inline void pll_writel(struct pistachio_clk_pll *pll, u32 val, u32 reg)
66{
67 writel(val, pll->base + reg);
68}
69
70static inline u32 do_div_round_closest(u64 dividend, u32 divisor)
71{
72 dividend += divisor / 2;
73 do_div(dividend, divisor);
74
75 return dividend;
76}
77
78static inline struct pistachio_clk_pll *to_pistachio_pll(struct clk_hw *hw)
79{
80 return container_of(hw, struct pistachio_clk_pll, hw);
81}
82
83static struct pistachio_pll_rate_table *
84pll_get_params(struct pistachio_clk_pll *pll, unsigned long fref,
85 unsigned long fout)
86{
87 unsigned int i;
88
89 for (i = 0; i < pll->nr_rates; i++) {
90 if (pll->rates[i].fref == fref && pll->rates[i].fout == fout)
91 return &pll->rates[i];
92 }
93
94 return NULL;
95}
96
97static long pll_round_rate(struct clk_hw *hw, unsigned long rate,
98 unsigned long *parent_rate)
99{
100 struct pistachio_clk_pll *pll = to_pistachio_pll(hw);
101 unsigned int i;
102
103 for (i = 0; i < pll->nr_rates; i++) {
104 if (i > 0 && pll->rates[i].fref == *parent_rate &&
105 pll->rates[i].fout <= rate)
106 return pll->rates[i - 1].fout;
107 }
108
109 return pll->rates[0].fout;
110}
111
112static int pll_gf40lp_frac_enable(struct clk_hw *hw)
113{
114 struct pistachio_clk_pll *pll = to_pistachio_pll(hw);
115 u32 val;
116
117 val = pll_readl(pll, PLL_CTRL3);
118 val &= ~(PLL_FRAC_CTRL3_PD | PLL_FRAC_CTRL3_DACPD |
119 PLL_FRAC_CTRL3_DSMPD | PLL_FRAC_CTRL3_FOUTPOSTDIVPD |
120 PLL_FRAC_CTRL3_FOUT4PHASEPD | PLL_FRAC_CTRL3_FOUTVCOPD);
121 pll_writel(pll, val, PLL_CTRL3);
122
123 val = pll_readl(pll, PLL_CTRL4);
124 val &= ~PLL_FRAC_CTRL4_BYPASS;
125 pll_writel(pll, val, PLL_CTRL4);
126
127 return 0;
128}
129
130static void pll_gf40lp_frac_disable(struct clk_hw *hw)
131{
132 struct pistachio_clk_pll *pll = to_pistachio_pll(hw);
133 u32 val;
134
135 val = pll_readl(pll, PLL_CTRL3);
136 val |= PLL_FRAC_CTRL3_PD;
137 pll_writel(pll, val, PLL_CTRL3);
138}
139
140static int pll_gf40lp_frac_is_enabled(struct clk_hw *hw)
141{
142 struct pistachio_clk_pll *pll = to_pistachio_pll(hw);
143
144 return !(pll_readl(pll, PLL_CTRL3) & PLL_FRAC_CTRL3_PD);
145}
146
147static int pll_gf40lp_frac_set_rate(struct clk_hw *hw, unsigned long rate,
148 unsigned long parent_rate)
149{
150 struct pistachio_clk_pll *pll = to_pistachio_pll(hw);
151 struct pistachio_pll_rate_table *params;
152 bool was_enabled;
153 u32 val;
154
155 params = pll_get_params(pll, parent_rate, rate);
156 if (!params)
157 return -EINVAL;
158
159 was_enabled = pll_gf40lp_frac_is_enabled(hw);
160 if (!was_enabled)
161 pll_gf40lp_frac_enable(hw);
162
163 val = pll_readl(pll, PLL_CTRL1);
164 val &= ~((PLL_CTRL1_REFDIV_MASK << PLL_CTRL1_REFDIV_SHIFT) |
165 (PLL_CTRL1_FBDIV_MASK << PLL_CTRL1_FBDIV_SHIFT));
166 val |= (params->refdiv << PLL_CTRL1_REFDIV_SHIFT) |
167 (params->fbdiv << PLL_CTRL1_FBDIV_SHIFT);
168 pll_writel(pll, val, PLL_CTRL1);
169
170 val = pll_readl(pll, PLL_CTRL2);
171 val &= ~((PLL_FRAC_CTRL2_FRAC_MASK << PLL_FRAC_CTRL2_FRAC_SHIFT) |
172 (PLL_FRAC_CTRL2_POSTDIV1_MASK <<
173 PLL_FRAC_CTRL2_POSTDIV1_SHIFT) |
174 (PLL_FRAC_CTRL2_POSTDIV2_MASK <<
175 PLL_FRAC_CTRL2_POSTDIV2_SHIFT));
176 val |= (params->frac << PLL_FRAC_CTRL2_FRAC_SHIFT) |
177 (params->postdiv1 << PLL_FRAC_CTRL2_POSTDIV1_SHIFT) |
178 (params->postdiv2 << PLL_FRAC_CTRL2_POSTDIV2_SHIFT);
179 pll_writel(pll, val, PLL_CTRL2);
180
181 while (!(pll_readl(pll, PLL_STATUS) & PLL_STATUS_LOCK))
182 cpu_relax();
183
184 if (!was_enabled)
185 pll_gf40lp_frac_disable(hw);
186
187 return 0;
188}
189
190static unsigned long pll_gf40lp_frac_recalc_rate(struct clk_hw *hw,
191 unsigned long parent_rate)
192{
193 struct pistachio_clk_pll *pll = to_pistachio_pll(hw);
194 u32 val, prediv, fbdiv, frac, postdiv1, postdiv2;
195 u64 rate = parent_rate;
196
197 val = pll_readl(pll, PLL_CTRL1);
198 prediv = (val >> PLL_CTRL1_REFDIV_SHIFT) & PLL_CTRL1_REFDIV_MASK;
199 fbdiv = (val >> PLL_CTRL1_FBDIV_SHIFT) & PLL_CTRL1_FBDIV_MASK;
200
201 val = pll_readl(pll, PLL_CTRL2);
202 postdiv1 = (val >> PLL_FRAC_CTRL2_POSTDIV1_SHIFT) &
203 PLL_FRAC_CTRL2_POSTDIV1_MASK;
204 postdiv2 = (val >> PLL_FRAC_CTRL2_POSTDIV2_SHIFT) &
205 PLL_FRAC_CTRL2_POSTDIV2_MASK;
206 frac = (val >> PLL_FRAC_CTRL2_FRAC_SHIFT) & PLL_FRAC_CTRL2_FRAC_MASK;
207
208 rate *= (fbdiv << 24) + frac;
209 rate = do_div_round_closest(rate, (prediv * postdiv1 * postdiv2) << 24);
210
211 return rate;
212}
213
214static struct clk_ops pll_gf40lp_frac_ops = {
215 .enable = pll_gf40lp_frac_enable,
216 .disable = pll_gf40lp_frac_disable,
217 .is_enabled = pll_gf40lp_frac_is_enabled,
218 .recalc_rate = pll_gf40lp_frac_recalc_rate,
219 .round_rate = pll_round_rate,
220 .set_rate = pll_gf40lp_frac_set_rate,
221};
222
223static struct clk_ops pll_gf40lp_frac_fixed_ops = {
224 .enable = pll_gf40lp_frac_enable,
225 .disable = pll_gf40lp_frac_disable,
226 .is_enabled = pll_gf40lp_frac_is_enabled,
227 .recalc_rate = pll_gf40lp_frac_recalc_rate,
228};
229
230static int pll_gf40lp_laint_enable(struct clk_hw *hw)
231{
232 struct pistachio_clk_pll *pll = to_pistachio_pll(hw);
233 u32 val;
234
235 val = pll_readl(pll, PLL_CTRL1);
236 val &= ~(PLL_INT_CTRL1_PD | PLL_INT_CTRL1_DSMPD |
237 PLL_INT_CTRL1_FOUTPOSTDIVPD | PLL_INT_CTRL1_FOUTVCOPD);
238 pll_writel(pll, val, PLL_CTRL1);
239
240 val = pll_readl(pll, PLL_CTRL2);
241 val &= ~PLL_INT_CTRL2_BYPASS;
242 pll_writel(pll, val, PLL_CTRL2);
243
244 return 0;
245}
246
247static void pll_gf40lp_laint_disable(struct clk_hw *hw)
248{
249 struct pistachio_clk_pll *pll = to_pistachio_pll(hw);
250 u32 val;
251
252 val = pll_readl(pll, PLL_CTRL1);
253 val |= PLL_INT_CTRL1_PD;
254 pll_writel(pll, val, PLL_CTRL1);
255}
256
257static int pll_gf40lp_laint_is_enabled(struct clk_hw *hw)
258{
259 struct pistachio_clk_pll *pll = to_pistachio_pll(hw);
260
261 return !(pll_readl(pll, PLL_CTRL1) & PLL_INT_CTRL1_PD);
262}
263
264static int pll_gf40lp_laint_set_rate(struct clk_hw *hw, unsigned long rate,
265 unsigned long parent_rate)
266{
267 struct pistachio_clk_pll *pll = to_pistachio_pll(hw);
268 struct pistachio_pll_rate_table *params;
269 bool was_enabled;
270 u32 val;
271
272 params = pll_get_params(pll, parent_rate, rate);
273 if (!params)
274 return -EINVAL;
275
276 was_enabled = pll_gf40lp_laint_is_enabled(hw);
277 if (!was_enabled)
278 pll_gf40lp_laint_enable(hw);
279
280 val = pll_readl(pll, PLL_CTRL1);
281 val &= ~((PLL_CTRL1_REFDIV_MASK << PLL_CTRL1_REFDIV_SHIFT) |
282 (PLL_CTRL1_FBDIV_MASK << PLL_CTRL1_FBDIV_SHIFT) |
283 (PLL_INT_CTRL1_POSTDIV1_MASK << PLL_INT_CTRL1_POSTDIV1_SHIFT) |
284 (PLL_INT_CTRL1_POSTDIV2_MASK << PLL_INT_CTRL1_POSTDIV2_SHIFT));
285 val |= (params->refdiv << PLL_CTRL1_REFDIV_SHIFT) |
286 (params->fbdiv << PLL_CTRL1_FBDIV_SHIFT) |
287 (params->postdiv1 << PLL_INT_CTRL1_POSTDIV1_SHIFT) |
288 (params->postdiv2 << PLL_INT_CTRL1_POSTDIV2_SHIFT);
289 pll_writel(pll, val, PLL_CTRL1);
290
291 while (!(pll_readl(pll, PLL_STATUS) & PLL_STATUS_LOCK))
292 cpu_relax();
293
294 if (!was_enabled)
295 pll_gf40lp_laint_disable(hw);
296
297 return 0;
298}
299
300static unsigned long pll_gf40lp_laint_recalc_rate(struct clk_hw *hw,
301 unsigned long parent_rate)
302{
303 struct pistachio_clk_pll *pll = to_pistachio_pll(hw);
304 u32 val, prediv, fbdiv, postdiv1, postdiv2;
305 u64 rate = parent_rate;
306
307 val = pll_readl(pll, PLL_CTRL1);
308 prediv = (val >> PLL_CTRL1_REFDIV_SHIFT) & PLL_CTRL1_REFDIV_MASK;
309 fbdiv = (val >> PLL_CTRL1_FBDIV_SHIFT) & PLL_CTRL1_FBDIV_MASK;
310 postdiv1 = (val >> PLL_INT_CTRL1_POSTDIV1_SHIFT) &
311 PLL_INT_CTRL1_POSTDIV1_MASK;
312 postdiv2 = (val >> PLL_INT_CTRL1_POSTDIV2_SHIFT) &
313 PLL_INT_CTRL1_POSTDIV2_MASK;
314
315 rate *= fbdiv;
316 rate = do_div_round_closest(rate, prediv * postdiv1 * postdiv2);
317
318 return rate;
319}
320
321static struct clk_ops pll_gf40lp_laint_ops = {
322 .enable = pll_gf40lp_laint_enable,
323 .disable = pll_gf40lp_laint_disable,
324 .is_enabled = pll_gf40lp_laint_is_enabled,
325 .recalc_rate = pll_gf40lp_laint_recalc_rate,
326 .round_rate = pll_round_rate,
327 .set_rate = pll_gf40lp_laint_set_rate,
328};
329
330static struct clk_ops pll_gf40lp_laint_fixed_ops = {
331 .enable = pll_gf40lp_laint_enable,
332 .disable = pll_gf40lp_laint_disable,
333 .is_enabled = pll_gf40lp_laint_is_enabled,
334 .recalc_rate = pll_gf40lp_laint_recalc_rate,
335};
336
337static struct clk *pll_register(const char *name, const char *parent_name,
338 unsigned long flags, void __iomem *base,
339 enum pistachio_pll_type type,
340 struct pistachio_pll_rate_table *rates,
341 unsigned int nr_rates)
342{
343 struct pistachio_clk_pll *pll;
344 struct clk_init_data init;
345 struct clk *clk;
346
347 pll = kzalloc(sizeof(*pll), GFP_KERNEL);
348 if (!pll)
349 return ERR_PTR(-ENOMEM);
350
351 init.name = name;
352 init.flags = flags | CLK_GET_RATE_NOCACHE;
353 init.parent_names = &parent_name;
354 init.num_parents = 1;
355
356 switch (type) {
357 case PLL_GF40LP_FRAC:
358 if (rates)
359 init.ops = &pll_gf40lp_frac_ops;
360 else
361 init.ops = &pll_gf40lp_frac_fixed_ops;
362 break;
363 case PLL_GF40LP_LAINT:
364 if (rates)
365 init.ops = &pll_gf40lp_laint_ops;
366 else
367 init.ops = &pll_gf40lp_laint_fixed_ops;
368 break;
369 default:
370 pr_err("Unrecognized PLL type %u\n", type);
371 kfree(pll);
372 return ERR_PTR(-EINVAL);
373 }
374
375 pll->hw.init = &init;
376 pll->base = base;
377 pll->rates = rates;
378 pll->nr_rates = nr_rates;
379
380 clk = clk_register(NULL, &pll->hw);
381 if (IS_ERR(clk))
382 kfree(pll);
383
384 return clk;
385}
386
387void pistachio_clk_register_pll(struct pistachio_clk_provider *p,
388 struct pistachio_pll *pll,
389 unsigned int num)
390{
391 struct clk *clk;
392 unsigned int i;
393
394 for (i = 0; i < num; i++) {
395 clk = pll_register(pll[i].name, pll[i].parent,
396 0, p->base + pll[i].reg_base,
397 pll[i].type, pll[i].rates,
398 pll[i].nr_rates);
399 p->clk_data.clks[pll[i].id] = clk;
400 }
401}
diff --git a/drivers/clk/pistachio/clk.c b/drivers/clk/pistachio/clk.c
new file mode 100644
index 000000000000..85faa83e1bd7
--- /dev/null
+++ b/drivers/clk/pistachio/clk.c
@@ -0,0 +1,140 @@
1/*
2 * Copyright (C) 2014 Google, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 */
8
9#include <linux/clk-provider.h>
10#include <linux/kernel.h>
11#include <linux/of.h>
12#include <linux/of_address.h>
13#include <linux/slab.h>
14
15#include "clk.h"
16
17struct pistachio_clk_provider *
18pistachio_clk_alloc_provider(struct device_node *node, unsigned int num_clks)
19{
20 struct pistachio_clk_provider *p;
21
22 p = kzalloc(sizeof(*p), GFP_KERNEL);
23 if (!p)
24 return p;
25
26 p->clk_data.clks = kcalloc(num_clks, sizeof(struct clk *), GFP_KERNEL);
27 if (!p->clk_data.clks)
28 goto free_provider;
29 p->clk_data.clk_num = num_clks;
30 p->node = node;
31 p->base = of_iomap(node, 0);
32 if (!p->base) {
33 pr_err("Failed to map clock provider registers\n");
34 goto free_clks;
35 }
36
37 return p;
38
39free_clks:
40 kfree(p->clk_data.clks);
41free_provider:
42 kfree(p);
43 return NULL;
44}
45
46void pistachio_clk_register_provider(struct pistachio_clk_provider *p)
47{
48 unsigned int i;
49
50 for (i = 0; i < p->clk_data.clk_num; i++) {
51 if (IS_ERR(p->clk_data.clks[i]))
52 pr_warn("Failed to register clock %d: %ld\n", i,
53 PTR_ERR(p->clk_data.clks[i]));
54 }
55
56 of_clk_add_provider(p->node, of_clk_src_onecell_get, &p->clk_data);
57}
58
59void pistachio_clk_register_gate(struct pistachio_clk_provider *p,
60 struct pistachio_gate *gate,
61 unsigned int num)
62{
63 struct clk *clk;
64 unsigned int i;
65
66 for (i = 0; i < num; i++) {
67 clk = clk_register_gate(NULL, gate[i].name, gate[i].parent,
68 CLK_SET_RATE_PARENT,
69 p->base + gate[i].reg, gate[i].shift,
70 0, NULL);
71 p->clk_data.clks[gate[i].id] = clk;
72 }
73}
74
75void pistachio_clk_register_mux(struct pistachio_clk_provider *p,
76 struct pistachio_mux *mux,
77 unsigned int num)
78{
79 struct clk *clk;
80 unsigned int i;
81
82 for (i = 0; i < num; i++) {
83 clk = clk_register_mux(NULL, mux[i].name, mux[i].parents,
84 mux[i].num_parents,
85 CLK_SET_RATE_NO_REPARENT,
86 p->base + mux[i].reg, mux[i].shift,
87 get_count_order(mux[i].num_parents),
88 0, NULL);
89 p->clk_data.clks[mux[i].id] = clk;
90 }
91}
92
93void pistachio_clk_register_div(struct pistachio_clk_provider *p,
94 struct pistachio_div *div,
95 unsigned int num)
96{
97 struct clk *clk;
98 unsigned int i;
99
100 for (i = 0; i < num; i++) {
101 clk = clk_register_divider(NULL, div[i].name, div[i].parent,
102 0, p->base + div[i].reg, 0,
103 div[i].width, div[i].div_flags,
104 NULL);
105 p->clk_data.clks[div[i].id] = clk;
106 }
107}
108
109void pistachio_clk_register_fixed_factor(struct pistachio_clk_provider *p,
110 struct pistachio_fixed_factor *ff,
111 unsigned int num)
112{
113 struct clk *clk;
114 unsigned int i;
115
116 for (i = 0; i < num; i++) {
117 clk = clk_register_fixed_factor(NULL, ff[i].name, ff[i].parent,
118 0, 1, ff[i].div);
119 p->clk_data.clks[ff[i].id] = clk;
120 }
121}
122
123void pistachio_clk_force_enable(struct pistachio_clk_provider *p,
124 unsigned int *clk_ids, unsigned int num)
125{
126 unsigned int i;
127 int err;
128
129 for (i = 0; i < num; i++) {
130 struct clk *clk = p->clk_data.clks[clk_ids[i]];
131
132 if (IS_ERR(clk))
133 continue;
134
135 err = clk_prepare_enable(clk);
136 if (err)
137 pr_err("Failed to enable clock %s: %d\n",
138 __clk_get_name(clk), err);
139 }
140}
diff --git a/drivers/clk/pistachio/clk.h b/drivers/clk/pistachio/clk.h
new file mode 100644
index 000000000000..52fabbc24624
--- /dev/null
+++ b/drivers/clk/pistachio/clk.h
@@ -0,0 +1,174 @@
1/*
2 * Copyright (C) 2014 Google, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 */
8
9#ifndef __PISTACHIO_CLK_H
10#define __PISTACHIO_CLK_H
11
12#include <linux/clk-provider.h>
13
14struct pistachio_gate {
15 unsigned int id;
16 unsigned long reg;
17 unsigned int shift;
18 const char *name;
19 const char *parent;
20};
21
22#define GATE(_id, _name, _pname, _reg, _shift) \
23 { \
24 .id = _id, \
25 .reg = _reg, \
26 .shift = _shift, \
27 .name = _name, \
28 .parent = _pname, \
29 }
30
31struct pistachio_mux {
32 unsigned int id;
33 unsigned long reg;
34 unsigned int shift;
35 unsigned int num_parents;
36 const char *name;
37 const char **parents;
38};
39
40#define PNAME(x) static const char *x[] __initconst
41
42#define MUX(_id, _name, _pnames, _reg, _shift) \
43 { \
44 .id = _id, \
45 .reg = _reg, \
46 .shift = _shift, \
47 .name = _name, \
48 .parents = _pnames, \
49 .num_parents = ARRAY_SIZE(_pnames) \
50 }
51
52
53struct pistachio_div {
54 unsigned int id;
55 unsigned long reg;
56 unsigned int width;
57 unsigned int div_flags;
58 const char *name;
59 const char *parent;
60};
61
62#define DIV(_id, _name, _pname, _reg, _width) \
63 { \
64 .id = _id, \
65 .reg = _reg, \
66 .width = _width, \
67 .div_flags = 0, \
68 .name = _name, \
69 .parent = _pname, \
70 }
71
72#define DIV_F(_id, _name, _pname, _reg, _width, _div_flags) \
73 { \
74 .id = _id, \
75 .reg = _reg, \
76 .width = _width, \
77 .div_flags = _div_flags, \
78 .name = _name, \
79 .parent = _pname, \
80 }
81
82struct pistachio_fixed_factor {
83 unsigned int id;
84 unsigned int div;
85 const char *name;
86 const char *parent;
87};
88
89#define FIXED_FACTOR(_id, _name, _pname, _div) \
90 { \
91 .id = _id, \
92 .div = _div, \
93 .name = _name, \
94 .parent = _pname, \
95 }
96
97struct pistachio_pll_rate_table {
98 unsigned long fref;
99 unsigned long fout;
100 unsigned int refdiv;
101 unsigned int fbdiv;
102 unsigned int postdiv1;
103 unsigned int postdiv2;
104 unsigned int frac;
105};
106
107enum pistachio_pll_type {
108 PLL_GF40LP_LAINT,
109 PLL_GF40LP_FRAC,
110};
111
112struct pistachio_pll {
113 unsigned int id;
114 unsigned long reg_base;
115 enum pistachio_pll_type type;
116 struct pistachio_pll_rate_table *rates;
117 unsigned int nr_rates;
118 const char *name;
119 const char *parent;
120};
121
122#define PLL(_id, _name, _pname, _type, _reg, _rates) \
123 { \
124 .id = _id, \
125 .reg_base = _reg, \
126 .type = _type, \
127 .rates = _rates, \
128 .nr_rates = ARRAY_SIZE(_rates), \
129 .name = _name, \
130 .parent = _pname, \
131 }
132
133#define PLL_FIXED(_id, _name, _pname, _type, _reg) \
134 { \
135 .id = _id, \
136 .reg_base = _reg, \
137 .type = _type, \
138 .rates = NULL, \
139 .nr_rates = 0, \
140 .name = _name, \
141 .parent = _pname, \
142 }
143
144struct pistachio_clk_provider {
145 struct device_node *node;
146 void __iomem *base;
147 struct clk_onecell_data clk_data;
148};
149
150extern struct pistachio_clk_provider *
151pistachio_clk_alloc_provider(struct device_node *node, unsigned int num_clks);
152extern void pistachio_clk_register_provider(struct pistachio_clk_provider *p);
153
154extern void pistachio_clk_register_gate(struct pistachio_clk_provider *p,
155 struct pistachio_gate *gate,
156 unsigned int num);
157extern void pistachio_clk_register_mux(struct pistachio_clk_provider *p,
158 struct pistachio_mux *mux,
159 unsigned int num);
160extern void pistachio_clk_register_div(struct pistachio_clk_provider *p,
161 struct pistachio_div *div,
162 unsigned int num);
163extern void
164pistachio_clk_register_fixed_factor(struct pistachio_clk_provider *p,
165 struct pistachio_fixed_factor *ff,
166 unsigned int num);
167extern void pistachio_clk_register_pll(struct pistachio_clk_provider *p,
168 struct pistachio_pll *pll,
169 unsigned int num);
170
171extern void pistachio_clk_force_enable(struct pistachio_clk_provider *p,
172 unsigned int *clk_ids, unsigned int num);
173
174#endif
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index a0b036ccb118..b4ac7cfae441 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -233,7 +233,7 @@ config CLKSRC_QCOM
233 233
234config CLKSRC_VERSATILE 234config CLKSRC_VERSATILE
235 bool "ARM Versatile (Express) reference platforms clock source" 235 bool "ARM Versatile (Express) reference platforms clock source"
236 depends on GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET 236 depends on PLAT_VERSATILE && GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET
237 select CLKSRC_OF 237 select CLKSRC_OF
238 default y if MFD_VEXPRESS_SYSREG 238 default y if MFD_VEXPRESS_SYSREG
239 help 239 help
diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
index 3bd31b1321f6..b81ed1a5342d 100644
--- a/drivers/clocksource/mips-gic-timer.c
+++ b/drivers/clocksource/mips-gic-timer.c
@@ -5,6 +5,7 @@
5 * 5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved. 6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */ 7 */
8#include <linux/clk.h>
8#include <linux/clockchips.h> 9#include <linux/clockchips.h>
9#include <linux/cpu.h> 10#include <linux/cpu.h>
10#include <linux/init.h> 11#include <linux/init.h>
@@ -133,6 +134,9 @@ static void __init __gic_clocksource_init(void)
133 clocksource_register_hz(&gic_clocksource, gic_frequency); 134 clocksource_register_hz(&gic_clocksource, gic_frequency);
134 135
135 gic_clockevent_init(); 136 gic_clockevent_init();
137
138 /* And finally start the counter */
139 gic_start_count();
136} 140}
137 141
138void __init gic_clocksource_init(unsigned int frequency) 142void __init gic_clocksource_init(unsigned int frequency)
@@ -146,11 +150,18 @@ void __init gic_clocksource_init(unsigned int frequency)
146 150
147static void __init gic_clocksource_of_init(struct device_node *node) 151static void __init gic_clocksource_of_init(struct device_node *node)
148{ 152{
153 struct clk *clk;
154
149 if (WARN_ON(!gic_present || !node->parent || 155 if (WARN_ON(!gic_present || !node->parent ||
150 !of_device_is_compatible(node->parent, "mti,gic"))) 156 !of_device_is_compatible(node->parent, "mti,gic")))
151 return; 157 return;
152 158
153 if (of_property_read_u32(node, "clock-frequency", &gic_frequency)) { 159 clk = of_clk_get(node, 0);
160 if (!IS_ERR(clk)) {
161 gic_frequency = clk_get_rate(clk);
162 clk_put(clk);
163 } else if (of_property_read_u32(node, "clock-frequency",
164 &gic_frequency)) {
154 pr_err("GIC frequency not specified.\n"); 165 pr_err("GIC frequency not specified.\n");
155 return; 166 return;
156 } 167 }
diff --git a/drivers/cpuidle/governors/menu.c b/drivers/cpuidle/governors/menu.c
index 40580794e23d..b8a5fa15ca24 100644
--- a/drivers/cpuidle/governors/menu.c
+++ b/drivers/cpuidle/governors/menu.c
@@ -190,12 +190,6 @@ static DEFINE_PER_CPU(struct menu_device, menu_devices);
190 190
191static void menu_update(struct cpuidle_driver *drv, struct cpuidle_device *dev); 191static void menu_update(struct cpuidle_driver *drv, struct cpuidle_device *dev);
192 192
193/* This implements DIV_ROUND_CLOSEST but avoids 64 bit division */
194static u64 div_round64(u64 dividend, u32 divisor)
195{
196 return div_u64(dividend + (divisor / 2), divisor);
197}
198
199/* 193/*
200 * Try detecting repeating patterns by keeping track of the last 8 194 * Try detecting repeating patterns by keeping track of the last 8
201 * intervals, and checking if the standard deviation of that set 195 * intervals, and checking if the standard deviation of that set
@@ -317,7 +311,7 @@ static int menu_select(struct cpuidle_driver *drv, struct cpuidle_device *dev)
317 * operands are 32 bits. 311 * operands are 32 bits.
318 * Make sure to round up for half microseconds. 312 * Make sure to round up for half microseconds.
319 */ 313 */
320 data->predicted_us = div_round64((uint64_t)data->next_timer_us * 314 data->predicted_us = DIV_ROUND_CLOSEST_ULL((uint64_t)data->next_timer_us *
321 data->correction_factor[data->bucket], 315 data->correction_factor[data->bucket],
322 RESOLUTION * DECAY); 316 RESOLUTION * DECAY);
323 317
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index eef79ccd0b7c..ba243db35840 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -36,9 +36,6 @@
36#include <drm/drm_dp_mst_helper.h> 36#include <drm/drm_dp_mst_helper.h>
37#include <drm/drm_rect.h> 37#include <drm/drm_rect.h>
38 38
39#define DIV_ROUND_CLOSEST_ULL(ll, d) \
40({ unsigned long long _tmp = (ll)+(d)/2; do_div(_tmp, d); _tmp; })
41
42/** 39/**
43 * _wait_for - magic (register) wait macro 40 * _wait_for - magic (register) wait macro
44 * 41 *
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index d8686ce89160..08532d4ffe0a 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -30,6 +30,7 @@
30 30
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32 32
33#include <linux/kernel.h>
33#include <linux/moduleparam.h> 34#include <linux/moduleparam.h>
34#include "intel_drv.h" 35#include "intel_drv.h"
35 36
diff --git a/drivers/hwmon/ina2xx.c b/drivers/hwmon/ina2xx.c
index d1542b7d4bc3..4d2815079fc2 100644
--- a/drivers/hwmon/ina2xx.c
+++ b/drivers/hwmon/ina2xx.c
@@ -36,6 +36,7 @@
36#include <linux/jiffies.h> 36#include <linux/jiffies.h>
37#include <linux/of.h> 37#include <linux/of.h>
38#include <linux/delay.h> 38#include <linux/delay.h>
39#include <linux/util_macros.h>
39 40
40#include <linux/platform_data/ina2xx.h> 41#include <linux/platform_data/ina2xx.h>
41 42
@@ -141,19 +142,6 @@ static const struct ina2xx_config ina2xx_config[] = {
141 */ 142 */
142static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 }; 143static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 };
143 144
144static int ina226_avg_bits(int avg)
145{
146 int i;
147
148 /* Get the closest average from the tab. */
149 for (i = 0; i < ARRAY_SIZE(ina226_avg_tab) - 1; i++) {
150 if (avg <= (ina226_avg_tab[i] + ina226_avg_tab[i + 1]) / 2)
151 break;
152 }
153
154 return i; /* Return 0b0111 for values greater than 1024. */
155}
156
157static int ina226_reg_to_interval(u16 config) 145static int ina226_reg_to_interval(u16 config)
158{ 146{
159 int avg = ina226_avg_tab[INA226_READ_AVG(config)]; 147 int avg = ina226_avg_tab[INA226_READ_AVG(config)];
@@ -171,7 +159,8 @@ static u16 ina226_interval_to_reg(int interval, u16 config)
171 159
172 avg = DIV_ROUND_CLOSEST(interval * 1000, 160 avg = DIV_ROUND_CLOSEST(interval * 1000,
173 INA226_TOTAL_CONV_TIME_DEFAULT); 161 INA226_TOTAL_CONV_TIME_DEFAULT);
174 avg_bits = ina226_avg_bits(avg); 162 avg_bits = find_closest(avg, ina226_avg_tab,
163 ARRAY_SIZE(ina226_avg_tab));
175 164
176 return (config & ~INA226_AVG_RD_MASK) | INA226_SHIFT_AVG(avg_bits); 165 return (config & ~INA226_AVG_RD_MASK) | INA226_SHIFT_AVG(avg_bits);
177} 166}
diff --git a/drivers/hwmon/lm85.c b/drivers/hwmon/lm85.c
index 2b4b419273fe..6ff773fcaefb 100644
--- a/drivers/hwmon/lm85.c
+++ b/drivers/hwmon/lm85.c
@@ -34,6 +34,7 @@
34#include <linux/hwmon-sysfs.h> 34#include <linux/hwmon-sysfs.h>
35#include <linux/err.h> 35#include <linux/err.h>
36#include <linux/mutex.h> 36#include <linux/mutex.h>
37#include <linux/util_macros.h>
37 38
38/* Addresses to scan */ 39/* Addresses to scan */
39static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END }; 40static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END };
@@ -190,15 +191,7 @@ static const int lm85_range_map[] = {
190 191
191static int RANGE_TO_REG(long range) 192static int RANGE_TO_REG(long range)
192{ 193{
193 int i; 194 return find_closest(range, lm85_range_map, ARRAY_SIZE(lm85_range_map));
194
195 /* Find the closest match */
196 for (i = 0; i < 15; ++i) {
197 if (range <= (lm85_range_map[i] + lm85_range_map[i + 1]) / 2)
198 break;
199 }
200
201 return i;
202} 195}
203#define RANGE_FROM_REG(val) lm85_range_map[(val) & 0x0f] 196#define RANGE_FROM_REG(val) lm85_range_map[(val) & 0x0f]
204 197
@@ -209,16 +202,12 @@ static const int lm85_freq_map[8] = { /* 1 Hz */
209static const int adm1027_freq_map[8] = { /* 1 Hz */ 202static const int adm1027_freq_map[8] = { /* 1 Hz */
210 11, 15, 22, 29, 35, 44, 59, 88 203 11, 15, 22, 29, 35, 44, 59, 88
211}; 204};
205#define FREQ_MAP_LEN 8
212 206
213static int FREQ_TO_REG(const int *map, unsigned long freq) 207static int FREQ_TO_REG(const int *map,
208 unsigned int map_size, unsigned long freq)
214{ 209{
215 int i; 210 return find_closest(freq, map, map_size);
216
217 /* Find the closest match */
218 for (i = 0; i < 7; ++i)
219 if (freq <= (map[i] + map[i + 1]) / 2)
220 break;
221 return i;
222} 211}
223 212
224static int FREQ_FROM_REG(const int *map, u8 reg) 213static int FREQ_FROM_REG(const int *map, u8 reg)
@@ -828,7 +817,8 @@ static ssize_t set_pwm_freq(struct device *dev,
828 data->cfg5 &= ~ADT7468_HFPWM; 817 data->cfg5 &= ~ADT7468_HFPWM;
829 lm85_write_value(client, ADT7468_REG_CFG5, data->cfg5); 818 lm85_write_value(client, ADT7468_REG_CFG5, data->cfg5);
830 } else { /* Low freq. mode */ 819 } else { /* Low freq. mode */
831 data->pwm_freq[nr] = FREQ_TO_REG(data->freq_map, val); 820 data->pwm_freq[nr] = FREQ_TO_REG(data->freq_map,
821 FREQ_MAP_LEN, val);
832 lm85_write_value(client, LM85_REG_AFAN_RANGE(nr), 822 lm85_write_value(client, LM85_REG_AFAN_RANGE(nr),
833 (data->zone[nr].range << 4) 823 (data->zone[nr].range << 4)
834 | data->pwm_freq[nr]); 824 | data->pwm_freq[nr]);
diff --git a/drivers/hwmon/w83795.c b/drivers/hwmon/w83795.c
index 21894131190f..49276bbdac3d 100644
--- a/drivers/hwmon/w83795.c
+++ b/drivers/hwmon/w83795.c
@@ -35,6 +35,7 @@
35#include <linux/err.h> 35#include <linux/err.h>
36#include <linux/mutex.h> 36#include <linux/mutex.h>
37#include <linux/jiffies.h> 37#include <linux/jiffies.h>
38#include <linux/util_macros.h>
38 39
39/* Addresses to scan */ 40/* Addresses to scan */
40static const unsigned short normal_i2c[] = { 41static const unsigned short normal_i2c[] = {
@@ -308,11 +309,8 @@ static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
308 unsigned long best0, best1; 309 unsigned long best0, best1;
309 310
310 /* Best fit for cksel = 0 */ 311 /* Best fit for cksel = 0 */
311 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) { 312 reg0 = find_closest_descending(val, pwm_freq_cksel0,
312 if (val > (pwm_freq_cksel0[reg0] + 313 ARRAY_SIZE(pwm_freq_cksel0));
313 pwm_freq_cksel0[reg0 + 1]) / 2)
314 break;
315 }
316 if (val < 375) /* cksel = 1 can't beat this */ 314 if (val < 375) /* cksel = 1 can't beat this */
317 return reg0; 315 return reg0;
318 best0 = pwm_freq_cksel0[reg0]; 316 best0 = pwm_freq_cksel0[reg0];
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index c8d260e33a90..6de62a96e79c 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -60,6 +60,11 @@ config ATMEL_AIC5_IRQ
60 select MULTI_IRQ_HANDLER 60 select MULTI_IRQ_HANDLER
61 select SPARSE_IRQ 61 select SPARSE_IRQ
62 62
63config BCM7038_L1_IRQ
64 bool
65 select GENERIC_IRQ_CHIP
66 select IRQ_DOMAIN
67
63config BCM7120_L2_IRQ 68config BCM7120_L2_IRQ
64 bool 69 bool
65 select GENERIC_IRQ_CHIP 70 select GENERIC_IRQ_CHIP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 552a74027601..dda4927e47a6 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_XTENSA) += irq-xtensa-pic.o
40obj-$(CONFIG_XTENSA_MX) += irq-xtensa-mx.o 40obj-$(CONFIG_XTENSA_MX) += irq-xtensa-mx.o
41obj-$(CONFIG_IRQ_CROSSBAR) += irq-crossbar.o 41obj-$(CONFIG_IRQ_CROSSBAR) += irq-crossbar.o
42obj-$(CONFIG_SOC_VF610) += irq-vf610-mscm-ir.o 42obj-$(CONFIG_SOC_VF610) += irq-vf610-mscm-ir.o
43obj-$(CONFIG_BCM7038_L1_IRQ) += irq-bcm7038-l1.o
43obj-$(CONFIG_BCM7120_L2_IRQ) += irq-bcm7120-l2.o 44obj-$(CONFIG_BCM7120_L2_IRQ) += irq-bcm7120-l2.o
44obj-$(CONFIG_BRCMSTB_L2_IRQ) += irq-brcmstb-l2.o 45obj-$(CONFIG_BRCMSTB_L2_IRQ) += irq-brcmstb-l2.o
45obj-$(CONFIG_KEYSTONE_IRQ) += irq-keystone.o 46obj-$(CONFIG_KEYSTONE_IRQ) += irq-keystone.o
diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c
new file mode 100644
index 000000000000..d3b8c8be15f6
--- /dev/null
+++ b/drivers/irqchip/irq-bcm7038-l1.c
@@ -0,0 +1,335 @@
1/*
2 * Broadcom BCM7038 style Level 1 interrupt controller driver
3 *
4 * Copyright (C) 2014 Broadcom Corporation
5 * Author: Kevin Cernekee
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
14#include <linux/bitops.h>
15#include <linux/kconfig.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/interrupt.h>
19#include <linux/io.h>
20#include <linux/ioport.h>
21#include <linux/irq.h>
22#include <linux/irqdomain.h>
23#include <linux/module.h>
24#include <linux/of.h>
25#include <linux/of_irq.h>
26#include <linux/of_address.h>
27#include <linux/of_platform.h>
28#include <linux/platform_device.h>
29#include <linux/slab.h>
30#include <linux/smp.h>
31#include <linux/types.h>
32#include <linux/irqchip/chained_irq.h>
33
34#include "irqchip.h"
35
36#define IRQS_PER_WORD 32
37#define REG_BYTES_PER_IRQ_WORD (sizeof(u32) * 4)
38#define MAX_WORDS 8
39
40struct bcm7038_l1_cpu;
41
42struct bcm7038_l1_chip {
43 raw_spinlock_t lock;
44 unsigned int n_words;
45 struct irq_domain *domain;
46 struct bcm7038_l1_cpu *cpus[NR_CPUS];
47 u8 affinity[MAX_WORDS * IRQS_PER_WORD];
48};
49
50struct bcm7038_l1_cpu {
51 void __iomem *map_base;
52 u32 mask_cache[0];
53};
54
55/*
56 * STATUS/MASK_STATUS/MASK_SET/MASK_CLEAR are packed one right after another:
57 *
58 * 7038:
59 * 0x1000_1400: W0_STATUS
60 * 0x1000_1404: W1_STATUS
61 * 0x1000_1408: W0_MASK_STATUS
62 * 0x1000_140c: W1_MASK_STATUS
63 * 0x1000_1410: W0_MASK_SET
64 * 0x1000_1414: W1_MASK_SET
65 * 0x1000_1418: W0_MASK_CLEAR
66 * 0x1000_141c: W1_MASK_CLEAR
67 *
68 * 7445:
69 * 0xf03e_1500: W0_STATUS
70 * 0xf03e_1504: W1_STATUS
71 * 0xf03e_1508: W2_STATUS
72 * 0xf03e_150c: W3_STATUS
73 * 0xf03e_1510: W4_STATUS
74 * 0xf03e_1514: W0_MASK_STATUS
75 * 0xf03e_1518: W1_MASK_STATUS
76 * [...]
77 */
78
79static inline unsigned int reg_status(struct bcm7038_l1_chip *intc,
80 unsigned int word)
81{
82 return (0 * intc->n_words + word) * sizeof(u32);
83}
84
85static inline unsigned int reg_mask_status(struct bcm7038_l1_chip *intc,
86 unsigned int word)
87{
88 return (1 * intc->n_words + word) * sizeof(u32);
89}
90
91static inline unsigned int reg_mask_set(struct bcm7038_l1_chip *intc,
92 unsigned int word)
93{
94 return (2 * intc->n_words + word) * sizeof(u32);
95}
96
97static inline unsigned int reg_mask_clr(struct bcm7038_l1_chip *intc,
98 unsigned int word)
99{
100 return (3 * intc->n_words + word) * sizeof(u32);
101}
102
103static inline u32 l1_readl(void __iomem *reg)
104{
105 if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
106 return ioread32be(reg);
107 else
108 return readl(reg);
109}
110
111static inline void l1_writel(u32 val, void __iomem *reg)
112{
113 if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
114 iowrite32be(val, reg);
115 else
116 writel(val, reg);
117}
118
119static void bcm7038_l1_irq_handle(unsigned int irq, struct irq_desc *desc)
120{
121 struct bcm7038_l1_chip *intc = irq_desc_get_handler_data(desc);
122 struct bcm7038_l1_cpu *cpu;
123 struct irq_chip *chip = irq_desc_get_chip(desc);
124 unsigned int idx;
125
126#ifdef CONFIG_SMP
127 cpu = intc->cpus[cpu_logical_map(smp_processor_id())];
128#else
129 cpu = intc->cpus[0];
130#endif
131
132 chained_irq_enter(chip, desc);
133
134 for (idx = 0; idx < intc->n_words; idx++) {
135 int base = idx * IRQS_PER_WORD;
136 unsigned long pending, flags;
137 int hwirq;
138
139 raw_spin_lock_irqsave(&intc->lock, flags);
140 pending = l1_readl(cpu->map_base + reg_status(intc, idx)) &
141 ~cpu->mask_cache[idx];
142 raw_spin_unlock_irqrestore(&intc->lock, flags);
143
144 for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) {
145 generic_handle_irq(irq_find_mapping(intc->domain,
146 base + hwirq));
147 }
148 }
149
150 chained_irq_exit(chip, desc);
151}
152
153static void __bcm7038_l1_unmask(struct irq_data *d, unsigned int cpu_idx)
154{
155 struct bcm7038_l1_chip *intc = irq_data_get_irq_chip_data(d);
156 u32 word = d->hwirq / IRQS_PER_WORD;
157 u32 mask = BIT(d->hwirq % IRQS_PER_WORD);
158
159 intc->cpus[cpu_idx]->mask_cache[word] &= ~mask;
160 l1_writel(mask, intc->cpus[cpu_idx]->map_base +
161 reg_mask_clr(intc, word));
162}
163
164static void __bcm7038_l1_mask(struct irq_data *d, unsigned int cpu_idx)
165{
166 struct bcm7038_l1_chip *intc = irq_data_get_irq_chip_data(d);
167 u32 word = d->hwirq / IRQS_PER_WORD;
168 u32 mask = BIT(d->hwirq % IRQS_PER_WORD);
169
170 intc->cpus[cpu_idx]->mask_cache[word] |= mask;
171 l1_writel(mask, intc->cpus[cpu_idx]->map_base +
172 reg_mask_set(intc, word));
173}
174
175static void bcm7038_l1_unmask(struct irq_data *d)
176{
177 struct bcm7038_l1_chip *intc = irq_data_get_irq_chip_data(d);
178 unsigned long flags;
179
180 raw_spin_lock_irqsave(&intc->lock, flags);
181 __bcm7038_l1_unmask(d, intc->affinity[d->hwirq]);
182 raw_spin_unlock_irqrestore(&intc->lock, flags);
183}
184
185static void bcm7038_l1_mask(struct irq_data *d)
186{
187 struct bcm7038_l1_chip *intc = irq_data_get_irq_chip_data(d);
188 unsigned long flags;
189
190 raw_spin_lock_irqsave(&intc->lock, flags);
191 __bcm7038_l1_mask(d, intc->affinity[d->hwirq]);
192 raw_spin_unlock_irqrestore(&intc->lock, flags);
193}
194
195static int bcm7038_l1_set_affinity(struct irq_data *d,
196 const struct cpumask *dest,
197 bool force)
198{
199 struct bcm7038_l1_chip *intc = irq_data_get_irq_chip_data(d);
200 unsigned long flags;
201 irq_hw_number_t hw = d->hwirq;
202 u32 word = hw / IRQS_PER_WORD;
203 u32 mask = BIT(hw % IRQS_PER_WORD);
204 unsigned int first_cpu = cpumask_any_and(dest, cpu_online_mask);
205 bool was_disabled;
206
207 raw_spin_lock_irqsave(&intc->lock, flags);
208
209 was_disabled = !!(intc->cpus[intc->affinity[hw]]->mask_cache[word] &
210 mask);
211 __bcm7038_l1_mask(d, intc->affinity[hw]);
212 intc->affinity[hw] = first_cpu;
213 if (!was_disabled)
214 __bcm7038_l1_unmask(d, first_cpu);
215
216 raw_spin_unlock_irqrestore(&intc->lock, flags);
217 return 0;
218}
219
220static int __init bcm7038_l1_init_one(struct device_node *dn,
221 unsigned int idx,
222 struct bcm7038_l1_chip *intc)
223{
224 struct resource res;
225 resource_size_t sz;
226 struct bcm7038_l1_cpu *cpu;
227 unsigned int i, n_words, parent_irq;
228
229 if (of_address_to_resource(dn, idx, &res))
230 return -EINVAL;
231 sz = resource_size(&res);
232 n_words = sz / REG_BYTES_PER_IRQ_WORD;
233
234 if (n_words > MAX_WORDS)
235 return -EINVAL;
236 else if (!intc->n_words)
237 intc->n_words = n_words;
238 else if (intc->n_words != n_words)
239 return -EINVAL;
240
241 cpu = intc->cpus[idx] = kzalloc(sizeof(*cpu) + n_words * sizeof(u32),
242 GFP_KERNEL);
243 if (!cpu)
244 return -ENOMEM;
245
246 cpu->map_base = ioremap(res.start, sz);
247 if (!cpu->map_base)
248 return -ENOMEM;
249
250 for (i = 0; i < n_words; i++) {
251 l1_writel(0xffffffff, cpu->map_base + reg_mask_set(intc, i));
252 cpu->mask_cache[i] = 0xffffffff;
253 }
254
255 parent_irq = irq_of_parse_and_map(dn, idx);
256 if (!parent_irq) {
257 pr_err("failed to map parent interrupt %d\n", parent_irq);
258 return -EINVAL;
259 }
260 irq_set_handler_data(parent_irq, intc);
261 irq_set_chained_handler(parent_irq, bcm7038_l1_irq_handle);
262
263 return 0;
264}
265
266static struct irq_chip bcm7038_l1_irq_chip = {
267 .name = "bcm7038-l1",
268 .irq_mask = bcm7038_l1_mask,
269 .irq_unmask = bcm7038_l1_unmask,
270 .irq_set_affinity = bcm7038_l1_set_affinity,
271};
272
273static int bcm7038_l1_map(struct irq_domain *d, unsigned int virq,
274 irq_hw_number_t hw_irq)
275{
276 irq_set_chip_and_handler(virq, &bcm7038_l1_irq_chip, handle_level_irq);
277 irq_set_chip_data(virq, d->host_data);
278 return 0;
279}
280
281static const struct irq_domain_ops bcm7038_l1_domain_ops = {
282 .xlate = irq_domain_xlate_onecell,
283 .map = bcm7038_l1_map,
284};
285
286int __init bcm7038_l1_of_init(struct device_node *dn,
287 struct device_node *parent)
288{
289 struct bcm7038_l1_chip *intc;
290 int idx, ret;
291
292 intc = kzalloc(sizeof(*intc), GFP_KERNEL);
293 if (!intc)
294 return -ENOMEM;
295
296 raw_spin_lock_init(&intc->lock);
297 for_each_possible_cpu(idx) {
298 ret = bcm7038_l1_init_one(dn, idx, intc);
299 if (ret < 0) {
300 if (idx)
301 break;
302 pr_err("failed to remap intc L1 registers\n");
303 goto out_free;
304 }
305 }
306
307 intc->domain = irq_domain_add_linear(dn, IRQS_PER_WORD * intc->n_words,
308 &bcm7038_l1_domain_ops,
309 intc);
310 if (!intc->domain) {
311 ret = -ENOMEM;
312 goto out_unmap;
313 }
314
315 pr_info("registered BCM7038 L1 intc (mem: 0x%p, IRQs: %d)\n",
316 intc->cpus[0]->map_base, IRQS_PER_WORD * intc->n_words);
317
318 return 0;
319
320out_unmap:
321 for_each_possible_cpu(idx) {
322 struct bcm7038_l1_cpu *cpu = intc->cpus[idx];
323
324 if (cpu) {
325 if (cpu->map_base)
326 iounmap(cpu->map_base);
327 kfree(cpu);
328 }
329 }
330out_free:
331 kfree(intc);
332 return ret;
333}
334
335IRQCHIP_DECLARE(bcm7038_l1, "brcm,bcm7038-l1-intc", bcm7038_l1_of_init);
diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c
index 8eec8e1201d9..3ba5cc780fcb 100644
--- a/drivers/irqchip/irq-bcm7120-l2.c
+++ b/drivers/irqchip/irq-bcm7120-l2.c
@@ -14,6 +14,7 @@
14#include <linux/slab.h> 14#include <linux/slab.h>
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/kconfig.h> 16#include <linux/kconfig.h>
17#include <linux/kernel.h>
17#include <linux/platform_device.h> 18#include <linux/platform_device.h>
18#include <linux/of.h> 19#include <linux/of.h>
19#include <linux/of_irq.h> 20#include <linux/of_irq.h>
@@ -34,15 +35,21 @@
34#define IRQSTAT 0x04 35#define IRQSTAT 0x04
35 36
36#define MAX_WORDS 4 37#define MAX_WORDS 4
38#define MAX_MAPPINGS (MAX_WORDS * 2)
37#define IRQS_PER_WORD 32 39#define IRQS_PER_WORD 32
38 40
39struct bcm7120_l2_intc_data { 41struct bcm7120_l2_intc_data {
40 unsigned int n_words; 42 unsigned int n_words;
41 void __iomem *base[MAX_WORDS]; 43 void __iomem *map_base[MAX_MAPPINGS];
44 void __iomem *pair_base[MAX_WORDS];
45 int en_offset[MAX_WORDS];
46 int stat_offset[MAX_WORDS];
42 struct irq_domain *domain; 47 struct irq_domain *domain;
43 bool can_wake; 48 bool can_wake;
44 u32 irq_fwd_mask[MAX_WORDS]; 49 u32 irq_fwd_mask[MAX_WORDS];
45 u32 irq_map_mask[MAX_WORDS]; 50 u32 irq_map_mask[MAX_WORDS];
51 int num_parent_irqs;
52 const __be32 *map_mask_prop;
46}; 53};
47 54
48static void bcm7120_l2_intc_irq_handle(unsigned int irq, struct irq_desc *desc) 55static void bcm7120_l2_intc_irq_handle(unsigned int irq, struct irq_desc *desc)
@@ -61,7 +68,8 @@ static void bcm7120_l2_intc_irq_handle(unsigned int irq, struct irq_desc *desc)
61 int hwirq; 68 int hwirq;
62 69
63 irq_gc_lock(gc); 70 irq_gc_lock(gc);
64 pending = irq_reg_readl(gc, IRQSTAT) & gc->mask_cache; 71 pending = irq_reg_readl(gc, b->stat_offset[idx]) &
72 gc->mask_cache;
65 irq_gc_unlock(gc); 73 irq_gc_unlock(gc);
66 74
67 for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) { 75 for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) {
@@ -76,27 +84,30 @@ static void bcm7120_l2_intc_irq_handle(unsigned int irq, struct irq_desc *desc)
76static void bcm7120_l2_intc_suspend(struct irq_data *d) 84static void bcm7120_l2_intc_suspend(struct irq_data *d)
77{ 85{
78 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); 86 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
87 struct irq_chip_type *ct = irq_data_get_chip_type(d);
79 struct bcm7120_l2_intc_data *b = gc->private; 88 struct bcm7120_l2_intc_data *b = gc->private;
80 89
81 irq_gc_lock(gc); 90 irq_gc_lock(gc);
82 if (b->can_wake) 91 if (b->can_wake)
83 irq_reg_writel(gc, gc->mask_cache | gc->wake_active, IRQEN); 92 irq_reg_writel(gc, gc->mask_cache | gc->wake_active,
93 ct->regs.mask);
84 irq_gc_unlock(gc); 94 irq_gc_unlock(gc);
85} 95}
86 96
87static void bcm7120_l2_intc_resume(struct irq_data *d) 97static void bcm7120_l2_intc_resume(struct irq_data *d)
88{ 98{
89 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); 99 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
100 struct irq_chip_type *ct = irq_data_get_chip_type(d);
90 101
91 /* Restore the saved mask */ 102 /* Restore the saved mask */
92 irq_gc_lock(gc); 103 irq_gc_lock(gc);
93 irq_reg_writel(gc, gc->mask_cache, IRQEN); 104 irq_reg_writel(gc, gc->mask_cache, ct->regs.mask);
94 irq_gc_unlock(gc); 105 irq_gc_unlock(gc);
95} 106}
96 107
97static int bcm7120_l2_intc_init_one(struct device_node *dn, 108static int bcm7120_l2_intc_init_one(struct device_node *dn,
98 struct bcm7120_l2_intc_data *data, 109 struct bcm7120_l2_intc_data *data,
99 int irq, const __be32 *map_mask) 110 int irq)
100{ 111{
101 int parent_irq; 112 int parent_irq;
102 unsigned int idx; 113 unsigned int idx;
@@ -110,9 +121,15 @@ static int bcm7120_l2_intc_init_one(struct device_node *dn,
110 /* For multiple parent IRQs with multiple words, this looks like: 121 /* For multiple parent IRQs with multiple words, this looks like:
111 * <irq0_w0 irq0_w1 irq1_w0 irq1_w1 ...> 122 * <irq0_w0 irq0_w1 irq1_w0 irq1_w1 ...>
112 */ 123 */
113 for (idx = 0; idx < data->n_words; idx++) 124 for (idx = 0; idx < data->n_words; idx++) {
114 data->irq_map_mask[idx] |= 125 if (data->map_mask_prop) {
115 be32_to_cpup(map_mask + irq * data->n_words + idx); 126 data->irq_map_mask[idx] |=
127 be32_to_cpup(data->map_mask_prop +
128 irq * data->n_words + idx);
129 } else {
130 data->irq_map_mask[idx] = 0xffffffff;
131 }
132 }
116 133
117 irq_set_handler_data(parent_irq, data); 134 irq_set_handler_data(parent_irq, data);
118 irq_set_chained_handler(parent_irq, bcm7120_l2_intc_irq_handle); 135 irq_set_chained_handler(parent_irq, bcm7120_l2_intc_irq_handle);
@@ -120,68 +137,107 @@ static int bcm7120_l2_intc_init_one(struct device_node *dn,
120 return 0; 137 return 0;
121} 138}
122 139
123int __init bcm7120_l2_intc_of_init(struct device_node *dn, 140static int __init bcm7120_l2_intc_iomap_7120(struct device_node *dn,
124 struct device_node *parent) 141 struct bcm7120_l2_intc_data *data)
142{
143 int ret;
144
145 data->map_base[0] = of_iomap(dn, 0);
146 if (!data->map_base[0]) {
147 pr_err("unable to map registers\n");
148 return -ENOMEM;
149 }
150
151 data->pair_base[0] = data->map_base[0];
152 data->en_offset[0] = IRQEN;
153 data->stat_offset[0] = IRQSTAT;
154 data->n_words = 1;
155
156 ret = of_property_read_u32_array(dn, "brcm,int-fwd-mask",
157 data->irq_fwd_mask, data->n_words);
158 if (ret != 0 && ret != -EINVAL) {
159 /* property exists but has the wrong number of words */
160 pr_err("invalid brcm,int-fwd-mask property\n");
161 return -EINVAL;
162 }
163
164 data->map_mask_prop = of_get_property(dn, "brcm,int-map-mask", &ret);
165 if (!data->map_mask_prop ||
166 (ret != (sizeof(__be32) * data->num_parent_irqs * data->n_words))) {
167 pr_err("invalid brcm,int-map-mask property\n");
168 return -EINVAL;
169 }
170
171 return 0;
172}
173
174static int __init bcm7120_l2_intc_iomap_3380(struct device_node *dn,
175 struct bcm7120_l2_intc_data *data)
176{
177 unsigned int gc_idx;
178
179 for (gc_idx = 0; gc_idx < MAX_WORDS; gc_idx++) {
180 unsigned int map_idx = gc_idx * 2;
181 void __iomem *en = of_iomap(dn, map_idx + 0);
182 void __iomem *stat = of_iomap(dn, map_idx + 1);
183 void __iomem *base = min(en, stat);
184
185 data->map_base[map_idx + 0] = en;
186 data->map_base[map_idx + 1] = stat;
187
188 if (!base)
189 break;
190
191 data->pair_base[gc_idx] = base;
192 data->en_offset[gc_idx] = en - base;
193 data->stat_offset[gc_idx] = stat - base;
194 }
195
196 if (!gc_idx) {
197 pr_err("unable to map registers\n");
198 return -EINVAL;
199 }
200
201 data->n_words = gc_idx;
202 return 0;
203}
204
205int __init bcm7120_l2_intc_probe(struct device_node *dn,
206 struct device_node *parent,
207 int (*iomap_regs_fn)(struct device_node *,
208 struct bcm7120_l2_intc_data *),
209 const char *intc_name)
125{ 210{
126 unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; 211 unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
127 struct bcm7120_l2_intc_data *data; 212 struct bcm7120_l2_intc_data *data;
128 struct irq_chip_generic *gc; 213 struct irq_chip_generic *gc;
129 struct irq_chip_type *ct; 214 struct irq_chip_type *ct;
130 const __be32 *map_mask; 215 int ret = 0;
131 int num_parent_irqs;
132 int ret = 0, len;
133 unsigned int idx, irq, flags; 216 unsigned int idx, irq, flags;
134 217
135 data = kzalloc(sizeof(*data), GFP_KERNEL); 218 data = kzalloc(sizeof(*data), GFP_KERNEL);
136 if (!data) 219 if (!data)
137 return -ENOMEM; 220 return -ENOMEM;
138 221
139 for (idx = 0; idx < MAX_WORDS; idx++) { 222 data->num_parent_irqs = of_irq_count(dn);
140 data->base[idx] = of_iomap(dn, idx); 223 if (data->num_parent_irqs <= 0) {
141 if (!data->base[idx])
142 break;
143 data->n_words = idx + 1;
144 }
145 if (!data->n_words) {
146 pr_err("failed to remap intc L2 registers\n");
147 ret = -ENOMEM;
148 goto out_unmap;
149 }
150
151 /* Enable all interrupts specified in the interrupt forward mask;
152 * disable all others. If the property doesn't exist (-EINVAL),
153 * assume all zeroes.
154 */
155 ret = of_property_read_u32_array(dn, "brcm,int-fwd-mask",
156 data->irq_fwd_mask, data->n_words);
157 if (ret == 0 || ret == -EINVAL) {
158 for (idx = 0; idx < data->n_words; idx++)
159 __raw_writel(data->irq_fwd_mask[idx],
160 data->base[idx] + IRQEN);
161 } else {
162 /* property exists but has the wrong number of words */
163 pr_err("invalid int-fwd-mask property\n");
164 ret = -EINVAL;
165 goto out_unmap;
166 }
167
168 num_parent_irqs = of_irq_count(dn);
169 if (num_parent_irqs <= 0) {
170 pr_err("invalid number of parent interrupts\n"); 224 pr_err("invalid number of parent interrupts\n");
171 ret = -ENOMEM; 225 ret = -ENOMEM;
172 goto out_unmap; 226 goto out_unmap;
173 } 227 }
174 228
175 map_mask = of_get_property(dn, "brcm,int-map-mask", &len); 229 ret = iomap_regs_fn(dn, data);
176 if (!map_mask || 230 if (ret < 0)
177 (len != (sizeof(*map_mask) * num_parent_irqs * data->n_words))) {
178 pr_err("invalid brcm,int-map-mask property\n");
179 ret = -EINVAL;
180 goto out_unmap; 231 goto out_unmap;
232
233 for (idx = 0; idx < data->n_words; idx++) {
234 __raw_writel(data->irq_fwd_mask[idx],
235 data->pair_base[idx] +
236 data->en_offset[idx]);
181 } 237 }
182 238
183 for (irq = 0; irq < num_parent_irqs; irq++) { 239 for (irq = 0; irq < data->num_parent_irqs; irq++) {
184 ret = bcm7120_l2_intc_init_one(dn, data, irq, map_mask); 240 ret = bcm7120_l2_intc_init_one(dn, data, irq);
185 if (ret) 241 if (ret)
186 goto out_unmap; 242 goto out_unmap;
187 } 243 }
@@ -215,11 +271,12 @@ int __init bcm7120_l2_intc_of_init(struct device_node *dn,
215 gc = irq_get_domain_generic_chip(data->domain, irq); 271 gc = irq_get_domain_generic_chip(data->domain, irq);
216 272
217 gc->unused = 0xffffffff & ~data->irq_map_mask[idx]; 273 gc->unused = 0xffffffff & ~data->irq_map_mask[idx];
218 gc->reg_base = data->base[idx];
219 gc->private = data; 274 gc->private = data;
220 ct = gc->chip_types; 275 ct = gc->chip_types;
221 276
222 ct->regs.mask = IRQEN; 277 gc->reg_base = data->pair_base[idx];
278 ct->regs.mask = data->en_offset[idx];
279
223 ct->chip.irq_mask = irq_gc_mask_clr_bit; 280 ct->chip.irq_mask = irq_gc_mask_clr_bit;
224 ct->chip.irq_unmask = irq_gc_mask_set_bit; 281 ct->chip.irq_unmask = irq_gc_mask_set_bit;
225 ct->chip.irq_ack = irq_gc_noop; 282 ct->chip.irq_ack = irq_gc_noop;
@@ -236,20 +293,38 @@ int __init bcm7120_l2_intc_of_init(struct device_node *dn,
236 } 293 }
237 } 294 }
238 295
239 pr_info("registered BCM7120 L2 intc (mem: 0x%p, parent IRQ(s): %d)\n", 296 pr_info("registered %s intc (mem: 0x%p, parent IRQ(s): %d)\n",
240 data->base[0], num_parent_irqs); 297 intc_name, data->map_base[0], data->num_parent_irqs);
241 298
242 return 0; 299 return 0;
243 300
244out_free_domain: 301out_free_domain:
245 irq_domain_remove(data->domain); 302 irq_domain_remove(data->domain);
246out_unmap: 303out_unmap:
247 for (idx = 0; idx < MAX_WORDS; idx++) { 304 for (idx = 0; idx < MAX_MAPPINGS; idx++) {
248 if (data->base[idx]) 305 if (data->map_base[idx])
249 iounmap(data->base[idx]); 306 iounmap(data->map_base[idx]);
250 } 307 }
251 kfree(data); 308 kfree(data);
252 return ret; 309 return ret;
253} 310}
311
312int __init bcm7120_l2_intc_probe_7120(struct device_node *dn,
313 struct device_node *parent)
314{
315 return bcm7120_l2_intc_probe(dn, parent, bcm7120_l2_intc_iomap_7120,
316 "BCM7120 L2");
317}
318
319int __init bcm7120_l2_intc_probe_3380(struct device_node *dn,
320 struct device_node *parent)
321{
322 return bcm7120_l2_intc_probe(dn, parent, bcm7120_l2_intc_iomap_3380,
323 "BCM3380 L2");
324}
325
254IRQCHIP_DECLARE(bcm7120_l2_intc, "brcm,bcm7120-l2-intc", 326IRQCHIP_DECLARE(bcm7120_l2_intc, "brcm,bcm7120-l2-intc",
255 bcm7120_l2_intc_of_init); 327 bcm7120_l2_intc_probe_7120);
328
329IRQCHIP_DECLARE(bcm3380_l2_intc, "brcm,bcm3380-l2-intc",
330 bcm7120_l2_intc_probe_3380);
diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c
index 313c2c64498a..d6bcc6be0777 100644
--- a/drivers/irqchip/irq-brcmstb-l2.c
+++ b/drivers/irqchip/irq-brcmstb-l2.c
@@ -136,7 +136,11 @@ int __init brcmstb_l2_intc_of_init(struct device_node *np,
136 136
137 /* Disable all interrupts by default */ 137 /* Disable all interrupts by default */
138 writel(0xffffffff, data->base + CPU_MASK_SET); 138 writel(0xffffffff, data->base + CPU_MASK_SET);
139 writel(0xffffffff, data->base + CPU_CLEAR); 139
140 /* Wakeup interrupts may be retained from S5 (cold boot) */
141 data->can_wake = of_property_read_bool(np, "brcm,irq-can-wake");
142 if (!data->can_wake)
143 writel(0xffffffff, data->base + CPU_CLEAR);
140 144
141 data->parent_irq = irq_of_parse_and_map(np, 0); 145 data->parent_irq = irq_of_parse_and_map(np, 0);
142 if (!data->parent_irq) { 146 if (!data->parent_irq) {
@@ -188,8 +192,7 @@ int __init brcmstb_l2_intc_of_init(struct device_node *np,
188 ct->chip.irq_suspend = brcmstb_l2_intc_suspend; 192 ct->chip.irq_suspend = brcmstb_l2_intc_suspend;
189 ct->chip.irq_resume = brcmstb_l2_intc_resume; 193 ct->chip.irq_resume = brcmstb_l2_intc_resume;
190 194
191 if (of_property_read_bool(np, "brcm,irq-can-wake")) { 195 if (data->can_wake) {
192 data->can_wake = true;
193 /* This IRQ chip can wake the system, set all child interrupts 196 /* This IRQ chip can wake the system, set all child interrupts
194 * in wake_enabled mask 197 * in wake_enabled mask
195 */ 198 */
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index f2d269bca789..bc48b7dc89ec 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -239,7 +239,7 @@ int gic_get_c0_compare_int(void)
239int gic_get_c0_perfcount_int(void) 239int gic_get_c0_perfcount_int(void)
240{ 240{
241 if (!gic_local_irq_is_routable(GIC_LOCAL_INT_PERFCTR)) { 241 if (!gic_local_irq_is_routable(GIC_LOCAL_INT_PERFCTR)) {
242 /* Is the erformance counter shared with the timer? */ 242 /* Is the performance counter shared with the timer? */
243 if (cp0_perfcount_irq < 0) 243 if (cp0_perfcount_irq < 0)
244 return -1; 244 return -1;
245 return MIPS_CPU_IRQ_BASE + cp0_perfcount_irq; 245 return MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
@@ -248,6 +248,29 @@ int gic_get_c0_perfcount_int(void)
248 GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_PERFCTR)); 248 GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_PERFCTR));
249} 249}
250 250
251int gic_get_c0_fdc_int(void)
252{
253 if (!gic_local_irq_is_routable(GIC_LOCAL_INT_FDC)) {
254 /* Is the FDC IRQ even present? */
255 if (cp0_fdc_irq < 0)
256 return -1;
257 return MIPS_CPU_IRQ_BASE + cp0_fdc_irq;
258 }
259
260 /*
261 * Some cores claim the FDC is routable but it doesn't actually seem to
262 * be connected.
263 */
264 switch (current_cpu_type()) {
265 case CPU_INTERAPTIV:
266 case CPU_PROAPTIV:
267 return -1;
268 }
269
270 return irq_create_mapping(gic_irq_domain,
271 GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_FDC));
272}
273
251static void gic_handle_shared_int(void) 274static void gic_handle_shared_int(void)
252{ 275{
253 unsigned int i, intr, virq; 276 unsigned int i, intr, virq;
@@ -613,15 +636,20 @@ static int gic_local_irq_domain_map(struct irq_domain *d, unsigned int virq,
613 * of the MIPS kernel code does not use the percpu IRQ API for 636 * of the MIPS kernel code does not use the percpu IRQ API for
614 * the CP0 timer and performance counter interrupts. 637 * the CP0 timer and performance counter interrupts.
615 */ 638 */
616 if (intr != GIC_LOCAL_INT_TIMER && intr != GIC_LOCAL_INT_PERFCTR) { 639 switch (intr) {
640 case GIC_LOCAL_INT_TIMER:
641 case GIC_LOCAL_INT_PERFCTR:
642 case GIC_LOCAL_INT_FDC:
643 irq_set_chip_and_handler(virq,
644 &gic_all_vpes_local_irq_controller,
645 handle_percpu_irq);
646 break;
647 default:
617 irq_set_chip_and_handler(virq, 648 irq_set_chip_and_handler(virq,
618 &gic_local_irq_controller, 649 &gic_local_irq_controller,
619 handle_percpu_devid_irq); 650 handle_percpu_devid_irq);
620 irq_set_percpu_devid(virq); 651 irq_set_percpu_devid(virq);
621 } else { 652 break;
622 irq_set_chip_and_handler(virq,
623 &gic_all_vpes_local_irq_controller,
624 handle_percpu_irq);
625 } 653 }
626 654
627 spin_lock_irqsave(&gic_lock, flags); 655 spin_lock_irqsave(&gic_lock, flags);
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index 84325f267acf..84b0a2d74d60 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -6,6 +6,15 @@ menuconfig MAILBOX
6 signals. Say Y if your platform supports hardware mailboxes. 6 signals. Say Y if your platform supports hardware mailboxes.
7 7
8if MAILBOX 8if MAILBOX
9
10config ARM_MHU
11 tristate "ARM MHU Mailbox"
12 depends on ARM_AMBA
13 help
14 Say Y here if you want to build the ARM MHU controller driver.
15 The controller has 3 mailbox channels, the last of which can be
16 used in Secure mode only.
17
9config PL320_MBOX 18config PL320_MBOX
10 bool "ARM PL320 Mailbox" 19 bool "ARM PL320 Mailbox"
11 depends on ARM_AMBA 20 depends on ARM_AMBA
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index 2e79231154cf..b18201e97e29 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -2,6 +2,8 @@
2 2
3obj-$(CONFIG_MAILBOX) += mailbox.o 3obj-$(CONFIG_MAILBOX) += mailbox.o
4 4
5obj-$(CONFIG_ARM_MHU) += arm_mhu.o
6
5obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o 7obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o
6 8
7obj-$(CONFIG_OMAP2PLUS_MBOX) += omap-mailbox.o 9obj-$(CONFIG_OMAP2PLUS_MBOX) += omap-mailbox.o
diff --git a/drivers/mailbox/arm_mhu.c b/drivers/mailbox/arm_mhu.c
new file mode 100644
index 000000000000..ac693c635357
--- /dev/null
+++ b/drivers/mailbox/arm_mhu.c
@@ -0,0 +1,195 @@
1/*
2 * Copyright (C) 2013-2015 Fujitsu Semiconductor Ltd.
3 * Copyright (C) 2015 Linaro Ltd.
4 * Author: Jassi Brar <jaswinder.singh@linaro.org>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/interrupt.h>
17#include <linux/spinlock.h>
18#include <linux/mutex.h>
19#include <linux/delay.h>
20#include <linux/slab.h>
21#include <linux/err.h>
22#include <linux/io.h>
23#include <linux/module.h>
24#include <linux/amba/bus.h>
25#include <linux/mailbox_controller.h>
26
27#define INTR_STAT_OFS 0x0
28#define INTR_SET_OFS 0x8
29#define INTR_CLR_OFS 0x10
30
31#define MHU_LP_OFFSET 0x0
32#define MHU_HP_OFFSET 0x20
33#define MHU_SEC_OFFSET 0x200
34#define TX_REG_OFFSET 0x100
35
36#define MHU_CHANS 3
37
38struct mhu_link {
39 unsigned irq;
40 void __iomem *tx_reg;
41 void __iomem *rx_reg;
42};
43
44struct arm_mhu {
45 void __iomem *base;
46 struct mhu_link mlink[MHU_CHANS];
47 struct mbox_chan chan[MHU_CHANS];
48 struct mbox_controller mbox;
49};
50
51static irqreturn_t mhu_rx_interrupt(int irq, void *p)
52{
53 struct mbox_chan *chan = p;
54 struct mhu_link *mlink = chan->con_priv;
55 u32 val;
56
57 val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS);
58 if (!val)
59 return IRQ_NONE;
60
61 mbox_chan_received_data(chan, (void *)&val);
62
63 writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS);
64
65 return IRQ_HANDLED;
66}
67
68static bool mhu_last_tx_done(struct mbox_chan *chan)
69{
70 struct mhu_link *mlink = chan->con_priv;
71 u32 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
72
73 return (val == 0);
74}
75
76static int mhu_send_data(struct mbox_chan *chan, void *data)
77{
78 struct mhu_link *mlink = chan->con_priv;
79 u32 *arg = data;
80
81 writel_relaxed(*arg, mlink->tx_reg + INTR_SET_OFS);
82
83 return 0;
84}
85
86static int mhu_startup(struct mbox_chan *chan)
87{
88 struct mhu_link *mlink = chan->con_priv;
89 u32 val;
90 int ret;
91
92 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
93 writel_relaxed(val, mlink->tx_reg + INTR_CLR_OFS);
94
95 ret = request_irq(mlink->irq, mhu_rx_interrupt,
96 IRQF_SHARED, "mhu_link", chan);
97 if (ret) {
98 dev_err(chan->mbox->dev,
99 "Unable to aquire IRQ %d\n", mlink->irq);
100 return ret;
101 }
102
103 return 0;
104}
105
106static void mhu_shutdown(struct mbox_chan *chan)
107{
108 struct mhu_link *mlink = chan->con_priv;
109
110 free_irq(mlink->irq, chan);
111}
112
113static struct mbox_chan_ops mhu_ops = {
114 .send_data = mhu_send_data,
115 .startup = mhu_startup,
116 .shutdown = mhu_shutdown,
117 .last_tx_done = mhu_last_tx_done,
118};
119
120static int mhu_probe(struct amba_device *adev, const struct amba_id *id)
121{
122 int i, err;
123 struct arm_mhu *mhu;
124 struct device *dev = &adev->dev;
125 int mhu_reg[MHU_CHANS] = {MHU_LP_OFFSET, MHU_HP_OFFSET, MHU_SEC_OFFSET};
126
127 /* Allocate memory for device */
128 mhu = devm_kzalloc(dev, sizeof(*mhu), GFP_KERNEL);
129 if (!mhu)
130 return -ENOMEM;
131
132 mhu->base = devm_ioremap_resource(dev, &adev->res);
133 if (IS_ERR(mhu->base)) {
134 dev_err(dev, "ioremap failed\n");
135 return PTR_ERR(mhu->base);
136 }
137
138 for (i = 0; i < MHU_CHANS; i++) {
139 mhu->chan[i].con_priv = &mhu->mlink[i];
140 mhu->mlink[i].irq = adev->irq[i];
141 mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i];
142 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
143 }
144
145 mhu->mbox.dev = dev;
146 mhu->mbox.chans = &mhu->chan[0];
147 mhu->mbox.num_chans = MHU_CHANS;
148 mhu->mbox.ops = &mhu_ops;
149 mhu->mbox.txdone_irq = false;
150 mhu->mbox.txdone_poll = true;
151 mhu->mbox.txpoll_period = 10;
152
153 amba_set_drvdata(adev, mhu);
154
155 err = mbox_controller_register(&mhu->mbox);
156 if (err) {
157 dev_err(dev, "Failed to register mailboxes %d\n", err);
158 return err;
159 }
160
161 dev_info(dev, "ARM MHU Mailbox registered\n");
162 return 0;
163}
164
165static int mhu_remove(struct amba_device *adev)
166{
167 struct arm_mhu *mhu = amba_get_drvdata(adev);
168
169 mbox_controller_unregister(&mhu->mbox);
170
171 return 0;
172}
173
174static struct amba_id mhu_ids[] = {
175 {
176 .id = 0x1bb098,
177 .mask = 0xffffff,
178 },
179 { 0, 0 },
180};
181MODULE_DEVICE_TABLE(amba, mhu_ids);
182
183static struct amba_driver arm_mhu_driver = {
184 .drv = {
185 .name = "mhu",
186 },
187 .id_table = mhu_ids,
188 .probe = mhu_probe,
189 .remove = mhu_remove,
190};
191module_amba_driver(arm_mhu_driver);
192
193MODULE_LICENSE("GPL v2");
194MODULE_DESCRIPTION("ARM MHU Driver");
195MODULE_AUTHOR("Jassi Brar <jassisinghbrar@gmail.com>");
diff --git a/drivers/mailbox/pcc.c b/drivers/mailbox/pcc.c
index 977c814cdf6f..7e91d68a3ac3 100644
--- a/drivers/mailbox/pcc.c
+++ b/drivers/mailbox/pcc.c
@@ -20,10 +20,35 @@
20 * shared memory regions as defined in the PCC table entries. The PCC 20 * shared memory regions as defined in the PCC table entries. The PCC
21 * specification supports a Doorbell mechanism for the PCC clients 21 * specification supports a Doorbell mechanism for the PCC clients
22 * to notify the platform about new data. This Doorbell information 22 * to notify the platform about new data. This Doorbell information
23 * is also specified in each PCC table entry. See pcc_send_data() 23 * is also specified in each PCC table entry.
24 * and pcc_tx_done() for basic mode of operation.
25 * 24 *
26 * For more details about PCC, please see the ACPI specification from 25 * Typical high level flow of operation is:
26 *
27 * PCC Reads:
28 * * Client tries to acquire a channel lock.
29 * * After it is acquired it writes READ cmd in communication region cmd
30 * address.
31 * * Client issues mbox_send_message() which rings the PCC doorbell
32 * for its PCC channel.
33 * * If command completes, then client has control over channel and
34 * it can proceed with its reads.
35 * * Client releases lock.
36 *
37 * PCC Writes:
38 * * Client tries to acquire channel lock.
39 * * Client writes to its communication region after it acquires a
40 * channel lock.
41 * * Client writes WRITE cmd in communication region cmd address.
42 * * Client issues mbox_send_message() which rings the PCC doorbell
43 * for its PCC channel.
44 * * If command completes, then writes have succeded and it can release
45 * the channel lock.
46 *
47 * There is a Nominal latency defined for each channel which indicates
48 * how long to wait until a command completes. If command is not complete
49 * the client needs to retry or assume failure.
50 *
51 * For more details about PCC, please see the ACPI specification from
27 * http://www.uefi.org/ACPIv5.1 Section 14. 52 * http://www.uefi.org/ACPIv5.1 Section 14.
28 * 53 *
29 * This file implements PCC as a Mailbox controller and allows for PCC 54 * This file implements PCC as a Mailbox controller and allows for PCC
@@ -42,8 +67,6 @@
42#include "mailbox.h" 67#include "mailbox.h"
43 68
44#define MAX_PCC_SUBSPACES 256 69#define MAX_PCC_SUBSPACES 256
45#define PCCS_SS_SIG_MAGIC 0x50434300
46#define PCC_CMD_COMPLETE 0x1
47 70
48static struct mbox_chan *pcc_mbox_channels; 71static struct mbox_chan *pcc_mbox_channels;
49 72
@@ -71,23 +94,6 @@ static struct mbox_chan *get_pcc_channel(int id)
71} 94}
72 95
73/** 96/**
74 * get_subspace_id - Given a Mailbox channel, find out the
75 * PCC subspace id.
76 * @chan: Pointer to Mailbox Channel from which we want
77 * the index.
78 * Return: Errno if not found, else positive index number.
79 */
80static int get_subspace_id(struct mbox_chan *chan)
81{
82 unsigned int id = chan - pcc_mbox_channels;
83
84 if (id < 0 || id > pcc_mbox_ctrl.num_chans)
85 return -ENOENT;
86
87 return id;
88}
89
90/**
91 * pcc_mbox_request_channel - PCC clients call this function to 97 * pcc_mbox_request_channel - PCC clients call this function to
92 * request a pointer to their PCC subspace, from which they 98 * request a pointer to their PCC subspace, from which they
93 * can get the details of communicating with the remote. 99 * can get the details of communicating with the remote.
@@ -117,7 +123,7 @@ struct mbox_chan *pcc_mbox_request_channel(struct mbox_client *cl,
117 chan = get_pcc_channel(subspace_id); 123 chan = get_pcc_channel(subspace_id);
118 124
119 if (!chan || chan->cl) { 125 if (!chan || chan->cl) {
120 dev_err(dev, "%s: PCC mailbox not free\n", __func__); 126 dev_err(dev, "Channel not found for idx: %d\n", subspace_id);
121 return ERR_PTR(-EBUSY); 127 return ERR_PTR(-EBUSY);
122 } 128 }
123 129
@@ -161,81 +167,30 @@ void pcc_mbox_free_channel(struct mbox_chan *chan)
161EXPORT_SYMBOL_GPL(pcc_mbox_free_channel); 167EXPORT_SYMBOL_GPL(pcc_mbox_free_channel);
162 168
163/** 169/**
164 * pcc_tx_done - Callback from Mailbox controller code to 170 * pcc_send_data - Called from Mailbox Controller code. Used
165 * check if PCC message transmission completed. 171 * here only to ring the channel doorbell. The PCC client
166 * @chan: Pointer to Mailbox channel on which previous 172 * specific read/write is done in the client driver in
167 * transmission occurred. 173 * order to maintain atomicity over PCC channel once
168 * 174 * OS has control over it. See above for flow of operations.
169 * Return: TRUE if succeeded.
170 */
171static bool pcc_tx_done(struct mbox_chan *chan)
172{
173 struct acpi_pcct_hw_reduced *pcct_ss = chan->con_priv;
174 struct acpi_pcct_shared_memory *generic_comm_base =
175 (struct acpi_pcct_shared_memory *) pcct_ss->base_address;
176 u16 cmd_delay = pcct_ss->latency;
177 unsigned int retries = 0;
178
179 /* Try a few times while waiting for platform to consume */
180 while (!(readw_relaxed(&generic_comm_base->status)
181 & PCC_CMD_COMPLETE)) {
182
183 if (retries++ < 5)
184 udelay(cmd_delay);
185 else {
186 /*
187 * If the remote is dead, this will cause the Mbox
188 * controller to timeout after mbox client.tx_tout
189 * msecs.
190 */
191 pr_err("PCC platform did not respond.\n");
192 return false;
193 }
194 }
195 return true;
196}
197
198/**
199 * pcc_send_data - Called from Mailbox Controller code to finally
200 * transmit data over channel.
201 * @chan: Pointer to Mailbox channel over which to send data. 175 * @chan: Pointer to Mailbox channel over which to send data.
202 * @data: Actual data to be written over channel. 176 * @data: Client specific data written over channel. Used here
177 * only for debug after PCC transaction completes.
203 * 178 *
204 * Return: Err if something failed else 0 for success. 179 * Return: Err if something failed else 0 for success.
205 */ 180 */
206static int pcc_send_data(struct mbox_chan *chan, void *data) 181static int pcc_send_data(struct mbox_chan *chan, void *data)
207{ 182{
208 struct acpi_pcct_hw_reduced *pcct_ss = chan->con_priv; 183 struct acpi_pcct_hw_reduced *pcct_ss = chan->con_priv;
209 struct acpi_pcct_shared_memory *generic_comm_base =
210 (struct acpi_pcct_shared_memory *) pcct_ss->base_address;
211 struct acpi_generic_address doorbell; 184 struct acpi_generic_address doorbell;
212 u64 doorbell_preserve; 185 u64 doorbell_preserve;
213 u64 doorbell_val; 186 u64 doorbell_val;
214 u64 doorbell_write; 187 u64 doorbell_write;
215 u16 cmd = *(u16 *) data;
216 u16 ss_idx = -1;
217
218 ss_idx = get_subspace_id(chan);
219
220 if (ss_idx < 0) {
221 pr_err("Invalid Subspace ID from PCC client\n");
222 return -EINVAL;
223 }
224 188
225 doorbell = pcct_ss->doorbell_register; 189 doorbell = pcct_ss->doorbell_register;
226 doorbell_preserve = pcct_ss->preserve_mask; 190 doorbell_preserve = pcct_ss->preserve_mask;
227 doorbell_write = pcct_ss->write_mask; 191 doorbell_write = pcct_ss->write_mask;
228 192
229 /* Write to the shared comm region. */ 193 /* Sync notification from OS to Platform. */
230 writew(cmd, &generic_comm_base->command);
231
232 /* Write Subspace MAGIC value so platform can identify destination. */
233 writel((PCCS_SS_SIG_MAGIC | ss_idx), &generic_comm_base->signature);
234
235 /* Flip CMD COMPLETE bit */
236 writew(0, &generic_comm_base->status);
237
238 /* Sync notification from OSPM to Platform. */
239 acpi_read(&doorbell_val, &doorbell); 194 acpi_read(&doorbell_val, &doorbell);
240 acpi_write((doorbell_val & doorbell_preserve) | doorbell_write, 195 acpi_write((doorbell_val & doorbell_preserve) | doorbell_write,
241 &doorbell); 196 &doorbell);
@@ -245,7 +200,6 @@ static int pcc_send_data(struct mbox_chan *chan, void *data)
245 200
246static struct mbox_chan_ops pcc_chan_ops = { 201static struct mbox_chan_ops pcc_chan_ops = {
247 .send_data = pcc_send_data, 202 .send_data = pcc_send_data,
248 .last_tx_done = pcc_tx_done,
249}; 203};
250 204
251/** 205/**
@@ -351,8 +305,6 @@ static int pcc_mbox_probe(struct platform_device *pdev)
351 305
352 pcc_mbox_ctrl.chans = pcc_mbox_channels; 306 pcc_mbox_ctrl.chans = pcc_mbox_channels;
353 pcc_mbox_ctrl.ops = &pcc_chan_ops; 307 pcc_mbox_ctrl.ops = &pcc_chan_ops;
354 pcc_mbox_ctrl.txdone_poll = true;
355 pcc_mbox_ctrl.txpoll_period = 10;
356 pcc_mbox_ctrl.dev = &pdev->dev; 308 pcc_mbox_ctrl.dev = &pdev->dev;
357 309
358 pr_info("Registering PCC driver as Mailbox controller\n"); 310 pr_info("Registering PCC driver as Mailbox controller\n");
diff --git a/drivers/media/dvb-frontends/cxd2820r_c.c b/drivers/media/dvb-frontends/cxd2820r_c.c
index 149fdca3fb44..72b0e2db3aab 100644
--- a/drivers/media/dvb-frontends/cxd2820r_c.c
+++ b/drivers/media/dvb-frontends/cxd2820r_c.c
@@ -79,7 +79,7 @@ int cxd2820r_set_frontend_c(struct dvb_frontend *fe)
79 79
80 num = if_freq / 1000; /* Hz => kHz */ 80 num = if_freq / 1000; /* Hz => kHz */
81 num *= 0x4000; 81 num *= 0x4000;
82 if_ctl = 0x4000 - cxd2820r_div_u64_round_closest(num, 41000); 82 if_ctl = 0x4000 - DIV_ROUND_CLOSEST_ULL(num, 41000);
83 buf[0] = (if_ctl >> 8) & 0x3f; 83 buf[0] = (if_ctl >> 8) & 0x3f;
84 buf[1] = (if_ctl >> 0) & 0xff; 84 buf[1] = (if_ctl >> 0) & 0xff;
85 85
diff --git a/drivers/media/dvb-frontends/cxd2820r_core.c b/drivers/media/dvb-frontends/cxd2820r_core.c
index 422e84bbb008..490e090048ef 100644
--- a/drivers/media/dvb-frontends/cxd2820r_core.c
+++ b/drivers/media/dvb-frontends/cxd2820r_core.c
@@ -244,12 +244,6 @@ error:
244 return ret; 244 return ret;
245} 245}
246 246
247/* 64 bit div with round closest, like DIV_ROUND_CLOSEST but 64 bit */
248u32 cxd2820r_div_u64_round_closest(u64 dividend, u32 divisor)
249{
250 return div_u64(dividend + (divisor / 2), divisor);
251}
252
253static int cxd2820r_set_frontend(struct dvb_frontend *fe) 247static int cxd2820r_set_frontend(struct dvb_frontend *fe)
254{ 248{
255 struct cxd2820r_priv *priv = fe->demodulator_priv; 249 struct cxd2820r_priv *priv = fe->demodulator_priv;
diff --git a/drivers/media/dvb-frontends/cxd2820r_priv.h b/drivers/media/dvb-frontends/cxd2820r_priv.h
index 7ff5f60c83e1..4b428959b16e 100644
--- a/drivers/media/dvb-frontends/cxd2820r_priv.h
+++ b/drivers/media/dvb-frontends/cxd2820r_priv.h
@@ -64,8 +64,6 @@ int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
64int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val, 64int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
65 int len); 65 int len);
66 66
67u32 cxd2820r_div_u64_round_closest(u64 dividend, u32 divisor);
68
69int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val, 67int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
70 int len); 68 int len);
71 69
diff --git a/drivers/media/dvb-frontends/cxd2820r_t.c b/drivers/media/dvb-frontends/cxd2820r_t.c
index 51401d036530..008cb2ac8480 100644
--- a/drivers/media/dvb-frontends/cxd2820r_t.c
+++ b/drivers/media/dvb-frontends/cxd2820r_t.c
@@ -103,7 +103,7 @@ int cxd2820r_set_frontend_t(struct dvb_frontend *fe)
103 103
104 num = if_freq / 1000; /* Hz => kHz */ 104 num = if_freq / 1000; /* Hz => kHz */
105 num *= 0x1000000; 105 num *= 0x1000000;
106 if_ctl = cxd2820r_div_u64_round_closest(num, 41000); 106 if_ctl = DIV_ROUND_CLOSEST_ULL(num, 41000);
107 buf[0] = ((if_ctl >> 16) & 0xff); 107 buf[0] = ((if_ctl >> 16) & 0xff);
108 buf[1] = ((if_ctl >> 8) & 0xff); 108 buf[1] = ((if_ctl >> 8) & 0xff);
109 buf[2] = ((if_ctl >> 0) & 0xff); 109 buf[2] = ((if_ctl >> 0) & 0xff);
diff --git a/drivers/media/dvb-frontends/cxd2820r_t2.c b/drivers/media/dvb-frontends/cxd2820r_t2.c
index 9c0c4f42175c..35fe364c7182 100644
--- a/drivers/media/dvb-frontends/cxd2820r_t2.c
+++ b/drivers/media/dvb-frontends/cxd2820r_t2.c
@@ -120,7 +120,7 @@ int cxd2820r_set_frontend_t2(struct dvb_frontend *fe)
120 120
121 num = if_freq / 1000; /* Hz => kHz */ 121 num = if_freq / 1000; /* Hz => kHz */
122 num *= 0x1000000; 122 num *= 0x1000000;
123 if_ctl = cxd2820r_div_u64_round_closest(num, 41000); 123 if_ctl = DIV_ROUND_CLOSEST_ULL(num, 41000);
124 buf[0] = ((if_ctl >> 16) & 0xff); 124 buf[0] = ((if_ctl >> 16) & 0xff);
125 buf[1] = ((if_ctl >> 8) & 0xff); 125 buf[1] = ((if_ctl >> 8) & 0xff);
126 buf[2] = ((if_ctl >> 0) & 0xff); 126 buf[2] = ((if_ctl >> 0) & 0xff);
diff --git a/drivers/memstick/core/mspro_block.c b/drivers/memstick/core/mspro_block.c
index fc145d202c46..922a750640e8 100644
--- a/drivers/memstick/core/mspro_block.c
+++ b/drivers/memstick/core/mspro_block.c
@@ -758,7 +758,7 @@ static int mspro_block_complete_req(struct memstick_dev *card, int error)
758 758
759 if (error || (card->current_mrq.tpc == MSPRO_CMD_STOP)) { 759 if (error || (card->current_mrq.tpc == MSPRO_CMD_STOP)) {
760 if (msb->data_dir == READ) { 760 if (msb->data_dir == READ) {
761 for (cnt = 0; cnt < msb->current_seg; cnt++) 761 for (cnt = 0; cnt < msb->current_seg; cnt++) {
762 t_len += msb->req_sg[cnt].length 762 t_len += msb->req_sg[cnt].length
763 / msb->page_size; 763 / msb->page_size;
764 764
@@ -766,6 +766,7 @@ static int mspro_block_complete_req(struct memstick_dev *card, int error)
766 t_len += msb->current_page - 1; 766 t_len += msb->current_page - 1;
767 767
768 t_len *= msb->page_size; 768 t_len *= msb->page_size;
769 }
769 } 770 }
770 } else 771 } else
771 t_len = blk_rq_bytes(msb->block_req); 772 t_len = blk_rq_bytes(msb->block_req);
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index c69afb5e264e..2fc426926574 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -2230,7 +2230,7 @@ static int mmc_blk_alloc_part(struct mmc_card *card,
2230 part_md->part_type = part_type; 2230 part_md->part_type = part_type;
2231 list_add(&part_md->part, &md->part); 2231 list_add(&part_md->part, &md->part);
2232 2232
2233 string_get_size((u64)get_capacity(part_md->disk) << 9, STRING_UNITS_2, 2233 string_get_size((u64)get_capacity(part_md->disk), 512, STRING_UNITS_2,
2234 cap_str, sizeof(cap_str)); 2234 cap_str, sizeof(cap_str));
2235 pr_info("%s: %s %s partition %u %s\n", 2235 pr_info("%s: %s %s partition %u %s\n",
2236 part_md->disk->disk_name, mmc_card_id(card), 2236 part_md->disk->disk_name, mmc_card_id(card),
@@ -2436,7 +2436,7 @@ static int mmc_blk_probe(struct device *dev)
2436 if (IS_ERR(md)) 2436 if (IS_ERR(md))
2437 return PTR_ERR(md); 2437 return PTR_ERR(md);
2438 2438
2439 string_get_size((u64)get_capacity(md->disk) << 9, STRING_UNITS_2, 2439 string_get_size((u64)get_capacity(md->disk), 512, STRING_UNITS_2,
2440 cap_str, sizeof(cap_str)); 2440 cap_str, sizeof(cap_str));
2441 pr_info("%s: %s %s %s %s\n", 2441 pr_info("%s: %s %s %s %s\n",
2442 md->disk->disk_name, mmc_card_id(card), mmc_card_name(card), 2442 md->disk->disk_name, mmc_card_id(card), mmc_card_name(card),
diff --git a/drivers/net/ethernet/broadcom/b44.c b/drivers/net/ethernet/broadcom/b44.c
index bd5916a60cb5..77363d680532 100644
--- a/drivers/net/ethernet/broadcom/b44.c
+++ b/drivers/net/ethernet/broadcom/b44.c
@@ -400,7 +400,7 @@ static void b44_set_flow_ctrl(struct b44 *bp, u32 local, u32 remote)
400} 400}
401 401
402#ifdef CONFIG_BCM47XX 402#ifdef CONFIG_BCM47XX
403#include <bcm47xx_nvram.h> 403#include <linux/bcm47xx_nvram.h>
404static void b44_wap54g10_workaround(struct b44 *bp) 404static void b44_wap54g10_workaround(struct b44 *bp)
405{ 405{
406 char buf[20]; 406 char buf[20];
diff --git a/drivers/net/ethernet/broadcom/bgmac.c b/drivers/net/ethernet/broadcom/bgmac.c
index 5cb93d1f50a4..de77d3a74abc 100644
--- a/drivers/net/ethernet/broadcom/bgmac.c
+++ b/drivers/net/ethernet/broadcom/bgmac.c
@@ -17,7 +17,7 @@
17#include <linux/phy_fixed.h> 17#include <linux/phy_fixed.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/dma-mapping.h> 19#include <linux/dma-mapping.h>
20#include <bcm47xx_nvram.h> 20#include <linux/bcm47xx_nvram.h>
21 21
22static const struct bcma_device_id bgmac_bcma_tbl[] = { 22static const struct bcma_device_id bgmac_bcma_tbl[] = {
23 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_4706_MAC_GBIT, BCMA_ANY_REV, BCMA_ANY_CLASS), 23 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_4706_MAC_GBIT, BCMA_ANY_REV, BCMA_ANY_CLASS),
diff --git a/drivers/oprofile/buffer_sync.c b/drivers/oprofile/buffer_sync.c
index d93b2b6b1f7a..82f7000a285d 100644
--- a/drivers/oprofile/buffer_sync.c
+++ b/drivers/oprofile/buffer_sync.c
@@ -21,6 +21,7 @@
21 * objects. 21 * objects.
22 */ 22 */
23 23
24#include <linux/file.h>
24#include <linux/mm.h> 25#include <linux/mm.h>
25#include <linux/workqueue.h> 26#include <linux/workqueue.h>
26#include <linux/notifier.h> 27#include <linux/notifier.h>
@@ -224,10 +225,18 @@ static inline unsigned long fast_get_dcookie(struct path *path)
224static unsigned long get_exec_dcookie(struct mm_struct *mm) 225static unsigned long get_exec_dcookie(struct mm_struct *mm)
225{ 226{
226 unsigned long cookie = NO_COOKIE; 227 unsigned long cookie = NO_COOKIE;
228 struct file *exe_file;
227 229
228 if (mm && mm->exe_file) 230 if (!mm)
229 cookie = fast_get_dcookie(&mm->exe_file->f_path); 231 goto done;
232
233 exe_file = get_mm_exe_file(mm);
234 if (!exe_file)
235 goto done;
230 236
237 cookie = fast_get_dcookie(&exe_file->f_path);
238 fput(exe_file);
239done:
231 return cookie; 240 return cookie;
232} 241}
233 242
@@ -236,6 +245,8 @@ static unsigned long get_exec_dcookie(struct mm_struct *mm)
236 * pair that can then be added to the global event buffer. We make 245 * pair that can then be added to the global event buffer. We make
237 * sure to do this lookup before a mm->mmap modification happens so 246 * sure to do this lookup before a mm->mmap modification happens so
238 * we don't lose track. 247 * we don't lose track.
248 *
249 * The caller must ensure the mm is not nil (ie: not a kernel thread).
239 */ 250 */
240static unsigned long 251static unsigned long
241lookup_dcookie(struct mm_struct *mm, unsigned long addr, off_t *offset) 252lookup_dcookie(struct mm_struct *mm, unsigned long addr, off_t *offset)
@@ -243,6 +254,7 @@ lookup_dcookie(struct mm_struct *mm, unsigned long addr, off_t *offset)
243 unsigned long cookie = NO_COOKIE; 254 unsigned long cookie = NO_COOKIE;
244 struct vm_area_struct *vma; 255 struct vm_area_struct *vma;
245 256
257 down_read(&mm->mmap_sem);
246 for (vma = find_vma(mm, addr); vma; vma = vma->vm_next) { 258 for (vma = find_vma(mm, addr); vma; vma = vma->vm_next) {
247 259
248 if (addr < vma->vm_start || addr >= vma->vm_end) 260 if (addr < vma->vm_start || addr >= vma->vm_end)
@@ -262,6 +274,7 @@ lookup_dcookie(struct mm_struct *mm, unsigned long addr, off_t *offset)
262 274
263 if (!vma) 275 if (!vma)
264 cookie = INVALID_COOKIE; 276 cookie = INVALID_COOKIE;
277 up_read(&mm->mmap_sem);
265 278
266 return cookie; 279 return cookie;
267} 280}
@@ -402,20 +415,9 @@ static void release_mm(struct mm_struct *mm)
402{ 415{
403 if (!mm) 416 if (!mm)
404 return; 417 return;
405 up_read(&mm->mmap_sem);
406 mmput(mm); 418 mmput(mm);
407} 419}
408 420
409
410static struct mm_struct *take_tasks_mm(struct task_struct *task)
411{
412 struct mm_struct *mm = get_task_mm(task);
413 if (mm)
414 down_read(&mm->mmap_sem);
415 return mm;
416}
417
418
419static inline int is_code(unsigned long val) 421static inline int is_code(unsigned long val)
420{ 422{
421 return val == ESCAPE_CODE; 423 return val == ESCAPE_CODE;
@@ -532,7 +534,7 @@ void sync_buffer(int cpu)
532 new = (struct task_struct *)val; 534 new = (struct task_struct *)val;
533 oldmm = mm; 535 oldmm = mm;
534 release_mm(oldmm); 536 release_mm(oldmm);
535 mm = take_tasks_mm(new); 537 mm = get_task_mm(new);
536 if (mm != oldmm) 538 if (mm != oldmm)
537 cookie = get_exec_dcookie(mm); 539 cookie = get_exec_dcookie(mm);
538 add_user_ctx_switch(new, cookie); 540 add_user_ctx_switch(new, cookie);
diff --git a/drivers/platform/Kconfig b/drivers/platform/Kconfig
index 09fde58b12e0..0adccbf5c83f 100644
--- a/drivers/platform/Kconfig
+++ b/drivers/platform/Kconfig
@@ -1,6 +1,9 @@
1if X86 1if X86
2source "drivers/platform/x86/Kconfig" 2source "drivers/platform/x86/Kconfig"
3endif 3endif
4if MIPS
5source "drivers/platform/mips/Kconfig"
6endif
4if GOLDFISH 7if GOLDFISH
5source "drivers/platform/goldfish/Kconfig" 8source "drivers/platform/goldfish/Kconfig"
6endif 9endif
diff --git a/drivers/platform/Makefile b/drivers/platform/Makefile
index 3656b7b17b99..ca2692510733 100644
--- a/drivers/platform/Makefile
+++ b/drivers/platform/Makefile
@@ -3,6 +3,7 @@
3# 3#
4 4
5obj-$(CONFIG_X86) += x86/ 5obj-$(CONFIG_X86) += x86/
6obj-$(CONFIG_MIPS) += mips/
6obj-$(CONFIG_OLPC) += olpc/ 7obj-$(CONFIG_OLPC) += olpc/
7obj-$(CONFIG_GOLDFISH) += goldfish/ 8obj-$(CONFIG_GOLDFISH) += goldfish/
8obj-$(CONFIG_CHROME_PLATFORMS) += chrome/ 9obj-$(CONFIG_CHROME_PLATFORMS) += chrome/
diff --git a/drivers/platform/mips/Kconfig b/drivers/platform/mips/Kconfig
new file mode 100644
index 000000000000..125e569017be
--- /dev/null
+++ b/drivers/platform/mips/Kconfig
@@ -0,0 +1,30 @@
1#
2# MIPS Platform Specific Drivers
3#
4
5menuconfig MIPS_PLATFORM_DEVICES
6 bool "MIPS Platform Specific Device Drivers"
7 default y
8 help
9 Say Y here to get to see options for device drivers of various
10 MIPS platforms, including vendor-specific netbook/laptop/desktop
11 extension and hardware monitor drivers. This option itself does
12 not add any kernel code.
13
14 If you say N, all options in this submenu will be skipped and disabled.
15
16if MIPS_PLATFORM_DEVICES
17
18config MIPS_ACPI
19 bool
20 default y if LOONGSON_MACH3X
21
22config CPU_HWMON
23 tristate "Loongson CPU HWMon Driver"
24 depends on LOONGSON_MACH3X
25 select HWMON
26 default y
27 help
28 Loongson-3A/3B CPU Hwmon (temperature sensor) driver.
29
30endif # MIPS_PLATFORM_DEVICES
diff --git a/drivers/platform/mips/Makefile b/drivers/platform/mips/Makefile
new file mode 100644
index 000000000000..43412849b195
--- /dev/null
+++ b/drivers/platform/mips/Makefile
@@ -0,0 +1,2 @@
1obj-$(CONFIG_MIPS_ACPI) += acpi_init.o
2obj-$(CONFIG_CPU_HWMON) += cpu_hwmon.o
diff --git a/drivers/platform/mips/acpi_init.c b/drivers/platform/mips/acpi_init.c
new file mode 100644
index 000000000000..dbdad79ead8f
--- /dev/null
+++ b/drivers/platform/mips/acpi_init.c
@@ -0,0 +1,150 @@
1#include <linux/io.h>
2#include <linux/init.h>
3#include <linux/ioport.h>
4#include <linux/export.h>
5
6#define SBX00_ACPI_IO_BASE 0x800
7#define SBX00_ACPI_IO_SIZE 0x100
8
9#define ACPI_PM_EVT_BLK (SBX00_ACPI_IO_BASE + 0x00) /* 4 bytes */
10#define ACPI_PM_CNT_BLK (SBX00_ACPI_IO_BASE + 0x04) /* 2 bytes */
11#define ACPI_PMA_CNT_BLK (SBX00_ACPI_IO_BASE + 0x0F) /* 1 byte */
12#define ACPI_PM_TMR_BLK (SBX00_ACPI_IO_BASE + 0x18) /* 4 bytes */
13#define ACPI_GPE0_BLK (SBX00_ACPI_IO_BASE + 0x10) /* 8 bytes */
14#define ACPI_END (SBX00_ACPI_IO_BASE + 0x80)
15
16#define PM_INDEX 0xCD6
17#define PM_DATA 0xCD7
18#define PM2_INDEX 0xCD0
19#define PM2_DATA 0xCD1
20
21/*
22 * SCI interrupt need acpi space, allocate here
23 */
24
25static int __init register_acpi_resource(void)
26{
27 request_region(SBX00_ACPI_IO_BASE, SBX00_ACPI_IO_SIZE, "acpi");
28 return 0;
29}
30
31static void pmio_write_index(u16 index, u8 reg, u8 value)
32{
33 outb(reg, index);
34 outb(value, index + 1);
35}
36
37static u8 pmio_read_index(u16 index, u8 reg)
38{
39 outb(reg, index);
40 return inb(index + 1);
41}
42
43void pm_iowrite(u8 reg, u8 value)
44{
45 pmio_write_index(PM_INDEX, reg, value);
46}
47EXPORT_SYMBOL(pm_iowrite);
48
49u8 pm_ioread(u8 reg)
50{
51 return pmio_read_index(PM_INDEX, reg);
52}
53EXPORT_SYMBOL(pm_ioread);
54
55void pm2_iowrite(u8 reg, u8 value)
56{
57 pmio_write_index(PM2_INDEX, reg, value);
58}
59EXPORT_SYMBOL(pm2_iowrite);
60
61u8 pm2_ioread(u8 reg)
62{
63 return pmio_read_index(PM2_INDEX, reg);
64}
65EXPORT_SYMBOL(pm2_ioread);
66
67static void acpi_hw_clear_status(void)
68{
69 u16 value;
70
71 /* PMStatus: Clear WakeStatus/PwrBtnStatus */
72 value = inw(ACPI_PM_EVT_BLK);
73 value |= (1 << 8 | 1 << 15);
74 outw(value, ACPI_PM_EVT_BLK);
75
76 /* GPEStatus: Clear all generated events */
77 outl(inl(ACPI_GPE0_BLK), ACPI_GPE0_BLK);
78}
79
80void acpi_registers_setup(void)
81{
82 u32 value;
83
84 /* PM Status Base */
85 pm_iowrite(0x20, ACPI_PM_EVT_BLK & 0xff);
86 pm_iowrite(0x21, ACPI_PM_EVT_BLK >> 8);
87
88 /* PM Control Base */
89 pm_iowrite(0x22, ACPI_PM_CNT_BLK & 0xff);
90 pm_iowrite(0x23, ACPI_PM_CNT_BLK >> 8);
91
92 /* GPM Base */
93 pm_iowrite(0x28, ACPI_GPE0_BLK & 0xff);
94 pm_iowrite(0x29, ACPI_GPE0_BLK >> 8);
95
96 /* ACPI End */
97 pm_iowrite(0x2e, ACPI_END & 0xff);
98 pm_iowrite(0x2f, ACPI_END >> 8);
99
100 /* IO Decode: When AcpiDecodeEnable set, South-Bridge uses the contents
101 * of the PM registers at index 0x20~0x2B to decode ACPI I/O address. */
102 pm_iowrite(0x0e, 1 << 3);
103
104 /* SCI_EN set */
105 outw(1, ACPI_PM_CNT_BLK);
106
107 /* Enable to generate SCI */
108 pm_iowrite(0x10, pm_ioread(0x10) | 1);
109
110 /* GPM3/GPM9 enable */
111 value = inl(ACPI_GPE0_BLK + 4);
112 outl(value | (1 << 14) | (1 << 22), ACPI_GPE0_BLK + 4);
113
114 /* Set GPM9 as input */
115 pm_iowrite(0x8d, pm_ioread(0x8d) & (~(1 << 1)));
116
117 /* Set GPM9 as non-output */
118 pm_iowrite(0x94, pm_ioread(0x94) | (1 << 3));
119
120 /* GPM3 config ACPI trigger SCIOUT */
121 pm_iowrite(0x33, pm_ioread(0x33) & (~(3 << 4)));
122
123 /* GPM9 config ACPI trigger SCIOUT */
124 pm_iowrite(0x3d, pm_ioread(0x3d) & (~(3 << 2)));
125
126 /* GPM3 config falling edge trigger */
127 pm_iowrite(0x37, pm_ioread(0x37) & (~(1 << 6)));
128
129 /* No wait for STPGNT# in ACPI Sx state */
130 pm_iowrite(0x7c, pm_ioread(0x7c) | (1 << 6));
131
132 /* Set GPM3 pull-down enable */
133 value = pm2_ioread(0xf6);
134 value |= ((1 << 7) | (1 << 3));
135 pm2_iowrite(0xf6, value);
136
137 /* Set GPM9 pull-down enable */
138 value = pm2_ioread(0xf8);
139 value |= ((1 << 5) | (1 << 1));
140 pm2_iowrite(0xf8, value);
141}
142
143int __init sbx00_acpi_init(void)
144{
145 register_acpi_resource();
146 acpi_registers_setup();
147 acpi_hw_clear_status();
148
149 return 0;
150}
diff --git a/drivers/platform/mips/cpu_hwmon.c b/drivers/platform/mips/cpu_hwmon.c
new file mode 100644
index 000000000000..0f6c63e17049
--- /dev/null
+++ b/drivers/platform/mips/cpu_hwmon.c
@@ -0,0 +1,207 @@
1#include <linux/err.h>
2#include <linux/module.h>
3#include <linux/reboot.h>
4#include <linux/jiffies.h>
5#include <linux/hwmon.h>
6#include <linux/hwmon-sysfs.h>
7
8#include <loongson.h>
9#include <boot_param.h>
10#include <loongson_hwmon.h>
11
12/*
13 * Loongson-3 series cpu has two sensors inside,
14 * each of them from 0 to 255,
15 * if more than 127, that is dangerous.
16 * here only provide sensor1 data, because it always hot than sensor0
17 */
18int loongson3_cpu_temp(int cpu)
19{
20 u32 reg;
21
22 reg = LOONGSON_CHIPTEMP(cpu);
23 if (loongson_sysconf.cputype == Loongson_3A)
24 reg = (reg >> 8) & 0xff;
25 else if (loongson_sysconf.cputype == Loongson_3B)
26 reg = ((reg >> 8) & 0xff) - 100;
27
28 return (int)reg * 1000;
29}
30
31static struct device *cpu_hwmon_dev;
32
33static ssize_t get_hwmon_name(struct device *dev,
34 struct device_attribute *attr, char *buf);
35static SENSOR_DEVICE_ATTR(name, S_IRUGO, get_hwmon_name, NULL, 0);
36
37static struct attribute *cpu_hwmon_attributes[] = {
38 &sensor_dev_attr_name.dev_attr.attr,
39 NULL
40};
41
42/* Hwmon device attribute group */
43static struct attribute_group cpu_hwmon_attribute_group = {
44 .attrs = cpu_hwmon_attributes,
45};
46
47/* Hwmon device get name */
48static ssize_t get_hwmon_name(struct device *dev,
49 struct device_attribute *attr, char *buf)
50{
51 return sprintf(buf, "cpu-hwmon\n");
52}
53
54static ssize_t get_cpu0_temp(struct device *dev,
55 struct device_attribute *attr, char *buf);
56static ssize_t get_cpu1_temp(struct device *dev,
57 struct device_attribute *attr, char *buf);
58static ssize_t cpu0_temp_label(struct device *dev,
59 struct device_attribute *attr, char *buf);
60static ssize_t cpu1_temp_label(struct device *dev,
61 struct device_attribute *attr, char *buf);
62
63static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, get_cpu0_temp, NULL, 1);
64static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, cpu0_temp_label, NULL, 1);
65static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, get_cpu1_temp, NULL, 2);
66static SENSOR_DEVICE_ATTR(temp2_label, S_IRUGO, cpu1_temp_label, NULL, 2);
67
68static const struct attribute *hwmon_cputemp1[] = {
69 &sensor_dev_attr_temp1_input.dev_attr.attr,
70 &sensor_dev_attr_temp1_label.dev_attr.attr,
71 NULL
72};
73
74static const struct attribute *hwmon_cputemp2[] = {
75 &sensor_dev_attr_temp2_input.dev_attr.attr,
76 &sensor_dev_attr_temp2_label.dev_attr.attr,
77 NULL
78};
79
80static ssize_t cpu0_temp_label(struct device *dev,
81 struct device_attribute *attr, char *buf)
82{
83 return sprintf(buf, "CPU 0 Temprature\n");
84}
85
86static ssize_t cpu1_temp_label(struct device *dev,
87 struct device_attribute *attr, char *buf)
88{
89 return sprintf(buf, "CPU 1 Temprature\n");
90}
91
92static ssize_t get_cpu0_temp(struct device *dev,
93 struct device_attribute *attr, char *buf)
94{
95 int value = loongson3_cpu_temp(0);
96 return sprintf(buf, "%d\n", value);
97}
98
99static ssize_t get_cpu1_temp(struct device *dev,
100 struct device_attribute *attr, char *buf)
101{
102 int value = loongson3_cpu_temp(1);
103 return sprintf(buf, "%d\n", value);
104}
105
106static int create_sysfs_cputemp_files(struct kobject *kobj)
107{
108 int ret;
109
110 ret = sysfs_create_files(kobj, hwmon_cputemp1);
111 if (ret)
112 goto sysfs_create_temp1_fail;
113
114 if (loongson_sysconf.nr_cpus <= loongson_sysconf.cores_per_package)
115 return 0;
116
117 ret = sysfs_create_files(kobj, hwmon_cputemp2);
118 if (ret)
119 goto sysfs_create_temp2_fail;
120
121 return 0;
122
123sysfs_create_temp2_fail:
124 sysfs_remove_files(kobj, hwmon_cputemp1);
125
126sysfs_create_temp1_fail:
127 return -1;
128}
129
130static void remove_sysfs_cputemp_files(struct kobject *kobj)
131{
132 sysfs_remove_files(&cpu_hwmon_dev->kobj, hwmon_cputemp1);
133
134 if (loongson_sysconf.nr_cpus > loongson_sysconf.cores_per_package)
135 sysfs_remove_files(&cpu_hwmon_dev->kobj, hwmon_cputemp2);
136}
137
138#define CPU_THERMAL_THRESHOLD 90000
139static struct delayed_work thermal_work;
140
141static void do_thermal_timer(struct work_struct *work)
142{
143 int value = loongson3_cpu_temp(0);
144 if (value <= CPU_THERMAL_THRESHOLD)
145 schedule_delayed_work(&thermal_work, msecs_to_jiffies(5000));
146 else
147 orderly_poweroff(true);
148}
149
150static int __init loongson_hwmon_init(void)
151{
152 int ret;
153
154 pr_info("Loongson Hwmon Enter...\n");
155
156 cpu_hwmon_dev = hwmon_device_register(NULL);
157 if (IS_ERR(cpu_hwmon_dev)) {
158 ret = -ENOMEM;
159 pr_err("hwmon_device_register fail!\n");
160 goto fail_hwmon_device_register;
161 }
162
163 ret = sysfs_create_group(&cpu_hwmon_dev->kobj,
164 &cpu_hwmon_attribute_group);
165 if (ret) {
166 pr_err("fail to create loongson hwmon!\n");
167 goto fail_sysfs_create_group_hwmon;
168 }
169
170 ret = create_sysfs_cputemp_files(&cpu_hwmon_dev->kobj);
171 if (ret) {
172 pr_err("fail to create cpu temprature interface!\n");
173 goto fail_create_sysfs_cputemp_files;
174 }
175
176 INIT_DEFERRABLE_WORK(&thermal_work, do_thermal_timer);
177 schedule_delayed_work(&thermal_work, msecs_to_jiffies(20000));
178
179 return ret;
180
181fail_create_sysfs_cputemp_files:
182 sysfs_remove_group(&cpu_hwmon_dev->kobj,
183 &cpu_hwmon_attribute_group);
184
185fail_sysfs_create_group_hwmon:
186 hwmon_device_unregister(cpu_hwmon_dev);
187
188fail_hwmon_device_register:
189 return ret;
190}
191
192static void __exit loongson_hwmon_exit(void)
193{
194 cancel_delayed_work_sync(&thermal_work);
195 remove_sysfs_cputemp_files(&cpu_hwmon_dev->kobj);
196 sysfs_remove_group(&cpu_hwmon_dev->kobj,
197 &cpu_hwmon_attribute_group);
198 hwmon_device_unregister(cpu_hwmon_dev);
199}
200
201module_init(loongson_hwmon_init);
202module_exit(loongson_hwmon_exit);
203
204MODULE_AUTHOR("Yu Xiang <xiangy@lemote.com>");
205MODULE_AUTHOR("Huacai Chen <chenhc@lemote.com>");
206MODULE_DESCRIPTION("Loongson CPU Hwmon driver");
207MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index b5b5c3d485d6..6149ae01e11f 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1111,6 +1111,16 @@ config RTC_DRV_DAVINCI
1111 This driver can also be built as a module. If so, the module 1111 This driver can also be built as a module. If so, the module
1112 will be called rtc-davinci. 1112 will be called rtc-davinci.
1113 1113
1114config RTC_DRV_DIGICOLOR
1115 tristate "Conexant Digicolor RTC"
1116 depends on ARCH_DIGICOLOR
1117 help
1118 If you say yes here you get support for the RTC on Conexant
1119 Digicolor platforms. This currently includes the CX92755 SoC.
1120
1121 This driver can also be built as a module. If so, the module
1122 will be called rtc-digicolor.
1123
1114config RTC_DRV_IMXDI 1124config RTC_DRV_IMXDI
1115 tristate "Freescale IMX DryIce Real Time Clock" 1125 tristate "Freescale IMX DryIce Real Time Clock"
1116 depends on ARCH_MXC 1126 depends on ARCH_MXC
@@ -1121,11 +1131,11 @@ config RTC_DRV_IMXDI
1121 will be called "rtc-imxdi". 1131 will be called "rtc-imxdi".
1122 1132
1123config RTC_DRV_OMAP 1133config RTC_DRV_OMAP
1124 tristate "TI OMAP1" 1134 tristate "TI OMAP Real Time Clock"
1125 depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_DAVINCI_DA8XX || SOC_AM33XX 1135 depends on ARCH_OMAP || ARCH_DAVINCI
1126 help 1136 help
1127 Say "yes" here to support the on chip real time clock 1137 Say "yes" here to support the on chip real time clock
1128 present on TI OMAP1, AM33xx and DA8xx/OMAP-L13x. 1138 present on TI OMAP1, AM33xx, DA8xx/OMAP-L13x, AM43xx and DRA7xx.
1129 1139
1130 This driver can also be built as a module, if so, module 1140 This driver can also be built as a module, if so, module
1131 will be called rtc-omap. 1141 will be called rtc-omap.
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 69c87062b098..c31731c29762 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_RTC_DRV_DA9052) += rtc-da9052.o
40obj-$(CONFIG_RTC_DRV_DA9055) += rtc-da9055.o 40obj-$(CONFIG_RTC_DRV_DA9055) += rtc-da9055.o
41obj-$(CONFIG_RTC_DRV_DA9063) += rtc-da9063.o 41obj-$(CONFIG_RTC_DRV_DA9063) += rtc-da9063.o
42obj-$(CONFIG_RTC_DRV_DAVINCI) += rtc-davinci.o 42obj-$(CONFIG_RTC_DRV_DAVINCI) += rtc-davinci.o
43obj-$(CONFIG_RTC_DRV_DIGICOLOR) += rtc-digicolor.o
43obj-$(CONFIG_RTC_DRV_DM355EVM) += rtc-dm355evm.o 44obj-$(CONFIG_RTC_DRV_DM355EVM) += rtc-dm355evm.o
44obj-$(CONFIG_RTC_DRV_VRTC) += rtc-mrst.o 45obj-$(CONFIG_RTC_DRV_VRTC) += rtc-mrst.o
45obj-$(CONFIG_RTC_DRV_DS1216) += rtc-ds1216.o 46obj-$(CONFIG_RTC_DRV_DS1216) += rtc-ds1216.o
diff --git a/drivers/rtc/class.c b/drivers/rtc/class.c
index c29ba7e14304..ea2a315df6b7 100644
--- a/drivers/rtc/class.c
+++ b/drivers/rtc/class.c
@@ -221,15 +221,15 @@ struct rtc_device *rtc_device_register(const char *name, struct device *dev,
221 rtc->pie_timer.function = rtc_pie_update_irq; 221 rtc->pie_timer.function = rtc_pie_update_irq;
222 rtc->pie_enabled = 0; 222 rtc->pie_enabled = 0;
223 223
224 strlcpy(rtc->name, name, RTC_DEVICE_NAME_SIZE);
225 dev_set_name(&rtc->dev, "rtc%d", id);
226
224 /* Check to see if there is an ALARM already set in hw */ 227 /* Check to see if there is an ALARM already set in hw */
225 err = __rtc_read_alarm(rtc, &alrm); 228 err = __rtc_read_alarm(rtc, &alrm);
226 229
227 if (!err && !rtc_valid_tm(&alrm.time)) 230 if (!err && !rtc_valid_tm(&alrm.time))
228 rtc_initialize_alarm(rtc, &alrm); 231 rtc_initialize_alarm(rtc, &alrm);
229 232
230 strlcpy(rtc->name, name, RTC_DEVICE_NAME_SIZE);
231 dev_set_name(&rtc->dev, "rtc%d", id);
232
233 rtc_dev_prepare(rtc); 233 rtc_dev_prepare(rtc);
234 234
235 err = device_register(&rtc->dev); 235 err = device_register(&rtc->dev);
diff --git a/drivers/rtc/hctosys.c b/drivers/rtc/hctosys.c
index 6c719f23520a..e1cfa06810ef 100644
--- a/drivers/rtc/hctosys.c
+++ b/drivers/rtc/hctosys.c
@@ -9,6 +9,8 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10*/ 10*/
11 11
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
12#include <linux/rtc.h> 14#include <linux/rtc.h>
13 15
14/* IMPORTANT: the RTC only stores whole seconds. It is arbitrary 16/* IMPORTANT: the RTC only stores whole seconds. It is arbitrary
@@ -32,8 +34,8 @@ static int __init rtc_hctosys(void)
32 struct rtc_device *rtc = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE); 34 struct rtc_device *rtc = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE);
33 35
34 if (rtc == NULL) { 36 if (rtc == NULL) {
35 pr_err("%s: unable to open rtc device (%s)\n", 37 pr_info("unable to open rtc device (%s)\n",
36 __FILE__, CONFIG_RTC_HCTOSYS_DEVICE); 38 CONFIG_RTC_HCTOSYS_DEVICE);
37 goto err_open; 39 goto err_open;
38 } 40 }
39 41
diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c
index d43ee409a5f2..166fc60d8b55 100644
--- a/drivers/rtc/interface.c
+++ b/drivers/rtc/interface.c
@@ -31,13 +31,14 @@ static int __rtc_read_time(struct rtc_device *rtc, struct rtc_time *tm)
31 memset(tm, 0, sizeof(struct rtc_time)); 31 memset(tm, 0, sizeof(struct rtc_time));
32 err = rtc->ops->read_time(rtc->dev.parent, tm); 32 err = rtc->ops->read_time(rtc->dev.parent, tm);
33 if (err < 0) { 33 if (err < 0) {
34 dev_err(&rtc->dev, "read_time: fail to read\n"); 34 dev_dbg(&rtc->dev, "read_time: fail to read: %d\n",
35 err);
35 return err; 36 return err;
36 } 37 }
37 38
38 err = rtc_valid_tm(tm); 39 err = rtc_valid_tm(tm);
39 if (err < 0) 40 if (err < 0)
40 dev_err(&rtc->dev, "read_time: rtc_time isn't valid\n"); 41 dev_dbg(&rtc->dev, "read_time: rtc_time isn't valid\n");
41 } 42 }
42 return err; 43 return err;
43} 44}
diff --git a/drivers/rtc/rtc-ab-b5ze-s3.c b/drivers/rtc/rtc-ab-b5ze-s3.c
index cfc2ef98d393..b5cbc1bf5a3e 100644
--- a/drivers/rtc/rtc-ab-b5ze-s3.c
+++ b/drivers/rtc/rtc-ab-b5ze-s3.c
@@ -881,7 +881,7 @@ static const struct rtc_class_ops rtc_ops = {
881 .alarm_irq_enable = abb5zes3_rtc_alarm_irq_enable, 881 .alarm_irq_enable = abb5zes3_rtc_alarm_irq_enable,
882}; 882};
883 883
884static struct regmap_config abb5zes3_rtc_regmap_config = { 884static const struct regmap_config abb5zes3_rtc_regmap_config = {
885 .reg_bits = 8, 885 .reg_bits = 8,
886 .val_bits = 8, 886 .val_bits = 8,
887}; 887};
diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c
index b283a1a573b3..35efd3f75b18 100644
--- a/drivers/rtc/rtc-at91rm9200.c
+++ b/drivers/rtc/rtc-at91rm9200.c
@@ -37,9 +37,9 @@
37#include "rtc-at91rm9200.h" 37#include "rtc-at91rm9200.h"
38 38
39#define at91_rtc_read(field) \ 39#define at91_rtc_read(field) \
40 __raw_readl(at91_rtc_regs + field) 40 readl_relaxed(at91_rtc_regs + field)
41#define at91_rtc_write(field, val) \ 41#define at91_rtc_write(field, val) \
42 __raw_writel((val), at91_rtc_regs + field) 42 writel_relaxed((val), at91_rtc_regs + field)
43 43
44#define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */ 44#define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */
45 45
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index 87647f459198..a82556a0757a 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -28,6 +28,9 @@
28 * interrupts disabled, holding the global rtc_lock, to exclude those 28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems. 29 * other drivers and utilities on correctly configured systems.
30 */ 30 */
31
32#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
31#include <linux/kernel.h> 34#include <linux/kernel.h>
32#include <linux/module.h> 35#include <linux/module.h>
33#include <linux/init.h> 36#include <linux/init.h>
@@ -385,8 +388,7 @@ static bool alarm_disable_quirk;
385static int __init set_alarm_disable_quirk(const struct dmi_system_id *id) 388static int __init set_alarm_disable_quirk(const struct dmi_system_id *id)
386{ 389{
387 alarm_disable_quirk = true; 390 alarm_disable_quirk = true;
388 pr_info("rtc-cmos: BIOS has alarm-disable quirk. "); 391 pr_info("BIOS has alarm-disable quirk - RTC alarms disabled\n");
389 pr_info("RTC alarms disabled\n");
390 return 0; 392 return 0;
391} 393}
392 394
diff --git a/drivers/rtc/rtc-da9052.c b/drivers/rtc/rtc-da9052.c
index 613c43b7e9ae..1ba4371cbc2d 100644
--- a/drivers/rtc/rtc-da9052.c
+++ b/drivers/rtc/rtc-da9052.c
@@ -16,6 +16,7 @@
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/rtc.h> 17#include <linux/rtc.h>
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/delay.h>
19 20
20#include <linux/mfd/da9052/da9052.h> 21#include <linux/mfd/da9052/da9052.h>
21#include <linux/mfd/da9052/reg.h> 22#include <linux/mfd/da9052/reg.h>
@@ -23,6 +24,8 @@
23#define rtc_err(rtc, fmt, ...) \ 24#define rtc_err(rtc, fmt, ...) \
24 dev_err(rtc->da9052->dev, "%s: " fmt, __func__, ##__VA_ARGS__) 25 dev_err(rtc->da9052->dev, "%s: " fmt, __func__, ##__VA_ARGS__)
25 26
27#define DA9052_GET_TIME_RETRIES 5
28
26struct da9052_rtc { 29struct da9052_rtc {
27 struct rtc_device *rtc; 30 struct rtc_device *rtc;
28 struct da9052 *da9052; 31 struct da9052 *da9052;
@@ -58,22 +61,43 @@ static irqreturn_t da9052_rtc_irq(int irq, void *data)
58static int da9052_read_alarm(struct da9052_rtc *rtc, struct rtc_time *rtc_tm) 61static int da9052_read_alarm(struct da9052_rtc *rtc, struct rtc_time *rtc_tm)
59{ 62{
60 int ret; 63 int ret;
61 uint8_t v[5]; 64 uint8_t v[2][5];
65 int idx = 1;
66 int timeout = DA9052_GET_TIME_RETRIES;
62 67
63 ret = da9052_group_read(rtc->da9052, DA9052_ALARM_MI_REG, 5, v); 68 ret = da9052_group_read(rtc->da9052, DA9052_ALARM_MI_REG, 5, &v[0][0]);
64 if (ret != 0) { 69 if (ret) {
65 rtc_err(rtc, "Failed to group read ALM: %d\n", ret); 70 rtc_err(rtc, "Failed to group read ALM: %d\n", ret);
66 return ret; 71 return ret;
67 } 72 }
68 73
69 rtc_tm->tm_year = (v[4] & DA9052_RTC_YEAR) + 100; 74 do {
70 rtc_tm->tm_mon = (v[3] & DA9052_RTC_MONTH) - 1; 75 ret = da9052_group_read(rtc->da9052,
71 rtc_tm->tm_mday = v[2] & DA9052_RTC_DAY; 76 DA9052_ALARM_MI_REG, 5, &v[idx][0]);
72 rtc_tm->tm_hour = v[1] & DA9052_RTC_HOUR; 77 if (ret) {
73 rtc_tm->tm_min = v[0] & DA9052_RTC_MIN; 78 rtc_err(rtc, "Failed to group read ALM: %d\n", ret);
79 return ret;
80 }
74 81
75 ret = rtc_valid_tm(rtc_tm); 82 if (memcmp(&v[0][0], &v[1][0], 5) == 0) {
76 return ret; 83 rtc_tm->tm_year = (v[0][4] & DA9052_RTC_YEAR) + 100;
84 rtc_tm->tm_mon = (v[0][3] & DA9052_RTC_MONTH) - 1;
85 rtc_tm->tm_mday = v[0][2] & DA9052_RTC_DAY;
86 rtc_tm->tm_hour = v[0][1] & DA9052_RTC_HOUR;
87 rtc_tm->tm_min = v[0][0] & DA9052_RTC_MIN;
88
89 ret = rtc_valid_tm(rtc_tm);
90 return ret;
91 }
92
93 idx = (1-idx);
94 msleep(20);
95
96 } while (timeout--);
97
98 rtc_err(rtc, "Timed out reading alarm time\n");
99
100 return -EIO;
77} 101}
78 102
79static int da9052_set_alarm(struct da9052_rtc *rtc, struct rtc_time *rtc_tm) 103static int da9052_set_alarm(struct da9052_rtc *rtc, struct rtc_time *rtc_tm)
@@ -135,24 +159,45 @@ static int da9052_rtc_get_alarm_status(struct da9052_rtc *rtc)
135static int da9052_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm) 159static int da9052_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
136{ 160{
137 struct da9052_rtc *rtc = dev_get_drvdata(dev); 161 struct da9052_rtc *rtc = dev_get_drvdata(dev);
138 uint8_t v[6];
139 int ret; 162 int ret;
163 uint8_t v[2][6];
164 int idx = 1;
165 int timeout = DA9052_GET_TIME_RETRIES;
140 166
141 ret = da9052_group_read(rtc->da9052, DA9052_COUNT_S_REG, 6, v); 167 ret = da9052_group_read(rtc->da9052, DA9052_COUNT_S_REG, 6, &v[0][0]);
142 if (ret < 0) { 168 if (ret) {
143 rtc_err(rtc, "Failed to read RTC time : %d\n", ret); 169 rtc_err(rtc, "Failed to read RTC time : %d\n", ret);
144 return ret; 170 return ret;
145 } 171 }
146 172
147 rtc_tm->tm_year = (v[5] & DA9052_RTC_YEAR) + 100; 173 do {
148 rtc_tm->tm_mon = (v[4] & DA9052_RTC_MONTH) - 1; 174 ret = da9052_group_read(rtc->da9052,
149 rtc_tm->tm_mday = v[3] & DA9052_RTC_DAY; 175 DA9052_COUNT_S_REG, 6, &v[idx][0]);
150 rtc_tm->tm_hour = v[2] & DA9052_RTC_HOUR; 176 if (ret) {
151 rtc_tm->tm_min = v[1] & DA9052_RTC_MIN; 177 rtc_err(rtc, "Failed to read RTC time : %d\n", ret);
152 rtc_tm->tm_sec = v[0] & DA9052_RTC_SEC; 178 return ret;
179 }
153 180
154 ret = rtc_valid_tm(rtc_tm); 181 if (memcmp(&v[0][0], &v[1][0], 6) == 0) {
155 return ret; 182 rtc_tm->tm_year = (v[0][5] & DA9052_RTC_YEAR) + 100;
183 rtc_tm->tm_mon = (v[0][4] & DA9052_RTC_MONTH) - 1;
184 rtc_tm->tm_mday = v[0][3] & DA9052_RTC_DAY;
185 rtc_tm->tm_hour = v[0][2] & DA9052_RTC_HOUR;
186 rtc_tm->tm_min = v[0][1] & DA9052_RTC_MIN;
187 rtc_tm->tm_sec = v[0][0] & DA9052_RTC_SEC;
188
189 ret = rtc_valid_tm(rtc_tm);
190 return ret;
191 }
192
193 idx = (1-idx);
194 msleep(20);
195
196 } while (timeout--);
197
198 rtc_err(rtc, "Timed out reading time\n");
199
200 return -EIO;
156} 201}
157 202
158static int da9052_rtc_set_time(struct device *dev, struct rtc_time *tm) 203static int da9052_rtc_set_time(struct device *dev, struct rtc_time *tm)
@@ -161,6 +206,10 @@ static int da9052_rtc_set_time(struct device *dev, struct rtc_time *tm)
161 uint8_t v[6]; 206 uint8_t v[6];
162 int ret; 207 int ret;
163 208
209 /* DA9052 only has 6 bits for year - to represent 2000-2063 */
210 if ((tm->tm_year < 100) || (tm->tm_year > 163))
211 return -EINVAL;
212
164 rtc = dev_get_drvdata(dev); 213 rtc = dev_get_drvdata(dev);
165 214
166 v[0] = tm->tm_sec; 215 v[0] = tm->tm_sec;
@@ -198,6 +247,10 @@ static int da9052_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
198 struct rtc_time *tm = &alrm->time; 247 struct rtc_time *tm = &alrm->time;
199 struct da9052_rtc *rtc = dev_get_drvdata(dev); 248 struct da9052_rtc *rtc = dev_get_drvdata(dev);
200 249
250 /* DA9052 only has 6 bits for year - to represent 2000-2063 */
251 if ((tm->tm_year < 100) || (tm->tm_year > 163))
252 return -EINVAL;
253
201 ret = da9052_rtc_enable_alarm(rtc, 0); 254 ret = da9052_rtc_enable_alarm(rtc, 0);
202 if (ret < 0) 255 if (ret < 0)
203 return ret; 256 return ret;
@@ -256,6 +309,8 @@ static int da9052_rtc_probe(struct platform_device *pdev)
256 return ret; 309 return ret;
257 } 310 }
258 311
312 device_init_wakeup(&pdev->dev, true);
313
259 rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name, 314 rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
260 &da9052_rtc_ops, THIS_MODULE); 315 &da9052_rtc_ops, THIS_MODULE);
261 return PTR_ERR_OR_ZERO(rtc->rtc); 316 return PTR_ERR_OR_ZERO(rtc->rtc);
diff --git a/drivers/rtc/rtc-digicolor.c b/drivers/rtc/rtc-digicolor.c
new file mode 100644
index 000000000000..8d05596a6765
--- /dev/null
+++ b/drivers/rtc/rtc-digicolor.c
@@ -0,0 +1,227 @@
1/*
2 * Real Time Clock driver for Conexant Digicolor
3 *
4 * Copyright (C) 2015 Paradox Innovation Ltd.
5 *
6 * Author: Baruch Siach <baruch@tkos.co.il>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/io.h>
15#include <linux/iopoll.h>
16#include <linux/delay.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/rtc.h>
20#include <linux/of.h>
21
22#define DC_RTC_CONTROL 0x0
23#define DC_RTC_TIME 0x8
24#define DC_RTC_REFERENCE 0xc
25#define DC_RTC_ALARM 0x10
26#define DC_RTC_INTFLAG_CLEAR 0x14
27#define DC_RTC_INTENABLE 0x16
28
29#define DC_RTC_CMD_MASK 0xf
30#define DC_RTC_GO_BUSY BIT(7)
31
32#define CMD_NOP 0
33#define CMD_RESET 1
34#define CMD_WRITE 3
35#define CMD_READ 4
36
37#define CMD_DELAY_US (10*1000)
38#define CMD_TIMEOUT_US (500*CMD_DELAY_US)
39
40struct dc_rtc {
41 struct rtc_device *rtc_dev;
42 void __iomem *regs;
43};
44
45static int dc_rtc_cmds(struct dc_rtc *rtc, const u8 *cmds, int len)
46{
47 u8 val;
48 int i, ret;
49
50 for (i = 0; i < len; i++) {
51 writeb_relaxed((cmds[i] & DC_RTC_CMD_MASK) | DC_RTC_GO_BUSY,
52 rtc->regs + DC_RTC_CONTROL);
53 ret = readb_relaxed_poll_timeout(
54 rtc->regs + DC_RTC_CONTROL, val,
55 !(val & DC_RTC_GO_BUSY), CMD_DELAY_US, CMD_TIMEOUT_US);
56 if (ret < 0)
57 return ret;
58 }
59
60 return 0;
61}
62
63static int dc_rtc_read(struct dc_rtc *rtc, unsigned long *val)
64{
65 static const u8 read_cmds[] = {CMD_READ, CMD_NOP};
66 u32 reference, time1, time2;
67 int ret;
68
69 ret = dc_rtc_cmds(rtc, read_cmds, ARRAY_SIZE(read_cmds));
70 if (ret < 0)
71 return ret;
72
73 reference = readl_relaxed(rtc->regs + DC_RTC_REFERENCE);
74 time1 = readl_relaxed(rtc->regs + DC_RTC_TIME);
75 /* Read twice to ensure consistency */
76 while (1) {
77 time2 = readl_relaxed(rtc->regs + DC_RTC_TIME);
78 if (time1 == time2)
79 break;
80 time1 = time2;
81 }
82
83 *val = reference + time1;
84 return 0;
85}
86
87static int dc_rtc_write(struct dc_rtc *rtc, u32 val)
88{
89 static const u8 write_cmds[] = {CMD_WRITE, CMD_NOP, CMD_RESET, CMD_NOP};
90
91 writel_relaxed(val, rtc->regs + DC_RTC_REFERENCE);
92 return dc_rtc_cmds(rtc, write_cmds, ARRAY_SIZE(write_cmds));
93}
94
95static int dc_rtc_read_time(struct device *dev, struct rtc_time *tm)
96{
97 struct dc_rtc *rtc = dev_get_drvdata(dev);
98 unsigned long now;
99 int ret;
100
101 ret = dc_rtc_read(rtc, &now);
102 if (ret < 0)
103 return ret;
104 rtc_time64_to_tm(now, tm);
105
106 return 0;
107}
108
109static int dc_rtc_set_mmss(struct device *dev, unsigned long secs)
110{
111 struct dc_rtc *rtc = dev_get_drvdata(dev);
112
113 return dc_rtc_write(rtc, secs);
114}
115
116static int dc_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
117{
118 struct dc_rtc *rtc = dev_get_drvdata(dev);
119 u32 alarm_reg, reference;
120 unsigned long now;
121 int ret;
122
123 alarm_reg = readl_relaxed(rtc->regs + DC_RTC_ALARM);
124 reference = readl_relaxed(rtc->regs + DC_RTC_REFERENCE);
125 rtc_time64_to_tm(reference + alarm_reg, &alarm->time);
126
127 ret = dc_rtc_read(rtc, &now);
128 if (ret < 0)
129 return ret;
130
131 alarm->pending = alarm_reg + reference > now;
132 alarm->enabled = readl_relaxed(rtc->regs + DC_RTC_INTENABLE);
133
134 return 0;
135}
136
137static int dc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
138{
139 struct dc_rtc *rtc = dev_get_drvdata(dev);
140 time64_t alarm_time;
141 u32 reference;
142
143 alarm_time = rtc_tm_to_time64(&alarm->time);
144
145 reference = readl_relaxed(rtc->regs + DC_RTC_REFERENCE);
146 writel_relaxed(alarm_time - reference, rtc->regs + DC_RTC_ALARM);
147
148 writeb_relaxed(!!alarm->enabled, rtc->regs + DC_RTC_INTENABLE);
149
150 return 0;
151}
152
153static int dc_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
154{
155 struct dc_rtc *rtc = dev_get_drvdata(dev);
156
157 writeb_relaxed(!!enabled, rtc->regs + DC_RTC_INTENABLE);
158
159 return 0;
160}
161
162static struct rtc_class_ops dc_rtc_ops = {
163 .read_time = dc_rtc_read_time,
164 .set_mmss = dc_rtc_set_mmss,
165 .read_alarm = dc_rtc_read_alarm,
166 .set_alarm = dc_rtc_set_alarm,
167 .alarm_irq_enable = dc_rtc_alarm_irq_enable,
168};
169
170static irqreturn_t dc_rtc_irq(int irq, void *dev_id)
171{
172 struct dc_rtc *rtc = dev_id;
173
174 writeb_relaxed(1, rtc->regs + DC_RTC_INTFLAG_CLEAR);
175 rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
176
177 return IRQ_HANDLED;
178}
179
180static int __init dc_rtc_probe(struct platform_device *pdev)
181{
182 struct resource *res;
183 struct dc_rtc *rtc;
184 int irq, ret;
185
186 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
187 if (!rtc)
188 return -ENOMEM;
189
190 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
191 rtc->regs = devm_ioremap_resource(&pdev->dev, res);
192 if (IS_ERR(rtc->regs))
193 return PTR_ERR(rtc->regs);
194
195 irq = platform_get_irq(pdev, 0);
196 if (irq < 0)
197 return irq;
198 ret = devm_request_irq(&pdev->dev, irq, dc_rtc_irq, 0, pdev->name, rtc);
199 if (ret < 0)
200 return ret;
201
202 platform_set_drvdata(pdev, rtc);
203 rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, pdev->name,
204 &dc_rtc_ops, THIS_MODULE);
205 if (IS_ERR(rtc->rtc_dev))
206 return PTR_ERR(rtc->rtc_dev);
207
208 return 0;
209}
210
211static const struct of_device_id dc_dt_ids[] = {
212 { .compatible = "cnxt,cx92755-rtc" },
213 { /* sentinel */ }
214};
215MODULE_DEVICE_TABLE(of, dc_dt_ids);
216
217static struct platform_driver dc_rtc_driver = {
218 .driver = {
219 .name = "digicolor_rtc",
220 .of_match_table = of_match_ptr(dc_dt_ids),
221 },
222};
223module_platform_driver_probe(dc_rtc_driver, dc_rtc_probe);
224
225MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
226MODULE_DESCRIPTION("Conexant Digicolor Realtime Clock Driver (RTC)");
227MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c
index 8605fde394b2..167783fa7ac1 100644
--- a/drivers/rtc/rtc-ds1374.c
+++ b/drivers/rtc/rtc-ds1374.c
@@ -18,6 +18,8 @@
18 * "Sending and receiving", using SMBus level communication is preferred. 18 * "Sending and receiving", using SMBus level communication is preferred.
19 */ 19 */
20 20
21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
21#include <linux/kernel.h> 23#include <linux/kernel.h>
22#include <linux/module.h> 24#include <linux/module.h>
23#include <linux/interrupt.h> 25#include <linux/interrupt.h>
@@ -406,7 +408,7 @@ static int ds1374_wdt_settimeout(unsigned int timeout)
406 /* Set new watchdog time */ 408 /* Set new watchdog time */
407 ret = ds1374_write_rtc(save_client, timeout, DS1374_REG_WDALM0, 3); 409 ret = ds1374_write_rtc(save_client, timeout, DS1374_REG_WDALM0, 3);
408 if (ret) { 410 if (ret) {
409 pr_info("rtc-ds1374 - couldn't set new watchdog time\n"); 411 pr_info("couldn't set new watchdog time\n");
410 goto out; 412 goto out;
411 } 413 }
412 414
@@ -539,12 +541,12 @@ static long ds1374_wdt_ioctl(struct file *file, unsigned int cmd,
539 return -EFAULT; 541 return -EFAULT;
540 542
541 if (options & WDIOS_DISABLECARD) { 543 if (options & WDIOS_DISABLECARD) {
542 pr_info("rtc-ds1374: disable watchdog\n"); 544 pr_info("disable watchdog\n");
543 ds1374_wdt_disable(); 545 ds1374_wdt_disable();
544 } 546 }
545 547
546 if (options & WDIOS_ENABLECARD) { 548 if (options & WDIOS_ENABLECARD) {
547 pr_info("rtc-ds1374: enable watchdog\n"); 549 pr_info("enable watchdog\n");
548 ds1374_wdt_settimeout(wdt_margin); 550 ds1374_wdt_settimeout(wdt_margin);
549 ds1374_wdt_ping(); 551 ds1374_wdt_ping();
550 } 552 }
diff --git a/drivers/rtc/rtc-ds1685.c b/drivers/rtc/rtc-ds1685.c
index 803869c7d7c2..818a3635a8c8 100644
--- a/drivers/rtc/rtc-ds1685.c
+++ b/drivers/rtc/rtc-ds1685.c
@@ -16,6 +16,8 @@
16 * published by the Free Software Foundation. 16 * published by the Free Software Foundation.
17 */ 17 */
18 18
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
19#include <linux/bcd.h> 21#include <linux/bcd.h>
20#include <linux/delay.h> 22#include <linux/delay.h>
21#include <linux/io.h> 23#include <linux/io.h>
@@ -799,7 +801,7 @@ ds1685_rtc_proc(struct device *dev, struct seq_file *seq)
799 struct platform_device *pdev = to_platform_device(dev); 801 struct platform_device *pdev = to_platform_device(dev);
800 struct ds1685_priv *rtc = platform_get_drvdata(pdev); 802 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
801 u8 ctrla, ctrlb, ctrlc, ctrld, ctrl4a, ctrl4b, ssn[8]; 803 u8 ctrla, ctrlb, ctrlc, ctrld, ctrl4a, ctrl4b, ssn[8];
802 char *model = '\0'; 804 char *model;
803#ifdef CONFIG_RTC_DS1685_PROC_REGS 805#ifdef CONFIG_RTC_DS1685_PROC_REGS
804 char bits[NUM_REGS][(NUM_BITS * NUM_SPACES) + NUM_BITS + 1]; 806 char bits[NUM_REGS][(NUM_BITS * NUM_SPACES) + NUM_BITS + 1];
805#endif 807#endif
@@ -2139,7 +2141,6 @@ ds1685_rtc_remove(struct platform_device *pdev)
2139static struct platform_driver ds1685_rtc_driver = { 2141static struct platform_driver ds1685_rtc_driver = {
2140 .driver = { 2142 .driver = {
2141 .name = "rtc-ds1685", 2143 .name = "rtc-ds1685",
2142 .owner = THIS_MODULE,
2143 }, 2144 },
2144 .probe = ds1685_rtc_probe, 2145 .probe = ds1685_rtc_probe,
2145 .remove = ds1685_rtc_remove, 2146 .remove = ds1685_rtc_remove,
@@ -2175,7 +2176,7 @@ module_exit(ds1685_rtc_exit);
2175 * ds1685_rtc_poweroff - uses the RTC chip to power the system off. 2176 * ds1685_rtc_poweroff - uses the RTC chip to power the system off.
2176 * @pdev: pointer to platform_device structure. 2177 * @pdev: pointer to platform_device structure.
2177 */ 2178 */
2178extern void __noreturn 2179void __noreturn
2179ds1685_rtc_poweroff(struct platform_device *pdev) 2180ds1685_rtc_poweroff(struct platform_device *pdev)
2180{ 2181{
2181 u8 ctrla, ctrl4a, ctrl4b; 2182 u8 ctrla, ctrl4a, ctrl4b;
@@ -2183,7 +2184,7 @@ ds1685_rtc_poweroff(struct platform_device *pdev)
2183 2184
2184 /* Check for valid RTC data, else, spin forever. */ 2185 /* Check for valid RTC data, else, spin forever. */
2185 if (unlikely(!pdev)) { 2186 if (unlikely(!pdev)) {
2186 pr_emerg("rtc-ds1685: platform device data not available, spinning forever ...\n"); 2187 pr_emerg("platform device data not available, spinning forever ...\n");
2187 unreachable(); 2188 unreachable();
2188 } else { 2189 } else {
2189 /* Get the rtc data. */ 2190 /* Get the rtc data. */
diff --git a/drivers/rtc/rtc-ds3232.c b/drivers/rtc/rtc-ds3232.c
index adaf06c41479..7e48e532214f 100644
--- a/drivers/rtc/rtc-ds3232.c
+++ b/drivers/rtc/rtc-ds3232.c
@@ -15,6 +15,8 @@
15 * "Sending and receiving", using SMBus level communication is preferred. 15 * "Sending and receiving", using SMBus level communication is preferred.
16 */ 16 */
17 17
18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
18#include <linux/kernel.h> 20#include <linux/kernel.h>
19#include <linux/module.h> 21#include <linux/module.h>
20#include <linux/interrupt.h> 22#include <linux/interrupt.h>
@@ -373,8 +375,8 @@ static void ds3232_work(struct work_struct *work)
373 if (stat & DS3232_REG_SR_A1F) { 375 if (stat & DS3232_REG_SR_A1F) {
374 control = i2c_smbus_read_byte_data(client, DS3232_REG_CR); 376 control = i2c_smbus_read_byte_data(client, DS3232_REG_CR);
375 if (control < 0) { 377 if (control < 0) {
376 pr_warn("Read DS3232 Control Register error." 378 pr_warn("Read Control Register error - Disable IRQ%d\n",
377 "Disable IRQ%d.\n", client->irq); 379 client->irq);
378 } else { 380 } else {
379 /* disable alarm1 interrupt */ 381 /* disable alarm1 interrupt */
380 control &= ~(DS3232_REG_CR_A1IE); 382 control &= ~(DS3232_REG_CR_A1IE);
diff --git a/drivers/rtc/rtc-efi-platform.c b/drivers/rtc/rtc-efi-platform.c
index b40fbe332af4..1a7f1d1bc174 100644
--- a/drivers/rtc/rtc-efi-platform.c
+++ b/drivers/rtc/rtc-efi-platform.c
@@ -8,6 +8,9 @@
8 * Copyright (C) 1999-2000 VA Linux Systems 8 * Copyright (C) 1999-2000 VA Linux Systems
9 * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com> 9 * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com>
10 */ 10 */
11
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
11#include <linux/init.h> 14#include <linux/init.h>
12#include <linux/kernel.h> 15#include <linux/kernel.h>
13#include <linux/module.h> 16#include <linux/module.h>
diff --git a/drivers/rtc/rtc-em3027.c b/drivers/rtc/rtc-em3027.c
index fccf36699245..4f4930a2004c 100644
--- a/drivers/rtc/rtc-em3027.c
+++ b/drivers/rtc/rtc-em3027.c
@@ -15,6 +15,7 @@
15#include <linux/rtc.h> 15#include <linux/rtc.h>
16#include <linux/bcd.h> 16#include <linux/bcd.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/of.h>
18 19
19/* Registers */ 20/* Registers */
20#define EM3027_REG_ON_OFF_CTRL 0x00 21#define EM3027_REG_ON_OFF_CTRL 0x00
@@ -135,10 +136,20 @@ static struct i2c_device_id em3027_id[] = {
135 { "em3027", 0 }, 136 { "em3027", 0 },
136 { } 137 { }
137}; 138};
139MODULE_DEVICE_TABLE(i2c, em3027_id);
140
141#ifdef CONFIG_OF
142static const struct of_device_id em3027_of_match[] = {
143 { .compatible = "emmicro,em3027", },
144 {}
145};
146MODULE_DEVICE_TABLE(of, em3027_of_match);
147#endif
138 148
139static struct i2c_driver em3027_driver = { 149static struct i2c_driver em3027_driver = {
140 .driver = { 150 .driver = {
141 .name = "rtc-em3027", 151 .name = "rtc-em3027",
152 .of_match_table = of_match_ptr(em3027_of_match),
142 }, 153 },
143 .probe = &em3027_probe, 154 .probe = &em3027_probe,
144 .id_table = em3027_id, 155 .id_table = em3027_id,
diff --git a/drivers/rtc/rtc-hym8563.c b/drivers/rtc/rtc-hym8563.c
index b936bb4096b5..0f710e98538f 100644
--- a/drivers/rtc/rtc-hym8563.c
+++ b/drivers/rtc/rtc-hym8563.c
@@ -66,7 +66,7 @@
66#define HYM8563_ALM_BIT_DISABLE BIT(7) 66#define HYM8563_ALM_BIT_DISABLE BIT(7)
67 67
68#define HYM8563_CLKOUT 0x0d 68#define HYM8563_CLKOUT 0x0d
69#define HYM8563_CLKOUT_DISABLE BIT(7) 69#define HYM8563_CLKOUT_ENABLE BIT(7)
70#define HYM8563_CLKOUT_32768 0 70#define HYM8563_CLKOUT_32768 0
71#define HYM8563_CLKOUT_1024 1 71#define HYM8563_CLKOUT_1024 1
72#define HYM8563_CLKOUT_32 2 72#define HYM8563_CLKOUT_32 2
@@ -309,7 +309,7 @@ static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
309 struct i2c_client *client = hym8563->client; 309 struct i2c_client *client = hym8563->client;
310 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT); 310 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
311 311
312 if (ret < 0 || ret & HYM8563_CLKOUT_DISABLE) 312 if (ret < 0)
313 return 0; 313 return 0;
314 314
315 ret &= HYM8563_CLKOUT_MASK; 315 ret &= HYM8563_CLKOUT_MASK;
@@ -360,9 +360,9 @@ static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
360 return ret; 360 return ret;
361 361
362 if (enable) 362 if (enable)
363 ret &= ~HYM8563_CLKOUT_DISABLE; 363 ret |= HYM8563_CLKOUT_ENABLE;
364 else 364 else
365 ret |= HYM8563_CLKOUT_DISABLE; 365 ret &= ~HYM8563_CLKOUT_ENABLE;
366 366
367 return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret); 367 return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
368} 368}
@@ -386,7 +386,7 @@ static int hym8563_clkout_is_prepared(struct clk_hw *hw)
386 if (ret < 0) 386 if (ret < 0)
387 return ret; 387 return ret;
388 388
389 return !(ret & HYM8563_CLKOUT_DISABLE); 389 return !!(ret & HYM8563_CLKOUT_ENABLE);
390} 390}
391 391
392static const struct clk_ops hym8563_clkout_ops = { 392static const struct clk_ops hym8563_clkout_ops = {
@@ -407,7 +407,7 @@ static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
407 int ret; 407 int ret;
408 408
409 ret = i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, 409 ret = i2c_smbus_write_byte_data(client, HYM8563_CLKOUT,
410 HYM8563_CLKOUT_DISABLE); 410 0);
411 if (ret < 0) 411 if (ret < 0)
412 return ERR_PTR(ret); 412 return ERR_PTR(ret);
413 413
diff --git a/drivers/rtc/rtc-m41t80.c b/drivers/rtc/rtc-m41t80.c
index 7ff7427c2e6a..a82937e2f824 100644
--- a/drivers/rtc/rtc-m41t80.c
+++ b/drivers/rtc/rtc-m41t80.c
@@ -13,6 +13,8 @@
13 * 13 *
14 */ 14 */
15 15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
16#include <linux/bcd.h> 18#include <linux/bcd.h>
17#include <linux/i2c.h> 19#include <linux/i2c.h>
18#include <linux/init.h> 20#include <linux/init.h>
@@ -513,12 +515,12 @@ static int wdt_ioctl(struct file *file, unsigned int cmd,
513 return -EFAULT; 515 return -EFAULT;
514 516
515 if (rv & WDIOS_DISABLECARD) { 517 if (rv & WDIOS_DISABLECARD) {
516 pr_info("rtc-m41t80: disable watchdog\n"); 518 pr_info("disable watchdog\n");
517 wdt_disable(); 519 wdt_disable();
518 } 520 }
519 521
520 if (rv & WDIOS_ENABLECARD) { 522 if (rv & WDIOS_ENABLECARD) {
521 pr_info("rtc-m41t80: enable watchdog\n"); 523 pr_info("enable watchdog\n");
522 wdt_ping(); 524 wdt_ping();
523 } 525 }
524 526
diff --git a/drivers/rtc/rtc-max77686.c b/drivers/rtc/rtc-max77686.c
index 9d71328e59b9..7632a87784c3 100644
--- a/drivers/rtc/rtc-max77686.c
+++ b/drivers/rtc/rtc-max77686.c
@@ -12,6 +12,8 @@
12 * 12 *
13 */ 13 */
14 14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
15#include <linux/slab.h> 17#include <linux/slab.h>
16#include <linux/rtc.h> 18#include <linux/rtc.h>
17#include <linux/delay.h> 19#include <linux/delay.h>
@@ -103,8 +105,8 @@ static int max77686_rtc_tm_to_data(struct rtc_time *tm, u8 *data)
103 data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0; 105 data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
104 106
105 if (tm->tm_year < 100) { 107 if (tm->tm_year < 100) {
106 pr_warn("%s: MAX77686 RTC cannot handle the year %d." 108 pr_warn("RTC cannot handle the year %d. Assume it's 2000.\n",
107 "Assume it's 2000.\n", __func__, 1900 + tm->tm_year); 109 1900 + tm->tm_year);
108 return -EINVAL; 110 return -EINVAL;
109 } 111 }
110 return 0; 112 return 0;
diff --git a/drivers/rtc/rtc-max8997.c b/drivers/rtc/rtc-max8997.c
index 67fbe559d535..9e02bcda0c09 100644
--- a/drivers/rtc/rtc-max8997.c
+++ b/drivers/rtc/rtc-max8997.c
@@ -12,6 +12,8 @@
12 * 12 *
13 */ 13 */
14 14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
15#include <linux/slab.h> 17#include <linux/slab.h>
16#include <linux/rtc.h> 18#include <linux/rtc.h>
17#include <linux/delay.h> 19#include <linux/delay.h>
@@ -107,8 +109,8 @@ static int max8997_rtc_tm_to_data(struct rtc_time *tm, u8 *data)
107 data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0; 109 data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
108 110
109 if (tm->tm_year < 100) { 111 if (tm->tm_year < 100) {
110 pr_warn("%s: MAX8997 RTC cannot handle the year %d." 112 pr_warn("RTC cannot handle the year %d. Assume it's 2000.\n",
111 "Assume it's 2000.\n", __func__, 1900 + tm->tm_year); 113 1900 + tm->tm_year);
112 return -EINVAL; 114 return -EINVAL;
113 } 115 }
114 return 0; 116 return 0;
@@ -424,7 +426,7 @@ static void max8997_rtc_enable_smpl(struct max8997_rtc_info *info, bool enable)
424 426
425 val = 0; 427 val = 0;
426 max8997_read_reg(info->rtc, MAX8997_RTC_WTSR_SMPL, &val); 428 max8997_read_reg(info->rtc, MAX8997_RTC_WTSR_SMPL, &val);
427 pr_info("%s: WTSR_SMPL(0x%02x)\n", __func__, val); 429 pr_info("WTSR_SMPL(0x%02x)\n", val);
428} 430}
429 431
430static int max8997_rtc_init_reg(struct max8997_rtc_info *info) 432static int max8997_rtc_init_reg(struct max8997_rtc_info *info)
diff --git a/drivers/rtc/rtc-msm6242.c b/drivers/rtc/rtc-msm6242.c
index 9bf877bdf836..c1c5c4e3b3b4 100644
--- a/drivers/rtc/rtc-msm6242.c
+++ b/drivers/rtc/rtc-msm6242.c
@@ -7,6 +7,8 @@
7 * Copyright (C) 1993 Hamish Macdonald 7 * Copyright (C) 1993 Hamish Macdonald
8 */ 8 */
9 9
10#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11
10#include <linux/delay.h> 12#include <linux/delay.h>
11#include <linux/io.h> 13#include <linux/io.h>
12#include <linux/kernel.h> 14#include <linux/kernel.h>
@@ -111,7 +113,7 @@ static void msm6242_lock(struct msm6242_priv *priv)
111 } 113 }
112 114
113 if (!cnt) 115 if (!cnt)
114 pr_warn("msm6242: timed out waiting for RTC (0x%x)\n", 116 pr_warn("timed out waiting for RTC (0x%x)\n",
115 msm6242_read(priv, MSM6242_CD)); 117 msm6242_read(priv, MSM6242_CD));
116} 118}
117 119
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 8e5851aa4369..8b6355ffaff9 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -118,12 +118,15 @@
118#define KICK0_VALUE 0x83e70b13 118#define KICK0_VALUE 0x83e70b13
119#define KICK1_VALUE 0x95a4f1e0 119#define KICK1_VALUE 0x95a4f1e0
120 120
121struct omap_rtc;
122
121struct omap_rtc_device_type { 123struct omap_rtc_device_type {
122 bool has_32kclk_en; 124 bool has_32kclk_en;
123 bool has_kicker;
124 bool has_irqwakeen; 125 bool has_irqwakeen;
125 bool has_pmic_mode; 126 bool has_pmic_mode;
126 bool has_power_up_reset; 127 bool has_power_up_reset;
128 void (*lock)(struct omap_rtc *rtc);
129 void (*unlock)(struct omap_rtc *rtc);
127}; 130};
128 131
129struct omap_rtc { 132struct omap_rtc {
@@ -156,6 +159,26 @@ static inline void rtc_writel(struct omap_rtc *rtc, unsigned int reg, u32 val)
156 writel(val, rtc->base + reg); 159 writel(val, rtc->base + reg);
157} 160}
158 161
162static void am3352_rtc_unlock(struct omap_rtc *rtc)
163{
164 rtc_writel(rtc, OMAP_RTC_KICK0_REG, KICK0_VALUE);
165 rtc_writel(rtc, OMAP_RTC_KICK1_REG, KICK1_VALUE);
166}
167
168static void am3352_rtc_lock(struct omap_rtc *rtc)
169{
170 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
171 rtc_writel(rtc, OMAP_RTC_KICK1_REG, 0);
172}
173
174static void default_rtc_unlock(struct omap_rtc *rtc)
175{
176}
177
178static void default_rtc_lock(struct omap_rtc *rtc)
179{
180}
181
159/* 182/*
160 * We rely on the rtc framework to handle locking (rtc->ops_lock), 183 * We rely on the rtc framework to handle locking (rtc->ops_lock),
161 * so the only other requirement is that register accesses which 184 * so the only other requirement is that register accesses which
@@ -186,7 +209,9 @@ static irqreturn_t rtc_irq(int irq, void *dev_id)
186 209
187 /* alarm irq? */ 210 /* alarm irq? */
188 if (irq_data & OMAP_RTC_STATUS_ALARM) { 211 if (irq_data & OMAP_RTC_STATUS_ALARM) {
212 rtc->type->unlock(rtc);
189 rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM); 213 rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM);
214 rtc->type->lock(rtc);
190 events |= RTC_IRQF | RTC_AF; 215 events |= RTC_IRQF | RTC_AF;
191 } 216 }
192 217
@@ -218,9 +243,11 @@ static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
218 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN; 243 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
219 } 244 }
220 rtc_wait_not_busy(rtc); 245 rtc_wait_not_busy(rtc);
246 rtc->type->unlock(rtc);
221 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg); 247 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
222 if (rtc->type->has_irqwakeen) 248 if (rtc->type->has_irqwakeen)
223 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg); 249 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
250 rtc->type->lock(rtc);
224 local_irq_enable(); 251 local_irq_enable();
225 252
226 return 0; 253 return 0;
@@ -293,12 +320,14 @@ static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
293 local_irq_disable(); 320 local_irq_disable();
294 rtc_wait_not_busy(rtc); 321 rtc_wait_not_busy(rtc);
295 322
323 rtc->type->unlock(rtc);
296 rtc_write(rtc, OMAP_RTC_YEARS_REG, tm->tm_year); 324 rtc_write(rtc, OMAP_RTC_YEARS_REG, tm->tm_year);
297 rtc_write(rtc, OMAP_RTC_MONTHS_REG, tm->tm_mon); 325 rtc_write(rtc, OMAP_RTC_MONTHS_REG, tm->tm_mon);
298 rtc_write(rtc, OMAP_RTC_DAYS_REG, tm->tm_mday); 326 rtc_write(rtc, OMAP_RTC_DAYS_REG, tm->tm_mday);
299 rtc_write(rtc, OMAP_RTC_HOURS_REG, tm->tm_hour); 327 rtc_write(rtc, OMAP_RTC_HOURS_REG, tm->tm_hour);
300 rtc_write(rtc, OMAP_RTC_MINUTES_REG, tm->tm_min); 328 rtc_write(rtc, OMAP_RTC_MINUTES_REG, tm->tm_min);
301 rtc_write(rtc, OMAP_RTC_SECONDS_REG, tm->tm_sec); 329 rtc_write(rtc, OMAP_RTC_SECONDS_REG, tm->tm_sec);
330 rtc->type->lock(rtc);
302 331
303 local_irq_enable(); 332 local_irq_enable();
304 333
@@ -341,6 +370,7 @@ static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
341 local_irq_disable(); 370 local_irq_disable();
342 rtc_wait_not_busy(rtc); 371 rtc_wait_not_busy(rtc);
343 372
373 rtc->type->unlock(rtc);
344 rtc_write(rtc, OMAP_RTC_ALARM_YEARS_REG, alm->time.tm_year); 374 rtc_write(rtc, OMAP_RTC_ALARM_YEARS_REG, alm->time.tm_year);
345 rtc_write(rtc, OMAP_RTC_ALARM_MONTHS_REG, alm->time.tm_mon); 375 rtc_write(rtc, OMAP_RTC_ALARM_MONTHS_REG, alm->time.tm_mon);
346 rtc_write(rtc, OMAP_RTC_ALARM_DAYS_REG, alm->time.tm_mday); 376 rtc_write(rtc, OMAP_RTC_ALARM_DAYS_REG, alm->time.tm_mday);
@@ -362,6 +392,7 @@ static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
362 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg); 392 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
363 if (rtc->type->has_irqwakeen) 393 if (rtc->type->has_irqwakeen)
364 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg); 394 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
395 rtc->type->lock(rtc);
365 396
366 local_irq_enable(); 397 local_irq_enable();
367 398
@@ -391,6 +422,7 @@ static void omap_rtc_power_off(void)
391 unsigned long now; 422 unsigned long now;
392 u32 val; 423 u32 val;
393 424
425 rtc->type->unlock(rtc);
394 /* enable pmic_power_en control */ 426 /* enable pmic_power_en control */
395 val = rtc_readl(rtc, OMAP_RTC_PMIC_REG); 427 val = rtc_readl(rtc, OMAP_RTC_PMIC_REG);
396 rtc_writel(rtc, OMAP_RTC_PMIC_REG, val | OMAP_RTC_PMIC_POWER_EN_EN); 428 rtc_writel(rtc, OMAP_RTC_PMIC_REG, val | OMAP_RTC_PMIC_POWER_EN_EN);
@@ -423,6 +455,7 @@ static void omap_rtc_power_off(void)
423 val = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG); 455 val = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
424 rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG, 456 rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG,
425 val | OMAP_RTC_INTERRUPTS_IT_ALARM2); 457 val | OMAP_RTC_INTERRUPTS_IT_ALARM2);
458 rtc->type->lock(rtc);
426 459
427 /* 460 /*
428 * Wait for alarm to trigger (within two seconds) and external PMIC to 461 * Wait for alarm to trigger (within two seconds) and external PMIC to
@@ -442,17 +475,21 @@ static struct rtc_class_ops omap_rtc_ops = {
442 475
443static const struct omap_rtc_device_type omap_rtc_default_type = { 476static const struct omap_rtc_device_type omap_rtc_default_type = {
444 .has_power_up_reset = true, 477 .has_power_up_reset = true,
478 .lock = default_rtc_lock,
479 .unlock = default_rtc_unlock,
445}; 480};
446 481
447static const struct omap_rtc_device_type omap_rtc_am3352_type = { 482static const struct omap_rtc_device_type omap_rtc_am3352_type = {
448 .has_32kclk_en = true, 483 .has_32kclk_en = true,
449 .has_kicker = true,
450 .has_irqwakeen = true, 484 .has_irqwakeen = true,
451 .has_pmic_mode = true, 485 .has_pmic_mode = true,
486 .lock = am3352_rtc_lock,
487 .unlock = am3352_rtc_unlock,
452}; 488};
453 489
454static const struct omap_rtc_device_type omap_rtc_da830_type = { 490static const struct omap_rtc_device_type omap_rtc_da830_type = {
455 .has_kicker = true, 491 .lock = am3352_rtc_lock,
492 .unlock = am3352_rtc_unlock,
456}; 493};
457 494
458static const struct platform_device_id omap_rtc_id_table[] = { 495static const struct platform_device_id omap_rtc_id_table[] = {
@@ -484,7 +521,7 @@ static const struct of_device_id omap_rtc_of_match[] = {
484}; 521};
485MODULE_DEVICE_TABLE(of, omap_rtc_of_match); 522MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
486 523
487static int __init omap_rtc_probe(struct platform_device *pdev) 524static int omap_rtc_probe(struct platform_device *pdev)
488{ 525{
489 struct omap_rtc *rtc; 526 struct omap_rtc *rtc;
490 struct resource *res; 527 struct resource *res;
@@ -527,10 +564,7 @@ static int __init omap_rtc_probe(struct platform_device *pdev)
527 pm_runtime_enable(&pdev->dev); 564 pm_runtime_enable(&pdev->dev);
528 pm_runtime_get_sync(&pdev->dev); 565 pm_runtime_get_sync(&pdev->dev);
529 566
530 if (rtc->type->has_kicker) { 567 rtc->type->unlock(rtc);
531 rtc_writel(rtc, OMAP_RTC_KICK0_REG, KICK0_VALUE);
532 rtc_writel(rtc, OMAP_RTC_KICK1_REG, KICK1_VALUE);
533 }
534 568
535 /* 569 /*
536 * disable interrupts 570 * disable interrupts
@@ -593,6 +627,8 @@ static int __init omap_rtc_probe(struct platform_device *pdev)
593 if (reg != new_ctrl) 627 if (reg != new_ctrl)
594 rtc_write(rtc, OMAP_RTC_CTRL_REG, new_ctrl); 628 rtc_write(rtc, OMAP_RTC_CTRL_REG, new_ctrl);
595 629
630 rtc->type->lock(rtc);
631
596 device_init_wakeup(&pdev->dev, true); 632 device_init_wakeup(&pdev->dev, true);
597 633
598 rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name, 634 rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
@@ -626,8 +662,7 @@ static int __init omap_rtc_probe(struct platform_device *pdev)
626 662
627err: 663err:
628 device_init_wakeup(&pdev->dev, false); 664 device_init_wakeup(&pdev->dev, false);
629 if (rtc->type->has_kicker) 665 rtc->type->lock(rtc);
630 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
631 pm_runtime_put_sync(&pdev->dev); 666 pm_runtime_put_sync(&pdev->dev);
632 pm_runtime_disable(&pdev->dev); 667 pm_runtime_disable(&pdev->dev);
633 668
@@ -646,11 +681,11 @@ static int __exit omap_rtc_remove(struct platform_device *pdev)
646 681
647 device_init_wakeup(&pdev->dev, 0); 682 device_init_wakeup(&pdev->dev, 0);
648 683
684 rtc->type->unlock(rtc);
649 /* leave rtc running, but disable irqs */ 685 /* leave rtc running, but disable irqs */
650 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0); 686 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
651 687
652 if (rtc->type->has_kicker) 688 rtc->type->lock(rtc);
653 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
654 689
655 /* Disable the clock/module */ 690 /* Disable the clock/module */
656 pm_runtime_put_sync(&pdev->dev); 691 pm_runtime_put_sync(&pdev->dev);
@@ -666,6 +701,7 @@ static int omap_rtc_suspend(struct device *dev)
666 701
667 rtc->interrupts_reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG); 702 rtc->interrupts_reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
668 703
704 rtc->type->unlock(rtc);
669 /* 705 /*
670 * FIXME: the RTC alarm is not currently acting as a wakeup event 706 * FIXME: the RTC alarm is not currently acting as a wakeup event
671 * source on some platforms, and in fact this enable() call is just 707 * source on some platforms, and in fact this enable() call is just
@@ -675,6 +711,7 @@ static int omap_rtc_suspend(struct device *dev)
675 enable_irq_wake(rtc->irq_alarm); 711 enable_irq_wake(rtc->irq_alarm);
676 else 712 else
677 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0); 713 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
714 rtc->type->lock(rtc);
678 715
679 /* Disable the clock/module */ 716 /* Disable the clock/module */
680 pm_runtime_put_sync(dev); 717 pm_runtime_put_sync(dev);
@@ -689,10 +726,12 @@ static int omap_rtc_resume(struct device *dev)
689 /* Enable the clock/module so that we can access the registers */ 726 /* Enable the clock/module so that we can access the registers */
690 pm_runtime_get_sync(dev); 727 pm_runtime_get_sync(dev);
691 728
729 rtc->type->unlock(rtc);
692 if (device_may_wakeup(dev)) 730 if (device_may_wakeup(dev))
693 disable_irq_wake(rtc->irq_alarm); 731 disable_irq_wake(rtc->irq_alarm);
694 else 732 else
695 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, rtc->interrupts_reg); 733 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, rtc->interrupts_reg);
734 rtc->type->lock(rtc);
696 735
697 return 0; 736 return 0;
698} 737}
@@ -709,12 +748,15 @@ static void omap_rtc_shutdown(struct platform_device *pdev)
709 * Keep the ALARM interrupt enabled to allow the system to power up on 748 * Keep the ALARM interrupt enabled to allow the system to power up on
710 * alarm events. 749 * alarm events.
711 */ 750 */
751 rtc->type->unlock(rtc);
712 mask = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG); 752 mask = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
713 mask &= OMAP_RTC_INTERRUPTS_IT_ALARM; 753 mask &= OMAP_RTC_INTERRUPTS_IT_ALARM;
714 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, mask); 754 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, mask);
755 rtc->type->lock(rtc);
715} 756}
716 757
717static struct platform_driver omap_rtc_driver = { 758static struct platform_driver omap_rtc_driver = {
759 .probe = omap_rtc_probe,
718 .remove = __exit_p(omap_rtc_remove), 760 .remove = __exit_p(omap_rtc_remove),
719 .shutdown = omap_rtc_shutdown, 761 .shutdown = omap_rtc_shutdown,
720 .driver = { 762 .driver = {
@@ -725,7 +767,7 @@ static struct platform_driver omap_rtc_driver = {
725 .id_table = omap_rtc_id_table, 767 .id_table = omap_rtc_id_table,
726}; 768};
727 769
728module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe); 770module_platform_driver(omap_rtc_driver);
729 771
730MODULE_ALIAS("platform:omap_rtc"); 772MODULE_ALIAS("platform:omap_rtc");
731MODULE_AUTHOR("George G. Davis (and others)"); 773MODULE_AUTHOR("George G. Davis (and others)");
diff --git a/drivers/rtc/rtc-opal.c b/drivers/rtc/rtc-opal.c
index 95f652165fe9..7061dcae2b09 100644
--- a/drivers/rtc/rtc-opal.c
+++ b/drivers/rtc/rtc-opal.c
@@ -16,8 +16,9 @@
16 * along with this program. 16 * along with this program.
17 */ 17 */
18 18
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
19#define DRVNAME "rtc-opal" 21#define DRVNAME "rtc-opal"
20#define pr_fmt(fmt) DRVNAME ": " fmt
21 22
22#include <linux/module.h> 23#include <linux/module.h>
23#include <linux/err.h> 24#include <linux/err.h>
diff --git a/drivers/rtc/rtc-pcf8563.c b/drivers/rtc/rtc-pcf8563.c
index 96fb32e7d6f8..0ba7e59929be 100644
--- a/drivers/rtc/rtc-pcf8563.c
+++ b/drivers/rtc/rtc-pcf8563.c
@@ -246,7 +246,6 @@ static int pcf8563_get_datetime(struct i2c_client *client, struct rtc_time *tm)
246static int pcf8563_set_datetime(struct i2c_client *client, struct rtc_time *tm) 246static int pcf8563_set_datetime(struct i2c_client *client, struct rtc_time *tm)
247{ 247{
248 struct pcf8563 *pcf8563 = i2c_get_clientdata(client); 248 struct pcf8563 *pcf8563 = i2c_get_clientdata(client);
249 int err;
250 unsigned char buf[9]; 249 unsigned char buf[9];
251 250
252 dev_dbg(&client->dev, "%s: secs=%d, mins=%d, hours=%d, " 251 dev_dbg(&client->dev, "%s: secs=%d, mins=%d, hours=%d, "
@@ -272,12 +271,8 @@ static int pcf8563_set_datetime(struct i2c_client *client, struct rtc_time *tm)
272 271
273 buf[PCF8563_REG_DW] = tm->tm_wday & 0x07; 272 buf[PCF8563_REG_DW] = tm->tm_wday & 0x07;
274 273
275 err = pcf8563_write_block_data(client, PCF8563_REG_SC, 274 return pcf8563_write_block_data(client, PCF8563_REG_SC,
276 9 - PCF8563_REG_SC, buf + PCF8563_REG_SC); 275 9 - PCF8563_REG_SC, buf + PCF8563_REG_SC);
277 if (err)
278 return err;
279
280 return 0;
281} 276}
282 277
283#ifdef CONFIG_RTC_INTF_DEV 278#ifdef CONFIG_RTC_INTF_DEV
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index f4cf6851fae9..76cbad7a99d3 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -39,7 +39,6 @@ struct s3c_rtc {
39 void __iomem *base; 39 void __iomem *base;
40 struct clk *rtc_clk; 40 struct clk *rtc_clk;
41 struct clk *rtc_src_clk; 41 struct clk *rtc_src_clk;
42 bool enabled;
43 42
44 struct s3c_rtc_data *data; 43 struct s3c_rtc_data *data;
45 44
@@ -67,26 +66,25 @@ struct s3c_rtc_data {
67 void (*disable) (struct s3c_rtc *info); 66 void (*disable) (struct s3c_rtc *info);
68}; 67};
69 68
70static void s3c_rtc_alarm_clk_enable(struct s3c_rtc *info, bool enable) 69static void s3c_rtc_enable_clk(struct s3c_rtc *info)
71{ 70{
72 unsigned long irq_flags; 71 unsigned long irq_flags;
73 72
74 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags); 73 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
75 if (enable) { 74 clk_enable(info->rtc_clk);
76 if (!info->enabled) { 75 if (info->data->needs_src_clk)
77 clk_enable(info->rtc_clk); 76 clk_enable(info->rtc_src_clk);
78 if (info->data->needs_src_clk) 77 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
79 clk_enable(info->rtc_src_clk); 78}
80 info->enabled = true; 79
81 } 80static void s3c_rtc_disable_clk(struct s3c_rtc *info)
82 } else { 81{
83 if (info->enabled) { 82 unsigned long irq_flags;
84 if (info->data->needs_src_clk) 83
85 clk_disable(info->rtc_src_clk); 84 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
86 clk_disable(info->rtc_clk); 85 if (info->data->needs_src_clk)
87 info->enabled = false; 86 clk_disable(info->rtc_src_clk);
88 } 87 clk_disable(info->rtc_clk);
89 }
90 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags); 88 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
91} 89}
92 90
@@ -119,20 +117,16 @@ static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
119 117
120 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled); 118 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
121 119
122 clk_enable(info->rtc_clk); 120 s3c_rtc_enable_clk(info);
123 if (info->data->needs_src_clk) 121
124 clk_enable(info->rtc_src_clk);
125 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; 122 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
126 123
127 if (enabled) 124 if (enabled)
128 tmp |= S3C2410_RTCALM_ALMEN; 125 tmp |= S3C2410_RTCALM_ALMEN;
129 126
130 writeb(tmp, info->base + S3C2410_RTCALM); 127 writeb(tmp, info->base + S3C2410_RTCALM);
131 if (info->data->needs_src_clk)
132 clk_disable(info->rtc_src_clk);
133 clk_disable(info->rtc_clk);
134 128
135 s3c_rtc_alarm_clk_enable(info, enabled); 129 s3c_rtc_disable_clk(info);
136 130
137 return 0; 131 return 0;
138} 132}
@@ -143,18 +137,12 @@ static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
143 if (!is_power_of_2(freq)) 137 if (!is_power_of_2(freq))
144 return -EINVAL; 138 return -EINVAL;
145 139
146 clk_enable(info->rtc_clk);
147 if (info->data->needs_src_clk)
148 clk_enable(info->rtc_src_clk);
149 spin_lock_irq(&info->pie_lock); 140 spin_lock_irq(&info->pie_lock);
150 141
151 if (info->data->set_freq) 142 if (info->data->set_freq)
152 info->data->set_freq(info, freq); 143 info->data->set_freq(info, freq);
153 144
154 spin_unlock_irq(&info->pie_lock); 145 spin_unlock_irq(&info->pie_lock);
155 if (info->data->needs_src_clk)
156 clk_disable(info->rtc_src_clk);
157 clk_disable(info->rtc_clk);
158 146
159 return 0; 147 return 0;
160} 148}
@@ -165,9 +153,7 @@ static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
165 struct s3c_rtc *info = dev_get_drvdata(dev); 153 struct s3c_rtc *info = dev_get_drvdata(dev);
166 unsigned int have_retried = 0; 154 unsigned int have_retried = 0;
167 155
168 clk_enable(info->rtc_clk); 156 s3c_rtc_enable_clk(info);
169 if (info->data->needs_src_clk)
170 clk_enable(info->rtc_src_clk);
171 157
172 retry_get_time: 158 retry_get_time:
173 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN); 159 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
@@ -194,6 +180,8 @@ static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
194 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); 180 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
195 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); 181 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
196 182
183 s3c_rtc_disable_clk(info);
184
197 rtc_tm->tm_year += 100; 185 rtc_tm->tm_year += 100;
198 186
199 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n", 187 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
@@ -202,10 +190,6 @@ static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
202 190
203 rtc_tm->tm_mon -= 1; 191 rtc_tm->tm_mon -= 1;
204 192
205 if (info->data->needs_src_clk)
206 clk_disable(info->rtc_src_clk);
207 clk_disable(info->rtc_clk);
208
209 return rtc_valid_tm(rtc_tm); 193 return rtc_valid_tm(rtc_tm);
210} 194}
211 195
@@ -225,9 +209,7 @@ static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
225 return -EINVAL; 209 return -EINVAL;
226 } 210 }
227 211
228 clk_enable(info->rtc_clk); 212 s3c_rtc_enable_clk(info);
229 if (info->data->needs_src_clk)
230 clk_enable(info->rtc_src_clk);
231 213
232 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC); 214 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
233 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN); 215 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
@@ -236,9 +218,7 @@ static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
236 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON); 218 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
237 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR); 219 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
238 220
239 if (info->data->needs_src_clk) 221 s3c_rtc_disable_clk(info);
240 clk_disable(info->rtc_src_clk);
241 clk_disable(info->rtc_clk);
242 222
243 return 0; 223 return 0;
244} 224}
@@ -249,9 +229,7 @@ static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
249 struct rtc_time *alm_tm = &alrm->time; 229 struct rtc_time *alm_tm = &alrm->time;
250 unsigned int alm_en; 230 unsigned int alm_en;
251 231
252 clk_enable(info->rtc_clk); 232 s3c_rtc_enable_clk(info);
253 if (info->data->needs_src_clk)
254 clk_enable(info->rtc_src_clk);
255 233
256 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC); 234 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
257 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN); 235 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
@@ -262,6 +240,8 @@ static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
262 240
263 alm_en = readb(info->base + S3C2410_RTCALM); 241 alm_en = readb(info->base + S3C2410_RTCALM);
264 242
243 s3c_rtc_disable_clk(info);
244
265 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; 245 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
266 246
267 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n", 247 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
@@ -269,9 +249,7 @@ static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
269 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday, 249 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
270 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec); 250 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
271 251
272
273 /* decode the alarm enable field */ 252 /* decode the alarm enable field */
274
275 if (alm_en & S3C2410_RTCALM_SECEN) 253 if (alm_en & S3C2410_RTCALM_SECEN)
276 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec); 254 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
277 else 255 else
@@ -304,10 +282,6 @@ static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
304 else 282 else
305 alm_tm->tm_year = -1; 283 alm_tm->tm_year = -1;
306 284
307 if (info->data->needs_src_clk)
308 clk_disable(info->rtc_src_clk);
309 clk_disable(info->rtc_clk);
310
311 return 0; 285 return 0;
312} 286}
313 287
@@ -317,15 +291,13 @@ static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
317 struct rtc_time *tm = &alrm->time; 291 struct rtc_time *tm = &alrm->time;
318 unsigned int alrm_en; 292 unsigned int alrm_en;
319 293
320 clk_enable(info->rtc_clk);
321 if (info->data->needs_src_clk)
322 clk_enable(info->rtc_src_clk);
323
324 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n", 294 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
325 alrm->enabled, 295 alrm->enabled,
326 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday, 296 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
327 tm->tm_hour, tm->tm_min, tm->tm_sec); 297 tm->tm_hour, tm->tm_min, tm->tm_sec);
328 298
299 s3c_rtc_enable_clk(info);
300
329 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; 301 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
330 writeb(0x00, info->base + S3C2410_RTCALM); 302 writeb(0x00, info->base + S3C2410_RTCALM);
331 303
@@ -348,11 +320,9 @@ static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
348 320
349 writeb(alrm_en, info->base + S3C2410_RTCALM); 321 writeb(alrm_en, info->base + S3C2410_RTCALM);
350 322
351 s3c_rtc_setaie(dev, alrm->enabled); 323 s3c_rtc_disable_clk(info);
352 324
353 if (info->data->needs_src_clk) 325 s3c_rtc_setaie(dev, alrm->enabled);
354 clk_disable(info->rtc_src_clk);
355 clk_disable(info->rtc_clk);
356 326
357 return 0; 327 return 0;
358} 328}
@@ -361,16 +331,12 @@ static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
361{ 331{
362 struct s3c_rtc *info = dev_get_drvdata(dev); 332 struct s3c_rtc *info = dev_get_drvdata(dev);
363 333
364 clk_enable(info->rtc_clk); 334 s3c_rtc_enable_clk(info);
365 if (info->data->needs_src_clk)
366 clk_enable(info->rtc_src_clk);
367 335
368 if (info->data->enable_tick) 336 if (info->data->enable_tick)
369 info->data->enable_tick(info, seq); 337 info->data->enable_tick(info, seq);
370 338
371 if (info->data->needs_src_clk) 339 s3c_rtc_disable_clk(info);
372 clk_disable(info->rtc_src_clk);
373 clk_disable(info->rtc_clk);
374 340
375 return 0; 341 return 0;
376} 342}
@@ -388,10 +354,6 @@ static void s3c24xx_rtc_enable(struct s3c_rtc *info)
388{ 354{
389 unsigned int con, tmp; 355 unsigned int con, tmp;
390 356
391 clk_enable(info->rtc_clk);
392 if (info->data->needs_src_clk)
393 clk_enable(info->rtc_src_clk);
394
395 con = readw(info->base + S3C2410_RTCCON); 357 con = readw(info->base + S3C2410_RTCCON);
396 /* re-enable the device, and check it is ok */ 358 /* re-enable the device, and check it is ok */
397 if ((con & S3C2410_RTCCON_RTCEN) == 0) { 359 if ((con & S3C2410_RTCCON_RTCEN) == 0) {
@@ -417,20 +379,12 @@ static void s3c24xx_rtc_enable(struct s3c_rtc *info)
417 writew(tmp & ~S3C2410_RTCCON_CLKRST, 379 writew(tmp & ~S3C2410_RTCCON_CLKRST,
418 info->base + S3C2410_RTCCON); 380 info->base + S3C2410_RTCCON);
419 } 381 }
420
421 if (info->data->needs_src_clk)
422 clk_disable(info->rtc_src_clk);
423 clk_disable(info->rtc_clk);
424} 382}
425 383
426static void s3c24xx_rtc_disable(struct s3c_rtc *info) 384static void s3c24xx_rtc_disable(struct s3c_rtc *info)
427{ 385{
428 unsigned int con; 386 unsigned int con;
429 387
430 clk_enable(info->rtc_clk);
431 if (info->data->needs_src_clk)
432 clk_enable(info->rtc_src_clk);
433
434 con = readw(info->base + S3C2410_RTCCON); 388 con = readw(info->base + S3C2410_RTCCON);
435 con &= ~S3C2410_RTCCON_RTCEN; 389 con &= ~S3C2410_RTCCON_RTCEN;
436 writew(con, info->base + S3C2410_RTCCON); 390 writew(con, info->base + S3C2410_RTCCON);
@@ -438,28 +392,16 @@ static void s3c24xx_rtc_disable(struct s3c_rtc *info)
438 con = readb(info->base + S3C2410_TICNT); 392 con = readb(info->base + S3C2410_TICNT);
439 con &= ~S3C2410_TICNT_ENABLE; 393 con &= ~S3C2410_TICNT_ENABLE;
440 writeb(con, info->base + S3C2410_TICNT); 394 writeb(con, info->base + S3C2410_TICNT);
441
442 if (info->data->needs_src_clk)
443 clk_disable(info->rtc_src_clk);
444 clk_disable(info->rtc_clk);
445} 395}
446 396
447static void s3c6410_rtc_disable(struct s3c_rtc *info) 397static void s3c6410_rtc_disable(struct s3c_rtc *info)
448{ 398{
449 unsigned int con; 399 unsigned int con;
450 400
451 clk_enable(info->rtc_clk);
452 if (info->data->needs_src_clk)
453 clk_enable(info->rtc_src_clk);
454
455 con = readw(info->base + S3C2410_RTCCON); 401 con = readw(info->base + S3C2410_RTCCON);
456 con &= ~S3C64XX_RTCCON_TICEN; 402 con &= ~S3C64XX_RTCCON_TICEN;
457 con &= ~S3C2410_RTCCON_RTCEN; 403 con &= ~S3C2410_RTCCON_RTCEN;
458 writew(con, info->base + S3C2410_RTCCON); 404 writew(con, info->base + S3C2410_RTCCON);
459
460 if (info->data->needs_src_clk)
461 clk_disable(info->rtc_src_clk);
462 clk_disable(info->rtc_clk);
463} 405}
464 406
465static int s3c_rtc_remove(struct platform_device *pdev) 407static int s3c_rtc_remove(struct platform_device *pdev)
@@ -554,6 +496,20 @@ static int s3c_rtc_probe(struct platform_device *pdev)
554 496
555 device_init_wakeup(&pdev->dev, 1); 497 device_init_wakeup(&pdev->dev, 1);
556 498
499 /* Check RTC Time */
500 if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
501 rtc_tm.tm_year = 100;
502 rtc_tm.tm_mon = 0;
503 rtc_tm.tm_mday = 1;
504 rtc_tm.tm_hour = 0;
505 rtc_tm.tm_min = 0;
506 rtc_tm.tm_sec = 0;
507
508 s3c_rtc_settime(&pdev->dev, &rtc_tm);
509
510 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
511 }
512
557 /* register RTC and exit */ 513 /* register RTC and exit */
558 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops, 514 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
559 THIS_MODULE); 515 THIS_MODULE);
@@ -577,36 +533,21 @@ static int s3c_rtc_probe(struct platform_device *pdev)
577 goto err_nortc; 533 goto err_nortc;
578 } 534 }
579 535
580 /* Check RTC Time */
581 s3c_rtc_gettime(&pdev->dev, &rtc_tm);
582
583 if (rtc_valid_tm(&rtc_tm)) {
584 rtc_tm.tm_year = 100;
585 rtc_tm.tm_mon = 0;
586 rtc_tm.tm_mday = 1;
587 rtc_tm.tm_hour = 0;
588 rtc_tm.tm_min = 0;
589 rtc_tm.tm_sec = 0;
590
591 s3c_rtc_settime(&pdev->dev, &rtc_tm);
592
593 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
594 }
595
596 if (info->data->select_tick_clk) 536 if (info->data->select_tick_clk)
597 info->data->select_tick_clk(info); 537 info->data->select_tick_clk(info);
598 538
599 s3c_rtc_setfreq(info, 1); 539 s3c_rtc_setfreq(info, 1);
600 540
601 if (info->data->needs_src_clk) 541 s3c_rtc_disable_clk(info);
602 clk_disable(info->rtc_src_clk);
603 clk_disable(info->rtc_clk);
604 542
605 return 0; 543 return 0;
606 544
607 err_nortc: 545 err_nortc:
608 if (info->data->disable) 546 if (info->data->disable)
609 info->data->disable(info); 547 info->data->disable(info);
548
549 if (info->data->needs_src_clk)
550 clk_disable_unprepare(info->rtc_src_clk);
610 clk_disable_unprepare(info->rtc_clk); 551 clk_disable_unprepare(info->rtc_clk);
611 552
612 return ret; 553 return ret;
@@ -618,9 +559,7 @@ static int s3c_rtc_suspend(struct device *dev)
618{ 559{
619 struct s3c_rtc *info = dev_get_drvdata(dev); 560 struct s3c_rtc *info = dev_get_drvdata(dev);
620 561
621 clk_enable(info->rtc_clk); 562 s3c_rtc_enable_clk(info);
622 if (info->data->needs_src_clk)
623 clk_enable(info->rtc_src_clk);
624 563
625 /* save TICNT for anyone using periodic interrupts */ 564 /* save TICNT for anyone using periodic interrupts */
626 if (info->data->save_tick_cnt) 565 if (info->data->save_tick_cnt)
@@ -636,10 +575,6 @@ static int s3c_rtc_suspend(struct device *dev)
636 dev_err(dev, "enable_irq_wake failed\n"); 575 dev_err(dev, "enable_irq_wake failed\n");
637 } 576 }
638 577
639 if (info->data->needs_src_clk)
640 clk_disable(info->rtc_src_clk);
641 clk_disable(info->rtc_clk);
642
643 return 0; 578 return 0;
644} 579}
645 580
@@ -647,25 +582,19 @@ static int s3c_rtc_resume(struct device *dev)
647{ 582{
648 struct s3c_rtc *info = dev_get_drvdata(dev); 583 struct s3c_rtc *info = dev_get_drvdata(dev);
649 584
650 clk_enable(info->rtc_clk);
651 if (info->data->needs_src_clk)
652 clk_enable(info->rtc_src_clk);
653
654 if (info->data->enable) 585 if (info->data->enable)
655 info->data->enable(info); 586 info->data->enable(info);
656 587
657 if (info->data->restore_tick_cnt) 588 if (info->data->restore_tick_cnt)
658 info->data->restore_tick_cnt(info); 589 info->data->restore_tick_cnt(info);
659 590
591 s3c_rtc_disable_clk(info);
592
660 if (device_may_wakeup(dev) && info->wake_en) { 593 if (device_may_wakeup(dev) && info->wake_en) {
661 disable_irq_wake(info->irq_alarm); 594 disable_irq_wake(info->irq_alarm);
662 info->wake_en = false; 595 info->wake_en = false;
663 } 596 }
664 597
665 if (info->data->needs_src_clk)
666 clk_disable(info->rtc_src_clk);
667 clk_disable(info->rtc_clk);
668
669 return 0; 598 return 0;
670} 599}
671#endif 600#endif
@@ -673,29 +602,13 @@ static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
673 602
674static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask) 603static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
675{ 604{
676 clk_enable(info->rtc_clk);
677 if (info->data->needs_src_clk)
678 clk_enable(info->rtc_src_clk);
679 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF); 605 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
680 if (info->data->needs_src_clk)
681 clk_disable(info->rtc_src_clk);
682 clk_disable(info->rtc_clk);
683
684 s3c_rtc_alarm_clk_enable(info, false);
685} 606}
686 607
687static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask) 608static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
688{ 609{
689 clk_enable(info->rtc_clk);
690 if (info->data->needs_src_clk)
691 clk_enable(info->rtc_src_clk);
692 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF); 610 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
693 writeb(mask, info->base + S3C2410_INTP); 611 writeb(mask, info->base + S3C2410_INTP);
694 if (info->data->needs_src_clk)
695 clk_disable(info->rtc_src_clk);
696 clk_disable(info->rtc_clk);
697
698 s3c_rtc_alarm_clk_enable(info, false);
699} 612}
700 613
701static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq) 614static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c
index 4008b84246ca..8c70d785ba73 100644
--- a/drivers/rtc/rtc-s5m.c
+++ b/drivers/rtc/rtc-s5m.c
@@ -15,6 +15,8 @@
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 */ 16 */
17 17
18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
18#include <linux/module.h> 20#include <linux/module.h>
19#include <linux/i2c.h> 21#include <linux/i2c.h>
20#include <linux/bcd.h> 22#include <linux/bcd.h>
@@ -90,7 +92,7 @@ struct s5m_rtc_info {
90 struct regmap *regmap; 92 struct regmap *regmap;
91 struct rtc_device *rtc_dev; 93 struct rtc_device *rtc_dev;
92 int irq; 94 int irq;
93 int device_type; 95 enum sec_device_type device_type;
94 int rtc_24hr_mode; 96 int rtc_24hr_mode;
95 const struct s5m_rtc_reg_config *regs; 97 const struct s5m_rtc_reg_config *regs;
96}; 98};
@@ -146,7 +148,7 @@ static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data)
146 data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0; 148 data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
147 149
148 if (tm->tm_year < 100) { 150 if (tm->tm_year < 100) {
149 pr_err("s5m8767 RTC cannot handle the year %d.\n", 151 pr_err("RTC cannot handle the year %d\n",
150 1900 + tm->tm_year); 152 1900 + tm->tm_year);
151 return -EINVAL; 153 return -EINVAL;
152 } else { 154 } else {
@@ -187,6 +189,7 @@ static inline int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info,
187 val &= S5M_ALARM0_STATUS; 189 val &= S5M_ALARM0_STATUS;
188 break; 190 break;
189 case S2MPS14X: 191 case S2MPS14X:
192 case S2MPS13X:
190 ret = regmap_read(info->s5m87xx->regmap_pmic, S2MPS14_REG_ST2, 193 ret = regmap_read(info->s5m87xx->regmap_pmic, S2MPS14_REG_ST2,
191 &val); 194 &val);
192 val &= S2MPS_ALARM0_STATUS; 195 val &= S2MPS_ALARM0_STATUS;
@@ -252,6 +255,9 @@ static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
252 case S2MPS14X: 255 case S2MPS14X:
253 data |= S2MPS_RTC_RUDR_MASK; 256 data |= S2MPS_RTC_RUDR_MASK;
254 break; 257 break;
258 case S2MPS13X:
259 data |= S2MPS13_RTC_AUDR_MASK;
260 break;
255 default: 261 default:
256 return -EINVAL; 262 return -EINVAL;
257 } 263 }
@@ -265,6 +271,11 @@ static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
265 271
266 ret = s5m8767_wait_for_udr_update(info); 272 ret = s5m8767_wait_for_udr_update(info);
267 273
274 /* On S2MPS13 the AUDR is not auto-cleared */
275 if (info->device_type == S2MPS13X)
276 regmap_update_bits(info->regmap, info->regs->rtc_udr_update,
277 S2MPS13_RTC_AUDR_MASK, 0);
278
268 return ret; 279 return ret;
269} 280}
270 281
@@ -306,7 +317,7 @@ static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
306 u8 data[info->regs->regs_count]; 317 u8 data[info->regs->regs_count];
307 int ret; 318 int ret;
308 319
309 if (info->device_type == S2MPS14X) { 320 if (info->device_type == S2MPS14X || info->device_type == S2MPS13X) {
310 ret = regmap_update_bits(info->regmap, 321 ret = regmap_update_bits(info->regmap,
311 info->regs->rtc_udr_update, 322 info->regs->rtc_udr_update,
312 S2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK); 323 S2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK);
@@ -329,6 +340,7 @@ static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
329 340
330 case S5M8767X: 341 case S5M8767X:
331 case S2MPS14X: 342 case S2MPS14X:
343 case S2MPS13X:
332 s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode); 344 s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode);
333 break; 345 break;
334 346
@@ -355,6 +367,7 @@ static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
355 break; 367 break;
356 case S5M8767X: 368 case S5M8767X:
357 case S2MPS14X: 369 case S2MPS14X:
370 case S2MPS13X:
358 ret = s5m8767_tm_to_data(tm, data); 371 ret = s5m8767_tm_to_data(tm, data);
359 break; 372 break;
360 default: 373 default:
@@ -402,6 +415,7 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
402 415
403 case S5M8767X: 416 case S5M8767X:
404 case S2MPS14X: 417 case S2MPS14X:
418 case S2MPS13X:
405 s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode); 419 s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
406 alrm->enabled = 0; 420 alrm->enabled = 0;
407 for (i = 0; i < info->regs->regs_count; i++) { 421 for (i = 0; i < info->regs->regs_count; i++) {
@@ -450,6 +464,7 @@ static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
450 464
451 case S5M8767X: 465 case S5M8767X:
452 case S2MPS14X: 466 case S2MPS14X:
467 case S2MPS13X:
453 for (i = 0; i < info->regs->regs_count; i++) 468 for (i = 0; i < info->regs->regs_count; i++)
454 data[i] &= ~ALARM_ENABLE_MASK; 469 data[i] &= ~ALARM_ENABLE_MASK;
455 470
@@ -494,6 +509,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
494 509
495 case S5M8767X: 510 case S5M8767X:
496 case S2MPS14X: 511 case S2MPS14X:
512 case S2MPS13X:
497 data[RTC_SEC] |= ALARM_ENABLE_MASK; 513 data[RTC_SEC] |= ALARM_ENABLE_MASK;
498 data[RTC_MIN] |= ALARM_ENABLE_MASK; 514 data[RTC_MIN] |= ALARM_ENABLE_MASK;
499 data[RTC_HOUR] |= ALARM_ENABLE_MASK; 515 data[RTC_HOUR] |= ALARM_ENABLE_MASK;
@@ -533,6 +549,7 @@ static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
533 549
534 case S5M8767X: 550 case S5M8767X:
535 case S2MPS14X: 551 case S2MPS14X:
552 case S2MPS13X:
536 s5m8767_tm_to_data(&alrm->time, data); 553 s5m8767_tm_to_data(&alrm->time, data);
537 break; 554 break;
538 555
@@ -615,6 +632,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
615 break; 632 break;
616 633
617 case S2MPS14X: 634 case S2MPS14X:
635 case S2MPS13X:
618 data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); 636 data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
619 ret = regmap_write(info->regmap, info->regs->ctrl, data[0]); 637 ret = regmap_write(info->regmap, info->regs->ctrl, data[0]);
620 break; 638 break;
@@ -650,8 +668,9 @@ static int s5m_rtc_probe(struct platform_device *pdev)
650 if (!info) 668 if (!info)
651 return -ENOMEM; 669 return -ENOMEM;
652 670
653 switch (pdata->device_type) { 671 switch (platform_get_device_id(pdev)->driver_data) {
654 case S2MPS14X: 672 case S2MPS14X:
673 case S2MPS13X:
655 regmap_cfg = &s2mps14_rtc_regmap_config; 674 regmap_cfg = &s2mps14_rtc_regmap_config;
656 info->regs = &s2mps_rtc_regs; 675 info->regs = &s2mps_rtc_regs;
657 alarm_irq = S2MPS14_IRQ_RTCA0; 676 alarm_irq = S2MPS14_IRQ_RTCA0;
@@ -667,7 +686,9 @@ static int s5m_rtc_probe(struct platform_device *pdev)
667 alarm_irq = S5M8767_IRQ_RTCA1; 686 alarm_irq = S5M8767_IRQ_RTCA1;
668 break; 687 break;
669 default: 688 default:
670 dev_err(&pdev->dev, "Device type is not supported by RTC driver\n"); 689 dev_err(&pdev->dev,
690 "Device type %lu is not supported by RTC driver\n",
691 platform_get_device_id(pdev)->driver_data);
671 return -ENODEV; 692 return -ENODEV;
672 } 693 }
673 694
@@ -687,7 +708,7 @@ static int s5m_rtc_probe(struct platform_device *pdev)
687 708
688 info->dev = &pdev->dev; 709 info->dev = &pdev->dev;
689 info->s5m87xx = s5m87xx; 710 info->s5m87xx = s5m87xx;
690 info->device_type = s5m87xx->device_type; 711 info->device_type = platform_get_device_id(pdev)->driver_data;
691 712
692 if (s5m87xx->irq_data) { 713 if (s5m87xx->irq_data) {
693 info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq); 714 info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
@@ -772,6 +793,7 @@ static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume);
772 793
773static const struct platform_device_id s5m_rtc_id[] = { 794static const struct platform_device_id s5m_rtc_id[] = {
774 { "s5m-rtc", S5M8767X }, 795 { "s5m-rtc", S5M8767X },
796 { "s2mps13-rtc", S2MPS13X },
775 { "s2mps14-rtc", S2MPS14X }, 797 { "s2mps14-rtc", S2MPS14X },
776 { }, 798 { },
777}; 799};
diff --git a/drivers/rtc/rtc-stmp3xxx.c b/drivers/rtc/rtc-stmp3xxx.c
index 2939cdcb2688..eb09eddf39b8 100644
--- a/drivers/rtc/rtc-stmp3xxx.c
+++ b/drivers/rtc/rtc-stmp3xxx.c
@@ -42,6 +42,8 @@
42#define STMP3XXX_RTC_STAT 0x10 42#define STMP3XXX_RTC_STAT 0x10
43#define STMP3XXX_RTC_STAT_STALE_SHIFT 16 43#define STMP3XXX_RTC_STAT_STALE_SHIFT 16
44#define STMP3XXX_RTC_STAT_RTC_PRESENT 0x80000000 44#define STMP3XXX_RTC_STAT_RTC_PRESENT 0x80000000
45#define STMP3XXX_RTC_STAT_XTAL32000_PRESENT 0x10000000
46#define STMP3XXX_RTC_STAT_XTAL32768_PRESENT 0x08000000
45 47
46#define STMP3XXX_RTC_SECONDS 0x30 48#define STMP3XXX_RTC_SECONDS 0x30
47 49
@@ -52,9 +54,13 @@
52#define STMP3XXX_RTC_PERSISTENT0 0x60 54#define STMP3XXX_RTC_PERSISTENT0 0x60
53#define STMP3XXX_RTC_PERSISTENT0_SET 0x64 55#define STMP3XXX_RTC_PERSISTENT0_SET 0x64
54#define STMP3XXX_RTC_PERSISTENT0_CLR 0x68 56#define STMP3XXX_RTC_PERSISTENT0_CLR 0x68
55#define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN 0x00000002 57#define STMP3XXX_RTC_PERSISTENT0_CLOCKSOURCE (1 << 0)
56#define STMP3XXX_RTC_PERSISTENT0_ALARM_EN 0x00000004 58#define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN (1 << 1)
57#define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE 0x00000080 59#define STMP3XXX_RTC_PERSISTENT0_ALARM_EN (1 << 2)
60#define STMP3XXX_RTC_PERSISTENT0_XTAL24MHZ_PWRUP (1 << 4)
61#define STMP3XXX_RTC_PERSISTENT0_XTAL32KHZ_PWRUP (1 << 5)
62#define STMP3XXX_RTC_PERSISTENT0_XTAL32_FREQ (1 << 6)
63#define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE (1 << 7)
58 64
59#define STMP3XXX_RTC_PERSISTENT1 0x70 65#define STMP3XXX_RTC_PERSISTENT1 0x70
60/* missing bitmask in headers */ 66/* missing bitmask in headers */
@@ -248,6 +254,9 @@ static int stmp3xxx_rtc_probe(struct platform_device *pdev)
248{ 254{
249 struct stmp3xxx_rtc_data *rtc_data; 255 struct stmp3xxx_rtc_data *rtc_data;
250 struct resource *r; 256 struct resource *r;
257 u32 rtc_stat;
258 u32 pers0_set, pers0_clr;
259 u32 crystalfreq = 0;
251 int err; 260 int err;
252 261
253 rtc_data = devm_kzalloc(&pdev->dev, sizeof(*rtc_data), GFP_KERNEL); 262 rtc_data = devm_kzalloc(&pdev->dev, sizeof(*rtc_data), GFP_KERNEL);
@@ -268,8 +277,8 @@ static int stmp3xxx_rtc_probe(struct platform_device *pdev)
268 277
269 rtc_data->irq_alarm = platform_get_irq(pdev, 0); 278 rtc_data->irq_alarm = platform_get_irq(pdev, 0);
270 279
271 if (!(readl(STMP3XXX_RTC_STAT + rtc_data->io) & 280 rtc_stat = readl(rtc_data->io + STMP3XXX_RTC_STAT);
272 STMP3XXX_RTC_STAT_RTC_PRESENT)) { 281 if (!(rtc_stat & STMP3XXX_RTC_STAT_RTC_PRESENT)) {
273 dev_err(&pdev->dev, "no device onboard\n"); 282 dev_err(&pdev->dev, "no device onboard\n");
274 return -ENODEV; 283 return -ENODEV;
275 } 284 }
@@ -282,9 +291,54 @@ static int stmp3xxx_rtc_probe(struct platform_device *pdev)
282 return err; 291 return err;
283 } 292 }
284 293
294 /*
295 * Obviously the rtc needs a clock input to be able to run.
296 * This clock can be provided by an external 32k crystal. If that one is
297 * missing XTAL must not be disabled in suspend which consumes a
298 * lot of power. Normally the presence and exact frequency (supported
299 * are 32000 Hz and 32768 Hz) is detectable from fuses, but as reality
300 * proves these fuses are not blown correctly on all machines, so the
301 * frequency can be overridden in the device tree.
302 */
303 if (rtc_stat & STMP3XXX_RTC_STAT_XTAL32000_PRESENT)
304 crystalfreq = 32000;
305 else if (rtc_stat & STMP3XXX_RTC_STAT_XTAL32768_PRESENT)
306 crystalfreq = 32768;
307
308 of_property_read_u32(pdev->dev.of_node, "stmp,crystal-freq",
309 &crystalfreq);
310
311 switch (crystalfreq) {
312 case 32000:
313 /* keep 32kHz crystal running in low-power mode */
314 pers0_set = STMP3XXX_RTC_PERSISTENT0_XTAL32_FREQ |
315 STMP3XXX_RTC_PERSISTENT0_XTAL32KHZ_PWRUP |
316 STMP3XXX_RTC_PERSISTENT0_CLOCKSOURCE;
317 pers0_clr = STMP3XXX_RTC_PERSISTENT0_XTAL24MHZ_PWRUP;
318 break;
319 case 32768:
320 /* keep 32.768kHz crystal running in low-power mode */
321 pers0_set = STMP3XXX_RTC_PERSISTENT0_XTAL32KHZ_PWRUP |
322 STMP3XXX_RTC_PERSISTENT0_CLOCKSOURCE;
323 pers0_clr = STMP3XXX_RTC_PERSISTENT0_XTAL24MHZ_PWRUP |
324 STMP3XXX_RTC_PERSISTENT0_XTAL32_FREQ;
325 break;
326 default:
327 dev_warn(&pdev->dev,
328 "invalid crystal-freq specified in device-tree. Assuming no crystal\n");
329 /* fall-through */
330 case 0:
331 /* keep XTAL on in low-power mode */
332 pers0_set = STMP3XXX_RTC_PERSISTENT0_XTAL24MHZ_PWRUP;
333 pers0_clr = STMP3XXX_RTC_PERSISTENT0_XTAL32KHZ_PWRUP |
334 STMP3XXX_RTC_PERSISTENT0_CLOCKSOURCE;
335 }
336
337 writel(pers0_set, rtc_data->io + STMP3XXX_RTC_PERSISTENT0_SET);
338
285 writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN | 339 writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
286 STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN | 340 STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN |
287 STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE, 341 STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE | pers0_clr,
288 rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR); 342 rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
289 343
290 writel(STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN | 344 writel(STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN |
diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c
index 5baea3f54926..2dc787dc06c1 100644
--- a/drivers/rtc/rtc-twl.c
+++ b/drivers/rtc/rtc-twl.c
@@ -18,6 +18,8 @@
18 * 2 of the License, or (at your option) any later version. 18 * 2 of the License, or (at your option) any later version.
19 */ 19 */
20 20
21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
21#include <linux/kernel.h> 23#include <linux/kernel.h>
22#include <linux/errno.h> 24#include <linux/errno.h>
23#include <linux/init.h> 25#include <linux/init.h>
@@ -145,8 +147,7 @@ static int twl_rtc_read_u8(u8 *data, u8 reg)
145 147
146 ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg])); 148 ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
147 if (ret < 0) 149 if (ret < 0)
148 pr_err("twl_rtc: Could not read TWL" 150 pr_err("Could not read TWL register %X - error %d\n", reg, ret);
149 "register %X - error %d\n", reg, ret);
150 return ret; 151 return ret;
151} 152}
152 153
@@ -159,8 +160,8 @@ static int twl_rtc_write_u8(u8 data, u8 reg)
159 160
160 ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg])); 161 ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
161 if (ret < 0) 162 if (ret < 0)
162 pr_err("twl_rtc: Could not write TWL" 163 pr_err("Could not write TWL register %X - error %d\n",
163 "register %X - error %d\n", reg, ret); 164 reg, ret);
164 return ret; 165 return ret;
165} 166}
166 167
diff --git a/drivers/rtc/rtc-x1205.c b/drivers/rtc/rtc-x1205.c
index b1de58e0b3d0..5638b7ba8b06 100644
--- a/drivers/rtc/rtc-x1205.c
+++ b/drivers/rtc/rtc-x1205.c
@@ -22,6 +22,7 @@
22#include <linux/rtc.h> 22#include <linux/rtc.h>
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/bitops.h>
25 26
26#define DRV_VERSION "1.0.8" 27#define DRV_VERSION "1.0.8"
27 28
@@ -366,8 +367,7 @@ static int x1205_get_atrim(struct i2c_client *client, int *trim)
366 * perform sign extension. The formula is 367 * perform sign extension. The formula is
367 * Catr = (atr * 0.25pF) + 11.00pF. 368 * Catr = (atr * 0.25pF) + 11.00pF.
368 */ 369 */
369 if (atr & 0x20) 370 atr = sign_extend32(atr, 5);
370 atr |= 0xC0;
371 371
372 dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr); 372 dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
373 373
diff --git a/drivers/scsi/NCR5380.c b/drivers/scsi/NCR5380.c
index 8981701802ca..a777e5c412df 100644
--- a/drivers/scsi/NCR5380.c
+++ b/drivers/scsi/NCR5380.c
@@ -474,11 +474,11 @@ static void NCR5380_print_phase(struct Scsi_Host *instance)
474 */ 474 */
475#ifndef USLEEP_SLEEP 475#ifndef USLEEP_SLEEP
476/* 20 ms (reasonable hard disk speed) */ 476/* 20 ms (reasonable hard disk speed) */
477#define USLEEP_SLEEP (20*HZ/1000) 477#define USLEEP_SLEEP msecs_to_jiffies(20)
478#endif 478#endif
479/* 300 RPM (floppy speed) */ 479/* 300 RPM (floppy speed) */
480#ifndef USLEEP_POLL 480#ifndef USLEEP_POLL
481#define USLEEP_POLL (200*HZ/1000) 481#define USLEEP_POLL msecs_to_jiffies(200)
482#endif 482#endif
483#ifndef USLEEP_WAITLONG 483#ifndef USLEEP_WAITLONG
484/* RvC: (reasonable time to wait on select error) */ 484/* RvC: (reasonable time to wait on select error) */
@@ -576,7 +576,7 @@ static int __init __maybe_unused NCR5380_probe_irq(struct Scsi_Host *instance,
576 if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0)) 576 if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0))
577 trying_irqs |= mask; 577 trying_irqs |= mask;
578 578
579 timeout = jiffies + (250 * HZ / 1000); 579 timeout = jiffies + msecs_to_jiffies(250);
580 probe_irq = NO_IRQ; 580 probe_irq = NO_IRQ;
581 581
582 /* 582 /*
@@ -634,7 +634,7 @@ static void prepare_info(struct Scsi_Host *instance)
634 "sg_tablesize %d, this_id %d, " 634 "sg_tablesize %d, this_id %d, "
635 "flags { %s%s%s}, " 635 "flags { %s%s%s}, "
636#if defined(USLEEP_POLL) && defined(USLEEP_WAITLONG) 636#if defined(USLEEP_POLL) && defined(USLEEP_WAITLONG)
637 "USLEEP_POLL %d, USLEEP_WAITLONG %d, " 637 "USLEEP_POLL %lu, USLEEP_WAITLONG %lu, "
638#endif 638#endif
639 "options { %s} ", 639 "options { %s} ",
640 instance->hostt->name, instance->io_port, instance->n_io_port, 640 instance->hostt->name, instance->io_port, instance->n_io_port,
@@ -1346,7 +1346,7 @@ static int NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
1346 * selection. 1346 * selection.
1347 */ 1347 */
1348 1348
1349 timeout = jiffies + (250 * HZ / 1000); 1349 timeout = jiffies + msecs_to_jiffies(250);
1350 1350
1351 /* 1351 /*
1352 * XXX very interesting - we're seeing a bounce where the BSY we 1352 * XXX very interesting - we're seeing a bounce where the BSY we
diff --git a/drivers/scsi/aacraid/aachba.c b/drivers/scsi/aacraid/aachba.c
index b32e77db0c48..9b3dd6ef6a0b 100644
--- a/drivers/scsi/aacraid/aachba.c
+++ b/drivers/scsi/aacraid/aachba.c
@@ -111,6 +111,41 @@
111#define BYTE2(x) (unsigned char)((x) >> 16) 111#define BYTE2(x) (unsigned char)((x) >> 16)
112#define BYTE3(x) (unsigned char)((x) >> 24) 112#define BYTE3(x) (unsigned char)((x) >> 24)
113 113
114/* MODE_SENSE data format */
115typedef struct {
116 struct {
117 u8 data_length;
118 u8 med_type;
119 u8 dev_par;
120 u8 bd_length;
121 } __attribute__((packed)) hd;
122 struct {
123 u8 dens_code;
124 u8 block_count[3];
125 u8 reserved;
126 u8 block_length[3];
127 } __attribute__((packed)) bd;
128 u8 mpc_buf[3];
129} __attribute__((packed)) aac_modep_data;
130
131/* MODE_SENSE_10 data format */
132typedef struct {
133 struct {
134 u8 data_length[2];
135 u8 med_type;
136 u8 dev_par;
137 u8 rsrvd[2];
138 u8 bd_length[2];
139 } __attribute__((packed)) hd;
140 struct {
141 u8 dens_code;
142 u8 block_count[3];
143 u8 reserved;
144 u8 block_length[3];
145 } __attribute__((packed)) bd;
146 u8 mpc_buf[3];
147} __attribute__((packed)) aac_modep10_data;
148
114/*------------------------------------------------------------------------------ 149/*------------------------------------------------------------------------------
115 * S T R U C T S / T Y P E D E F S 150 * S T R U C T S / T Y P E D E F S
116 *----------------------------------------------------------------------------*/ 151 *----------------------------------------------------------------------------*/
@@ -128,6 +163,48 @@ struct inquiry_data {
128 u8 inqd_prl[4]; /* Product Revision Level */ 163 u8 inqd_prl[4]; /* Product Revision Level */
129}; 164};
130 165
166/* Added for VPD 0x83 */
167typedef struct {
168 u8 CodeSet:4; /* VPD_CODE_SET */
169 u8 Reserved:4;
170 u8 IdentifierType:4; /* VPD_IDENTIFIER_TYPE */
171 u8 Reserved2:4;
172 u8 Reserved3;
173 u8 IdentifierLength;
174 u8 VendId[8];
175 u8 ProductId[16];
176 u8 SerialNumber[8]; /* SN in ASCII */
177
178} TVPD_ID_Descriptor_Type_1;
179
180typedef struct {
181 u8 CodeSet:4; /* VPD_CODE_SET */
182 u8 Reserved:4;
183 u8 IdentifierType:4; /* VPD_IDENTIFIER_TYPE */
184 u8 Reserved2:4;
185 u8 Reserved3;
186 u8 IdentifierLength;
187 struct TEU64Id {
188 u32 Serial;
189 /* The serial number supposed to be 40 bits,
190 * bit we only support 32, so make the last byte zero. */
191 u8 Reserved;
192 u8 VendId[3];
193 } EU64Id;
194
195} TVPD_ID_Descriptor_Type_2;
196
197typedef struct {
198 u8 DeviceType:5;
199 u8 DeviceTypeQualifier:3;
200 u8 PageCode;
201 u8 Reserved;
202 u8 PageLength;
203 TVPD_ID_Descriptor_Type_1 IdDescriptorType1;
204 TVPD_ID_Descriptor_Type_2 IdDescriptorType2;
205
206} TVPD_Page83;
207
131/* 208/*
132 * M O D U L E G L O B A L S 209 * M O D U L E G L O B A L S
133 */ 210 */
@@ -385,6 +462,11 @@ int aac_get_containers(struct aac_dev *dev)
385 if (status >= 0) { 462 if (status >= 0) {
386 dresp = (struct aac_get_container_count_resp *)fib_data(fibptr); 463 dresp = (struct aac_get_container_count_resp *)fib_data(fibptr);
387 maximum_num_containers = le32_to_cpu(dresp->ContainerSwitchEntries); 464 maximum_num_containers = le32_to_cpu(dresp->ContainerSwitchEntries);
465 if (fibptr->dev->supplement_adapter_info.SupportedOptions2 &
466 AAC_OPTION_SUPPORTED_240_VOLUMES) {
467 maximum_num_containers =
468 le32_to_cpu(dresp->MaxSimpleVolumes);
469 }
388 aac_fib_complete(fibptr); 470 aac_fib_complete(fibptr);
389 } 471 }
390 /* FIB should be freed only after getting the response from the F/W */ 472 /* FIB should be freed only after getting the response from the F/W */
@@ -438,7 +520,7 @@ static void get_container_name_callback(void *context, struct fib * fibptr)
438 if ((le32_to_cpu(get_name_reply->status) == CT_OK) 520 if ((le32_to_cpu(get_name_reply->status) == CT_OK)
439 && (get_name_reply->data[0] != '\0')) { 521 && (get_name_reply->data[0] != '\0')) {
440 char *sp = get_name_reply->data; 522 char *sp = get_name_reply->data;
441 sp[sizeof(((struct aac_get_name_resp *)NULL)->data)-1] = '\0'; 523 sp[sizeof(((struct aac_get_name_resp *)NULL)->data)] = '\0';
442 while (*sp == ' ') 524 while (*sp == ' ')
443 ++sp; 525 ++sp;
444 if (*sp) { 526 if (*sp) {
@@ -539,6 +621,14 @@ static void _aac_probe_container2(void * context, struct fib * fibptr)
539 if ((le32_to_cpu(dresp->status) == ST_OK) && 621 if ((le32_to_cpu(dresp->status) == ST_OK) &&
540 (le32_to_cpu(dresp->mnt[0].vol) != CT_NONE) && 622 (le32_to_cpu(dresp->mnt[0].vol) != CT_NONE) &&
541 (le32_to_cpu(dresp->mnt[0].state) != FSCS_HIDDEN)) { 623 (le32_to_cpu(dresp->mnt[0].state) != FSCS_HIDDEN)) {
624 if (!(fibptr->dev->supplement_adapter_info.SupportedOptions2 &
625 AAC_OPTION_VARIABLE_BLOCK_SIZE)) {
626 dresp->mnt[0].fileinfo.bdevinfo.block_size = 0x200;
627 fsa_dev_ptr->block_size = 0x200;
628 } else {
629 fsa_dev_ptr->block_size =
630 le32_to_cpu(dresp->mnt[0].fileinfo.bdevinfo.block_size);
631 }
542 fsa_dev_ptr->valid = 1; 632 fsa_dev_ptr->valid = 1;
543 /* sense_key holds the current state of the spin-up */ 633 /* sense_key holds the current state of the spin-up */
544 if (dresp->mnt[0].state & cpu_to_le32(FSCS_NOT_READY)) 634 if (dresp->mnt[0].state & cpu_to_le32(FSCS_NOT_READY))
@@ -571,7 +661,9 @@ static void _aac_probe_container1(void * context, struct fib * fibptr)
571 int status; 661 int status;
572 662
573 dresp = (struct aac_mount *) fib_data(fibptr); 663 dresp = (struct aac_mount *) fib_data(fibptr);
574 dresp->mnt[0].capacityhigh = 0; 664 if (!(fibptr->dev->supplement_adapter_info.SupportedOptions2 &
665 AAC_OPTION_VARIABLE_BLOCK_SIZE))
666 dresp->mnt[0].capacityhigh = 0;
575 if ((le32_to_cpu(dresp->status) != ST_OK) || 667 if ((le32_to_cpu(dresp->status) != ST_OK) ||
576 (le32_to_cpu(dresp->mnt[0].vol) != CT_NONE)) { 668 (le32_to_cpu(dresp->mnt[0].vol) != CT_NONE)) {
577 _aac_probe_container2(context, fibptr); 669 _aac_probe_container2(context, fibptr);
@@ -586,7 +678,12 @@ static void _aac_probe_container1(void * context, struct fib * fibptr)
586 678
587 dinfo = (struct aac_query_mount *)fib_data(fibptr); 679 dinfo = (struct aac_query_mount *)fib_data(fibptr);
588 680
589 dinfo->command = cpu_to_le32(VM_NameServe64); 681 if (fibptr->dev->supplement_adapter_info.SupportedOptions2 &
682 AAC_OPTION_VARIABLE_BLOCK_SIZE)
683 dinfo->command = cpu_to_le32(VM_NameServeAllBlk);
684 else
685 dinfo->command = cpu_to_le32(VM_NameServe64);
686
590 dinfo->count = cpu_to_le32(scmd_id(scsicmd)); 687 dinfo->count = cpu_to_le32(scmd_id(scsicmd));
591 dinfo->type = cpu_to_le32(FT_FILESYS); 688 dinfo->type = cpu_to_le32(FT_FILESYS);
592 689
@@ -621,7 +718,12 @@ static int _aac_probe_container(struct scsi_cmnd * scsicmd, int (*callback)(stru
621 718
622 dinfo = (struct aac_query_mount *)fib_data(fibptr); 719 dinfo = (struct aac_query_mount *)fib_data(fibptr);
623 720
624 dinfo->command = cpu_to_le32(VM_NameServe); 721 if (fibptr->dev->supplement_adapter_info.SupportedOptions2 &
722 AAC_OPTION_VARIABLE_BLOCK_SIZE)
723 dinfo->command = cpu_to_le32(VM_NameServeAllBlk);
724 else
725 dinfo->command = cpu_to_le32(VM_NameServe);
726
625 dinfo->count = cpu_to_le32(scmd_id(scsicmd)); 727 dinfo->count = cpu_to_le32(scmd_id(scsicmd));
626 dinfo->type = cpu_to_le32(FT_FILESYS); 728 dinfo->type = cpu_to_le32(FT_FILESYS);
627 scsicmd->SCp.ptr = (char *)callback; 729 scsicmd->SCp.ptr = (char *)callback;
@@ -835,14 +937,88 @@ static void get_container_serial_callback(void *context, struct fib * fibptr)
835 get_serial_reply = (struct aac_get_serial_resp *) fib_data(fibptr); 937 get_serial_reply = (struct aac_get_serial_resp *) fib_data(fibptr);
836 /* Failure is irrelevant, using default value instead */ 938 /* Failure is irrelevant, using default value instead */
837 if (le32_to_cpu(get_serial_reply->status) == CT_OK) { 939 if (le32_to_cpu(get_serial_reply->status) == CT_OK) {
838 char sp[13]; 940 /*Check to see if it's for VPD 0x83 or 0x80 */
839 /* EVPD bit set */ 941 if (scsicmd->cmnd[2] == 0x83) {
840 sp[0] = INQD_PDT_DA; 942 /* vpd page 0x83 - Device Identification Page */
841 sp[1] = scsicmd->cmnd[2]; 943 int i;
842 sp[2] = 0; 944 TVPD_Page83 VPDPage83Data;
843 sp[3] = snprintf(sp+4, sizeof(sp)-4, "%08X", 945
844 le32_to_cpu(get_serial_reply->uid)); 946 memset(((u8 *)&VPDPage83Data), 0,
845 scsi_sg_copy_from_buffer(scsicmd, sp, sizeof(sp)); 947 sizeof(VPDPage83Data));
948
949 /* DIRECT_ACCESS_DEVIC */
950 VPDPage83Data.DeviceType = 0;
951 /* DEVICE_CONNECTED */
952 VPDPage83Data.DeviceTypeQualifier = 0;
953 /* VPD_DEVICE_IDENTIFIERS */
954 VPDPage83Data.PageCode = 0x83;
955 VPDPage83Data.Reserved = 0;
956 VPDPage83Data.PageLength =
957 sizeof(VPDPage83Data.IdDescriptorType1) +
958 sizeof(VPDPage83Data.IdDescriptorType2);
959
960 /* T10 Vendor Identifier Field Format */
961 /* VpdCodeSetAscii */
962 VPDPage83Data.IdDescriptorType1.CodeSet = 2;
963 /* VpdIdentifierTypeVendorId */
964 VPDPage83Data.IdDescriptorType1.IdentifierType = 1;
965 VPDPage83Data.IdDescriptorType1.IdentifierLength =
966 sizeof(VPDPage83Data.IdDescriptorType1) - 4;
967
968 /* "ADAPTEC " for adaptec */
969 memcpy(VPDPage83Data.IdDescriptorType1.VendId,
970 "ADAPTEC ",
971 sizeof(VPDPage83Data.IdDescriptorType1.VendId));
972 memcpy(VPDPage83Data.IdDescriptorType1.ProductId,
973 "ARRAY ",
974 sizeof(
975 VPDPage83Data.IdDescriptorType1.ProductId));
976
977 /* Convert to ascii based serial number.
978 * The LSB is the the end.
979 */
980 for (i = 0; i < 8; i++) {
981 u8 temp =
982 (u8)((get_serial_reply->uid >> ((7 - i) * 4)) & 0xF);
983 if (temp > 0x9) {
984 VPDPage83Data.IdDescriptorType1.SerialNumber[i] =
985 'A' + (temp - 0xA);
986 } else {
987 VPDPage83Data.IdDescriptorType1.SerialNumber[i] =
988 '0' + temp;
989 }
990 }
991
992 /* VpdCodeSetBinary */
993 VPDPage83Data.IdDescriptorType2.CodeSet = 1;
994 /* VpdIdentifierTypeEUI64 */
995 VPDPage83Data.IdDescriptorType2.IdentifierType = 2;
996 VPDPage83Data.IdDescriptorType2.IdentifierLength =
997 sizeof(VPDPage83Data.IdDescriptorType2) - 4;
998
999 VPDPage83Data.IdDescriptorType2.EU64Id.VendId[0] = 0xD0;
1000 VPDPage83Data.IdDescriptorType2.EU64Id.VendId[1] = 0;
1001 VPDPage83Data.IdDescriptorType2.EU64Id.VendId[2] = 0;
1002
1003 VPDPage83Data.IdDescriptorType2.EU64Id.Serial =
1004 get_serial_reply->uid;
1005 VPDPage83Data.IdDescriptorType2.EU64Id.Reserved = 0;
1006
1007 /* Move the inquiry data to the response buffer. */
1008 scsi_sg_copy_from_buffer(scsicmd, &VPDPage83Data,
1009 sizeof(VPDPage83Data));
1010 } else {
1011 /* It must be for VPD 0x80 */
1012 char sp[13];
1013 /* EVPD bit set */
1014 sp[0] = INQD_PDT_DA;
1015 sp[1] = scsicmd->cmnd[2];
1016 sp[2] = 0;
1017 sp[3] = snprintf(sp+4, sizeof(sp)-4, "%08X",
1018 le32_to_cpu(get_serial_reply->uid));
1019 scsi_sg_copy_from_buffer(scsicmd, sp,
1020 sizeof(sp));
1021 }
846 } 1022 }
847 1023
848 scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | SAM_STAT_GOOD; 1024 scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | SAM_STAT_GOOD;
@@ -982,7 +1158,8 @@ static int aac_read_raw_io(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u3
982 memset(readcmd2, 0, sizeof(struct aac_raw_io2)); 1158 memset(readcmd2, 0, sizeof(struct aac_raw_io2));
983 readcmd2->blockLow = cpu_to_le32((u32)(lba&0xffffffff)); 1159 readcmd2->blockLow = cpu_to_le32((u32)(lba&0xffffffff));
984 readcmd2->blockHigh = cpu_to_le32((u32)((lba&0xffffffff00000000LL)>>32)); 1160 readcmd2->blockHigh = cpu_to_le32((u32)((lba&0xffffffff00000000LL)>>32));
985 readcmd2->byteCount = cpu_to_le32(count<<9); 1161 readcmd2->byteCount = cpu_to_le32(count *
1162 dev->fsa_dev[scmd_id(cmd)].block_size);
986 readcmd2->cid = cpu_to_le16(scmd_id(cmd)); 1163 readcmd2->cid = cpu_to_le16(scmd_id(cmd));
987 readcmd2->flags = cpu_to_le16(RIO2_IO_TYPE_READ); 1164 readcmd2->flags = cpu_to_le16(RIO2_IO_TYPE_READ);
988 ret = aac_build_sgraw2(cmd, readcmd2, 1165 ret = aac_build_sgraw2(cmd, readcmd2,
@@ -997,7 +1174,8 @@ static int aac_read_raw_io(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u3
997 readcmd = (struct aac_raw_io *) fib_data(fib); 1174 readcmd = (struct aac_raw_io *) fib_data(fib);
998 readcmd->block[0] = cpu_to_le32((u32)(lba&0xffffffff)); 1175 readcmd->block[0] = cpu_to_le32((u32)(lba&0xffffffff));
999 readcmd->block[1] = cpu_to_le32((u32)((lba&0xffffffff00000000LL)>>32)); 1176 readcmd->block[1] = cpu_to_le32((u32)((lba&0xffffffff00000000LL)>>32));
1000 readcmd->count = cpu_to_le32(count<<9); 1177 readcmd->count = cpu_to_le32(count *
1178 dev->fsa_dev[scmd_id(cmd)].block_size);
1001 readcmd->cid = cpu_to_le16(scmd_id(cmd)); 1179 readcmd->cid = cpu_to_le16(scmd_id(cmd));
1002 readcmd->flags = cpu_to_le16(RIO_TYPE_READ); 1180 readcmd->flags = cpu_to_le16(RIO_TYPE_READ);
1003 readcmd->bpTotal = 0; 1181 readcmd->bpTotal = 0;
@@ -1062,6 +1240,7 @@ static int aac_read_block(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32
1062{ 1240{
1063 u16 fibsize; 1241 u16 fibsize;
1064 struct aac_read *readcmd; 1242 struct aac_read *readcmd;
1243 struct aac_dev *dev = fib->dev;
1065 long ret; 1244 long ret;
1066 1245
1067 aac_fib_init(fib); 1246 aac_fib_init(fib);
@@ -1069,7 +1248,8 @@ static int aac_read_block(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32
1069 readcmd->command = cpu_to_le32(VM_CtBlockRead); 1248 readcmd->command = cpu_to_le32(VM_CtBlockRead);
1070 readcmd->cid = cpu_to_le32(scmd_id(cmd)); 1249 readcmd->cid = cpu_to_le32(scmd_id(cmd));
1071 readcmd->block = cpu_to_le32((u32)(lba&0xffffffff)); 1250 readcmd->block = cpu_to_le32((u32)(lba&0xffffffff));
1072 readcmd->count = cpu_to_le32(count * 512); 1251 readcmd->count = cpu_to_le32(count *
1252 dev->fsa_dev[scmd_id(cmd)].block_size);
1073 1253
1074 ret = aac_build_sg(cmd, &readcmd->sg); 1254 ret = aac_build_sg(cmd, &readcmd->sg);
1075 if (ret < 0) 1255 if (ret < 0)
@@ -1104,7 +1284,8 @@ static int aac_write_raw_io(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u
1104 memset(writecmd2, 0, sizeof(struct aac_raw_io2)); 1284 memset(writecmd2, 0, sizeof(struct aac_raw_io2));
1105 writecmd2->blockLow = cpu_to_le32((u32)(lba&0xffffffff)); 1285 writecmd2->blockLow = cpu_to_le32((u32)(lba&0xffffffff));
1106 writecmd2->blockHigh = cpu_to_le32((u32)((lba&0xffffffff00000000LL)>>32)); 1286 writecmd2->blockHigh = cpu_to_le32((u32)((lba&0xffffffff00000000LL)>>32));
1107 writecmd2->byteCount = cpu_to_le32(count<<9); 1287 writecmd2->byteCount = cpu_to_le32(count *
1288 dev->fsa_dev[scmd_id(cmd)].block_size);
1108 writecmd2->cid = cpu_to_le16(scmd_id(cmd)); 1289 writecmd2->cid = cpu_to_le16(scmd_id(cmd));
1109 writecmd2->flags = (fua && ((aac_cache & 5) != 1) && 1290 writecmd2->flags = (fua && ((aac_cache & 5) != 1) &&
1110 (((aac_cache & 5) != 5) || !fib->dev->cache_protected)) ? 1291 (((aac_cache & 5) != 5) || !fib->dev->cache_protected)) ?
@@ -1122,7 +1303,8 @@ static int aac_write_raw_io(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u
1122 writecmd = (struct aac_raw_io *) fib_data(fib); 1303 writecmd = (struct aac_raw_io *) fib_data(fib);
1123 writecmd->block[0] = cpu_to_le32((u32)(lba&0xffffffff)); 1304 writecmd->block[0] = cpu_to_le32((u32)(lba&0xffffffff));
1124 writecmd->block[1] = cpu_to_le32((u32)((lba&0xffffffff00000000LL)>>32)); 1305 writecmd->block[1] = cpu_to_le32((u32)((lba&0xffffffff00000000LL)>>32));
1125 writecmd->count = cpu_to_le32(count<<9); 1306 writecmd->count = cpu_to_le32(count *
1307 dev->fsa_dev[scmd_id(cmd)].block_size);
1126 writecmd->cid = cpu_to_le16(scmd_id(cmd)); 1308 writecmd->cid = cpu_to_le16(scmd_id(cmd));
1127 writecmd->flags = (fua && ((aac_cache & 5) != 1) && 1309 writecmd->flags = (fua && ((aac_cache & 5) != 1) &&
1128 (((aac_cache & 5) != 5) || !fib->dev->cache_protected)) ? 1310 (((aac_cache & 5) != 5) || !fib->dev->cache_protected)) ?
@@ -1190,6 +1372,7 @@ static int aac_write_block(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u3
1190{ 1372{
1191 u16 fibsize; 1373 u16 fibsize;
1192 struct aac_write *writecmd; 1374 struct aac_write *writecmd;
1375 struct aac_dev *dev = fib->dev;
1193 long ret; 1376 long ret;
1194 1377
1195 aac_fib_init(fib); 1378 aac_fib_init(fib);
@@ -1197,7 +1380,8 @@ static int aac_write_block(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u3
1197 writecmd->command = cpu_to_le32(VM_CtBlockWrite); 1380 writecmd->command = cpu_to_le32(VM_CtBlockWrite);
1198 writecmd->cid = cpu_to_le32(scmd_id(cmd)); 1381 writecmd->cid = cpu_to_le32(scmd_id(cmd));
1199 writecmd->block = cpu_to_le32((u32)(lba&0xffffffff)); 1382 writecmd->block = cpu_to_le32((u32)(lba&0xffffffff));
1200 writecmd->count = cpu_to_le32(count * 512); 1383 writecmd->count = cpu_to_le32(count *
1384 dev->fsa_dev[scmd_id(cmd)].block_size);
1201 writecmd->sg.count = cpu_to_le32(1); 1385 writecmd->sg.count = cpu_to_le32(1);
1202 /* ->stable is not used - it did mean which type of write */ 1386 /* ->stable is not used - it did mean which type of write */
1203 1387
@@ -2246,9 +2430,10 @@ int aac_scsi_cmd(struct scsi_cmnd * scsicmd)
2246 INQD_PDT_PROC : INQD_PDT_DA; 2430 INQD_PDT_PROC : INQD_PDT_DA;
2247 if (scsicmd->cmnd[2] == 0) { 2431 if (scsicmd->cmnd[2] == 0) {
2248 /* supported vital product data pages */ 2432 /* supported vital product data pages */
2249 arr[3] = 2; 2433 arr[3] = 3;
2250 arr[4] = 0x0; 2434 arr[4] = 0x0;
2251 arr[5] = 0x80; 2435 arr[5] = 0x80;
2436 arr[6] = 0x83;
2252 arr[1] = scsicmd->cmnd[2]; 2437 arr[1] = scsicmd->cmnd[2];
2253 scsi_sg_copy_from_buffer(scsicmd, &inq_data, 2438 scsi_sg_copy_from_buffer(scsicmd, &inq_data,
2254 sizeof(inq_data)); 2439 sizeof(inq_data));
@@ -2264,7 +2449,16 @@ int aac_scsi_cmd(struct scsi_cmnd * scsicmd)
2264 if (aac_wwn != 2) 2449 if (aac_wwn != 2)
2265 return aac_get_container_serial( 2450 return aac_get_container_serial(
2266 scsicmd); 2451 scsicmd);
2267 /* SLES 10 SP1 special */ 2452 scsicmd->result = DID_OK << 16 |
2453 COMMAND_COMPLETE << 8 | SAM_STAT_GOOD;
2454 } else if (scsicmd->cmnd[2] == 0x83) {
2455 /* vpd page 0x83 - Device Identification Page */
2456 char *sno = (char *)&inq_data;
2457 sno[3] = setinqserial(dev, &sno[4],
2458 scmd_id(scsicmd));
2459 if (aac_wwn != 2)
2460 return aac_get_container_serial(
2461 scsicmd);
2268 scsicmd->result = DID_OK << 16 | 2462 scsicmd->result = DID_OK << 16 |
2269 COMMAND_COMPLETE << 8 | SAM_STAT_GOOD; 2463 COMMAND_COMPLETE << 8 | SAM_STAT_GOOD;
2270 } else { 2464 } else {
@@ -2329,10 +2523,10 @@ int aac_scsi_cmd(struct scsi_cmnd * scsicmd)
2329 cp[5] = (capacity >> 16) & 0xff; 2523 cp[5] = (capacity >> 16) & 0xff;
2330 cp[6] = (capacity >> 8) & 0xff; 2524 cp[6] = (capacity >> 8) & 0xff;
2331 cp[7] = (capacity >> 0) & 0xff; 2525 cp[7] = (capacity >> 0) & 0xff;
2332 cp[8] = 0; 2526 cp[8] = (fsa_dev_ptr[cid].block_size >> 24) & 0xff;
2333 cp[9] = 0; 2527 cp[9] = (fsa_dev_ptr[cid].block_size >> 16) & 0xff;
2334 cp[10] = 2; 2528 cp[10] = (fsa_dev_ptr[cid].block_size >> 8) & 0xff;
2335 cp[11] = 0; 2529 cp[11] = (fsa_dev_ptr[cid].block_size) & 0xff;
2336 cp[12] = 0; 2530 cp[12] = 0;
2337 2531
2338 alloc_len = ((scsicmd->cmnd[10] << 24) 2532 alloc_len = ((scsicmd->cmnd[10] << 24)
@@ -2369,10 +2563,10 @@ int aac_scsi_cmd(struct scsi_cmnd * scsicmd)
2369 cp[1] = (capacity >> 16) & 0xff; 2563 cp[1] = (capacity >> 16) & 0xff;
2370 cp[2] = (capacity >> 8) & 0xff; 2564 cp[2] = (capacity >> 8) & 0xff;
2371 cp[3] = (capacity >> 0) & 0xff; 2565 cp[3] = (capacity >> 0) & 0xff;
2372 cp[4] = 0; 2566 cp[4] = (fsa_dev_ptr[cid].block_size >> 24) & 0xff;
2373 cp[5] = 0; 2567 cp[5] = (fsa_dev_ptr[cid].block_size >> 16) & 0xff;
2374 cp[6] = 2; 2568 cp[6] = (fsa_dev_ptr[cid].block_size >> 8) & 0xff;
2375 cp[7] = 0; 2569 cp[7] = (fsa_dev_ptr[cid].block_size) & 0xff;
2376 scsi_sg_copy_from_buffer(scsicmd, cp, sizeof(cp)); 2570 scsi_sg_copy_from_buffer(scsicmd, cp, sizeof(cp));
2377 /* Do not cache partition table for arrays */ 2571 /* Do not cache partition table for arrays */
2378 scsicmd->device->removable = 1; 2572 scsicmd->device->removable = 1;
@@ -2385,30 +2579,79 @@ int aac_scsi_cmd(struct scsi_cmnd * scsicmd)
2385 2579
2386 case MODE_SENSE: 2580 case MODE_SENSE:
2387 { 2581 {
2388 char mode_buf[7];
2389 int mode_buf_length = 4; 2582 int mode_buf_length = 4;
2583 u32 capacity;
2584 aac_modep_data mpd;
2585
2586 if (fsa_dev_ptr[cid].size <= 0x100000000ULL)
2587 capacity = fsa_dev_ptr[cid].size - 1;
2588 else
2589 capacity = (u32)-1;
2390 2590
2391 dprintk((KERN_DEBUG "MODE SENSE command.\n")); 2591 dprintk((KERN_DEBUG "MODE SENSE command.\n"));
2392 mode_buf[0] = 3; /* Mode data length */ 2592 memset((char *)&mpd, 0, sizeof(aac_modep_data));
2393 mode_buf[1] = 0; /* Medium type - default */ 2593
2394 mode_buf[2] = 0; /* Device-specific param, 2594 /* Mode data length */
2395 bit 8: 0/1 = write enabled/protected 2595 mpd.hd.data_length = sizeof(mpd.hd) - 1;
2396 bit 4: 0/1 = FUA enabled */ 2596 /* Medium type - default */
2597 mpd.hd.med_type = 0;
2598 /* Device-specific param,
2599 bit 8: 0/1 = write enabled/protected
2600 bit 4: 0/1 = FUA enabled */
2601 mpd.hd.dev_par = 0;
2602
2397 if (dev->raw_io_interface && ((aac_cache & 5) != 1)) 2603 if (dev->raw_io_interface && ((aac_cache & 5) != 1))
2398 mode_buf[2] = 0x10; 2604 mpd.hd.dev_par = 0x10;
2399 mode_buf[3] = 0; /* Block descriptor length */ 2605 if (scsicmd->cmnd[1] & 0x8)
2606 mpd.hd.bd_length = 0; /* Block descriptor length */
2607 else {
2608 mpd.hd.bd_length = sizeof(mpd.bd);
2609 mpd.hd.data_length += mpd.hd.bd_length;
2610 mpd.bd.block_length[0] =
2611 (fsa_dev_ptr[cid].block_size >> 16) & 0xff;
2612 mpd.bd.block_length[1] =
2613 (fsa_dev_ptr[cid].block_size >> 8) & 0xff;
2614 mpd.bd.block_length[2] =
2615 fsa_dev_ptr[cid].block_size & 0xff;
2616
2617 mpd.mpc_buf[0] = scsicmd->cmnd[2];
2618 if (scsicmd->cmnd[2] == 0x1C) {
2619 /* page length */
2620 mpd.mpc_buf[1] = 0xa;
2621 /* Mode data length */
2622 mpd.hd.data_length = 23;
2623 } else {
2624 /* Mode data length */
2625 mpd.hd.data_length = 15;
2626 }
2627
2628 if (capacity > 0xffffff) {
2629 mpd.bd.block_count[0] = 0xff;
2630 mpd.bd.block_count[1] = 0xff;
2631 mpd.bd.block_count[2] = 0xff;
2632 } else {
2633 mpd.bd.block_count[0] = (capacity >> 16) & 0xff;
2634 mpd.bd.block_count[1] = (capacity >> 8) & 0xff;
2635 mpd.bd.block_count[2] = capacity & 0xff;
2636 }
2637 }
2400 if (((scsicmd->cmnd[2] & 0x3f) == 8) || 2638 if (((scsicmd->cmnd[2] & 0x3f) == 8) ||
2401 ((scsicmd->cmnd[2] & 0x3f) == 0x3f)) { 2639 ((scsicmd->cmnd[2] & 0x3f) == 0x3f)) {
2402 mode_buf[0] = 6; 2640 mpd.hd.data_length += 3;
2403 mode_buf[4] = 8; 2641 mpd.mpc_buf[0] = 8;
2404 mode_buf[5] = 1; 2642 mpd.mpc_buf[1] = 1;
2405 mode_buf[6] = ((aac_cache & 6) == 2) 2643 mpd.mpc_buf[2] = ((aac_cache & 6) == 2)
2406 ? 0 : 0x04; /* WCE */ 2644 ? 0 : 0x04; /* WCE */
2407 mode_buf_length = 7; 2645 mode_buf_length = sizeof(mpd);
2408 if (mode_buf_length > scsicmd->cmnd[4])
2409 mode_buf_length = scsicmd->cmnd[4];
2410 } 2646 }
2411 scsi_sg_copy_from_buffer(scsicmd, mode_buf, mode_buf_length); 2647
2648 if (mode_buf_length > scsicmd->cmnd[4])
2649 mode_buf_length = scsicmd->cmnd[4];
2650 else
2651 mode_buf_length = sizeof(mpd);
2652 scsi_sg_copy_from_buffer(scsicmd,
2653 (char *)&mpd,
2654 mode_buf_length);
2412 scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | SAM_STAT_GOOD; 2655 scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | SAM_STAT_GOOD;
2413 scsicmd->scsi_done(scsicmd); 2656 scsicmd->scsi_done(scsicmd);
2414 2657
@@ -2416,34 +2659,77 @@ int aac_scsi_cmd(struct scsi_cmnd * scsicmd)
2416 } 2659 }
2417 case MODE_SENSE_10: 2660 case MODE_SENSE_10:
2418 { 2661 {
2419 char mode_buf[11]; 2662 u32 capacity;
2420 int mode_buf_length = 8; 2663 int mode_buf_length = 8;
2664 aac_modep10_data mpd10;
2665
2666 if (fsa_dev_ptr[cid].size <= 0x100000000ULL)
2667 capacity = fsa_dev_ptr[cid].size - 1;
2668 else
2669 capacity = (u32)-1;
2421 2670
2422 dprintk((KERN_DEBUG "MODE SENSE 10 byte command.\n")); 2671 dprintk((KERN_DEBUG "MODE SENSE 10 byte command.\n"));
2423 mode_buf[0] = 0; /* Mode data length (MSB) */ 2672 memset((char *)&mpd10, 0, sizeof(aac_modep10_data));
2424 mode_buf[1] = 6; /* Mode data length (LSB) */ 2673 /* Mode data length (MSB) */
2425 mode_buf[2] = 0; /* Medium type - default */ 2674 mpd10.hd.data_length[0] = 0;
2426 mode_buf[3] = 0; /* Device-specific param, 2675 /* Mode data length (LSB) */
2427 bit 8: 0/1 = write enabled/protected 2676 mpd10.hd.data_length[1] = sizeof(mpd10.hd) - 1;
2428 bit 4: 0/1 = FUA enabled */ 2677 /* Medium type - default */
2678 mpd10.hd.med_type = 0;
2679 /* Device-specific param,
2680 bit 8: 0/1 = write enabled/protected
2681 bit 4: 0/1 = FUA enabled */
2682 mpd10.hd.dev_par = 0;
2683
2429 if (dev->raw_io_interface && ((aac_cache & 5) != 1)) 2684 if (dev->raw_io_interface && ((aac_cache & 5) != 1))
2430 mode_buf[3] = 0x10; 2685 mpd10.hd.dev_par = 0x10;
2431 mode_buf[4] = 0; /* reserved */ 2686 mpd10.hd.rsrvd[0] = 0; /* reserved */
2432 mode_buf[5] = 0; /* reserved */ 2687 mpd10.hd.rsrvd[1] = 0; /* reserved */
2433 mode_buf[6] = 0; /* Block descriptor length (MSB) */ 2688 if (scsicmd->cmnd[1] & 0x8) {
2434 mode_buf[7] = 0; /* Block descriptor length (LSB) */ 2689 /* Block descriptor length (MSB) */
2690 mpd10.hd.bd_length[0] = 0;
2691 /* Block descriptor length (LSB) */
2692 mpd10.hd.bd_length[1] = 0;
2693 } else {
2694 mpd10.hd.bd_length[0] = 0;
2695 mpd10.hd.bd_length[1] = sizeof(mpd10.bd);
2696
2697 mpd10.hd.data_length[1] += mpd10.hd.bd_length[1];
2698
2699 mpd10.bd.block_length[0] =
2700 (fsa_dev_ptr[cid].block_size >> 16) & 0xff;
2701 mpd10.bd.block_length[1] =
2702 (fsa_dev_ptr[cid].block_size >> 8) & 0xff;
2703 mpd10.bd.block_length[2] =
2704 fsa_dev_ptr[cid].block_size & 0xff;
2705
2706 if (capacity > 0xffffff) {
2707 mpd10.bd.block_count[0] = 0xff;
2708 mpd10.bd.block_count[1] = 0xff;
2709 mpd10.bd.block_count[2] = 0xff;
2710 } else {
2711 mpd10.bd.block_count[0] =
2712 (capacity >> 16) & 0xff;
2713 mpd10.bd.block_count[1] =
2714 (capacity >> 8) & 0xff;
2715 mpd10.bd.block_count[2] =
2716 capacity & 0xff;
2717 }
2718 }
2435 if (((scsicmd->cmnd[2] & 0x3f) == 8) || 2719 if (((scsicmd->cmnd[2] & 0x3f) == 8) ||
2436 ((scsicmd->cmnd[2] & 0x3f) == 0x3f)) { 2720 ((scsicmd->cmnd[2] & 0x3f) == 0x3f)) {
2437 mode_buf[1] = 9; 2721 mpd10.hd.data_length[1] += 3;
2438 mode_buf[8] = 8; 2722 mpd10.mpc_buf[0] = 8;
2439 mode_buf[9] = 1; 2723 mpd10.mpc_buf[1] = 1;
2440 mode_buf[10] = ((aac_cache & 6) == 2) 2724 mpd10.mpc_buf[2] = ((aac_cache & 6) == 2)
2441 ? 0 : 0x04; /* WCE */ 2725 ? 0 : 0x04; /* WCE */
2442 mode_buf_length = 11; 2726 mode_buf_length = sizeof(mpd10);
2443 if (mode_buf_length > scsicmd->cmnd[8]) 2727 if (mode_buf_length > scsicmd->cmnd[8])
2444 mode_buf_length = scsicmd->cmnd[8]; 2728 mode_buf_length = scsicmd->cmnd[8];
2445 } 2729 }
2446 scsi_sg_copy_from_buffer(scsicmd, mode_buf, mode_buf_length); 2730 scsi_sg_copy_from_buffer(scsicmd,
2731 (char *)&mpd10,
2732 mode_buf_length);
2447 2733
2448 scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | SAM_STAT_GOOD; 2734 scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | SAM_STAT_GOOD;
2449 scsicmd->scsi_done(scsicmd); 2735 scsicmd->scsi_done(scsicmd);
diff --git a/drivers/scsi/aacraid/aacraid.h b/drivers/scsi/aacraid/aacraid.h
index eaaf8705a5f4..40fe65c91b41 100644
--- a/drivers/scsi/aacraid/aacraid.h
+++ b/drivers/scsi/aacraid/aacraid.h
@@ -6,13 +6,63 @@
6#define nblank(x) _nblank(x)[0] 6#define nblank(x) _nblank(x)[0]
7 7
8#include <linux/interrupt.h> 8#include <linux/interrupt.h>
9#include <linux/pci.h>
9 10
10/*------------------------------------------------------------------------------ 11/*------------------------------------------------------------------------------
11 * D E F I N E S 12 * D E F I N E S
12 *----------------------------------------------------------------------------*/ 13 *----------------------------------------------------------------------------*/
13 14
15#define AAC_MAX_MSIX 8 /* vectors */
16#define AAC_PCI_MSI_ENABLE 0x8000
17
18enum {
19 AAC_ENABLE_INTERRUPT = 0x0,
20 AAC_DISABLE_INTERRUPT,
21 AAC_ENABLE_MSIX,
22 AAC_DISABLE_MSIX,
23 AAC_CLEAR_AIF_BIT,
24 AAC_CLEAR_SYNC_BIT,
25 AAC_ENABLE_INTX
26};
27
28#define AAC_INT_MODE_INTX (1<<0)
29#define AAC_INT_MODE_MSI (1<<1)
30#define AAC_INT_MODE_AIF (1<<2)
31#define AAC_INT_MODE_SYNC (1<<3)
32
33#define AAC_INT_ENABLE_TYPE1_INTX 0xfffffffb
34#define AAC_INT_ENABLE_TYPE1_MSIX 0xfffffffa
35#define AAC_INT_DISABLE_ALL 0xffffffff
36
37/* Bit definitions in IOA->Host Interrupt Register */
38#define PMC_TRANSITION_TO_OPERATIONAL (1<<31)
39#define PMC_IOARCB_TRANSFER_FAILED (1<<28)
40#define PMC_IOA_UNIT_CHECK (1<<27)
41#define PMC_NO_HOST_RRQ_FOR_CMD_RESPONSE (1<<26)
42#define PMC_CRITICAL_IOA_OP_IN_PROGRESS (1<<25)
43#define PMC_IOARRIN_LOST (1<<4)
44#define PMC_SYSTEM_BUS_MMIO_ERROR (1<<3)
45#define PMC_IOA_PROCESSOR_IN_ERROR_STATE (1<<2)
46#define PMC_HOST_RRQ_VALID (1<<1)
47#define PMC_OPERATIONAL_STATUS (1<<31)
48#define PMC_ALLOW_MSIX_VECTOR0 (1<<0)
49
50#define PMC_IOA_ERROR_INTERRUPTS (PMC_IOARCB_TRANSFER_FAILED | \
51 PMC_IOA_UNIT_CHECK | \
52 PMC_NO_HOST_RRQ_FOR_CMD_RESPONSE | \
53 PMC_IOARRIN_LOST | \
54 PMC_SYSTEM_BUS_MMIO_ERROR | \
55 PMC_IOA_PROCESSOR_IN_ERROR_STATE)
56
57#define PMC_ALL_INTERRUPT_BITS (PMC_IOA_ERROR_INTERRUPTS | \
58 PMC_HOST_RRQ_VALID | \
59 PMC_TRANSITION_TO_OPERATIONAL | \
60 PMC_ALLOW_MSIX_VECTOR0)
61#define PMC_GLOBAL_INT_BIT2 0x00000004
62#define PMC_GLOBAL_INT_BIT0 0x00000001
63
14#ifndef AAC_DRIVER_BUILD 64#ifndef AAC_DRIVER_BUILD
15# define AAC_DRIVER_BUILD 30300 65# define AAC_DRIVER_BUILD 40709
16# define AAC_DRIVER_BRANCH "-ms" 66# define AAC_DRIVER_BRANCH "-ms"
17#endif 67#endif
18#define MAXIMUM_NUM_CONTAINERS 32 68#define MAXIMUM_NUM_CONTAINERS 32
@@ -36,6 +86,7 @@
36#define CONTAINER_TO_ID(cont) (cont) 86#define CONTAINER_TO_ID(cont) (cont)
37#define CONTAINER_TO_LUN(cont) (0) 87#define CONTAINER_TO_LUN(cont) (0)
38 88
89#define PMC_DEVICE_S6 0x28b
39#define PMC_DEVICE_S7 0x28c 90#define PMC_DEVICE_S7 0x28c
40#define PMC_DEVICE_S8 0x28d 91#define PMC_DEVICE_S8 0x28d
41#define PMC_DEVICE_S9 0x28f 92#define PMC_DEVICE_S9 0x28f
@@ -434,7 +485,7 @@ enum fib_xfer_state {
434struct aac_init 485struct aac_init
435{ 486{
436 __le32 InitStructRevision; 487 __le32 InitStructRevision;
437 __le32 MiniPortRevision; 488 __le32 Sa_MSIXVectors;
438 __le32 fsrev; 489 __le32 fsrev;
439 __le32 CommHeaderAddress; 490 __le32 CommHeaderAddress;
440 __le32 FastIoCommAreaAddress; 491 __le32 FastIoCommAreaAddress;
@@ -582,7 +633,8 @@ struct aac_queue {
582 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */ 633 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */
583 struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */ 634 struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */
584 /* only valid for command queues which receive entries from the adapter. */ 635 /* only valid for command queues which receive entries from the adapter. */
585 u32 numpending; /* Number of entries on outstanding queue. */ 636 /* Number of entries on outstanding queue. */
637 atomic_t numpending;
586 struct aac_dev * dev; /* Back pointer to adapter structure */ 638 struct aac_dev * dev; /* Back pointer to adapter structure */
587}; 639};
588 640
@@ -755,7 +807,8 @@ struct rkt_registers {
755 807
756struct src_mu_registers { 808struct src_mu_registers {
757 /* PCI*| Name */ 809 /* PCI*| Name */
758 __le32 reserved0[8]; /* 00h | Reserved */ 810 __le32 reserved0[6]; /* 00h | Reserved */
811 __le32 IOAR[2]; /* 18h | IOA->host interrupt register */
759 __le32 IDR; /* 20h | Inbound Doorbell Register */ 812 __le32 IDR; /* 20h | Inbound Doorbell Register */
760 __le32 IISR; /* 24h | Inbound Int. Status Register */ 813 __le32 IISR; /* 24h | Inbound Int. Status Register */
761 __le32 reserved1[3]; /* 28h | Reserved */ 814 __le32 reserved1[3]; /* 28h | Reserved */
@@ -767,17 +820,18 @@ struct src_mu_registers {
767 __le32 OMR; /* bch | Outbound Message Register */ 820 __le32 OMR; /* bch | Outbound Message Register */
768 __le32 IQ_L; /* c0h | Inbound Queue (Low address) */ 821 __le32 IQ_L; /* c0h | Inbound Queue (Low address) */
769 __le32 IQ_H; /* c4h | Inbound Queue (High address) */ 822 __le32 IQ_H; /* c4h | Inbound Queue (High address) */
823 __le32 ODR_MSI; /* c8h | MSI register for sync./AIF */
770}; 824};
771 825
772struct src_registers { 826struct src_registers {
773 struct src_mu_registers MUnit; /* 00h - c7h */ 827 struct src_mu_registers MUnit; /* 00h - cbh */
774 union { 828 union {
775 struct { 829 struct {
776 __le32 reserved1[130790]; /* c8h - 7fc5fh */ 830 __le32 reserved1[130789]; /* cch - 7fc5fh */
777 struct src_inbound IndexRegs; /* 7fc60h */ 831 struct src_inbound IndexRegs; /* 7fc60h */
778 } tupelo; 832 } tupelo;
779 struct { 833 struct {
780 __le32 reserved1[974]; /* c8h - fffh */ 834 __le32 reserved1[973]; /* cch - fffh */
781 struct src_inbound IndexRegs; /* 1000h */ 835 struct src_inbound IndexRegs; /* 1000h */
782 } denali; 836 } denali;
783 } u; 837 } u;
@@ -857,6 +911,7 @@ struct fsa_dev_info {
857 u8 deleted; 911 u8 deleted;
858 char devname[8]; 912 char devname[8];
859 struct sense_data sense_data; 913 struct sense_data sense_data;
914 u32 block_size;
860}; 915};
861 916
862struct fib { 917struct fib {
@@ -960,6 +1015,10 @@ struct aac_supplement_adapter_info
960#define AAC_OPTION_IGNORE_RESET cpu_to_le32(0x00000002) 1015#define AAC_OPTION_IGNORE_RESET cpu_to_le32(0x00000002)
961#define AAC_OPTION_POWER_MANAGEMENT cpu_to_le32(0x00000004) 1016#define AAC_OPTION_POWER_MANAGEMENT cpu_to_le32(0x00000004)
962#define AAC_OPTION_DOORBELL_RESET cpu_to_le32(0x00004000) 1017#define AAC_OPTION_DOORBELL_RESET cpu_to_le32(0x00004000)
1018/* 4KB sector size */
1019#define AAC_OPTION_VARIABLE_BLOCK_SIZE cpu_to_le32(0x00040000)
1020/* 240 simple volume support */
1021#define AAC_OPTION_SUPPORTED_240_VOLUMES cpu_to_le32(0x10000000)
963#define AAC_SIS_VERSION_V3 3 1022#define AAC_SIS_VERSION_V3 3
964#define AAC_SIS_SLOT_UNKNOWN 0xFF 1023#define AAC_SIS_SLOT_UNKNOWN 0xFF
965 1024
@@ -1026,6 +1085,11 @@ struct aac_bus_info_response {
1026#define AAC_OPT_NEW_COMM_TYPE3 cpu_to_le32(1<<30) 1085#define AAC_OPT_NEW_COMM_TYPE3 cpu_to_le32(1<<30)
1027#define AAC_OPT_NEW_COMM_TYPE4 cpu_to_le32(1<<31) 1086#define AAC_OPT_NEW_COMM_TYPE4 cpu_to_le32(1<<31)
1028 1087
1088/* MSIX context */
1089struct aac_msix_ctx {
1090 int vector_no;
1091 struct aac_dev *dev;
1092};
1029 1093
1030struct aac_dev 1094struct aac_dev
1031{ 1095{
@@ -1081,8 +1145,10 @@ struct aac_dev
1081 * if AAC_COMM_MESSAGE_TYPE1 */ 1145 * if AAC_COMM_MESSAGE_TYPE1 */
1082 1146
1083 dma_addr_t host_rrq_pa; /* phys. address */ 1147 dma_addr_t host_rrq_pa; /* phys. address */
1084 u32 host_rrq_idx; /* index into rrq buffer */ 1148 /* index into rrq buffer */
1085 1149 u32 host_rrq_idx[AAC_MAX_MSIX];
1150 atomic_t rrq_outstanding[AAC_MAX_MSIX];
1151 u32 fibs_pushed_no;
1086 struct pci_dev *pdev; /* Our PCI interface */ 1152 struct pci_dev *pdev; /* Our PCI interface */
1087 void * printfbuf; /* pointer to buffer used for printf's from the adapter */ 1153 void * printfbuf; /* pointer to buffer used for printf's from the adapter */
1088 void * comm_addr; /* Base address of Comm area */ 1154 void * comm_addr; /* Base address of Comm area */
@@ -1151,6 +1217,13 @@ struct aac_dev
1151 int sync_mode; 1217 int sync_mode;
1152 struct fib *sync_fib; 1218 struct fib *sync_fib;
1153 struct list_head sync_fib_list; 1219 struct list_head sync_fib_list;
1220 u32 doorbell_mask;
1221 u32 max_msix; /* max. MSI-X vectors */
1222 u32 vector_cap; /* MSI-X vector capab.*/
1223 int msi_enabled; /* MSI/MSI-X enabled */
1224 struct msix_entry msixentry[AAC_MAX_MSIX];
1225 struct aac_msix_ctx aac_msix[AAC_MAX_MSIX]; /* context */
1226 u8 adapter_shutdown;
1154}; 1227};
1155 1228
1156#define aac_adapter_interrupt(dev) \ 1229#define aac_adapter_interrupt(dev) \
@@ -1589,6 +1662,7 @@ struct aac_srb_reply
1589#define VM_CtHostWrite64 20 1662#define VM_CtHostWrite64 20
1590#define VM_DrvErrTblLog 21 1663#define VM_DrvErrTblLog 21
1591#define VM_NameServe64 22 1664#define VM_NameServe64 22
1665#define VM_NameServeAllBlk 30
1592 1666
1593#define MAX_VMCOMMAND_NUM 23 /* used for sizing stats array - leave last */ 1667#define MAX_VMCOMMAND_NUM 23 /* used for sizing stats array - leave last */
1594 1668
@@ -1611,8 +1685,13 @@ struct aac_fsinfo {
1611 __le32 fsInodeDensity; 1685 __le32 fsInodeDensity;
1612}; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */ 1686}; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1613 1687
1688struct aac_blockdevinfo {
1689 __le32 block_size;
1690};
1691
1614union aac_contentinfo { 1692union aac_contentinfo {
1615 struct aac_fsinfo filesys; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */ 1693 struct aac_fsinfo filesys;
1694 struct aac_blockdevinfo bdevinfo;
1616}; 1695};
1617 1696
1618/* 1697/*
@@ -1677,6 +1756,7 @@ struct aac_get_container_count_resp {
1677 __le32 MaxContainers; 1756 __le32 MaxContainers;
1678 __le32 ContainerSwitchEntries; 1757 __le32 ContainerSwitchEntries;
1679 __le32 MaxPartitions; 1758 __le32 MaxPartitions;
1759 __le32 MaxSimpleVolumes;
1680}; 1760};
1681 1761
1682 1762
@@ -1951,6 +2031,8 @@ extern struct aac_common aac_config;
1951#define AifEnEnclosureManagement 13 /* EM_DRIVE_* */ 2031#define AifEnEnclosureManagement 13 /* EM_DRIVE_* */
1952#define EM_DRIVE_INSERTION 31 2032#define EM_DRIVE_INSERTION 31
1953#define EM_DRIVE_REMOVAL 32 2033#define EM_DRIVE_REMOVAL 32
2034#define EM_SES_DRIVE_INSERTION 33
2035#define EM_SES_DRIVE_REMOVAL 26
1954#define AifEnBatteryEvent 14 /* Change in Battery State */ 2036#define AifEnBatteryEvent 14 /* Change in Battery State */
1955#define AifEnAddContainer 15 /* A new array was created */ 2037#define AifEnAddContainer 15 /* A new array was created */
1956#define AifEnDeleteContainer 16 /* A container was deleted */ 2038#define AifEnDeleteContainer 16 /* A container was deleted */
@@ -1983,6 +2065,9 @@ extern struct aac_common aac_config;
1983/* PMC NEW COMM: Request the event data */ 2065/* PMC NEW COMM: Request the event data */
1984#define AifReqEvent 200 2066#define AifReqEvent 200
1985 2067
2068/* RAW device deleted */
2069#define AifRawDeviceRemove 203
2070
1986/* 2071/*
1987 * Adapter Initiated FIB command structures. Start with the adapter 2072 * Adapter Initiated FIB command structures. Start with the adapter
1988 * initiated FIBs that really come from the adapter, and get responded 2073 * initiated FIBs that really come from the adapter, and get responded
@@ -2025,6 +2110,7 @@ void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum);
2025int aac_fib_complete(struct fib * context); 2110int aac_fib_complete(struct fib * context);
2026#define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data) 2111#define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data)
2027struct aac_dev *aac_init_adapter(struct aac_dev *dev); 2112struct aac_dev *aac_init_adapter(struct aac_dev *dev);
2113void aac_src_access_devreg(struct aac_dev *dev, int mode);
2028int aac_get_config_status(struct aac_dev *dev, int commit_flag); 2114int aac_get_config_status(struct aac_dev *dev, int commit_flag);
2029int aac_get_containers(struct aac_dev *dev); 2115int aac_get_containers(struct aac_dev *dev);
2030int aac_scsi_cmd(struct scsi_cmnd *cmd); 2116int aac_scsi_cmd(struct scsi_cmnd *cmd);
diff --git a/drivers/scsi/aacraid/commctrl.c b/drivers/scsi/aacraid/commctrl.c
index fbcd48d0bfc3..54195a117f72 100644
--- a/drivers/scsi/aacraid/commctrl.c
+++ b/drivers/scsi/aacraid/commctrl.c
@@ -689,7 +689,10 @@ static int aac_send_raw_srb(struct aac_dev* dev, void __user * arg)
689 kfree (usg); 689 kfree (usg);
690 } 690 }
691 srbcmd->count = cpu_to_le32(byte_count); 691 srbcmd->count = cpu_to_le32(byte_count);
692 psg->count = cpu_to_le32(sg_indx+1); 692 if (user_srbcmd->sg.count)
693 psg->count = cpu_to_le32(sg_indx+1);
694 else
695 psg->count = 0;
693 status = aac_fib_send(ScsiPortCommand64, srbfib, actual_fibsize, FsaNormal, 1, 1,NULL,NULL); 696 status = aac_fib_send(ScsiPortCommand64, srbfib, actual_fibsize, FsaNormal, 1, 1,NULL,NULL);
694 } else { 697 } else {
695 struct user_sgmap* upsg = &user_srbcmd->sg; 698 struct user_sgmap* upsg = &user_srbcmd->sg;
@@ -775,7 +778,10 @@ static int aac_send_raw_srb(struct aac_dev* dev, void __user * arg)
775 } 778 }
776 } 779 }
777 srbcmd->count = cpu_to_le32(byte_count); 780 srbcmd->count = cpu_to_le32(byte_count);
778 psg->count = cpu_to_le32(sg_indx+1); 781 if (user_srbcmd->sg.count)
782 psg->count = cpu_to_le32(sg_indx+1);
783 else
784 psg->count = 0;
779 status = aac_fib_send(ScsiPortCommand, srbfib, actual_fibsize, FsaNormal, 1, 1, NULL, NULL); 785 status = aac_fib_send(ScsiPortCommand, srbfib, actual_fibsize, FsaNormal, 1, 1, NULL, NULL);
780 } 786 }
781 if (status == -ERESTARTSYS) { 787 if (status == -ERESTARTSYS) {
diff --git a/drivers/scsi/aacraid/comminit.c b/drivers/scsi/aacraid/comminit.c
index 177b094c7792..45db84ad322f 100644
--- a/drivers/scsi/aacraid/comminit.c
+++ b/drivers/scsi/aacraid/comminit.c
@@ -43,6 +43,8 @@
43 43
44#include "aacraid.h" 44#include "aacraid.h"
45 45
46static void aac_define_int_mode(struct aac_dev *dev);
47
46struct aac_common aac_config = { 48struct aac_common aac_config = {
47 .irq_mod = 1 49 .irq_mod = 1
48}; 50};
@@ -51,7 +53,7 @@ static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long co
51{ 53{
52 unsigned char *base; 54 unsigned char *base;
53 unsigned long size, align; 55 unsigned long size, align;
54 const unsigned long fibsize = 4096; 56 const unsigned long fibsize = dev->max_fib_size;
55 const unsigned long printfbufsiz = 256; 57 const unsigned long printfbufsiz = 256;
56 unsigned long host_rrq_size = 0; 58 unsigned long host_rrq_size = 0;
57 struct aac_init *init; 59 struct aac_init *init;
@@ -91,7 +93,7 @@ static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long co
91 init->InitStructRevision = cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION); 93 init->InitStructRevision = cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION);
92 if (dev->max_fib_size != sizeof(struct hw_fib)) 94 if (dev->max_fib_size != sizeof(struct hw_fib))
93 init->InitStructRevision = cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4); 95 init->InitStructRevision = cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4);
94 init->MiniPortRevision = cpu_to_le32(Sa_MINIPORT_REVISION); 96 init->Sa_MSIXVectors = cpu_to_le32(Sa_MINIPORT_REVISION);
95 init->fsrev = cpu_to_le32(dev->fsrev); 97 init->fsrev = cpu_to_le32(dev->fsrev);
96 98
97 /* 99 /*
@@ -140,7 +142,8 @@ static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long co
140 INITFLAGS_NEW_COMM_TYPE2_SUPPORTED | INITFLAGS_FAST_JBOD_SUPPORTED); 142 INITFLAGS_NEW_COMM_TYPE2_SUPPORTED | INITFLAGS_FAST_JBOD_SUPPORTED);
141 init->HostRRQ_AddrHigh = cpu_to_le32((u32)((u64)dev->host_rrq_pa >> 32)); 143 init->HostRRQ_AddrHigh = cpu_to_le32((u32)((u64)dev->host_rrq_pa >> 32));
142 init->HostRRQ_AddrLow = cpu_to_le32((u32)(dev->host_rrq_pa & 0xffffffff)); 144 init->HostRRQ_AddrLow = cpu_to_le32((u32)(dev->host_rrq_pa & 0xffffffff));
143 init->MiniPortRevision = cpu_to_le32(0L); /* number of MSI-X */ 145 /* number of MSI-X */
146 init->Sa_MSIXVectors = cpu_to_le32(dev->max_msix);
144 dprintk((KERN_WARNING"aacraid: New Comm Interface type2 enabled\n")); 147 dprintk((KERN_WARNING"aacraid: New Comm Interface type2 enabled\n"));
145 } 148 }
146 149
@@ -179,7 +182,7 @@ static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long co
179 182
180static void aac_queue_init(struct aac_dev * dev, struct aac_queue * q, u32 *mem, int qsize) 183static void aac_queue_init(struct aac_dev * dev, struct aac_queue * q, u32 *mem, int qsize)
181{ 184{
182 q->numpending = 0; 185 atomic_set(&q->numpending, 0);
183 q->dev = dev; 186 q->dev = dev;
184 init_waitqueue_head(&q->cmdready); 187 init_waitqueue_head(&q->cmdready);
185 INIT_LIST_HEAD(&q->cmdq); 188 INIT_LIST_HEAD(&q->cmdq);
@@ -228,6 +231,12 @@ int aac_send_shutdown(struct aac_dev * dev)
228 /* FIB should be freed only after getting the response from the F/W */ 231 /* FIB should be freed only after getting the response from the F/W */
229 if (status != -ERESTARTSYS) 232 if (status != -ERESTARTSYS)
230 aac_fib_free(fibctx); 233 aac_fib_free(fibctx);
234 dev->adapter_shutdown = 1;
235 if ((dev->pdev->device == PMC_DEVICE_S7 ||
236 dev->pdev->device == PMC_DEVICE_S8 ||
237 dev->pdev->device == PMC_DEVICE_S9) &&
238 dev->msi_enabled)
239 aac_src_access_devreg(dev, AAC_ENABLE_INTX);
231 return status; 240 return status;
232} 241}
233 242
@@ -350,8 +359,10 @@ struct aac_dev *aac_init_adapter(struct aac_dev *dev)
350 dev->raw_io_interface = dev->raw_io_64 = 0; 359 dev->raw_io_interface = dev->raw_io_64 = 0;
351 360
352 if ((!aac_adapter_sync_cmd(dev, GET_ADAPTER_PROPERTIES, 361 if ((!aac_adapter_sync_cmd(dev, GET_ADAPTER_PROPERTIES,
353 0, 0, 0, 0, 0, 0, status+0, status+1, status+2, NULL, NULL)) && 362 0, 0, 0, 0, 0, 0,
363 status+0, status+1, status+2, status+3, NULL)) &&
354 (status[0] == 0x00000001)) { 364 (status[0] == 0x00000001)) {
365 dev->doorbell_mask = status[3];
355 if (status[1] & le32_to_cpu(AAC_OPT_NEW_COMM_64)) 366 if (status[1] & le32_to_cpu(AAC_OPT_NEW_COMM_64))
356 dev->raw_io_64 = 1; 367 dev->raw_io_64 = 1;
357 dev->sync_mode = aac_sync_mode; 368 dev->sync_mode = aac_sync_mode;
@@ -388,6 +399,9 @@ struct aac_dev *aac_init_adapter(struct aac_dev *dev)
388 } 399 }
389 } 400 }
390 } 401 }
402 dev->max_msix = 0;
403 dev->msi_enabled = 0;
404 dev->adapter_shutdown = 0;
391 if ((!aac_adapter_sync_cmd(dev, GET_COMM_PREFERRED_SETTINGS, 405 if ((!aac_adapter_sync_cmd(dev, GET_COMM_PREFERRED_SETTINGS,
392 0, 0, 0, 0, 0, 0, 406 0, 0, 0, 0, 0, 0,
393 status+0, status+1, status+2, status+3, status+4)) 407 status+0, status+1, status+2, status+3, status+4))
@@ -461,6 +475,11 @@ struct aac_dev *aac_init_adapter(struct aac_dev *dev)
461 if (host->can_queue > AAC_NUM_IO_FIB) 475 if (host->can_queue > AAC_NUM_IO_FIB)
462 host->can_queue = AAC_NUM_IO_FIB; 476 host->can_queue = AAC_NUM_IO_FIB;
463 477
478 if (dev->pdev->device == PMC_DEVICE_S6 ||
479 dev->pdev->device == PMC_DEVICE_S7 ||
480 dev->pdev->device == PMC_DEVICE_S8 ||
481 dev->pdev->device == PMC_DEVICE_S9)
482 aac_define_int_mode(dev);
464 /* 483 /*
465 * Ok now init the communication subsystem 484 * Ok now init the communication subsystem
466 */ 485 */
@@ -489,4 +508,79 @@ struct aac_dev *aac_init_adapter(struct aac_dev *dev)
489 return dev; 508 return dev;
490} 509}
491 510
492 511static void aac_define_int_mode(struct aac_dev *dev)
512{
513
514 int i, msi_count;
515
516 msi_count = i = 0;
517 /* max. vectors from GET_COMM_PREFERRED_SETTINGS */
518 if (dev->max_msix == 0 ||
519 dev->pdev->device == PMC_DEVICE_S6 ||
520 dev->sync_mode) {
521 dev->max_msix = 1;
522 dev->vector_cap =
523 dev->scsi_host_ptr->can_queue +
524 AAC_NUM_MGT_FIB;
525 return;
526 }
527
528 msi_count = min(dev->max_msix,
529 (unsigned int)num_online_cpus());
530
531 dev->max_msix = msi_count;
532
533 if (msi_count > AAC_MAX_MSIX)
534 msi_count = AAC_MAX_MSIX;
535
536 for (i = 0; i < msi_count; i++)
537 dev->msixentry[i].entry = i;
538
539 if (msi_count > 1 &&
540 pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX)) {
541 i = pci_enable_msix(dev->pdev,
542 dev->msixentry,
543 msi_count);
544 /* Check how many MSIX vectors are allocated */
545 if (i >= 0) {
546 dev->msi_enabled = 1;
547 if (i) {
548 msi_count = i;
549 if (pci_enable_msix(dev->pdev,
550 dev->msixentry,
551 msi_count)) {
552 dev->msi_enabled = 0;
553 printk(KERN_ERR "%s%d: MSIX not supported!! Will try MSI 0x%x.\n",
554 dev->name, dev->id, i);
555 }
556 }
557 } else {
558 dev->msi_enabled = 0;
559 printk(KERN_ERR "%s%d: MSIX not supported!! Will try MSI 0x%x.\n",
560 dev->name, dev->id, i);
561 }
562 }
563
564 if (!dev->msi_enabled) {
565 msi_count = 1;
566 i = pci_enable_msi(dev->pdev);
567
568 if (!i) {
569 dev->msi_enabled = 1;
570 dev->msi = 1;
571 } else {
572 printk(KERN_ERR "%s%d: MSI not supported!! Will try INTx 0x%x.\n",
573 dev->name, dev->id, i);
574 }
575 }
576
577 if (!dev->msi_enabled)
578 dev->max_msix = msi_count = 1;
579 else {
580 if (dev->max_msix > msi_count)
581 dev->max_msix = msi_count;
582 }
583 dev->vector_cap =
584 (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) /
585 msi_count;
586}
diff --git a/drivers/scsi/aacraid/commsup.c b/drivers/scsi/aacraid/commsup.c
index cab190af6345..4da574925284 100644
--- a/drivers/scsi/aacraid/commsup.c
+++ b/drivers/scsi/aacraid/commsup.c
@@ -208,14 +208,10 @@ struct fib *aac_fib_alloc(struct aac_dev *dev)
208 208
209void aac_fib_free(struct fib *fibptr) 209void aac_fib_free(struct fib *fibptr)
210{ 210{
211 unsigned long flags, flagsv; 211 unsigned long flags;
212 212
213 spin_lock_irqsave(&fibptr->event_lock, flagsv); 213 if (fibptr->done == 2)
214 if (fibptr->done == 2) {
215 spin_unlock_irqrestore(&fibptr->event_lock, flagsv);
216 return; 214 return;
217 }
218 spin_unlock_irqrestore(&fibptr->event_lock, flagsv);
219 215
220 spin_lock_irqsave(&fibptr->dev->fib_lock, flags); 216 spin_lock_irqsave(&fibptr->dev->fib_lock, flags);
221 if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) 217 if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
@@ -321,7 +317,7 @@ static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entr
321 /* Queue is full */ 317 /* Queue is full */
322 if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) { 318 if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) {
323 printk(KERN_WARNING "Queue %d full, %u outstanding.\n", 319 printk(KERN_WARNING "Queue %d full, %u outstanding.\n",
324 qid, q->numpending); 320 qid, atomic_read(&q->numpending));
325 return 0; 321 return 0;
326 } else { 322 } else {
327 *entry = q->base + *index; 323 *entry = q->base + *index;
@@ -414,7 +410,6 @@ int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
414 struct aac_dev * dev = fibptr->dev; 410 struct aac_dev * dev = fibptr->dev;
415 struct hw_fib * hw_fib = fibptr->hw_fib_va; 411 struct hw_fib * hw_fib = fibptr->hw_fib_va;
416 unsigned long flags = 0; 412 unsigned long flags = 0;
417 unsigned long qflags;
418 unsigned long mflags = 0; 413 unsigned long mflags = 0;
419 unsigned long sflags = 0; 414 unsigned long sflags = 0;
420 415
@@ -568,9 +563,7 @@ int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
568 int blink; 563 int blink;
569 if (time_is_before_eq_jiffies(timeout)) { 564 if (time_is_before_eq_jiffies(timeout)) {
570 struct aac_queue * q = &dev->queues->queue[AdapNormCmdQueue]; 565 struct aac_queue * q = &dev->queues->queue[AdapNormCmdQueue];
571 spin_lock_irqsave(q->lock, qflags); 566 atomic_dec(&q->numpending);
572 q->numpending--;
573 spin_unlock_irqrestore(q->lock, qflags);
574 if (wait == -1) { 567 if (wait == -1) {
575 printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n" 568 printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n"
576 "Usually a result of a PCI interrupt routing problem;\n" 569 "Usually a result of a PCI interrupt routing problem;\n"
@@ -775,7 +768,6 @@ int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size)
775 768
776int aac_fib_complete(struct fib *fibptr) 769int aac_fib_complete(struct fib *fibptr)
777{ 770{
778 unsigned long flags;
779 struct hw_fib * hw_fib = fibptr->hw_fib_va; 771 struct hw_fib * hw_fib = fibptr->hw_fib_va;
780 772
781 /* 773 /*
@@ -798,12 +790,6 @@ int aac_fib_complete(struct fib *fibptr)
798 * command is complete that we had sent to the adapter and this 790 * command is complete that we had sent to the adapter and this
799 * cdb could be reused. 791 * cdb could be reused.
800 */ 792 */
801 spin_lock_irqsave(&fibptr->event_lock, flags);
802 if (fibptr->done == 2) {
803 spin_unlock_irqrestore(&fibptr->event_lock, flags);
804 return 0;
805 }
806 spin_unlock_irqrestore(&fibptr->event_lock, flags);
807 793
808 if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) && 794 if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) &&
809 (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed))) 795 (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)))
@@ -868,7 +854,7 @@ void aac_printf(struct aac_dev *dev, u32 val)
868 * dispatches it to the appropriate routine for handling. 854 * dispatches it to the appropriate routine for handling.
869 */ 855 */
870 856
871#define AIF_SNIFF_TIMEOUT (30*HZ) 857#define AIF_SNIFF_TIMEOUT (500*HZ)
872static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr) 858static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
873{ 859{
874 struct hw_fib * hw_fib = fibptr->hw_fib_va; 860 struct hw_fib * hw_fib = fibptr->hw_fib_va;
@@ -897,6 +883,39 @@ static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
897 switch (le32_to_cpu(aifcmd->command)) { 883 switch (le32_to_cpu(aifcmd->command)) {
898 case AifCmdDriverNotify: 884 case AifCmdDriverNotify:
899 switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) { 885 switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) {
886 case AifRawDeviceRemove:
887 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
888 if ((container >> 28)) {
889 container = (u32)-1;
890 break;
891 }
892 channel = (container >> 24) & 0xF;
893 if (channel >= dev->maximum_num_channels) {
894 container = (u32)-1;
895 break;
896 }
897 id = container & 0xFFFF;
898 if (id >= dev->maximum_num_physicals) {
899 container = (u32)-1;
900 break;
901 }
902 lun = (container >> 16) & 0xFF;
903 container = (u32)-1;
904 channel = aac_phys_to_logical(channel);
905 device_config_needed =
906 (((__le32 *)aifcmd->data)[0] ==
907 cpu_to_le32(AifRawDeviceRemove)) ? DELETE : ADD;
908
909 if (device_config_needed == ADD) {
910 device = scsi_device_lookup(
911 dev->scsi_host_ptr,
912 channel, id, lun);
913 if (device) {
914 scsi_remove_device(device);
915 scsi_device_put(device);
916 }
917 }
918 break;
900 /* 919 /*
901 * Morph or Expand complete 920 * Morph or Expand complete
902 */ 921 */
@@ -1044,6 +1063,8 @@ static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
1044 switch (le32_to_cpu(((__le32 *)aifcmd->data)[3])) { 1063 switch (le32_to_cpu(((__le32 *)aifcmd->data)[3])) {
1045 case EM_DRIVE_INSERTION: 1064 case EM_DRIVE_INSERTION:
1046 case EM_DRIVE_REMOVAL: 1065 case EM_DRIVE_REMOVAL:
1066 case EM_SES_DRIVE_INSERTION:
1067 case EM_SES_DRIVE_REMOVAL:
1047 container = le32_to_cpu( 1068 container = le32_to_cpu(
1048 ((__le32 *)aifcmd->data)[2]); 1069 ((__le32 *)aifcmd->data)[2]);
1049 if ((container >> 28)) { 1070 if ((container >> 28)) {
@@ -1069,8 +1090,10 @@ static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
1069 } 1090 }
1070 channel = aac_phys_to_logical(channel); 1091 channel = aac_phys_to_logical(channel);
1071 device_config_needed = 1092 device_config_needed =
1072 (((__le32 *)aifcmd->data)[3] 1093 ((((__le32 *)aifcmd->data)[3]
1073 == cpu_to_le32(EM_DRIVE_INSERTION)) ? 1094 == cpu_to_le32(EM_DRIVE_INSERTION)) ||
1095 (((__le32 *)aifcmd->data)[3]
1096 == cpu_to_le32(EM_SES_DRIVE_INSERTION))) ?
1074 ADD : DELETE; 1097 ADD : DELETE;
1075 break; 1098 break;
1076 } 1099 }
@@ -1247,12 +1270,13 @@ retry_next:
1247static int _aac_reset_adapter(struct aac_dev *aac, int forced) 1270static int _aac_reset_adapter(struct aac_dev *aac, int forced)
1248{ 1271{
1249 int index, quirks; 1272 int index, quirks;
1250 int retval; 1273 int retval, i;
1251 struct Scsi_Host *host; 1274 struct Scsi_Host *host;
1252 struct scsi_device *dev; 1275 struct scsi_device *dev;
1253 struct scsi_cmnd *command; 1276 struct scsi_cmnd *command;
1254 struct scsi_cmnd *command_list; 1277 struct scsi_cmnd *command_list;
1255 int jafo = 0; 1278 int jafo = 0;
1279 int cpu;
1256 1280
1257 /* 1281 /*
1258 * Assumptions: 1282 * Assumptions:
@@ -1315,7 +1339,33 @@ static int _aac_reset_adapter(struct aac_dev *aac, int forced)
1315 aac->comm_phys = 0; 1339 aac->comm_phys = 0;
1316 kfree(aac->queues); 1340 kfree(aac->queues);
1317 aac->queues = NULL; 1341 aac->queues = NULL;
1318 free_irq(aac->pdev->irq, aac); 1342 cpu = cpumask_first(cpu_online_mask);
1343 if (aac->pdev->device == PMC_DEVICE_S6 ||
1344 aac->pdev->device == PMC_DEVICE_S7 ||
1345 aac->pdev->device == PMC_DEVICE_S8 ||
1346 aac->pdev->device == PMC_DEVICE_S9) {
1347 if (aac->max_msix > 1) {
1348 for (i = 0; i < aac->max_msix; i++) {
1349 if (irq_set_affinity_hint(
1350 aac->msixentry[i].vector,
1351 NULL)) {
1352 printk(KERN_ERR "%s%d: Failed to reset IRQ affinity for cpu %d\n",
1353 aac->name,
1354 aac->id,
1355 cpu);
1356 }
1357 cpu = cpumask_next(cpu,
1358 cpu_online_mask);
1359 free_irq(aac->msixentry[i].vector,
1360 &(aac->aac_msix[i]));
1361 }
1362 pci_disable_msix(aac->pdev);
1363 } else {
1364 free_irq(aac->pdev->irq, &(aac->aac_msix[0]));
1365 }
1366 } else {
1367 free_irq(aac->pdev->irq, aac);
1368 }
1319 if (aac->msi) 1369 if (aac->msi)
1320 pci_disable_msi(aac->pdev); 1370 pci_disable_msi(aac->pdev);
1321 kfree(aac->fsa_dev); 1371 kfree(aac->fsa_dev);
diff --git a/drivers/scsi/aacraid/dpcsup.c b/drivers/scsi/aacraid/dpcsup.c
index d81b2810f0f7..da9d9936e995 100644
--- a/drivers/scsi/aacraid/dpcsup.c
+++ b/drivers/scsi/aacraid/dpcsup.c
@@ -84,7 +84,7 @@ unsigned int aac_response_normal(struct aac_queue * q)
84 * continue. The caller has already been notified that 84 * continue. The caller has already been notified that
85 * the fib timed out. 85 * the fib timed out.
86 */ 86 */
87 dev->queues->queue[AdapNormCmdQueue].numpending--; 87 atomic_dec(&dev->queues->queue[AdapNormCmdQueue].numpending);
88 88
89 if (unlikely(fib->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) { 89 if (unlikely(fib->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) {
90 spin_unlock_irqrestore(q->lock, flags); 90 spin_unlock_irqrestore(q->lock, flags);
@@ -354,7 +354,7 @@ unsigned int aac_intr_normal(struct aac_dev *dev, u32 index,
354 * continue. The caller has already been notified that 354 * continue. The caller has already been notified that
355 * the fib timed out. 355 * the fib timed out.
356 */ 356 */
357 dev->queues->queue[AdapNormCmdQueue].numpending--; 357 atomic_dec(&dev->queues->queue[AdapNormCmdQueue].numpending);
358 358
359 if (unlikely(fib->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) { 359 if (unlikely(fib->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) {
360 aac_fib_complete(fib); 360 aac_fib_complete(fib);
@@ -389,8 +389,13 @@ unsigned int aac_intr_normal(struct aac_dev *dev, u32 index,
389 * NOTE: we cannot touch the fib after this 389 * NOTE: we cannot touch the fib after this
390 * call, because it may have been deallocated. 390 * call, because it may have been deallocated.
391 */ 391 */
392 fib->flags &= FIB_CONTEXT_FLAG_FASTRESP; 392 if (likely(fib->callback && fib->callback_data)) {
393 fib->callback(fib->callback_data, fib); 393 fib->flags &= FIB_CONTEXT_FLAG_FASTRESP;
394 fib->callback(fib->callback_data, fib);
395 } else {
396 aac_fib_complete(fib);
397 aac_fib_free(fib);
398 }
394 } else { 399 } else {
395 unsigned long flagv; 400 unsigned long flagv;
396 dprintk((KERN_INFO "event_wait up\n")); 401 dprintk((KERN_INFO "event_wait up\n"));
diff --git a/drivers/scsi/aacraid/linit.c b/drivers/scsi/aacraid/linit.c
index fdcdf9f781bc..9eec02733c86 100644
--- a/drivers/scsi/aacraid/linit.c
+++ b/drivers/scsi/aacraid/linit.c
@@ -56,7 +56,7 @@
56 56
57#include "aacraid.h" 57#include "aacraid.h"
58 58
59#define AAC_DRIVER_VERSION "1.2-0" 59#define AAC_DRIVER_VERSION "1.2-1"
60#ifndef AAC_DRIVER_BRANCH 60#ifndef AAC_DRIVER_BRANCH
61#define AAC_DRIVER_BRANCH "" 61#define AAC_DRIVER_BRANCH ""
62#endif 62#endif
@@ -251,27 +251,15 @@ static struct aac_driver_ident aac_drivers[] = {
251 * TODO: unify with aac_scsi_cmd(). 251 * TODO: unify with aac_scsi_cmd().
252 */ 252 */
253 253
254static int aac_queuecommand_lck(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)) 254static int aac_queuecommand(struct Scsi_Host *shost,
255 struct scsi_cmnd *cmd)
255{ 256{
256 struct Scsi_Host *host = cmd->device->host; 257 int r = 0;
257 struct aac_dev *dev = (struct aac_dev *)host->hostdata;
258 u32 count = 0;
259 cmd->scsi_done = done;
260 for (; count < (host->can_queue + AAC_NUM_MGT_FIB); ++count) {
261 struct fib * fib = &dev->fibs[count];
262 struct scsi_cmnd * command;
263 if (fib->hw_fib_va->header.XferState &&
264 ((command = fib->callback_data)) &&
265 (command == cmd) &&
266 (cmd->SCp.phase == AAC_OWNER_FIRMWARE))
267 return 0; /* Already owned by Adapter */
268 }
269 cmd->SCp.phase = AAC_OWNER_LOWLEVEL; 258 cmd->SCp.phase = AAC_OWNER_LOWLEVEL;
270 return (aac_scsi_cmd(cmd) ? FAILED : 0); 259 r = (aac_scsi_cmd(cmd) ? FAILED : 0);
260 return r;
271} 261}
272 262
273static DEF_SCSI_QCMD(aac_queuecommand)
274
275/** 263/**
276 * aac_info - Returns the host adapter name 264 * aac_info - Returns the host adapter name
277 * @shost: Scsi host to report on 265 * @shost: Scsi host to report on
@@ -713,7 +701,9 @@ static long aac_cfg_ioctl(struct file *file,
713 unsigned int cmd, unsigned long arg) 701 unsigned int cmd, unsigned long arg)
714{ 702{
715 int ret; 703 int ret;
716 if (!capable(CAP_SYS_RAWIO)) 704 struct aac_dev *aac;
705 aac = (struct aac_dev *)file->private_data;
706 if (!capable(CAP_SYS_RAWIO) || aac->adapter_shutdown)
717 return -EPERM; 707 return -EPERM;
718 mutex_lock(&aac_mutex); 708 mutex_lock(&aac_mutex);
719 ret = aac_do_ioctl(file->private_data, cmd, (void __user *)arg); 709 ret = aac_do_ioctl(file->private_data, cmd, (void __user *)arg);
@@ -1082,6 +1072,9 @@ static struct scsi_host_template aac_driver_template = {
1082 1072
1083static void __aac_shutdown(struct aac_dev * aac) 1073static void __aac_shutdown(struct aac_dev * aac)
1084{ 1074{
1075 int i;
1076 int cpu;
1077
1085 if (aac->aif_thread) { 1078 if (aac->aif_thread) {
1086 int i; 1079 int i;
1087 /* Clear out events first */ 1080 /* Clear out events first */
@@ -1095,9 +1088,37 @@ static void __aac_shutdown(struct aac_dev * aac)
1095 } 1088 }
1096 aac_send_shutdown(aac); 1089 aac_send_shutdown(aac);
1097 aac_adapter_disable_int(aac); 1090 aac_adapter_disable_int(aac);
1098 free_irq(aac->pdev->irq, aac); 1091 cpu = cpumask_first(cpu_online_mask);
1092 if (aac->pdev->device == PMC_DEVICE_S6 ||
1093 aac->pdev->device == PMC_DEVICE_S7 ||
1094 aac->pdev->device == PMC_DEVICE_S8 ||
1095 aac->pdev->device == PMC_DEVICE_S9) {
1096 if (aac->max_msix > 1) {
1097 for (i = 0; i < aac->max_msix; i++) {
1098 if (irq_set_affinity_hint(
1099 aac->msixentry[i].vector,
1100 NULL)) {
1101 printk(KERN_ERR "%s%d: Failed to reset IRQ affinity for cpu %d\n",
1102 aac->name,
1103 aac->id,
1104 cpu);
1105 }
1106 cpu = cpumask_next(cpu,
1107 cpu_online_mask);
1108 free_irq(aac->msixentry[i].vector,
1109 &(aac->aac_msix[i]));
1110 }
1111 } else {
1112 free_irq(aac->pdev->irq,
1113 &(aac->aac_msix[0]));
1114 }
1115 } else {
1116 free_irq(aac->pdev->irq, aac);
1117 }
1099 if (aac->msi) 1118 if (aac->msi)
1100 pci_disable_msi(aac->pdev); 1119 pci_disable_msi(aac->pdev);
1120 else if (aac->max_msix > 1)
1121 pci_disable_msix(aac->pdev);
1101} 1122}
1102 1123
1103static int aac_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) 1124static int aac_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
diff --git a/drivers/scsi/aacraid/rx.c b/drivers/scsi/aacraid/rx.c
index 5c6a8703f535..9570612b80ce 100644
--- a/drivers/scsi/aacraid/rx.c
+++ b/drivers/scsi/aacraid/rx.c
@@ -400,16 +400,13 @@ int aac_rx_deliver_producer(struct fib * fib)
400{ 400{
401 struct aac_dev *dev = fib->dev; 401 struct aac_dev *dev = fib->dev;
402 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; 402 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
403 unsigned long qflags;
404 u32 Index; 403 u32 Index;
405 unsigned long nointr = 0; 404 unsigned long nointr = 0;
406 405
407 spin_lock_irqsave(q->lock, qflags);
408 aac_queue_get( dev, &Index, AdapNormCmdQueue, fib->hw_fib_va, 1, fib, &nointr); 406 aac_queue_get( dev, &Index, AdapNormCmdQueue, fib->hw_fib_va, 1, fib, &nointr);
409 407
410 q->numpending++; 408 atomic_inc(&q->numpending);
411 *(q->headers.producer) = cpu_to_le32(Index + 1); 409 *(q->headers.producer) = cpu_to_le32(Index + 1);
412 spin_unlock_irqrestore(q->lock, qflags);
413 if (!(nointr & aac_config.irq_mod)) 410 if (!(nointr & aac_config.irq_mod))
414 aac_adapter_notify(dev, AdapNormCmdQueue); 411 aac_adapter_notify(dev, AdapNormCmdQueue);
415 412
@@ -426,15 +423,12 @@ static int aac_rx_deliver_message(struct fib * fib)
426{ 423{
427 struct aac_dev *dev = fib->dev; 424 struct aac_dev *dev = fib->dev;
428 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; 425 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
429 unsigned long qflags;
430 u32 Index; 426 u32 Index;
431 u64 addr; 427 u64 addr;
432 volatile void __iomem *device; 428 volatile void __iomem *device;
433 429
434 unsigned long count = 10000000L; /* 50 seconds */ 430 unsigned long count = 10000000L; /* 50 seconds */
435 spin_lock_irqsave(q->lock, qflags); 431 atomic_inc(&q->numpending);
436 q->numpending++;
437 spin_unlock_irqrestore(q->lock, qflags);
438 for(;;) { 432 for(;;) {
439 Index = rx_readl(dev, MUnit.InboundQueue); 433 Index = rx_readl(dev, MUnit.InboundQueue);
440 if (unlikely(Index == 0xFFFFFFFFL)) 434 if (unlikely(Index == 0xFFFFFFFFL))
@@ -442,9 +436,7 @@ static int aac_rx_deliver_message(struct fib * fib)
442 if (likely(Index != 0xFFFFFFFFL)) 436 if (likely(Index != 0xFFFFFFFFL))
443 break; 437 break;
444 if (--count == 0) { 438 if (--count == 0) {
445 spin_lock_irqsave(q->lock, qflags); 439 atomic_dec(&q->numpending);
446 q->numpending--;
447 spin_unlock_irqrestore(q->lock, qflags);
448 return -ETIMEDOUT; 440 return -ETIMEDOUT;
449 } 441 }
450 udelay(5); 442 udelay(5);
diff --git a/drivers/scsi/aacraid/src.c b/drivers/scsi/aacraid/src.c
index 9c65aed26212..4596e9dd757c 100644
--- a/drivers/scsi/aacraid/src.c
+++ b/drivers/scsi/aacraid/src.c
@@ -44,98 +44,128 @@
44 44
45#include "aacraid.h" 45#include "aacraid.h"
46 46
47static irqreturn_t aac_src_intr_message(int irq, void *dev_id) 47static int aac_src_get_sync_status(struct aac_dev *dev);
48
49irqreturn_t aac_src_intr_message(int irq, void *dev_id)
48{ 50{
49 struct aac_dev *dev = dev_id; 51 struct aac_msix_ctx *ctx;
52 struct aac_dev *dev;
50 unsigned long bellbits, bellbits_shifted; 53 unsigned long bellbits, bellbits_shifted;
51 int our_interrupt = 0; 54 int vector_no;
52 int isFastResponse; 55 int isFastResponse, mode;
53 u32 index, handle; 56 u32 index, handle;
54 57
55 bellbits = src_readl(dev, MUnit.ODR_R); 58 ctx = (struct aac_msix_ctx *)dev_id;
56 if (bellbits & PmDoorBellResponseSent) { 59 dev = ctx->dev;
57 bellbits = PmDoorBellResponseSent; 60 vector_no = ctx->vector_no;
58 /* handle async. status */ 61
59 src_writel(dev, MUnit.ODR_C, bellbits); 62 if (dev->msi_enabled) {
60 src_readl(dev, MUnit.ODR_C); 63 mode = AAC_INT_MODE_MSI;
61 our_interrupt = 1; 64 if (vector_no == 0) {
62 index = dev->host_rrq_idx; 65 bellbits = src_readl(dev, MUnit.ODR_MSI);
63 for (;;) { 66 if (bellbits & 0x40000)
64 isFastResponse = 0; 67 mode |= AAC_INT_MODE_AIF;
65 /* remove toggle bit (31) */ 68 if (bellbits & 0x1000)
66 handle = le32_to_cpu(dev->host_rrq[index]) & 0x7fffffff; 69 mode |= AAC_INT_MODE_SYNC;
67 /* check fast response bit (30) */
68 if (handle & 0x40000000)
69 isFastResponse = 1;
70 handle &= 0x0000ffff;
71 if (handle == 0)
72 break;
73
74 aac_intr_normal(dev, handle-1, 0, isFastResponse, NULL);
75
76 dev->host_rrq[index++] = 0;
77 if (index == dev->scsi_host_ptr->can_queue +
78 AAC_NUM_MGT_FIB)
79 index = 0;
80 dev->host_rrq_idx = index;
81 } 70 }
82 } else { 71 } else {
83 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT); 72 mode = AAC_INT_MODE_INTX;
84 if (bellbits_shifted & DoorBellAifPending) { 73 bellbits = src_readl(dev, MUnit.ODR_R);
74 if (bellbits & PmDoorBellResponseSent) {
75 bellbits = PmDoorBellResponseSent;
76 src_writel(dev, MUnit.ODR_C, bellbits);
77 src_readl(dev, MUnit.ODR_C);
78 } else {
79 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT);
85 src_writel(dev, MUnit.ODR_C, bellbits); 80 src_writel(dev, MUnit.ODR_C, bellbits);
86 src_readl(dev, MUnit.ODR_C); 81 src_readl(dev, MUnit.ODR_C);
87 our_interrupt = 1;
88 /* handle AIF */
89 aac_intr_normal(dev, 0, 2, 0, NULL);
90 } else if (bellbits_shifted & OUTBOUNDDOORBELL_0) {
91 unsigned long sflags;
92 struct list_head *entry;
93 int send_it = 0;
94 extern int aac_sync_mode;
95 82
83 if (bellbits_shifted & DoorBellAifPending)
84 mode |= AAC_INT_MODE_AIF;
85 else if (bellbits_shifted & OUTBOUNDDOORBELL_0)
86 mode |= AAC_INT_MODE_SYNC;
87 }
88 }
89
90 if (mode & AAC_INT_MODE_SYNC) {
91 unsigned long sflags;
92 struct list_head *entry;
93 int send_it = 0;
94 extern int aac_sync_mode;
95
96 if (!aac_sync_mode && !dev->msi_enabled) {
96 src_writel(dev, MUnit.ODR_C, bellbits); 97 src_writel(dev, MUnit.ODR_C, bellbits);
97 src_readl(dev, MUnit.ODR_C); 98 src_readl(dev, MUnit.ODR_C);
99 }
98 100
99 if (!aac_sync_mode) { 101 if (dev->sync_fib) {
100 src_writel(dev, MUnit.ODR_C, bellbits); 102 if (dev->sync_fib->callback)
101 src_readl(dev, MUnit.ODR_C); 103 dev->sync_fib->callback(dev->sync_fib->callback_data,
102 our_interrupt = 1; 104 dev->sync_fib);
105 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags);
106 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) {
107 dev->management_fib_count--;
108 up(&dev->sync_fib->event_wait);
103 } 109 }
104 110 spin_unlock_irqrestore(&dev->sync_fib->event_lock,
105 if (dev->sync_fib) { 111 sflags);
106 our_interrupt = 1; 112 spin_lock_irqsave(&dev->sync_lock, sflags);
107 if (dev->sync_fib->callback) 113 if (!list_empty(&dev->sync_fib_list)) {
108 dev->sync_fib->callback(dev->sync_fib->callback_data, 114 entry = dev->sync_fib_list.next;
109 dev->sync_fib); 115 dev->sync_fib = list_entry(entry,
110 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags); 116 struct fib,
111 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) { 117 fiblink);
112 dev->management_fib_count--; 118 list_del(entry);
113 up(&dev->sync_fib->event_wait); 119 send_it = 1;
114 } 120 } else {
115 spin_unlock_irqrestore(&dev->sync_fib->event_lock, sflags); 121 dev->sync_fib = NULL;
116 spin_lock_irqsave(&dev->sync_lock, sflags); 122 }
117 if (!list_empty(&dev->sync_fib_list)) { 123 spin_unlock_irqrestore(&dev->sync_lock, sflags);
118 entry = dev->sync_fib_list.next; 124 if (send_it) {
119 dev->sync_fib = list_entry(entry, struct fib, fiblink); 125 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
120 list_del(entry); 126 (u32)dev->sync_fib->hw_fib_pa,
121 send_it = 1; 127 0, 0, 0, 0, 0,
122 } else { 128 NULL, NULL, NULL, NULL, NULL);
123 dev->sync_fib = NULL;
124 }
125 spin_unlock_irqrestore(&dev->sync_lock, sflags);
126 if (send_it) {
127 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
128 (u32)dev->sync_fib->hw_fib_pa, 0, 0, 0, 0, 0,
129 NULL, NULL, NULL, NULL, NULL);
130 }
131 } 129 }
132 } 130 }
131 if (!dev->msi_enabled)
132 mode = 0;
133
134 }
135
136 if (mode & AAC_INT_MODE_AIF) {
137 /* handle AIF */
138 aac_intr_normal(dev, 0, 2, 0, NULL);
139 if (dev->msi_enabled)
140 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT);
141 mode = 0;
133 } 142 }
134 143
135 if (our_interrupt) { 144 if (mode) {
136 return IRQ_HANDLED; 145 index = dev->host_rrq_idx[vector_no];
146
147 for (;;) {
148 isFastResponse = 0;
149 /* remove toggle bit (31) */
150 handle = (dev->host_rrq[index] & 0x7fffffff);
151 /* check fast response bit (30) */
152 if (handle & 0x40000000)
153 isFastResponse = 1;
154 handle &= 0x0000ffff;
155 if (handle == 0)
156 break;
157 if (dev->msi_enabled && dev->max_msix > 1)
158 atomic_dec(&dev->rrq_outstanding[vector_no]);
159 aac_intr_normal(dev, handle-1, 0, isFastResponse, NULL);
160 dev->host_rrq[index++] = 0;
161 if (index == (vector_no + 1) * dev->vector_cap)
162 index = vector_no * dev->vector_cap;
163 dev->host_rrq_idx[vector_no] = index;
164 }
165 mode = 0;
137 } 166 }
138 return IRQ_NONE; 167
168 return IRQ_HANDLED;
139} 169}
140 170
141/** 171/**
@@ -155,7 +185,7 @@ static void aac_src_disable_interrupt(struct aac_dev *dev)
155 185
156static void aac_src_enable_interrupt_message(struct aac_dev *dev) 186static void aac_src_enable_interrupt_message(struct aac_dev *dev)
157{ 187{
158 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xfffffff8); 188 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT);
159} 189}
160 190
161/** 191/**
@@ -174,6 +204,7 @@ static int src_sync_cmd(struct aac_dev *dev, u32 command,
174 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4) 204 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
175{ 205{
176 unsigned long start; 206 unsigned long start;
207 unsigned long delay;
177 int ok; 208 int ok;
178 209
179 /* 210 /*
@@ -191,7 +222,10 @@ static int src_sync_cmd(struct aac_dev *dev, u32 command,
191 /* 222 /*
192 * Clear the synch command doorbell to start on a clean slate. 223 * Clear the synch command doorbell to start on a clean slate.
193 */ 224 */
194 src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 225 if (!dev->msi_enabled)
226 src_writel(dev,
227 MUnit.ODR_C,
228 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
195 229
196 /* 230 /*
197 * Disable doorbell interrupts 231 * Disable doorbell interrupts
@@ -213,19 +247,29 @@ static int src_sync_cmd(struct aac_dev *dev, u32 command,
213 ok = 0; 247 ok = 0;
214 start = jiffies; 248 start = jiffies;
215 249
216 /* 250 if (command == IOP_RESET_ALWAYS) {
217 * Wait up to 5 minutes 251 /* Wait up to 10 sec */
218 */ 252 delay = 10*HZ;
219 while (time_before(jiffies, start+300*HZ)) { 253 } else {
254 /* Wait up to 5 minutes */
255 delay = 300*HZ;
256 }
257 while (time_before(jiffies, start+delay)) {
220 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */ 258 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
221 /* 259 /*
222 * Mon960 will set doorbell0 bit when it has completed the command. 260 * Mon960 will set doorbell0 bit when it has completed the command.
223 */ 261 */
224 if ((src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT) & OUTBOUNDDOORBELL_0) { 262 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) {
225 /* 263 /*
226 * Clear the doorbell. 264 * Clear the doorbell.
227 */ 265 */
228 src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 266 if (dev->msi_enabled)
267 aac_src_access_devreg(dev,
268 AAC_CLEAR_SYNC_BIT);
269 else
270 src_writel(dev,
271 MUnit.ODR_C,
272 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
229 ok = 1; 273 ok = 1;
230 break; 274 break;
231 } 275 }
@@ -254,11 +298,16 @@ static int src_sync_cmd(struct aac_dev *dev, u32 command,
254 *r3 = readl(&dev->IndexRegs->Mailbox[3]); 298 *r3 = readl(&dev->IndexRegs->Mailbox[3]);
255 if (r4) 299 if (r4)
256 *r4 = readl(&dev->IndexRegs->Mailbox[4]); 300 *r4 = readl(&dev->IndexRegs->Mailbox[4]);
257 301 if (command == GET_COMM_PREFERRED_SETTINGS)
302 dev->max_msix =
303 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF;
258 /* 304 /*
259 * Clear the synch command doorbell. 305 * Clear the synch command doorbell.
260 */ 306 */
261 src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 307 if (!dev->msi_enabled)
308 src_writel(dev,
309 MUnit.ODR_C,
310 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
262 } 311 }
263 312
264 /* 313 /*
@@ -335,9 +384,14 @@ static void aac_src_notify_adapter(struct aac_dev *dev, u32 event)
335static void aac_src_start_adapter(struct aac_dev *dev) 384static void aac_src_start_adapter(struct aac_dev *dev)
336{ 385{
337 struct aac_init *init; 386 struct aac_init *init;
387 int i;
338 388
339 /* reset host_rrq_idx first */ 389 /* reset host_rrq_idx first */
340 dev->host_rrq_idx = 0; 390 for (i = 0; i < dev->max_msix; i++) {
391 dev->host_rrq_idx[i] = i * dev->vector_cap;
392 atomic_set(&dev->rrq_outstanding[i], 0);
393 }
394 dev->fibs_pushed_no = 0;
341 395
342 init = dev->init; 396 init = dev->init;
343 init->HostElapsedSeconds = cpu_to_le32(get_seconds()); 397 init->HostElapsedSeconds = cpu_to_le32(get_seconds());
@@ -390,15 +444,39 @@ static int aac_src_deliver_message(struct fib *fib)
390{ 444{
391 struct aac_dev *dev = fib->dev; 445 struct aac_dev *dev = fib->dev;
392 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; 446 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
393 unsigned long qflags;
394 u32 fibsize; 447 u32 fibsize;
395 dma_addr_t address; 448 dma_addr_t address;
396 struct aac_fib_xporthdr *pFibX; 449 struct aac_fib_xporthdr *pFibX;
397 u16 hdr_size = le16_to_cpu(fib->hw_fib_va->header.Size); 450 u16 hdr_size = le16_to_cpu(fib->hw_fib_va->header.Size);
398 451
399 spin_lock_irqsave(q->lock, qflags); 452 atomic_inc(&q->numpending);
400 q->numpending++; 453
401 spin_unlock_irqrestore(q->lock, qflags); 454 if (dev->msi_enabled && fib->hw_fib_va->header.Command != AifRequest &&
455 dev->max_msix > 1) {
456 u_int16_t vector_no, first_choice = 0xffff;
457
458 vector_no = dev->fibs_pushed_no % dev->max_msix;
459 do {
460 vector_no += 1;
461 if (vector_no == dev->max_msix)
462 vector_no = 1;
463 if (atomic_read(&dev->rrq_outstanding[vector_no]) <
464 dev->vector_cap)
465 break;
466 if (0xffff == first_choice)
467 first_choice = vector_no;
468 else if (vector_no == first_choice)
469 break;
470 } while (1);
471 if (vector_no == first_choice)
472 vector_no = 0;
473 atomic_inc(&dev->rrq_outstanding[vector_no]);
474 if (dev->fibs_pushed_no == 0xffffffff)
475 dev->fibs_pushed_no = 0;
476 else
477 dev->fibs_pushed_no++;
478 fib->hw_fib_va->header.Handle += (vector_no << 16);
479 }
402 480
403 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) { 481 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) {
404 /* Calculate the amount to the fibsize bits */ 482 /* Calculate the amount to the fibsize bits */
@@ -498,15 +576,34 @@ static int aac_src_restart_adapter(struct aac_dev *dev, int bled)
498 if (bled) 576 if (bled)
499 printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n", 577 printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n",
500 dev->name, dev->id, bled); 578 dev->name, dev->id, bled);
579 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
501 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS, 580 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
502 0, 0, 0, 0, 0, 0, &var, &reset_mask, NULL, NULL, NULL); 581 0, 0, 0, 0, 0, 0, &var, &reset_mask, NULL, NULL, NULL);
503 if (bled || (var != 0x00000001)) 582 if ((bled || (var != 0x00000001)) &&
504 return -EINVAL; 583 !dev->doorbell_mask)
505 if (dev->supplement_adapter_info.SupportedOptions2 & 584 return -EINVAL;
506 AAC_OPTION_DOORBELL_RESET) { 585 else if (dev->doorbell_mask) {
507 src_writel(dev, MUnit.IDR, reset_mask); 586 reset_mask = dev->doorbell_mask;
587 bled = 0;
588 var = 0x00000001;
589 }
590
591 if ((dev->pdev->device == PMC_DEVICE_S7 ||
592 dev->pdev->device == PMC_DEVICE_S8 ||
593 dev->pdev->device == PMC_DEVICE_S9) && dev->msi_enabled) {
594 aac_src_access_devreg(dev, AAC_ENABLE_INTX);
595 dev->msi_enabled = 0;
508 msleep(5000); /* Delay 5 seconds */ 596 msleep(5000); /* Delay 5 seconds */
509 } 597 }
598
599 if (!bled && (dev->supplement_adapter_info.SupportedOptions2 &
600 AAC_OPTION_DOORBELL_RESET)) {
601 src_writel(dev, MUnit.IDR, reset_mask);
602 ssleep(45);
603 } else {
604 src_writel(dev, MUnit.IDR, 0x100);
605 ssleep(45);
606 }
510 } 607 }
511 608
512 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC) 609 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC)
@@ -527,7 +624,6 @@ int aac_src_select_comm(struct aac_dev *dev, int comm)
527{ 624{
528 switch (comm) { 625 switch (comm) {
529 case AAC_COMM_MESSAGE: 626 case AAC_COMM_MESSAGE:
530 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
531 dev->a_ops.adapter_intr = aac_src_intr_message; 627 dev->a_ops.adapter_intr = aac_src_intr_message;
532 dev->a_ops.adapter_deliver = aac_src_deliver_message; 628 dev->a_ops.adapter_deliver = aac_src_deliver_message;
533 break; 629 break;
@@ -625,6 +721,7 @@ int aac_src_init(struct aac_dev *dev)
625 */ 721 */
626 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; 722 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
627 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; 723 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
724 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
628 dev->a_ops.adapter_notify = aac_src_notify_adapter; 725 dev->a_ops.adapter_notify = aac_src_notify_adapter;
629 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 726 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
630 dev->a_ops.adapter_check_health = aac_src_check_health; 727 dev->a_ops.adapter_check_health = aac_src_check_health;
@@ -646,8 +743,11 @@ int aac_src_init(struct aac_dev *dev)
646 743
647 dev->msi = aac_msi && !pci_enable_msi(dev->pdev); 744 dev->msi = aac_msi && !pci_enable_msi(dev->pdev);
648 745
746 dev->aac_msix[0].vector_no = 0;
747 dev->aac_msix[0].dev = dev;
748
649 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, 749 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
650 IRQF_SHARED, "aacraid", dev) < 0) { 750 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) {
651 751
652 if (dev->msi) 752 if (dev->msi)
653 pci_disable_msi(dev->pdev); 753 pci_disable_msi(dev->pdev);
@@ -659,6 +759,7 @@ int aac_src_init(struct aac_dev *dev)
659 dev->dbg_base = pci_resource_start(dev->pdev, 2); 759 dev->dbg_base = pci_resource_start(dev->pdev, 2);
660 dev->dbg_base_mapped = dev->regs.src.bar1; 760 dev->dbg_base_mapped = dev->regs.src.bar1;
661 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE; 761 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE;
762 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
662 763
663 aac_adapter_enable_int(dev); 764 aac_adapter_enable_int(dev);
664 765
@@ -688,7 +789,9 @@ int aac_srcv_init(struct aac_dev *dev)
688 unsigned long status; 789 unsigned long status;
689 int restart = 0; 790 int restart = 0;
690 int instance = dev->id; 791 int instance = dev->id;
792 int i, j;
691 const char *name = dev->name; 793 const char *name = dev->name;
794 int cpu;
692 795
693 dev->a_ops.adapter_ioremap = aac_srcv_ioremap; 796 dev->a_ops.adapter_ioremap = aac_srcv_ioremap;
694 dev->a_ops.adapter_comm = aac_src_select_comm; 797 dev->a_ops.adapter_comm = aac_src_select_comm;
@@ -784,6 +887,7 @@ int aac_srcv_init(struct aac_dev *dev)
784 */ 887 */
785 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; 888 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
786 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; 889 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
890 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
787 dev->a_ops.adapter_notify = aac_src_notify_adapter; 891 dev->a_ops.adapter_notify = aac_src_notify_adapter;
788 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 892 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
789 dev->a_ops.adapter_check_health = aac_src_check_health; 893 dev->a_ops.adapter_check_health = aac_src_check_health;
@@ -802,18 +906,54 @@ int aac_srcv_init(struct aac_dev *dev)
802 goto error_iounmap; 906 goto error_iounmap;
803 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE2) 907 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE2)
804 goto error_iounmap; 908 goto error_iounmap;
805 dev->msi = aac_msi && !pci_enable_msi(dev->pdev); 909 if (dev->msi_enabled)
806 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, 910 aac_src_access_devreg(dev, AAC_ENABLE_MSIX);
807 IRQF_SHARED, "aacraid", dev) < 0) { 911 if (!dev->sync_mode && dev->msi_enabled && dev->max_msix > 1) {
808 if (dev->msi) 912 cpu = cpumask_first(cpu_online_mask);
809 pci_disable_msi(dev->pdev); 913 for (i = 0; i < dev->max_msix; i++) {
810 printk(KERN_ERR "%s%d: Interrupt unavailable.\n", 914 dev->aac_msix[i].vector_no = i;
811 name, instance); 915 dev->aac_msix[i].dev = dev;
812 goto error_iounmap; 916
917 if (request_irq(dev->msixentry[i].vector,
918 dev->a_ops.adapter_intr,
919 0,
920 "aacraid",
921 &(dev->aac_msix[i]))) {
922 printk(KERN_ERR "%s%d: Failed to register IRQ for vector %d.\n",
923 name, instance, i);
924 for (j = 0 ; j < i ; j++)
925 free_irq(dev->msixentry[j].vector,
926 &(dev->aac_msix[j]));
927 pci_disable_msix(dev->pdev);
928 goto error_iounmap;
929 }
930 if (irq_set_affinity_hint(
931 dev->msixentry[i].vector,
932 get_cpu_mask(cpu))) {
933 printk(KERN_ERR "%s%d: Failed to set IRQ affinity for cpu %d\n",
934 name, instance, cpu);
935 }
936 cpu = cpumask_next(cpu, cpu_online_mask);
937 }
938 } else {
939 dev->aac_msix[0].vector_no = 0;
940 dev->aac_msix[0].dev = dev;
941
942 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
943 IRQF_SHARED,
944 "aacraid",
945 &(dev->aac_msix[0])) < 0) {
946 if (dev->msi)
947 pci_disable_msi(dev->pdev);
948 printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
949 name, instance);
950 goto error_iounmap;
951 }
813 } 952 }
814 dev->dbg_base = dev->base_start; 953 dev->dbg_base = dev->base_start;
815 dev->dbg_base_mapped = dev->base; 954 dev->dbg_base_mapped = dev->base;
816 dev->dbg_size = dev->base_size; 955 dev->dbg_size = dev->base_size;
956 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
817 957
818 aac_adapter_enable_int(dev); 958 aac_adapter_enable_int(dev);
819 959
@@ -831,3 +971,93 @@ error_iounmap:
831 return -1; 971 return -1;
832} 972}
833 973
974void aac_src_access_devreg(struct aac_dev *dev, int mode)
975{
976 u_int32_t val;
977
978 switch (mode) {
979 case AAC_ENABLE_INTERRUPT:
980 src_writel(dev,
981 MUnit.OIMR,
982 dev->OIMR = (dev->msi_enabled ?
983 AAC_INT_ENABLE_TYPE1_MSIX :
984 AAC_INT_ENABLE_TYPE1_INTX));
985 break;
986
987 case AAC_DISABLE_INTERRUPT:
988 src_writel(dev,
989 MUnit.OIMR,
990 dev->OIMR = AAC_INT_DISABLE_ALL);
991 break;
992
993 case AAC_ENABLE_MSIX:
994 /* set bit 6 */
995 val = src_readl(dev, MUnit.IDR);
996 val |= 0x40;
997 src_writel(dev, MUnit.IDR, val);
998 src_readl(dev, MUnit.IDR);
999 /* unmask int. */
1000 val = PMC_ALL_INTERRUPT_BITS;
1001 src_writel(dev, MUnit.IOAR, val);
1002 val = src_readl(dev, MUnit.OIMR);
1003 src_writel(dev,
1004 MUnit.OIMR,
1005 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0)));
1006 break;
1007
1008 case AAC_DISABLE_MSIX:
1009 /* reset bit 6 */
1010 val = src_readl(dev, MUnit.IDR);
1011 val &= ~0x40;
1012 src_writel(dev, MUnit.IDR, val);
1013 src_readl(dev, MUnit.IDR);
1014 break;
1015
1016 case AAC_CLEAR_AIF_BIT:
1017 /* set bit 5 */
1018 val = src_readl(dev, MUnit.IDR);
1019 val |= 0x20;
1020 src_writel(dev, MUnit.IDR, val);
1021 src_readl(dev, MUnit.IDR);
1022 break;
1023
1024 case AAC_CLEAR_SYNC_BIT:
1025 /* set bit 4 */
1026 val = src_readl(dev, MUnit.IDR);
1027 val |= 0x10;
1028 src_writel(dev, MUnit.IDR, val);
1029 src_readl(dev, MUnit.IDR);
1030 break;
1031
1032 case AAC_ENABLE_INTX:
1033 /* set bit 7 */
1034 val = src_readl(dev, MUnit.IDR);
1035 val |= 0x80;
1036 src_writel(dev, MUnit.IDR, val);
1037 src_readl(dev, MUnit.IDR);
1038 /* unmask int. */
1039 val = PMC_ALL_INTERRUPT_BITS;
1040 src_writel(dev, MUnit.IOAR, val);
1041 src_readl(dev, MUnit.IOAR);
1042 val = src_readl(dev, MUnit.OIMR);
1043 src_writel(dev, MUnit.OIMR,
1044 val & (~(PMC_GLOBAL_INT_BIT2)));
1045 break;
1046
1047 default:
1048 break;
1049 }
1050}
1051
1052static int aac_src_get_sync_status(struct aac_dev *dev)
1053{
1054
1055 int val;
1056
1057 if (dev->msi_enabled)
1058 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0;
1059 else
1060 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT;
1061
1062 return val;
1063}
diff --git a/drivers/scsi/aha1542.c b/drivers/scsi/aha1542.c
index 770c48ddbe5e..ec432763a29a 100644
--- a/drivers/scsi/aha1542.c
+++ b/drivers/scsi/aha1542.c
@@ -1,28 +1,9 @@
1/* $Id: aha1542.c,v 1.1 1992/07/24 06:27:38 root Exp root $ 1/*
2 * linux/kernel/aha1542.c 2 * Driver for Adaptec AHA-1542 SCSI host adapters
3 * 3 *
4 * Copyright (C) 1992 Tommy Thorn 4 * Copyright (C) 1992 Tommy Thorn
5 * Copyright (C) 1993, 1994, 1995 Eric Youngdale 5 * Copyright (C) 1993, 1994, 1995 Eric Youngdale
6 * 6 * Copyright (C) 2015 Ondrej Zary
7 * Modified by Eric Youngdale
8 * Use request_irq and request_dma to help prevent unexpected conflicts
9 * Set up on-board DMA controller, such that we do not have to
10 * have the bios enabled to use the aha1542.
11 * Modified by David Gentzel
12 * Don't call request_dma if dma mask is 0 (for BusLogic BT-445S VL-Bus
13 * controller).
14 * Modified by Matti Aarnio
15 * Accept parameters from LILO cmd-line. -- 1-Oct-94
16 * Modified by Mike McLagan <mike.mclagan@linux.org>
17 * Recognise extended mode on AHA1542CP, different bit than 1542CF
18 * 1-Jan-97
19 * Modified by Bjorn L. Thordarson and Einar Thor Einarsson
20 * Recognize that DMA0 is valid DMA channel -- 13-Jul-98
21 * Modified by Chris Faulhaber <jedgar@fxp.org>
22 * Added module command-line options
23 * 19-Jul-99
24 * Modified by Adam Fritzler
25 * Added proper detection of the AHA-1640 (MCA, now deleted)
26 */ 7 */
27 8
28#include <linux/module.h> 9#include <linux/module.h>
@@ -30,96 +11,44 @@
30#include <linux/kernel.h> 11#include <linux/kernel.h>
31#include <linux/types.h> 12#include <linux/types.h>
32#include <linux/string.h> 13#include <linux/string.h>
33#include <linux/ioport.h>
34#include <linux/delay.h> 14#include <linux/delay.h>
35#include <linux/proc_fs.h>
36#include <linux/init.h> 15#include <linux/init.h>
37#include <linux/spinlock.h> 16#include <linux/spinlock.h>
38#include <linux/isapnp.h> 17#include <linux/isa.h>
39#include <linux/blkdev.h> 18#include <linux/pnp.h>
40#include <linux/slab.h> 19#include <linux/slab.h>
41 20#include <linux/io.h>
42#include <asm/dma.h> 21#include <asm/dma.h>
43#include <asm/io.h> 22#include <scsi/scsi_cmnd.h>
44 23#include <scsi/scsi_device.h>
45#include "scsi.h"
46#include <scsi/scsi_host.h> 24#include <scsi/scsi_host.h>
47#include "aha1542.h" 25#include "aha1542.h"
48 26
49#define SCSI_BUF_PA(address) isa_virt_to_bus(address) 27#define MAXBOARDS 4
50#define SCSI_SG_PA(sgent) (isa_page_to_bus(sg_page((sgent))) + (sgent)->offset)
51
52#include <linux/stat.h>
53
54#ifdef DEBUG
55#define DEB(x) x
56#else
57#define DEB(x)
58#endif
59
60/*
61 static const char RCSid[] = "$Header: /usr/src/linux/kernel/blk_drv/scsi/RCS/aha1542.c,v 1.1 1992/07/24 06:27:38 root Exp root $";
62 */
63
64/* The adaptec can be configured for quite a number of addresses, but
65 I generally do not want the card poking around at random. We allow
66 two addresses - this allows people to use the Adaptec with a Midi
67 card, which also used 0x330 -- can be overridden with LILO! */
68
69#define MAXBOARDS 4 /* Increase this and the sizes of the
70 arrays below, if you need more.. */
71
72/* Boards 3,4 slots are reserved for ISAPnP scans */
73
74static unsigned int bases[MAXBOARDS] __initdata = {0x330, 0x334, 0, 0};
75
76/* set by aha1542_setup according to the command line; they also may
77 be marked __initdata, but require zero initializers then */
78
79static int setup_called[MAXBOARDS];
80static int setup_buson[MAXBOARDS];
81static int setup_busoff[MAXBOARDS];
82static int setup_dmaspeed[MAXBOARDS] __initdata = { -1, -1, -1, -1 };
83 28
84/* 29static bool isapnp = 1;
85 * LILO/Module params: aha1542=<PORTBASE>[,<BUSON>,<BUSOFF>[,<DMASPEED>]]
86 *
87 * Where: <PORTBASE> is any of the valid AHA addresses:
88 * 0x130, 0x134, 0x230, 0x234, 0x330, 0x334
89 * <BUSON> is the time (in microsecs) that AHA spends on the AT-bus
90 * when transferring data. 1542A power-on default is 11us,
91 * valid values are in range: 2..15 (decimal)
92 * <BUSOFF> is the time that AHA spends OFF THE BUS after while
93 * it is transferring data (not to monopolize the bus).
94 * Power-on default is 4us, valid range: 1..64 microseconds.
95 * <DMASPEED> Default is jumper selected (1542A: on the J1),
96 * but experimenter can alter it with this.
97 * Valid values: 5, 6, 7, 8, 10 (MB/s)
98 * Factory default is 5 MB/s.
99 */
100
101#if defined(MODULE)
102static bool isapnp = 0;
103static int aha1542[] = {0x330, 11, 4, -1};
104module_param_array(aha1542, int, NULL, 0);
105module_param(isapnp, bool, 0); 30module_param(isapnp, bool, 0);
31MODULE_PARM_DESC(isapnp, "enable PnP support (default=1)");
106 32
107static struct isapnp_device_id id_table[] __initdata = { 33static int io[MAXBOARDS] = { 0x330, 0x334, 0, 0 };
108 { 34module_param_array(io, int, NULL, 0);
109 ISAPNP_ANY_ID, ISAPNP_ANY_ID, 35MODULE_PARM_DESC(io, "base IO address of controller (0x130,0x134,0x230,0x234,0x330,0x334, default=0x330,0x334)");
110 ISAPNP_VENDOR('A', 'D', 'P'), ISAPNP_FUNCTION(0x1542),
111 0
112 },
113 {0}
114};
115 36
116MODULE_DEVICE_TABLE(isapnp, id_table); 37/* time AHA spends on the AT-bus during data transfer */
38static int bus_on[MAXBOARDS] = { -1, -1, -1, -1 }; /* power-on default: 11us */
39module_param_array(bus_on, int, NULL, 0);
40MODULE_PARM_DESC(bus_on, "bus on time [us] (2-15, default=-1 [HW default: 11])");
117 41
118#else 42/* time AHA spends off the bus (not to monopolize it) during data transfer */
119static int isapnp = 1; 43static int bus_off[MAXBOARDS] = { -1, -1, -1, -1 }; /* power-on default: 4us */
120#endif 44module_param_array(bus_off, int, NULL, 0);
45MODULE_PARM_DESC(bus_off, "bus off time [us] (1-64, default=-1 [HW default: 4])");
46
47/* default is jumper selected (J1 on 1542A), factory default = 5 MB/s */
48static int dma_speed[MAXBOARDS] = { -1, -1, -1, -1 };
49module_param_array(dma_speed, int, NULL, 0);
50MODULE_PARM_DESC(dma_speed, "DMA speed [MB/s] (5,6,7,8,10, default=-1 [by jumper])");
121 51
122#define BIOS_TRANSLATION_1632 0 /* Used by some old 1542A boards */
123#define BIOS_TRANSLATION_6432 1 /* Default case these days */ 52#define BIOS_TRANSLATION_6432 1 /* Default case these days */
124#define BIOS_TRANSLATION_25563 2 /* Big disk case */ 53#define BIOS_TRANSLATION_25563 2 /* Big disk case */
125 54
@@ -128,134 +57,71 @@ struct aha1542_hostdata {
128 int bios_translation; /* Mapping bios uses - for compatibility */ 57 int bios_translation; /* Mapping bios uses - for compatibility */
129 int aha1542_last_mbi_used; 58 int aha1542_last_mbi_used;
130 int aha1542_last_mbo_used; 59 int aha1542_last_mbo_used;
131 Scsi_Cmnd *SCint[AHA1542_MAILBOXES]; 60 struct scsi_cmnd *int_cmds[AHA1542_MAILBOXES];
132 struct mailbox mb[2 * AHA1542_MAILBOXES]; 61 struct mailbox mb[2 * AHA1542_MAILBOXES];
133 struct ccb ccb[AHA1542_MAILBOXES]; 62 struct ccb ccb[AHA1542_MAILBOXES];
134}; 63};
135 64
136#define HOSTDATA(host) ((struct aha1542_hostdata *) &host->hostdata) 65static inline void aha1542_intr_reset(u16 base)
137 66{
138static DEFINE_SPINLOCK(aha1542_lock); 67 outb(IRST, CONTROL(base));
139 68}
140
141
142#define WAITnexttimeout 3000000
143
144static void setup_mailboxes(int base_io, struct Scsi_Host *shpnt);
145static int aha1542_restart(struct Scsi_Host *shost);
146static void aha1542_intr_handle(struct Scsi_Host *shost);
147 69
148#define aha1542_intr_reset(base) outb(IRST, CONTROL(base)) 70static inline bool wait_mask(u16 port, u8 mask, u8 allof, u8 noneof, int timeout)
71{
72 bool delayed = true;
149 73
150#define WAIT(port, mask, allof, noneof) \ 74 if (timeout == 0) {
151 { register int WAITbits; \ 75 timeout = 3000000;
152 register int WAITtimeout = WAITnexttimeout; \ 76 delayed = false;
153 while (1) { \ 77 }
154 WAITbits = inb(port) & (mask); \
155 if ((WAITbits & (allof)) == (allof) && ((WAITbits & (noneof)) == 0)) \
156 break; \
157 if (--WAITtimeout == 0) goto fail; \
158 } \
159 }
160 78
161/* Similar to WAIT, except we use the udelay call to regulate the 79 while (1) {
162 amount of time we wait. */ 80 u8 bits = inb(port) & mask;
163#define WAITd(port, mask, allof, noneof, timeout) \ 81 if ((bits & allof) == allof && ((bits & noneof) == 0))
164 { register int WAITbits; \ 82 break;
165 register int WAITtimeout = timeout; \ 83 if (delayed)
166 while (1) { \ 84 mdelay(1);
167 WAITbits = inb(port) & (mask); \ 85 if (--timeout == 0)
168 if ((WAITbits & (allof)) == (allof) && ((WAITbits & (noneof)) == 0)) \ 86 return false;
169 break; \ 87 }
170 mdelay(1); \
171 if (--WAITtimeout == 0) goto fail; \
172 } \
173 }
174 88
175static void aha1542_stat(void) 89 return true;
176{
177/* int s = inb(STATUS), i = inb(INTRFLAGS);
178 printk("status=%x intrflags=%x\n", s, i, WAITnexttimeout-WAITtimeout); */
179} 90}
180 91
181/* This is a bit complicated, but we need to make sure that an interrupt 92static int aha1542_outb(unsigned int base, u8 val)
182 routine does not send something out while we are in the middle of this.
183 Fortunately, it is only at boot time that multi-byte messages
184 are ever sent. */
185static int aha1542_out(unsigned int base, unchar * cmdp, int len)
186{ 93{
187 unsigned long flags = 0; 94 if (!wait_mask(STATUS(base), CDF, 0, CDF, 0))
188 int got_lock; 95 return 1;
189 96 outb(val, DATA(base));
190 if (len == 1) { 97
191 got_lock = 0;
192 while (1 == 1) {
193 WAIT(STATUS(base), CDF, 0, CDF);
194 spin_lock_irqsave(&aha1542_lock, flags);
195 if (inb(STATUS(base)) & CDF) {
196 spin_unlock_irqrestore(&aha1542_lock, flags);
197 continue;
198 }
199 outb(*cmdp, DATA(base));
200 spin_unlock_irqrestore(&aha1542_lock, flags);
201 return 0;
202 }
203 } else {
204 spin_lock_irqsave(&aha1542_lock, flags);
205 got_lock = 1;
206 while (len--) {
207 WAIT(STATUS(base), CDF, 0, CDF);
208 outb(*cmdp++, DATA(base));
209 }
210 spin_unlock_irqrestore(&aha1542_lock, flags);
211 }
212 return 0; 98 return 0;
213fail:
214 if (got_lock)
215 spin_unlock_irqrestore(&aha1542_lock, flags);
216 printk(KERN_ERR "aha1542_out failed(%d): ", len + 1);
217 aha1542_stat();
218 return 1;
219} 99}
220 100
221/* Only used at boot time, so we do not need to worry about latency as much 101static int aha1542_out(unsigned int base, u8 *buf, int len)
222 here */
223
224static int __init aha1542_in(unsigned int base, unchar * cmdp, int len)
225{ 102{
226 unsigned long flags;
227
228 spin_lock_irqsave(&aha1542_lock, flags);
229 while (len--) { 103 while (len--) {
230 WAIT(STATUS(base), DF, DF, 0); 104 if (!wait_mask(STATUS(base), CDF, 0, CDF, 0))
231 *cmdp++ = inb(DATA(base)); 105 return 1;
106 outb(*buf++, DATA(base));
232 } 107 }
233 spin_unlock_irqrestore(&aha1542_lock, flags); 108 if (!wait_mask(INTRFLAGS(base), INTRMASK, HACC, 0, 0))
109 return 1;
110
234 return 0; 111 return 0;
235fail:
236 spin_unlock_irqrestore(&aha1542_lock, flags);
237 printk(KERN_ERR "aha1542_in failed(%d): ", len + 1);
238 aha1542_stat();
239 return 1;
240} 112}
241 113
242/* Similar to aha1542_in, except that we wait a very short period of time. 114/* Only used at boot time, so we do not need to worry about latency as much
243 We use this if we know the board is alive and awake, but we are not sure 115 here */
244 if the board will respond to the command we are about to send or not */
245static int __init aha1542_in1(unsigned int base, unchar * cmdp, int len)
246{
247 unsigned long flags;
248 116
249 spin_lock_irqsave(&aha1542_lock, flags); 117static int aha1542_in(unsigned int base, u8 *buf, int len, int timeout)
118{
250 while (len--) { 119 while (len--) {
251 WAITd(STATUS(base), DF, DF, 0, 100); 120 if (!wait_mask(STATUS(base), DF, DF, 0, timeout))
252 *cmdp++ = inb(DATA(base)); 121 return 1;
122 *buf++ = inb(DATA(base));
253 } 123 }
254 spin_unlock_irqrestore(&aha1542_lock, flags);
255 return 0; 124 return 0;
256fail:
257 spin_unlock_irqrestore(&aha1542_lock, flags);
258 return 1;
259} 125}
260 126
261static int makecode(unsigned hosterr, unsigned scsierr) 127static int makecode(unsigned hosterr, unsigned scsierr)
@@ -297,7 +163,9 @@ static int makecode(unsigned hosterr, unsigned scsierr)
297 case 0x1a: /* Invalid CCB or Segment List Parameter-A segment list with a zero 163 case 0x1a: /* Invalid CCB or Segment List Parameter-A segment list with a zero
298 length segment or invalid segment list boundaries was received. 164 length segment or invalid segment list boundaries was received.
299 A CCB parameter was invalid. */ 165 A CCB parameter was invalid. */
300 DEB(printk("Aha1542: %x %x\n", hosterr, scsierr)); 166#ifdef DEBUG
167 printk("Aha1542: %x %x\n", hosterr, scsierr);
168#endif
301 hosterr = DID_ERROR; /* Couldn't find any better */ 169 hosterr = DID_ERROR; /* Couldn't find any better */
302 break; 170 break;
303 171
@@ -314,106 +182,74 @@ static int makecode(unsigned hosterr, unsigned scsierr)
314 return scsierr | (hosterr << 16); 182 return scsierr | (hosterr << 16);
315} 183}
316 184
317static int __init aha1542_test_port(int bse, struct Scsi_Host *shpnt) 185static int aha1542_test_port(struct Scsi_Host *sh)
318{ 186{
319 unchar inquiry_cmd[] = {CMD_INQUIRY}; 187 u8 inquiry_result[4];
320 unchar inquiry_result[4]; 188 int i;
321 unchar *cmdp;
322 int len;
323 volatile int debug = 0;
324 189
325 /* Quick and dirty test for presence of the card. */ 190 /* Quick and dirty test for presence of the card. */
326 if (inb(STATUS(bse)) == 0xff) 191 if (inb(STATUS(sh->io_port)) == 0xff)
327 return 0; 192 return 0;
328 193
329 /* Reset the adapter. I ought to make a hard reset, but it's not really necessary */ 194 /* Reset the adapter. I ought to make a hard reset, but it's not really necessary */
330 195
331 /* DEB(printk("aha1542_test_port called \n")); */
332
333 /* In case some other card was probing here, reset interrupts */ 196 /* In case some other card was probing here, reset interrupts */
334 aha1542_intr_reset(bse); /* reset interrupts, so they don't block */ 197 aha1542_intr_reset(sh->io_port); /* reset interrupts, so they don't block */
335 198
336 outb(SRST | IRST /*|SCRST */ , CONTROL(bse)); 199 outb(SRST | IRST /*|SCRST */ , CONTROL(sh->io_port));
337 200
338 mdelay(20); /* Wait a little bit for things to settle down. */ 201 mdelay(20); /* Wait a little bit for things to settle down. */
339 202
340 debug = 1;
341 /* Expect INIT and IDLE, any of the others are bad */ 203 /* Expect INIT and IDLE, any of the others are bad */
342 WAIT(STATUS(bse), STATMASK, INIT | IDLE, STST | DIAGF | INVDCMD | DF | CDF); 204 if (!wait_mask(STATUS(sh->io_port), STATMASK, INIT | IDLE, STST | DIAGF | INVDCMD | DF | CDF, 0))
205 return 0;
343 206
344 debug = 2;
345 /* Shouldn't have generated any interrupts during reset */ 207 /* Shouldn't have generated any interrupts during reset */
346 if (inb(INTRFLAGS(bse)) & INTRMASK) 208 if (inb(INTRFLAGS(sh->io_port)) & INTRMASK)
347 goto fail; 209 return 0;
348
349 210
350 /* Perform a host adapter inquiry instead so we do not need to set 211 /* Perform a host adapter inquiry instead so we do not need to set
351 up the mailboxes ahead of time */ 212 up the mailboxes ahead of time */
352 213
353 aha1542_out(bse, inquiry_cmd, 1); 214 aha1542_outb(sh->io_port, CMD_INQUIRY);
354
355 debug = 3;
356 len = 4;
357 cmdp = &inquiry_result[0];
358 215
359 while (len--) { 216 for (i = 0; i < 4; i++) {
360 WAIT(STATUS(bse), DF, DF, 0); 217 if (!wait_mask(STATUS(sh->io_port), DF, DF, 0, 0))
361 *cmdp++ = inb(DATA(bse)); 218 return 0;
219 inquiry_result[i] = inb(DATA(sh->io_port));
362 } 220 }
363 221
364 debug = 8;
365 /* Reading port should reset DF */ 222 /* Reading port should reset DF */
366 if (inb(STATUS(bse)) & DF) 223 if (inb(STATUS(sh->io_port)) & DF)
367 goto fail; 224 return 0;
368 225
369 debug = 9;
370 /* When HACC, command is completed, and we're though testing */ 226 /* When HACC, command is completed, and we're though testing */
371 WAIT(INTRFLAGS(bse), HACC, HACC, 0); 227 if (!wait_mask(INTRFLAGS(sh->io_port), HACC, HACC, 0, 0))
372 /* now initialize adapter */ 228 return 0;
373 229
374 debug = 10;
375 /* Clear interrupts */ 230 /* Clear interrupts */
376 outb(IRST, CONTROL(bse)); 231 outb(IRST, CONTROL(sh->io_port));
377
378 debug = 11;
379
380 return debug; /* 1 = ok */
381fail:
382 return 0; /* 0 = not ok */
383}
384 232
385/* A quick wrapper for do_aha1542_intr_handle to grab the spin lock */ 233 return 1;
386static irqreturn_t do_aha1542_intr_handle(int dummy, void *dev_id)
387{
388 unsigned long flags;
389 struct Scsi_Host *shost = dev_id;
390
391 spin_lock_irqsave(shost->host_lock, flags);
392 aha1542_intr_handle(shost);
393 spin_unlock_irqrestore(shost->host_lock, flags);
394 return IRQ_HANDLED;
395} 234}
396 235
397/* A "high" level interrupt handler */ 236static irqreturn_t aha1542_interrupt(int irq, void *dev_id)
398static void aha1542_intr_handle(struct Scsi_Host *shost)
399{ 237{
400 void (*my_done) (Scsi_Cmnd *) = NULL; 238 struct Scsi_Host *sh = dev_id;
239 struct aha1542_hostdata *aha1542 = shost_priv(sh);
240 void (*my_done)(struct scsi_cmnd *) = NULL;
401 int errstatus, mbi, mbo, mbistatus; 241 int errstatus, mbi, mbo, mbistatus;
402 int number_serviced; 242 int number_serviced;
403 unsigned long flags; 243 unsigned long flags;
404 Scsi_Cmnd *SCtmp; 244 struct scsi_cmnd *tmp_cmd;
405 int flag; 245 int flag;
406 int needs_restart; 246 struct mailbox *mb = aha1542->mb;
407 struct mailbox *mb; 247 struct ccb *ccb = aha1542->ccb;
408 struct ccb *ccb;
409
410 mb = HOSTDATA(shost)->mb;
411 ccb = HOSTDATA(shost)->ccb;
412 248
413#ifdef DEBUG 249#ifdef DEBUG
414 { 250 {
415 flag = inb(INTRFLAGS(shost->io_port)); 251 flag = inb(INTRFLAGS(sh->io_port));
416 printk(KERN_DEBUG "aha1542_intr_handle: "); 252 shost_printk(KERN_DEBUG, sh, "aha1542_intr_handle: ");
417 if (!(flag & ANYINTR)) 253 if (!(flag & ANYINTR))
418 printk("no interrupt?"); 254 printk("no interrupt?");
419 if (flag & MBIF) 255 if (flag & MBIF)
@@ -424,14 +260,14 @@ static void aha1542_intr_handle(struct Scsi_Host *shost)
424 printk("HACC "); 260 printk("HACC ");
425 if (flag & SCRD) 261 if (flag & SCRD)
426 printk("SCRD "); 262 printk("SCRD ");
427 printk("status %02x\n", inb(STATUS(shost->io_port))); 263 printk("status %02x\n", inb(STATUS(sh->io_port)));
428 }; 264 };
429#endif 265#endif
430 number_serviced = 0; 266 number_serviced = 0;
431 needs_restart = 0;
432 267
433 while (1 == 1) { 268 spin_lock_irqsave(sh->host_lock, flags);
434 flag = inb(INTRFLAGS(shost->io_port)); 269 while (1) {
270 flag = inb(INTRFLAGS(sh->io_port));
435 271
436 /* Check for unusual interrupts. If any of these happen, we should 272 /* Check for unusual interrupts. If any of these happen, we should
437 probably do something special, but for now just printing a message 273 probably do something special, but for now just printing a message
@@ -442,15 +278,12 @@ static void aha1542_intr_handle(struct Scsi_Host *shost)
442 printk("MBOF "); 278 printk("MBOF ");
443 if (flag & HACC) 279 if (flag & HACC)
444 printk("HACC "); 280 printk("HACC ");
445 if (flag & SCRD) { 281 if (flag & SCRD)
446 needs_restart = 1;
447 printk("SCRD "); 282 printk("SCRD ");
448 }
449 } 283 }
450 aha1542_intr_reset(shost->io_port); 284 aha1542_intr_reset(sh->io_port);
451 285
452 spin_lock_irqsave(&aha1542_lock, flags); 286 mbi = aha1542->aha1542_last_mbi_used + 1;
453 mbi = HOSTDATA(shost)->aha1542_last_mbi_used + 1;
454 if (mbi >= 2 * AHA1542_MAILBOXES) 287 if (mbi >= 2 * AHA1542_MAILBOXES)
455 mbi = AHA1542_MAILBOXES; 288 mbi = AHA1542_MAILBOXES;
456 289
@@ -460,57 +293,51 @@ static void aha1542_intr_handle(struct Scsi_Host *shost)
460 mbi++; 293 mbi++;
461 if (mbi >= 2 * AHA1542_MAILBOXES) 294 if (mbi >= 2 * AHA1542_MAILBOXES)
462 mbi = AHA1542_MAILBOXES; 295 mbi = AHA1542_MAILBOXES;
463 } while (mbi != HOSTDATA(shost)->aha1542_last_mbi_used); 296 } while (mbi != aha1542->aha1542_last_mbi_used);
464 297
465 if (mb[mbi].status == 0) { 298 if (mb[mbi].status == 0) {
466 spin_unlock_irqrestore(&aha1542_lock, flags); 299 spin_unlock_irqrestore(sh->host_lock, flags);
467 /* Hmm, no mail. Must have read it the last time around */ 300 /* Hmm, no mail. Must have read it the last time around */
468 if (!number_serviced && !needs_restart) 301 if (!number_serviced)
469 printk(KERN_WARNING "aha1542.c: interrupt received, but no mail.\n"); 302 shost_printk(KERN_WARNING, sh, "interrupt received, but no mail.\n");
470 /* We detected a reset. Restart all pending commands for 303 return IRQ_HANDLED;
471 devices that use the hard reset option */
472 if (needs_restart)
473 aha1542_restart(shost);
474 return;
475 }; 304 };
476 305
477 mbo = (scsi2int(mb[mbi].ccbptr) - (SCSI_BUF_PA(&ccb[0]))) / sizeof(struct ccb); 306 mbo = (scsi2int(mb[mbi].ccbptr) - (isa_virt_to_bus(&ccb[0]))) / sizeof(struct ccb);
478 mbistatus = mb[mbi].status; 307 mbistatus = mb[mbi].status;
479 mb[mbi].status = 0; 308 mb[mbi].status = 0;
480 HOSTDATA(shost)->aha1542_last_mbi_used = mbi; 309 aha1542->aha1542_last_mbi_used = mbi;
481 spin_unlock_irqrestore(&aha1542_lock, flags);
482 310
483#ifdef DEBUG 311#ifdef DEBUG
484 { 312 if (ccb[mbo].tarstat | ccb[mbo].hastat)
485 if (ccb[mbo].tarstat | ccb[mbo].hastat) 313 shost_printk(KERN_DEBUG, sh, "aha1542_command: returning %x (status %d)\n",
486 printk(KERN_DEBUG "aha1542_command: returning %x (status %d)\n", 314 ccb[mbo].tarstat + ((int) ccb[mbo].hastat << 16), mb[mbi].status);
487 ccb[mbo].tarstat + ((int) ccb[mbo].hastat << 16), mb[mbi].status);
488 };
489#endif 315#endif
490 316
491 if (mbistatus == 3) 317 if (mbistatus == 3)
492 continue; /* Aborted command not found */ 318 continue; /* Aborted command not found */
493 319
494#ifdef DEBUG 320#ifdef DEBUG
495 printk(KERN_DEBUG "...done %d %d\n", mbo, mbi); 321 shost_printk(KERN_DEBUG, sh, "...done %d %d\n", mbo, mbi);
496#endif 322#endif
497 323
498 SCtmp = HOSTDATA(shost)->SCint[mbo]; 324 tmp_cmd = aha1542->int_cmds[mbo];
499 325
500 if (!SCtmp || !SCtmp->scsi_done) { 326 if (!tmp_cmd || !tmp_cmd->scsi_done) {
501 printk(KERN_WARNING "aha1542_intr_handle: Unexpected interrupt\n"); 327 spin_unlock_irqrestore(sh->host_lock, flags);
502 printk(KERN_WARNING "tarstat=%x, hastat=%x idlun=%x ccb#=%d \n", ccb[mbo].tarstat, 328 shost_printk(KERN_WARNING, sh, "Unexpected interrupt\n");
329 shost_printk(KERN_WARNING, sh, "tarstat=%x, hastat=%x idlun=%x ccb#=%d\n", ccb[mbo].tarstat,
503 ccb[mbo].hastat, ccb[mbo].idlun, mbo); 330 ccb[mbo].hastat, ccb[mbo].idlun, mbo);
504 return; 331 return IRQ_HANDLED;
505 } 332 }
506 my_done = SCtmp->scsi_done; 333 my_done = tmp_cmd->scsi_done;
507 kfree(SCtmp->host_scribble); 334 kfree(tmp_cmd->host_scribble);
508 SCtmp->host_scribble = NULL; 335 tmp_cmd->host_scribble = NULL;
509 /* Fetch the sense data, and tuck it away, in the required slot. The 336 /* Fetch the sense data, and tuck it away, in the required slot. The
510 Adaptec automatically fetches it, and there is no guarantee that 337 Adaptec automatically fetches it, and there is no guarantee that
511 we will still have it in the cdb when we come back */ 338 we will still have it in the cdb when we come back */
512 if (ccb[mbo].tarstat == 2) 339 if (ccb[mbo].tarstat == 2)
513 memcpy(SCtmp->sense_buffer, &ccb[mbo].cdb[ccb[mbo].cdblen], 340 memcpy(tmp_cmd->sense_buffer, &ccb[mbo].cdb[ccb[mbo].cdblen],
514 SCSI_SENSE_BUFFERSIZE); 341 SCSI_SENSE_BUFFERSIZE);
515 342
516 343
@@ -525,166 +352,122 @@ static void aha1542_intr_handle(struct Scsi_Host *shost)
525 352
526#ifdef DEBUG 353#ifdef DEBUG
527 if (errstatus) 354 if (errstatus)
528 printk(KERN_DEBUG "(aha1542 error:%x %x %x) ", errstatus, 355 shost_printk(KERN_DEBUG, sh, "(aha1542 error:%x %x %x) ", errstatus,
529 ccb[mbo].hastat, ccb[mbo].tarstat); 356 ccb[mbo].hastat, ccb[mbo].tarstat);
357 if (ccb[mbo].tarstat == 2)
358 print_hex_dump_bytes("sense: ", DUMP_PREFIX_NONE, &ccb[mbo].cdb[ccb[mbo].cdblen], 12);
359 if (errstatus)
360 printk("aha1542_intr_handle: returning %6x\n", errstatus);
530#endif 361#endif
531 362 tmp_cmd->result = errstatus;
532 if (ccb[mbo].tarstat == 2) { 363 aha1542->int_cmds[mbo] = NULL; /* This effectively frees up the mailbox slot, as
533#ifdef DEBUG 364 far as queuecommand is concerned */
534 int i; 365 my_done(tmp_cmd);
535#endif
536 DEB(printk("aha1542_intr_handle: sense:"));
537#ifdef DEBUG
538 for (i = 0; i < 12; i++)
539 printk("%02x ", ccb[mbo].cdb[ccb[mbo].cdblen + i]);
540 printk("\n");
541#endif
542 /*
543 DEB(printk("aha1542_intr_handle: buf:"));
544 for (i = 0; i < bufflen; i++)
545 printk("%02x ", ((unchar *)buff)[i]);
546 printk("\n");
547 */
548 }
549 DEB(if (errstatus) printk("aha1542_intr_handle: returning %6x\n", errstatus));
550 SCtmp->result = errstatus;
551 HOSTDATA(shost)->SCint[mbo] = NULL; /* This effectively frees up the mailbox slot, as
552 far as queuecommand is concerned */
553 my_done(SCtmp);
554 number_serviced++; 366 number_serviced++;
555 }; 367 };
556} 368}
557 369
558static int aha1542_queuecommand_lck(Scsi_Cmnd * SCpnt, void (*done) (Scsi_Cmnd *)) 370static int aha1542_queuecommand(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
559{ 371{
560 unchar ahacmd = CMD_START_SCSI; 372 struct aha1542_hostdata *aha1542 = shost_priv(sh);
561 unchar direction; 373 u8 direction;
562 unchar *cmd = (unchar *) SCpnt->cmnd; 374 u8 target = cmd->device->id;
563 unchar target = SCpnt->device->id; 375 u8 lun = cmd->device->lun;
564 unchar lun = SCpnt->device->lun;
565 unsigned long flags; 376 unsigned long flags;
566 int bufflen = scsi_bufflen(SCpnt); 377 int bufflen = scsi_bufflen(cmd);
567 int mbo; 378 int mbo;
568 struct mailbox *mb; 379 struct mailbox *mb = aha1542->mb;
569 struct ccb *ccb; 380 struct ccb *ccb = aha1542->ccb;
570 381
571 DEB(int i); 382 if (*cmd->cmnd == REQUEST_SENSE) {
572
573 mb = HOSTDATA(SCpnt->device->host)->mb;
574 ccb = HOSTDATA(SCpnt->device->host)->ccb;
575
576 DEB(if (target > 1) {
577 SCpnt->result = DID_TIME_OUT << 16;
578 done(SCpnt); return 0;
579 }
580 );
581
582 if (*cmd == REQUEST_SENSE) {
583 /* Don't do the command - we have the sense data already */ 383 /* Don't do the command - we have the sense data already */
584#if 0 384 cmd->result = 0;
585 /* scsi_request_sense() provides a buffer of size 256, 385 cmd->scsi_done(cmd);
586 so there is no reason to expect equality */
587 if (bufflen != SCSI_SENSE_BUFFERSIZE)
588 printk(KERN_CRIT "aha1542: Wrong buffer length supplied "
589 "for request sense (%d)\n", bufflen);
590#endif
591 SCpnt->result = 0;
592 done(SCpnt);
593 return 0; 386 return 0;
594 } 387 }
595#ifdef DEBUG 388#ifdef DEBUG
596 if (*cmd == READ_10 || *cmd == WRITE_10) 389 {
597 i = xscsi2int(cmd + 2); 390 int i = -1;
598 else if (*cmd == READ_6 || *cmd == WRITE_6) 391 if (*cmd->cmnd == READ_10 || *cmd->cmnd == WRITE_10)
599 i = scsi2int(cmd + 2); 392 i = xscsi2int(cmd->cmnd + 2);
600 else 393 else if (*cmd->cmnd == READ_6 || *cmd->cmnd == WRITE_6)
601 i = -1; 394 i = scsi2int(cmd->cmnd + 2);
602 if (done) 395 shost_printk(KERN_DEBUG, sh, "aha1542_queuecommand: dev %d cmd %02x pos %d len %d",
603 printk(KERN_DEBUG "aha1542_queuecommand: dev %d cmd %02x pos %d len %d ", target, *cmd, i, bufflen); 396 target, *cmd->cmnd, i, bufflen);
604 else 397 print_hex_dump_bytes("command: ", DUMP_PREFIX_NONE, cmd->cmnd, cmd->cmd_len);
605 printk(KERN_DEBUG "aha1542_command: dev %d cmd %02x pos %d len %d ", target, *cmd, i, bufflen); 398 }
606 aha1542_stat();
607 printk(KERN_DEBUG "aha1542_queuecommand: dumping scsi cmd:");
608 for (i = 0; i < SCpnt->cmd_len; i++)
609 printk("%02x ", cmd[i]);
610 printk("\n");
611 if (*cmd == WRITE_10 || *cmd == WRITE_6)
612 return 0; /* we are still testing, so *don't* write */
613#endif 399#endif
614 /* Use the outgoing mailboxes in a round-robin fashion, because this 400 /* Use the outgoing mailboxes in a round-robin fashion, because this
615 is how the host adapter will scan for them */ 401 is how the host adapter will scan for them */
616 402
617 spin_lock_irqsave(&aha1542_lock, flags); 403 spin_lock_irqsave(sh->host_lock, flags);
618 mbo = HOSTDATA(SCpnt->device->host)->aha1542_last_mbo_used + 1; 404 mbo = aha1542->aha1542_last_mbo_used + 1;
619 if (mbo >= AHA1542_MAILBOXES) 405 if (mbo >= AHA1542_MAILBOXES)
620 mbo = 0; 406 mbo = 0;
621 407
622 do { 408 do {
623 if (mb[mbo].status == 0 && HOSTDATA(SCpnt->device->host)->SCint[mbo] == NULL) 409 if (mb[mbo].status == 0 && aha1542->int_cmds[mbo] == NULL)
624 break; 410 break;
625 mbo++; 411 mbo++;
626 if (mbo >= AHA1542_MAILBOXES) 412 if (mbo >= AHA1542_MAILBOXES)
627 mbo = 0; 413 mbo = 0;
628 } while (mbo != HOSTDATA(SCpnt->device->host)->aha1542_last_mbo_used); 414 } while (mbo != aha1542->aha1542_last_mbo_used);
629 415
630 if (mb[mbo].status || HOSTDATA(SCpnt->device->host)->SCint[mbo]) 416 if (mb[mbo].status || aha1542->int_cmds[mbo])
631 panic("Unable to find empty mailbox for aha1542.\n"); 417 panic("Unable to find empty mailbox for aha1542.\n");
632 418
633 HOSTDATA(SCpnt->device->host)->SCint[mbo] = SCpnt; /* This will effectively prevent someone else from 419 aha1542->int_cmds[mbo] = cmd; /* This will effectively prevent someone else from
634 screwing with this cdb. */ 420 screwing with this cdb. */
635 421
636 HOSTDATA(SCpnt->device->host)->aha1542_last_mbo_used = mbo; 422 aha1542->aha1542_last_mbo_used = mbo;
637 spin_unlock_irqrestore(&aha1542_lock, flags);
638 423
639#ifdef DEBUG 424#ifdef DEBUG
640 printk(KERN_DEBUG "Sending command (%d %x)...", mbo, done); 425 shost_printk(KERN_DEBUG, sh, "Sending command (%d %p)...", mbo, cmd->scsi_done);
641#endif 426#endif
642 427
643 any2scsi(mb[mbo].ccbptr, SCSI_BUF_PA(&ccb[mbo])); /* This gets trashed for some reason */ 428 any2scsi(mb[mbo].ccbptr, isa_virt_to_bus(&ccb[mbo])); /* This gets trashed for some reason */
644 429
645 memset(&ccb[mbo], 0, sizeof(struct ccb)); 430 memset(&ccb[mbo], 0, sizeof(struct ccb));
646 431
647 ccb[mbo].cdblen = SCpnt->cmd_len; 432 ccb[mbo].cdblen = cmd->cmd_len;
648 433
649 direction = 0; 434 direction = 0;
650 if (*cmd == READ_10 || *cmd == READ_6) 435 if (*cmd->cmnd == READ_10 || *cmd->cmnd == READ_6)
651 direction = 8; 436 direction = 8;
652 else if (*cmd == WRITE_10 || *cmd == WRITE_6) 437 else if (*cmd->cmnd == WRITE_10 || *cmd->cmnd == WRITE_6)
653 direction = 16; 438 direction = 16;
654 439
655 memcpy(ccb[mbo].cdb, cmd, ccb[mbo].cdblen); 440 memcpy(ccb[mbo].cdb, cmd->cmnd, ccb[mbo].cdblen);
656 441
657 if (bufflen) { 442 if (bufflen) {
658 struct scatterlist *sg; 443 struct scatterlist *sg;
659 struct chain *cptr; 444 struct chain *cptr;
660#ifdef DEBUG 445 int i, sg_count = scsi_sg_count(cmd);
661 unsigned char *ptr; 446
662#endif
663 int i, sg_count = scsi_sg_count(SCpnt);
664 ccb[mbo].op = 2; /* SCSI Initiator Command w/scatter-gather */ 447 ccb[mbo].op = 2; /* SCSI Initiator Command w/scatter-gather */
665 SCpnt->host_scribble = kmalloc(sizeof(*cptr)*sg_count, 448 cmd->host_scribble = kmalloc(sizeof(*cptr)*sg_count,
666 GFP_KERNEL | GFP_DMA); 449 GFP_KERNEL | GFP_DMA);
667 cptr = (struct chain *) SCpnt->host_scribble; 450 cptr = (struct chain *) cmd->host_scribble;
668 if (cptr == NULL) { 451 if (cptr == NULL) {
669 /* free the claimed mailbox slot */ 452 /* free the claimed mailbox slot */
670 HOSTDATA(SCpnt->device->host)->SCint[mbo] = NULL; 453 aha1542->int_cmds[mbo] = NULL;
454 spin_unlock_irqrestore(sh->host_lock, flags);
671 return SCSI_MLQUEUE_HOST_BUSY; 455 return SCSI_MLQUEUE_HOST_BUSY;
672 } 456 }
673 scsi_for_each_sg(SCpnt, sg, sg_count, i) { 457 scsi_for_each_sg(cmd, sg, sg_count, i) {
674 any2scsi(cptr[i].dataptr, SCSI_SG_PA(sg)); 458 any2scsi(cptr[i].dataptr, isa_page_to_bus(sg_page(sg))
459 + sg->offset);
675 any2scsi(cptr[i].datalen, sg->length); 460 any2scsi(cptr[i].datalen, sg->length);
676 }; 461 };
677 any2scsi(ccb[mbo].datalen, sg_count * sizeof(struct chain)); 462 any2scsi(ccb[mbo].datalen, sg_count * sizeof(struct chain));
678 any2scsi(ccb[mbo].dataptr, SCSI_BUF_PA(cptr)); 463 any2scsi(ccb[mbo].dataptr, isa_virt_to_bus(cptr));
679#ifdef DEBUG 464#ifdef DEBUG
680 printk("cptr %x: ", cptr); 465 shost_printk(KERN_DEBUG, sh, "cptr %p: ", cptr);
681 ptr = (unsigned char *) cptr; 466 print_hex_dump_bytes("cptr: ", DUMP_PREFIX_NONE, cptr, 18);
682 for (i = 0; i < 18; i++)
683 printk("%02x ", ptr[i]);
684#endif 467#endif
685 } else { 468 } else {
686 ccb[mbo].op = 0; /* SCSI Initiator Command */ 469 ccb[mbo].op = 0; /* SCSI Initiator Command */
687 SCpnt->host_scribble = NULL; 470 cmd->host_scribble = NULL;
688 any2scsi(ccb[mbo].datalen, 0); 471 any2scsi(ccb[mbo].datalen, 0);
689 any2scsi(ccb[mbo].dataptr, 0); 472 any2scsi(ccb[mbo].dataptr, 0);
690 }; 473 };
@@ -694,139 +477,116 @@ static int aha1542_queuecommand_lck(Scsi_Cmnd * SCpnt, void (*done) (Scsi_Cmnd *
694 ccb[mbo].commlinkid = 0; 477 ccb[mbo].commlinkid = 0;
695 478
696#ifdef DEBUG 479#ifdef DEBUG
697 { 480 print_hex_dump_bytes("sending: ", DUMP_PREFIX_NONE, &ccb[mbo], sizeof(ccb[mbo]) - 10);
698 int i; 481 printk("aha1542_queuecommand: now waiting for interrupt ");
699 printk(KERN_DEBUG "aha1542_command: sending.. ");
700 for (i = 0; i < sizeof(ccb[mbo]) - 10; i++)
701 printk("%02x ", ((unchar *) & ccb[mbo])[i]);
702 };
703#endif 482#endif
704 483 mb[mbo].status = 1;
705 if (done) { 484 aha1542_outb(cmd->device->host->io_port, CMD_START_SCSI);
706 DEB(printk("aha1542_queuecommand: now waiting for interrupt "); 485 spin_unlock_irqrestore(sh->host_lock, flags);
707 aha1542_stat());
708 SCpnt->scsi_done = done;
709 mb[mbo].status = 1;
710 aha1542_out(SCpnt->device->host->io_port, &ahacmd, 1); /* start scsi command */
711 DEB(aha1542_stat());
712 } else
713 printk("aha1542_queuecommand: done can't be NULL\n");
714 486
715 return 0; 487 return 0;
716} 488}
717 489
718static DEF_SCSI_QCMD(aha1542_queuecommand)
719
720/* Initialize mailboxes */ 490/* Initialize mailboxes */
721static void setup_mailboxes(int bse, struct Scsi_Host *shpnt) 491static void setup_mailboxes(struct Scsi_Host *sh)
722{ 492{
493 struct aha1542_hostdata *aha1542 = shost_priv(sh);
723 int i; 494 int i;
724 struct mailbox *mb; 495 struct mailbox *mb = aha1542->mb;
725 struct ccb *ccb; 496 struct ccb *ccb = aha1542->ccb;
726
727 unchar cmd[5] = { CMD_MBINIT, AHA1542_MAILBOXES, 0, 0, 0};
728 497
729 mb = HOSTDATA(shpnt)->mb; 498 u8 mb_cmd[5] = { CMD_MBINIT, AHA1542_MAILBOXES, 0, 0, 0};
730 ccb = HOSTDATA(shpnt)->ccb;
731 499
732 for (i = 0; i < AHA1542_MAILBOXES; i++) { 500 for (i = 0; i < AHA1542_MAILBOXES; i++) {
733 mb[i].status = mb[AHA1542_MAILBOXES + i].status = 0; 501 mb[i].status = mb[AHA1542_MAILBOXES + i].status = 0;
734 any2scsi(mb[i].ccbptr, SCSI_BUF_PA(&ccb[i])); 502 any2scsi(mb[i].ccbptr, isa_virt_to_bus(&ccb[i]));
735 }; 503 };
736 aha1542_intr_reset(bse); /* reset interrupts, so they don't block */ 504 aha1542_intr_reset(sh->io_port); /* reset interrupts, so they don't block */
737 any2scsi((cmd + 2), SCSI_BUF_PA(mb)); 505 any2scsi((mb_cmd + 2), isa_virt_to_bus(mb));
738 aha1542_out(bse, cmd, 5); 506 if (aha1542_out(sh->io_port, mb_cmd, 5))
739 WAIT(INTRFLAGS(bse), INTRMASK, HACC, 0); 507 shost_printk(KERN_ERR, sh, "failed setting up mailboxes\n");
740 while (0) { 508 aha1542_intr_reset(sh->io_port);
741fail:
742 printk(KERN_ERR "aha1542_detect: failed setting up mailboxes\n");
743 }
744 aha1542_intr_reset(bse);
745} 509}
746 510
747static int __init aha1542_getconfig(int base_io, unsigned char *irq_level, unsigned char *dma_chan, unsigned char *scsi_id) 511static int aha1542_getconfig(struct Scsi_Host *sh)
748{ 512{
749 unchar inquiry_cmd[] = {CMD_RETCONF}; 513 u8 inquiry_result[3];
750 unchar inquiry_result[3];
751 int i; 514 int i;
752 i = inb(STATUS(base_io)); 515 i = inb(STATUS(sh->io_port));
753 if (i & DF) { 516 if (i & DF) {
754 i = inb(DATA(base_io)); 517 i = inb(DATA(sh->io_port));
755 }; 518 };
756 aha1542_out(base_io, inquiry_cmd, 1); 519 aha1542_outb(sh->io_port, CMD_RETCONF);
757 aha1542_in(base_io, inquiry_result, 3); 520 aha1542_in(sh->io_port, inquiry_result, 3, 0);
758 WAIT(INTRFLAGS(base_io), INTRMASK, HACC, 0); 521 if (!wait_mask(INTRFLAGS(sh->io_port), INTRMASK, HACC, 0, 0))
759 while (0) { 522 shost_printk(KERN_ERR, sh, "error querying board settings\n");
760fail: 523 aha1542_intr_reset(sh->io_port);
761 printk(KERN_ERR "aha1542_detect: query board settings\n");
762 }
763 aha1542_intr_reset(base_io);
764 switch (inquiry_result[0]) { 524 switch (inquiry_result[0]) {
765 case 0x80: 525 case 0x80:
766 *dma_chan = 7; 526 sh->dma_channel = 7;
767 break; 527 break;
768 case 0x40: 528 case 0x40:
769 *dma_chan = 6; 529 sh->dma_channel = 6;
770 break; 530 break;
771 case 0x20: 531 case 0x20:
772 *dma_chan = 5; 532 sh->dma_channel = 5;
773 break; 533 break;
774 case 0x01: 534 case 0x01:
775 *dma_chan = 0; 535 sh->dma_channel = 0;
776 break; 536 break;
777 case 0: 537 case 0:
778 /* This means that the adapter, although Adaptec 1542 compatible, doesn't use a DMA channel. 538 /* This means that the adapter, although Adaptec 1542 compatible, doesn't use a DMA channel.
779 Currently only aware of the BusLogic BT-445S VL-Bus adapter which needs this. */ 539 Currently only aware of the BusLogic BT-445S VL-Bus adapter which needs this. */
780 *dma_chan = 0xFF; 540 sh->dma_channel = 0xFF;
781 break; 541 break;
782 default: 542 default:
783 printk(KERN_ERR "Unable to determine Adaptec DMA priority. Disabling board\n"); 543 shost_printk(KERN_ERR, sh, "Unable to determine DMA channel.\n");
784 return -1; 544 return -1;
785 }; 545 };
786 switch (inquiry_result[1]) { 546 switch (inquiry_result[1]) {
787 case 0x40: 547 case 0x40:
788 *irq_level = 15; 548 sh->irq = 15;
789 break; 549 break;
790 case 0x20: 550 case 0x20:
791 *irq_level = 14; 551 sh->irq = 14;
792 break; 552 break;
793 case 0x8: 553 case 0x8:
794 *irq_level = 12; 554 sh->irq = 12;
795 break; 555 break;
796 case 0x4: 556 case 0x4:
797 *irq_level = 11; 557 sh->irq = 11;
798 break; 558 break;
799 case 0x2: 559 case 0x2:
800 *irq_level = 10; 560 sh->irq = 10;
801 break; 561 break;
802 case 0x1: 562 case 0x1:
803 *irq_level = 9; 563 sh->irq = 9;
804 break; 564 break;
805 default: 565 default:
806 printk(KERN_ERR "Unable to determine Adaptec IRQ level. Disabling board\n"); 566 shost_printk(KERN_ERR, sh, "Unable to determine IRQ level.\n");
807 return -1; 567 return -1;
808 }; 568 };
809 *scsi_id = inquiry_result[2] & 7; 569 sh->this_id = inquiry_result[2] & 7;
810 return 0; 570 return 0;
811} 571}
812 572
813/* This function should only be called for 1542C boards - we can detect 573/* This function should only be called for 1542C boards - we can detect
814 the special firmware settings and unlock the board */ 574 the special firmware settings and unlock the board */
815 575
816static int __init aha1542_mbenable(int base) 576static int aha1542_mbenable(struct Scsi_Host *sh)
817{ 577{
818 static unchar mbenable_cmd[3]; 578 static u8 mbenable_cmd[3];
819 static unchar mbenable_result[2]; 579 static u8 mbenable_result[2];
820 int retval; 580 int retval;
821 581
822 retval = BIOS_TRANSLATION_6432; 582 retval = BIOS_TRANSLATION_6432;
823 583
824 mbenable_cmd[0] = CMD_EXTBIOS; 584 aha1542_outb(sh->io_port, CMD_EXTBIOS);
825 aha1542_out(base, mbenable_cmd, 1); 585 if (aha1542_in(sh->io_port, mbenable_result, 2, 100))
826 if (aha1542_in1(base, mbenable_result, 2))
827 return retval; 586 return retval;
828 WAITd(INTRFLAGS(base), INTRMASK, HACC, 0, 100); 587 if (!wait_mask(INTRFLAGS(sh->io_port), INTRMASK, HACC, 0, 100))
829 aha1542_intr_reset(base); 588 goto fail;
589 aha1542_intr_reset(sh->io_port);
830 590
831 if ((mbenable_result[0] & 0x08) || mbenable_result[1]) { 591 if ((mbenable_result[0] & 0x08) || mbenable_result[1]) {
832 mbenable_cmd[0] = CMD_MBENABLE; 592 mbenable_cmd[0] = CMD_MBENABLE;
@@ -836,37 +596,34 @@ static int __init aha1542_mbenable(int base)
836 if ((mbenable_result[0] & 0x08) && (mbenable_result[1] & 0x03)) 596 if ((mbenable_result[0] & 0x08) && (mbenable_result[1] & 0x03))
837 retval = BIOS_TRANSLATION_25563; 597 retval = BIOS_TRANSLATION_25563;
838 598
839 aha1542_out(base, mbenable_cmd, 3); 599 if (aha1542_out(sh->io_port, mbenable_cmd, 3))
840 WAIT(INTRFLAGS(base), INTRMASK, HACC, 0); 600 goto fail;
841 }; 601 };
842 while (0) { 602 while (0) {
843fail: 603fail:
844 printk(KERN_ERR "aha1542_mbenable: Mailbox init failed\n"); 604 shost_printk(KERN_ERR, sh, "Mailbox init failed\n");
845 } 605 }
846 aha1542_intr_reset(base); 606 aha1542_intr_reset(sh->io_port);
847 return retval; 607 return retval;
848} 608}
849 609
850/* Query the board to find out if it is a 1542 or a 1740, or whatever. */ 610/* Query the board to find out if it is a 1542 or a 1740, or whatever. */
851static int __init aha1542_query(int base_io, int *transl) 611static int aha1542_query(struct Scsi_Host *sh)
852{ 612{
853 unchar inquiry_cmd[] = {CMD_INQUIRY}; 613 struct aha1542_hostdata *aha1542 = shost_priv(sh);
854 unchar inquiry_result[4]; 614 u8 inquiry_result[4];
855 int i; 615 int i;
856 i = inb(STATUS(base_io)); 616 i = inb(STATUS(sh->io_port));
857 if (i & DF) { 617 if (i & DF) {
858 i = inb(DATA(base_io)); 618 i = inb(DATA(sh->io_port));
859 }; 619 };
860 aha1542_out(base_io, inquiry_cmd, 1); 620 aha1542_outb(sh->io_port, CMD_INQUIRY);
861 aha1542_in(base_io, inquiry_result, 4); 621 aha1542_in(sh->io_port, inquiry_result, 4, 0);
862 WAIT(INTRFLAGS(base_io), INTRMASK, HACC, 0); 622 if (!wait_mask(INTRFLAGS(sh->io_port), INTRMASK, HACC, 0, 0))
863 while (0) { 623 shost_printk(KERN_ERR, sh, "error querying card type\n");
864fail: 624 aha1542_intr_reset(sh->io_port);
865 printk(KERN_ERR "aha1542_detect: query card type\n");
866 }
867 aha1542_intr_reset(base_io);
868 625
869 *transl = BIOS_TRANSLATION_6432; /* Default case */ 626 aha1542->bios_translation = BIOS_TRANSLATION_6432; /* Default case */
870 627
871 /* For an AHA1740 series board, we ignore the board since there is a 628 /* For an AHA1740 series board, we ignore the board since there is a
872 hardware bug which can lead to wrong blocks being returned if the board 629 hardware bug which can lead to wrong blocks being returned if the board
@@ -875,391 +632,198 @@ fail:
875 */ 632 */
876 633
877 if (inquiry_result[0] == 0x43) { 634 if (inquiry_result[0] == 0x43) {
878 printk(KERN_INFO "aha1542.c: Emulation mode not supported for AHA 174N hardware.\n"); 635 shost_printk(KERN_INFO, sh, "Emulation mode not supported for AHA-1740 hardware, use aha1740 driver instead.\n");
879 return 1; 636 return 1;
880 }; 637 };
881 638
882 /* Always call this - boards that do not support extended bios translation 639 /* Always call this - boards that do not support extended bios translation
883 will ignore the command, and we will set the proper default */ 640 will ignore the command, and we will set the proper default */
884 641
885 *transl = aha1542_mbenable(base_io); 642 aha1542->bios_translation = aha1542_mbenable(sh);
886 643
887 return 0; 644 return 0;
888} 645}
889 646
890#ifndef MODULE 647static u8 dma_speed_hw(int dma_speed)
891static char *setup_str[MAXBOARDS] __initdata;
892static int setup_idx = 0;
893
894static void __init aha1542_setup(char *str, int *ints)
895{ 648{
896 const char *ahausage = "aha1542: usage: aha1542=<PORTBASE>[,<BUSON>,<BUSOFF>[,<DMASPEED>]]\n"; 649 switch (dma_speed) {
897 int setup_portbase; 650 case 5:
898 651 return 0x00;
899 if (setup_idx >= MAXBOARDS) { 652 case 6:
900 printk(KERN_ERR "aha1542: aha1542_setup called too many times! Bad LILO params ?\n"); 653 return 0x04;
901 printk(KERN_ERR " Entryline 1: %s\n", setup_str[0]); 654 case 7:
902 printk(KERN_ERR " Entryline 2: %s\n", setup_str[1]); 655 return 0x01;
903 printk(KERN_ERR " This line: %s\n", str); 656 case 8:
904 return; 657 return 0x02;
905 } 658 case 10:
906 if (ints[0] < 1 || ints[0] > 4) { 659 return 0x03;
907 printk(KERN_ERR "aha1542: %s\n", str);
908 printk(ahausage);
909 printk(KERN_ERR "aha1542: Wrong parameters may cause system malfunction.. We try anyway..\n");
910 }
911 setup_called[setup_idx] = ints[0];
912 setup_str[setup_idx] = str;
913
914 setup_portbase = ints[0] >= 1 ? ints[1] : 0; /* Preserve the default value.. */
915 setup_buson[setup_idx] = ints[0] >= 2 ? ints[2] : 7;
916 setup_busoff[setup_idx] = ints[0] >= 3 ? ints[3] : 5;
917 if (ints[0] >= 4)
918 {
919 int atbt = -1;
920 switch (ints[4]) {
921 case 5:
922 atbt = 0x00;
923 break;
924 case 6:
925 atbt = 0x04;
926 break;
927 case 7:
928 atbt = 0x01;
929 break;
930 case 8:
931 atbt = 0x02;
932 break;
933 case 10:
934 atbt = 0x03;
935 break;
936 default:
937 printk(KERN_ERR "aha1542: %s\n", str);
938 printk(ahausage);
939 printk(KERN_ERR "aha1542: Valid values for DMASPEED are 5-8, 10 MB/s. Using jumper defaults.\n");
940 break;
941 }
942 setup_dmaspeed[setup_idx] = atbt;
943 } 660 }
944 if (setup_portbase != 0)
945 bases[setup_idx] = setup_portbase;
946 661
947 ++setup_idx; 662 return 0xff; /* invalid */
948} 663}
949 664
950static int __init do_setup(char *str) 665/* Set the Bus on/off-times as not to ruin floppy performance */
666static void aha1542_set_bus_times(struct Scsi_Host *sh, int bus_on, int bus_off, int dma_speed)
951{ 667{
952 int ints[5]; 668 if (bus_on > 0) {
669 u8 oncmd[] = { CMD_BUSON_TIME, clamp(bus_on, 2, 15) };
953 670
954 int count=setup_idx; 671 aha1542_intr_reset(sh->io_port);
672 if (aha1542_out(sh->io_port, oncmd, 2))
673 goto fail;
674 }
955 675
956 get_options(str, ARRAY_SIZE(ints), ints); 676 if (bus_off > 0) {
957 aha1542_setup(str,ints); 677 u8 offcmd[] = { CMD_BUSOFF_TIME, clamp(bus_off, 1, 64) };
958 678
959 return count<setup_idx; 679 aha1542_intr_reset(sh->io_port);
960} 680 if (aha1542_out(sh->io_port, offcmd, 2))
681 goto fail;
682 }
961 683
962__setup("aha1542=",do_setup); 684 if (dma_speed_hw(dma_speed) != 0xff) {
963#endif 685 u8 dmacmd[] = { CMD_DMASPEED, dma_speed_hw(dma_speed) };
686
687 aha1542_intr_reset(sh->io_port);
688 if (aha1542_out(sh->io_port, dmacmd, 2))
689 goto fail;
690 }
691 aha1542_intr_reset(sh->io_port);
692 return;
693fail:
694 shost_printk(KERN_ERR, sh, "setting bus on/off-time failed\n");
695 aha1542_intr_reset(sh->io_port);
696}
964 697
965/* return non-zero on detection */ 698/* return non-zero on detection */
966static int __init aha1542_detect(struct scsi_host_template * tpnt) 699static struct Scsi_Host *aha1542_hw_init(struct scsi_host_template *tpnt, struct device *pdev, int indx)
967{ 700{
968 unsigned char dma_chan; 701 unsigned int base_io = io[indx];
969 unsigned char irq_level; 702 struct Scsi_Host *sh;
970 unsigned char scsi_id; 703 struct aha1542_hostdata *aha1542;
971 unsigned long flags; 704 char dma_info[] = "no DMA";
972 unsigned int base_io; 705
973 int trans; 706 if (base_io == 0)
974 struct Scsi_Host *shpnt = NULL; 707 return NULL;
975 int count = 0; 708
976 int indx; 709 if (!request_region(base_io, AHA1542_REGION_SIZE, "aha1542"))
977 710 return NULL;
978 DEB(printk("aha1542_detect: \n")); 711
979 712 sh = scsi_host_alloc(tpnt, sizeof(struct aha1542_hostdata));
980 tpnt->proc_name = "aha1542"; 713 if (!sh)
981 714 goto release;
982#ifdef MODULE 715 aha1542 = shost_priv(sh);
983 bases[0] = aha1542[0]; 716
984 setup_buson[0] = aha1542[1]; 717 sh->unique_id = base_io;
985 setup_busoff[0] = aha1542[2]; 718 sh->io_port = base_io;
986 { 719 sh->n_io_port = AHA1542_REGION_SIZE;
987 int atbt = -1; 720 aha1542->aha1542_last_mbi_used = 2 * AHA1542_MAILBOXES - 1;
988 switch (aha1542[3]) { 721 aha1542->aha1542_last_mbo_used = AHA1542_MAILBOXES - 1;
989 case 5: 722
990 atbt = 0x00; 723 if (!aha1542_test_port(sh))
991 break; 724 goto unregister;
992 case 6: 725
993 atbt = 0x04; 726 aha1542_set_bus_times(sh, bus_on[indx], bus_off[indx], dma_speed[indx]);
994 break; 727 if (aha1542_query(sh))
995 case 7: 728 goto unregister;
996 atbt = 0x01; 729 if (aha1542_getconfig(sh) == -1)
997 break; 730 goto unregister;
998 case 8: 731
999 atbt = 0x02; 732 if (sh->dma_channel != 0xFF)
1000 break; 733 snprintf(dma_info, sizeof(dma_info), "DMA %d", sh->dma_channel);
1001 case 10: 734 shost_printk(KERN_INFO, sh, "Adaptec AHA-1542 (SCSI-ID %d) at IO 0x%x, IRQ %d, %s\n",
1002 atbt = 0x03; 735 sh->this_id, base_io, sh->irq, dma_info);
1003 break; 736 if (aha1542->bios_translation == BIOS_TRANSLATION_25563)
1004 }; 737 shost_printk(KERN_INFO, sh, "Using extended bios translation\n");
1005 setup_dmaspeed[0] = atbt; 738
739 setup_mailboxes(sh);
740
741 if (request_irq(sh->irq, aha1542_interrupt, 0, "aha1542", sh)) {
742 shost_printk(KERN_ERR, sh, "Unable to allocate IRQ.\n");
743 goto unregister;
1006 } 744 }
1007#endif 745 if (sh->dma_channel != 0xFF) {
1008 746 if (request_dma(sh->dma_channel, "aha1542")) {
1009 /* 747 shost_printk(KERN_ERR, sh, "Unable to allocate DMA channel.\n");
1010 * Hunt for ISA Plug'n'Pray Adaptecs (AHA1535) 748 goto free_irq;
1011 */ 749 }
1012 750 if (sh->dma_channel == 0 || sh->dma_channel >= 5) {
1013 if(isapnp) 751 set_dma_mode(sh->dma_channel, DMA_MODE_CASCADE);
1014 { 752 enable_dma(sh->dma_channel);
1015 struct pnp_dev *pdev = NULL;
1016 for(indx = 0; indx < ARRAY_SIZE(bases); indx++) {
1017 if(bases[indx])
1018 continue;
1019 pdev = pnp_find_dev(NULL, ISAPNP_VENDOR('A', 'D', 'P'),
1020 ISAPNP_FUNCTION(0x1542), pdev);
1021 if(pdev==NULL)
1022 break;
1023 /*
1024 * Activate the PnP card
1025 */
1026
1027 if(pnp_device_attach(pdev)<0)
1028 continue;
1029
1030 if(pnp_activate_dev(pdev)<0) {
1031 pnp_device_detach(pdev);
1032 continue;
1033 }
1034
1035 if(!pnp_port_valid(pdev, 0)) {
1036 pnp_device_detach(pdev);
1037 continue;
1038 }
1039
1040 bases[indx] = pnp_port_start(pdev, 0);
1041
1042 /* The card can be queried for its DMA, we have
1043 the DMA set up that is enough */
1044
1045 printk(KERN_INFO "ISAPnP found an AHA1535 at I/O 0x%03X\n", bases[indx]);
1046 } 753 }
1047 } 754 }
1048 for (indx = 0; indx < ARRAY_SIZE(bases); indx++)
1049 if (bases[indx] != 0 && request_region(bases[indx], 4, "aha1542")) {
1050 shpnt = scsi_register(tpnt,
1051 sizeof(struct aha1542_hostdata));
1052
1053 if(shpnt==NULL) {
1054 release_region(bases[indx], 4);
1055 continue;
1056 }
1057 if (!aha1542_test_port(bases[indx], shpnt))
1058 goto unregister;
1059
1060 base_io = bases[indx];
1061
1062 /* Set the Bus on/off-times as not to ruin floppy performance */
1063 {
1064 unchar oncmd[] = {CMD_BUSON_TIME, 7};
1065 unchar offcmd[] = {CMD_BUSOFF_TIME, 5};
1066
1067 if (setup_called[indx]) {
1068 oncmd[1] = setup_buson[indx];
1069 offcmd[1] = setup_busoff[indx];
1070 }
1071 aha1542_intr_reset(base_io);
1072 aha1542_out(base_io, oncmd, 2);
1073 WAIT(INTRFLAGS(base_io), INTRMASK, HACC, 0);
1074 aha1542_intr_reset(base_io);
1075 aha1542_out(base_io, offcmd, 2);
1076 WAIT(INTRFLAGS(base_io), INTRMASK, HACC, 0);
1077 if (setup_dmaspeed[indx] >= 0) {
1078 unchar dmacmd[] = {CMD_DMASPEED, 0};
1079 dmacmd[1] = setup_dmaspeed[indx];
1080 aha1542_intr_reset(base_io);
1081 aha1542_out(base_io, dmacmd, 2);
1082 WAIT(INTRFLAGS(base_io), INTRMASK, HACC, 0);
1083 }
1084 while (0) {
1085fail:
1086 printk(KERN_ERR "aha1542_detect: setting bus on/off-time failed\n");
1087 }
1088 aha1542_intr_reset(base_io);
1089 }
1090 if (aha1542_query(base_io, &trans))
1091 goto unregister;
1092
1093 if (aha1542_getconfig(base_io, &irq_level, &dma_chan, &scsi_id) == -1)
1094 goto unregister;
1095
1096 printk(KERN_INFO "Configuring Adaptec (SCSI-ID %d) at IO:%x, IRQ %d", scsi_id, base_io, irq_level);
1097 if (dma_chan != 0xFF)
1098 printk(", DMA priority %d", dma_chan);
1099 printk("\n");
1100
1101 DEB(aha1542_stat());
1102 setup_mailboxes(base_io, shpnt);
1103
1104 DEB(aha1542_stat());
1105
1106 DEB(printk("aha1542_detect: enable interrupt channel %d\n", irq_level));
1107 spin_lock_irqsave(&aha1542_lock, flags);
1108 if (request_irq(irq_level, do_aha1542_intr_handle, 0,
1109 "aha1542", shpnt)) {
1110 printk(KERN_ERR "Unable to allocate IRQ for adaptec controller.\n");
1111 spin_unlock_irqrestore(&aha1542_lock, flags);
1112 goto unregister;
1113 }
1114 if (dma_chan != 0xFF) {
1115 if (request_dma(dma_chan, "aha1542")) {
1116 printk(KERN_ERR "Unable to allocate DMA channel for Adaptec.\n");
1117 free_irq(irq_level, shpnt);
1118 spin_unlock_irqrestore(&aha1542_lock, flags);
1119 goto unregister;
1120 }
1121 if (dma_chan == 0 || dma_chan >= 5) {
1122 set_dma_mode(dma_chan, DMA_MODE_CASCADE);
1123 enable_dma(dma_chan);
1124 }
1125 }
1126
1127 shpnt->this_id = scsi_id;
1128 shpnt->unique_id = base_io;
1129 shpnt->io_port = base_io;
1130 shpnt->n_io_port = 4; /* Number of bytes of I/O space used */
1131 shpnt->dma_channel = dma_chan;
1132 shpnt->irq = irq_level;
1133 HOSTDATA(shpnt)->bios_translation = trans;
1134 if (trans == BIOS_TRANSLATION_25563)
1135 printk(KERN_INFO "aha1542.c: Using extended bios translation\n");
1136 HOSTDATA(shpnt)->aha1542_last_mbi_used = (2 * AHA1542_MAILBOXES - 1);
1137 HOSTDATA(shpnt)->aha1542_last_mbo_used = (AHA1542_MAILBOXES - 1);
1138 memset(HOSTDATA(shpnt)->SCint, 0, sizeof(HOSTDATA(shpnt)->SCint));
1139 spin_unlock_irqrestore(&aha1542_lock, flags);
1140#if 0
1141 DEB(printk(" *** READ CAPACITY ***\n"));
1142
1143 {
1144 unchar buf[8];
1145 static unchar cmd[] = { READ_CAPACITY, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
1146 int i;
1147
1148 for (i = 0; i < sizeof(buf); ++i)
1149 buf[i] = 0x87;
1150 for (i = 0; i < 2; ++i)
1151 if (!aha1542_command(i, cmd, buf, sizeof(buf))) {
1152 printk(KERN_DEBUG "aha_detect: LU %d sector_size %d device_size %d\n",
1153 i, xscsi2int(buf + 4), xscsi2int(buf));
1154 }
1155 }
1156 755
1157 DEB(printk(" *** NOW RUNNING MY OWN TEST *** \n")); 756 if (scsi_add_host(sh, pdev))
757 goto free_dma;
1158 758
1159 for (i = 0; i < 4; ++i) { 759 scsi_scan_host(sh);
1160 unsigned char cmd[10];
1161 static buffer[512];
1162 760
1163 cmd[0] = READ_10; 761 return sh;
1164 cmd[1] = 0; 762free_dma:
1165 xany2scsi(cmd + 2, i); 763 if (sh->dma_channel != 0xff)
1166 cmd[6] = 0; 764 free_dma(sh->dma_channel);
1167 cmd[7] = 0; 765free_irq:
1168 cmd[8] = 1; 766 free_irq(sh->irq, sh);
1169 cmd[9] = 0;
1170 aha1542_command(0, cmd, buffer, 512);
1171 }
1172#endif
1173 count++;
1174 continue;
1175unregister: 767unregister:
1176 release_region(bases[indx], 4); 768 scsi_host_put(sh);
1177 scsi_unregister(shpnt); 769release:
1178 continue; 770 release_region(base_io, AHA1542_REGION_SIZE);
1179 771
1180 }; 772 return NULL;
1181
1182 return count;
1183} 773}
1184 774
1185static int aha1542_release(struct Scsi_Host *shost) 775static int aha1542_release(struct Scsi_Host *sh)
1186{ 776{
1187 if (shost->irq) 777 scsi_remove_host(sh);
1188 free_irq(shost->irq, shost); 778 if (sh->dma_channel != 0xff)
1189 if (shost->dma_channel != 0xff) 779 free_dma(sh->dma_channel);
1190 free_dma(shost->dma_channel); 780 if (sh->irq)
1191 if (shost->io_port && shost->n_io_port) 781 free_irq(sh->irq, sh);
1192 release_region(shost->io_port, shost->n_io_port); 782 if (sh->io_port && sh->n_io_port)
1193 scsi_unregister(shost); 783 release_region(sh->io_port, sh->n_io_port);
784 scsi_host_put(sh);
1194 return 0; 785 return 0;
1195} 786}
1196 787
1197static int aha1542_restart(struct Scsi_Host *shost)
1198{
1199 int i;
1200 int count = 0;
1201#if 0
1202 unchar ahacmd = CMD_START_SCSI;
1203#endif
1204
1205 for (i = 0; i < AHA1542_MAILBOXES; i++)
1206 if (HOSTDATA(shost)->SCint[i] &&
1207 !(HOSTDATA(shost)->SCint[i]->device->soft_reset)) {
1208#if 0
1209 HOSTDATA(shost)->mb[i].status = 1; /* Indicate ready to restart... */
1210#endif
1211 count++;
1212 }
1213 printk(KERN_DEBUG "Potential to restart %d stalled commands...\n", count);
1214#if 0
1215 /* start scsi command */
1216 if (count)
1217 aha1542_out(shost->io_port, &ahacmd, 1);
1218#endif
1219 return 0;
1220}
1221 788
1222/* 789/*
1223 * This is a device reset. This is handled by sending a special command 790 * This is a device reset. This is handled by sending a special command
1224 * to the device. 791 * to the device.
1225 */ 792 */
1226static int aha1542_dev_reset(Scsi_Cmnd * SCpnt) 793static int aha1542_dev_reset(struct scsi_cmnd *cmd)
1227{ 794{
795 struct Scsi_Host *sh = cmd->device->host;
796 struct aha1542_hostdata *aha1542 = shost_priv(sh);
1228 unsigned long flags; 797 unsigned long flags;
1229 struct mailbox *mb; 798 struct mailbox *mb = aha1542->mb;
1230 unchar target = SCpnt->device->id; 799 u8 target = cmd->device->id;
1231 unchar lun = SCpnt->device->lun; 800 u8 lun = cmd->device->lun;
1232 int mbo; 801 int mbo;
1233 struct ccb *ccb; 802 struct ccb *ccb = aha1542->ccb;
1234 unchar ahacmd = CMD_START_SCSI;
1235
1236 ccb = HOSTDATA(SCpnt->device->host)->ccb;
1237 mb = HOSTDATA(SCpnt->device->host)->mb;
1238 803
1239 spin_lock_irqsave(&aha1542_lock, flags); 804 spin_lock_irqsave(sh->host_lock, flags);
1240 mbo = HOSTDATA(SCpnt->device->host)->aha1542_last_mbo_used + 1; 805 mbo = aha1542->aha1542_last_mbo_used + 1;
1241 if (mbo >= AHA1542_MAILBOXES) 806 if (mbo >= AHA1542_MAILBOXES)
1242 mbo = 0; 807 mbo = 0;
1243 808
1244 do { 809 do {
1245 if (mb[mbo].status == 0 && HOSTDATA(SCpnt->device->host)->SCint[mbo] == NULL) 810 if (mb[mbo].status == 0 && aha1542->int_cmds[mbo] == NULL)
1246 break; 811 break;
1247 mbo++; 812 mbo++;
1248 if (mbo >= AHA1542_MAILBOXES) 813 if (mbo >= AHA1542_MAILBOXES)
1249 mbo = 0; 814 mbo = 0;
1250 } while (mbo != HOSTDATA(SCpnt->device->host)->aha1542_last_mbo_used); 815 } while (mbo != aha1542->aha1542_last_mbo_used);
1251 816
1252 if (mb[mbo].status || HOSTDATA(SCpnt->device->host)->SCint[mbo]) 817 if (mb[mbo].status || aha1542->int_cmds[mbo])
1253 panic("Unable to find empty mailbox for aha1542.\n"); 818 panic("Unable to find empty mailbox for aha1542.\n");
1254 819
1255 HOSTDATA(SCpnt->device->host)->SCint[mbo] = SCpnt; /* This will effectively 820 aha1542->int_cmds[mbo] = cmd; /* This will effectively
1256 prevent someone else from 821 prevent someone else from
1257 screwing with this cdb. */ 822 screwing with this cdb. */
1258 823
1259 HOSTDATA(SCpnt->device->host)->aha1542_last_mbo_used = mbo; 824 aha1542->aha1542_last_mbo_used = mbo;
1260 spin_unlock_irqrestore(&aha1542_lock, flags);
1261 825
1262 any2scsi(mb[mbo].ccbptr, SCSI_BUF_PA(&ccb[mbo])); /* This gets trashed for some reason */ 826 any2scsi(mb[mbo].ccbptr, isa_virt_to_bus(&ccb[mbo])); /* This gets trashed for some reason */
1263 827
1264 memset(&ccb[mbo], 0, sizeof(struct ccb)); 828 memset(&ccb[mbo], 0, sizeof(struct ccb));
1265 829
@@ -1274,141 +838,43 @@ static int aha1542_dev_reset(Scsi_Cmnd * SCpnt)
1274 * Now tell the 1542 to flush all pending commands for this 838 * Now tell the 1542 to flush all pending commands for this
1275 * target 839 * target
1276 */ 840 */
1277 aha1542_out(SCpnt->device->host->io_port, &ahacmd, 1); 841 aha1542_outb(sh->io_port, CMD_START_SCSI);
842 spin_unlock_irqrestore(sh->host_lock, flags);
1278 843
1279 scmd_printk(KERN_WARNING, SCpnt, 844 scmd_printk(KERN_WARNING, cmd,
1280 "Trying device reset for target\n"); 845 "Trying device reset for target\n");
1281 846
1282 return SUCCESS; 847 return SUCCESS;
1283
1284
1285#ifdef ERIC_neverdef
1286 /*
1287 * With the 1542 we apparently never get an interrupt to
1288 * acknowledge a device reset being sent. Then again, Leonard
1289 * says we are doing this wrong in the first place...
1290 *
1291 * Take a wait and see attitude. If we get spurious interrupts,
1292 * then the device reset is doing something sane and useful, and
1293 * we will wait for the interrupt to post completion.
1294 */
1295 printk(KERN_WARNING "Sent BUS DEVICE RESET to target %d\n", SCpnt->target);
1296
1297 /*
1298 * Free the command block for all commands running on this
1299 * target...
1300 */
1301 for (i = 0; i < AHA1542_MAILBOXES; i++) {
1302 if (HOSTDATA(SCpnt->host)->SCint[i] &&
1303 HOSTDATA(SCpnt->host)->SCint[i]->target == SCpnt->target) {
1304 Scsi_Cmnd *SCtmp;
1305 SCtmp = HOSTDATA(SCpnt->host)->SCint[i];
1306 kfree(SCtmp->host_scribble);
1307 SCtmp->host_scribble = NULL;
1308 HOSTDATA(SCpnt->host)->SCint[i] = NULL;
1309 HOSTDATA(SCpnt->host)->mb[i].status = 0;
1310 }
1311 }
1312 return SUCCESS;
1313
1314 return FAILED;
1315#endif /* ERIC_neverdef */
1316} 848}
1317 849
1318static int aha1542_bus_reset(Scsi_Cmnd * SCpnt) 850static int aha1542_reset(struct scsi_cmnd *cmd, u8 reset_cmd)
1319{ 851{
852 struct Scsi_Host *sh = cmd->device->host;
853 struct aha1542_hostdata *aha1542 = shost_priv(sh);
854 unsigned long flags;
1320 int i; 855 int i;
1321 856
857 spin_lock_irqsave(sh->host_lock, flags);
1322 /* 858 /*
1323 * This does a scsi reset for all devices on the bus. 859 * This does a scsi reset for all devices on the bus.
1324 * In principle, we could also reset the 1542 - should 860 * In principle, we could also reset the 1542 - should
1325 * we do this? Try this first, and we can add that later 861 * we do this? Try this first, and we can add that later
1326 * if it turns out to be useful. 862 * if it turns out to be useful.
1327 */ 863 */
1328 outb(SCRST, CONTROL(SCpnt->device->host->io_port)); 864 outb(reset_cmd, CONTROL(cmd->device->host->io_port));
1329 865
1330 /* 866 if (!wait_mask(STATUS(cmd->device->host->io_port),
1331 * Wait for the thing to settle down a bit. Unfortunately 867 STATMASK, IDLE, STST | DIAGF | INVDCMD | DF | CDF, 0)) {
1332 * this is going to basically lock up the machine while we 868 spin_unlock_irqrestore(sh->host_lock, flags);
1333 * wait for this to complete. To be 100% correct, we need to 869 return FAILED;
1334 * check for timeout, and if we are doing something like this
1335 * we are pretty desperate anyways.
1336 */
1337 ssleep(4);
1338
1339 spin_lock_irq(SCpnt->device->host->host_lock);
1340
1341 WAIT(STATUS(SCpnt->device->host->io_port),
1342 STATMASK, INIT | IDLE, STST | DIAGF | INVDCMD | DF | CDF);
1343
1344 /*
1345 * Now try to pick up the pieces. For all pending commands,
1346 * free any internal data structures, and basically clear things
1347 * out. We do not try and restart any commands or anything -
1348 * the strategy handler takes care of that crap.
1349 */
1350 printk(KERN_WARNING "Sent BUS RESET to scsi host %d\n", SCpnt->device->host->host_no);
1351
1352 for (i = 0; i < AHA1542_MAILBOXES; i++) {
1353 if (HOSTDATA(SCpnt->device->host)->SCint[i] != NULL) {
1354 Scsi_Cmnd *SCtmp;
1355 SCtmp = HOSTDATA(SCpnt->device->host)->SCint[i];
1356
1357
1358 if (SCtmp->device->soft_reset) {
1359 /*
1360 * If this device implements the soft reset option,
1361 * then it is still holding onto the command, and
1362 * may yet complete it. In this case, we don't
1363 * flush the data.
1364 */
1365 continue;
1366 }
1367 kfree(SCtmp->host_scribble);
1368 SCtmp->host_scribble = NULL;
1369 HOSTDATA(SCpnt->device->host)->SCint[i] = NULL;
1370 HOSTDATA(SCpnt->device->host)->mb[i].status = 0;
1371 }
1372 } 870 }
1373 871
1374 spin_unlock_irq(SCpnt->device->host->host_lock);
1375 return SUCCESS;
1376
1377fail:
1378 spin_unlock_irq(SCpnt->device->host->host_lock);
1379 return FAILED;
1380}
1381
1382static int aha1542_host_reset(Scsi_Cmnd * SCpnt)
1383{
1384 int i;
1385
1386 /*
1387 * This does a scsi reset for all devices on the bus.
1388 * In principle, we could also reset the 1542 - should
1389 * we do this? Try this first, and we can add that later
1390 * if it turns out to be useful.
1391 */
1392 outb(HRST | SCRST, CONTROL(SCpnt->device->host->io_port));
1393
1394 /*
1395 * Wait for the thing to settle down a bit. Unfortunately
1396 * this is going to basically lock up the machine while we
1397 * wait for this to complete. To be 100% correct, we need to
1398 * check for timeout, and if we are doing something like this
1399 * we are pretty desperate anyways.
1400 */
1401 ssleep(4);
1402 spin_lock_irq(SCpnt->device->host->host_lock);
1403
1404 WAIT(STATUS(SCpnt->device->host->io_port),
1405 STATMASK, INIT | IDLE, STST | DIAGF | INVDCMD | DF | CDF);
1406
1407 /* 872 /*
1408 * We need to do this too before the 1542 can interact with 873 * We need to do this too before the 1542 can interact with
1409 * us again. 874 * us again after host reset.
1410 */ 875 */
1411 setup_mailboxes(SCpnt->device->host->io_port, SCpnt->device->host); 876 if (reset_cmd & HRST)
877 setup_mailboxes(cmd->device->host);
1412 878
1413 /* 879 /*
1414 * Now try to pick up the pieces. For all pending commands, 880 * Now try to pick up the pieces. For all pending commands,
@@ -1416,14 +882,14 @@ static int aha1542_host_reset(Scsi_Cmnd * SCpnt)
1416 * out. We do not try and restart any commands or anything - 882 * out. We do not try and restart any commands or anything -
1417 * the strategy handler takes care of that crap. 883 * the strategy handler takes care of that crap.
1418 */ 884 */
1419 printk(KERN_WARNING "Sent BUS RESET to scsi host %d\n", SCpnt->device->host->host_no); 885 shost_printk(KERN_WARNING, cmd->device->host, "Sent BUS RESET to scsi host %d\n", cmd->device->host->host_no);
1420 886
1421 for (i = 0; i < AHA1542_MAILBOXES; i++) { 887 for (i = 0; i < AHA1542_MAILBOXES; i++) {
1422 if (HOSTDATA(SCpnt->device->host)->SCint[i] != NULL) { 888 if (aha1542->int_cmds[i] != NULL) {
1423 Scsi_Cmnd *SCtmp; 889 struct scsi_cmnd *tmp_cmd;
1424 SCtmp = HOSTDATA(SCpnt->device->host)->SCint[i]; 890 tmp_cmd = aha1542->int_cmds[i];
1425 891
1426 if (SCtmp->device->soft_reset) { 892 if (tmp_cmd->device->soft_reset) {
1427 /* 893 /*
1428 * If this device implements the soft reset option, 894 * If this device implements the soft reset option,
1429 * then it is still holding onto the command, and 895 * then it is still holding onto the command, and
@@ -1432,241 +898,51 @@ static int aha1542_host_reset(Scsi_Cmnd * SCpnt)
1432 */ 898 */
1433 continue; 899 continue;
1434 } 900 }
1435 kfree(SCtmp->host_scribble); 901 kfree(tmp_cmd->host_scribble);
1436 SCtmp->host_scribble = NULL; 902 tmp_cmd->host_scribble = NULL;
1437 HOSTDATA(SCpnt->device->host)->SCint[i] = NULL; 903 aha1542->int_cmds[i] = NULL;
1438 HOSTDATA(SCpnt->device->host)->mb[i].status = 0; 904 aha1542->mb[i].status = 0;
1439 } 905 }
1440 } 906 }
1441 907
1442 spin_unlock_irq(SCpnt->device->host->host_lock); 908 spin_unlock_irqrestore(sh->host_lock, flags);
1443 return SUCCESS; 909 return SUCCESS;
1444
1445fail:
1446 spin_unlock_irq(SCpnt->device->host->host_lock);
1447 return FAILED;
1448} 910}
1449 911
1450#if 0 912static int aha1542_bus_reset(struct scsi_cmnd *cmd)
1451/*
1452 * These are the old error handling routines. They are only temporarily
1453 * here while we play with the new error handling code.
1454 */
1455static int aha1542_old_abort(Scsi_Cmnd * SCpnt)
1456{ 913{
1457#if 0 914 return aha1542_reset(cmd, SCRST);
1458 unchar ahacmd = CMD_START_SCSI;
1459 unsigned long flags;
1460 struct mailbox *mb;
1461 int mbi, mbo, i;
1462
1463 printk(KERN_DEBUG "In aha1542_abort: %x %x\n",
1464 inb(STATUS(SCpnt->host->io_port)),
1465 inb(INTRFLAGS(SCpnt->host->io_port)));
1466
1467 spin_lock_irqsave(&aha1542_lock, flags);
1468 mb = HOSTDATA(SCpnt->host)->mb;
1469 mbi = HOSTDATA(SCpnt->host)->aha1542_last_mbi_used + 1;
1470 if (mbi >= 2 * AHA1542_MAILBOXES)
1471 mbi = AHA1542_MAILBOXES;
1472
1473 do {
1474 if (mb[mbi].status != 0)
1475 break;
1476 mbi++;
1477 if (mbi >= 2 * AHA1542_MAILBOXES)
1478 mbi = AHA1542_MAILBOXES;
1479 } while (mbi != HOSTDATA(SCpnt->host)->aha1542_last_mbi_used);
1480 spin_unlock_irqrestore(&aha1542_lock, flags);
1481
1482 if (mb[mbi].status) {
1483 printk(KERN_ERR "Lost interrupt discovered on irq %d - attempting to recover\n",
1484 SCpnt->host->irq);
1485 aha1542_intr_handle(SCpnt->host, NULL);
1486 return 0;
1487 }
1488 /* OK, no lost interrupt. Try looking to see how many pending commands
1489 we think we have. */
1490
1491 for (i = 0; i < AHA1542_MAILBOXES; i++)
1492 if (HOSTDATA(SCpnt->host)->SCint[i]) {
1493 if (HOSTDATA(SCpnt->host)->SCint[i] == SCpnt) {
1494 printk(KERN_ERR "Timed out command pending for %s\n",
1495 SCpnt->request->rq_disk ?
1496 SCpnt->request->rq_disk->disk_name : "?"
1497 );
1498 if (HOSTDATA(SCpnt->host)->mb[i].status) {
1499 printk(KERN_ERR "OGMB still full - restarting\n");
1500 aha1542_out(SCpnt->host->io_port, &ahacmd, 1);
1501 };
1502 } else
1503 printk(KERN_ERR "Other pending command %s\n",
1504 SCpnt->request->rq_disk ?
1505 SCpnt->request->rq_disk->disk_name : "?"
1506 );
1507 }
1508#endif
1509
1510 DEB(printk("aha1542_abort\n"));
1511#if 0
1512 spin_lock_irqsave(&aha1542_lock, flags);
1513 for (mbo = 0; mbo < AHA1542_MAILBOXES; mbo++) {
1514 if (SCpnt == HOSTDATA(SCpnt->host)->SCint[mbo]) {
1515 mb[mbo].status = 2; /* Abort command */
1516 aha1542_out(SCpnt->host->io_port, &ahacmd, 1); /* start scsi command */
1517 spin_unlock_irqrestore(&aha1542_lock, flags);
1518 break;
1519 }
1520 }
1521 if (AHA1542_MAILBOXES == mbo)
1522 spin_unlock_irqrestore(&aha1542_lock, flags);
1523#endif
1524 return SCSI_ABORT_SNOOZE;
1525} 915}
1526 916
1527/* We do not implement a reset function here, but the upper level code 917static int aha1542_host_reset(struct scsi_cmnd *cmd)
1528 assumes that it will get some kind of response for the command in
1529 SCpnt. We must oblige, or the command will hang the scsi system.
1530 For a first go, we assume that the 1542 notifies us with all of the
1531 pending commands (it does implement soft reset, after all). */
1532
1533static int aha1542_old_reset(Scsi_Cmnd * SCpnt, unsigned int reset_flags)
1534{ 918{
1535 unchar ahacmd = CMD_START_SCSI; 919 return aha1542_reset(cmd, HRST | SCRST);
1536 int i;
1537
1538 /*
1539 * See if a bus reset was suggested.
1540 */
1541 if (reset_flags & SCSI_RESET_SUGGEST_BUS_RESET) {
1542 /*
1543 * This does a scsi reset for all devices on the bus.
1544 * In principle, we could also reset the 1542 - should
1545 * we do this? Try this first, and we can add that later
1546 * if it turns out to be useful.
1547 */
1548 outb(HRST | SCRST, CONTROL(SCpnt->host->io_port));
1549
1550 /*
1551 * Wait for the thing to settle down a bit. Unfortunately
1552 * this is going to basically lock up the machine while we
1553 * wait for this to complete. To be 100% correct, we need to
1554 * check for timeout, and if we are doing something like this
1555 * we are pretty desperate anyways.
1556 */
1557 WAIT(STATUS(SCpnt->host->io_port),
1558 STATMASK, INIT | IDLE, STST | DIAGF | INVDCMD | DF | CDF);
1559
1560 /*
1561 * We need to do this too before the 1542 can interact with
1562 * us again.
1563 */
1564 setup_mailboxes(SCpnt->host->io_port, SCpnt->host);
1565
1566 /*
1567 * Now try to pick up the pieces. Restart all commands
1568 * that are currently active on the bus, and reset all of
1569 * the datastructures. We have some time to kill while
1570 * things settle down, so print a nice message.
1571 */
1572 printk(KERN_WARNING "Sent BUS RESET to scsi host %d\n", SCpnt->host->host_no);
1573
1574 for (i = 0; i < AHA1542_MAILBOXES; i++)
1575 if (HOSTDATA(SCpnt->host)->SCint[i] != NULL) {
1576 Scsi_Cmnd *SCtmp;
1577 SCtmp = HOSTDATA(SCpnt->host)->SCint[i];
1578 SCtmp->result = DID_RESET << 16;
1579 kfree(SCtmp->host_scribble);
1580 SCtmp->host_scribble = NULL;
1581 printk(KERN_WARNING "Sending DID_RESET for target %d\n", SCpnt->target);
1582 SCtmp->scsi_done(SCpnt);
1583
1584 HOSTDATA(SCpnt->host)->SCint[i] = NULL;
1585 HOSTDATA(SCpnt->host)->mb[i].status = 0;
1586 }
1587 /*
1588 * Now tell the mid-level code what we did here. Since
1589 * we have restarted all of the outstanding commands,
1590 * then report SUCCESS.
1591 */
1592 return (SCSI_RESET_SUCCESS | SCSI_RESET_BUS_RESET);
1593fail:
1594 printk(KERN_CRIT "aha1542.c: Unable to perform hard reset.\n");
1595 printk(KERN_CRIT "Power cycle machine to reset\n");
1596 return (SCSI_RESET_ERROR | SCSI_RESET_BUS_RESET);
1597
1598
1599 } else {
1600 /* This does a selective reset of just the one device */
1601 /* First locate the ccb for this command */
1602 for (i = 0; i < AHA1542_MAILBOXES; i++)
1603 if (HOSTDATA(SCpnt->host)->SCint[i] == SCpnt) {
1604 HOSTDATA(SCpnt->host)->ccb[i].op = 0x81; /* BUS DEVICE RESET */
1605 /* Now tell the 1542 to flush all pending commands for this target */
1606 aha1542_out(SCpnt->host->io_port, &ahacmd, 1);
1607
1608 /* Here is the tricky part. What to do next. Do we get an interrupt
1609 for the commands that we aborted with the specified target, or
1610 do we generate this on our own? Try it without first and see
1611 what happens */
1612 printk(KERN_WARNING "Sent BUS DEVICE RESET to target %d\n", SCpnt->target);
1613
1614 /* If the first does not work, then try the second. I think the
1615 first option is more likely to be correct. Free the command
1616 block for all commands running on this target... */
1617 for (i = 0; i < AHA1542_MAILBOXES; i++)
1618 if (HOSTDATA(SCpnt->host)->SCint[i] &&
1619 HOSTDATA(SCpnt->host)->SCint[i]->target == SCpnt->target) {
1620 Scsi_Cmnd *SCtmp;
1621 SCtmp = HOSTDATA(SCpnt->host)->SCint[i];
1622 SCtmp->result = DID_RESET << 16;
1623 kfree(SCtmp->host_scribble);
1624 SCtmp->host_scribble = NULL;
1625 printk(KERN_WARNING "Sending DID_RESET for target %d\n", SCpnt->target);
1626 SCtmp->scsi_done(SCpnt);
1627
1628 HOSTDATA(SCpnt->host)->SCint[i] = NULL;
1629 HOSTDATA(SCpnt->host)->mb[i].status = 0;
1630 }
1631 return SCSI_RESET_SUCCESS;
1632 }
1633 }
1634 /* No active command at this time, so this means that each time we got
1635 some kind of response the last time through. Tell the mid-level code
1636 to request sense information in order to decide what to do next. */
1637 return SCSI_RESET_PUNT;
1638} 920}
1639#endif /* end of big comment block around old_abort + old_reset */
1640 921
1641static int aha1542_biosparam(struct scsi_device *sdev, 922static int aha1542_biosparam(struct scsi_device *sdev,
1642 struct block_device *bdev, sector_t capacity, int *ip) 923 struct block_device *bdev, sector_t capacity, int geom[])
1643{ 924{
1644 int translation_algorithm; 925 struct aha1542_hostdata *aha1542 = shost_priv(sdev->host);
1645 int size = capacity;
1646
1647 translation_algorithm = HOSTDATA(sdev->host)->bios_translation;
1648 926
1649 if ((size >> 11) > 1024 && translation_algorithm == BIOS_TRANSLATION_25563) { 927 if (capacity >= 0x200000 &&
928 aha1542->bios_translation == BIOS_TRANSLATION_25563) {
1650 /* Please verify that this is the same as what DOS returns */ 929 /* Please verify that this is the same as what DOS returns */
1651 ip[0] = 255; 930 geom[0] = 255; /* heads */
1652 ip[1] = 63; 931 geom[1] = 63; /* sectors */
1653 ip[2] = size / 255 / 63;
1654 } else { 932 } else {
1655 ip[0] = 64; 933 geom[0] = 64; /* heads */
1656 ip[1] = 32; 934 geom[1] = 32; /* sectors */
1657 ip[2] = size >> 11;
1658 } 935 }
936 geom[2] = sector_div(capacity, geom[0] * geom[1]); /* cylinders */
1659 937
1660 return 0; 938 return 0;
1661} 939}
1662MODULE_LICENSE("GPL"); 940MODULE_LICENSE("GPL");
1663 941
1664
1665static struct scsi_host_template driver_template = { 942static struct scsi_host_template driver_template = {
943 .module = THIS_MODULE,
1666 .proc_name = "aha1542", 944 .proc_name = "aha1542",
1667 .name = "Adaptec 1542", 945 .name = "Adaptec 1542",
1668 .detect = aha1542_detect,
1669 .release = aha1542_release,
1670 .queuecommand = aha1542_queuecommand, 946 .queuecommand = aha1542_queuecommand,
1671 .eh_device_reset_handler= aha1542_dev_reset, 947 .eh_device_reset_handler= aha1542_dev_reset,
1672 .eh_bus_reset_handler = aha1542_bus_reset, 948 .eh_bus_reset_handler = aha1542_bus_reset,
@@ -1674,9 +950,124 @@ static struct scsi_host_template driver_template = {
1674 .bios_param = aha1542_biosparam, 950 .bios_param = aha1542_biosparam,
1675 .can_queue = AHA1542_MAILBOXES, 951 .can_queue = AHA1542_MAILBOXES,
1676 .this_id = 7, 952 .this_id = 7,
1677 .sg_tablesize = AHA1542_SCATTER, 953 .sg_tablesize = 16,
1678 .cmd_per_lun = AHA1542_CMDLUN, 954 .cmd_per_lun = 1,
1679 .unchecked_isa_dma = 1, 955 .unchecked_isa_dma = 1,
1680 .use_clustering = ENABLE_CLUSTERING, 956 .use_clustering = ENABLE_CLUSTERING,
1681}; 957};
1682#include "scsi_module.c" 958
959static int aha1542_isa_match(struct device *pdev, unsigned int ndev)
960{
961 struct Scsi_Host *sh = aha1542_hw_init(&driver_template, pdev, ndev);
962
963 if (!sh)
964 return 0;
965
966 dev_set_drvdata(pdev, sh);
967 return 1;
968}
969
970static int aha1542_isa_remove(struct device *pdev,
971 unsigned int ndev)
972{
973 aha1542_release(dev_get_drvdata(pdev));
974 dev_set_drvdata(pdev, NULL);
975 return 0;
976}
977
978static struct isa_driver aha1542_isa_driver = {
979 .match = aha1542_isa_match,
980 .remove = aha1542_isa_remove,
981 .driver = {
982 .name = "aha1542"
983 },
984};
985static int isa_registered;
986
987#ifdef CONFIG_PNP
988static struct pnp_device_id aha1542_pnp_ids[] = {
989 { .id = "ADP1542" },
990 { .id = "" }
991};
992MODULE_DEVICE_TABLE(pnp, aha1542_pnp_ids);
993
994static int aha1542_pnp_probe(struct pnp_dev *pdev, const struct pnp_device_id *id)
995{
996 int indx;
997 struct Scsi_Host *sh;
998
999 for (indx = 0; indx < ARRAY_SIZE(io); indx++) {
1000 if (io[indx])
1001 continue;
1002
1003 if (pnp_activate_dev(pdev) < 0)
1004 continue;
1005
1006 io[indx] = pnp_port_start(pdev, 0);
1007
1008 /* The card can be queried for its DMA, we have
1009 the DMA set up that is enough */
1010
1011 dev_info(&pdev->dev, "ISAPnP found an AHA1535 at I/O 0x%03X", io[indx]);
1012 }
1013
1014 sh = aha1542_hw_init(&driver_template, &pdev->dev, indx);
1015 if (!sh)
1016 return -ENODEV;
1017
1018 pnp_set_drvdata(pdev, sh);
1019 return 0;
1020}
1021
1022static void aha1542_pnp_remove(struct pnp_dev *pdev)
1023{
1024 aha1542_release(pnp_get_drvdata(pdev));
1025 pnp_set_drvdata(pdev, NULL);
1026}
1027
1028static struct pnp_driver aha1542_pnp_driver = {
1029 .name = "aha1542",
1030 .id_table = aha1542_pnp_ids,
1031 .probe = aha1542_pnp_probe,
1032 .remove = aha1542_pnp_remove,
1033};
1034static int pnp_registered;
1035#endif /* CONFIG_PNP */
1036
1037static int __init aha1542_init(void)
1038{
1039 int ret = 0;
1040
1041#ifdef CONFIG_PNP
1042 if (isapnp) {
1043 ret = pnp_register_driver(&aha1542_pnp_driver);
1044 if (!ret)
1045 pnp_registered = 1;
1046 }
1047#endif
1048 ret = isa_register_driver(&aha1542_isa_driver, MAXBOARDS);
1049 if (!ret)
1050 isa_registered = 1;
1051
1052#ifdef CONFIG_PNP
1053 if (pnp_registered)
1054 ret = 0;
1055#endif
1056 if (isa_registered)
1057 ret = 0;
1058
1059 return ret;
1060}
1061
1062static void __exit aha1542_exit(void)
1063{
1064#ifdef CONFIG_PNP
1065 if (pnp_registered)
1066 pnp_unregister_driver(&aha1542_pnp_driver);
1067#endif
1068 if (isa_registered)
1069 isa_unregister_driver(&aha1542_isa_driver);
1070}
1071
1072module_init(aha1542_init);
1073module_exit(aha1542_exit);
diff --git a/drivers/scsi/aha1542.h b/drivers/scsi/aha1542.h
index b871d2b57f93..0fe9bae1b3d1 100644
--- a/drivers/scsi/aha1542.h
+++ b/drivers/scsi/aha1542.h
@@ -1,64 +1,35 @@
1#ifndef _AHA1542_H 1#ifndef _AHA1542_H_
2 2#define _AHA1542_H_
3/* $Id: aha1542.h,v 1.1 1992/07/24 06:27:38 root Exp root $
4 *
5 * Header file for the adaptec 1542 driver for Linux
6 *
7 * $Log: aha1542.h,v $
8 * Revision 1.1 1992/07/24 06:27:38 root
9 * Initial revision
10 *
11 * Revision 1.2 1992/07/04 18:41:49 root
12 * Replaced distribution with current drivers
13 *
14 * Revision 1.3 1992/06/23 23:58:20 root
15 * Fixes.
16 *
17 * Revision 1.2 1992/05/26 22:13:23 root
18 * Changed bug that prevented DMA above first 2 mbytes.
19 *
20 * Revision 1.1 1992/05/22 21:00:29 root
21 * Initial revision
22 *
23 * Revision 1.1 1992/04/24 18:01:50 root
24 * Initial revision
25 *
26 * Revision 1.1 1992/04/02 03:23:13 drew
27 * Initial revision
28 *
29 * Revision 1.3 1992/01/27 14:46:29 tthorn
30 * *** empty log message ***
31 *
32 */
33 3
34#include <linux/types.h> 4#include <linux/types.h>
35 5
36/* I/O Port interface 4.2 */ 6/* I/O Port interface 4.2 */
37/* READ */ 7/* READ */
38#define STATUS(base) base 8#define STATUS(base) base
39#define STST 0x80 /* Self Test in Progress */ 9#define STST BIT(7) /* Self Test in Progress */
40#define DIAGF 0x40 /* Internal Diagnostic Failure */ 10#define DIAGF BIT(6) /* Internal Diagnostic Failure */
41#define INIT 0x20 /* Mailbox Initialization Required */ 11#define INIT BIT(5) /* Mailbox Initialization Required */
42#define IDLE 0x10 /* SCSI Host Adapter Idle */ 12#define IDLE BIT(4) /* SCSI Host Adapter Idle */
43#define CDF 0x08 /* Command/Data Out Port Full */ 13#define CDF BIT(3) /* Command/Data Out Port Full */
44#define DF 0x04 /* Data In Port Full */ 14#define DF BIT(2) /* Data In Port Full */
45#define INVDCMD 0x01 /* Invalid H A Command */ 15/* BIT(1) is reserved */
46#define STATMASK 0xfd /* 0x02 is reserved */ 16#define INVDCMD BIT(0) /* Invalid H A Command */
17#define STATMASK (STST | DIAGF | INIT | IDLE | CDF | DF | INVDCMD)
47 18
48#define INTRFLAGS(base) (STATUS(base)+2) 19#define INTRFLAGS(base) (STATUS(base)+2)
49#define ANYINTR 0x80 /* Any Interrupt */ 20#define ANYINTR BIT(7) /* Any Interrupt */
50#define SCRD 0x08 /* SCSI Reset Detected */ 21#define SCRD BIT(3) /* SCSI Reset Detected */
51#define HACC 0x04 /* HA Command Complete */ 22#define HACC BIT(2) /* HA Command Complete */
52#define MBOA 0x02 /* MBO Empty */ 23#define MBOA BIT(1) /* MBO Empty */
53#define MBIF 0x01 /* MBI Full */ 24#define MBIF BIT(0) /* MBI Full */
54#define INTRMASK 0x8f 25#define INTRMASK (ANYINTR | SCRD | HACC | MBOA | MBIF)
55 26
56/* WRITE */ 27/* WRITE */
57#define CONTROL(base) STATUS(base) 28#define CONTROL(base) STATUS(base)
58#define HRST 0x80 /* Hard Reset */ 29#define HRST BIT(7) /* Hard Reset */
59#define SRST 0x40 /* Soft Reset */ 30#define SRST BIT(6) /* Soft Reset */
60#define IRST 0x20 /* Interrupt Reset */ 31#define IRST BIT(5) /* Interrupt Reset */
61#define SCRST 0x10 /* SCSI Bus Reset */ 32#define SCRST BIT(4) /* SCSI Bus Reset */
62 33
63/* READ/WRITE */ 34/* READ/WRITE */
64#define DATA(base) (STATUS(base)+1) 35#define DATA(base) (STATUS(base)+1)
@@ -80,14 +51,14 @@
80 51
81/* Mailbox Definition 5.2.1 and 5.2.2 */ 52/* Mailbox Definition 5.2.1 and 5.2.2 */
82struct mailbox { 53struct mailbox {
83 unchar status; /* Command/Status */ 54 u8 status; /* Command/Status */
84 unchar ccbptr[3]; /* msb, .., lsb */ 55 u8 ccbptr[3]; /* msb, .., lsb */
85}; 56};
86 57
87/* This is used with scatter-gather */ 58/* This is used with scatter-gather */
88struct chain { 59struct chain {
89 unchar datalen[3]; /* Size of this part of chain */ 60 u8 datalen[3]; /* Size of this part of chain */
90 unchar dataptr[3]; /* Location of data */ 61 u8 dataptr[3]; /* Location of data */
91}; 62};
92 63
93/* These belong in scsi.h also */ 64/* These belong in scsi.h also */
@@ -100,51 +71,32 @@ static inline void any2scsi(u8 *p, u32 v)
100 71
101#define scsi2int(up) ( (((long)*(up)) << 16) + (((long)(up)[1]) << 8) + ((long)(up)[2]) ) 72#define scsi2int(up) ( (((long)*(up)) << 16) + (((long)(up)[1]) << 8) + ((long)(up)[2]) )
102 73
103#define xany2scsi(up, p) \
104(up)[0] = ((long)(p)) >> 24; \
105(up)[1] = ((long)(p)) >> 16; \
106(up)[2] = ((long)(p)) >> 8; \
107(up)[3] = ((long)(p));
108
109#define xscsi2int(up) ( (((long)(up)[0]) << 24) + (((long)(up)[1]) << 16) \ 74#define xscsi2int(up) ( (((long)(up)[0]) << 24) + (((long)(up)[1]) << 16) \
110 + (((long)(up)[2]) << 8) + ((long)(up)[3]) ) 75 + (((long)(up)[2]) << 8) + ((long)(up)[3]) )
111 76
112#define MAX_CDB 12 77#define MAX_CDB 12
113#define MAX_SENSE 14 78#define MAX_SENSE 14
114 79
115struct ccb { /* Command Control Block 5.3 */ 80struct ccb { /* Command Control Block 5.3 */
116 unchar op; /* Command Control Block Operation Code */ 81 u8 op; /* Command Control Block Operation Code */
117 unchar idlun; /* op=0,2:Target Id, op=1:Initiator Id */ 82 u8 idlun; /* op=0,2:Target Id, op=1:Initiator Id */
118 /* Outbound data transfer, length is checked*/ 83 /* Outbound data transfer, length is checked*/
119 /* Inbound data transfer, length is checked */ 84 /* Inbound data transfer, length is checked */
120 /* Logical Unit Number */ 85 /* Logical Unit Number */
121 unchar cdblen; /* SCSI Command Length */ 86 u8 cdblen; /* SCSI Command Length */
122 unchar rsalen; /* Request Sense Allocation Length/Disable */ 87 u8 rsalen; /* Request Sense Allocation Length/Disable */
123 unchar datalen[3]; /* Data Length (msb, .., lsb) */ 88 u8 datalen[3]; /* Data Length (msb, .., lsb) */
124 unchar dataptr[3]; /* Data Pointer */ 89 u8 dataptr[3]; /* Data Pointer */
125 unchar linkptr[3]; /* Link Pointer */ 90 u8 linkptr[3]; /* Link Pointer */
126 unchar commlinkid; /* Command Linking Identifier */ 91 u8 commlinkid; /* Command Linking Identifier */
127 unchar hastat; /* Host Adapter Status (HASTAT) */ 92 u8 hastat; /* Host Adapter Status (HASTAT) */
128 unchar tarstat; /* Target Device Status */ 93 u8 tarstat; /* Target Device Status */
129 unchar reserved[2]; 94 u8 reserved[2];
130 unchar cdb[MAX_CDB+MAX_SENSE];/* SCSI Command Descriptor Block */ 95 u8 cdb[MAX_CDB+MAX_SENSE]; /* SCSI Command Descriptor Block */
131 /* REQUEST SENSE */ 96 /* REQUEST SENSE */
132}; 97};
133 98
134static int aha1542_detect(struct scsi_host_template *); 99#define AHA1542_REGION_SIZE 4
135static int aha1542_queuecommand(struct Scsi_Host *, struct scsi_cmnd *);
136static int aha1542_bus_reset(Scsi_Cmnd * SCpnt);
137static int aha1542_dev_reset(Scsi_Cmnd * SCpnt);
138static int aha1542_host_reset(Scsi_Cmnd * SCpnt);
139#if 0
140static int aha1542_old_abort(Scsi_Cmnd * SCpnt);
141static int aha1542_old_reset(Scsi_Cmnd *, unsigned int);
142#endif
143static int aha1542_biosparam(struct scsi_device *, struct block_device *,
144 sector_t, int *);
145
146#define AHA1542_MAILBOXES 8 100#define AHA1542_MAILBOXES 8
147#define AHA1542_SCATTER 16
148#define AHA1542_CMDLUN 1
149 101
150#endif 102#endif /* _AHA1542_H_ */
diff --git a/drivers/scsi/aic7xxx/aic79xx_core.c b/drivers/scsi/aic7xxx/aic79xx_core.c
index 97f2accd3dbb..109e2c99e6c1 100644
--- a/drivers/scsi/aic7xxx/aic79xx_core.c
+++ b/drivers/scsi/aic7xxx/aic79xx_core.c
@@ -10437,14 +10437,13 @@ ahd_handle_en_lun(struct ahd_softc *ahd, struct cam_sim *sim, union ccb *ccb)
10437 return; 10437 return;
10438 } 10438 }
10439 } 10439 }
10440 lstate = kmalloc(sizeof(*lstate), GFP_ATOMIC); 10440 lstate = kzalloc(sizeof(*lstate), GFP_ATOMIC);
10441 if (lstate == NULL) { 10441 if (lstate == NULL) {
10442 xpt_print_path(ccb->ccb_h.path); 10442 xpt_print_path(ccb->ccb_h.path);
10443 printk("Couldn't allocate lstate\n"); 10443 printk("Couldn't allocate lstate\n");
10444 ccb->ccb_h.status = CAM_RESRC_UNAVAIL; 10444 ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
10445 return; 10445 return;
10446 } 10446 }
10447 memset(lstate, 0, sizeof(*lstate));
10448 status = xpt_create_path(&lstate->path, /*periph*/NULL, 10447 status = xpt_create_path(&lstate->path, /*periph*/NULL,
10449 xpt_path_path_id(ccb->ccb_h.path), 10448 xpt_path_path_id(ccb->ccb_h.path),
10450 xpt_path_target_id(ccb->ccb_h.path), 10449 xpt_path_target_id(ccb->ccb_h.path),
diff --git a/drivers/scsi/aic7xxx/aic79xx_osm.c b/drivers/scsi/aic7xxx/aic79xx_osm.c
index d5c7b193d8d3..ce96a0be3282 100644
--- a/drivers/scsi/aic7xxx/aic79xx_osm.c
+++ b/drivers/scsi/aic7xxx/aic79xx_osm.c
@@ -1326,10 +1326,9 @@ int
1326ahd_platform_alloc(struct ahd_softc *ahd, void *platform_arg) 1326ahd_platform_alloc(struct ahd_softc *ahd, void *platform_arg)
1327{ 1327{
1328 ahd->platform_data = 1328 ahd->platform_data =
1329 kmalloc(sizeof(struct ahd_platform_data), GFP_ATOMIC); 1329 kzalloc(sizeof(struct ahd_platform_data), GFP_ATOMIC);
1330 if (ahd->platform_data == NULL) 1330 if (ahd->platform_data == NULL)
1331 return (ENOMEM); 1331 return (ENOMEM);
1332 memset(ahd->platform_data, 0, sizeof(struct ahd_platform_data));
1333 ahd->platform_data->irq = AHD_LINUX_NOIRQ; 1332 ahd->platform_data->irq = AHD_LINUX_NOIRQ;
1334 ahd_lockinit(ahd); 1333 ahd_lockinit(ahd);
1335 ahd->seltime = (aic79xx_seltime & 0x3) << 4; 1334 ahd->seltime = (aic79xx_seltime & 0x3) << 4;
diff --git a/drivers/scsi/aic7xxx/aic7xxx_core.c b/drivers/scsi/aic7xxx/aic7xxx_core.c
index 10172a3af1b9..c4829d84b335 100644
--- a/drivers/scsi/aic7xxx/aic7xxx_core.c
+++ b/drivers/scsi/aic7xxx/aic7xxx_core.c
@@ -4464,10 +4464,9 @@ ahc_softc_init(struct ahc_softc *ahc)
4464 ahc->pause = ahc->unpause | PAUSE; 4464 ahc->pause = ahc->unpause | PAUSE;
4465 /* XXX The shared scb data stuff should be deprecated */ 4465 /* XXX The shared scb data stuff should be deprecated */
4466 if (ahc->scb_data == NULL) { 4466 if (ahc->scb_data == NULL) {
4467 ahc->scb_data = kmalloc(sizeof(*ahc->scb_data), GFP_ATOMIC); 4467 ahc->scb_data = kzalloc(sizeof(*ahc->scb_data), GFP_ATOMIC);
4468 if (ahc->scb_data == NULL) 4468 if (ahc->scb_data == NULL)
4469 return (ENOMEM); 4469 return (ENOMEM);
4470 memset(ahc->scb_data, 0, sizeof(*ahc->scb_data));
4471 } 4470 }
4472 4471
4473 return (0); 4472 return (0);
@@ -4780,10 +4779,10 @@ ahc_init_scbdata(struct ahc_softc *ahc)
4780 SLIST_INIT(&scb_data->sg_maps); 4779 SLIST_INIT(&scb_data->sg_maps);
4781 4780
4782 /* Allocate SCB resources */ 4781 /* Allocate SCB resources */
4783 scb_data->scbarray = kmalloc(sizeof(struct scb) * AHC_SCB_MAX_ALLOC, GFP_ATOMIC); 4782 scb_data->scbarray = kzalloc(sizeof(struct scb) * AHC_SCB_MAX_ALLOC,
4783 GFP_ATOMIC);
4784 if (scb_data->scbarray == NULL) 4784 if (scb_data->scbarray == NULL)
4785 return (ENOMEM); 4785 return (ENOMEM);
4786 memset(scb_data->scbarray, 0, sizeof(struct scb) * AHC_SCB_MAX_ALLOC);
4787 4786
4788 /* Determine the number of hardware SCBs and initialize them */ 4787 /* Determine the number of hardware SCBs and initialize them */
4789 4788
@@ -7558,14 +7557,13 @@ ahc_handle_en_lun(struct ahc_softc *ahc, struct cam_sim *sim, union ccb *ccb)
7558 return; 7557 return;
7559 } 7558 }
7560 } 7559 }
7561 lstate = kmalloc(sizeof(*lstate), GFP_ATOMIC); 7560 lstate = kzalloc(sizeof(*lstate), GFP_ATOMIC);
7562 if (lstate == NULL) { 7561 if (lstate == NULL) {
7563 xpt_print_path(ccb->ccb_h.path); 7562 xpt_print_path(ccb->ccb_h.path);
7564 printk("Couldn't allocate lstate\n"); 7563 printk("Couldn't allocate lstate\n");
7565 ccb->ccb_h.status = CAM_RESRC_UNAVAIL; 7564 ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
7566 return; 7565 return;
7567 } 7566 }
7568 memset(lstate, 0, sizeof(*lstate));
7569 status = xpt_create_path(&lstate->path, /*periph*/NULL, 7567 status = xpt_create_path(&lstate->path, /*periph*/NULL,
7570 xpt_path_path_id(ccb->ccb_h.path), 7568 xpt_path_path_id(ccb->ccb_h.path),
7571 xpt_path_target_id(ccb->ccb_h.path), 7569 xpt_path_target_id(ccb->ccb_h.path),
diff --git a/drivers/scsi/aic7xxx/aic7xxx_osm.c b/drivers/scsi/aic7xxx/aic7xxx_osm.c
index 88360116dbcb..a2f2c774cd6b 100644
--- a/drivers/scsi/aic7xxx/aic7xxx_osm.c
+++ b/drivers/scsi/aic7xxx/aic7xxx_osm.c
@@ -1214,10 +1214,9 @@ ahc_platform_alloc(struct ahc_softc *ahc, void *platform_arg)
1214{ 1214{
1215 1215
1216 ahc->platform_data = 1216 ahc->platform_data =
1217 kmalloc(sizeof(struct ahc_platform_data), GFP_ATOMIC); 1217 kzalloc(sizeof(struct ahc_platform_data), GFP_ATOMIC);
1218 if (ahc->platform_data == NULL) 1218 if (ahc->platform_data == NULL)
1219 return (ENOMEM); 1219 return (ENOMEM);
1220 memset(ahc->platform_data, 0, sizeof(struct ahc_platform_data));
1221 ahc->platform_data->irq = AHC_LINUX_NOIRQ; 1220 ahc->platform_data->irq = AHC_LINUX_NOIRQ;
1222 ahc_lockinit(ahc); 1221 ahc_lockinit(ahc);
1223 ahc->seltime = (aic7xxx_seltime & 0x3) << 4; 1222 ahc->seltime = (aic7xxx_seltime & 0x3) << 4;
diff --git a/drivers/scsi/atari_NCR5380.c b/drivers/scsi/atari_NCR5380.c
index a70255413e7f..db87ece6edb2 100644
--- a/drivers/scsi/atari_NCR5380.c
+++ b/drivers/scsi/atari_NCR5380.c
@@ -1486,7 +1486,7 @@ static int NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
1486 * selection. 1486 * selection.
1487 */ 1487 */
1488 1488
1489 timeout = jiffies + (250 * HZ / 1000); 1489 timeout = jiffies + msecs_to_jiffies(250);
1490 1490
1491 /* 1491 /*
1492 * XXX very interesting - we're seeing a bounce where the BSY we 1492 * XXX very interesting - we're seeing a bounce where the BSY we
diff --git a/drivers/scsi/atari_scsi.c b/drivers/scsi/atari_scsi.c
index d1c37a386947..5ede3daa93dc 100644
--- a/drivers/scsi/atari_scsi.c
+++ b/drivers/scsi/atari_scsi.c
@@ -1014,7 +1014,6 @@ static struct platform_driver atari_scsi_driver = {
1014 .remove = __exit_p(atari_scsi_remove), 1014 .remove = __exit_p(atari_scsi_remove),
1015 .driver = { 1015 .driver = {
1016 .name = DRV_MODULE_NAME, 1016 .name = DRV_MODULE_NAME,
1017 .owner = THIS_MODULE,
1018 }, 1017 },
1019}; 1018};
1020 1019
diff --git a/drivers/scsi/bfa/bfad.c b/drivers/scsi/bfa/bfad.c
index e90a3742f09d..cc3b9d3d6d40 100644
--- a/drivers/scsi/bfa/bfad.c
+++ b/drivers/scsi/bfa/bfad.c
@@ -1079,22 +1079,18 @@ bfad_start_ops(struct bfad_s *bfad) {
1079int 1079int
1080bfad_worker(void *ptr) 1080bfad_worker(void *ptr)
1081{ 1081{
1082 struct bfad_s *bfad; 1082 struct bfad_s *bfad = ptr;
1083 unsigned long flags; 1083 unsigned long flags;
1084
1085 bfad = (struct bfad_s *)ptr;
1086
1087 while (!kthread_should_stop()) {
1088 1084
1089 /* Send event BFAD_E_INIT_SUCCESS */ 1085 if (kthread_should_stop())
1090 bfa_sm_send_event(bfad, BFAD_E_INIT_SUCCESS); 1086 return 0;
1091 1087
1092 spin_lock_irqsave(&bfad->bfad_lock, flags); 1088 /* Send event BFAD_E_INIT_SUCCESS */
1093 bfad->bfad_tsk = NULL; 1089 bfa_sm_send_event(bfad, BFAD_E_INIT_SUCCESS);
1094 spin_unlock_irqrestore(&bfad->bfad_lock, flags);
1095 1090
1096 break; 1091 spin_lock_irqsave(&bfad->bfad_lock, flags);
1097 } 1092 bfad->bfad_tsk = NULL;
1093 spin_unlock_irqrestore(&bfad->bfad_lock, flags);
1098 1094
1099 return 0; 1095 return 0;
1100} 1096}
diff --git a/drivers/scsi/g_NCR5380.c b/drivers/scsi/g_NCR5380.c
index f35792f7051c..f8d2478b11cc 100644
--- a/drivers/scsi/g_NCR5380.c
+++ b/drivers/scsi/g_NCR5380.c
@@ -57,9 +57,9 @@
57 */ 57 */
58 58
59/* settings for DTC3181E card with only Mustek scanner attached */ 59/* settings for DTC3181E card with only Mustek scanner attached */
60#define USLEEP_POLL 1 60#define USLEEP_POLL msecs_to_jiffies(10)
61#define USLEEP_SLEEP 20 61#define USLEEP_SLEEP msecs_to_jiffies(200)
62#define USLEEP_WAITLONG 500 62#define USLEEP_WAITLONG msecs_to_jiffies(5000)
63 63
64#define AUTOPROBE_IRQ 64#define AUTOPROBE_IRQ
65 65
@@ -723,7 +723,7 @@ module_param(ncr_53c400a, int, 0);
723module_param(dtc_3181e, int, 0); 723module_param(dtc_3181e, int, 0);
724MODULE_LICENSE("GPL"); 724MODULE_LICENSE("GPL");
725 725
726#ifndef SCSI_G_NCR5380_MEM 726#if !defined(SCSI_G_NCR5380_MEM) && defined(MODULE)
727static struct isapnp_device_id id_table[] = { 727static struct isapnp_device_id id_table[] = {
728 { 728 {
729 ISAPNP_ANY_ID, ISAPNP_ANY_ID, 729 ISAPNP_ANY_ID, ISAPNP_ANY_ID,
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index d9afc51af7d3..882744852aac 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -99,6 +99,7 @@ static unsigned int ipr_debug = 0;
99static unsigned int ipr_max_devs = IPR_DEFAULT_SIS64_DEVS; 99static unsigned int ipr_max_devs = IPR_DEFAULT_SIS64_DEVS;
100static unsigned int ipr_dual_ioa_raid = 1; 100static unsigned int ipr_dual_ioa_raid = 1;
101static unsigned int ipr_number_of_msix = 2; 101static unsigned int ipr_number_of_msix = 2;
102static unsigned int ipr_fast_reboot;
102static DEFINE_SPINLOCK(ipr_driver_lock); 103static DEFINE_SPINLOCK(ipr_driver_lock);
103 104
104/* This table describes the differences between DMA controller chips */ 105/* This table describes the differences between DMA controller chips */
@@ -221,6 +222,8 @@ MODULE_PARM_DESC(max_devs, "Specify the maximum number of physical devices. "
221 "[Default=" __stringify(IPR_DEFAULT_SIS64_DEVS) "]"); 222 "[Default=" __stringify(IPR_DEFAULT_SIS64_DEVS) "]");
222module_param_named(number_of_msix, ipr_number_of_msix, int, 0); 223module_param_named(number_of_msix, ipr_number_of_msix, int, 0);
223MODULE_PARM_DESC(number_of_msix, "Specify the number of MSIX interrupts to use on capable adapters (1 - 16). (default:2)"); 224MODULE_PARM_DESC(number_of_msix, "Specify the number of MSIX interrupts to use on capable adapters (1 - 16). (default:2)");
225module_param_named(fast_reboot, ipr_fast_reboot, int, S_IRUGO | S_IWUSR);
226MODULE_PARM_DESC(fast_reboot, "Skip adapter shutdown during reboot. Set to 1 to enable. (default: 0)");
224MODULE_LICENSE("GPL"); 227MODULE_LICENSE("GPL");
225MODULE_VERSION(IPR_DRIVER_VERSION); 228MODULE_VERSION(IPR_DRIVER_VERSION);
226 229
@@ -495,6 +498,10 @@ struct ipr_error_table_t ipr_error_table[] = {
495 "4061: Multipath redundancy level got better"}, 498 "4061: Multipath redundancy level got better"},
496 {0x066B9200, 0, IPR_DEFAULT_LOG_LEVEL, 499 {0x066B9200, 0, IPR_DEFAULT_LOG_LEVEL,
497 "4060: Multipath redundancy level got worse"}, 500 "4060: Multipath redundancy level got worse"},
501 {0x06808100, 0, IPR_DEFAULT_LOG_LEVEL,
502 "9083: Device raw mode enabled"},
503 {0x06808200, 0, IPR_DEFAULT_LOG_LEVEL,
504 "9084: Device raw mode disabled"},
498 {0x07270000, 0, 0, 505 {0x07270000, 0, 0,
499 "Failure due to other device"}, 506 "Failure due to other device"},
500 {0x07278000, 0, IPR_DEFAULT_LOG_LEVEL, 507 {0x07278000, 0, IPR_DEFAULT_LOG_LEVEL,
@@ -1462,7 +1469,8 @@ static void ipr_process_ccn(struct ipr_cmnd *ipr_cmd)
1462 list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q); 1469 list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
1463 1470
1464 if (ioasc) { 1471 if (ioasc) {
1465 if (ioasc != IPR_IOASC_IOA_WAS_RESET) 1472 if (ioasc != IPR_IOASC_IOA_WAS_RESET &&
1473 ioasc != IPR_IOASC_ABORTED_CMD_TERM_BY_HOST)
1466 dev_err(&ioa_cfg->pdev->dev, 1474 dev_err(&ioa_cfg->pdev->dev,
1467 "Host RCB failed with IOASC: 0x%08X\n", ioasc); 1475 "Host RCB failed with IOASC: 0x%08X\n", ioasc);
1468 1476
@@ -2566,7 +2574,8 @@ static void ipr_process_error(struct ipr_cmnd *ipr_cmd)
2566 ipr_handle_log_data(ioa_cfg, hostrcb); 2574 ipr_handle_log_data(ioa_cfg, hostrcb);
2567 if (fd_ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED) 2575 if (fd_ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED)
2568 ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV); 2576 ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
2569 } else if (ioasc != IPR_IOASC_IOA_WAS_RESET) { 2577 } else if (ioasc != IPR_IOASC_IOA_WAS_RESET &&
2578 ioasc != IPR_IOASC_ABORTED_CMD_TERM_BY_HOST) {
2570 dev_err(&ioa_cfg->pdev->dev, 2579 dev_err(&ioa_cfg->pdev->dev,
2571 "Host RCB failed with IOASC: 0x%08X\n", ioasc); 2580 "Host RCB failed with IOASC: 0x%08X\n", ioasc);
2572 } 2581 }
@@ -4491,11 +4500,83 @@ static struct device_attribute ipr_resource_type_attr = {
4491 .show = ipr_show_resource_type 4500 .show = ipr_show_resource_type
4492}; 4501};
4493 4502
4503/**
4504 * ipr_show_raw_mode - Show the adapter's raw mode
4505 * @dev: class device struct
4506 * @buf: buffer
4507 *
4508 * Return value:
4509 * number of bytes printed to buffer
4510 **/
4511static ssize_t ipr_show_raw_mode(struct device *dev,
4512 struct device_attribute *attr, char *buf)
4513{
4514 struct scsi_device *sdev = to_scsi_device(dev);
4515 struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
4516 struct ipr_resource_entry *res;
4517 unsigned long lock_flags = 0;
4518 ssize_t len;
4519
4520 spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
4521 res = (struct ipr_resource_entry *)sdev->hostdata;
4522 if (res)
4523 len = snprintf(buf, PAGE_SIZE, "%d\n", res->raw_mode);
4524 else
4525 len = -ENXIO;
4526 spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
4527 return len;
4528}
4529
4530/**
4531 * ipr_store_raw_mode - Change the adapter's raw mode
4532 * @dev: class device struct
4533 * @buf: buffer
4534 *
4535 * Return value:
4536 * number of bytes printed to buffer
4537 **/
4538static ssize_t ipr_store_raw_mode(struct device *dev,
4539 struct device_attribute *attr,
4540 const char *buf, size_t count)
4541{
4542 struct scsi_device *sdev = to_scsi_device(dev);
4543 struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
4544 struct ipr_resource_entry *res;
4545 unsigned long lock_flags = 0;
4546 ssize_t len;
4547
4548 spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
4549 res = (struct ipr_resource_entry *)sdev->hostdata;
4550 if (res) {
4551 if (ioa_cfg->sis64 && ipr_is_af_dasd_device(res)) {
4552 res->raw_mode = simple_strtoul(buf, NULL, 10);
4553 len = strlen(buf);
4554 if (res->sdev)
4555 sdev_printk(KERN_INFO, res->sdev, "raw mode is %s\n",
4556 res->raw_mode ? "enabled" : "disabled");
4557 } else
4558 len = -EINVAL;
4559 } else
4560 len = -ENXIO;
4561 spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
4562 return len;
4563}
4564
4565static struct device_attribute ipr_raw_mode_attr = {
4566 .attr = {
4567 .name = "raw_mode",
4568 .mode = S_IRUGO | S_IWUSR,
4569 },
4570 .show = ipr_show_raw_mode,
4571 .store = ipr_store_raw_mode
4572};
4573
4494static struct device_attribute *ipr_dev_attrs[] = { 4574static struct device_attribute *ipr_dev_attrs[] = {
4495 &ipr_adapter_handle_attr, 4575 &ipr_adapter_handle_attr,
4496 &ipr_resource_path_attr, 4576 &ipr_resource_path_attr,
4497 &ipr_device_id_attr, 4577 &ipr_device_id_attr,
4498 &ipr_resource_type_attr, 4578 &ipr_resource_type_attr,
4579 &ipr_raw_mode_attr,
4499 NULL, 4580 NULL,
4500}; 4581};
4501 4582
@@ -5379,9 +5460,6 @@ static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg,
5379 if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) { 5460 if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
5380 /* Mask the interrupt */ 5461 /* Mask the interrupt */
5381 writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.set_interrupt_mask_reg); 5462 writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.set_interrupt_mask_reg);
5382
5383 /* Clear the interrupt */
5384 writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.clr_interrupt_reg);
5385 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg); 5463 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
5386 5464
5387 list_del(&ioa_cfg->reset_cmd->queue); 5465 list_del(&ioa_cfg->reset_cmd->queue);
@@ -6150,6 +6228,13 @@ static void ipr_erp_start(struct ipr_ioa_cfg *ioa_cfg,
6150 break; 6228 break;
6151 case IPR_IOASC_NR_INIT_CMD_REQUIRED: 6229 case IPR_IOASC_NR_INIT_CMD_REQUIRED:
6152 break; 6230 break;
6231 case IPR_IOASC_IR_NON_OPTIMIZED:
6232 if (res->raw_mode) {
6233 res->raw_mode = 0;
6234 scsi_cmd->result |= (DID_IMM_RETRY << 16);
6235 } else
6236 scsi_cmd->result |= (DID_ERROR << 16);
6237 break;
6153 default: 6238 default:
6154 if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR) 6239 if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
6155 scsi_cmd->result |= (DID_ERROR << 16); 6240 scsi_cmd->result |= (DID_ERROR << 16);
@@ -6289,6 +6374,8 @@ static int ipr_queuecommand(struct Scsi_Host *shost,
6289 (!ipr_is_gscsi(res) || scsi_cmd->cmnd[0] == IPR_QUERY_RSRC_STATE)) { 6374 (!ipr_is_gscsi(res) || scsi_cmd->cmnd[0] == IPR_QUERY_RSRC_STATE)) {
6290 ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD; 6375 ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
6291 } 6376 }
6377 if (res->raw_mode && ipr_is_af_dasd_device(res))
6378 ioarcb->cmd_pkt.request_type = IPR_RQTYPE_PIPE;
6292 6379
6293 if (ioa_cfg->sis64) 6380 if (ioa_cfg->sis64)
6294 rc = ipr_build_ioadl64(ioa_cfg, ipr_cmd); 6381 rc = ipr_build_ioadl64(ioa_cfg, ipr_cmd);
@@ -6402,7 +6489,6 @@ static struct scsi_host_template driver_template = {
6402 .shost_attrs = ipr_ioa_attrs, 6489 .shost_attrs = ipr_ioa_attrs,
6403 .sdev_attrs = ipr_dev_attrs, 6490 .sdev_attrs = ipr_dev_attrs,
6404 .proc_name = IPR_NAME, 6491 .proc_name = IPR_NAME,
6405 .no_write_same = 1,
6406 .use_blk_tags = 1, 6492 .use_blk_tags = 1,
6407}; 6493};
6408 6494
@@ -8318,7 +8404,6 @@ static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
8318static int ipr_reset_slot_reset_done(struct ipr_cmnd *ipr_cmd) 8404static int ipr_reset_slot_reset_done(struct ipr_cmnd *ipr_cmd)
8319{ 8405{
8320 ENTER; 8406 ENTER;
8321 pci_set_pcie_reset_state(ipr_cmd->ioa_cfg->pdev, pcie_deassert_reset);
8322 ipr_cmd->job_step = ipr_reset_bist_done; 8407 ipr_cmd->job_step = ipr_reset_bist_done;
8323 ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT); 8408 ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
8324 LEAVE; 8409 LEAVE;
@@ -8326,6 +8411,32 @@ static int ipr_reset_slot_reset_done(struct ipr_cmnd *ipr_cmd)
8326} 8411}
8327 8412
8328/** 8413/**
8414 * ipr_reset_reset_work - Pulse a PCIe fundamental reset
8415 * @work: work struct
8416 *
8417 * Description: This pulses warm reset to a slot.
8418 *
8419 **/
8420static void ipr_reset_reset_work(struct work_struct *work)
8421{
8422 struct ipr_cmnd *ipr_cmd = container_of(work, struct ipr_cmnd, work);
8423 struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
8424 struct pci_dev *pdev = ioa_cfg->pdev;
8425 unsigned long lock_flags = 0;
8426
8427 ENTER;
8428 pci_set_pcie_reset_state(pdev, pcie_warm_reset);
8429 msleep(jiffies_to_msecs(IPR_PCI_RESET_TIMEOUT));
8430 pci_set_pcie_reset_state(pdev, pcie_deassert_reset);
8431
8432 spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
8433 if (ioa_cfg->reset_cmd == ipr_cmd)
8434 ipr_reset_ioa_job(ipr_cmd);
8435 spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
8436 LEAVE;
8437}
8438
8439/**
8329 * ipr_reset_slot_reset - Reset the PCI slot of the adapter. 8440 * ipr_reset_slot_reset - Reset the PCI slot of the adapter.
8330 * @ipr_cmd: ipr command struct 8441 * @ipr_cmd: ipr command struct
8331 * 8442 *
@@ -8337,12 +8448,11 @@ static int ipr_reset_slot_reset_done(struct ipr_cmnd *ipr_cmd)
8337static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd) 8448static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
8338{ 8449{
8339 struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg; 8450 struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
8340 struct pci_dev *pdev = ioa_cfg->pdev;
8341 8451
8342 ENTER; 8452 ENTER;
8343 pci_set_pcie_reset_state(pdev, pcie_warm_reset); 8453 INIT_WORK(&ipr_cmd->work, ipr_reset_reset_work);
8454 queue_work(ioa_cfg->reset_work_q, &ipr_cmd->work);
8344 ipr_cmd->job_step = ipr_reset_slot_reset_done; 8455 ipr_cmd->job_step = ipr_reset_slot_reset_done;
8345 ipr_reset_start_timer(ipr_cmd, IPR_PCI_RESET_TIMEOUT);
8346 LEAVE; 8456 LEAVE;
8347 return IPR_RC_JOB_RETURN; 8457 return IPR_RC_JOB_RETURN;
8348} 8458}
@@ -8480,6 +8590,122 @@ static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
8480} 8590}
8481 8591
8482/** 8592/**
8593 * ipr_reset_quiesce_done - Complete IOA disconnect
8594 * @ipr_cmd: ipr command struct
8595 *
8596 * Description: Freeze the adapter to complete quiesce processing
8597 *
8598 * Return value:
8599 * IPR_RC_JOB_CONTINUE
8600 **/
8601static int ipr_reset_quiesce_done(struct ipr_cmnd *ipr_cmd)
8602{
8603 struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
8604
8605 ENTER;
8606 ipr_cmd->job_step = ipr_ioa_bringdown_done;
8607 ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
8608 LEAVE;
8609 return IPR_RC_JOB_CONTINUE;
8610}
8611
8612/**
8613 * ipr_reset_cancel_hcam_done - Check for outstanding commands
8614 * @ipr_cmd: ipr command struct
8615 *
8616 * Description: Ensure nothing is outstanding to the IOA and
8617 * proceed with IOA disconnect. Otherwise reset the IOA.
8618 *
8619 * Return value:
8620 * IPR_RC_JOB_RETURN / IPR_RC_JOB_CONTINUE
8621 **/
8622static int ipr_reset_cancel_hcam_done(struct ipr_cmnd *ipr_cmd)
8623{
8624 struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
8625 struct ipr_cmnd *loop_cmd;
8626 struct ipr_hrr_queue *hrrq;
8627 int rc = IPR_RC_JOB_CONTINUE;
8628 int count = 0;
8629
8630 ENTER;
8631 ipr_cmd->job_step = ipr_reset_quiesce_done;
8632
8633 for_each_hrrq(hrrq, ioa_cfg) {
8634 spin_lock(&hrrq->_lock);
8635 list_for_each_entry(loop_cmd, &hrrq->hrrq_pending_q, queue) {
8636 count++;
8637 ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
8638 list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
8639 rc = IPR_RC_JOB_RETURN;
8640 break;
8641 }
8642 spin_unlock(&hrrq->_lock);
8643
8644 if (count)
8645 break;
8646 }
8647
8648 LEAVE;
8649 return rc;
8650}
8651
8652/**
8653 * ipr_reset_cancel_hcam - Cancel outstanding HCAMs
8654 * @ipr_cmd: ipr command struct
8655 *
8656 * Description: Cancel any oustanding HCAMs to the IOA.
8657 *
8658 * Return value:
8659 * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
8660 **/
8661static int ipr_reset_cancel_hcam(struct ipr_cmnd *ipr_cmd)
8662{
8663 struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
8664 int rc = IPR_RC_JOB_CONTINUE;
8665 struct ipr_cmd_pkt *cmd_pkt;
8666 struct ipr_cmnd *hcam_cmd;
8667 struct ipr_hrr_queue *hrrq = &ioa_cfg->hrrq[IPR_INIT_HRRQ];
8668
8669 ENTER;
8670 ipr_cmd->job_step = ipr_reset_cancel_hcam_done;
8671
8672 if (!hrrq->ioa_is_dead) {
8673 if (!list_empty(&ioa_cfg->hostrcb_pending_q)) {
8674 list_for_each_entry(hcam_cmd, &hrrq->hrrq_pending_q, queue) {
8675 if (hcam_cmd->ioarcb.cmd_pkt.cdb[0] != IPR_HOST_CONTROLLED_ASYNC)
8676 continue;
8677
8678 ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
8679 ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
8680 cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
8681 cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
8682 cmd_pkt->cdb[0] = IPR_CANCEL_REQUEST;
8683 cmd_pkt->cdb[1] = IPR_CANCEL_64BIT_IOARCB;
8684 cmd_pkt->cdb[10] = ((u64) hcam_cmd->dma_addr >> 56) & 0xff;
8685 cmd_pkt->cdb[11] = ((u64) hcam_cmd->dma_addr >> 48) & 0xff;
8686 cmd_pkt->cdb[12] = ((u64) hcam_cmd->dma_addr >> 40) & 0xff;
8687 cmd_pkt->cdb[13] = ((u64) hcam_cmd->dma_addr >> 32) & 0xff;
8688 cmd_pkt->cdb[2] = ((u64) hcam_cmd->dma_addr >> 24) & 0xff;
8689 cmd_pkt->cdb[3] = ((u64) hcam_cmd->dma_addr >> 16) & 0xff;
8690 cmd_pkt->cdb[4] = ((u64) hcam_cmd->dma_addr >> 8) & 0xff;
8691 cmd_pkt->cdb[5] = ((u64) hcam_cmd->dma_addr) & 0xff;
8692
8693 ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
8694 IPR_CANCEL_TIMEOUT);
8695
8696 rc = IPR_RC_JOB_RETURN;
8697 ipr_cmd->job_step = ipr_reset_cancel_hcam;
8698 break;
8699 }
8700 }
8701 } else
8702 ipr_cmd->job_step = ipr_reset_alert;
8703
8704 LEAVE;
8705 return rc;
8706}
8707
8708/**
8483 * ipr_reset_ucode_download_done - Microcode download completion 8709 * ipr_reset_ucode_download_done - Microcode download completion
8484 * @ipr_cmd: ipr command struct 8710 * @ipr_cmd: ipr command struct
8485 * 8711 *
@@ -8561,7 +8787,9 @@ static int ipr_reset_shutdown_ioa(struct ipr_cmnd *ipr_cmd)
8561 int rc = IPR_RC_JOB_CONTINUE; 8787 int rc = IPR_RC_JOB_CONTINUE;
8562 8788
8563 ENTER; 8789 ENTER;
8564 if (shutdown_type != IPR_SHUTDOWN_NONE && 8790 if (shutdown_type == IPR_SHUTDOWN_QUIESCE)
8791 ipr_cmd->job_step = ipr_reset_cancel_hcam;
8792 else if (shutdown_type != IPR_SHUTDOWN_NONE &&
8565 !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) { 8793 !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
8566 ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE); 8794 ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
8567 ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD; 8795 ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
@@ -8917,13 +9145,15 @@ static void ipr_free_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
8917{ 9145{
8918 int i; 9146 int i;
8919 9147
8920 for (i = 0; i < IPR_NUM_CMD_BLKS; i++) { 9148 if (ioa_cfg->ipr_cmnd_list) {
8921 if (ioa_cfg->ipr_cmnd_list[i]) 9149 for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
8922 dma_pool_free(ioa_cfg->ipr_cmd_pool, 9150 if (ioa_cfg->ipr_cmnd_list[i])
8923 ioa_cfg->ipr_cmnd_list[i], 9151 dma_pool_free(ioa_cfg->ipr_cmd_pool,
8924 ioa_cfg->ipr_cmnd_list_dma[i]); 9152 ioa_cfg->ipr_cmnd_list[i],
9153 ioa_cfg->ipr_cmnd_list_dma[i]);
8925 9154
8926 ioa_cfg->ipr_cmnd_list[i] = NULL; 9155 ioa_cfg->ipr_cmnd_list[i] = NULL;
9156 }
8927 } 9157 }
8928 9158
8929 if (ioa_cfg->ipr_cmd_pool) 9159 if (ioa_cfg->ipr_cmd_pool)
@@ -8973,26 +9203,25 @@ static void ipr_free_mem(struct ipr_ioa_cfg *ioa_cfg)
8973} 9203}
8974 9204
8975/** 9205/**
8976 * ipr_free_all_resources - Free all allocated resources for an adapter. 9206 * ipr_free_irqs - Free all allocated IRQs for the adapter.
8977 * @ipr_cmd: ipr command struct 9207 * @ioa_cfg: ipr cfg struct
8978 * 9208 *
8979 * This function frees all allocated resources for the 9209 * This function frees all allocated IRQs for the
8980 * specified adapter. 9210 * specified adapter.
8981 * 9211 *
8982 * Return value: 9212 * Return value:
8983 * none 9213 * none
8984 **/ 9214 **/
8985static void ipr_free_all_resources(struct ipr_ioa_cfg *ioa_cfg) 9215static void ipr_free_irqs(struct ipr_ioa_cfg *ioa_cfg)
8986{ 9216{
8987 struct pci_dev *pdev = ioa_cfg->pdev; 9217 struct pci_dev *pdev = ioa_cfg->pdev;
8988 9218
8989 ENTER;
8990 if (ioa_cfg->intr_flag == IPR_USE_MSI || 9219 if (ioa_cfg->intr_flag == IPR_USE_MSI ||
8991 ioa_cfg->intr_flag == IPR_USE_MSIX) { 9220 ioa_cfg->intr_flag == IPR_USE_MSIX) {
8992 int i; 9221 int i;
8993 for (i = 0; i < ioa_cfg->nvectors; i++) 9222 for (i = 0; i < ioa_cfg->nvectors; i++)
8994 free_irq(ioa_cfg->vectors_info[i].vec, 9223 free_irq(ioa_cfg->vectors_info[i].vec,
8995 &ioa_cfg->hrrq[i]); 9224 &ioa_cfg->hrrq[i]);
8996 } else 9225 } else
8997 free_irq(pdev->irq, &ioa_cfg->hrrq[0]); 9226 free_irq(pdev->irq, &ioa_cfg->hrrq[0]);
8998 9227
@@ -9003,7 +9232,26 @@ static void ipr_free_all_resources(struct ipr_ioa_cfg *ioa_cfg)
9003 pci_disable_msix(pdev); 9232 pci_disable_msix(pdev);
9004 ioa_cfg->intr_flag &= ~IPR_USE_MSIX; 9233 ioa_cfg->intr_flag &= ~IPR_USE_MSIX;
9005 } 9234 }
9235}
9006 9236
9237/**
9238 * ipr_free_all_resources - Free all allocated resources for an adapter.
9239 * @ipr_cmd: ipr command struct
9240 *
9241 * This function frees all allocated resources for the
9242 * specified adapter.
9243 *
9244 * Return value:
9245 * none
9246 **/
9247static void ipr_free_all_resources(struct ipr_ioa_cfg *ioa_cfg)
9248{
9249 struct pci_dev *pdev = ioa_cfg->pdev;
9250
9251 ENTER;
9252 ipr_free_irqs(ioa_cfg);
9253 if (ioa_cfg->reset_work_q)
9254 destroy_workqueue(ioa_cfg->reset_work_q);
9007 iounmap(ioa_cfg->hdw_dma_regs); 9255 iounmap(ioa_cfg->hdw_dma_regs);
9008 pci_release_regions(pdev); 9256 pci_release_regions(pdev);
9009 ipr_free_mem(ioa_cfg); 9257 ipr_free_mem(ioa_cfg);
@@ -9823,6 +10071,14 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
9823 (dev_id->device == PCI_DEVICE_ID_IBM_OBSIDIAN_E && !ioa_cfg->revid)) { 10071 (dev_id->device == PCI_DEVICE_ID_IBM_OBSIDIAN_E && !ioa_cfg->revid)) {
9824 ioa_cfg->needs_warm_reset = 1; 10072 ioa_cfg->needs_warm_reset = 1;
9825 ioa_cfg->reset = ipr_reset_slot_reset; 10073 ioa_cfg->reset = ipr_reset_slot_reset;
10074
10075 ioa_cfg->reset_work_q = alloc_ordered_workqueue("ipr_reset_%d",
10076 WQ_MEM_RECLAIM, host->host_no);
10077
10078 if (!ioa_cfg->reset_work_q) {
10079 dev_err(&pdev->dev, "Couldn't register reset workqueue\n");
10080 goto out_free_irq;
10081 }
9826 } else 10082 } else
9827 ioa_cfg->reset = ipr_reset_start_bist; 10083 ioa_cfg->reset = ipr_reset_start_bist;
9828 10084
@@ -9834,6 +10090,8 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
9834out: 10090out:
9835 return rc; 10091 return rc;
9836 10092
10093out_free_irq:
10094 ipr_free_irqs(ioa_cfg);
9837cleanup_nolog: 10095cleanup_nolog:
9838 ipr_free_mem(ioa_cfg); 10096 ipr_free_mem(ioa_cfg);
9839out_msi_disable: 10097out_msi_disable:
@@ -9914,6 +10172,8 @@ static void __ipr_remove(struct pci_dev *pdev)
9914 spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags); 10172 spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
9915 wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload); 10173 wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
9916 flush_work(&ioa_cfg->work_q); 10174 flush_work(&ioa_cfg->work_q);
10175 if (ioa_cfg->reset_work_q)
10176 flush_workqueue(ioa_cfg->reset_work_q);
9917 INIT_LIST_HEAD(&ioa_cfg->used_res_q); 10177 INIT_LIST_HEAD(&ioa_cfg->used_res_q);
9918 spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags); 10178 spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
9919 10179
@@ -10036,6 +10296,7 @@ static void ipr_shutdown(struct pci_dev *pdev)
10036{ 10296{
10037 struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev); 10297 struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
10038 unsigned long lock_flags = 0; 10298 unsigned long lock_flags = 0;
10299 enum ipr_shutdown_type shutdown_type = IPR_SHUTDOWN_NORMAL;
10039 int i; 10300 int i;
10040 10301
10041 spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags); 10302 spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
@@ -10051,9 +10312,16 @@ static void ipr_shutdown(struct pci_dev *pdev)
10051 spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags); 10312 spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
10052 } 10313 }
10053 10314
10054 ipr_initiate_ioa_bringdown(ioa_cfg, IPR_SHUTDOWN_NORMAL); 10315 if (ipr_fast_reboot && system_state == SYSTEM_RESTART && ioa_cfg->sis64)
10316 shutdown_type = IPR_SHUTDOWN_QUIESCE;
10317
10318 ipr_initiate_ioa_bringdown(ioa_cfg, shutdown_type);
10055 spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags); 10319 spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
10056 wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload); 10320 wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
10321 if (ipr_fast_reboot && system_state == SYSTEM_RESTART && ioa_cfg->sis64) {
10322 ipr_free_irqs(ioa_cfg);
10323 pci_disable_device(ioa_cfg->pdev);
10324 }
10057} 10325}
10058 10326
10059static struct pci_device_id ipr_pci_table[] = { 10327static struct pci_device_id ipr_pci_table[] = {
@@ -10211,7 +10479,8 @@ static int ipr_halt(struct notifier_block *nb, ulong event, void *buf)
10211 10479
10212 list_for_each_entry(ioa_cfg, &ipr_ioa_head, queue) { 10480 list_for_each_entry(ioa_cfg, &ipr_ioa_head, queue) {
10213 spin_lock_irqsave(ioa_cfg->host->host_lock, flags); 10481 spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
10214 if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) { 10482 if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds ||
10483 (ipr_fast_reboot && event == SYS_RESTART && ioa_cfg->sis64)) {
10215 spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags); 10484 spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
10216 continue; 10485 continue;
10217 } 10486 }
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h
index ec03b42fa2b9..47412cf4eaac 100644
--- a/drivers/scsi/ipr.h
+++ b/drivers/scsi/ipr.h
@@ -39,8 +39,8 @@
39/* 39/*
40 * Literals 40 * Literals
41 */ 41 */
42#define IPR_DRIVER_VERSION "2.6.0" 42#define IPR_DRIVER_VERSION "2.6.1"
43#define IPR_DRIVER_DATE "(November 16, 2012)" 43#define IPR_DRIVER_DATE "(March 12, 2015)"
44 44
45/* 45/*
46 * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding 46 * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
@@ -138,6 +138,7 @@
138#define IPR_IOASC_BUS_WAS_RESET 0x06290000 138#define IPR_IOASC_BUS_WAS_RESET 0x06290000
139#define IPR_IOASC_BUS_WAS_RESET_BY_OTHER 0x06298000 139#define IPR_IOASC_BUS_WAS_RESET_BY_OTHER 0x06298000
140#define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST 0x0B5A0000 140#define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST 0x0B5A0000
141#define IPR_IOASC_IR_NON_OPTIMIZED 0x05258200
141 142
142#define IPR_FIRST_DRIVER_IOASC 0x10000000 143#define IPR_FIRST_DRIVER_IOASC 0x10000000
143#define IPR_IOASC_IOA_WAS_RESET 0x10000001 144#define IPR_IOASC_IOA_WAS_RESET 0x10000001
@@ -196,6 +197,8 @@
196/* 197/*
197 * Adapter Commands 198 * Adapter Commands
198 */ 199 */
200#define IPR_CANCEL_REQUEST 0xC0
201#define IPR_CANCEL_64BIT_IOARCB 0x01
199#define IPR_QUERY_RSRC_STATE 0xC2 202#define IPR_QUERY_RSRC_STATE 0xC2
200#define IPR_RESET_DEVICE 0xC3 203#define IPR_RESET_DEVICE 0xC3
201#define IPR_RESET_TYPE_SELECT 0x80 204#define IPR_RESET_TYPE_SELECT 0x80
@@ -222,6 +225,7 @@
222#define IPR_ABBREV_SHUTDOWN_TIMEOUT (10 * HZ) 225#define IPR_ABBREV_SHUTDOWN_TIMEOUT (10 * HZ)
223#define IPR_DUAL_IOA_ABBR_SHUTDOWN_TO (2 * 60 * HZ) 226#define IPR_DUAL_IOA_ABBR_SHUTDOWN_TO (2 * 60 * HZ)
224#define IPR_DEVICE_RESET_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ) 227#define IPR_DEVICE_RESET_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
228#define IPR_CANCEL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
225#define IPR_CANCEL_ALL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ) 229#define IPR_CANCEL_ALL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
226#define IPR_ABORT_TASK_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ) 230#define IPR_ABORT_TASK_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
227#define IPR_INTERNAL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ) 231#define IPR_INTERNAL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
@@ -518,6 +522,7 @@ struct ipr_cmd_pkt {
518#define IPR_RQTYPE_IOACMD 0x01 522#define IPR_RQTYPE_IOACMD 0x01
519#define IPR_RQTYPE_HCAM 0x02 523#define IPR_RQTYPE_HCAM 0x02
520#define IPR_RQTYPE_ATA_PASSTHRU 0x04 524#define IPR_RQTYPE_ATA_PASSTHRU 0x04
525#define IPR_RQTYPE_PIPE 0x05
521 526
522 u8 reserved2; 527 u8 reserved2;
523 528
@@ -1271,6 +1276,7 @@ struct ipr_resource_entry {
1271 u8 del_from_ml:1; 1276 u8 del_from_ml:1;
1272 u8 resetting_device:1; 1277 u8 resetting_device:1;
1273 u8 reset_occurred:1; 1278 u8 reset_occurred:1;
1279 u8 raw_mode:1;
1274 1280
1275 u32 bus; /* AKA channel */ 1281 u32 bus; /* AKA channel */
1276 u32 target; /* AKA id */ 1282 u32 target; /* AKA id */
@@ -1402,7 +1408,8 @@ enum ipr_shutdown_type {
1402 IPR_SHUTDOWN_NORMAL = 0x00, 1408 IPR_SHUTDOWN_NORMAL = 0x00,
1403 IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40, 1409 IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
1404 IPR_SHUTDOWN_ABBREV = 0x80, 1410 IPR_SHUTDOWN_ABBREV = 0x80,
1405 IPR_SHUTDOWN_NONE = 0x100 1411 IPR_SHUTDOWN_NONE = 0x100,
1412 IPR_SHUTDOWN_QUIESCE = 0x101,
1406}; 1413};
1407 1414
1408struct ipr_trace_entry { 1415struct ipr_trace_entry {
@@ -1536,6 +1543,7 @@ struct ipr_ioa_cfg {
1536 u8 saved_mode_page_len; 1543 u8 saved_mode_page_len;
1537 1544
1538 struct work_struct work_q; 1545 struct work_struct work_q;
1546 struct workqueue_struct *reset_work_q;
1539 1547
1540 wait_queue_head_t reset_wait_q; 1548 wait_queue_head_t reset_wait_q;
1541 wait_queue_head_t msi_wait_q; 1549 wait_queue_head_t msi_wait_q;
@@ -1587,6 +1595,7 @@ struct ipr_cmnd {
1587 struct ata_queued_cmd *qc; 1595 struct ata_queued_cmd *qc;
1588 struct completion completion; 1596 struct completion completion;
1589 struct timer_list timer; 1597 struct timer_list timer;
1598 struct work_struct work;
1590 void (*fast_done) (struct ipr_cmnd *); 1599 void (*fast_done) (struct ipr_cmnd *);
1591 void (*done) (struct ipr_cmnd *); 1600 void (*done) (struct ipr_cmnd *);
1592 int (*job_step) (struct ipr_cmnd *); 1601 int (*job_step) (struct ipr_cmnd *);
diff --git a/drivers/scsi/lpfc/lpfc.h b/drivers/scsi/lpfc/lpfc.h
index 434e9037908e..9b81a34d7449 100644
--- a/drivers/scsi/lpfc/lpfc.h
+++ b/drivers/scsi/lpfc/lpfc.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
@@ -413,6 +413,9 @@ struct lpfc_vport {
413 uint32_t cfg_fcp_class; 413 uint32_t cfg_fcp_class;
414 uint32_t cfg_use_adisc; 414 uint32_t cfg_use_adisc;
415 uint32_t cfg_fdmi_on; 415 uint32_t cfg_fdmi_on;
416#define LPFC_FDMI_SUPPORT 1 /* bit 0 - FDMI supported? */
417#define LPFC_FDMI_REG_DELAY 2 /* bit 1 - 60 sec registration delay */
418#define LPFC_FDMI_ALL_ATTRIB 4 /* bit 2 - register ALL attributes? */
416 uint32_t cfg_discovery_threads; 419 uint32_t cfg_discovery_threads;
417 uint32_t cfg_log_verbose; 420 uint32_t cfg_log_verbose;
418 uint32_t cfg_max_luns; 421 uint32_t cfg_max_luns;
diff --git a/drivers/scsi/lpfc/lpfc_attr.c b/drivers/scsi/lpfc/lpfc_attr.c
index 2f9b96826ac0..d65bd178d131 100644
--- a/drivers/scsi/lpfc/lpfc_attr.c
+++ b/drivers/scsi/lpfc/lpfc_attr.c
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
@@ -406,8 +406,13 @@ lpfc_option_rom_version_show(struct device *dev, struct device_attribute *attr,
406 struct Scsi_Host *shost = class_to_shost(dev); 406 struct Scsi_Host *shost = class_to_shost(dev);
407 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 407 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
408 struct lpfc_hba *phba = vport->phba; 408 struct lpfc_hba *phba = vport->phba;
409 char fwrev[FW_REV_STR_SIZE];
410
411 if (phba->sli_rev < LPFC_SLI_REV4)
412 return snprintf(buf, PAGE_SIZE, "%s\n", phba->OptionROMVersion);
409 413
410 return snprintf(buf, PAGE_SIZE, "%s\n", phba->OptionROMVersion); 414 lpfc_decode_firmware_rev(phba, fwrev, 1);
415 return snprintf(buf, PAGE_SIZE, "%s\n", fwrev);
411} 416}
412 417
413/** 418/**
@@ -4568,12 +4573,18 @@ LPFC_ATTR_R(multi_ring_type, FC_TYPE_IP, 1,
4568 4573
4569/* 4574/*
4570# lpfc_fdmi_on: controls FDMI support. 4575# lpfc_fdmi_on: controls FDMI support.
4571# 0 = no FDMI support 4576# Set NOT Set
4572# 1 = support FDMI without attribute of hostname 4577# bit 0 = FDMI support no FDMI support
4573# 2 = support FDMI with attribute of hostname 4578# LPFC_FDMI_SUPPORT just turns basic support on/off
4574# Value range [0,2]. Default value is 0. 4579# bit 1 = Register delay no register delay (60 seconds)
4580# LPFC_FDMI_REG_DELAY 60 sec registration delay after FDMI login
4581# bit 2 = All attributes Use a attribute subset
4582# LPFC_FDMI_ALL_ATTRIB applies to both port and HBA attributes
4583# Port attrutes subset: 1 thru 6 OR all: 1 thru 0xd 0x101 0x102 0x103
4584# HBA attributes subset: 1 thru 0xb OR all: 1 thru 0xc
4585# Value range [0,7]. Default value is 0.
4575*/ 4586*/
4576LPFC_VPORT_ATTR_RW(fdmi_on, 0, 0, 2, "Enable FDMI support"); 4587LPFC_VPORT_ATTR_RW(fdmi_on, 0, 0, 7, "Enable FDMI support");
4577 4588
4578/* 4589/*
4579# Specifies the maximum number of ELS cmds we can have outstanding (for 4590# Specifies the maximum number of ELS cmds we can have outstanding (for
diff --git a/drivers/scsi/lpfc/lpfc_bsg.c b/drivers/scsi/lpfc/lpfc_bsg.c
index a7bf359aa0c6..b705068079c0 100644
--- a/drivers/scsi/lpfc/lpfc_bsg.c
+++ b/drivers/scsi/lpfc/lpfc_bsg.c
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2009-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2009-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -3194,6 +3194,7 @@ lpfc_bsg_diag_loopback_run(struct fc_bsg_job *job)
3194 cmd->unsli3.rcvsli3.ox_id = 0xffff; 3194 cmd->unsli3.rcvsli3.ox_id = 0xffff;
3195 } 3195 }
3196 cmdiocbq->iocb_flag |= LPFC_IO_LIBDFC; 3196 cmdiocbq->iocb_flag |= LPFC_IO_LIBDFC;
3197 cmdiocbq->iocb_flag |= LPFC_IO_LOOPBACK;
3197 cmdiocbq->vport = phba->pport; 3198 cmdiocbq->vport = phba->pport;
3198 cmdiocbq->iocb_cmpl = NULL; 3199 cmdiocbq->iocb_cmpl = NULL;
3199 iocb_stat = lpfc_sli_issue_iocb_wait(phba, LPFC_ELS_RING, cmdiocbq, 3200 iocb_stat = lpfc_sli_issue_iocb_wait(phba, LPFC_ELS_RING, cmdiocbq,
@@ -4179,6 +4180,7 @@ lpfc_bsg_handle_sli_cfg_mbox(struct lpfc_hba *phba, struct fc_bsg_job *job,
4179 switch (opcode) { 4180 switch (opcode) {
4180 case COMN_OPCODE_GET_CNTL_ADDL_ATTRIBUTES: 4181 case COMN_OPCODE_GET_CNTL_ADDL_ATTRIBUTES:
4181 case COMN_OPCODE_GET_CNTL_ATTRIBUTES: 4182 case COMN_OPCODE_GET_CNTL_ATTRIBUTES:
4183 case COMN_OPCODE_GET_PROFILE_CONFIG:
4182 lpfc_printf_log(phba, KERN_INFO, LOG_LIBDFC, 4184 lpfc_printf_log(phba, KERN_INFO, LOG_LIBDFC,
4183 "3106 Handled SLI_CONFIG " 4185 "3106 Handled SLI_CONFIG "
4184 "subsys_comn, opcode:x%x\n", 4186 "subsys_comn, opcode:x%x\n",
diff --git a/drivers/scsi/lpfc/lpfc_bsg.h b/drivers/scsi/lpfc/lpfc_bsg.h
index 928ef609f363..e557bcdbcb19 100644
--- a/drivers/scsi/lpfc/lpfc_bsg.h
+++ b/drivers/scsi/lpfc/lpfc_bsg.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2010-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2010-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -246,6 +246,7 @@ struct lpfc_sli_config_emb1_subsys {
246#define lpfc_emb1_subcmnd_subsys_WORD word6 246#define lpfc_emb1_subcmnd_subsys_WORD word6
247/* Subsystem COMN (0x01) OpCodes */ 247/* Subsystem COMN (0x01) OpCodes */
248#define SLI_CONFIG_SUBSYS_COMN 0x01 248#define SLI_CONFIG_SUBSYS_COMN 0x01
249#define COMN_OPCODE_GET_PROFILE_CONFIG 0xA4
249#define COMN_OPCODE_READ_OBJECT 0xAB 250#define COMN_OPCODE_READ_OBJECT 0xAB
250#define COMN_OPCODE_WRITE_OBJECT 0xAC 251#define COMN_OPCODE_WRITE_OBJECT 0xAC
251#define COMN_OPCODE_READ_OBJECT_LIST 0xAD 252#define COMN_OPCODE_READ_OBJECT_LIST 0xAD
diff --git a/drivers/scsi/lpfc/lpfc_crtn.h b/drivers/scsi/lpfc/lpfc_crtn.h
index 00665a5d92fd..587e3e962f2b 100644
--- a/drivers/scsi/lpfc/lpfc_crtn.h
+++ b/drivers/scsi/lpfc/lpfc_crtn.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -284,6 +284,7 @@ void lpfc_sli_handle_slow_ring_event(struct lpfc_hba *,
284 struct lpfc_sli_ring *, uint32_t); 284 struct lpfc_sli_ring *, uint32_t);
285void lpfc_sli4_handle_received_buffer(struct lpfc_hba *, struct hbq_dmabuf *); 285void lpfc_sli4_handle_received_buffer(struct lpfc_hba *, struct hbq_dmabuf *);
286void lpfc_sli_def_mbox_cmpl(struct lpfc_hba *, LPFC_MBOXQ_t *); 286void lpfc_sli_def_mbox_cmpl(struct lpfc_hba *, LPFC_MBOXQ_t *);
287void lpfc_sli4_unreg_rpi_cmpl_clr(struct lpfc_hba *, LPFC_MBOXQ_t *);
287int lpfc_sli_issue_iocb(struct lpfc_hba *, uint32_t, 288int lpfc_sli_issue_iocb(struct lpfc_hba *, uint32_t,
288 struct lpfc_iocbq *, uint32_t); 289 struct lpfc_iocbq *, uint32_t);
289void lpfc_sli_pcimem_bcopy(void *, void *, uint32_t); 290void lpfc_sli_pcimem_bcopy(void *, void *, uint32_t);
@@ -354,6 +355,7 @@ void lpfc_free_sysfs_attr(struct lpfc_vport *);
354extern struct device_attribute *lpfc_hba_attrs[]; 355extern struct device_attribute *lpfc_hba_attrs[];
355extern struct device_attribute *lpfc_vport_attrs[]; 356extern struct device_attribute *lpfc_vport_attrs[];
356extern struct scsi_host_template lpfc_template; 357extern struct scsi_host_template lpfc_template;
358extern struct scsi_host_template lpfc_template_s3;
357extern struct scsi_host_template lpfc_vport_template; 359extern struct scsi_host_template lpfc_vport_template;
358extern struct fc_function_template lpfc_transport_functions; 360extern struct fc_function_template lpfc_transport_functions;
359extern struct fc_function_template lpfc_vport_transport_functions; 361extern struct fc_function_template lpfc_vport_transport_functions;
diff --git a/drivers/scsi/lpfc/lpfc_ct.c b/drivers/scsi/lpfc/lpfc_ct.c
index 61a32cd23f79..af129966bd11 100644
--- a/drivers/scsi/lpfc/lpfc_ct.c
+++ b/drivers/scsi/lpfc/lpfc_ct.c
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2013 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -555,7 +555,7 @@ lpfc_ns_rsp(struct lpfc_vport *vport, struct lpfc_dmabuf *mp, uint32_t Size)
555 } 555 }
556 } 556 }
557 } 557 }
558 if (CTentry & (be32_to_cpu(SLI_CT_LAST_ENTRY))) 558 if (CTentry & (cpu_to_be32(SLI_CT_LAST_ENTRY)))
559 goto nsout1; 559 goto nsout1;
560 Cnt -= sizeof (uint32_t); 560 Cnt -= sizeof (uint32_t);
561 } 561 }
@@ -641,7 +641,7 @@ lpfc_cmpl_ct_cmd_gid_ft(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
641 /* Good status, continue checking */ 641 /* Good status, continue checking */
642 CTrsp = (struct lpfc_sli_ct_request *) outp->virt; 642 CTrsp = (struct lpfc_sli_ct_request *) outp->virt;
643 if (CTrsp->CommandResponse.bits.CmdRsp == 643 if (CTrsp->CommandResponse.bits.CmdRsp ==
644 be16_to_cpu(SLI_CT_RESPONSE_FS_ACC)) { 644 cpu_to_be16(SLI_CT_RESPONSE_FS_ACC)) {
645 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 645 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY,
646 "0208 NameServer Rsp Data: x%x\n", 646 "0208 NameServer Rsp Data: x%x\n",
647 vport->fc_flag); 647 vport->fc_flag);
@@ -1074,11 +1074,48 @@ lpfc_vport_symbolic_node_name(struct lpfc_vport *vport, char *symbol,
1074 1074
1075 lpfc_decode_firmware_rev(vport->phba, fwrev, 0); 1075 lpfc_decode_firmware_rev(vport->phba, fwrev, 0);
1076 1076
1077 n = snprintf(symbol, size, "Emulex %s FV%s DV%s", 1077 n = snprintf(symbol, size, "Emulex %s", vport->phba->ModelName);
1078 vport->phba->ModelName, fwrev, lpfc_release_version); 1078
1079 if (size < n)
1080 return n;
1081 n += snprintf(symbol + n, size - n, " FV%s", fwrev);
1082
1083 if (size < n)
1084 return n;
1085 n += snprintf(symbol + n, size - n, " DV%s", lpfc_release_version);
1086
1087 if (size < n)
1088 return n;
1089 n += snprintf(symbol + n, size - n, " HN:%s", init_utsname()->nodename);
1090
1091 /* Note :- OS name is "Linux" */
1092 if (size < n)
1093 return n;
1094 n += snprintf(symbol + n, size - n, " OS:%s", init_utsname()->sysname);
1095
1079 return n; 1096 return n;
1080} 1097}
1081 1098
1099static uint32_t
1100lpfc_find_map_node(struct lpfc_vport *vport)
1101{
1102 struct lpfc_nodelist *ndlp, *next_ndlp;
1103 struct Scsi_Host *shost;
1104 uint32_t cnt = 0;
1105
1106 shost = lpfc_shost_from_vport(vport);
1107 spin_lock_irq(shost->host_lock);
1108 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
1109 if (ndlp->nlp_type & NLP_FABRIC)
1110 continue;
1111 if ((ndlp->nlp_state == NLP_STE_MAPPED_NODE) ||
1112 (ndlp->nlp_state == NLP_STE_UNMAPPED_NODE))
1113 cnt++;
1114 }
1115 spin_unlock_irq(shost->host_lock);
1116 return cnt;
1117}
1118
1082/* 1119/*
1083 * lpfc_ns_cmd 1120 * lpfc_ns_cmd
1084 * Description: 1121 * Description:
@@ -1177,7 +1214,7 @@ lpfc_ns_cmd(struct lpfc_vport *vport, int cmdcode,
1177 switch (cmdcode) { 1214 switch (cmdcode) {
1178 case SLI_CTNS_GID_FT: 1215 case SLI_CTNS_GID_FT:
1179 CtReq->CommandResponse.bits.CmdRsp = 1216 CtReq->CommandResponse.bits.CmdRsp =
1180 be16_to_cpu(SLI_CTNS_GID_FT); 1217 cpu_to_be16(SLI_CTNS_GID_FT);
1181 CtReq->un.gid.Fc4Type = SLI_CTPT_FCP; 1218 CtReq->un.gid.Fc4Type = SLI_CTPT_FCP;
1182 if (vport->port_state < LPFC_NS_QRY) 1219 if (vport->port_state < LPFC_NS_QRY)
1183 vport->port_state = LPFC_NS_QRY; 1220 vport->port_state = LPFC_NS_QRY;
@@ -1188,7 +1225,7 @@ lpfc_ns_cmd(struct lpfc_vport *vport, int cmdcode,
1188 1225
1189 case SLI_CTNS_GFF_ID: 1226 case SLI_CTNS_GFF_ID:
1190 CtReq->CommandResponse.bits.CmdRsp = 1227 CtReq->CommandResponse.bits.CmdRsp =
1191 be16_to_cpu(SLI_CTNS_GFF_ID); 1228 cpu_to_be16(SLI_CTNS_GFF_ID);
1192 CtReq->un.gff.PortId = cpu_to_be32(context); 1229 CtReq->un.gff.PortId = cpu_to_be32(context);
1193 cmpl = lpfc_cmpl_ct_cmd_gff_id; 1230 cmpl = lpfc_cmpl_ct_cmd_gff_id;
1194 break; 1231 break;
@@ -1196,7 +1233,7 @@ lpfc_ns_cmd(struct lpfc_vport *vport, int cmdcode,
1196 case SLI_CTNS_RFT_ID: 1233 case SLI_CTNS_RFT_ID:
1197 vport->ct_flags &= ~FC_CT_RFT_ID; 1234 vport->ct_flags &= ~FC_CT_RFT_ID;
1198 CtReq->CommandResponse.bits.CmdRsp = 1235 CtReq->CommandResponse.bits.CmdRsp =
1199 be16_to_cpu(SLI_CTNS_RFT_ID); 1236 cpu_to_be16(SLI_CTNS_RFT_ID);
1200 CtReq->un.rft.PortId = cpu_to_be32(vport->fc_myDID); 1237 CtReq->un.rft.PortId = cpu_to_be32(vport->fc_myDID);
1201 CtReq->un.rft.fcpReg = 1; 1238 CtReq->un.rft.fcpReg = 1;
1202 cmpl = lpfc_cmpl_ct_cmd_rft_id; 1239 cmpl = lpfc_cmpl_ct_cmd_rft_id;
@@ -1205,7 +1242,7 @@ lpfc_ns_cmd(struct lpfc_vport *vport, int cmdcode,
1205 case SLI_CTNS_RNN_ID: 1242 case SLI_CTNS_RNN_ID:
1206 vport->ct_flags &= ~FC_CT_RNN_ID; 1243 vport->ct_flags &= ~FC_CT_RNN_ID;
1207 CtReq->CommandResponse.bits.CmdRsp = 1244 CtReq->CommandResponse.bits.CmdRsp =
1208 be16_to_cpu(SLI_CTNS_RNN_ID); 1245 cpu_to_be16(SLI_CTNS_RNN_ID);
1209 CtReq->un.rnn.PortId = cpu_to_be32(vport->fc_myDID); 1246 CtReq->un.rnn.PortId = cpu_to_be32(vport->fc_myDID);
1210 memcpy(CtReq->un.rnn.wwnn, &vport->fc_nodename, 1247 memcpy(CtReq->un.rnn.wwnn, &vport->fc_nodename,
1211 sizeof (struct lpfc_name)); 1248 sizeof (struct lpfc_name));
@@ -1215,7 +1252,7 @@ lpfc_ns_cmd(struct lpfc_vport *vport, int cmdcode,
1215 case SLI_CTNS_RSPN_ID: 1252 case SLI_CTNS_RSPN_ID:
1216 vport->ct_flags &= ~FC_CT_RSPN_ID; 1253 vport->ct_flags &= ~FC_CT_RSPN_ID;
1217 CtReq->CommandResponse.bits.CmdRsp = 1254 CtReq->CommandResponse.bits.CmdRsp =
1218 be16_to_cpu(SLI_CTNS_RSPN_ID); 1255 cpu_to_be16(SLI_CTNS_RSPN_ID);
1219 CtReq->un.rspn.PortId = cpu_to_be32(vport->fc_myDID); 1256 CtReq->un.rspn.PortId = cpu_to_be32(vport->fc_myDID);
1220 size = sizeof(CtReq->un.rspn.symbname); 1257 size = sizeof(CtReq->un.rspn.symbname);
1221 CtReq->un.rspn.len = 1258 CtReq->un.rspn.len =
@@ -1226,7 +1263,7 @@ lpfc_ns_cmd(struct lpfc_vport *vport, int cmdcode,
1226 case SLI_CTNS_RSNN_NN: 1263 case SLI_CTNS_RSNN_NN:
1227 vport->ct_flags &= ~FC_CT_RSNN_NN; 1264 vport->ct_flags &= ~FC_CT_RSNN_NN;
1228 CtReq->CommandResponse.bits.CmdRsp = 1265 CtReq->CommandResponse.bits.CmdRsp =
1229 be16_to_cpu(SLI_CTNS_RSNN_NN); 1266 cpu_to_be16(SLI_CTNS_RSNN_NN);
1230 memcpy(CtReq->un.rsnn.wwnn, &vport->fc_nodename, 1267 memcpy(CtReq->un.rsnn.wwnn, &vport->fc_nodename,
1231 sizeof (struct lpfc_name)); 1268 sizeof (struct lpfc_name));
1232 size = sizeof(CtReq->un.rsnn.symbname); 1269 size = sizeof(CtReq->un.rsnn.symbname);
@@ -1238,14 +1275,14 @@ lpfc_ns_cmd(struct lpfc_vport *vport, int cmdcode,
1238 case SLI_CTNS_DA_ID: 1275 case SLI_CTNS_DA_ID:
1239 /* Implement DA_ID Nameserver request */ 1276 /* Implement DA_ID Nameserver request */
1240 CtReq->CommandResponse.bits.CmdRsp = 1277 CtReq->CommandResponse.bits.CmdRsp =
1241 be16_to_cpu(SLI_CTNS_DA_ID); 1278 cpu_to_be16(SLI_CTNS_DA_ID);
1242 CtReq->un.da_id.port_id = cpu_to_be32(vport->fc_myDID); 1279 CtReq->un.da_id.port_id = cpu_to_be32(vport->fc_myDID);
1243 cmpl = lpfc_cmpl_ct_cmd_da_id; 1280 cmpl = lpfc_cmpl_ct_cmd_da_id;
1244 break; 1281 break;
1245 case SLI_CTNS_RFF_ID: 1282 case SLI_CTNS_RFF_ID:
1246 vport->ct_flags &= ~FC_CT_RFF_ID; 1283 vport->ct_flags &= ~FC_CT_RFF_ID;
1247 CtReq->CommandResponse.bits.CmdRsp = 1284 CtReq->CommandResponse.bits.CmdRsp =
1248 be16_to_cpu(SLI_CTNS_RFF_ID); 1285 cpu_to_be16(SLI_CTNS_RFF_ID);
1249 CtReq->un.rff.PortId = cpu_to_be32(vport->fc_myDID); 1286 CtReq->un.rff.PortId = cpu_to_be32(vport->fc_myDID);
1250 CtReq->un.rff.fbits = FC4_FEATURE_INIT; 1287 CtReq->un.rff.fbits = FC4_FEATURE_INIT;
1251 CtReq->un.rff.type_code = FC_TYPE_FCP; 1288 CtReq->un.rff.type_code = FC_TYPE_FCP;
@@ -1299,7 +1336,6 @@ lpfc_cmpl_ct_cmd_fdmi(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
1299 uint32_t latt; 1336 uint32_t latt;
1300 1337
1301 latt = lpfc_els_chk_latt(vport); 1338 latt = lpfc_els_chk_latt(vport);
1302
1303 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_CT, 1339 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_CT,
1304 "FDMI cmpl: status:x%x/x%x latt:%d", 1340 "FDMI cmpl: status:x%x/x%x latt:%d",
1305 irsp->ulpStatus, irsp->un.ulpWord[4], latt); 1341 irsp->ulpStatus, irsp->un.ulpWord[4], latt);
@@ -1310,29 +1346,49 @@ lpfc_cmpl_ct_cmd_fdmi(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
1310 "ulpStatus: x%x, rid x%x\n", 1346 "ulpStatus: x%x, rid x%x\n",
1311 be16_to_cpu(fdmi_cmd), latt, irsp->ulpStatus, 1347 be16_to_cpu(fdmi_cmd), latt, irsp->ulpStatus,
1312 irsp->un.ulpWord[4]); 1348 irsp->un.ulpWord[4]);
1313 lpfc_ct_free_iocb(phba, cmdiocb); 1349 goto fail_out;
1314 return;
1315 } 1350 }
1316 1351
1317 ndlp = lpfc_findnode_did(vport, FDMI_DID); 1352 ndlp = lpfc_findnode_did(vport, FDMI_DID);
1318 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) 1353 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp))
1319 goto fail_out; 1354 goto fail_out;
1320 1355
1321 if (fdmi_rsp == be16_to_cpu(SLI_CT_RESPONSE_FS_RJT)) { 1356 if (fdmi_rsp == cpu_to_be16(SLI_CT_RESPONSE_FS_RJT)) {
1322 /* FDMI rsp failed */ 1357 /* FDMI rsp failed */
1323 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 1358 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY,
1324 "0220 FDMI rsp failed Data: x%x\n", 1359 "0220 FDMI rsp failed Data: x%x\n",
1325 be16_to_cpu(fdmi_cmd)); 1360 be16_to_cpu(fdmi_cmd));
1326 } 1361 }
1327 1362
1363fail_out:
1364 lpfc_ct_free_iocb(phba, cmdiocb);
1365}
1366
1367static void
1368lpfc_cmpl_ct_disc_fdmi(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
1369 struct lpfc_iocbq *rspiocb)
1370{
1371 struct lpfc_vport *vport = cmdiocb->vport;
1372 struct lpfc_dmabuf *inp = cmdiocb->context1;
1373 struct lpfc_sli_ct_request *CTcmd = inp->virt;
1374 uint16_t fdmi_cmd = CTcmd->CommandResponse.bits.CmdRsp;
1375 struct lpfc_nodelist *ndlp;
1376
1377 lpfc_cmpl_ct_cmd_fdmi(phba, cmdiocb, rspiocb);
1378
1379 ndlp = lpfc_findnode_did(vport, FDMI_DID);
1380 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp))
1381 return;
1382
1383 /*
1384 * Need to cycle thru FDMI registration for discovery
1385 * DHBA -> DPRT -> RHBA -> RPA
1386 */
1328 switch (be16_to_cpu(fdmi_cmd)) { 1387 switch (be16_to_cpu(fdmi_cmd)) {
1329 case SLI_MGMT_RHBA: 1388 case SLI_MGMT_RHBA:
1330 lpfc_fdmi_cmd(vport, ndlp, SLI_MGMT_RPA); 1389 lpfc_fdmi_cmd(vport, ndlp, SLI_MGMT_RPA);
1331 break; 1390 break;
1332 1391
1333 case SLI_MGMT_RPA:
1334 break;
1335
1336 case SLI_MGMT_DHBA: 1392 case SLI_MGMT_DHBA:
1337 lpfc_fdmi_cmd(vport, ndlp, SLI_MGMT_DPRT); 1393 lpfc_fdmi_cmd(vport, ndlp, SLI_MGMT_DPRT);
1338 break; 1394 break;
@@ -1341,12 +1397,9 @@ lpfc_cmpl_ct_cmd_fdmi(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
1341 lpfc_fdmi_cmd(vport, ndlp, SLI_MGMT_RHBA); 1397 lpfc_fdmi_cmd(vport, ndlp, SLI_MGMT_RHBA);
1342 break; 1398 break;
1343 } 1399 }
1344
1345fail_out:
1346 lpfc_ct_free_iocb(phba, cmdiocb);
1347 return;
1348} 1400}
1349 1401
1402
1350int 1403int
1351lpfc_fdmi_cmd(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp, int cmdcode) 1404lpfc_fdmi_cmd(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp, int cmdcode)
1352{ 1405{
@@ -1355,18 +1408,28 @@ lpfc_fdmi_cmd(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp, int cmdcode)
1355 struct lpfc_sli_ct_request *CtReq; 1408 struct lpfc_sli_ct_request *CtReq;
1356 struct ulp_bde64 *bpl; 1409 struct ulp_bde64 *bpl;
1357 uint32_t size; 1410 uint32_t size;
1358 REG_HBA *rh; 1411 uint32_t rsp_size;
1359 PORT_ENTRY *pe; 1412 struct lpfc_fdmi_reg_hba *rh;
1360 REG_PORT_ATTRIBUTE *pab; 1413 struct lpfc_fdmi_port_entry *pe;
1361 ATTRIBUTE_BLOCK *ab; 1414 struct lpfc_fdmi_reg_portattr *pab = NULL;
1362 ATTRIBUTE_ENTRY *ae; 1415 struct lpfc_fdmi_attr_block *ab = NULL;
1416 struct lpfc_fdmi_attr_entry *ae;
1417 struct lpfc_fdmi_attr_def *ad;
1363 void (*cmpl) (struct lpfc_hba *, struct lpfc_iocbq *, 1418 void (*cmpl) (struct lpfc_hba *, struct lpfc_iocbq *,
1364 struct lpfc_iocbq *); 1419 struct lpfc_iocbq *);
1365 1420
1421 if (ndlp == NULL) {
1422 ndlp = lpfc_findnode_did(vport, FDMI_DID);
1423 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp))
1424 return 0;
1425 cmpl = lpfc_cmpl_ct_cmd_fdmi; /* cmd interface */
1426 } else {
1427 cmpl = lpfc_cmpl_ct_disc_fdmi; /* called from discovery */
1428 }
1366 1429
1367 /* fill in BDEs for command */ 1430 /* fill in BDEs for command */
1368 /* Allocate buffer for command payload */ 1431 /* Allocate buffer for command payload */
1369 mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 1432 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
1370 if (!mp) 1433 if (!mp)
1371 goto fdmi_cmd_exit; 1434 goto fdmi_cmd_exit;
1372 1435
@@ -1375,7 +1438,7 @@ lpfc_fdmi_cmd(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp, int cmdcode)
1375 goto fdmi_cmd_free_mp; 1438 goto fdmi_cmd_free_mp;
1376 1439
1377 /* Allocate buffer for Buffer ptr list */ 1440 /* Allocate buffer for Buffer ptr list */
1378 bmp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 1441 bmp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
1379 if (!bmp) 1442 if (!bmp)
1380 goto fdmi_cmd_free_mpvirt; 1443 goto fdmi_cmd_free_mpvirt;
1381 1444
@@ -1390,205 +1453,330 @@ lpfc_fdmi_cmd(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp, int cmdcode)
1390 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 1453 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY,
1391 "0218 FDMI Request Data: x%x x%x x%x\n", 1454 "0218 FDMI Request Data: x%x x%x x%x\n",
1392 vport->fc_flag, vport->port_state, cmdcode); 1455 vport->fc_flag, vport->port_state, cmdcode);
1393 CtReq = (struct lpfc_sli_ct_request *) mp->virt; 1456 CtReq = (struct lpfc_sli_ct_request *)mp->virt;
1394 1457
1458 /* First populate the CT_IU preamble */
1395 memset(CtReq, 0, sizeof(struct lpfc_sli_ct_request)); 1459 memset(CtReq, 0, sizeof(struct lpfc_sli_ct_request));
1396 CtReq->RevisionId.bits.Revision = SLI_CT_REVISION; 1460 CtReq->RevisionId.bits.Revision = SLI_CT_REVISION;
1397 CtReq->RevisionId.bits.InId = 0; 1461 CtReq->RevisionId.bits.InId = 0;
1398 1462
1399 CtReq->FsType = SLI_CT_MANAGEMENT_SERVICE; 1463 CtReq->FsType = SLI_CT_MANAGEMENT_SERVICE;
1400 CtReq->FsSubType = SLI_CT_FDMI_Subtypes; 1464 CtReq->FsSubType = SLI_CT_FDMI_Subtypes;
1465
1466 CtReq->CommandResponse.bits.CmdRsp = cpu_to_be16(cmdcode);
1467 rsp_size = LPFC_BPL_SIZE;
1401 size = 0; 1468 size = 0;
1402 1469
1470 /* Next fill in the specific FDMI cmd information */
1403 switch (cmdcode) { 1471 switch (cmdcode) {
1472 case SLI_MGMT_RHAT:
1404 case SLI_MGMT_RHBA: 1473 case SLI_MGMT_RHBA:
1405 { 1474 {
1406 lpfc_vpd_t *vp = &phba->vpd; 1475 lpfc_vpd_t *vp = &phba->vpd;
1407 uint32_t i, j, incr; 1476 uint32_t i, j, incr;
1408 int len; 1477 int len = 0;
1409 1478
1410 CtReq->CommandResponse.bits.CmdRsp = 1479 rh = (struct lpfc_fdmi_reg_hba *)&CtReq->un.PortID;
1411 be16_to_cpu(SLI_MGMT_RHBA); 1480 /* HBA Identifier */
1412 CtReq->CommandResponse.bits.Size = 0;
1413 rh = (REG_HBA *) & CtReq->un.PortID;
1414 memcpy(&rh->hi.PortName, &vport->fc_sparam.portName, 1481 memcpy(&rh->hi.PortName, &vport->fc_sparam.portName,
1415 sizeof (struct lpfc_name)); 1482 sizeof(struct lpfc_name));
1416 /* One entry (port) per adapter */ 1483
1417 rh->rpl.EntryCnt = be32_to_cpu(1); 1484 if (cmdcode == SLI_MGMT_RHBA) {
1418 memcpy(&rh->rpl.pe, &vport->fc_sparam.portName, 1485 /* Registered Port List */
1419 sizeof (struct lpfc_name)); 1486 /* One entry (port) per adapter */
1420 1487 rh->rpl.EntryCnt = cpu_to_be32(1);
1421 /* point to the HBA attribute block */ 1488 memcpy(&rh->rpl.pe, &vport->fc_sparam.portName,
1422 size = 2 * sizeof (struct lpfc_name) + FOURBYTES; 1489 sizeof(struct lpfc_name));
1423 ab = (ATTRIBUTE_BLOCK *) ((uint8_t *) rh + size); 1490
1491 /* point to the HBA attribute block */
1492 size = 2 * sizeof(struct lpfc_name) +
1493 FOURBYTES;
1494 } else {
1495 size = sizeof(struct lpfc_name);
1496 }
1497 ab = (struct lpfc_fdmi_attr_block *)
1498 ((uint8_t *)rh + size);
1424 ab->EntryCnt = 0; 1499 ab->EntryCnt = 0;
1500 size += FOURBYTES;
1425 1501
1426 /* Point to the beginning of the first HBA attribute 1502 /*
1427 entry */ 1503 * Point to beginning of first HBA attribute entry
1504 */
1428 /* #1 HBA attribute entry */ 1505 /* #1 HBA attribute entry */
1429 size += FOURBYTES; 1506 ad = (struct lpfc_fdmi_attr_def *)
1430 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size); 1507 ((uint8_t *)rh + size);
1431 ae->ad.bits.AttrType = be16_to_cpu(NODE_NAME); 1508 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1432 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES 1509 memset(ae, 0, sizeof(struct lpfc_name));
1433 + sizeof (struct lpfc_name)); 1510 ad->AttrType = cpu_to_be16(RHBA_NODENAME);
1511 ad->AttrLen = cpu_to_be16(FOURBYTES
1512 + sizeof(struct lpfc_name));
1434 memcpy(&ae->un.NodeName, &vport->fc_sparam.nodeName, 1513 memcpy(&ae->un.NodeName, &vport->fc_sparam.nodeName,
1435 sizeof (struct lpfc_name)); 1514 sizeof(struct lpfc_name));
1436 ab->EntryCnt++; 1515 ab->EntryCnt++;
1437 size += FOURBYTES + sizeof (struct lpfc_name); 1516 size += FOURBYTES + sizeof(struct lpfc_name);
1517 if ((size + LPFC_FDMI_MAX_AE_SIZE) >
1518 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1519 goto hba_out;
1438 1520
1439 /* #2 HBA attribute entry */ 1521 /* #2 HBA attribute entry */
1440 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size); 1522 ad = (struct lpfc_fdmi_attr_def *)
1441 ae->ad.bits.AttrType = be16_to_cpu(MANUFACTURER); 1523 ((uint8_t *)rh + size);
1442 strncpy(ae->un.Manufacturer, "Emulex Corporation", 64); 1524 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1443 len = strlen(ae->un.Manufacturer); 1525 memset(ae, 0, sizeof(ae->un.Manufacturer));
1526 ad->AttrType = cpu_to_be16(RHBA_MANUFACTURER);
1527 strncpy(ae->un.Manufacturer, "Emulex Corporation",
1528 sizeof(ae->un.Manufacturer));
1529 len = strnlen(ae->un.Manufacturer,
1530 sizeof(ae->un.Manufacturer));
1444 len += (len & 3) ? (4 - (len & 3)) : 4; 1531 len += (len & 3) ? (4 - (len & 3)) : 4;
1445 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len); 1532 ad->AttrLen = cpu_to_be16(FOURBYTES + len);
1446 ab->EntryCnt++; 1533 ab->EntryCnt++;
1447 size += FOURBYTES + len; 1534 size += FOURBYTES + len;
1535 if ((size + LPFC_FDMI_MAX_AE_SIZE) >
1536 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1537 goto hba_out;
1448 1538
1449 /* #3 HBA attribute entry */ 1539 /* #3 HBA attribute entry */
1450 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size); 1540 ad = (struct lpfc_fdmi_attr_def *)
1451 ae->ad.bits.AttrType = be16_to_cpu(SERIAL_NUMBER); 1541 ((uint8_t *)rh + size);
1452 strncpy(ae->un.SerialNumber, phba->SerialNumber, 64); 1542 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1453 len = strlen(ae->un.SerialNumber); 1543 memset(ae, 0, sizeof(ae->un.SerialNumber));
1544 ad->AttrType = cpu_to_be16(RHBA_SERIAL_NUMBER);
1545 strncpy(ae->un.SerialNumber, phba->SerialNumber,
1546 sizeof(ae->un.SerialNumber));
1547 len = strnlen(ae->un.SerialNumber,
1548 sizeof(ae->un.SerialNumber));
1454 len += (len & 3) ? (4 - (len & 3)) : 4; 1549 len += (len & 3) ? (4 - (len & 3)) : 4;
1455 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len); 1550 ad->AttrLen = cpu_to_be16(FOURBYTES + len);
1456 ab->EntryCnt++; 1551 ab->EntryCnt++;
1457 size += FOURBYTES + len; 1552 size += FOURBYTES + len;
1553 if ((size + LPFC_FDMI_MAX_AE_SIZE) >
1554 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1555 goto hba_out;
1458 1556
1459 /* #4 HBA attribute entry */ 1557 /* #4 HBA attribute entry */
1460 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size); 1558 ad = (struct lpfc_fdmi_attr_def *)
1461 ae->ad.bits.AttrType = be16_to_cpu(MODEL); 1559 ((uint8_t *)rh + size);
1462 strncpy(ae->un.Model, phba->ModelName, 256); 1560 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1463 len = strlen(ae->un.Model); 1561 memset(ae, 0, sizeof(ae->un.Model));
1562 ad->AttrType = cpu_to_be16(RHBA_MODEL);
1563 strncpy(ae->un.Model, phba->ModelName,
1564 sizeof(ae->un.Model));
1565 len = strnlen(ae->un.Model, sizeof(ae->un.Model));
1464 len += (len & 3) ? (4 - (len & 3)) : 4; 1566 len += (len & 3) ? (4 - (len & 3)) : 4;
1465 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len); 1567 ad->AttrLen = cpu_to_be16(FOURBYTES + len);
1466 ab->EntryCnt++; 1568 ab->EntryCnt++;
1467 size += FOURBYTES + len; 1569 size += FOURBYTES + len;
1570 if ((size + LPFC_FDMI_MAX_AE_SIZE) >
1571 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1572 goto hba_out;
1468 1573
1469 /* #5 HBA attribute entry */ 1574 /* #5 HBA attribute entry */
1470 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size); 1575 ad = (struct lpfc_fdmi_attr_def *)
1471 ae->ad.bits.AttrType = be16_to_cpu(MODEL_DESCRIPTION); 1576 ((uint8_t *)rh + size);
1472 strncpy(ae->un.ModelDescription, phba->ModelDesc, 256); 1577 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1473 len = strlen(ae->un.ModelDescription); 1578 memset(ae, 0, sizeof(ae->un.ModelDescription));
1579 ad->AttrType = cpu_to_be16(RHBA_MODEL_DESCRIPTION);
1580 strncpy(ae->un.ModelDescription, phba->ModelDesc,
1581 sizeof(ae->un.ModelDescription));
1582 len = strnlen(ae->un.ModelDescription,
1583 sizeof(ae->un.ModelDescription));
1474 len += (len & 3) ? (4 - (len & 3)) : 4; 1584 len += (len & 3) ? (4 - (len & 3)) : 4;
1475 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len); 1585 ad->AttrLen = cpu_to_be16(FOURBYTES + len);
1476 ab->EntryCnt++; 1586 ab->EntryCnt++;
1477 size += FOURBYTES + len; 1587 size += FOURBYTES + len;
1588 if ((size + 8) > (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1589 goto hba_out;
1478 1590
1479 /* #6 HBA attribute entry */ 1591 /* #6 HBA attribute entry */
1480 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size); 1592 ad = (struct lpfc_fdmi_attr_def *)
1481 ae->ad.bits.AttrType = be16_to_cpu(HARDWARE_VERSION); 1593 ((uint8_t *)rh + size);
1482 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + 8); 1594 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1595 memset(ae, 0, 8);
1596 ad->AttrType = cpu_to_be16(RHBA_HARDWARE_VERSION);
1597 ad->AttrLen = cpu_to_be16(FOURBYTES + 8);
1483 /* Convert JEDEC ID to ascii for hardware version */ 1598 /* Convert JEDEC ID to ascii for hardware version */
1484 incr = vp->rev.biuRev; 1599 incr = vp->rev.biuRev;
1485 for (i = 0; i < 8; i++) { 1600 for (i = 0; i < 8; i++) {
1486 j = (incr & 0xf); 1601 j = (incr & 0xf);
1487 if (j <= 9) 1602 if (j <= 9)
1488 ae->un.HardwareVersion[7 - i] = 1603 ae->un.HardwareVersion[7 - i] =
1489 (char)((uint8_t) 0x30 + 1604 (char)((uint8_t)0x30 +
1490 (uint8_t) j); 1605 (uint8_t)j);
1491 else 1606 else
1492 ae->un.HardwareVersion[7 - i] = 1607 ae->un.HardwareVersion[7 - i] =
1493 (char)((uint8_t) 0x61 + 1608 (char)((uint8_t)0x61 +
1494 (uint8_t) (j - 10)); 1609 (uint8_t)(j - 10));
1495 incr = (incr >> 4); 1610 incr = (incr >> 4);
1496 } 1611 }
1497 ab->EntryCnt++; 1612 ab->EntryCnt++;
1498 size += FOURBYTES + 8; 1613 size += FOURBYTES + 8;
1614 if ((size + LPFC_FDMI_MAX_AE_SIZE) >
1615 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1616 goto hba_out;
1499 1617
1500 /* #7 HBA attribute entry */ 1618 /* #7 HBA attribute entry */
1501 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size); 1619 ad = (struct lpfc_fdmi_attr_def *)
1502 ae->ad.bits.AttrType = be16_to_cpu(DRIVER_VERSION); 1620 ((uint8_t *)rh + size);
1503 strncpy(ae->un.DriverVersion, 1621 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1504 lpfc_release_version, 256); 1622 memset(ae, 0, sizeof(ae->un.DriverVersion));
1505 len = strlen(ae->un.DriverVersion); 1623 ad->AttrType = cpu_to_be16(RHBA_DRIVER_VERSION);
1624 strncpy(ae->un.DriverVersion, lpfc_release_version,
1625 sizeof(ae->un.DriverVersion));
1626 len = strnlen(ae->un.DriverVersion,
1627 sizeof(ae->un.DriverVersion));
1506 len += (len & 3) ? (4 - (len & 3)) : 4; 1628 len += (len & 3) ? (4 - (len & 3)) : 4;
1507 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len); 1629 ad->AttrLen = cpu_to_be16(FOURBYTES + len);
1508 ab->EntryCnt++; 1630 ab->EntryCnt++;
1509 size += FOURBYTES + len; 1631 size += FOURBYTES + len;
1632 if ((size + LPFC_FDMI_MAX_AE_SIZE) >
1633 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1634 goto hba_out;
1510 1635
1511 /* #8 HBA attribute entry */ 1636 /* #8 HBA attribute entry */
1512 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size); 1637 ad = (struct lpfc_fdmi_attr_def *)
1513 ae->ad.bits.AttrType = be16_to_cpu(OPTION_ROM_VERSION); 1638 ((uint8_t *)rh + size);
1514 strncpy(ae->un.OptionROMVersion, 1639 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1515 phba->OptionROMVersion, 256); 1640 memset(ae, 0, sizeof(ae->un.OptionROMVersion));
1516 len = strlen(ae->un.OptionROMVersion); 1641 ad->AttrType = cpu_to_be16(RHBA_OPTION_ROM_VERSION);
1642 strncpy(ae->un.OptionROMVersion, phba->OptionROMVersion,
1643 sizeof(ae->un.OptionROMVersion));
1644 len = strnlen(ae->un.OptionROMVersion,
1645 sizeof(ae->un.OptionROMVersion));
1517 len += (len & 3) ? (4 - (len & 3)) : 4; 1646 len += (len & 3) ? (4 - (len & 3)) : 4;
1518 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len); 1647 ad->AttrLen = cpu_to_be16(FOURBYTES + len);
1519 ab->EntryCnt++; 1648 ab->EntryCnt++;
1520 size += FOURBYTES + len; 1649 size += FOURBYTES + len;
1650 if ((size + LPFC_FDMI_MAX_AE_SIZE) >
1651 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1652 goto hba_out;
1521 1653
1522 /* #9 HBA attribute entry */ 1654 /* #9 HBA attribute entry */
1523 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size); 1655 ad = (struct lpfc_fdmi_attr_def *)
1524 ae->ad.bits.AttrType = be16_to_cpu(FIRMWARE_VERSION); 1656 ((uint8_t *)rh + size);
1657 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1658 memset(ae, 0, sizeof(ae->un.FirmwareVersion));
1659 ad->AttrType = cpu_to_be16(RHBA_FIRMWARE_VERSION);
1525 lpfc_decode_firmware_rev(phba, ae->un.FirmwareVersion, 1660 lpfc_decode_firmware_rev(phba, ae->un.FirmwareVersion,
1526 1); 1661 1);
1527 len = strlen(ae->un.FirmwareVersion); 1662 len = strnlen(ae->un.FirmwareVersion,
1663 sizeof(ae->un.FirmwareVersion));
1528 len += (len & 3) ? (4 - (len & 3)) : 4; 1664 len += (len & 3) ? (4 - (len & 3)) : 4;
1529 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len); 1665 ad->AttrLen = cpu_to_be16(FOURBYTES + len);
1530 ab->EntryCnt++; 1666 ab->EntryCnt++;
1531 size += FOURBYTES + len; 1667 size += FOURBYTES + len;
1668 if ((size + LPFC_FDMI_MAX_AE_SIZE) >
1669 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1670 goto hba_out;
1532 1671
1533 /* #10 HBA attribute entry */ 1672 /* #10 HBA attribute entry */
1534 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size); 1673 ad = (struct lpfc_fdmi_attr_def *)
1535 ae->ad.bits.AttrType = be16_to_cpu(OS_NAME_VERSION); 1674 ((uint8_t *)rh + size);
1536 sprintf(ae->un.OsNameVersion, "%s %s %s", 1675 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1537 init_utsname()->sysname, 1676 memset(ae, 0, sizeof(ae->un.OsNameVersion));
1538 init_utsname()->release, 1677 ad->AttrType = cpu_to_be16(RHBA_OS_NAME_VERSION);
1539 init_utsname()->version); 1678 snprintf(ae->un.OsNameVersion,
1540 len = strlen(ae->un.OsNameVersion); 1679 sizeof(ae->un.OsNameVersion),
1680 "%s %s %s",
1681 init_utsname()->sysname,
1682 init_utsname()->release,
1683 init_utsname()->version);
1684 len = strnlen(ae->un.OsNameVersion,
1685 sizeof(ae->un.OsNameVersion));
1541 len += (len & 3) ? (4 - (len & 3)) : 4; 1686 len += (len & 3) ? (4 - (len & 3)) : 4;
1542 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len); 1687 ad->AttrLen = cpu_to_be16(FOURBYTES + len);
1543 ab->EntryCnt++; 1688 ab->EntryCnt++;
1544 size += FOURBYTES + len; 1689 size += FOURBYTES + len;
1690 if ((size + 4) > (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1691 goto hba_out;
1545 1692
1546 /* #11 HBA attribute entry */ 1693 /* #11 HBA attribute entry */
1547 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size); 1694 ad = (struct lpfc_fdmi_attr_def *)
1548 ae->ad.bits.AttrType = be16_to_cpu(MAX_CT_PAYLOAD_LEN); 1695 ((uint8_t *)rh + size);
1549 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + 4); 1696 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1550 ae->un.MaxCTPayloadLen = (65 * 4096); 1697 ad->AttrType =
1698 cpu_to_be16(RHBA_MAX_CT_PAYLOAD_LEN);
1699 ad->AttrLen = cpu_to_be16(FOURBYTES + 4);
1700 ae->un.MaxCTPayloadLen = cpu_to_be32(LPFC_MAX_CT_SIZE);
1551 ab->EntryCnt++; 1701 ab->EntryCnt++;
1552 size += FOURBYTES + 4; 1702 size += FOURBYTES + 4;
1703 if ((size + LPFC_FDMI_MAX_AE_SIZE) >
1704 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1705 goto hba_out;
1553 1706
1554 ab->EntryCnt = be32_to_cpu(ab->EntryCnt); 1707 /*
1708 * Currently switches don't seem to support the
1709 * following extended HBA attributes.
1710 */
1711 if (!(vport->cfg_fdmi_on & LPFC_FDMI_ALL_ATTRIB))
1712 goto hba_out;
1713
1714 /* #12 HBA attribute entry */
1715 ad = (struct lpfc_fdmi_attr_def *)
1716 ((uint8_t *)rh + size);
1717 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1718 memset(ae, 0, sizeof(ae->un.NodeSymName));
1719 ad->AttrType = cpu_to_be16(RHBA_SYM_NODENAME);
1720 len = lpfc_vport_symbolic_node_name(vport,
1721 ae->un.NodeSymName, sizeof(ae->un.NodeSymName));
1722 len += (len & 3) ? (4 - (len & 3)) : 4;
1723 ad->AttrLen = cpu_to_be16(FOURBYTES + len);
1724 ab->EntryCnt++;
1725 size += FOURBYTES + len;
1726hba_out:
1727 ab->EntryCnt = cpu_to_be32(ab->EntryCnt);
1555 /* Total size */ 1728 /* Total size */
1556 size = GID_REQUEST_SZ - 4 + size; 1729 size = GID_REQUEST_SZ - 4 + size;
1557 } 1730 }
1558 break; 1731 break;
1559 1732
1733 case SLI_MGMT_RPRT:
1560 case SLI_MGMT_RPA: 1734 case SLI_MGMT_RPA:
1561 { 1735 {
1562 lpfc_vpd_t *vp; 1736 lpfc_vpd_t *vp;
1563 struct serv_parm *hsp; 1737 struct serv_parm *hsp;
1564 int len; 1738 int len = 0;
1565 1739
1566 vp = &phba->vpd; 1740 vp = &phba->vpd;
1567 1741
1568 CtReq->CommandResponse.bits.CmdRsp = 1742 if (cmdcode == SLI_MGMT_RPRT) {
1569 be16_to_cpu(SLI_MGMT_RPA); 1743 rh = (struct lpfc_fdmi_reg_hba *)
1570 CtReq->CommandResponse.bits.Size = 0; 1744 &CtReq->un.PortID;
1571 pab = (REG_PORT_ATTRIBUTE *) & CtReq->un.PortID; 1745 /* HBA Identifier */
1572 size = sizeof (struct lpfc_name) + FOURBYTES; 1746 memcpy(&rh->hi.PortName,
1573 memcpy((uint8_t *) & pab->PortName, 1747 &vport->fc_sparam.portName,
1574 (uint8_t *) & vport->fc_sparam.portName, 1748 sizeof(struct lpfc_name));
1575 sizeof (struct lpfc_name)); 1749 pab = (struct lpfc_fdmi_reg_portattr *)
1750 &rh->rpl.EntryCnt;
1751 } else
1752 pab = (struct lpfc_fdmi_reg_portattr *)
1753 &CtReq->un.PortID;
1754 size = sizeof(struct lpfc_name) + FOURBYTES;
1755 memcpy((uint8_t *)&pab->PortName,
1756 (uint8_t *)&vport->fc_sparam.portName,
1757 sizeof(struct lpfc_name));
1576 pab->ab.EntryCnt = 0; 1758 pab->ab.EntryCnt = 0;
1577 1759
1578 /* #1 Port attribute entry */ 1760 /* #1 Port attribute entry */
1579 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) pab + size); 1761 ad = (struct lpfc_fdmi_attr_def *)
1580 ae->ad.bits.AttrType = be16_to_cpu(SUPPORTED_FC4_TYPES); 1762 ((uint8_t *)pab + size);
1581 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + 32); 1763 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1582 ae->un.SupportFC4Types[2] = 1; 1764 memset(ae, 0, sizeof(ae->un.FC4Types));
1583 ae->un.SupportFC4Types[7] = 1; 1765 ad->AttrType =
1766 cpu_to_be16(RPRT_SUPPORTED_FC4_TYPES);
1767 ad->AttrLen = cpu_to_be16(FOURBYTES + 32);
1768 ae->un.FC4Types[0] = 0x40; /* Type 1 - ELS */
1769 ae->un.FC4Types[1] = 0x80; /* Type 8 - FCP */
1770 ae->un.FC4Types[4] = 0x80; /* Type 32 - CT */
1584 pab->ab.EntryCnt++; 1771 pab->ab.EntryCnt++;
1585 size += FOURBYTES + 32; 1772 size += FOURBYTES + 32;
1586 1773
1587 /* #2 Port attribute entry */ 1774 /* #2 Port attribute entry */
1588 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) pab + size); 1775 ad = (struct lpfc_fdmi_attr_def *)
1589 ae->ad.bits.AttrType = be16_to_cpu(SUPPORTED_SPEED); 1776 ((uint8_t *)pab + size);
1590 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + 4); 1777 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1591 1778 ad->AttrType = cpu_to_be16(RPRT_SUPPORTED_SPEED);
1779 ad->AttrLen = cpu_to_be16(FOURBYTES + 4);
1592 ae->un.SupportSpeed = 0; 1780 ae->un.SupportSpeed = 0;
1593 if (phba->lmt & LMT_16Gb) 1781 if (phba->lmt & LMT_16Gb)
1594 ae->un.SupportSpeed |= HBA_PORTSPEED_16GBIT; 1782 ae->un.SupportSpeed |= HBA_PORTSPEED_16GBIT;
@@ -1602,15 +1790,19 @@ lpfc_fdmi_cmd(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp, int cmdcode)
1602 ae->un.SupportSpeed |= HBA_PORTSPEED_2GBIT; 1790 ae->un.SupportSpeed |= HBA_PORTSPEED_2GBIT;
1603 if (phba->lmt & LMT_1Gb) 1791 if (phba->lmt & LMT_1Gb)
1604 ae->un.SupportSpeed |= HBA_PORTSPEED_1GBIT; 1792 ae->un.SupportSpeed |= HBA_PORTSPEED_1GBIT;
1793 ae->un.SupportSpeed =
1794 cpu_to_be32(ae->un.SupportSpeed);
1605 1795
1606 pab->ab.EntryCnt++; 1796 pab->ab.EntryCnt++;
1607 size += FOURBYTES + 4; 1797 size += FOURBYTES + 4;
1608 1798
1609 /* #3 Port attribute entry */ 1799 /* #3 Port attribute entry */
1610 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) pab + size); 1800 ad = (struct lpfc_fdmi_attr_def *)
1611 ae->ad.bits.AttrType = be16_to_cpu(PORT_SPEED); 1801 ((uint8_t *)pab + size);
1612 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + 4); 1802 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1613 switch(phba->fc_linkspeed) { 1803 ad->AttrType = cpu_to_be16(RPRT_PORT_SPEED);
1804 ad->AttrLen = cpu_to_be16(FOURBYTES + 4);
1805 switch (phba->fc_linkspeed) {
1614 case LPFC_LINK_SPEED_1GHZ: 1806 case LPFC_LINK_SPEED_1GHZ:
1615 ae->un.PortSpeed = HBA_PORTSPEED_1GBIT; 1807 ae->un.PortSpeed = HBA_PORTSPEED_1GBIT;
1616 break; 1808 break;
@@ -1633,93 +1825,273 @@ lpfc_fdmi_cmd(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp, int cmdcode)
1633 ae->un.PortSpeed = HBA_PORTSPEED_UNKNOWN; 1825 ae->un.PortSpeed = HBA_PORTSPEED_UNKNOWN;
1634 break; 1826 break;
1635 } 1827 }
1828 ae->un.PortSpeed = cpu_to_be32(ae->un.PortSpeed);
1636 pab->ab.EntryCnt++; 1829 pab->ab.EntryCnt++;
1637 size += FOURBYTES + 4; 1830 size += FOURBYTES + 4;
1638 1831
1639 /* #4 Port attribute entry */ 1832 /* #4 Port attribute entry */
1640 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) pab + size); 1833 ad = (struct lpfc_fdmi_attr_def *)
1641 ae->ad.bits.AttrType = be16_to_cpu(MAX_FRAME_SIZE); 1834 ((uint8_t *)pab + size);
1642 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + 4); 1835 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1643 hsp = (struct serv_parm *) & vport->fc_sparam; 1836 ad->AttrType = cpu_to_be16(RPRT_MAX_FRAME_SIZE);
1837 ad->AttrLen = cpu_to_be16(FOURBYTES + 4);
1838 hsp = (struct serv_parm *)&vport->fc_sparam;
1644 ae->un.MaxFrameSize = 1839 ae->un.MaxFrameSize =
1645 (((uint32_t) hsp->cmn. 1840 (((uint32_t)hsp->cmn.
1646 bbRcvSizeMsb) << 8) | (uint32_t) hsp->cmn. 1841 bbRcvSizeMsb) << 8) | (uint32_t)hsp->cmn.
1647 bbRcvSizeLsb; 1842 bbRcvSizeLsb;
1843 ae->un.MaxFrameSize =
1844 cpu_to_be32(ae->un.MaxFrameSize);
1648 pab->ab.EntryCnt++; 1845 pab->ab.EntryCnt++;
1649 size += FOURBYTES + 4; 1846 size += FOURBYTES + 4;
1847 if ((size + LPFC_FDMI_MAX_AE_SIZE) >
1848 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1849 goto port_out;
1650 1850
1651 /* #5 Port attribute entry */ 1851 /* #5 Port attribute entry */
1652 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) pab + size); 1852 ad = (struct lpfc_fdmi_attr_def *)
1653 ae->ad.bits.AttrType = be16_to_cpu(OS_DEVICE_NAME); 1853 ((uint8_t *)pab + size);
1654 strcpy((char *)ae->un.OsDeviceName, LPFC_DRIVER_NAME); 1854 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1655 len = strlen((char *)ae->un.OsDeviceName); 1855 memset(ae, 0, sizeof(ae->un.OsDeviceName));
1856 ad->AttrType = cpu_to_be16(RPRT_OS_DEVICE_NAME);
1857 strncpy((char *)ae->un.OsDeviceName, LPFC_DRIVER_NAME,
1858 sizeof(ae->un.OsDeviceName));
1859 len = strnlen((char *)ae->un.OsDeviceName,
1860 sizeof(ae->un.OsDeviceName));
1656 len += (len & 3) ? (4 - (len & 3)) : 4; 1861 len += (len & 3) ? (4 - (len & 3)) : 4;
1657 ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len); 1862 ad->AttrLen = cpu_to_be16(FOURBYTES + len);
1658 pab->ab.EntryCnt++; 1863 pab->ab.EntryCnt++;
1659 size += FOURBYTES + len; 1864 size += FOURBYTES + len;
1865 if ((size + LPFC_FDMI_MAX_AE_SIZE) >
1866 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1867 goto port_out;
1868
1869 /* #6 Port attribute entry */
1870 ad = (struct lpfc_fdmi_attr_def *)
1871 ((uint8_t *)pab + size);
1872 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1873 memset(ae, 0, sizeof(ae->un.HostName));
1874 snprintf(ae->un.HostName, sizeof(ae->un.HostName), "%s",
1875 init_utsname()->nodename);
1876 ad->AttrType = cpu_to_be16(RPRT_HOST_NAME);
1877 len = strnlen(ae->un.HostName,
1878 sizeof(ae->un.HostName));
1879 len += (len & 3) ? (4 - (len & 3)) : 4;
1880 ad->AttrLen =
1881 cpu_to_be16(FOURBYTES + len);
1882 pab->ab.EntryCnt++;
1883 size += FOURBYTES + len;
1884 if ((size + sizeof(struct lpfc_name)) >
1885 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1886 goto port_out;
1660 1887
1661 if (vport->cfg_fdmi_on == 2) { 1888 /*
1662 /* #6 Port attribute entry */ 1889 * Currently switches don't seem to support the
1663 ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) pab + 1890 * following extended Port attributes.
1664 size); 1891 */
1665 ae->ad.bits.AttrType = be16_to_cpu(HOST_NAME); 1892 if (!(vport->cfg_fdmi_on & LPFC_FDMI_ALL_ATTRIB))
1666 sprintf(ae->un.HostName, "%s", 1893 goto port_out;
1667 init_utsname()->nodename); 1894
1668 len = strlen(ae->un.HostName); 1895 /* #7 Port attribute entry */
1669 len += (len & 3) ? (4 - (len & 3)) : 4; 1896 ad = (struct lpfc_fdmi_attr_def *)
1670 ae->ad.bits.AttrLen = 1897 ((uint8_t *)pab + size);
1671 be16_to_cpu(FOURBYTES + len); 1898 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1672 pab->ab.EntryCnt++; 1899 memset(ae, 0, sizeof(struct lpfc_name));
1673 size += FOURBYTES + len; 1900 ad->AttrType = cpu_to_be16(RPRT_NODENAME);
1674 } 1901 ad->AttrLen = cpu_to_be16(FOURBYTES
1675 1902 + sizeof(struct lpfc_name));
1676 pab->ab.EntryCnt = be32_to_cpu(pab->ab.EntryCnt); 1903 memcpy(&ae->un.NodeName, &vport->fc_sparam.nodeName,
1904 sizeof(struct lpfc_name));
1905 pab->ab.EntryCnt++;
1906 size += FOURBYTES + sizeof(struct lpfc_name);
1907 if ((size + sizeof(struct lpfc_name)) >
1908 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1909 goto port_out;
1910
1911 /* #8 Port attribute entry */
1912 ad = (struct lpfc_fdmi_attr_def *)
1913 ((uint8_t *)pab + size);
1914 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1915 memset(ae, 0, sizeof(struct lpfc_name));
1916 ad->AttrType = cpu_to_be16(RPRT_PORTNAME);
1917 ad->AttrLen = cpu_to_be16(FOURBYTES
1918 + sizeof(struct lpfc_name));
1919 memcpy(&ae->un.PortName, &vport->fc_sparam.portName,
1920 sizeof(struct lpfc_name));
1921 pab->ab.EntryCnt++;
1922 size += FOURBYTES + sizeof(struct lpfc_name);
1923 if ((size + LPFC_FDMI_MAX_AE_SIZE) >
1924 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1925 goto port_out;
1926
1927 /* #9 Port attribute entry */
1928 ad = (struct lpfc_fdmi_attr_def *)
1929 ((uint8_t *)pab + size);
1930 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1931 memset(ae, 0, sizeof(ae->un.NodeSymName));
1932 ad->AttrType = cpu_to_be16(RPRT_SYM_PORTNAME);
1933 len = lpfc_vport_symbolic_port_name(vport,
1934 ae->un.NodeSymName, sizeof(ae->un.NodeSymName));
1935 len += (len & 3) ? (4 - (len & 3)) : 4;
1936 ad->AttrLen = cpu_to_be16(FOURBYTES + len);
1937 pab->ab.EntryCnt++;
1938 size += FOURBYTES + len;
1939 if ((size + 4) > (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1940 goto port_out;
1941
1942 /* #10 Port attribute entry */
1943 ad = (struct lpfc_fdmi_attr_def *)
1944 ((uint8_t *)pab + size);
1945 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1946 ad->AttrType = cpu_to_be16(RPRT_PORT_TYPE);
1947 ae->un.PortState = 0;
1948 ad->AttrLen = cpu_to_be16(FOURBYTES + 4);
1949 pab->ab.EntryCnt++;
1950 size += FOURBYTES + 4;
1951 if ((size + 4) > (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1952 goto port_out;
1953
1954 /* #11 Port attribute entry */
1955 ad = (struct lpfc_fdmi_attr_def *)
1956 ((uint8_t *)pab + size);
1957 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1958 ad->AttrType = cpu_to_be16(RPRT_SUPPORTED_CLASS);
1959 ae->un.SupportClass =
1960 cpu_to_be32(FC_COS_CLASS2 | FC_COS_CLASS3);
1961 ad->AttrLen = cpu_to_be16(FOURBYTES + 4);
1962 pab->ab.EntryCnt++;
1963 size += FOURBYTES + 4;
1964 if ((size + sizeof(struct lpfc_name)) >
1965 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1966 goto port_out;
1967
1968 /* #12 Port attribute entry */
1969 ad = (struct lpfc_fdmi_attr_def *)
1970 ((uint8_t *)pab + size);
1971 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1972 memset(ae, 0, sizeof(struct lpfc_name));
1973 ad->AttrType = cpu_to_be16(RPRT_FABRICNAME);
1974 ad->AttrLen = cpu_to_be16(FOURBYTES
1975 + sizeof(struct lpfc_name));
1976 memcpy(&ae->un.FabricName, &vport->fabric_nodename,
1977 sizeof(struct lpfc_name));
1978 pab->ab.EntryCnt++;
1979 size += FOURBYTES + sizeof(struct lpfc_name);
1980 if ((size + LPFC_FDMI_MAX_AE_SIZE) >
1981 (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1982 goto port_out;
1983
1984 /* #13 Port attribute entry */
1985 ad = (struct lpfc_fdmi_attr_def *)
1986 ((uint8_t *)pab + size);
1987 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
1988 memset(ae, 0, sizeof(ae->un.FC4Types));
1989 ad->AttrType =
1990 cpu_to_be16(RPRT_ACTIVE_FC4_TYPES);
1991 ad->AttrLen = cpu_to_be16(FOURBYTES + 32);
1992 ae->un.FC4Types[0] = 0x40; /* Type 1 - ELS */
1993 ae->un.FC4Types[1] = 0x80; /* Type 8 - FCP */
1994 ae->un.FC4Types[4] = 0x80; /* Type 32 - CT */
1995 pab->ab.EntryCnt++;
1996 size += FOURBYTES + 32;
1997 if ((size + 4) > (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
1998 goto port_out;
1999
2000 /* #257 Port attribute entry */
2001 ad = (struct lpfc_fdmi_attr_def *)
2002 ((uint8_t *)pab + size);
2003 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
2004 ad->AttrType = cpu_to_be16(RPRT_PORT_STATE);
2005 ae->un.PortState = 0;
2006 ad->AttrLen = cpu_to_be16(FOURBYTES + 4);
2007 pab->ab.EntryCnt++;
2008 size += FOURBYTES + 4;
2009 if ((size + 4) > (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
2010 goto port_out;
2011
2012 /* #258 Port attribute entry */
2013 ad = (struct lpfc_fdmi_attr_def *)
2014 ((uint8_t *)pab + size);
2015 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
2016 ad->AttrType = cpu_to_be16(RPRT_DISC_PORT);
2017 ae->un.PortState = lpfc_find_map_node(vport);
2018 ae->un.PortState = cpu_to_be32(ae->un.PortState);
2019 ad->AttrLen = cpu_to_be16(FOURBYTES + 4);
2020 pab->ab.EntryCnt++;
2021 size += FOURBYTES + 4;
2022 if ((size + 4) > (LPFC_BPL_SIZE - LPFC_CT_PREAMBLE))
2023 goto port_out;
2024
2025 /* #259 Port attribute entry */
2026 ad = (struct lpfc_fdmi_attr_def *)
2027 ((uint8_t *)pab + size);
2028 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue;
2029 ad->AttrType = cpu_to_be16(RPRT_PORT_ID);
2030 ae->un.PortId = cpu_to_be32(vport->fc_myDID);
2031 ad->AttrLen = cpu_to_be16(FOURBYTES + 4);
2032 pab->ab.EntryCnt++;
2033 size += FOURBYTES + 4;
2034port_out:
2035 pab->ab.EntryCnt = cpu_to_be32(pab->ab.EntryCnt);
1677 /* Total size */ 2036 /* Total size */
1678 size = GID_REQUEST_SZ - 4 + size; 2037 size = GID_REQUEST_SZ - 4 + size;
1679 } 2038 }
1680 break; 2039 break;
1681 2040
2041 case SLI_MGMT_GHAT:
2042 case SLI_MGMT_GRPL:
2043 rsp_size = FC_MAX_NS_RSP;
1682 case SLI_MGMT_DHBA: 2044 case SLI_MGMT_DHBA:
1683 CtReq->CommandResponse.bits.CmdRsp = be16_to_cpu(SLI_MGMT_DHBA); 2045 case SLI_MGMT_DHAT:
1684 CtReq->CommandResponse.bits.Size = 0; 2046 pe = (struct lpfc_fdmi_port_entry *)&CtReq->un.PortID;
1685 pe = (PORT_ENTRY *) & CtReq->un.PortID; 2047 memcpy((uint8_t *)&pe->PortName,
1686 memcpy((uint8_t *) & pe->PortName, 2048 (uint8_t *)&vport->fc_sparam.portName,
1687 (uint8_t *) & vport->fc_sparam.portName, 2049 sizeof(struct lpfc_name));
1688 sizeof (struct lpfc_name)); 2050 size = GID_REQUEST_SZ - 4 + sizeof(struct lpfc_name);
1689 size = GID_REQUEST_SZ - 4 + sizeof (struct lpfc_name);
1690 break; 2051 break;
1691 2052
2053 case SLI_MGMT_GPAT:
2054 case SLI_MGMT_GPAS:
2055 rsp_size = FC_MAX_NS_RSP;
1692 case SLI_MGMT_DPRT: 2056 case SLI_MGMT_DPRT:
1693 CtReq->CommandResponse.bits.CmdRsp = be16_to_cpu(SLI_MGMT_DPRT); 2057 case SLI_MGMT_DPA:
1694 CtReq->CommandResponse.bits.Size = 0; 2058 pe = (struct lpfc_fdmi_port_entry *)&CtReq->un.PortID;
1695 pe = (PORT_ENTRY *) & CtReq->un.PortID; 2059 memcpy((uint8_t *)&pe->PortName,
1696 memcpy((uint8_t *) & pe->PortName, 2060 (uint8_t *)&vport->fc_sparam.portName,
1697 (uint8_t *) & vport->fc_sparam.portName, 2061 sizeof(struct lpfc_name));
1698 sizeof (struct lpfc_name)); 2062 size = GID_REQUEST_SZ - 4 + sizeof(struct lpfc_name);
1699 size = GID_REQUEST_SZ - 4 + sizeof (struct lpfc_name); 2063 break;
2064 case SLI_MGMT_GRHL:
2065 size = GID_REQUEST_SZ - 4;
1700 break; 2066 break;
2067 default:
2068 lpfc_printf_vlog(vport, KERN_WARNING, LOG_DISCOVERY,
2069 "0298 FDMI cmdcode x%x not supported\n",
2070 cmdcode);
2071 goto fdmi_cmd_free_bmpvirt;
1701 } 2072 }
2073 CtReq->CommandResponse.bits.Size = cpu_to_be16(rsp_size);
1702 2074
1703 bpl = (struct ulp_bde64 *) bmp->virt; 2075 bpl = (struct ulp_bde64 *)bmp->virt;
1704 bpl->addrHigh = le32_to_cpu(putPaddrHigh(mp->phys) ); 2076 bpl->addrHigh = le32_to_cpu(putPaddrHigh(mp->phys));
1705 bpl->addrLow = le32_to_cpu(putPaddrLow(mp->phys) ); 2077 bpl->addrLow = le32_to_cpu(putPaddrLow(mp->phys));
1706 bpl->tus.f.bdeFlags = 0; 2078 bpl->tus.f.bdeFlags = 0;
1707 bpl->tus.f.bdeSize = size; 2079 bpl->tus.f.bdeSize = size;
1708 bpl->tus.w = le32_to_cpu(bpl->tus.w);
1709
1710 cmpl = lpfc_cmpl_ct_cmd_fdmi;
1711 2080
1712 /* The lpfc_ct_cmd/lpfc_get_req shall increment ndlp reference count 2081 /*
2082 * The lpfc_ct_cmd/lpfc_get_req shall increment ndlp reference count
1713 * to hold ndlp reference for the corresponding callback function. 2083 * to hold ndlp reference for the corresponding callback function.
1714 */ 2084 */
1715 if (!lpfc_ct_cmd(vport, mp, bmp, ndlp, cmpl, FC_MAX_NS_RSP, 0)) 2085 if (!lpfc_ct_cmd(vport, mp, bmp, ndlp, cmpl, rsp_size, 0))
1716 return 0; 2086 return 0;
1717 2087
1718 /* Decrement ndlp reference count to release ndlp reference held 2088 /*
2089 * Decrement ndlp reference count to release ndlp reference held
1719 * for the failed command's callback function. 2090 * for the failed command's callback function.
1720 */ 2091 */
1721 lpfc_nlp_put(ndlp); 2092 lpfc_nlp_put(ndlp);
1722 2093
2094fdmi_cmd_free_bmpvirt:
1723 lpfc_mbuf_free(phba, bmp->virt, bmp->phys); 2095 lpfc_mbuf_free(phba, bmp->virt, bmp->phys);
1724fdmi_cmd_free_bmp: 2096fdmi_cmd_free_bmp:
1725 kfree(bmp); 2097 kfree(bmp);
diff --git a/drivers/scsi/lpfc/lpfc_debugfs.c b/drivers/scsi/lpfc/lpfc_debugfs.c
index 5633e7dadc08..513edcb0c2da 100644
--- a/drivers/scsi/lpfc/lpfc_debugfs.c
+++ b/drivers/scsi/lpfc/lpfc_debugfs.c
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2007-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2007-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
diff --git a/drivers/scsi/lpfc/lpfc_els.c b/drivers/scsi/lpfc/lpfc_els.c
index c66088d0fd2a..851e8efe364e 100644
--- a/drivers/scsi/lpfc/lpfc_els.c
+++ b/drivers/scsi/lpfc/lpfc_els.c
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
@@ -2243,8 +2243,7 @@ lpfc_adisc_done(struct lpfc_vport *vport)
2243 */ 2243 */
2244 if (vport->port_state < LPFC_VPORT_READY) { 2244 if (vport->port_state < LPFC_VPORT_READY) {
2245 /* If we get here, there is nothing to ADISC */ 2245 /* If we get here, there is nothing to ADISC */
2246 if (vport->port_type == LPFC_PHYSICAL_PORT) 2246 lpfc_issue_clear_la(phba, vport);
2247 lpfc_issue_clear_la(phba, vport);
2248 if (!(vport->fc_flag & FC_ABORT_DISCOVERY)) { 2247 if (!(vport->fc_flag & FC_ABORT_DISCOVERY)) {
2249 vport->num_disc_nodes = 0; 2248 vport->num_disc_nodes = 0;
2250 /* go thru NPR list, issue ELS PLOGIs */ 2249 /* go thru NPR list, issue ELS PLOGIs */
@@ -3338,7 +3337,11 @@ lpfc_els_retry(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3338 /* FLOGI retry policy */ 3337 /* FLOGI retry policy */
3339 retry = 1; 3338 retry = 1;
3340 /* retry FLOGI forever */ 3339 /* retry FLOGI forever */
3341 maxretry = 0; 3340 if (phba->link_flag != LS_LOOPBACK_MODE)
3341 maxretry = 0;
3342 else
3343 maxretry = 2;
3344
3342 if (cmdiocb->retry >= 100) 3345 if (cmdiocb->retry >= 100)
3343 delay = 5000; 3346 delay = 5000;
3344 else if (cmdiocb->retry >= 32) 3347 else if (cmdiocb->retry >= 32)
@@ -3701,6 +3704,11 @@ lpfc_mbx_cmpl_dflt_rpi(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
3701 kfree(mp); 3704 kfree(mp);
3702 mempool_free(pmb, phba->mbox_mem_pool); 3705 mempool_free(pmb, phba->mbox_mem_pool);
3703 if (ndlp) { 3706 if (ndlp) {
3707 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE,
3708 "0006 rpi%x DID:%x flg:%x %d map:%x %p\n",
3709 ndlp->nlp_rpi, ndlp->nlp_DID, ndlp->nlp_flag,
3710 atomic_read(&ndlp->kref.refcount),
3711 ndlp->nlp_usg_map, ndlp);
3704 if (NLP_CHK_NODE_ACT(ndlp)) { 3712 if (NLP_CHK_NODE_ACT(ndlp)) {
3705 lpfc_nlp_put(ndlp); 3713 lpfc_nlp_put(ndlp);
3706 /* This is the end of the default RPI cleanup logic for 3714 /* This is the end of the default RPI cleanup logic for
@@ -5198,7 +5206,6 @@ lpfc_els_rcv_flogi(struct lpfc_vport *vport, struct lpfc_iocbq *cmdiocb,
5198 port_state = vport->port_state; 5206 port_state = vport->port_state;
5199 vport->fc_flag |= FC_PT2PT; 5207 vport->fc_flag |= FC_PT2PT;
5200 vport->fc_flag &= ~(FC_FABRIC | FC_PUBLIC_LOOP); 5208 vport->fc_flag &= ~(FC_FABRIC | FC_PUBLIC_LOOP);
5201 vport->port_state = LPFC_FLOGI;
5202 spin_unlock_irq(shost->host_lock); 5209 spin_unlock_irq(shost->host_lock);
5203 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS, 5210 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS,
5204 "3311 Rcv Flogi PS x%x new PS x%x " 5211 "3311 Rcv Flogi PS x%x new PS x%x "
@@ -7173,7 +7180,7 @@ lpfc_do_scr_ns_plogi(struct lpfc_hba *phba, struct lpfc_vport *vport)
7173 return; 7180 return;
7174 } 7181 }
7175 7182
7176 if (vport->cfg_fdmi_on) { 7183 if (vport->cfg_fdmi_on & LPFC_FDMI_SUPPORT) {
7177 /* If this is the first time, allocate an ndlp and initialize 7184 /* If this is the first time, allocate an ndlp and initialize
7178 * it. Otherwise, make sure the node is enabled and then do the 7185 * it. Otherwise, make sure the node is enabled and then do the
7179 * login. 7186 * login.
diff --git a/drivers/scsi/lpfc/lpfc_hbadisc.c b/drivers/scsi/lpfc/lpfc_hbadisc.c
index 5452f1f4220e..2500f15d437f 100644
--- a/drivers/scsi/lpfc/lpfc_hbadisc.c
+++ b/drivers/scsi/lpfc/lpfc_hbadisc.c
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
@@ -3439,6 +3439,11 @@ lpfc_mbx_cmpl_reg_login(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
3439 pmb->context1 = NULL; 3439 pmb->context1 = NULL;
3440 pmb->context2 = NULL; 3440 pmb->context2 = NULL;
3441 3441
3442 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
3443 "0002 rpi:%x DID:%x flg:%x %d map:%x %p\n",
3444 ndlp->nlp_rpi, ndlp->nlp_DID, ndlp->nlp_flag,
3445 atomic_read(&ndlp->kref.refcount),
3446 ndlp->nlp_usg_map, ndlp);
3442 if (ndlp->nlp_flag & NLP_REG_LOGIN_SEND) 3447 if (ndlp->nlp_flag & NLP_REG_LOGIN_SEND)
3443 ndlp->nlp_flag &= ~NLP_REG_LOGIN_SEND; 3448 ndlp->nlp_flag &= ~NLP_REG_LOGIN_SEND;
3444 3449
@@ -3855,6 +3860,11 @@ out:
3855 ndlp->nlp_flag |= NLP_RPI_REGISTERED; 3860 ndlp->nlp_flag |= NLP_RPI_REGISTERED;
3856 ndlp->nlp_type |= NLP_FABRIC; 3861 ndlp->nlp_type |= NLP_FABRIC;
3857 lpfc_nlp_set_state(vport, ndlp, NLP_STE_UNMAPPED_NODE); 3862 lpfc_nlp_set_state(vport, ndlp, NLP_STE_UNMAPPED_NODE);
3863 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
3864 "0003 rpi:%x DID:%x flg:%x %d map%x %p\n",
3865 ndlp->nlp_rpi, ndlp->nlp_DID, ndlp->nlp_flag,
3866 atomic_read(&ndlp->kref.refcount),
3867 ndlp->nlp_usg_map, ndlp);
3858 3868
3859 if (vport->port_state < LPFC_VPORT_READY) { 3869 if (vport->port_state < LPFC_VPORT_READY) {
3860 /* Link up discovery requires Fabric registration. */ 3870 /* Link up discovery requires Fabric registration. */
@@ -4250,8 +4260,15 @@ lpfc_enable_node(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
4250 ndlp->active_rrqs_xri_bitmap = active_rrqs_xri_bitmap; 4260 ndlp->active_rrqs_xri_bitmap = active_rrqs_xri_bitmap;
4251 4261
4252 spin_unlock_irqrestore(&phba->ndlp_lock, flags); 4262 spin_unlock_irqrestore(&phba->ndlp_lock, flags);
4253 if (vport->phba->sli_rev == LPFC_SLI_REV4) 4263 if (vport->phba->sli_rev == LPFC_SLI_REV4) {
4254 ndlp->nlp_rpi = lpfc_sli4_alloc_rpi(vport->phba); 4264 ndlp->nlp_rpi = lpfc_sli4_alloc_rpi(vport->phba);
4265 lpfc_printf_vlog(vport, KERN_INFO, LOG_NODE,
4266 "0008 rpi:%x DID:%x flg:%x refcnt:%d "
4267 "map:%x %p\n", ndlp->nlp_rpi, ndlp->nlp_DID,
4268 ndlp->nlp_flag,
4269 atomic_read(&ndlp->kref.refcount),
4270 ndlp->nlp_usg_map, ndlp);
4271 }
4255 4272
4256 4273
4257 if (state != NLP_STE_UNUSED_NODE) 4274 if (state != NLP_STE_UNUSED_NODE)
@@ -4276,9 +4293,12 @@ lpfc_drop_node(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
4276 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) 4293 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
4277 return; 4294 return;
4278 lpfc_nlp_set_state(vport, ndlp, NLP_STE_UNUSED_NODE); 4295 lpfc_nlp_set_state(vport, ndlp, NLP_STE_UNUSED_NODE);
4279 if (vport->phba->sli_rev == LPFC_SLI_REV4) 4296 if (vport->phba->sli_rev == LPFC_SLI_REV4) {
4280 lpfc_cleanup_vports_rrqs(vport, ndlp); 4297 lpfc_cleanup_vports_rrqs(vport, ndlp);
4281 lpfc_nlp_put(ndlp); 4298 lpfc_unreg_rpi(vport, ndlp);
4299 } else {
4300 lpfc_nlp_put(ndlp);
4301 }
4282 return; 4302 return;
4283} 4303}
4284 4304
@@ -4515,7 +4535,17 @@ lpfc_unreg_rpi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
4515 mbox->context1 = ndlp; 4535 mbox->context1 = ndlp;
4516 mbox->mbox_cmpl = lpfc_nlp_logo_unreg; 4536 mbox->mbox_cmpl = lpfc_nlp_logo_unreg;
4517 } else { 4537 } else {
4518 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 4538 if (phba->sli_rev == LPFC_SLI_REV4 &&
4539 (!(vport->load_flag & FC_UNLOADING)) &&
4540 (bf_get(lpfc_sli_intf_if_type,
4541 &phba->sli4_hba.sli_intf) ==
4542 LPFC_SLI_INTF_IF_TYPE_2)) {
4543 mbox->context1 = lpfc_nlp_get(ndlp);
4544 mbox->mbox_cmpl =
4545 lpfc_sli4_unreg_rpi_cmpl_clr;
4546 } else
4547 mbox->mbox_cmpl =
4548 lpfc_sli_def_mbox_cmpl;
4519 } 4549 }
4520 4550
4521 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT); 4551 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
@@ -4741,6 +4771,11 @@ lpfc_nlp_remove(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
4741 /* For this case we need to cleanup the default rpi 4771 /* For this case we need to cleanup the default rpi
4742 * allocated by the firmware. 4772 * allocated by the firmware.
4743 */ 4773 */
4774 lpfc_printf_vlog(vport, KERN_INFO, LOG_NODE,
4775 "0005 rpi:%x DID:%x flg:%x %d map:%x %p\n",
4776 ndlp->nlp_rpi, ndlp->nlp_DID, ndlp->nlp_flag,
4777 atomic_read(&ndlp->kref.refcount),
4778 ndlp->nlp_usg_map, ndlp);
4744 if ((mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL)) 4779 if ((mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL))
4745 != NULL) { 4780 != NULL) {
4746 rc = lpfc_reg_rpi(phba, vport->vpi, ndlp->nlp_DID, 4781 rc = lpfc_reg_rpi(phba, vport->vpi, ndlp->nlp_DID,
@@ -5070,8 +5105,7 @@ lpfc_disc_start(struct lpfc_vport *vport)
5070 !(vport->fc_flag & FC_PT2PT) && 5105 !(vport->fc_flag & FC_PT2PT) &&
5071 !(vport->fc_flag & FC_RSCN_MODE) && 5106 !(vport->fc_flag & FC_RSCN_MODE) &&
5072 (phba->sli_rev < LPFC_SLI_REV4)) { 5107 (phba->sli_rev < LPFC_SLI_REV4)) {
5073 if (vport->port_type == LPFC_PHYSICAL_PORT) 5108 lpfc_issue_clear_la(phba, vport);
5074 lpfc_issue_clear_la(phba, vport);
5075 lpfc_issue_reg_vpi(phba, vport); 5109 lpfc_issue_reg_vpi(phba, vport);
5076 return; 5110 return;
5077 } 5111 }
@@ -5082,8 +5116,7 @@ lpfc_disc_start(struct lpfc_vport *vport)
5082 */ 5116 */
5083 if (vport->port_state < LPFC_VPORT_READY && !clear_la_pending) { 5117 if (vport->port_state < LPFC_VPORT_READY && !clear_la_pending) {
5084 /* If we get here, there is nothing to ADISC */ 5118 /* If we get here, there is nothing to ADISC */
5085 if (vport->port_type == LPFC_PHYSICAL_PORT) 5119 lpfc_issue_clear_la(phba, vport);
5086 lpfc_issue_clear_la(phba, vport);
5087 5120
5088 if (!(vport->fc_flag & FC_ABORT_DISCOVERY)) { 5121 if (!(vport->fc_flag & FC_ABORT_DISCOVERY)) {
5089 vport->num_disc_nodes = 0; 5122 vport->num_disc_nodes = 0;
@@ -5484,18 +5517,22 @@ lpfc_mbx_cmpl_fdmi_reg_login(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
5484 ndlp->nlp_flag |= NLP_RPI_REGISTERED; 5517 ndlp->nlp_flag |= NLP_RPI_REGISTERED;
5485 ndlp->nlp_type |= NLP_FABRIC; 5518 ndlp->nlp_type |= NLP_FABRIC;
5486 lpfc_nlp_set_state(vport, ndlp, NLP_STE_UNMAPPED_NODE); 5519 lpfc_nlp_set_state(vport, ndlp, NLP_STE_UNMAPPED_NODE);
5487 5520 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
5521 "0004 rpi:%x DID:%x flg:%x %d map:%x %p\n",
5522 ndlp->nlp_rpi, ndlp->nlp_DID, ndlp->nlp_flag,
5523 atomic_read(&ndlp->kref.refcount),
5524 ndlp->nlp_usg_map, ndlp);
5488 /* 5525 /*
5489 * Start issuing Fabric-Device Management Interface (FDMI) command to 5526 * Start issuing Fabric-Device Management Interface (FDMI) command to
5490 * 0xfffffa (FDMI well known port) or Delay issuing FDMI command if 5527 * 0xfffffa (FDMI well known port) or Delay issuing FDMI command if
5491 * fdmi-on=2 (supporting RPA/hostnmae) 5528 * fdmi-on=2 (supporting RPA/hostnmae)
5492 */ 5529 */
5493 5530
5494 if (vport->cfg_fdmi_on == 1) 5531 if (vport->cfg_fdmi_on & LPFC_FDMI_REG_DELAY)
5495 lpfc_fdmi_cmd(vport, ndlp, SLI_MGMT_DHBA);
5496 else
5497 mod_timer(&vport->fc_fdmitmo, 5532 mod_timer(&vport->fc_fdmitmo,
5498 jiffies + msecs_to_jiffies(1000 * 60)); 5533 jiffies + msecs_to_jiffies(1000 * 60));
5534 else
5535 lpfc_fdmi_cmd(vport, ndlp, SLI_MGMT_DHBA);
5499 5536
5500 /* decrement the node reference count held for this callback 5537 /* decrement the node reference count held for this callback
5501 * function. 5538 * function.
@@ -5650,6 +5687,13 @@ lpfc_nlp_init(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
5650 INIT_LIST_HEAD(&ndlp->nlp_listp); 5687 INIT_LIST_HEAD(&ndlp->nlp_listp);
5651 if (vport->phba->sli_rev == LPFC_SLI_REV4) { 5688 if (vport->phba->sli_rev == LPFC_SLI_REV4) {
5652 ndlp->nlp_rpi = lpfc_sli4_alloc_rpi(vport->phba); 5689 ndlp->nlp_rpi = lpfc_sli4_alloc_rpi(vport->phba);
5690 lpfc_printf_vlog(vport, KERN_INFO, LOG_NODE,
5691 "0007 rpi:%x DID:%x flg:%x refcnt:%d "
5692 "map:%x %p\n", ndlp->nlp_rpi, ndlp->nlp_DID,
5693 ndlp->nlp_flag,
5694 atomic_read(&ndlp->kref.refcount),
5695 ndlp->nlp_usg_map, ndlp);
5696
5653 ndlp->active_rrqs_xri_bitmap = 5697 ndlp->active_rrqs_xri_bitmap =
5654 mempool_alloc(vport->phba->active_rrq_pool, 5698 mempool_alloc(vport->phba->active_rrq_pool,
5655 GFP_KERNEL); 5699 GFP_KERNEL);
@@ -5684,9 +5728,9 @@ lpfc_nlp_release(struct kref *kref)
5684 5728
5685 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE, 5729 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE,
5686 "0279 lpfc_nlp_release: ndlp:x%p did %x " 5730 "0279 lpfc_nlp_release: ndlp:x%p did %x "
5687 "usgmap:x%x refcnt:%d\n", 5731 "usgmap:x%x refcnt:%d rpi:%x\n",
5688 (void *)ndlp, ndlp->nlp_DID, ndlp->nlp_usg_map, 5732 (void *)ndlp, ndlp->nlp_DID, ndlp->nlp_usg_map,
5689 atomic_read(&ndlp->kref.refcount)); 5733 atomic_read(&ndlp->kref.refcount), ndlp->nlp_rpi);
5690 5734
5691 /* remove ndlp from action. */ 5735 /* remove ndlp from action. */
5692 lpfc_nlp_remove(ndlp->vport, ndlp); 5736 lpfc_nlp_remove(ndlp->vport, ndlp);
diff --git a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h
index 236259252379..37beb9dc1311 100644
--- a/drivers/scsi/lpfc/lpfc_hw.h
+++ b/drivers/scsi/lpfc/lpfc_hw.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -107,6 +107,7 @@ struct lpfc_sli_ct_request {
107 uint8_t ReasonCode; 107 uint8_t ReasonCode;
108 uint8_t Explanation; 108 uint8_t Explanation;
109 uint8_t VendorUnique; 109 uint8_t VendorUnique;
110#define LPFC_CT_PREAMBLE 20 /* Size of CTReq + 4 up to here */
110 111
111 union { 112 union {
112 uint32_t PortID; 113 uint32_t PortID;
@@ -170,6 +171,8 @@ struct lpfc_sli_ct_request {
170 } un; 171 } un;
171}; 172};
172 173
174#define LPFC_MAX_CT_SIZE (60 * 4096)
175
173#define SLI_CT_REVISION 1 176#define SLI_CT_REVISION 1
174#define GID_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 177#define GID_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
175 sizeof(struct gid)) 178 sizeof(struct gid))
@@ -1007,78 +1010,45 @@ typedef struct _ELS_PKT { /* Structure is in Big Endian format */
1007 } un; 1010 } un;
1008} ELS_PKT; 1011} ELS_PKT;
1009 1012
1010/* 1013/******** FDMI ********/
1011 * FDMI
1012 * HBA MAnagement Operations Command Codes
1013 */
1014#define SLI_MGMT_GRHL 0x100 /* Get registered HBA list */
1015#define SLI_MGMT_GHAT 0x101 /* Get HBA attributes */
1016#define SLI_MGMT_GRPL 0x102 /* Get registered Port list */
1017#define SLI_MGMT_GPAT 0x110 /* Get Port attributes */
1018#define SLI_MGMT_RHBA 0x200 /* Register HBA */
1019#define SLI_MGMT_RHAT 0x201 /* Register HBA attributes */
1020#define SLI_MGMT_RPRT 0x210 /* Register Port */
1021#define SLI_MGMT_RPA 0x211 /* Register Port attributes */
1022#define SLI_MGMT_DHBA 0x300 /* De-register HBA */
1023#define SLI_MGMT_DPRT 0x310 /* De-register Port */
1024 1014
1025/* 1015/* lpfc_sli_ct_request defines the CT_IU preamble for FDMI commands */
1026 * Management Service Subtypes 1016#define SLI_CT_FDMI_Subtypes 0x10 /* Management Service Subtype */
1027 */
1028#define SLI_CT_FDMI_Subtypes 0x10
1029 1017
1030/* 1018/*
1031 * HBA Management Service Reject Code 1019 * Registered Port List Format
1032 */ 1020 */
1033#define REJECT_CODE 0x9 /* Unable to perform command request */ 1021struct lpfc_fdmi_reg_port_list {
1022 uint32_t EntryCnt;
1023 uint32_t pe; /* Variable-length array */
1024};
1034 1025
1035/*
1036 * HBA Management Service Reject Reason Code
1037 * Please refer to the Reason Codes above
1038 */
1039 1026
1040/* 1027/* Definitions for HBA / Port attribute entries */
1041 * HBA Attribute Types
1042 */
1043#define NODE_NAME 0x1
1044#define MANUFACTURER 0x2
1045#define SERIAL_NUMBER 0x3
1046#define MODEL 0x4
1047#define MODEL_DESCRIPTION 0x5
1048#define HARDWARE_VERSION 0x6
1049#define DRIVER_VERSION 0x7
1050#define OPTION_ROM_VERSION 0x8
1051#define FIRMWARE_VERSION 0x9
1052#define OS_NAME_VERSION 0xa
1053#define MAX_CT_PAYLOAD_LEN 0xb
1054 1028
1055/* 1029struct lpfc_fdmi_attr_def { /* Defined in TLV format */
1056 * Port Attrubute Types
1057 */
1058#define SUPPORTED_FC4_TYPES 0x1
1059#define SUPPORTED_SPEED 0x2
1060#define PORT_SPEED 0x3
1061#define MAX_FRAME_SIZE 0x4
1062#define OS_DEVICE_NAME 0x5
1063#define HOST_NAME 0x6
1064
1065union AttributesDef {
1066 /* Structure is in Big Endian format */ 1030 /* Structure is in Big Endian format */
1067 struct { 1031 uint32_t AttrType:16;
1068 uint32_t AttrType:16; 1032 uint32_t AttrLen:16;
1069 uint32_t AttrLen:16; 1033 uint32_t AttrValue; /* Marks start of Value (ATTRIBUTE_ENTRY) */
1070 } bits;
1071 uint32_t word;
1072}; 1034};
1073 1035
1074 1036
1075/* 1037/* Attribute Entry */
1076 * HBA Attribute Entry (8 - 260 bytes) 1038struct lpfc_fdmi_attr_entry {
1077 */
1078typedef struct {
1079 union AttributesDef ad;
1080 union { 1039 union {
1081 uint32_t VendorSpecific; 1040 uint32_t VendorSpecific;
1041 uint32_t SupportClass;
1042 uint32_t SupportSpeed;
1043 uint32_t PortSpeed;
1044 uint32_t MaxFrameSize;
1045 uint32_t MaxCTPayloadLen;
1046 uint32_t PortState;
1047 uint32_t PortId;
1048 struct lpfc_name NodeName;
1049 struct lpfc_name PortName;
1050 struct lpfc_name FabricName;
1051 uint8_t FC4Types[32];
1082 uint8_t Manufacturer[64]; 1052 uint8_t Manufacturer[64];
1083 uint8_t SerialNumber[64]; 1053 uint8_t SerialNumber[64];
1084 uint8_t Model[256]; 1054 uint8_t Model[256];
@@ -1087,97 +1057,115 @@ typedef struct {
1087 uint8_t DriverVersion[256]; 1057 uint8_t DriverVersion[256];
1088 uint8_t OptionROMVersion[256]; 1058 uint8_t OptionROMVersion[256];
1089 uint8_t FirmwareVersion[256]; 1059 uint8_t FirmwareVersion[256];
1090 struct lpfc_name NodeName; 1060 uint8_t OsHostName[256];
1091 uint8_t SupportFC4Types[32]; 1061 uint8_t NodeSymName[256];
1092 uint32_t SupportSpeed;
1093 uint32_t PortSpeed;
1094 uint32_t MaxFrameSize;
1095 uint8_t OsDeviceName[256]; 1062 uint8_t OsDeviceName[256];
1096 uint8_t OsNameVersion[256]; 1063 uint8_t OsNameVersion[256];
1097 uint32_t MaxCTPayloadLen;
1098 uint8_t HostName[256]; 1064 uint8_t HostName[256];
1099 } un; 1065 } un;
1100} ATTRIBUTE_ENTRY; 1066};
1067
1068#define LPFC_FDMI_MAX_AE_SIZE sizeof(struct lpfc_fdmi_attr_entry)
1101 1069
1102/* 1070/*
1103 * HBA Attribute Block 1071 * HBA Attribute Block
1104 */ 1072 */
1105typedef struct { 1073struct lpfc_fdmi_attr_block {
1106 uint32_t EntryCnt; /* Number of HBA attribute entries */ 1074 uint32_t EntryCnt; /* Number of HBA attribute entries */
1107 ATTRIBUTE_ENTRY Entry; /* Variable-length array */ 1075 struct lpfc_fdmi_attr_entry Entry; /* Variable-length array */
1108} ATTRIBUTE_BLOCK; 1076};
1109 1077
1110/* 1078/*
1111 * Port Entry 1079 * Port Entry
1112 */ 1080 */
1113typedef struct { 1081struct lpfc_fdmi_port_entry {
1114 struct lpfc_name PortName; 1082 struct lpfc_name PortName;
1115} PORT_ENTRY; 1083};
1116 1084
1117/* 1085/*
1118 * HBA Identifier 1086 * HBA Identifier
1119 */ 1087 */
1120typedef struct { 1088struct lpfc_fdmi_hba_ident {
1121 struct lpfc_name PortName; 1089 struct lpfc_name PortName;
1122} HBA_IDENTIFIER; 1090};
1123
1124/*
1125 * Registered Port List Format
1126 */
1127typedef struct {
1128 uint32_t EntryCnt;
1129 PORT_ENTRY pe; /* Variable-length array */
1130} REG_PORT_LIST;
1131 1091
1132/* 1092/*
1133 * Register HBA(RHBA) 1093 * Register HBA(RHBA)
1134 */ 1094 */
1135typedef struct { 1095struct lpfc_fdmi_reg_hba {
1136 HBA_IDENTIFIER hi; 1096 struct lpfc_fdmi_hba_ident hi;
1137 REG_PORT_LIST rpl; /* variable-length array */ 1097 struct lpfc_fdmi_reg_port_list rpl; /* variable-length array */
1138/* ATTRIBUTE_BLOCK ab; */ 1098/* struct lpfc_fdmi_attr_block ab; */
1139} REG_HBA; 1099};
1140 1100
1141/* 1101/*
1142 * Register HBA Attributes (RHAT) 1102 * Register HBA Attributes (RHAT)
1143 */ 1103 */
1144typedef struct { 1104struct lpfc_fdmi_reg_hbaattr {
1145 struct lpfc_name HBA_PortName; 1105 struct lpfc_name HBA_PortName;
1146 ATTRIBUTE_BLOCK ab; 1106 struct lpfc_fdmi_attr_block ab;
1147} REG_HBA_ATTRIBUTE; 1107};
1148 1108
1149/* 1109/*
1150 * Register Port Attributes (RPA) 1110 * Register Port Attributes (RPA)
1151 */ 1111 */
1152typedef struct { 1112struct lpfc_fdmi_reg_portattr {
1153 struct lpfc_name PortName; 1113 struct lpfc_name PortName;
1154 ATTRIBUTE_BLOCK ab; 1114 struct lpfc_fdmi_attr_block ab;
1155} REG_PORT_ATTRIBUTE; 1115};
1156 1116
1157/* 1117/*
1158 * Get Registered HBA List (GRHL) Accept Payload Format 1118 * HBA MAnagement Operations Command Codes
1159 */ 1119 */
1160typedef struct { 1120#define SLI_MGMT_GRHL 0x100 /* Get registered HBA list */
1161 uint32_t HBA__Entry_Cnt; /* Number of Registered HBA Identifiers */ 1121#define SLI_MGMT_GHAT 0x101 /* Get HBA attributes */
1162 struct lpfc_name HBA_PortName; /* Variable-length array */ 1122#define SLI_MGMT_GRPL 0x102 /* Get registered Port list */
1163} GRHL_ACC_PAYLOAD; 1123#define SLI_MGMT_GPAT 0x110 /* Get Port attributes */
1124#define SLI_MGMT_GPAS 0x120 /* Get Port Statistics */
1125#define SLI_MGMT_RHBA 0x200 /* Register HBA */
1126#define SLI_MGMT_RHAT 0x201 /* Register HBA attributes */
1127#define SLI_MGMT_RPRT 0x210 /* Register Port */
1128#define SLI_MGMT_RPA 0x211 /* Register Port attributes */
1129#define SLI_MGMT_DHBA 0x300 /* De-register HBA */
1130#define SLI_MGMT_DHAT 0x301 /* De-register HBA attributes */
1131#define SLI_MGMT_DPRT 0x310 /* De-register Port */
1132#define SLI_MGMT_DPA 0x311 /* De-register Port attributes */
1164 1133
1165/* 1134/*
1166 * Get Registered Port List (GRPL) Accept Payload Format 1135 * HBA Attribute Types
1167 */ 1136 */
1168typedef struct { 1137#define RHBA_NODENAME 0x1 /* 8 byte WWNN */
1169 uint32_t RPL_Entry_Cnt; /* Number of Registered Port Entries */ 1138#define RHBA_MANUFACTURER 0x2 /* 4 to 64 byte ASCII string */
1170 PORT_ENTRY Reg_Port_Entry[1]; /* Variable-length array */ 1139#define RHBA_SERIAL_NUMBER 0x3 /* 4 to 64 byte ASCII string */
1171} GRPL_ACC_PAYLOAD; 1140#define RHBA_MODEL 0x4 /* 4 to 256 byte ASCII string */
1141#define RHBA_MODEL_DESCRIPTION 0x5 /* 4 to 256 byte ASCII string */
1142#define RHBA_HARDWARE_VERSION 0x6 /* 4 to 256 byte ASCII string */
1143#define RHBA_DRIVER_VERSION 0x7 /* 4 to 256 byte ASCII string */
1144#define RHBA_OPTION_ROM_VERSION 0x8 /* 4 to 256 byte ASCII string */
1145#define RHBA_FIRMWARE_VERSION 0x9 /* 4 to 256 byte ASCII string */
1146#define RHBA_OS_NAME_VERSION 0xa /* 4 to 256 byte ASCII string */
1147#define RHBA_MAX_CT_PAYLOAD_LEN 0xb /* 32-bit unsigned int */
1148#define RHBA_SYM_NODENAME 0xc /* 4 to 256 byte ASCII string */
1172 1149
1173/* 1150/*
1174 * Get Port Attributes (GPAT) Accept Payload Format 1151 * Port Attrubute Types
1175 */ 1152 */
1176 1153#define RPRT_SUPPORTED_FC4_TYPES 0x1 /* 32 byte binary array */
1177typedef struct { 1154#define RPRT_SUPPORTED_SPEED 0x2 /* 32-bit unsigned int */
1178 ATTRIBUTE_BLOCK pab; 1155#define RPRT_PORT_SPEED 0x3 /* 32-bit unsigned int */
1179} GPAT_ACC_PAYLOAD; 1156#define RPRT_MAX_FRAME_SIZE 0x4 /* 32-bit unsigned int */
1180 1157#define RPRT_OS_DEVICE_NAME 0x5 /* 4 to 256 byte ASCII string */
1158#define RPRT_HOST_NAME 0x6 /* 4 to 256 byte ASCII string */
1159#define RPRT_NODENAME 0x7 /* 8 byte WWNN */
1160#define RPRT_PORTNAME 0x8 /* 8 byte WWNN */
1161#define RPRT_SYM_PORTNAME 0x9 /* 4 to 256 byte ASCII string */
1162#define RPRT_PORT_TYPE 0xa /* 32-bit unsigned int */
1163#define RPRT_SUPPORTED_CLASS 0xb /* 32-bit unsigned int */
1164#define RPRT_FABRICNAME 0xc /* 8 byte Fabric WWNN */
1165#define RPRT_ACTIVE_FC4_TYPES 0xd /* 32 byte binary array */
1166#define RPRT_PORT_STATE 0x101 /* 32-bit unsigned int */
1167#define RPRT_DISC_PORT 0x102 /* 32-bit unsigned int */
1168#define RPRT_PORT_ID 0x103 /* 32-bit unsigned int */
1181 1169
1182/* 1170/*
1183 * Begin HBA configuration parameters. 1171 * Begin HBA configuration parameters.
diff --git a/drivers/scsi/lpfc/lpfc_hw4.h b/drivers/scsi/lpfc/lpfc_hw4.h
index f432ec180cf8..1813c45946f4 100644
--- a/drivers/scsi/lpfc/lpfc_hw4.h
+++ b/drivers/scsi/lpfc/lpfc_hw4.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2009-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2009-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -3085,6 +3085,9 @@ struct lpfc_acqe_link {
3085#define LPFC_ASYNC_LINK_SPEED_100MBPS 0x2 3085#define LPFC_ASYNC_LINK_SPEED_100MBPS 0x2
3086#define LPFC_ASYNC_LINK_SPEED_1GBPS 0x3 3086#define LPFC_ASYNC_LINK_SPEED_1GBPS 0x3
3087#define LPFC_ASYNC_LINK_SPEED_10GBPS 0x4 3087#define LPFC_ASYNC_LINK_SPEED_10GBPS 0x4
3088#define LPFC_ASYNC_LINK_SPEED_20GBPS 0x5
3089#define LPFC_ASYNC_LINK_SPEED_25GBPS 0x6
3090#define LPFC_ASYNC_LINK_SPEED_40GBPS 0x7
3088#define lpfc_acqe_link_duplex_SHIFT 16 3091#define lpfc_acqe_link_duplex_SHIFT 16
3089#define lpfc_acqe_link_duplex_MASK 0x000000FF 3092#define lpfc_acqe_link_duplex_MASK 0x000000FF
3090#define lpfc_acqe_link_duplex_WORD word0 3093#define lpfc_acqe_link_duplex_WORD word0
@@ -3166,7 +3169,7 @@ struct lpfc_acqe_fc_la {
3166#define lpfc_acqe_fc_la_speed_SHIFT 24 3169#define lpfc_acqe_fc_la_speed_SHIFT 24
3167#define lpfc_acqe_fc_la_speed_MASK 0x000000FF 3170#define lpfc_acqe_fc_la_speed_MASK 0x000000FF
3168#define lpfc_acqe_fc_la_speed_WORD word0 3171#define lpfc_acqe_fc_la_speed_WORD word0
3169#define LPFC_FC_LA_SPEED_UNKOWN 0x0 3172#define LPFC_FC_LA_SPEED_UNKNOWN 0x0
3170#define LPFC_FC_LA_SPEED_1G 0x1 3173#define LPFC_FC_LA_SPEED_1G 0x1
3171#define LPFC_FC_LA_SPEED_2G 0x2 3174#define LPFC_FC_LA_SPEED_2G 0x2
3172#define LPFC_FC_LA_SPEED_4G 0x4 3175#define LPFC_FC_LA_SPEED_4G 0x4
@@ -3244,6 +3247,7 @@ struct lpfc_acqe_sli {
3244#define LPFC_SLI_EVENT_TYPE_NVLOG_POST 0x4 3247#define LPFC_SLI_EVENT_TYPE_NVLOG_POST 0x4
3245#define LPFC_SLI_EVENT_TYPE_DIAG_DUMP 0x5 3248#define LPFC_SLI_EVENT_TYPE_DIAG_DUMP 0x5
3246#define LPFC_SLI_EVENT_TYPE_MISCONFIGURED 0x9 3249#define LPFC_SLI_EVENT_TYPE_MISCONFIGURED 0x9
3250#define LPFC_SLI_EVENT_TYPE_REMOTE_DPORT 0xA
3247}; 3251};
3248 3252
3249/* 3253/*
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index 0b2c53af85c7..e8c8c1ecc1f5 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
@@ -1330,13 +1330,14 @@ lpfc_offline_eratt(struct lpfc_hba *phba)
1330void 1330void
1331lpfc_sli4_offline_eratt(struct lpfc_hba *phba) 1331lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1332{ 1332{
1333 spin_lock_irq(&phba->hbalock);
1334 phba->link_state = LPFC_HBA_ERROR;
1335 spin_unlock_irq(&phba->hbalock);
1336
1333 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1337 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1334 lpfc_offline(phba); 1338 lpfc_offline(phba);
1335 lpfc_sli4_brdreset(phba);
1336 lpfc_hba_down_post(phba); 1339 lpfc_hba_down_post(phba);
1337 lpfc_sli4_post_status_check(phba);
1338 lpfc_unblock_mgmt_io(phba); 1340 lpfc_unblock_mgmt_io(phba);
1339 phba->link_state = LPFC_HBA_ERROR;
1340} 1341}
1341 1342
1342/** 1343/**
@@ -1629,6 +1630,7 @@ lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1629 uint32_t uerrlo_reg, uemasklo_reg; 1630 uint32_t uerrlo_reg, uemasklo_reg;
1630 uint32_t pci_rd_rc1, pci_rd_rc2; 1631 uint32_t pci_rd_rc1, pci_rd_rc2;
1631 bool en_rn_msg = true; 1632 bool en_rn_msg = true;
1633 struct temp_event temp_event_data;
1632 int rc; 1634 int rc;
1633 1635
1634 /* If the pci channel is offline, ignore possible errors, since 1636 /* If the pci channel is offline, ignore possible errors, since
@@ -1636,9 +1638,6 @@ lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1636 */ 1638 */
1637 if (pci_channel_offline(phba->pcidev)) 1639 if (pci_channel_offline(phba->pcidev))
1638 return; 1640 return;
1639 /* If resets are disabled then leave the HBA alone and return */
1640 if (!phba->cfg_enable_hba_reset)
1641 return;
1642 1641
1643 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 1642 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1644 switch (if_type) { 1643 switch (if_type) {
@@ -1654,6 +1653,7 @@ lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1654 return; 1653 return;
1655 lpfc_sli4_offline_eratt(phba); 1654 lpfc_sli4_offline_eratt(phba);
1656 break; 1655 break;
1656
1657 case LPFC_SLI_INTF_IF_TYPE_2: 1657 case LPFC_SLI_INTF_IF_TYPE_2:
1658 pci_rd_rc1 = lpfc_readl( 1658 pci_rd_rc1 = lpfc_readl(
1659 phba->sli4_hba.u.if_type2.STATUSregaddr, 1659 phba->sli4_hba.u.if_type2.STATUSregaddr,
@@ -1668,15 +1668,27 @@ lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1668 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr); 1668 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1669 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr); 1669 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
1670 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) { 1670 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
1671 /* TODO: Register for Overtemp async events. */
1672 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 1671 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1673 "2889 Port Overtemperature event, " 1672 "2889 Port Overtemperature event, "
1674 "taking port offline\n"); 1673 "taking port offline Data: x%x x%x\n",
1674 reg_err1, reg_err2);
1675
1676 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1677 temp_event_data.event_code = LPFC_CRIT_TEMP;
1678 temp_event_data.data = 0xFFFFFFFF;
1679
1680 shost = lpfc_shost_from_vport(phba->pport);
1681 fc_host_post_vendor_event(shost, fc_get_event_number(),
1682 sizeof(temp_event_data),
1683 (char *)&temp_event_data,
1684 SCSI_NL_VID_TYPE_PCI
1685 | PCI_VENDOR_ID_EMULEX);
1686
1675 spin_lock_irq(&phba->hbalock); 1687 spin_lock_irq(&phba->hbalock);
1676 phba->over_temp_state = HBA_OVER_TEMP; 1688 phba->over_temp_state = HBA_OVER_TEMP;
1677 spin_unlock_irq(&phba->hbalock); 1689 spin_unlock_irq(&phba->hbalock);
1678 lpfc_sli4_offline_eratt(phba); 1690 lpfc_sli4_offline_eratt(phba);
1679 break; 1691 return;
1680 } 1692 }
1681 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 1693 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1682 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) { 1694 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
@@ -1693,6 +1705,10 @@ lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1693 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 1705 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1694 "3145 Port Down: Provisioning\n"); 1706 "3145 Port Down: Provisioning\n");
1695 1707
1708 /* If resets are disabled then leave the HBA alone and return */
1709 if (!phba->cfg_enable_hba_reset)
1710 return;
1711
1696 /* Check port status register for function reset */ 1712 /* Check port status register for function reset */
1697 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT, 1713 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1698 en_rn_msg); 1714 en_rn_msg);
@@ -2759,9 +2775,19 @@ lpfc_sli4_node_prep(struct lpfc_hba *phba)
2759 list_for_each_entry_safe(ndlp, next_ndlp, 2775 list_for_each_entry_safe(ndlp, next_ndlp,
2760 &vports[i]->fc_nodes, 2776 &vports[i]->fc_nodes,
2761 nlp_listp) { 2777 nlp_listp) {
2762 if (NLP_CHK_NODE_ACT(ndlp)) 2778 if (NLP_CHK_NODE_ACT(ndlp)) {
2763 ndlp->nlp_rpi = 2779 ndlp->nlp_rpi =
2764 lpfc_sli4_alloc_rpi(phba); 2780 lpfc_sli4_alloc_rpi(phba);
2781 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
2782 LOG_NODE,
2783 "0009 rpi:%x DID:%x "
2784 "flg:%x map:%x %p\n",
2785 ndlp->nlp_rpi,
2786 ndlp->nlp_DID,
2787 ndlp->nlp_flag,
2788 ndlp->nlp_usg_map,
2789 ndlp);
2790 }
2765 } 2791 }
2766 } 2792 }
2767 } 2793 }
@@ -2925,8 +2951,18 @@ lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
2925 * RPI. Get a new RPI when the adapter port 2951 * RPI. Get a new RPI when the adapter port
2926 * comes back online. 2952 * comes back online.
2927 */ 2953 */
2928 if (phba->sli_rev == LPFC_SLI_REV4) 2954 if (phba->sli_rev == LPFC_SLI_REV4) {
2955 lpfc_printf_vlog(ndlp->vport,
2956 KERN_INFO, LOG_NODE,
2957 "0011 lpfc_offline: "
2958 "ndlp:x%p did %x "
2959 "usgmap:x%x rpi:%x\n",
2960 ndlp, ndlp->nlp_DID,
2961 ndlp->nlp_usg_map,
2962 ndlp->nlp_rpi);
2963
2929 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi); 2964 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
2965 }
2930 lpfc_unreg_rpi(vports[i], ndlp); 2966 lpfc_unreg_rpi(vports[i], ndlp);
2931 } 2967 }
2932 } 2968 }
@@ -3241,12 +3277,17 @@ lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
3241 struct Scsi_Host *shost; 3277 struct Scsi_Host *shost;
3242 int error = 0; 3278 int error = 0;
3243 3279
3244 if (dev != &phba->pcidev->dev) 3280 if (dev != &phba->pcidev->dev) {
3245 shost = scsi_host_alloc(&lpfc_vport_template, 3281 shost = scsi_host_alloc(&lpfc_vport_template,
3246 sizeof(struct lpfc_vport)); 3282 sizeof(struct lpfc_vport));
3247 else 3283 } else {
3248 shost = scsi_host_alloc(&lpfc_template, 3284 if (phba->sli_rev == LPFC_SLI_REV4)
3285 shost = scsi_host_alloc(&lpfc_template,
3249 sizeof(struct lpfc_vport)); 3286 sizeof(struct lpfc_vport));
3287 else
3288 shost = scsi_host_alloc(&lpfc_template_s3,
3289 sizeof(struct lpfc_vport));
3290 }
3250 if (!shost) 3291 if (!shost)
3251 goto out; 3292 goto out;
3252 3293
@@ -3685,6 +3726,11 @@ lpfc_sli4_parse_latt_link_speed(struct lpfc_hba *phba,
3685 case LPFC_ASYNC_LINK_SPEED_10GBPS: 3726 case LPFC_ASYNC_LINK_SPEED_10GBPS:
3686 link_speed = LPFC_LINK_SPEED_10GHZ; 3727 link_speed = LPFC_LINK_SPEED_10GHZ;
3687 break; 3728 break;
3729 case LPFC_ASYNC_LINK_SPEED_20GBPS:
3730 case LPFC_ASYNC_LINK_SPEED_25GBPS:
3731 case LPFC_ASYNC_LINK_SPEED_40GBPS:
3732 link_speed = LPFC_LINK_SPEED_UNKNOWN;
3733 break;
3688 default: 3734 default:
3689 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 3735 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3690 "0483 Invalid link-attention link speed: x%x\n", 3736 "0483 Invalid link-attention link speed: x%x\n",
@@ -3756,46 +3802,55 @@ lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
3756 switch (evt_code) { 3802 switch (evt_code) {
3757 case LPFC_TRAILER_CODE_LINK: 3803 case LPFC_TRAILER_CODE_LINK:
3758 switch (speed_code) { 3804 switch (speed_code) {
3759 case LPFC_EVT_CODE_LINK_NO_LINK: 3805 case LPFC_ASYNC_LINK_SPEED_ZERO:
3760 port_speed = 0; 3806 port_speed = 0;
3761 break; 3807 break;
3762 case LPFC_EVT_CODE_LINK_10_MBIT: 3808 case LPFC_ASYNC_LINK_SPEED_10MBPS:
3763 port_speed = 10; 3809 port_speed = 10;
3764 break; 3810 break;
3765 case LPFC_EVT_CODE_LINK_100_MBIT: 3811 case LPFC_ASYNC_LINK_SPEED_100MBPS:
3766 port_speed = 100; 3812 port_speed = 100;
3767 break; 3813 break;
3768 case LPFC_EVT_CODE_LINK_1_GBIT: 3814 case LPFC_ASYNC_LINK_SPEED_1GBPS:
3769 port_speed = 1000; 3815 port_speed = 1000;
3770 break; 3816 break;
3771 case LPFC_EVT_CODE_LINK_10_GBIT: 3817 case LPFC_ASYNC_LINK_SPEED_10GBPS:
3772 port_speed = 10000; 3818 port_speed = 10000;
3773 break; 3819 break;
3820 case LPFC_ASYNC_LINK_SPEED_20GBPS:
3821 port_speed = 20000;
3822 break;
3823 case LPFC_ASYNC_LINK_SPEED_25GBPS:
3824 port_speed = 25000;
3825 break;
3826 case LPFC_ASYNC_LINK_SPEED_40GBPS:
3827 port_speed = 40000;
3828 break;
3774 default: 3829 default:
3775 port_speed = 0; 3830 port_speed = 0;
3776 } 3831 }
3777 break; 3832 break;
3778 case LPFC_TRAILER_CODE_FC: 3833 case LPFC_TRAILER_CODE_FC:
3779 switch (speed_code) { 3834 switch (speed_code) {
3780 case LPFC_EVT_CODE_FC_NO_LINK: 3835 case LPFC_FC_LA_SPEED_UNKNOWN:
3781 port_speed = 0; 3836 port_speed = 0;
3782 break; 3837 break;
3783 case LPFC_EVT_CODE_FC_1_GBAUD: 3838 case LPFC_FC_LA_SPEED_1G:
3784 port_speed = 1000; 3839 port_speed = 1000;
3785 break; 3840 break;
3786 case LPFC_EVT_CODE_FC_2_GBAUD: 3841 case LPFC_FC_LA_SPEED_2G:
3787 port_speed = 2000; 3842 port_speed = 2000;
3788 break; 3843 break;
3789 case LPFC_EVT_CODE_FC_4_GBAUD: 3844 case LPFC_FC_LA_SPEED_4G:
3790 port_speed = 4000; 3845 port_speed = 4000;
3791 break; 3846 break;
3792 case LPFC_EVT_CODE_FC_8_GBAUD: 3847 case LPFC_FC_LA_SPEED_8G:
3793 port_speed = 8000; 3848 port_speed = 8000;
3794 break; 3849 break;
3795 case LPFC_EVT_CODE_FC_10_GBAUD: 3850 case LPFC_FC_LA_SPEED_10G:
3796 port_speed = 10000; 3851 port_speed = 10000;
3797 break; 3852 break;
3798 case LPFC_EVT_CODE_FC_16_GBAUD: 3853 case LPFC_FC_LA_SPEED_16G:
3799 port_speed = 16000; 3854 port_speed = 16000;
3800 break; 3855 break;
3801 default: 3856 default:
@@ -4044,18 +4099,21 @@ lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4044 char port_name; 4099 char port_name;
4045 char message[128]; 4100 char message[128];
4046 uint8_t status; 4101 uint8_t status;
4102 uint8_t evt_type;
4103 struct temp_event temp_event_data;
4047 struct lpfc_acqe_misconfigured_event *misconfigured; 4104 struct lpfc_acqe_misconfigured_event *misconfigured;
4105 struct Scsi_Host *shost;
4106
4107 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4048 4108
4049 /* special case misconfigured event as it contains data for all ports */ 4109 /* Special case Lancer */
4050 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) != 4110 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
4051 LPFC_SLI_INTF_IF_TYPE_2) || 4111 LPFC_SLI_INTF_IF_TYPE_2) {
4052 (bf_get(lpfc_trailer_type, acqe_sli) !=
4053 LPFC_SLI_EVENT_TYPE_MISCONFIGURED)) {
4054 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4112 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4055 "2901 Async SLI event - Event Data1:x%08x Event Data2:" 4113 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4056 "x%08x SLI Event Type:%d\n", 4114 "x%08x SLI Event Type:%d\n",
4057 acqe_sli->event_data1, acqe_sli->event_data2, 4115 acqe_sli->event_data1, acqe_sli->event_data2,
4058 bf_get(lpfc_trailer_type, acqe_sli)); 4116 evt_type);
4059 return; 4117 return;
4060 } 4118 }
4061 4119
@@ -4063,58 +4121,107 @@ lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4063 if (port_name == 0x00) 4121 if (port_name == 0x00)
4064 port_name = '?'; /* get port name is empty */ 4122 port_name = '?'; /* get port name is empty */
4065 4123
4066 misconfigured = (struct lpfc_acqe_misconfigured_event *) 4124 switch (evt_type) {
4125 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4126 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4127 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4128 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4129
4130 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4131 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4132 acqe_sli->event_data1, port_name);
4133
4134 shost = lpfc_shost_from_vport(phba->pport);
4135 fc_host_post_vendor_event(shost, fc_get_event_number(),
4136 sizeof(temp_event_data),
4137 (char *)&temp_event_data,
4138 SCSI_NL_VID_TYPE_PCI
4139 | PCI_VENDOR_ID_EMULEX);
4140 break;
4141 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4142 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4143 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4144 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4145
4146 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4147 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4148 acqe_sli->event_data1, port_name);
4149
4150 shost = lpfc_shost_from_vport(phba->pport);
4151 fc_host_post_vendor_event(shost, fc_get_event_number(),
4152 sizeof(temp_event_data),
4153 (char *)&temp_event_data,
4154 SCSI_NL_VID_TYPE_PCI
4155 | PCI_VENDOR_ID_EMULEX);
4156 break;
4157 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4158 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4067 &acqe_sli->event_data1; 4159 &acqe_sli->event_data1;
4068 4160
4069 /* fetch the status for this port */ 4161 /* fetch the status for this port */
4070 switch (phba->sli4_hba.lnk_info.lnk_no) { 4162 switch (phba->sli4_hba.lnk_info.lnk_no) {
4071 case LPFC_LINK_NUMBER_0: 4163 case LPFC_LINK_NUMBER_0:
4072 status = bf_get(lpfc_sli_misconfigured_port0, 4164 status = bf_get(lpfc_sli_misconfigured_port0,
4073 &misconfigured->theEvent); 4165 &misconfigured->theEvent);
4074 break; 4166 break;
4075 case LPFC_LINK_NUMBER_1: 4167 case LPFC_LINK_NUMBER_1:
4076 status = bf_get(lpfc_sli_misconfigured_port1, 4168 status = bf_get(lpfc_sli_misconfigured_port1,
4077 &misconfigured->theEvent); 4169 &misconfigured->theEvent);
4078 break; 4170 break;
4079 case LPFC_LINK_NUMBER_2: 4171 case LPFC_LINK_NUMBER_2:
4080 status = bf_get(lpfc_sli_misconfigured_port2, 4172 status = bf_get(lpfc_sli_misconfigured_port2,
4081 &misconfigured->theEvent); 4173 &misconfigured->theEvent);
4082 break; 4174 break;
4083 case LPFC_LINK_NUMBER_3: 4175 case LPFC_LINK_NUMBER_3:
4084 status = bf_get(lpfc_sli_misconfigured_port3, 4176 status = bf_get(lpfc_sli_misconfigured_port3,
4085 &misconfigured->theEvent); 4177 &misconfigured->theEvent);
4086 break; 4178 break;
4087 default: 4179 default:
4088 status = ~LPFC_SLI_EVENT_STATUS_VALID; 4180 status = ~LPFC_SLI_EVENT_STATUS_VALID;
4089 break; 4181 break;
4090 } 4182 }
4091 4183
4092 switch (status) { 4184 switch (status) {
4093 case LPFC_SLI_EVENT_STATUS_VALID: 4185 case LPFC_SLI_EVENT_STATUS_VALID:
4094 return; /* no message if the sfp is okay */ 4186 return; /* no message if the sfp is okay */
4095 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT: 4187 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4096 sprintf(message, "Optics faulted/incorrectly installed/not " \ 4188 sprintf(message, "Optics faulted/incorrectly "
4097 "installed - Reseat optics, if issue not " 4189 "installed/not installed - Reseat optics, "
4098 "resolved, replace."); 4190 "if issue not resolved, replace.");
4099 break; 4191 break;
4100 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE: 4192 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4101 sprintf(message, 4193 sprintf(message,
4102 "Optics of two types installed - Remove one optic or " \ 4194 "Optics of two types installed - Remove one "
4103 "install matching pair of optics."); 4195 "optic or install matching pair of optics.");
4104 break; 4196 break;
4105 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED: 4197 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4106 sprintf(message, "Incompatible optics - Replace with " \ 4198 sprintf(message, "Incompatible optics - Replace with "
4107 "compatible optics for card to function."); 4199 "compatible optics for card to function.");
4200 break;
4201 default:
4202 /* firmware is reporting a status we don't know about */
4203 sprintf(message, "Unknown event status x%02x", status);
4204 break;
4205 }
4206
4207 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4208 "3176 Misconfigured Physical Port - "
4209 "Port Name %c %s\n", port_name, message);
4210 break;
4211 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4212 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4213 "3192 Remote DPort Test Initiated - "
4214 "Event Data1:x%08x Event Data2: x%08x\n",
4215 acqe_sli->event_data1, acqe_sli->event_data2);
4108 break; 4216 break;
4109 default: 4217 default:
4110 /* firmware is reporting a status we don't know about */ 4218 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4111 sprintf(message, "Unknown event status x%02x", status); 4219 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4220 "x%08x SLI Event Type:%d\n",
4221 acqe_sli->event_data1, acqe_sli->event_data2,
4222 evt_type);
4112 break; 4223 break;
4113 } 4224 }
4114
4115 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4116 "3176 Misconfigured Physical Port - "
4117 "Port Name %c %s\n", port_name, message);
4118} 4225}
4119 4226
4120/** 4227/**
@@ -5183,6 +5290,7 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
5183 rc = lpfc_pci_function_reset(phba); 5290 rc = lpfc_pci_function_reset(phba);
5184 if (unlikely(rc)) 5291 if (unlikely(rc))
5185 return -ENODEV; 5292 return -ENODEV;
5293 phba->temp_sensor_support = 1;
5186 } 5294 }
5187 5295
5188 /* Create the bootstrap mailbox command */ 5296 /* Create the bootstrap mailbox command */
@@ -7647,6 +7755,14 @@ lpfc_sli4_queue_setup(struct lpfc_hba *phba)
7647 goto out_destroy_els_rq; 7755 goto out_destroy_els_rq;
7648 } 7756 }
7649 } 7757 }
7758
7759 /*
7760 * Configure EQ delay multipier for interrupt coalescing using
7761 * MODIFY_EQ_DELAY for all EQs created, LPFC_MAX_EQ_DELAY at a time.
7762 */
7763 for (fcp_eqidx = 0; fcp_eqidx < phba->cfg_fcp_io_channel;
7764 fcp_eqidx += LPFC_MAX_EQ_DELAY)
7765 lpfc_modify_fcp_eq_delay(phba, fcp_eqidx);
7650 return 0; 7766 return 0;
7651 7767
7652out_destroy_els_rq: 7768out_destroy_els_rq:
@@ -7953,7 +8069,7 @@ wait:
7953 * up to 30 seconds. If the port doesn't respond, treat 8069 * up to 30 seconds. If the port doesn't respond, treat
7954 * it as an error. 8070 * it as an error.
7955 */ 8071 */
7956 for (rdy_chk = 0; rdy_chk < 3000; rdy_chk++) { 8072 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
7957 if (lpfc_readl(phba->sli4_hba.u.if_type2. 8073 if (lpfc_readl(phba->sli4_hba.u.if_type2.
7958 STATUSregaddr, &reg_data.word0)) { 8074 STATUSregaddr, &reg_data.word0)) {
7959 rc = -ENODEV; 8075 rc = -ENODEV;
diff --git a/drivers/scsi/lpfc/lpfc_mbox.c b/drivers/scsi/lpfc/lpfc_mbox.c
index 06241f590c1e..816f596cda60 100644
--- a/drivers/scsi/lpfc/lpfc_mbox.c
+++ b/drivers/scsi/lpfc/lpfc_mbox.c
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2013 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
diff --git a/drivers/scsi/lpfc/lpfc_nportdisc.c b/drivers/scsi/lpfc/lpfc_nportdisc.c
index 5cc1103d811e..4cb9882af157 100644
--- a/drivers/scsi/lpfc/lpfc_nportdisc.c
+++ b/drivers/scsi/lpfc/lpfc_nportdisc.c
@@ -1,7 +1,7 @@
1 /******************************************************************* 1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2013 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
@@ -276,6 +276,7 @@ lpfc_rcv_plogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
276 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 276 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
277 struct lpfc_hba *phba = vport->phba; 277 struct lpfc_hba *phba = vport->phba;
278 struct lpfc_dmabuf *pcmd; 278 struct lpfc_dmabuf *pcmd;
279 uint64_t nlp_portwwn = 0;
279 uint32_t *lp; 280 uint32_t *lp;
280 IOCB_t *icmd; 281 IOCB_t *icmd;
281 struct serv_parm *sp; 282 struct serv_parm *sp;
@@ -332,6 +333,8 @@ lpfc_rcv_plogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
332 NULL); 333 NULL);
333 return 0; 334 return 0;
334 } 335 }
336
337 nlp_portwwn = wwn_to_u64(ndlp->nlp_portname.u.wwn);
335 if ((lpfc_check_sparm(vport, ndlp, sp, CLASS3, 0) == 0)) { 338 if ((lpfc_check_sparm(vport, ndlp, sp, CLASS3, 0) == 0)) {
336 /* Reject this request because invalid parameters */ 339 /* Reject this request because invalid parameters */
337 stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC; 340 stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
@@ -367,7 +370,7 @@ lpfc_rcv_plogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
367 ndlp->nlp_maxframe = 370 ndlp->nlp_maxframe =
368 ((sp->cmn.bbRcvSizeMsb & 0x0F) << 8) | sp->cmn.bbRcvSizeLsb; 371 ((sp->cmn.bbRcvSizeMsb & 0x0F) << 8) | sp->cmn.bbRcvSizeLsb;
369 372
370 /* no need to reg_login if we are already in one of these states */ 373 /* if already logged in, do implicit logout */
371 switch (ndlp->nlp_state) { 374 switch (ndlp->nlp_state) {
372 case NLP_STE_NPR_NODE: 375 case NLP_STE_NPR_NODE:
373 if (!(ndlp->nlp_flag & NLP_NPR_ADISC)) 376 if (!(ndlp->nlp_flag & NLP_NPR_ADISC))
@@ -376,8 +379,26 @@ lpfc_rcv_plogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
376 case NLP_STE_PRLI_ISSUE: 379 case NLP_STE_PRLI_ISSUE:
377 case NLP_STE_UNMAPPED_NODE: 380 case NLP_STE_UNMAPPED_NODE:
378 case NLP_STE_MAPPED_NODE: 381 case NLP_STE_MAPPED_NODE:
379 lpfc_els_rsp_acc(vport, ELS_CMD_PLOGI, cmdiocb, ndlp, NULL); 382 /* lpfc_plogi_confirm_nport skips fabric did, handle it here */
380 return 1; 383 if (!(ndlp->nlp_type & NLP_FABRIC)) {
384 lpfc_els_rsp_acc(vport, ELS_CMD_PLOGI, cmdiocb,
385 ndlp, NULL);
386 return 1;
387 }
388 if (nlp_portwwn != 0 &&
389 nlp_portwwn != wwn_to_u64(sp->portName.u.wwn))
390 lpfc_printf_vlog(vport, KERN_ERR, LOG_ELS,
391 "0143 PLOGI recv'd from DID: x%x "
392 "WWPN changed: old %llx new %llx\n",
393 ndlp->nlp_DID,
394 (unsigned long long)nlp_portwwn,
395 (unsigned long long)
396 wwn_to_u64(sp->portName.u.wwn));
397
398 ndlp->nlp_prev_state = ndlp->nlp_state;
399 /* rport needs to be unregistered first */
400 lpfc_nlp_set_state(vport, ndlp, NLP_STE_NPR_NODE);
401 break;
381 } 402 }
382 403
383 /* Check for Nport to NPort pt2pt protocol */ 404 /* Check for Nport to NPort pt2pt protocol */
diff --git a/drivers/scsi/lpfc/lpfc_scsi.c b/drivers/scsi/lpfc/lpfc_scsi.c
index 4f9222eb2266..cb73cf9e9ba5 100644
--- a/drivers/scsi/lpfc/lpfc_scsi.c
+++ b/drivers/scsi/lpfc/lpfc_scsi.c
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
@@ -1130,6 +1130,25 @@ lpfc_release_scsi_buf(struct lpfc_hba *phba, struct lpfc_scsi_buf *psb)
1130} 1130}
1131 1131
1132/** 1132/**
1133 * lpfc_fcpcmd_to_iocb - copy the fcp_cmd data into the IOCB
1134 * @data: A pointer to the immediate command data portion of the IOCB.
1135 * @fcp_cmnd: The FCP Command that is provided by the SCSI layer.
1136 *
1137 * The routine copies the entire FCP command from @fcp_cmnd to @data while
1138 * byte swapping the data to big endian format for transmission on the wire.
1139 **/
1140static void
1141lpfc_fcpcmd_to_iocb(uint8_t *data, struct fcp_cmnd *fcp_cmnd)
1142{
1143 int i, j;
1144
1145 for (i = 0, j = 0; i < sizeof(struct fcp_cmnd);
1146 i += sizeof(uint32_t), j++) {
1147 ((uint32_t *)data)[j] = cpu_to_be32(((uint32_t *)fcp_cmnd)[j]);
1148 }
1149}
1150
1151/**
1133 * lpfc_scsi_prep_dma_buf_s3 - DMA mapping for scsi buffer to SLI3 IF spec 1152 * lpfc_scsi_prep_dma_buf_s3 - DMA mapping for scsi buffer to SLI3 IF spec
1134 * @phba: The Hba for which this call is being executed. 1153 * @phba: The Hba for which this call is being executed.
1135 * @lpfc_cmd: The scsi buffer which is going to be mapped. 1154 * @lpfc_cmd: The scsi buffer which is going to be mapped.
@@ -1264,6 +1283,7 @@ lpfc_scsi_prep_dma_buf_s3(struct lpfc_hba *phba, struct lpfc_scsi_buf *lpfc_cmd)
1264 * we need to set word 4 of IOCB here 1283 * we need to set word 4 of IOCB here
1265 */ 1284 */
1266 iocb_cmd->un.fcpi.fcpi_parm = scsi_bufflen(scsi_cmnd); 1285 iocb_cmd->un.fcpi.fcpi_parm = scsi_bufflen(scsi_cmnd);
1286 lpfc_fcpcmd_to_iocb(iocb_cmd->unsli3.fcp_ext.icd, fcp_cmnd);
1267 return 0; 1287 return 0;
1268} 1288}
1269 1289
@@ -4127,24 +4147,6 @@ lpfc_scsi_cmd_iocb_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *pIocbIn,
4127} 4147}
4128 4148
4129/** 4149/**
4130 * lpfc_fcpcmd_to_iocb - copy the fcp_cmd data into the IOCB
4131 * @data: A pointer to the immediate command data portion of the IOCB.
4132 * @fcp_cmnd: The FCP Command that is provided by the SCSI layer.
4133 *
4134 * The routine copies the entire FCP command from @fcp_cmnd to @data while
4135 * byte swapping the data to big endian format for transmission on the wire.
4136 **/
4137static void
4138lpfc_fcpcmd_to_iocb(uint8_t *data, struct fcp_cmnd *fcp_cmnd)
4139{
4140 int i, j;
4141 for (i = 0, j = 0; i < sizeof(struct fcp_cmnd);
4142 i += sizeof(uint32_t), j++) {
4143 ((uint32_t *)data)[j] = cpu_to_be32(((uint32_t *)fcp_cmnd)[j]);
4144 }
4145}
4146
4147/**
4148 * lpfc_scsi_prep_cmnd - Wrapper func for convert scsi cmnd to FCP info unit 4150 * lpfc_scsi_prep_cmnd - Wrapper func for convert scsi cmnd to FCP info unit
4149 * @vport: The virtual port for which this call is being executed. 4151 * @vport: The virtual port for which this call is being executed.
4150 * @lpfc_cmd: The scsi command which needs to send. 4152 * @lpfc_cmd: The scsi command which needs to send.
@@ -4223,9 +4225,6 @@ lpfc_scsi_prep_cmnd(struct lpfc_vport *vport, struct lpfc_scsi_buf *lpfc_cmd,
4223 fcp_cmnd->fcpCntl3 = 0; 4225 fcp_cmnd->fcpCntl3 = 0;
4224 phba->fc4ControlRequests++; 4226 phba->fc4ControlRequests++;
4225 } 4227 }
4226 if (phba->sli_rev == 3 &&
4227 !(phba->sli3_options & LPFC_SLI3_BG_ENABLED))
4228 lpfc_fcpcmd_to_iocb(iocb_cmd->unsli3.fcp_ext.icd, fcp_cmnd);
4229 /* 4228 /*
4230 * Finish initializing those IOCB fields that are independent 4229 * Finish initializing those IOCB fields that are independent
4231 * of the scsi_cmnd request_buffer 4230 * of the scsi_cmnd request_buffer
@@ -5118,9 +5117,10 @@ lpfc_device_reset_handler(struct scsi_cmnd *cmnd)
5118 int status; 5117 int status;
5119 5118
5120 rdata = lpfc_rport_data_from_scsi_device(cmnd->device); 5119 rdata = lpfc_rport_data_from_scsi_device(cmnd->device);
5121 if (!rdata) { 5120 if (!rdata || !rdata->pnode) {
5122 lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP, 5121 lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP,
5123 "0798 Device Reset rport failure: rdata x%p\n", rdata); 5122 "0798 Device Reset rport failure: rdata x%p\n",
5123 rdata);
5124 return FAILED; 5124 return FAILED;
5125 } 5125 }
5126 pnode = rdata->pnode; 5126 pnode = rdata->pnode;
@@ -5202,10 +5202,12 @@ lpfc_target_reset_handler(struct scsi_cmnd *cmnd)
5202 if (status == FAILED) { 5202 if (status == FAILED) {
5203 lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP, 5203 lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP,
5204 "0722 Target Reset rport failure: rdata x%p\n", rdata); 5204 "0722 Target Reset rport failure: rdata x%p\n", rdata);
5205 spin_lock_irq(shost->host_lock); 5205 if (pnode) {
5206 pnode->nlp_flag &= ~NLP_NPR_ADISC; 5206 spin_lock_irq(shost->host_lock);
5207 pnode->nlp_fcp_info &= ~NLP_FCP_2_DEVICE; 5207 pnode->nlp_flag &= ~NLP_NPR_ADISC;
5208 spin_unlock_irq(shost->host_lock); 5208 pnode->nlp_fcp_info &= ~NLP_FCP_2_DEVICE;
5209 spin_unlock_irq(shost->host_lock);
5210 }
5209 lpfc_reset_flush_io_context(vport, tgt_id, lun_id, 5211 lpfc_reset_flush_io_context(vport, tgt_id, lun_id,
5210 LPFC_CTX_TGT); 5212 LPFC_CTX_TGT);
5211 return FAST_IO_FAIL; 5213 return FAST_IO_FAIL;
@@ -5857,6 +5859,31 @@ lpfc_disable_oas_lun(struct lpfc_hba *phba, struct lpfc_name *vport_wwpn,
5857 return false; 5859 return false;
5858} 5860}
5859 5861
5862struct scsi_host_template lpfc_template_s3 = {
5863 .module = THIS_MODULE,
5864 .name = LPFC_DRIVER_NAME,
5865 .info = lpfc_info,
5866 .queuecommand = lpfc_queuecommand,
5867 .eh_abort_handler = lpfc_abort_handler,
5868 .eh_device_reset_handler = lpfc_device_reset_handler,
5869 .eh_target_reset_handler = lpfc_target_reset_handler,
5870 .eh_bus_reset_handler = lpfc_bus_reset_handler,
5871 .slave_alloc = lpfc_slave_alloc,
5872 .slave_configure = lpfc_slave_configure,
5873 .slave_destroy = lpfc_slave_destroy,
5874 .scan_finished = lpfc_scan_finished,
5875 .this_id = -1,
5876 .sg_tablesize = LPFC_DEFAULT_SG_SEG_CNT,
5877 .cmd_per_lun = LPFC_CMD_PER_LUN,
5878 .use_clustering = ENABLE_CLUSTERING,
5879 .shost_attrs = lpfc_hba_attrs,
5880 .max_sectors = 0xFFFF,
5881 .vendor_id = LPFC_NL_VENDOR_ID,
5882 .change_queue_depth = scsi_change_queue_depth,
5883 .use_blk_tags = 1,
5884 .track_queue_depth = 1,
5885};
5886
5860struct scsi_host_template lpfc_template = { 5887struct scsi_host_template lpfc_template = {
5861 .module = THIS_MODULE, 5888 .module = THIS_MODULE,
5862 .name = LPFC_DRIVER_NAME, 5889 .name = LPFC_DRIVER_NAME,
diff --git a/drivers/scsi/lpfc/lpfc_scsi.h b/drivers/scsi/lpfc/lpfc_scsi.h
index 0389ac1e7b83..474e30cdee6e 100644
--- a/drivers/scsi/lpfc/lpfc_scsi.h
+++ b/drivers/scsi/lpfc/lpfc_scsi.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c
index 207a43d952fa..56f73682d4bd 100644
--- a/drivers/scsi/lpfc/lpfc_sli.c
+++ b/drivers/scsi/lpfc/lpfc_sli.c
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
@@ -918,12 +918,16 @@ __lpfc_sli_get_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
918 lpfc_cmd = (struct lpfc_scsi_buf *) piocbq->context1; 918 lpfc_cmd = (struct lpfc_scsi_buf *) piocbq->context1;
919 ndlp = lpfc_cmd->rdata->pnode; 919 ndlp = lpfc_cmd->rdata->pnode;
920 } else if ((piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) && 920 } else if ((piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) &&
921 !(piocbq->iocb_flag & LPFC_IO_LIBDFC)) 921 !(piocbq->iocb_flag & LPFC_IO_LIBDFC)) {
922 ndlp = piocbq->context_un.ndlp; 922 ndlp = piocbq->context_un.ndlp;
923 else if (piocbq->iocb_flag & LPFC_IO_LIBDFC) 923 } else if (piocbq->iocb_flag & LPFC_IO_LIBDFC) {
924 ndlp = piocbq->context_un.ndlp; 924 if (piocbq->iocb_flag & LPFC_IO_LOOPBACK)
925 else 925 ndlp = NULL;
926 else
927 ndlp = piocbq->context_un.ndlp;
928 } else {
926 ndlp = piocbq->context1; 929 ndlp = piocbq->context1;
930 }
927 931
928 list_remove_head(lpfc_sgl_list, sglq, struct lpfc_sglq, list); 932 list_remove_head(lpfc_sgl_list, sglq, struct lpfc_sglq, list);
929 start_sglq = sglq; 933 start_sglq = sglq;
@@ -2213,6 +2217,46 @@ lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2213 else 2217 else
2214 mempool_free(pmb, phba->mbox_mem_pool); 2218 mempool_free(pmb, phba->mbox_mem_pool);
2215} 2219}
2220 /**
2221 * lpfc_sli4_unreg_rpi_cmpl_clr - mailbox completion handler
2222 * @phba: Pointer to HBA context object.
2223 * @pmb: Pointer to mailbox object.
2224 *
2225 * This function is the unreg rpi mailbox completion handler. It
2226 * frees the memory resources associated with the completed mailbox
2227 * command. An additional refrenece is put on the ndlp to prevent
2228 * lpfc_nlp_release from freeing the rpi bit in the bitmask before
2229 * the unreg mailbox command completes, this routine puts the
2230 * reference back.
2231 *
2232 **/
2233void
2234lpfc_sli4_unreg_rpi_cmpl_clr(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2235{
2236 struct lpfc_vport *vport = pmb->vport;
2237 struct lpfc_nodelist *ndlp;
2238
2239 ndlp = pmb->context1;
2240 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2241 if (phba->sli_rev == LPFC_SLI_REV4 &&
2242 (bf_get(lpfc_sli_intf_if_type,
2243 &phba->sli4_hba.sli_intf) ==
2244 LPFC_SLI_INTF_IF_TYPE_2)) {
2245 if (ndlp) {
2246 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
2247 "0010 UNREG_LOGIN vpi:%x "
2248 "rpi:%x DID:%x map:%x %p\n",
2249 vport->vpi, ndlp->nlp_rpi,
2250 ndlp->nlp_DID,
2251 ndlp->nlp_usg_map, ndlp);
2252
2253 lpfc_nlp_put(ndlp);
2254 }
2255 }
2256 }
2257
2258 mempool_free(pmb, phba->mbox_mem_pool);
2259}
2216 2260
2217/** 2261/**
2218 * lpfc_sli_handle_mb_event - Handle mailbox completions from firmware 2262 * lpfc_sli_handle_mb_event - Handle mailbox completions from firmware
@@ -12842,7 +12886,7 @@ lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset)
12842 * fails this function will return -ENXIO. 12886 * fails this function will return -ENXIO.
12843 **/ 12887 **/
12844int 12888int
12845lpfc_modify_fcp_eq_delay(struct lpfc_hba *phba, uint16_t startq) 12889lpfc_modify_fcp_eq_delay(struct lpfc_hba *phba, uint32_t startq)
12846{ 12890{
12847 struct lpfc_mbx_modify_eq_delay *eq_delay; 12891 struct lpfc_mbx_modify_eq_delay *eq_delay;
12848 LPFC_MBOXQ_t *mbox; 12892 LPFC_MBOXQ_t *mbox;
@@ -12959,11 +13003,8 @@ lpfc_eq_create(struct lpfc_hba *phba, struct lpfc_queue *eq, uint32_t imax)
12959 bf_set(lpfc_eq_context_size, &eq_create->u.request.context, 13003 bf_set(lpfc_eq_context_size, &eq_create->u.request.context,
12960 LPFC_EQE_SIZE); 13004 LPFC_EQE_SIZE);
12961 bf_set(lpfc_eq_context_valid, &eq_create->u.request.context, 1); 13005 bf_set(lpfc_eq_context_valid, &eq_create->u.request.context, 1);
12962 /* Calculate delay multiper from maximum interrupt per second */ 13006 /* don't setup delay multiplier using EQ_CREATE */
12963 if (imax > LPFC_DMULT_CONST) 13007 dmult = 0;
12964 dmult = 0;
12965 else
12966 dmult = LPFC_DMULT_CONST/imax - 1;
12967 bf_set(lpfc_eq_context_delay_multi, &eq_create->u.request.context, 13008 bf_set(lpfc_eq_context_delay_multi, &eq_create->u.request.context,
12968 dmult); 13009 dmult);
12969 switch (eq->entry_count) { 13010 switch (eq->entry_count) {
@@ -15662,14 +15703,14 @@ lpfc_sli4_alloc_rpi(struct lpfc_hba *phba)
15662 struct lpfc_rpi_hdr *rpi_hdr; 15703 struct lpfc_rpi_hdr *rpi_hdr;
15663 unsigned long iflag; 15704 unsigned long iflag;
15664 15705
15665 max_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
15666 rpi_limit = phba->sli4_hba.next_rpi;
15667
15668 /* 15706 /*
15669 * Fetch the next logical rpi. Because this index is logical, 15707 * Fetch the next logical rpi. Because this index is logical,
15670 * the driver starts at 0 each time. 15708 * the driver starts at 0 each time.
15671 */ 15709 */
15672 spin_lock_irqsave(&phba->hbalock, iflag); 15710 spin_lock_irqsave(&phba->hbalock, iflag);
15711 max_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
15712 rpi_limit = phba->sli4_hba.next_rpi;
15713
15673 rpi = find_next_zero_bit(phba->sli4_hba.rpi_bmask, rpi_limit, 0); 15714 rpi = find_next_zero_bit(phba->sli4_hba.rpi_bmask, rpi_limit, 0);
15674 if (rpi >= rpi_limit) 15715 if (rpi >= rpi_limit)
15675 rpi = LPFC_RPI_ALLOC_ERROR; 15716 rpi = LPFC_RPI_ALLOC_ERROR;
@@ -15678,6 +15719,9 @@ lpfc_sli4_alloc_rpi(struct lpfc_hba *phba)
15678 phba->sli4_hba.max_cfg_param.rpi_used++; 15719 phba->sli4_hba.max_cfg_param.rpi_used++;
15679 phba->sli4_hba.rpi_count++; 15720 phba->sli4_hba.rpi_count++;
15680 } 15721 }
15722 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
15723 "0001 rpi:%x max:%x lim:%x\n",
15724 (int) rpi, max_rpi, rpi_limit);
15681 15725
15682 /* 15726 /*
15683 * Don't try to allocate more rpi header regions if the device limit 15727 * Don't try to allocate more rpi header regions if the device limit
diff --git a/drivers/scsi/lpfc/lpfc_sli.h b/drivers/scsi/lpfc/lpfc_sli.h
index 4a01452415cf..7fe99ff80846 100644
--- a/drivers/scsi/lpfc/lpfc_sli.h
+++ b/drivers/scsi/lpfc/lpfc_sli.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -80,6 +80,7 @@ struct lpfc_iocbq {
80 80
81#define LPFC_IO_OAS 0x10000 /* OAS FCP IO */ 81#define LPFC_IO_OAS 0x10000 /* OAS FCP IO */
82#define LPFC_IO_FOF 0x20000 /* FOF FCP IO */ 82#define LPFC_IO_FOF 0x20000 /* FOF FCP IO */
83#define LPFC_IO_LOOPBACK 0x40000 /* Loopback IO */
83 84
84 uint32_t drvrTimeout; /* driver timeout in seconds */ 85 uint32_t drvrTimeout; /* driver timeout in seconds */
85 uint32_t fcp_wqidx; /* index to FCP work queue */ 86 uint32_t fcp_wqidx; /* index to FCP work queue */
diff --git a/drivers/scsi/lpfc/lpfc_sli4.h b/drivers/scsi/lpfc/lpfc_sli4.h
index 22ceb2b05ba1..6eca3b8124d3 100644
--- a/drivers/scsi/lpfc/lpfc_sli4.h
+++ b/drivers/scsi/lpfc/lpfc_sli4.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2009-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2009-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -671,7 +671,7 @@ struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t,
671 uint32_t); 671 uint32_t);
672void lpfc_sli4_queue_free(struct lpfc_queue *); 672void lpfc_sli4_queue_free(struct lpfc_queue *);
673int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t); 673int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t);
674int lpfc_modify_fcp_eq_delay(struct lpfc_hba *, uint16_t); 674int lpfc_modify_fcp_eq_delay(struct lpfc_hba *, uint32_t);
675int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *, 675int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *,
676 struct lpfc_queue *, uint32_t, uint32_t); 676 struct lpfc_queue *, uint32_t, uint32_t);
677int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *, 677int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *,
diff --git a/drivers/scsi/lpfc/lpfc_version.h b/drivers/scsi/lpfc/lpfc_version.h
index 89413add2252..c37bb9f91c3b 100644
--- a/drivers/scsi/lpfc/lpfc_version.h
+++ b/drivers/scsi/lpfc/lpfc_version.h
@@ -1,7 +1,7 @@
1/******************************************************************* 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for * 2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. * 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2014 Emulex. All rights reserved. * 4 * Copyright (C) 2004-2015 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. * 5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com * 6 * www.emulex.com *
7 * * 7 * *
@@ -18,7 +18,7 @@
18 * included with this package. * 18 * included with this package. *
19 *******************************************************************/ 19 *******************************************************************/
20 20
21#define LPFC_DRIVER_VERSION "10.4.8000.0." 21#define LPFC_DRIVER_VERSION "10.5.0.0."
22#define LPFC_DRIVER_NAME "lpfc" 22#define LPFC_DRIVER_NAME "lpfc"
23 23
24/* Used for SLI 2/3 */ 24/* Used for SLI 2/3 */
@@ -30,4 +30,4 @@
30 30
31#define LPFC_MODULE_DESC "Emulex LightPulse Fibre Channel SCSI driver " \ 31#define LPFC_MODULE_DESC "Emulex LightPulse Fibre Channel SCSI driver " \
32 LPFC_DRIVER_VERSION 32 LPFC_DRIVER_VERSION
33#define LPFC_COPYRIGHT "Copyright(c) 2004-2014 Emulex. All rights reserved." 33#define LPFC_COPYRIGHT "Copyright(c) 2004-2015 Emulex. All rights reserved."
diff --git a/drivers/scsi/mac_scsi.c b/drivers/scsi/mac_scsi.c
index 1e85c07e3b62..d64a769b8155 100644
--- a/drivers/scsi/mac_scsi.c
+++ b/drivers/scsi/mac_scsi.c
@@ -483,7 +483,6 @@ static struct platform_driver mac_scsi_driver = {
483 .remove = __exit_p(mac_scsi_remove), 483 .remove = __exit_p(mac_scsi_remove),
484 .driver = { 484 .driver = {
485 .name = DRV_MODULE_NAME, 485 .name = DRV_MODULE_NAME,
486 .owner = THIS_MODULE,
487 }, 486 },
488}; 487};
489 488
diff --git a/drivers/scsi/qla2xxx/Kconfig b/drivers/scsi/qla2xxx/Kconfig
index 113e6c9826a1..33f60c92e20e 100644
--- a/drivers/scsi/qla2xxx/Kconfig
+++ b/drivers/scsi/qla2xxx/Kconfig
@@ -18,6 +18,9 @@ config SCSI_QLA_FC
18 2322, 6322 ql2322_fw.bin 18 2322, 6322 ql2322_fw.bin
19 24xx, 54xx ql2400_fw.bin 19 24xx, 54xx ql2400_fw.bin
20 25xx ql2500_fw.bin 20 25xx ql2500_fw.bin
21 2031 ql2600_fw.bin
22 8031 ql8300_fw.bin
23 27xx ql2700_fw.bin
21 24
22 Upon request, the driver caches the firmware image until 25 Upon request, the driver caches the firmware image until
23 the driver is unloaded. 26 the driver is unloaded.
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c
index d77fe43793b6..0e6ee3ca30e6 100644
--- a/drivers/scsi/qla2xxx/qla_dbg.c
+++ b/drivers/scsi/qla2xxx/qla_dbg.c
@@ -11,9 +11,9 @@
11 * ---------------------------------------------------------------------- 11 * ----------------------------------------------------------------------
12 * | Level | Last Value Used | Holes | 12 * | Level | Last Value Used | Holes |
13 * ---------------------------------------------------------------------- 13 * ----------------------------------------------------------------------
14 * | Module Init and Probe | 0x017d | 0x0144,0x0146 | 14 * | Module Init and Probe | 0x017f | 0x0146 |
15 * | | | 0x015b-0x0160 | 15 * | | | 0x015b-0x0160 |
16 * | | | 0x016e-0x0170 | 16 * | | | 0x016e-0x0170 |
17 * | Mailbox commands | 0x118d | 0x1115-0x1116 | 17 * | Mailbox commands | 0x118d | 0x1115-0x1116 |
18 * | | | 0x111a-0x111b | 18 * | | | 0x111a-0x111b |
19 * | Device Discovery | 0x2016 | 0x2020-0x2022, | 19 * | Device Discovery | 0x2016 | 0x2020-0x2022, |
@@ -60,7 +60,7 @@
60 * | | | 0xb13c-0xb140 | 60 * | | | 0xb13c-0xb140 |
61 * | | | 0xb149 | 61 * | | | 0xb149 |
62 * | MultiQ | 0xc00c | | 62 * | MultiQ | 0xc00c | |
63 * | Misc | 0xd213 | 0xd011-0xd017 | 63 * | Misc | 0xd300 | 0xd016-0xd017 |
64 * | | | 0xd021,0xd024 | 64 * | | | 0xd021,0xd024 |
65 * | | | 0xd025,0xd029 | 65 * | | | 0xd025,0xd029 |
66 * | | | 0xd02a,0xd02e | 66 * | | | 0xd02a,0xd02e |
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
index 5f6b2960cccb..e86201d3b8c6 100644
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -2163,7 +2163,7 @@ struct ct_fdmi_hba_attr {
2163 uint8_t node_name[WWN_SIZE]; 2163 uint8_t node_name[WWN_SIZE];
2164 uint8_t manufacturer[64]; 2164 uint8_t manufacturer[64];
2165 uint8_t serial_num[32]; 2165 uint8_t serial_num[32];
2166 uint8_t model[16]; 2166 uint8_t model[16+1];
2167 uint8_t model_desc[80]; 2167 uint8_t model_desc[80];
2168 uint8_t hw_version[32]; 2168 uint8_t hw_version[32];
2169 uint8_t driver_version[32]; 2169 uint8_t driver_version[32];
@@ -2184,9 +2184,9 @@ struct ct_fdmiv2_hba_attr {
2184 uint16_t len; 2184 uint16_t len;
2185 union { 2185 union {
2186 uint8_t node_name[WWN_SIZE]; 2186 uint8_t node_name[WWN_SIZE];
2187 uint8_t manufacturer[32]; 2187 uint8_t manufacturer[64];
2188 uint8_t serial_num[32]; 2188 uint8_t serial_num[32];
2189 uint8_t model[16]; 2189 uint8_t model[16+1];
2190 uint8_t model_desc[80]; 2190 uint8_t model_desc[80];
2191 uint8_t hw_version[16]; 2191 uint8_t hw_version[16];
2192 uint8_t driver_version[32]; 2192 uint8_t driver_version[32];
@@ -2252,7 +2252,7 @@ struct ct_fdmiv2_port_attr {
2252 uint32_t cur_speed; 2252 uint32_t cur_speed;
2253 uint32_t max_frame_size; 2253 uint32_t max_frame_size;
2254 uint8_t os_dev_name[32]; 2254 uint8_t os_dev_name[32];
2255 uint8_t host_name[32]; 2255 uint8_t host_name[256];
2256 uint8_t node_name[WWN_SIZE]; 2256 uint8_t node_name[WWN_SIZE];
2257 uint8_t port_name[WWN_SIZE]; 2257 uint8_t port_name[WWN_SIZE];
2258 uint8_t port_sym_name[128]; 2258 uint8_t port_sym_name[128];
@@ -2283,7 +2283,7 @@ struct ct_fdmi_port_attr {
2283 uint32_t cur_speed; 2283 uint32_t cur_speed;
2284 uint32_t max_frame_size; 2284 uint32_t max_frame_size;
2285 uint8_t os_dev_name[32]; 2285 uint8_t os_dev_name[32];
2286 uint8_t host_name[32]; 2286 uint8_t host_name[256];
2287 } a; 2287 } a;
2288}; 2288};
2289 2289
@@ -3132,7 +3132,8 @@ struct qla_hw_data {
3132 IS_QLA25XX(ha) || IS_QLA81XX(ha) || \ 3132 IS_QLA25XX(ha) || IS_QLA81XX(ha) || \
3133 IS_QLA82XX(ha) || IS_QLA83XX(ha) || \ 3133 IS_QLA82XX(ha) || IS_QLA83XX(ha) || \
3134 IS_QLA8044(ha) || IS_QLA27XX(ha)) 3134 IS_QLA8044(ha) || IS_QLA27XX(ha))
3135#define IS_MSIX_NACK_CAPABLE(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha)) 3135#define IS_MSIX_NACK_CAPABLE(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha) || \
3136 IS_QLA27XX(ha))
3136#define IS_NOPOLLING_TYPE(ha) (IS_QLA81XX(ha) && (ha)->flags.msix_enabled) 3137#define IS_NOPOLLING_TYPE(ha) (IS_QLA81XX(ha) && (ha)->flags.msix_enabled)
3137#define IS_FAC_REQUIRED(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha) || \ 3138#define IS_FAC_REQUIRED(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha) || \
3138 IS_QLA27XX(ha)) 3139 IS_QLA27XX(ha))
@@ -3300,6 +3301,8 @@ struct qla_hw_data {
3300#define RISC_RDY_AFT_RESET 3 3301#define RISC_RDY_AFT_RESET 3
3301#define RISC_SRAM_DUMP_CMPL 4 3302#define RISC_SRAM_DUMP_CMPL 4
3302#define RISC_EXT_MEM_DUMP_CMPL 5 3303#define RISC_EXT_MEM_DUMP_CMPL 5
3304#define ISP_MBX_RDY 6
3305#define ISP_SOFT_RESET_CMPL 7
3303 int fw_dump_reading; 3306 int fw_dump_reading;
3304 int prev_minidump_failed; 3307 int prev_minidump_failed;
3305 dma_addr_t eft_dma; 3308 dma_addr_t eft_dma;
@@ -3587,6 +3590,7 @@ typedef struct scsi_qla_host {
3587#define VP_BIND_NEEDED 2 3590#define VP_BIND_NEEDED 2
3588#define VP_DELETE_NEEDED 3 3591#define VP_DELETE_NEEDED 3
3589#define VP_SCR_NEEDED 4 /* State Change Request registration */ 3592#define VP_SCR_NEEDED 4 /* State Change Request registration */
3593#define VP_CONFIG_OK 5 /* Flag to cfg VP, if FW is ready */
3590 atomic_t vp_state; 3594 atomic_t vp_state;
3591#define VP_OFFLINE 0 3595#define VP_OFFLINE 0
3592#define VP_ACTIVE 1 3596#define VP_ACTIVE 1
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
index 5bb57c5282c9..285cb204f300 100644
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -1121,7 +1121,7 @@ qla81xx_reset_mpi(scsi_qla_host_t *vha)
1121 * 1121 *
1122 * Returns 0 on success. 1122 * Returns 0 on success.
1123 */ 1123 */
1124static inline void 1124static inline int
1125qla24xx_reset_risc(scsi_qla_host_t *vha) 1125qla24xx_reset_risc(scsi_qla_host_t *vha)
1126{ 1126{
1127 unsigned long flags = 0; 1127 unsigned long flags = 0;
@@ -1130,6 +1130,7 @@ qla24xx_reset_risc(scsi_qla_host_t *vha)
1130 uint32_t cnt, d2; 1130 uint32_t cnt, d2;
1131 uint16_t wd; 1131 uint16_t wd;
1132 static int abts_cnt; /* ISP abort retry counts */ 1132 static int abts_cnt; /* ISP abort retry counts */
1133 int rval = QLA_SUCCESS;
1133 1134
1134 spin_lock_irqsave(&ha->hardware_lock, flags); 1135 spin_lock_irqsave(&ha->hardware_lock, flags);
1135 1136
@@ -1142,26 +1143,57 @@ qla24xx_reset_risc(scsi_qla_host_t *vha)
1142 udelay(10); 1143 udelay(10);
1143 } 1144 }
1144 1145
1146 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
1147 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
1148
1149 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
1150 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
1151 RD_REG_DWORD(&reg->hccr),
1152 RD_REG_DWORD(&reg->ctrl_status),
1153 (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
1154
1145 WRT_REG_DWORD(&reg->ctrl_status, 1155 WRT_REG_DWORD(&reg->ctrl_status,
1146 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 1156 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1147 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 1157 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
1148 1158
1149 udelay(100); 1159 udelay(100);
1160
1150 /* Wait for firmware to complete NVRAM accesses. */ 1161 /* Wait for firmware to complete NVRAM accesses. */
1151 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0); 1162 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1152 for (cnt = 10000 ; cnt && d2; cnt--) { 1163 for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
1153 udelay(5); 1164 rval == QLA_SUCCESS; cnt--) {
1154 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1155 barrier(); 1165 barrier();
1166 if (cnt)
1167 udelay(5);
1168 else
1169 rval = QLA_FUNCTION_TIMEOUT;
1156 } 1170 }
1157 1171
1172 if (rval == QLA_SUCCESS)
1173 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
1174
1175 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
1176 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
1177 RD_REG_DWORD(&reg->hccr),
1178 RD_REG_DWORD(&reg->mailbox0));
1179
1158 /* Wait for soft-reset to complete. */ 1180 /* Wait for soft-reset to complete. */
1159 d2 = RD_REG_DWORD(&reg->ctrl_status); 1181 d2 = RD_REG_DWORD(&reg->ctrl_status);
1160 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { 1182 for (cnt = 0; cnt < 6000000; cnt++) {
1161 udelay(5);
1162 d2 = RD_REG_DWORD(&reg->ctrl_status);
1163 barrier(); 1183 barrier();
1184 if ((RD_REG_DWORD(&reg->ctrl_status) &
1185 CSRX_ISP_SOFT_RESET) == 0)
1186 break;
1187
1188 udelay(5);
1164 } 1189 }
1190 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
1191 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
1192
1193 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
1194 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
1195 RD_REG_DWORD(&reg->hccr),
1196 RD_REG_DWORD(&reg->ctrl_status));
1165 1197
1166 /* If required, do an MPI FW reset now */ 1198 /* If required, do an MPI FW reset now */
1167 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 1199 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
@@ -1190,16 +1222,32 @@ qla24xx_reset_risc(scsi_qla_host_t *vha)
1190 RD_REG_DWORD(&reg->hccr); 1222 RD_REG_DWORD(&reg->hccr);
1191 1223
1192 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0); 1224 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1193 for (cnt = 6000000 ; cnt && d2; cnt--) { 1225 for (cnt = 6000000; RD_REG_WORD(&reg->mailbox0) != 0 &&
1194 udelay(5); 1226 rval == QLA_SUCCESS; cnt--) {
1195 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1196 barrier(); 1227 barrier();
1228 if (cnt)
1229 udelay(5);
1230 else
1231 rval = QLA_FUNCTION_TIMEOUT;
1197 } 1232 }
1233 if (rval == QLA_SUCCESS)
1234 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
1235
1236 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
1237 "Host Risc 0x%x, mailbox0 0x%x\n",
1238 RD_REG_DWORD(&reg->hccr),
1239 RD_REG_WORD(&reg->mailbox0));
1198 1240
1199 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1241 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1200 1242
1243 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
1244 "Driver in %s mode\n",
1245 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
1246
1201 if (IS_NOPOLLING_TYPE(ha)) 1247 if (IS_NOPOLLING_TYPE(ha))
1202 ha->isp_ops->enable_intrs(ha); 1248 ha->isp_ops->enable_intrs(ha);
1249
1250 return rval;
1203} 1251}
1204 1252
1205static void 1253static void
@@ -2243,8 +2291,11 @@ qla2x00_fw_ready(scsi_qla_host_t *vha)
2243 2291
2244 rval = QLA_SUCCESS; 2292 rval = QLA_SUCCESS;
2245 2293
2246 /* 20 seconds for loop down. */ 2294 /* Time to wait for loop down */
2247 min_wait = 20; 2295 if (IS_P3P_TYPE(ha))
2296 min_wait = 30;
2297 else
2298 min_wait = 20;
2248 2299
2249 /* 2300 /*
2250 * Firmware should take at most one RATOV to login, plus 5 seconds for 2301 * Firmware should take at most one RATOV to login, plus 5 seconds for
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
index a04a1b1f7f32..6dc14cd782b2 100644
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -756,11 +756,21 @@ skip_rio:
756 /* 756 /*
757 * In case of loop down, restore WWPN from 757 * In case of loop down, restore WWPN from
758 * NVRAM in case of FA-WWPN capable ISP 758 * NVRAM in case of FA-WWPN capable ISP
759 * Restore for Physical Port only
759 */ 760 */
760 if (ha->flags.fawwpn_enabled) { 761 if (!vha->vp_idx) {
761 void *wwpn = ha->init_cb->port_name; 762 if (ha->flags.fawwpn_enabled) {
763 void *wwpn = ha->init_cb->port_name;
764 memcpy(vha->port_name, wwpn, WWN_SIZE);
765 fc_host_port_name(vha->host) =
766 wwn_to_u64(vha->port_name);
767 ql_dbg(ql_dbg_init + ql_dbg_verbose,
768 vha, 0x0144, "LOOP DOWN detected,"
769 "restore WWPN %016llx\n",
770 wwn_to_u64(vha->port_name));
771 }
762 772
763 memcpy(vha->port_name, wwpn, WWN_SIZE); 773 clear_bit(VP_CONFIG_OK, &vha->vp_flags);
764 } 774 }
765 775
766 vha->device_flags |= DFLG_NO_CABLE; 776 vha->device_flags |= DFLG_NO_CABLE;
@@ -947,6 +957,7 @@ skip_rio:
947 957
948 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 958 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
949 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 959 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
960 set_bit(VP_CONFIG_OK, &vha->vp_flags);
950 961
951 qlt_async_event(mb[0], vha, mb); 962 qlt_async_event(mb[0], vha, mb);
952 break; 963 break;
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
index 72971daa2552..02b1c1c5355b 100644
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -33,7 +33,7 @@
33static int 33static int
34qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) 34qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
35{ 35{
36 int rval; 36 int rval, i;
37 unsigned long flags = 0; 37 unsigned long flags = 0;
38 device_reg_t *reg; 38 device_reg_t *reg;
39 uint8_t abort_active; 39 uint8_t abort_active;
@@ -43,10 +43,12 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
43 uint16_t __iomem *optr; 43 uint16_t __iomem *optr;
44 uint32_t cnt; 44 uint32_t cnt;
45 uint32_t mboxes; 45 uint32_t mboxes;
46 uint16_t __iomem *mbx_reg;
46 unsigned long wait_time; 47 unsigned long wait_time;
47 struct qla_hw_data *ha = vha->hw; 48 struct qla_hw_data *ha = vha->hw;
48 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 49 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
49 50
51
50 ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__); 52 ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
51 53
52 if (ha->pdev->error_state > pci_channel_io_frozen) { 54 if (ha->pdev->error_state > pci_channel_io_frozen) {
@@ -376,6 +378,18 @@ mbx_done:
376 ql_dbg(ql_dbg_disc, base_vha, 0x1020, 378 ql_dbg(ql_dbg_disc, base_vha, 0x1020,
377 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n", 379 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
378 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command); 380 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
381
382 ql_dbg(ql_dbg_disc, vha, 0x1115,
383 "host status: 0x%x, flags:0x%lx, intr ctrl reg:0x%x, intr status:0x%x\n",
384 RD_REG_DWORD(&reg->isp24.host_status),
385 ha->fw_dump_cap_flags,
386 RD_REG_DWORD(&reg->isp24.ictrl),
387 RD_REG_DWORD(&reg->isp24.istatus));
388
389 mbx_reg = &reg->isp24.mailbox0;
390 for (i = 0; i < 6; i++)
391 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x1116,
392 "mbox[%d] 0x%04x\n", i, RD_REG_WORD(mbx_reg++));
379 } else { 393 } else {
380 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__); 394 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
381 } 395 }
@@ -2838,7 +2852,7 @@ qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
2838 mbx_cmd_t mc; 2852 mbx_cmd_t mc;
2839 mbx_cmd_t *mcp = &mc; 2853 mbx_cmd_t *mcp = &mc;
2840 2854
2841 if (!IS_QLA2031(vha->hw)) 2855 if (!IS_QLA2031(vha->hw) && !IS_QLA27XX(vha->hw))
2842 return QLA_FUNCTION_FAILED; 2856 return QLA_FUNCTION_FAILED;
2843 2857
2844 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182, 2858 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
@@ -2846,7 +2860,11 @@ qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
2846 2860
2847 mcp->mb[0] = MBC_WRITE_SERDES; 2861 mcp->mb[0] = MBC_WRITE_SERDES;
2848 mcp->mb[1] = addr; 2862 mcp->mb[1] = addr;
2849 mcp->mb[2] = data & 0xff; 2863 if (IS_QLA2031(vha->hw))
2864 mcp->mb[2] = data & 0xff;
2865 else
2866 mcp->mb[2] = data;
2867
2850 mcp->mb[3] = 0; 2868 mcp->mb[3] = 0;
2851 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; 2869 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2852 mcp->in_mb = MBX_0; 2870 mcp->in_mb = MBX_0;
@@ -2872,7 +2890,7 @@ qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
2872 mbx_cmd_t mc; 2890 mbx_cmd_t mc;
2873 mbx_cmd_t *mcp = &mc; 2891 mbx_cmd_t *mcp = &mc;
2874 2892
2875 if (!IS_QLA2031(vha->hw)) 2893 if (!IS_QLA2031(vha->hw) && !IS_QLA27XX(vha->hw))
2876 return QLA_FUNCTION_FAILED; 2894 return QLA_FUNCTION_FAILED;
2877 2895
2878 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185, 2896 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
@@ -2887,7 +2905,10 @@ qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
2887 mcp->flags = 0; 2905 mcp->flags = 0;
2888 rval = qla2x00_mailbox_command(vha, mcp); 2906 rval = qla2x00_mailbox_command(vha, mcp);
2889 2907
2890 *data = mcp->mb[1] & 0xff; 2908 if (IS_QLA2031(vha->hw))
2909 *data = mcp->mb[1] & 0xff;
2910 else
2911 *data = mcp->mb[1];
2891 2912
2892 if (rval != QLA_SUCCESS) { 2913 if (rval != QLA_SUCCESS) {
2893 ql_dbg(ql_dbg_mbx, vha, 0x1186, 2914 ql_dbg(ql_dbg_mbx, vha, 0x1186,
diff --git a/drivers/scsi/qla2xxx/qla_mid.c b/drivers/scsi/qla2xxx/qla_mid.c
index ca3804e34833..cc94192511cf 100644
--- a/drivers/scsi/qla2xxx/qla_mid.c
+++ b/drivers/scsi/qla2xxx/qla_mid.c
@@ -306,19 +306,25 @@ qla2x00_vp_abort_isp(scsi_qla_host_t *vha)
306static int 306static int
307qla2x00_do_dpc_vp(scsi_qla_host_t *vha) 307qla2x00_do_dpc_vp(scsi_qla_host_t *vha)
308{ 308{
309 struct qla_hw_data *ha = vha->hw;
310 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
311
309 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, vha, 0x4012, 312 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, vha, 0x4012,
310 "Entering %s vp_flags: 0x%lx.\n", __func__, vha->vp_flags); 313 "Entering %s vp_flags: 0x%lx.\n", __func__, vha->vp_flags);
311 314
312 qla2x00_do_work(vha); 315 qla2x00_do_work(vha);
313 316
314 if (test_and_clear_bit(VP_IDX_ACQUIRED, &vha->vp_flags)) { 317 /* Check if Fw is ready to configure VP first */
315 /* VP acquired. complete port configuration */ 318 if (test_bit(VP_CONFIG_OK, &base_vha->vp_flags)) {
316 ql_dbg(ql_dbg_dpc, vha, 0x4014, 319 if (test_and_clear_bit(VP_IDX_ACQUIRED, &vha->vp_flags)) {
317 "Configure VP scheduled.\n"); 320 /* VP acquired. complete port configuration */
318 qla24xx_configure_vp(vha); 321 ql_dbg(ql_dbg_dpc, vha, 0x4014,
319 ql_dbg(ql_dbg_dpc, vha, 0x4015, 322 "Configure VP scheduled.\n");
320 "Configure VP end.\n"); 323 qla24xx_configure_vp(vha);
321 return 0; 324 ql_dbg(ql_dbg_dpc, vha, 0x4015,
325 "Configure VP end.\n");
326 return 0;
327 }
322 } 328 }
323 329
324 if (test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags)) { 330 if (test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags)) {
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index 5319b3cb219e..7462dd70b150 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -5834,3 +5834,6 @@ MODULE_FIRMWARE(FW_FILE_ISP2300);
5834MODULE_FIRMWARE(FW_FILE_ISP2322); 5834MODULE_FIRMWARE(FW_FILE_ISP2322);
5835MODULE_FIRMWARE(FW_FILE_ISP24XX); 5835MODULE_FIRMWARE(FW_FILE_ISP24XX);
5836MODULE_FIRMWARE(FW_FILE_ISP25XX); 5836MODULE_FIRMWARE(FW_FILE_ISP25XX);
5837MODULE_FIRMWARE(FW_FILE_ISP2031);
5838MODULE_FIRMWARE(FW_FILE_ISP8031);
5839MODULE_FIRMWARE(FW_FILE_ISP27XX);
diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c
index b656a05613e8..028e8c8a7de9 100644
--- a/drivers/scsi/qla2xxx/qla_sup.c
+++ b/drivers/scsi/qla2xxx/qla_sup.c
@@ -1718,13 +1718,16 @@ qla83xx_beacon_blink(struct scsi_qla_host *vha)
1718 uint16_t orig_led_cfg[6]; 1718 uint16_t orig_led_cfg[6];
1719 uint32_t led_10_value, led_43_value; 1719 uint32_t led_10_value, led_43_value;
1720 1720
1721 if (!IS_QLA83XX(ha) && !IS_QLA81XX(ha)) 1721 if (!IS_QLA83XX(ha) && !IS_QLA81XX(ha) && !IS_QLA27XX(ha))
1722 return; 1722 return;
1723 1723
1724 if (!ha->beacon_blink_led) 1724 if (!ha->beacon_blink_led)
1725 return; 1725 return;
1726 1726
1727 if (IS_QLA2031(ha)) { 1727 if (IS_QLA27XX(ha)) {
1728 qla2x00_write_ram_word(vha, 0x1003, 0x40000230);
1729 qla2x00_write_ram_word(vha, 0x1004, 0x40000230);
1730 } else if (IS_QLA2031(ha)) {
1728 led_select_value = qla83xx_select_led_port(ha); 1731 led_select_value = qla83xx_select_led_port(ha);
1729 1732
1730 qla83xx_wr_reg(vha, led_select_value, 0x40000230); 1733 qla83xx_wr_reg(vha, led_select_value, 0x40000230);
@@ -1811,7 +1814,7 @@ qla24xx_beacon_on(struct scsi_qla_host *vha)
1811 return QLA_FUNCTION_FAILED; 1814 return QLA_FUNCTION_FAILED;
1812 } 1815 }
1813 1816
1814 if (IS_QLA2031(ha)) 1817 if (IS_QLA2031(ha) || IS_QLA27XX(ha))
1815 goto skip_gpio; 1818 goto skip_gpio;
1816 1819
1817 spin_lock_irqsave(&ha->hardware_lock, flags); 1820 spin_lock_irqsave(&ha->hardware_lock, flags);
@@ -1848,7 +1851,7 @@ qla24xx_beacon_off(struct scsi_qla_host *vha)
1848 1851
1849 ha->beacon_blink_led = 0; 1852 ha->beacon_blink_led = 0;
1850 1853
1851 if (IS_QLA2031(ha)) 1854 if (IS_QLA2031(ha) || IS_QLA27XX(ha))
1852 goto set_fw_options; 1855 goto set_fw_options;
1853 1856
1854 if (IS_QLA8031(ha) || IS_QLA81XX(ha)) 1857 if (IS_QLA8031(ha) || IS_QLA81XX(ha))
diff --git a/drivers/scsi/qla2xxx/qla_tmpl.c b/drivers/scsi/qla2xxx/qla_tmpl.c
index a8c0c7362e48..962cb89fe0ae 100644
--- a/drivers/scsi/qla2xxx/qla_tmpl.c
+++ b/drivers/scsi/qla2xxx/qla_tmpl.c
@@ -190,7 +190,7 @@ static inline void
190qla27xx_write_reg(__iomem struct device_reg_24xx *reg, 190qla27xx_write_reg(__iomem struct device_reg_24xx *reg,
191 uint offset, uint32_t data, void *buf) 191 uint offset, uint32_t data, void *buf)
192{ 192{
193 __iomem void *window = reg + offset; 193 __iomem void *window = (void __iomem *)reg + offset;
194 194
195 if (buf) { 195 if (buf) {
196 WRT_REG_DWORD(window, data); 196 WRT_REG_DWORD(window, data);
@@ -219,6 +219,8 @@ qla27xx_skip_entry(struct qla27xx_fwdt_entry *ent, void *buf)
219{ 219{
220 if (buf) 220 if (buf)
221 ent->hdr.driver_flags |= DRIVER_FLAG_SKIP_ENTRY; 221 ent->hdr.driver_flags |= DRIVER_FLAG_SKIP_ENTRY;
222 ql_dbg(ql_dbg_misc + ql_dbg_verbose, NULL, 0xd011,
223 "Skipping entry %d\n", ent->hdr.entry_type);
222} 224}
223 225
224static int 226static int
@@ -784,6 +786,13 @@ qla27xx_walk_template(struct scsi_qla_host *vha,
784 786
785 ql_dbg(ql_dbg_misc, vha, 0xd01b, 787 ql_dbg(ql_dbg_misc, vha, 0xd01b,
786 "%s: len=%lx\n", __func__, *len); 788 "%s: len=%lx\n", __func__, *len);
789
790 if (buf) {
791 ql_log(ql_log_warn, vha, 0xd015,
792 "Firmware dump saved to temp buffer (%ld/%p)\n",
793 vha->host_no, vha->hw->fw_dump);
794 qla2x00_post_uevent_work(vha, QLA_UEVENT_CODE_FW_DUMP);
795 }
787} 796}
788 797
789static void 798static void
@@ -938,6 +947,10 @@ qla27xx_fwdump(scsi_qla_host_t *vha, int hardware_locked)
938 ql_log(ql_log_warn, vha, 0xd01e, "fwdump buffer missing.\n"); 947 ql_log(ql_log_warn, vha, 0xd01e, "fwdump buffer missing.\n");
939 else if (!vha->hw->fw_dump_template) 948 else if (!vha->hw->fw_dump_template)
940 ql_log(ql_log_warn, vha, 0xd01f, "fwdump template missing.\n"); 949 ql_log(ql_log_warn, vha, 0xd01f, "fwdump template missing.\n");
950 else if (vha->hw->fw_dumped)
951 ql_log(ql_log_warn, vha, 0xd300,
952 "Firmware has been previously dumped (%p),"
953 " -- ignoring request\n", vha->hw->fw_dump);
941 else 954 else
942 qla27xx_execute_fwdt_template(vha); 955 qla27xx_execute_fwdt_template(vha);
943 956
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h
index d88b86214ec5..2ed9ab90a455 100644
--- a/drivers/scsi/qla2xxx/qla_version.h
+++ b/drivers/scsi/qla2xxx/qla_version.h
@@ -7,7 +7,7 @@
7/* 7/*
8 * Driver version 8 * Driver version
9 */ 9 */
10#define QLA2XXX_VERSION "8.07.00.16-k" 10#define QLA2XXX_VERSION "8.07.00.18-k"
11 11
12#define QLA_DRIVER_MAJOR_VER 8 12#define QLA_DRIVER_MAJOR_VER 8
13#define QLA_DRIVER_MINOR_VER 7 13#define QLA_DRIVER_MINOR_VER 7
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index c9c3b579eece..3833bf59fb66 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -972,18 +972,24 @@ EXPORT_SYMBOL(scsi_report_opcode);
972 * Description: Gets a reference to the scsi_device and increments the use count 972 * Description: Gets a reference to the scsi_device and increments the use count
973 * of the underlying LLDD module. You must hold host_lock of the 973 * of the underlying LLDD module. You must hold host_lock of the
974 * parent Scsi_Host or already have a reference when calling this. 974 * parent Scsi_Host or already have a reference when calling this.
975 *
976 * This will fail if a device is deleted or cancelled, or when the LLD module
977 * is in the process of being unloaded.
975 */ 978 */
976int scsi_device_get(struct scsi_device *sdev) 979int scsi_device_get(struct scsi_device *sdev)
977{ 980{
978 if (sdev->sdev_state == SDEV_DEL) 981 if (sdev->sdev_state == SDEV_DEL || sdev->sdev_state == SDEV_CANCEL)
979 return -ENXIO; 982 goto fail;
980 if (!get_device(&sdev->sdev_gendev)) 983 if (!get_device(&sdev->sdev_gendev))
981 return -ENXIO; 984 goto fail;
982 /* We can fail try_module_get if we're doing SCSI operations 985 if (!try_module_get(sdev->host->hostt->module))
983 * from module exit (like cache flush) */ 986 goto fail_put_device;
984 __module_get(sdev->host->hostt->module);
985
986 return 0; 987 return 0;
988
989fail_put_device:
990 put_device(&sdev->sdev_gendev);
991fail:
992 return -ENXIO;
987} 993}
988EXPORT_SYMBOL(scsi_device_get); 994EXPORT_SYMBOL(scsi_device_get);
989 995
diff --git a/drivers/scsi/scsi_scan.c b/drivers/scsi/scsi_scan.c
index 9c0a520d933c..60aae01caa89 100644
--- a/drivers/scsi/scsi_scan.c
+++ b/drivers/scsi/scsi_scan.c
@@ -1570,16 +1570,15 @@ EXPORT_SYMBOL(scsi_add_device);
1570 1570
1571void scsi_rescan_device(struct device *dev) 1571void scsi_rescan_device(struct device *dev)
1572{ 1572{
1573 if (!dev->driver) 1573 device_lock(dev);
1574 return; 1574 if (dev->driver && try_module_get(dev->driver->owner)) {
1575
1576 if (try_module_get(dev->driver->owner)) {
1577 struct scsi_driver *drv = to_scsi_driver(dev->driver); 1575 struct scsi_driver *drv = to_scsi_driver(dev->driver);
1578 1576
1579 if (drv->rescan) 1577 if (drv->rescan)
1580 drv->rescan(dev); 1578 drv->rescan(dev);
1581 module_put(dev->driver->owner); 1579 module_put(dev->driver->owner);
1582 } 1580 }
1581 device_unlock(dev);
1583} 1582}
1584EXPORT_SYMBOL(scsi_rescan_device); 1583EXPORT_SYMBOL(scsi_rescan_device);
1585 1584
diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c
index 5d6f348eb3d8..24eaaf66af71 100644
--- a/drivers/scsi/scsi_transport_fc.c
+++ b/drivers/scsi/scsi_transport_fc.c
@@ -265,6 +265,7 @@ static const struct {
265 { FC_PORTSPEED_40GBIT, "40 Gbit" }, 265 { FC_PORTSPEED_40GBIT, "40 Gbit" },
266 { FC_PORTSPEED_50GBIT, "50 Gbit" }, 266 { FC_PORTSPEED_50GBIT, "50 Gbit" },
267 { FC_PORTSPEED_100GBIT, "100 Gbit" }, 267 { FC_PORTSPEED_100GBIT, "100 Gbit" },
268 { FC_PORTSPEED_25GBIT, "25 Gbit" },
268 { FC_PORTSPEED_NOT_NEGOTIATED, "Not Negotiated" }, 269 { FC_PORTSPEED_NOT_NEGOTIATED, "Not Negotiated" },
269}; 270};
270fc_bitfield_name_search(port_speed, fc_port_speed_names) 271fc_bitfield_name_search(port_speed, fc_port_speed_names)
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index 6b78476d04bb..dcc42446f58a 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -564,10 +564,12 @@ static int sd_major(int major_idx)
564 } 564 }
565} 565}
566 566
567static struct scsi_disk *__scsi_disk_get(struct gendisk *disk) 567static struct scsi_disk *scsi_disk_get(struct gendisk *disk)
568{ 568{
569 struct scsi_disk *sdkp = NULL; 569 struct scsi_disk *sdkp = NULL;
570 570
571 mutex_lock(&sd_ref_mutex);
572
571 if (disk->private_data) { 573 if (disk->private_data) {
572 sdkp = scsi_disk(disk); 574 sdkp = scsi_disk(disk);
573 if (scsi_device_get(sdkp->device) == 0) 575 if (scsi_device_get(sdkp->device) == 0)
@@ -575,27 +577,6 @@ static struct scsi_disk *__scsi_disk_get(struct gendisk *disk)
575 else 577 else
576 sdkp = NULL; 578 sdkp = NULL;
577 } 579 }
578 return sdkp;
579}
580
581static struct scsi_disk *scsi_disk_get(struct gendisk *disk)
582{
583 struct scsi_disk *sdkp;
584
585 mutex_lock(&sd_ref_mutex);
586 sdkp = __scsi_disk_get(disk);
587 mutex_unlock(&sd_ref_mutex);
588 return sdkp;
589}
590
591static struct scsi_disk *scsi_disk_get_from_dev(struct device *dev)
592{
593 struct scsi_disk *sdkp;
594
595 mutex_lock(&sd_ref_mutex);
596 sdkp = dev_get_drvdata(dev);
597 if (sdkp)
598 sdkp = __scsi_disk_get(sdkp->disk);
599 mutex_unlock(&sd_ref_mutex); 580 mutex_unlock(&sd_ref_mutex);
600 return sdkp; 581 return sdkp;
601} 582}
@@ -610,8 +591,6 @@ static void scsi_disk_put(struct scsi_disk *sdkp)
610 mutex_unlock(&sd_ref_mutex); 591 mutex_unlock(&sd_ref_mutex);
611} 592}
612 593
613
614
615static unsigned char sd_setup_protect_cmnd(struct scsi_cmnd *scmd, 594static unsigned char sd_setup_protect_cmnd(struct scsi_cmnd *scmd,
616 unsigned int dix, unsigned int dif) 595 unsigned int dix, unsigned int dif)
617{ 596{
@@ -1525,12 +1504,9 @@ static int sd_sync_cache(struct scsi_disk *sdkp)
1525 1504
1526static void sd_rescan(struct device *dev) 1505static void sd_rescan(struct device *dev)
1527{ 1506{
1528 struct scsi_disk *sdkp = scsi_disk_get_from_dev(dev); 1507 struct scsi_disk *sdkp = dev_get_drvdata(dev);
1529 1508
1530 if (sdkp) { 1509 revalidate_disk(sdkp->disk);
1531 revalidate_disk(sdkp->disk);
1532 scsi_disk_put(sdkp);
1533 }
1534} 1510}
1535 1511
1536 1512
@@ -2235,11 +2211,11 @@ got_data:
2235 2211
2236 { 2212 {
2237 char cap_str_2[10], cap_str_10[10]; 2213 char cap_str_2[10], cap_str_10[10];
2238 u64 sz = (u64)sdkp->capacity << ilog2(sector_size);
2239 2214
2240 string_get_size(sz, STRING_UNITS_2, cap_str_2, 2215 string_get_size(sdkp->capacity, sector_size,
2241 sizeof(cap_str_2)); 2216 STRING_UNITS_2, cap_str_2, sizeof(cap_str_2));
2242 string_get_size(sz, STRING_UNITS_10, cap_str_10, 2217 string_get_size(sdkp->capacity, sector_size,
2218 STRING_UNITS_10, cap_str_10,
2243 sizeof(cap_str_10)); 2219 sizeof(cap_str_10));
2244 2220
2245 if (sdkp->first_scan || old_capacity != sdkp->capacity) { 2221 if (sdkp->first_scan || old_capacity != sdkp->capacity) {
@@ -3149,13 +3125,13 @@ static int sd_start_stop_device(struct scsi_disk *sdkp, int start)
3149 */ 3125 */
3150static void sd_shutdown(struct device *dev) 3126static void sd_shutdown(struct device *dev)
3151{ 3127{
3152 struct scsi_disk *sdkp = scsi_disk_get_from_dev(dev); 3128 struct scsi_disk *sdkp = dev_get_drvdata(dev);
3153 3129
3154 if (!sdkp) 3130 if (!sdkp)
3155 return; /* this can happen */ 3131 return; /* this can happen */
3156 3132
3157 if (pm_runtime_suspended(dev)) 3133 if (pm_runtime_suspended(dev))
3158 goto exit; 3134 return;
3159 3135
3160 if (sdkp->WCE && sdkp->media_present) { 3136 if (sdkp->WCE && sdkp->media_present) {
3161 sd_printk(KERN_NOTICE, sdkp, "Synchronizing SCSI cache\n"); 3137 sd_printk(KERN_NOTICE, sdkp, "Synchronizing SCSI cache\n");
@@ -3166,14 +3142,11 @@ static void sd_shutdown(struct device *dev)
3166 sd_printk(KERN_NOTICE, sdkp, "Stopping disk\n"); 3142 sd_printk(KERN_NOTICE, sdkp, "Stopping disk\n");
3167 sd_start_stop_device(sdkp, 0); 3143 sd_start_stop_device(sdkp, 0);
3168 } 3144 }
3169
3170exit:
3171 scsi_disk_put(sdkp);
3172} 3145}
3173 3146
3174static int sd_suspend_common(struct device *dev, bool ignore_stop_errors) 3147static int sd_suspend_common(struct device *dev, bool ignore_stop_errors)
3175{ 3148{
3176 struct scsi_disk *sdkp = scsi_disk_get_from_dev(dev); 3149 struct scsi_disk *sdkp = dev_get_drvdata(dev);
3177 int ret = 0; 3150 int ret = 0;
3178 3151
3179 if (!sdkp) 3152 if (!sdkp)
@@ -3199,7 +3172,6 @@ static int sd_suspend_common(struct device *dev, bool ignore_stop_errors)
3199 } 3172 }
3200 3173
3201done: 3174done:
3202 scsi_disk_put(sdkp);
3203 return ret; 3175 return ret;
3204} 3176}
3205 3177
@@ -3215,18 +3187,13 @@ static int sd_suspend_runtime(struct device *dev)
3215 3187
3216static int sd_resume(struct device *dev) 3188static int sd_resume(struct device *dev)
3217{ 3189{
3218 struct scsi_disk *sdkp = scsi_disk_get_from_dev(dev); 3190 struct scsi_disk *sdkp = dev_get_drvdata(dev);
3219 int ret = 0;
3220 3191
3221 if (!sdkp->device->manage_start_stop) 3192 if (!sdkp->device->manage_start_stop)
3222 goto done; 3193 return 0;
3223 3194
3224 sd_printk(KERN_NOTICE, sdkp, "Starting disk\n"); 3195 sd_printk(KERN_NOTICE, sdkp, "Starting disk\n");
3225 ret = sd_start_stop_device(sdkp, 1); 3196 return sd_start_stop_device(sdkp, 1);
3226
3227done:
3228 scsi_disk_put(sdkp);
3229 return ret;
3230} 3197}
3231 3198
3232/** 3199/**
diff --git a/drivers/scsi/storvsc_drv.c b/drivers/scsi/storvsc_drv.c
index efc6e446b6c8..d9dad90344d5 100644
--- a/drivers/scsi/storvsc_drv.c
+++ b/drivers/scsi/storvsc_drv.c
@@ -308,11 +308,16 @@ enum storvsc_request_type {
308 * This is the end of Protocol specific defines. 308 * This is the end of Protocol specific defines.
309 */ 309 */
310 310
311static int storvsc_ringbuffer_size = (20 * PAGE_SIZE); 311static int storvsc_ringbuffer_size = (256 * PAGE_SIZE);
312static u32 max_outstanding_req_per_channel;
313
314static int storvsc_vcpus_per_sub_channel = 4;
312 315
313module_param(storvsc_ringbuffer_size, int, S_IRUGO); 316module_param(storvsc_ringbuffer_size, int, S_IRUGO);
314MODULE_PARM_DESC(storvsc_ringbuffer_size, "Ring buffer size (bytes)"); 317MODULE_PARM_DESC(storvsc_ringbuffer_size, "Ring buffer size (bytes)");
315 318
319module_param(storvsc_vcpus_per_sub_channel, int, S_IRUGO);
320MODULE_PARM_DESC(vcpus_per_sub_channel, "Ratio of VCPUs to subchannels");
316/* 321/*
317 * Timeout in seconds for all devices managed by this driver. 322 * Timeout in seconds for all devices managed by this driver.
318 */ 323 */
@@ -320,7 +325,6 @@ static int storvsc_timeout = 180;
320 325
321static int msft_blist_flags = BLIST_TRY_VPD_PAGES; 326static int msft_blist_flags = BLIST_TRY_VPD_PAGES;
322 327
323#define STORVSC_MAX_IO_REQUESTS 200
324 328
325static void storvsc_on_channel_callback(void *context); 329static void storvsc_on_channel_callback(void *context);
326 330
@@ -347,7 +351,10 @@ struct storvsc_cmd_request {
347 /* Synchronize the request/response if needed */ 351 /* Synchronize the request/response if needed */
348 struct completion wait_event; 352 struct completion wait_event;
349 353
350 struct hv_multipage_buffer data_buffer; 354 struct vmbus_channel_packet_multipage_buffer mpb;
355 struct vmbus_packet_mpb_array *payload;
356 u32 payload_sz;
357
351 struct vstor_packet vstor_packet; 358 struct vstor_packet vstor_packet;
352}; 359};
353 360
@@ -373,6 +380,10 @@ struct storvsc_device {
373 unsigned char path_id; 380 unsigned char path_id;
374 unsigned char target_id; 381 unsigned char target_id;
375 382
383 /*
384 * Max I/O, the device can support.
385 */
386 u32 max_transfer_bytes;
376 /* Used for vsc/vsp channel reset process */ 387 /* Used for vsc/vsp channel reset process */
377 struct storvsc_cmd_request init_request; 388 struct storvsc_cmd_request init_request;
378 struct storvsc_cmd_request reset_request; 389 struct storvsc_cmd_request reset_request;
@@ -618,19 +629,6 @@ cleanup:
618 return NULL; 629 return NULL;
619} 630}
620 631
621/* Disgusting wrapper functions */
622static inline unsigned long sg_kmap_atomic(struct scatterlist *sgl, int idx)
623{
624 void *addr = kmap_atomic(sg_page(sgl + idx));
625 return (unsigned long)addr;
626}
627
628static inline void sg_kunmap_atomic(unsigned long addr)
629{
630 kunmap_atomic((void *)addr);
631}
632
633
634/* Assume the original sgl has enough room */ 632/* Assume the original sgl has enough room */
635static unsigned int copy_from_bounce_buffer(struct scatterlist *orig_sgl, 633static unsigned int copy_from_bounce_buffer(struct scatterlist *orig_sgl,
636 struct scatterlist *bounce_sgl, 634 struct scatterlist *bounce_sgl,
@@ -645,32 +643,38 @@ static unsigned int copy_from_bounce_buffer(struct scatterlist *orig_sgl,
645 unsigned long bounce_addr = 0; 643 unsigned long bounce_addr = 0;
646 unsigned long dest_addr = 0; 644 unsigned long dest_addr = 0;
647 unsigned long flags; 645 unsigned long flags;
646 struct scatterlist *cur_dest_sgl;
647 struct scatterlist *cur_src_sgl;
648 648
649 local_irq_save(flags); 649 local_irq_save(flags);
650 650 cur_dest_sgl = orig_sgl;
651 cur_src_sgl = bounce_sgl;
651 for (i = 0; i < orig_sgl_count; i++) { 652 for (i = 0; i < orig_sgl_count; i++) {
652 dest_addr = sg_kmap_atomic(orig_sgl,i) + orig_sgl[i].offset; 653 dest_addr = (unsigned long)
654 kmap_atomic(sg_page(cur_dest_sgl)) +
655 cur_dest_sgl->offset;
653 dest = dest_addr; 656 dest = dest_addr;
654 destlen = orig_sgl[i].length; 657 destlen = cur_dest_sgl->length;
655 658
656 if (bounce_addr == 0) 659 if (bounce_addr == 0)
657 bounce_addr = sg_kmap_atomic(bounce_sgl,j); 660 bounce_addr = (unsigned long)kmap_atomic(
661 sg_page(cur_src_sgl));
658 662
659 while (destlen) { 663 while (destlen) {
660 src = bounce_addr + bounce_sgl[j].offset; 664 src = bounce_addr + cur_src_sgl->offset;
661 srclen = bounce_sgl[j].length - bounce_sgl[j].offset; 665 srclen = cur_src_sgl->length - cur_src_sgl->offset;
662 666
663 copylen = min(srclen, destlen); 667 copylen = min(srclen, destlen);
664 memcpy((void *)dest, (void *)src, copylen); 668 memcpy((void *)dest, (void *)src, copylen);
665 669
666 total_copied += copylen; 670 total_copied += copylen;
667 bounce_sgl[j].offset += copylen; 671 cur_src_sgl->offset += copylen;
668 destlen -= copylen; 672 destlen -= copylen;
669 dest += copylen; 673 dest += copylen;
670 674
671 if (bounce_sgl[j].offset == bounce_sgl[j].length) { 675 if (cur_src_sgl->offset == cur_src_sgl->length) {
672 /* full */ 676 /* full */
673 sg_kunmap_atomic(bounce_addr); 677 kunmap_atomic((void *)bounce_addr);
674 j++; 678 j++;
675 679
676 /* 680 /*
@@ -684,21 +688,27 @@ static unsigned int copy_from_bounce_buffer(struct scatterlist *orig_sgl,
684 /* 688 /*
685 * We are done; cleanup and return. 689 * We are done; cleanup and return.
686 */ 690 */
687 sg_kunmap_atomic(dest_addr - orig_sgl[i].offset); 691 kunmap_atomic((void *)(dest_addr -
692 cur_dest_sgl->offset));
688 local_irq_restore(flags); 693 local_irq_restore(flags);
689 return total_copied; 694 return total_copied;
690 } 695 }
691 696
692 /* if we need to use another bounce buffer */ 697 /* if we need to use another bounce buffer */
693 if (destlen || i != orig_sgl_count - 1) 698 if (destlen || i != orig_sgl_count - 1) {
694 bounce_addr = sg_kmap_atomic(bounce_sgl,j); 699 cur_src_sgl = sg_next(cur_src_sgl);
700 bounce_addr = (unsigned long)
701 kmap_atomic(
702 sg_page(cur_src_sgl));
703 }
695 } else if (destlen == 0 && i == orig_sgl_count - 1) { 704 } else if (destlen == 0 && i == orig_sgl_count - 1) {
696 /* unmap the last bounce that is < PAGE_SIZE */ 705 /* unmap the last bounce that is < PAGE_SIZE */
697 sg_kunmap_atomic(bounce_addr); 706 kunmap_atomic((void *)bounce_addr);
698 } 707 }
699 } 708 }
700 709
701 sg_kunmap_atomic(dest_addr - orig_sgl[i].offset); 710 kunmap_atomic((void *)(dest_addr - cur_dest_sgl->offset));
711 cur_dest_sgl = sg_next(cur_dest_sgl);
702 } 712 }
703 713
704 local_irq_restore(flags); 714 local_irq_restore(flags);
@@ -719,48 +729,62 @@ static unsigned int copy_to_bounce_buffer(struct scatterlist *orig_sgl,
719 unsigned long bounce_addr = 0; 729 unsigned long bounce_addr = 0;
720 unsigned long src_addr = 0; 730 unsigned long src_addr = 0;
721 unsigned long flags; 731 unsigned long flags;
732 struct scatterlist *cur_src_sgl;
733 struct scatterlist *cur_dest_sgl;
722 734
723 local_irq_save(flags); 735 local_irq_save(flags);
724 736
737 cur_src_sgl = orig_sgl;
738 cur_dest_sgl = bounce_sgl;
739
725 for (i = 0; i < orig_sgl_count; i++) { 740 for (i = 0; i < orig_sgl_count; i++) {
726 src_addr = sg_kmap_atomic(orig_sgl,i) + orig_sgl[i].offset; 741 src_addr = (unsigned long)
742 kmap_atomic(sg_page(cur_src_sgl)) +
743 cur_src_sgl->offset;
727 src = src_addr; 744 src = src_addr;
728 srclen = orig_sgl[i].length; 745 srclen = cur_src_sgl->length;
729 746
730 if (bounce_addr == 0) 747 if (bounce_addr == 0)
731 bounce_addr = sg_kmap_atomic(bounce_sgl,j); 748 bounce_addr = (unsigned long)
749 kmap_atomic(sg_page(cur_dest_sgl));
732 750
733 while (srclen) { 751 while (srclen) {
734 /* assume bounce offset always == 0 */ 752 /* assume bounce offset always == 0 */
735 dest = bounce_addr + bounce_sgl[j].length; 753 dest = bounce_addr + cur_dest_sgl->length;
736 destlen = PAGE_SIZE - bounce_sgl[j].length; 754 destlen = PAGE_SIZE - cur_dest_sgl->length;
737 755
738 copylen = min(srclen, destlen); 756 copylen = min(srclen, destlen);
739 memcpy((void *)dest, (void *)src, copylen); 757 memcpy((void *)dest, (void *)src, copylen);
740 758
741 total_copied += copylen; 759 total_copied += copylen;
742 bounce_sgl[j].length += copylen; 760 cur_dest_sgl->length += copylen;
743 srclen -= copylen; 761 srclen -= copylen;
744 src += copylen; 762 src += copylen;
745 763
746 if (bounce_sgl[j].length == PAGE_SIZE) { 764 if (cur_dest_sgl->length == PAGE_SIZE) {
747 /* full..move to next entry */ 765 /* full..move to next entry */
748 sg_kunmap_atomic(bounce_addr); 766 kunmap_atomic((void *)bounce_addr);
767 bounce_addr = 0;
749 j++; 768 j++;
769 }
750 770
751 /* if we need to use another bounce buffer */ 771 /* if we need to use another bounce buffer */
752 if (srclen || i != orig_sgl_count - 1) 772 if (srclen && bounce_addr == 0) {
753 bounce_addr = sg_kmap_atomic(bounce_sgl,j); 773 cur_dest_sgl = sg_next(cur_dest_sgl);
754 774 bounce_addr = (unsigned long)
755 } else if (srclen == 0 && i == orig_sgl_count - 1) { 775 kmap_atomic(
756 /* unmap the last bounce that is < PAGE_SIZE */ 776 sg_page(cur_dest_sgl));
757 sg_kunmap_atomic(bounce_addr);
758 } 777 }
778
759 } 779 }
760 780
761 sg_kunmap_atomic(src_addr - orig_sgl[i].offset); 781 kunmap_atomic((void *)(src_addr - cur_src_sgl->offset));
782 cur_src_sgl = sg_next(cur_src_sgl);
762 } 783 }
763 784
785 if (bounce_addr)
786 kunmap_atomic((void *)bounce_addr);
787
764 local_irq_restore(flags); 788 local_irq_restore(flags);
765 789
766 return total_copied; 790 return total_copied;
@@ -970,6 +994,8 @@ static int storvsc_channel_init(struct hv_device *device)
970 STORAGE_CHANNEL_SUPPORTS_MULTI_CHANNEL) 994 STORAGE_CHANNEL_SUPPORTS_MULTI_CHANNEL)
971 process_sub_channels = true; 995 process_sub_channels = true;
972 } 996 }
997 stor_device->max_transfer_bytes =
998 vstor_packet->storage_channel_properties.max_transfer_bytes;
973 999
974 memset(vstor_packet, 0, sizeof(struct vstor_packet)); 1000 memset(vstor_packet, 0, sizeof(struct vstor_packet));
975 vstor_packet->operation = VSTOR_OPERATION_END_INITIALIZATION; 1001 vstor_packet->operation = VSTOR_OPERATION_END_INITIALIZATION;
@@ -1080,6 +1106,8 @@ static void storvsc_command_completion(struct storvsc_cmd_request *cmd_request)
1080 struct Scsi_Host *host; 1106 struct Scsi_Host *host;
1081 struct storvsc_device *stor_dev; 1107 struct storvsc_device *stor_dev;
1082 struct hv_device *dev = host_dev->dev; 1108 struct hv_device *dev = host_dev->dev;
1109 u32 payload_sz = cmd_request->payload_sz;
1110 void *payload = cmd_request->payload;
1083 1111
1084 stor_dev = get_in_stor_device(dev); 1112 stor_dev = get_in_stor_device(dev);
1085 host = stor_dev->host; 1113 host = stor_dev->host;
@@ -1109,10 +1137,14 @@ static void storvsc_command_completion(struct storvsc_cmd_request *cmd_request)
1109 sense_hdr.ascq); 1137 sense_hdr.ascq);
1110 1138
1111 scsi_set_resid(scmnd, 1139 scsi_set_resid(scmnd,
1112 cmd_request->data_buffer.len - 1140 cmd_request->payload->range.len -
1113 vm_srb->data_transfer_length); 1141 vm_srb->data_transfer_length);
1114 1142
1115 scmnd->scsi_done(scmnd); 1143 scmnd->scsi_done(scmnd);
1144
1145 if (payload_sz >
1146 sizeof(struct vmbus_channel_packet_multipage_buffer))
1147 kfree(payload);
1116} 1148}
1117 1149
1118static void storvsc_on_io_completion(struct hv_device *device, 1150static void storvsc_on_io_completion(struct hv_device *device,
@@ -1314,7 +1346,7 @@ static int storvsc_dev_remove(struct hv_device *device)
1314} 1346}
1315 1347
1316static int storvsc_do_io(struct hv_device *device, 1348static int storvsc_do_io(struct hv_device *device,
1317 struct storvsc_cmd_request *request) 1349 struct storvsc_cmd_request *request)
1318{ 1350{
1319 struct storvsc_device *stor_device; 1351 struct storvsc_device *stor_device;
1320 struct vstor_packet *vstor_packet; 1352 struct vstor_packet *vstor_packet;
@@ -1346,19 +1378,20 @@ static int storvsc_do_io(struct hv_device *device,
1346 1378
1347 1379
1348 vstor_packet->vm_srb.data_transfer_length = 1380 vstor_packet->vm_srb.data_transfer_length =
1349 request->data_buffer.len; 1381 request->payload->range.len;
1350 1382
1351 vstor_packet->operation = VSTOR_OPERATION_EXECUTE_SRB; 1383 vstor_packet->operation = VSTOR_OPERATION_EXECUTE_SRB;
1352 1384
1353 if (request->data_buffer.len) { 1385 if (request->payload->range.len) {
1354 ret = vmbus_sendpacket_multipagebuffer(outgoing_channel, 1386
1355 &request->data_buffer, 1387 ret = vmbus_sendpacket_mpb_desc(outgoing_channel,
1388 request->payload, request->payload_sz,
1356 vstor_packet, 1389 vstor_packet,
1357 (sizeof(struct vstor_packet) - 1390 (sizeof(struct vstor_packet) -
1358 vmscsi_size_delta), 1391 vmscsi_size_delta),
1359 (unsigned long)request); 1392 (unsigned long)request);
1360 } else { 1393 } else {
1361 ret = vmbus_sendpacket(device->channel, vstor_packet, 1394 ret = vmbus_sendpacket(outgoing_channel, vstor_packet,
1362 (sizeof(struct vstor_packet) - 1395 (sizeof(struct vstor_packet) -
1363 vmscsi_size_delta), 1396 vmscsi_size_delta),
1364 (unsigned long)request, 1397 (unsigned long)request,
@@ -1376,7 +1409,6 @@ static int storvsc_do_io(struct hv_device *device,
1376 1409
1377static int storvsc_device_configure(struct scsi_device *sdevice) 1410static int storvsc_device_configure(struct scsi_device *sdevice)
1378{ 1411{
1379 scsi_change_queue_depth(sdevice, STORVSC_MAX_IO_REQUESTS);
1380 1412
1381 blk_queue_max_segment_size(sdevice->request_queue, PAGE_SIZE); 1413 blk_queue_max_segment_size(sdevice->request_queue, PAGE_SIZE);
1382 1414
@@ -1526,6 +1558,10 @@ static int storvsc_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scmnd)
1526 struct scatterlist *sgl; 1558 struct scatterlist *sgl;
1527 unsigned int sg_count = 0; 1559 unsigned int sg_count = 0;
1528 struct vmscsi_request *vm_srb; 1560 struct vmscsi_request *vm_srb;
1561 struct scatterlist *cur_sgl;
1562 struct vmbus_packet_mpb_array *payload;
1563 u32 payload_sz;
1564 u32 length;
1529 1565
1530 if (vmstor_current_major <= VMSTOR_WIN8_MAJOR) { 1566 if (vmstor_current_major <= VMSTOR_WIN8_MAJOR) {
1531 /* 1567 /*
@@ -1579,46 +1615,71 @@ static int storvsc_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scmnd)
1579 1615
1580 memcpy(vm_srb->cdb, scmnd->cmnd, vm_srb->cdb_length); 1616 memcpy(vm_srb->cdb, scmnd->cmnd, vm_srb->cdb_length);
1581 1617
1582 cmd_request->data_buffer.len = scsi_bufflen(scmnd); 1618 sgl = (struct scatterlist *)scsi_sglist(scmnd);
1583 if (scsi_sg_count(scmnd)) { 1619 sg_count = scsi_sg_count(scmnd);
1584 sgl = (struct scatterlist *)scsi_sglist(scmnd); 1620
1585 sg_count = scsi_sg_count(scmnd); 1621 length = scsi_bufflen(scmnd);
1622 payload = (struct vmbus_packet_mpb_array *)&cmd_request->mpb;
1623 payload_sz = sizeof(cmd_request->mpb);
1586 1624
1625 if (sg_count) {
1587 /* check if we need to bounce the sgl */ 1626 /* check if we need to bounce the sgl */
1588 if (do_bounce_buffer(sgl, scsi_sg_count(scmnd)) != -1) { 1627 if (do_bounce_buffer(sgl, scsi_sg_count(scmnd)) != -1) {
1589 cmd_request->bounce_sgl = 1628 cmd_request->bounce_sgl =
1590 create_bounce_buffer(sgl, scsi_sg_count(scmnd), 1629 create_bounce_buffer(sgl, sg_count,
1591 scsi_bufflen(scmnd), 1630 length,
1592 vm_srb->data_in); 1631 vm_srb->data_in);
1593 if (!cmd_request->bounce_sgl) 1632 if (!cmd_request->bounce_sgl)
1594 return SCSI_MLQUEUE_HOST_BUSY; 1633 return SCSI_MLQUEUE_HOST_BUSY;
1595 1634
1596 cmd_request->bounce_sgl_count = 1635 cmd_request->bounce_sgl_count =
1597 ALIGN(scsi_bufflen(scmnd), PAGE_SIZE) >> 1636 ALIGN(length, PAGE_SIZE) >> PAGE_SHIFT;
1598 PAGE_SHIFT;
1599 1637
1600 if (vm_srb->data_in == WRITE_TYPE) 1638 if (vm_srb->data_in == WRITE_TYPE)
1601 copy_to_bounce_buffer(sgl, 1639 copy_to_bounce_buffer(sgl,
1602 cmd_request->bounce_sgl, 1640 cmd_request->bounce_sgl, sg_count);
1603 scsi_sg_count(scmnd));
1604 1641
1605 sgl = cmd_request->bounce_sgl; 1642 sgl = cmd_request->bounce_sgl;
1606 sg_count = cmd_request->bounce_sgl_count; 1643 sg_count = cmd_request->bounce_sgl_count;
1607 } 1644 }
1608 1645
1609 cmd_request->data_buffer.offset = sgl[0].offset;
1610 1646
1611 for (i = 0; i < sg_count; i++) 1647 if (sg_count > MAX_PAGE_BUFFER_COUNT) {
1612 cmd_request->data_buffer.pfn_array[i] = 1648
1613 page_to_pfn(sg_page((&sgl[i]))); 1649 payload_sz = (sg_count * sizeof(void *) +
1650 sizeof(struct vmbus_packet_mpb_array));
1651 payload = kmalloc(payload_sz, GFP_ATOMIC);
1652 if (!payload) {
1653 if (cmd_request->bounce_sgl_count)
1654 destroy_bounce_buffer(
1655 cmd_request->bounce_sgl,
1656 cmd_request->bounce_sgl_count);
1657
1658 return SCSI_MLQUEUE_DEVICE_BUSY;
1659 }
1660 }
1661
1662 payload->range.len = length;
1663 payload->range.offset = sgl[0].offset;
1664
1665 cur_sgl = sgl;
1666 for (i = 0; i < sg_count; i++) {
1667 payload->range.pfn_array[i] =
1668 page_to_pfn(sg_page((cur_sgl)));
1669 cur_sgl = sg_next(cur_sgl);
1670 }
1614 1671
1615 } else if (scsi_sglist(scmnd)) { 1672 } else if (scsi_sglist(scmnd)) {
1616 cmd_request->data_buffer.offset = 1673 payload->range.len = length;
1674 payload->range.offset =
1617 virt_to_phys(scsi_sglist(scmnd)) & (PAGE_SIZE-1); 1675 virt_to_phys(scsi_sglist(scmnd)) & (PAGE_SIZE-1);
1618 cmd_request->data_buffer.pfn_array[0] = 1676 payload->range.pfn_array[0] =
1619 virt_to_phys(scsi_sglist(scmnd)) >> PAGE_SHIFT; 1677 virt_to_phys(scsi_sglist(scmnd)) >> PAGE_SHIFT;
1620 } 1678 }
1621 1679
1680 cmd_request->payload = payload;
1681 cmd_request->payload_sz = payload_sz;
1682
1622 /* Invokes the vsc to start an IO */ 1683 /* Invokes the vsc to start an IO */
1623 ret = storvsc_do_io(dev, cmd_request); 1684 ret = storvsc_do_io(dev, cmd_request);
1624 1685
@@ -1646,12 +1707,8 @@ static struct scsi_host_template scsi_driver = {
1646 .eh_timed_out = storvsc_eh_timed_out, 1707 .eh_timed_out = storvsc_eh_timed_out,
1647 .slave_configure = storvsc_device_configure, 1708 .slave_configure = storvsc_device_configure,
1648 .cmd_per_lun = 255, 1709 .cmd_per_lun = 255,
1649 .can_queue = STORVSC_MAX_IO_REQUESTS*STORVSC_MAX_TARGETS,
1650 .this_id = -1, 1710 .this_id = -1,
1651 /* no use setting to 0 since ll_blk_rw reset it to 1 */ 1711 .use_clustering = ENABLE_CLUSTERING,
1652 /* currently 32 */
1653 .sg_tablesize = MAX_MULTIPAGE_BUFFER_COUNT,
1654 .use_clustering = DISABLE_CLUSTERING,
1655 /* Make sure we dont get a sg segment crosses a page boundary */ 1712 /* Make sure we dont get a sg segment crosses a page boundary */
1656 .dma_boundary = PAGE_SIZE-1, 1713 .dma_boundary = PAGE_SIZE-1,
1657 .no_write_same = 1, 1714 .no_write_same = 1,
@@ -1686,6 +1743,7 @@ static int storvsc_probe(struct hv_device *device,
1686 const struct hv_vmbus_device_id *dev_id) 1743 const struct hv_vmbus_device_id *dev_id)
1687{ 1744{
1688 int ret; 1745 int ret;
1746 int num_cpus = num_online_cpus();
1689 struct Scsi_Host *host; 1747 struct Scsi_Host *host;
1690 struct hv_host_device *host_dev; 1748 struct hv_host_device *host_dev;
1691 bool dev_is_ide = ((dev_id->driver_data == IDE_GUID) ? true : false); 1749 bool dev_is_ide = ((dev_id->driver_data == IDE_GUID) ? true : false);
@@ -1694,6 +1752,7 @@ static int storvsc_probe(struct hv_device *device,
1694 int max_luns_per_target; 1752 int max_luns_per_target;
1695 int max_targets; 1753 int max_targets;
1696 int max_channels; 1754 int max_channels;
1755 int max_sub_channels = 0;
1697 1756
1698 /* 1757 /*
1699 * Based on the windows host we are running on, 1758 * Based on the windows host we are running on,
@@ -1719,12 +1778,18 @@ static int storvsc_probe(struct hv_device *device,
1719 max_luns_per_target = STORVSC_MAX_LUNS_PER_TARGET; 1778 max_luns_per_target = STORVSC_MAX_LUNS_PER_TARGET;
1720 max_targets = STORVSC_MAX_TARGETS; 1779 max_targets = STORVSC_MAX_TARGETS;
1721 max_channels = STORVSC_MAX_CHANNELS; 1780 max_channels = STORVSC_MAX_CHANNELS;
1781 /*
1782 * On Windows8 and above, we support sub-channels for storage.
1783 * The number of sub-channels offerred is based on the number of
1784 * VCPUs in the guest.
1785 */
1786 max_sub_channels = (num_cpus / storvsc_vcpus_per_sub_channel);
1722 break; 1787 break;
1723 } 1788 }
1724 1789
1725 if (dev_id->driver_data == SFC_GUID) 1790 scsi_driver.can_queue = (max_outstanding_req_per_channel *
1726 scsi_driver.can_queue = (STORVSC_MAX_IO_REQUESTS * 1791 (max_sub_channels + 1));
1727 STORVSC_FC_MAX_TARGETS); 1792
1728 host = scsi_host_alloc(&scsi_driver, 1793 host = scsi_host_alloc(&scsi_driver,
1729 sizeof(struct hv_host_device)); 1794 sizeof(struct hv_host_device));
1730 if (!host) 1795 if (!host)
@@ -1780,6 +1845,12 @@ static int storvsc_probe(struct hv_device *device,
1780 /* max cmd length */ 1845 /* max cmd length */
1781 host->max_cmd_len = STORVSC_MAX_CMD_LEN; 1846 host->max_cmd_len = STORVSC_MAX_CMD_LEN;
1782 1847
1848 /*
1849 * set the table size based on the info we got
1850 * from the host.
1851 */
1852 host->sg_tablesize = (stor_device->max_transfer_bytes >> PAGE_SHIFT);
1853
1783 /* Register the HBA and start the scsi bus scan */ 1854 /* Register the HBA and start the scsi bus scan */
1784 ret = scsi_add_host(host, &device->device); 1855 ret = scsi_add_host(host, &device->device);
1785 if (ret != 0) 1856 if (ret != 0)
@@ -1837,7 +1908,6 @@ static struct hv_driver storvsc_drv = {
1837 1908
1838static int __init storvsc_drv_init(void) 1909static int __init storvsc_drv_init(void)
1839{ 1910{
1840 u32 max_outstanding_req_per_channel;
1841 1911
1842 /* 1912 /*
1843 * Divide the ring buffer data size (which is 1 page less 1913 * Divide the ring buffer data size (which is 1 page less
@@ -1852,10 +1922,6 @@ static int __init storvsc_drv_init(void)
1852 vmscsi_size_delta, 1922 vmscsi_size_delta,
1853 sizeof(u64))); 1923 sizeof(u64)));
1854 1924
1855 if (max_outstanding_req_per_channel <
1856 STORVSC_MAX_IO_REQUESTS)
1857 return -EINVAL;
1858
1859 return vmbus_driver_register(&storvsc_drv); 1925 return vmbus_driver_register(&storvsc_drv);
1860} 1926}
1861 1927
diff --git a/drivers/scsi/sun3_scsi.c b/drivers/scsi/sun3_scsi.c
index 2a906d1d34ba..22a42836d193 100644
--- a/drivers/scsi/sun3_scsi.c
+++ b/drivers/scsi/sun3_scsi.c
@@ -676,7 +676,6 @@ static struct platform_driver sun3_scsi_driver = {
676 .remove = __exit_p(sun3_scsi_remove), 676 .remove = __exit_p(sun3_scsi_remove),
677 .driver = { 677 .driver = {
678 .name = DRV_MODULE_NAME, 678 .name = DRV_MODULE_NAME,
679 .owner = THIS_MODULE,
680 }, 679 },
681}; 680};
682 681
diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
index 9217af9bf734..6652a8171de6 100644
--- a/drivers/scsi/ufs/ufs-qcom.c
+++ b/drivers/scsi/ufs/ufs-qcom.c
@@ -214,8 +214,6 @@ static int ufs_qcom_power_up_sequence(struct ufs_hba *hba)
214 struct ufs_qcom_host *host = hba->priv; 214 struct ufs_qcom_host *host = hba->priv;
215 struct phy *phy = host->generic_phy; 215 struct phy *phy = host->generic_phy;
216 int ret = 0; 216 int ret = 0;
217 u8 major;
218 u16 minor, step;
219 bool is_rate_B = (UFS_QCOM_LIMIT_HS_RATE == PA_HS_MODE_B) 217 bool is_rate_B = (UFS_QCOM_LIMIT_HS_RATE == PA_HS_MODE_B)
220 ? true : false; 218 ? true : false;
221 219
@@ -224,8 +222,6 @@ static int ufs_qcom_power_up_sequence(struct ufs_hba *hba)
224 /* provide 1ms delay to let the reset pulse propagate */ 222 /* provide 1ms delay to let the reset pulse propagate */
225 usleep_range(1000, 1100); 223 usleep_range(1000, 1100);
226 224
227 ufs_qcom_get_controller_revision(hba, &major, &minor, &step);
228 ufs_qcom_phy_save_controller_version(phy, major, minor, step);
229 ret = ufs_qcom_phy_calibrate_phy(phy, is_rate_B); 225 ret = ufs_qcom_phy_calibrate_phy(phy, is_rate_B);
230 if (ret) { 226 if (ret) {
231 dev_err(hba->dev, "%s: ufs_qcom_phy_calibrate_phy() failed, ret = %d\n", 227 dev_err(hba->dev, "%s: ufs_qcom_phy_calibrate_phy() failed, ret = %d\n",
@@ -698,16 +694,24 @@ out:
698 */ 694 */
699static void ufs_qcom_advertise_quirks(struct ufs_hba *hba) 695static void ufs_qcom_advertise_quirks(struct ufs_hba *hba)
700{ 696{
701 u8 major; 697 struct ufs_qcom_host *host = hba->priv;
702 u16 minor, step;
703 698
704 ufs_qcom_get_controller_revision(hba, &major, &minor, &step); 699 if (host->hw_ver.major == 0x1)
700 hba->quirks |= UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS;
705 701
706 /* 702 if (host->hw_ver.major >= 0x2) {
707 * TBD 703 if (!ufs_qcom_cap_qunipro(host))
708 * here we should be advertising controller quirks according to 704 /* Legacy UniPro mode still need following quirks */
709 * controller version. 705 hba->quirks |= UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS;
710 */ 706 }
707}
708
709static void ufs_qcom_set_caps(struct ufs_hba *hba)
710{
711 struct ufs_qcom_host *host = hba->priv;
712
713 if (host->hw_ver.major >= 0x2)
714 host->caps = UFS_QCOM_CAP_QUNIPRO;
711} 715}
712 716
713static int ufs_qcom_get_bus_vote(struct ufs_qcom_host *host, 717static int ufs_qcom_get_bus_vote(struct ufs_qcom_host *host,
@@ -929,6 +933,13 @@ static int ufs_qcom_init(struct ufs_hba *hba)
929 if (err) 933 if (err)
930 goto out_host_free; 934 goto out_host_free;
931 935
936 ufs_qcom_get_controller_revision(hba, &host->hw_ver.major,
937 &host->hw_ver.minor, &host->hw_ver.step);
938
939 /* update phy revision information before calling phy_init() */
940 ufs_qcom_phy_save_controller_version(host->generic_phy,
941 host->hw_ver.major, host->hw_ver.minor, host->hw_ver.step);
942
932 phy_init(host->generic_phy); 943 phy_init(host->generic_phy);
933 err = phy_power_on(host->generic_phy); 944 err = phy_power_on(host->generic_phy);
934 if (err) 945 if (err)
@@ -938,6 +949,7 @@ static int ufs_qcom_init(struct ufs_hba *hba)
938 if (err) 949 if (err)
939 goto out_disable_phy; 950 goto out_disable_phy;
940 951
952 ufs_qcom_set_caps(hba);
941 ufs_qcom_advertise_quirks(hba); 953 ufs_qcom_advertise_quirks(hba);
942 954
943 hba->caps |= UFSHCD_CAP_CLK_GATING | UFSHCD_CAP_CLK_SCALING; 955 hba->caps |= UFSHCD_CAP_CLK_GATING | UFSHCD_CAP_CLK_SCALING;
diff --git a/drivers/scsi/ufs/ufs-qcom.h b/drivers/scsi/ufs/ufs-qcom.h
index 9a6febd007df..db2c0a00e846 100644
--- a/drivers/scsi/ufs/ufs-qcom.h
+++ b/drivers/scsi/ufs/ufs-qcom.h
@@ -151,7 +151,23 @@ struct ufs_qcom_bus_vote {
151 struct device_attribute max_bus_bw; 151 struct device_attribute max_bus_bw;
152}; 152};
153 153
154/* Host controller hardware version: major.minor.step */
155struct ufs_hw_version {
156 u16 step;
157 u16 minor;
158 u8 major;
159};
154struct ufs_qcom_host { 160struct ufs_qcom_host {
161
162 /*
163 * Set this capability if host controller supports the QUniPro mode
164 * and if driver wants the Host controller to operate in QUniPro mode.
165 * Note: By default this capability will be kept enabled if host
166 * controller supports the QUniPro mode.
167 */
168 #define UFS_QCOM_CAP_QUNIPRO UFS_BIT(0)
169 u32 caps;
170
155 struct phy *generic_phy; 171 struct phy *generic_phy;
156 struct ufs_hba *hba; 172 struct ufs_hba *hba;
157 struct ufs_qcom_bus_vote bus_vote; 173 struct ufs_qcom_bus_vote bus_vote;
@@ -161,10 +177,20 @@ struct ufs_qcom_host {
161 struct clk *rx_l1_sync_clk; 177 struct clk *rx_l1_sync_clk;
162 struct clk *tx_l1_sync_clk; 178 struct clk *tx_l1_sync_clk;
163 bool is_lane_clks_enabled; 179 bool is_lane_clks_enabled;
180
181 struct ufs_hw_version hw_ver;
164}; 182};
165 183
166#define ufs_qcom_is_link_off(hba) ufshcd_is_link_off(hba) 184#define ufs_qcom_is_link_off(hba) ufshcd_is_link_off(hba)
167#define ufs_qcom_is_link_active(hba) ufshcd_is_link_active(hba) 185#define ufs_qcom_is_link_active(hba) ufshcd_is_link_active(hba)
168#define ufs_qcom_is_link_hibern8(hba) ufshcd_is_link_hibern8(hba) 186#define ufs_qcom_is_link_hibern8(hba) ufshcd_is_link_hibern8(hba)
169 187
188static inline bool ufs_qcom_cap_qunipro(struct ufs_qcom_host *host)
189{
190 if (host->caps & UFS_QCOM_CAP_QUNIPRO)
191 return true;
192 else
193 return false;
194}
195
170#endif /* UFS_QCOM_H_ */ 196#endif /* UFS_QCOM_H_ */
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 2aa85e398f76..648a44675880 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -183,6 +183,7 @@ static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
183static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on); 183static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
184static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba); 184static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
185static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba); 185static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
186static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
186static int ufshcd_host_reset_and_restore(struct ufs_hba *hba); 187static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
187static irqreturn_t ufshcd_intr(int irq, void *__hba); 188static irqreturn_t ufshcd_intr(int irq, void *__hba);
188static int ufshcd_config_pwr_mode(struct ufs_hba *hba, 189static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
@@ -972,6 +973,8 @@ ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
972 973
973 ufshcd_hold(hba, false); 974 ufshcd_hold(hba, false);
974 mutex_lock(&hba->uic_cmd_mutex); 975 mutex_lock(&hba->uic_cmd_mutex);
976 ufshcd_add_delay_before_dme_cmd(hba);
977
975 spin_lock_irqsave(hba->host->host_lock, flags); 978 spin_lock_irqsave(hba->host->host_lock, flags);
976 ret = __ufshcd_send_uic_cmd(hba, uic_cmd); 979 ret = __ufshcd_send_uic_cmd(hba, uic_cmd);
977 spin_unlock_irqrestore(hba->host->host_lock, flags); 980 spin_unlock_irqrestore(hba->host->host_lock, flags);
@@ -2058,6 +2061,37 @@ static int ufshcd_dme_link_startup(struct ufs_hba *hba)
2058 return ret; 2061 return ret;
2059} 2062}
2060 2063
2064static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
2065{
2066 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
2067 unsigned long min_sleep_time_us;
2068
2069 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
2070 return;
2071
2072 /*
2073 * last_dme_cmd_tstamp will be 0 only for 1st call to
2074 * this function
2075 */
2076 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
2077 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
2078 } else {
2079 unsigned long delta =
2080 (unsigned long) ktime_to_us(
2081 ktime_sub(ktime_get(),
2082 hba->last_dme_cmd_tstamp));
2083
2084 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
2085 min_sleep_time_us =
2086 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
2087 else
2088 return; /* no more delay required */
2089 }
2090
2091 /* allow sleep for extra 50us if needed */
2092 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
2093}
2094
2061/** 2095/**
2062 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET 2096 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
2063 * @hba: per adapter instance 2097 * @hba: per adapter instance
@@ -2157,6 +2191,7 @@ static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
2157 2191
2158 mutex_lock(&hba->uic_cmd_mutex); 2192 mutex_lock(&hba->uic_cmd_mutex);
2159 init_completion(&uic_async_done); 2193 init_completion(&uic_async_done);
2194 ufshcd_add_delay_before_dme_cmd(hba);
2160 2195
2161 spin_lock_irqsave(hba->host->host_lock, flags); 2196 spin_lock_irqsave(hba->host->host_lock, flags);
2162 hba->uic_async_done = &uic_async_done; 2197 hba->uic_async_done = &uic_async_done;
diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
index 4a574aa45855..b47ff07698e8 100644
--- a/drivers/scsi/ufs/ufshcd.h
+++ b/drivers/scsi/ufs/ufshcd.h
@@ -366,6 +366,7 @@ struct ufs_init_prefetch {
366 * @saved_err: sticky error mask 366 * @saved_err: sticky error mask
367 * @saved_uic_err: sticky UIC error mask 367 * @saved_uic_err: sticky UIC error mask
368 * @dev_cmd: ufs device management command information 368 * @dev_cmd: ufs device management command information
369 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
369 * @auto_bkops_enabled: to track whether bkops is enabled in device 370 * @auto_bkops_enabled: to track whether bkops is enabled in device
370 * @vreg_info: UFS device voltage regulator information 371 * @vreg_info: UFS device voltage regulator information
371 * @clk_list_head: UFS host controller clocks list node head 372 * @clk_list_head: UFS host controller clocks list node head
@@ -416,6 +417,13 @@ struct ufs_hba {
416 unsigned int irq; 417 unsigned int irq;
417 bool is_irq_enabled; 418 bool is_irq_enabled;
418 419
420 /*
421 * delay before each dme command is required as the unipro
422 * layer has shown instabilities
423 */
424 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(0)
425
426 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
419 427
420 wait_queue_head_t tm_wq; 428 wait_queue_head_t tm_wq;
421 wait_queue_head_t tm_tag_wq; 429 wait_queue_head_t tm_tag_wq;
@@ -446,6 +454,7 @@ struct ufs_hba {
446 454
447 /* Device management request data */ 455 /* Device management request data */
448 struct ufs_dev_cmd dev_cmd; 456 struct ufs_dev_cmd dev_cmd;
457 ktime_t last_dme_cmd_tstamp;
449 458
450 /* Keeps information of the UFS device connected to this host */ 459 /* Keeps information of the UFS device connected to this host */
451 struct ufs_dev_info dev_info; 460 struct ufs_dev_info dev_info;
diff --git a/drivers/ssb/Kconfig b/drivers/ssb/Kconfig
index 75b3603906c1..f0d22cdb51cd 100644
--- a/drivers/ssb/Kconfig
+++ b/drivers/ssb/Kconfig
@@ -130,6 +130,7 @@ config SSB_DRIVER_MIPS
130 bool "SSB Broadcom MIPS core driver" 130 bool "SSB Broadcom MIPS core driver"
131 depends on SSB && MIPS 131 depends on SSB && MIPS
132 select SSB_SERIAL 132 select SSB_SERIAL
133 select SSB_SFLASH
133 help 134 help
134 Driver for the Sonics Silicon Backplane attached 135 Driver for the Sonics Silicon Backplane attached
135 Broadcom MIPS core. 136 Broadcom MIPS core.
diff --git a/drivers/ssb/driver_chipcommon_pmu.c b/drivers/ssb/driver_chipcommon_pmu.c
index 1173a091b402..09428412139e 100644
--- a/drivers/ssb/driver_chipcommon_pmu.c
+++ b/drivers/ssb/driver_chipcommon_pmu.c
@@ -14,7 +14,7 @@
14#include <linux/delay.h> 14#include <linux/delay.h>
15#include <linux/export.h> 15#include <linux/export.h>
16#ifdef CONFIG_BCM47XX 16#ifdef CONFIG_BCM47XX
17#include <bcm47xx_nvram.h> 17#include <linux/bcm47xx_nvram.h>
18#endif 18#endif
19 19
20#include "ssb_private.h" 20#include "ssb_private.h"
diff --git a/drivers/ssb/driver_mipscore.c b/drivers/ssb/driver_mipscore.c
index 7b986f9f213f..f87efef42252 100644
--- a/drivers/ssb/driver_mipscore.c
+++ b/drivers/ssb/driver_mipscore.c
@@ -16,7 +16,7 @@
16#include <linux/serial_reg.h> 16#include <linux/serial_reg.h>
17#include <linux/time.h> 17#include <linux/time.h>
18#ifdef CONFIG_BCM47XX 18#ifdef CONFIG_BCM47XX
19#include <bcm47xx_nvram.h> 19#include <linux/bcm47xx_nvram.h>
20#endif 20#endif
21 21
22#include "ssb_private.h" 22#include "ssb_private.h"
diff --git a/drivers/staging/lustre/lustre/llite/rw26.c b/drivers/staging/lustre/lustre/llite/rw26.c
index 91442fab5725..c6c824356464 100644
--- a/drivers/staging/lustre/lustre/llite/rw26.c
+++ b/drivers/staging/lustre/lustre/llite/rw26.c
@@ -359,8 +359,8 @@ static ssize_t ll_direct_IO_26_seg(const struct lu_env *env, struct cl_io *io,
359 * up to 22MB for 128kB kmalloc and up to 682MB for 4MB kmalloc. */ 359 * up to 22MB for 128kB kmalloc and up to 682MB for 4MB kmalloc. */
360#define MAX_DIO_SIZE ((MAX_MALLOC / sizeof(struct brw_page) * PAGE_CACHE_SIZE) & \ 360#define MAX_DIO_SIZE ((MAX_MALLOC / sizeof(struct brw_page) * PAGE_CACHE_SIZE) & \
361 ~(DT_MAX_BRW_SIZE - 1)) 361 ~(DT_MAX_BRW_SIZE - 1))
362static ssize_t ll_direct_IO_26(int rw, struct kiocb *iocb, 362static ssize_t ll_direct_IO_26(struct kiocb *iocb, struct iov_iter *iter,
363 struct iov_iter *iter, loff_t file_offset) 363 loff_t file_offset)
364{ 364{
365 struct lu_env *env; 365 struct lu_env *env;
366 struct cl_io *io; 366 struct cl_io *io;
@@ -399,7 +399,7 @@ static ssize_t ll_direct_IO_26(int rw, struct kiocb *iocb,
399 * size changing by concurrent truncates and writes. 399 * size changing by concurrent truncates and writes.
400 * 1. Need inode mutex to operate transient pages. 400 * 1. Need inode mutex to operate transient pages.
401 */ 401 */
402 if (rw == READ) 402 if (iov_iter_rw(iter) == READ)
403 mutex_lock(&inode->i_mutex); 403 mutex_lock(&inode->i_mutex);
404 404
405 LASSERT(obj->cob_transient_pages == 0); 405 LASSERT(obj->cob_transient_pages == 0);
@@ -408,7 +408,7 @@ static ssize_t ll_direct_IO_26(int rw, struct kiocb *iocb,
408 size_t offs; 408 size_t offs;
409 409
410 count = min_t(size_t, iov_iter_count(iter), size); 410 count = min_t(size_t, iov_iter_count(iter), size);
411 if (rw == READ) { 411 if (iov_iter_rw(iter) == READ) {
412 if (file_offset >= i_size_read(inode)) 412 if (file_offset >= i_size_read(inode))
413 break; 413 break;
414 if (file_offset + count > i_size_read(inode)) 414 if (file_offset + count > i_size_read(inode))
@@ -418,11 +418,11 @@ static ssize_t ll_direct_IO_26(int rw, struct kiocb *iocb,
418 result = iov_iter_get_pages_alloc(iter, &pages, count, &offs); 418 result = iov_iter_get_pages_alloc(iter, &pages, count, &offs);
419 if (likely(result > 0)) { 419 if (likely(result > 0)) {
420 int n = DIV_ROUND_UP(result + offs, PAGE_SIZE); 420 int n = DIV_ROUND_UP(result + offs, PAGE_SIZE);
421 result = ll_direct_IO_26_seg(env, io, rw, inode, 421 result = ll_direct_IO_26_seg(env, io, iov_iter_rw(iter),
422 file->f_mapping, 422 inode, file->f_mapping,
423 result, file_offset, 423 result, file_offset, pages,
424 pages, n); 424 n);
425 ll_free_user_pages(pages, n, rw==READ); 425 ll_free_user_pages(pages, n, iov_iter_rw(iter) == READ);
426 } 426 }
427 if (unlikely(result <= 0)) { 427 if (unlikely(result <= 0)) {
428 /* If we can't allocate a large enough buffer 428 /* If we can't allocate a large enough buffer
@@ -449,11 +449,11 @@ static ssize_t ll_direct_IO_26(int rw, struct kiocb *iocb,
449 } 449 }
450out: 450out:
451 LASSERT(obj->cob_transient_pages == 0); 451 LASSERT(obj->cob_transient_pages == 0);
452 if (rw == READ) 452 if (iov_iter_rw(iter) == READ)
453 mutex_unlock(&inode->i_mutex); 453 mutex_unlock(&inode->i_mutex);
454 454
455 if (tot_bytes > 0) { 455 if (tot_bytes > 0) {
456 if (rw == WRITE) { 456 if (iov_iter_rw(iter) == WRITE) {
457 struct lov_stripe_md *lsm; 457 struct lov_stripe_md *lsm;
458 458
459 lsm = ccc_inode_lsm_get(inode); 459 lsm = ccc_inode_lsm_get(inode);
diff --git a/drivers/staging/octeon/ethernet-tx.c b/drivers/staging/octeon/ethernet-tx.c
index b7a7854d3f7e..5b9ac1f6d6f0 100644
--- a/drivers/staging/octeon/ethernet-tx.c
+++ b/drivers/staging/octeon/ethernet-tx.c
@@ -274,6 +274,9 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev)
274 274
275 /* Build the PKO command */ 275 /* Build the PKO command */
276 pko_command.u64 = 0; 276 pko_command.u64 = 0;
277#ifdef __LITTLE_ENDIAN
278 pko_command.s.le = 1;
279#endif
277 pko_command.s.n2 = 1; /* Don't pollute L2 with the outgoing packet */ 280 pko_command.s.n2 = 1; /* Don't pollute L2 with the outgoing packet */
278 pko_command.s.segs = 1; 281 pko_command.s.segs = 1;
279 pko_command.s.total_bytes = skb->len; 282 pko_command.s.total_bytes = skb->len;
@@ -410,7 +413,7 @@ dont_put_skbuff_in_hw:
410 /* Check if we can use the hardware checksumming */ 413 /* Check if we can use the hardware checksumming */
411 if (USE_HW_TCPUDP_CHECKSUM && (skb->protocol == htons(ETH_P_IP)) && 414 if (USE_HW_TCPUDP_CHECKSUM && (skb->protocol == htons(ETH_P_IP)) &&
412 (ip_hdr(skb)->version == 4) && (ip_hdr(skb)->ihl == 5) && 415 (ip_hdr(skb)->version == 4) && (ip_hdr(skb)->ihl == 5) &&
413 ((ip_hdr(skb)->frag_off == 0) || (ip_hdr(skb)->frag_off == 1 << 14)) 416 ((ip_hdr(skb)->frag_off == 0) || (ip_hdr(skb)->frag_off == htons(1 << 14)))
414 && ((ip_hdr(skb)->protocol == IPPROTO_TCP) 417 && ((ip_hdr(skb)->protocol == IPPROTO_TCP)
415 || (ip_hdr(skb)->protocol == IPPROTO_UDP))) { 418 || (ip_hdr(skb)->protocol == IPPROTO_UDP))) {
416 /* Use hardware checksum calc */ 419 /* Use hardware checksum calc */
diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c
index f539d82f2f11..fbbe866485c7 100644
--- a/drivers/staging/octeon/ethernet.c
+++ b/drivers/staging/octeon/ethernet.c
@@ -170,6 +170,16 @@ static void cvm_oct_configure_common_hw(void)
170 cvm_oct_mem_fill_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL, 170 cvm_oct_mem_fill_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL,
171 CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128); 171 CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128);
172 172
173#ifdef __LITTLE_ENDIAN
174 {
175 union cvmx_ipd_ctl_status ipd_ctl_status;
176 ipd_ctl_status.u64 = cvmx_read_csr(CVMX_IPD_CTL_STATUS);
177 ipd_ctl_status.s.pkt_lend = 1;
178 ipd_ctl_status.s.wqe_lend = 1;
179 cvmx_write_csr(CVMX_IPD_CTL_STATUS, ipd_ctl_status.u64);
180 }
181#endif
182
173 if (USE_RED) 183 if (USE_RED)
174 cvmx_helper_setup_red(num_packet_buffers / 4, 184 cvmx_helper_setup_red(num_packet_buffers / 4,
175 num_packet_buffers / 8); 185 num_packet_buffers / 8);
diff --git a/drivers/tty/Kconfig b/drivers/tty/Kconfig
index b24aa010f68c..c01f45095877 100644
--- a/drivers/tty/Kconfig
+++ b/drivers/tty/Kconfig
@@ -419,4 +419,51 @@ config DA_CONSOLE
419 help 419 help
420 This enables a console on a Dash channel. 420 This enables a console on a Dash channel.
421 421
422config MIPS_EJTAG_FDC_TTY
423 bool "MIPS EJTAG Fast Debug Channel TTY"
424 depends on MIPS_CDMM
425 help
426 This enables a TTY and console on the MIPS EJTAG Fast Debug Channels,
427 if they are present. This can be useful when working with an EJTAG
428 probe which supports it, to get console output and a login prompt via
429 EJTAG without needing to connect a serial cable.
430
431 TTY devices are named e.g. ttyFDC3c2 (for FDC channel 2 of the FDC on
432 CPU3).
433
434 The console can be enabled with console=fdc1 (for FDC channel 1 on all
435 CPUs). Do not use the console unless there is a debug probe attached
436 to drain the FDC TX FIFO.
437
438 If unsure, say N.
439
440config MIPS_EJTAG_FDC_EARLYCON
441 bool "Early FDC console"
442 depends on MIPS_EJTAG_FDC_TTY
443 help
444 This registers a console on FDC channel 1 very early during boot (from
445 MIPS arch code). This is useful for bring-up and debugging early boot
446 issues.
447
448 Do not enable unless there is a debug probe attached to drain the FDC
449 TX FIFO.
450
451 If unsure, say N.
452
453config MIPS_EJTAG_FDC_KGDB
454 bool "Use KGDB over an FDC channel"
455 depends on MIPS_EJTAG_FDC_TTY && KGDB
456 default y
457 help
458 This enables the use of KGDB over an FDC channel, allowing KGDB to be
459 used remotely or when a serial port isn't available.
460
461config MIPS_EJTAG_FDC_KGDB_CHAN
462 int "KGDB FDC channel"
463 depends on MIPS_EJTAG_FDC_KGDB
464 range 2 15
465 default 3
466 help
467 FDC channel number to use for KGDB.
468
422endif # TTY 469endif # TTY
diff --git a/drivers/tty/Makefile b/drivers/tty/Makefile
index 58ad1c05b7f8..5817e2397463 100644
--- a/drivers/tty/Makefile
+++ b/drivers/tty/Makefile
@@ -29,5 +29,6 @@ obj-$(CONFIG_SYNCLINK) += synclink.o
29obj-$(CONFIG_PPC_EPAPR_HV_BYTECHAN) += ehv_bytechan.o 29obj-$(CONFIG_PPC_EPAPR_HV_BYTECHAN) += ehv_bytechan.o
30obj-$(CONFIG_GOLDFISH_TTY) += goldfish.o 30obj-$(CONFIG_GOLDFISH_TTY) += goldfish.o
31obj-$(CONFIG_DA_TTY) += metag_da.o 31obj-$(CONFIG_DA_TTY) += metag_da.o
32obj-$(CONFIG_MIPS_EJTAG_FDC_TTY) += mips_ejtag_fdc.o
32 33
33obj-y += ipwireless/ 34obj-y += ipwireless/
diff --git a/drivers/tty/mips_ejtag_fdc.c b/drivers/tty/mips_ejtag_fdc.c
new file mode 100644
index 000000000000..04d9e23d1ee1
--- /dev/null
+++ b/drivers/tty/mips_ejtag_fdc.c
@@ -0,0 +1,1303 @@
1/*
2 * TTY driver for MIPS EJTAG Fast Debug Channels.
3 *
4 * Copyright (C) 2007-2015 Imagination Technologies Ltd
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for more
8 * details.
9 */
10
11#include <linux/atomic.h>
12#include <linux/bitops.h>
13#include <linux/completion.h>
14#include <linux/console.h>
15#include <linux/delay.h>
16#include <linux/export.h>
17#include <linux/init.h>
18#include <linux/interrupt.h>
19#include <linux/kernel.h>
20#include <linux/kgdb.h>
21#include <linux/kthread.h>
22#include <linux/sched.h>
23#include <linux/serial.h>
24#include <linux/serial_core.h>
25#include <linux/slab.h>
26#include <linux/spinlock.h>
27#include <linux/string.h>
28#include <linux/timer.h>
29#include <linux/tty.h>
30#include <linux/tty_driver.h>
31#include <linux/tty_flip.h>
32#include <linux/uaccess.h>
33
34#include <asm/cdmm.h>
35#include <asm/irq.h>
36
37/* Register offsets */
38#define REG_FDACSR 0x00 /* FDC Access Control and Status Register */
39#define REG_FDCFG 0x08 /* FDC Configuration Register */
40#define REG_FDSTAT 0x10 /* FDC Status Register */
41#define REG_FDRX 0x18 /* FDC Receive Register */
42#define REG_FDTX(N) (0x20+0x8*(N)) /* FDC Transmit Register n (0..15) */
43
44/* Register fields */
45
46#define REG_FDCFG_TXINTTHRES_SHIFT 18
47#define REG_FDCFG_TXINTTHRES (0x3 << REG_FDCFG_TXINTTHRES_SHIFT)
48#define REG_FDCFG_TXINTTHRES_DISABLED (0x0 << REG_FDCFG_TXINTTHRES_SHIFT)
49#define REG_FDCFG_TXINTTHRES_EMPTY (0x1 << REG_FDCFG_TXINTTHRES_SHIFT)
50#define REG_FDCFG_TXINTTHRES_NOTFULL (0x2 << REG_FDCFG_TXINTTHRES_SHIFT)
51#define REG_FDCFG_TXINTTHRES_NEAREMPTY (0x3 << REG_FDCFG_TXINTTHRES_SHIFT)
52#define REG_FDCFG_RXINTTHRES_SHIFT 16
53#define REG_FDCFG_RXINTTHRES (0x3 << REG_FDCFG_RXINTTHRES_SHIFT)
54#define REG_FDCFG_RXINTTHRES_DISABLED (0x0 << REG_FDCFG_RXINTTHRES_SHIFT)
55#define REG_FDCFG_RXINTTHRES_FULL (0x1 << REG_FDCFG_RXINTTHRES_SHIFT)
56#define REG_FDCFG_RXINTTHRES_NOTEMPTY (0x2 << REG_FDCFG_RXINTTHRES_SHIFT)
57#define REG_FDCFG_RXINTTHRES_NEARFULL (0x3 << REG_FDCFG_RXINTTHRES_SHIFT)
58#define REG_FDCFG_TXFIFOSIZE_SHIFT 8
59#define REG_FDCFG_TXFIFOSIZE (0xff << REG_FDCFG_TXFIFOSIZE_SHIFT)
60#define REG_FDCFG_RXFIFOSIZE_SHIFT 0
61#define REG_FDCFG_RXFIFOSIZE (0xff << REG_FDCFG_RXFIFOSIZE_SHIFT)
62
63#define REG_FDSTAT_TXCOUNT_SHIFT 24
64#define REG_FDSTAT_TXCOUNT (0xff << REG_FDSTAT_TXCOUNT_SHIFT)
65#define REG_FDSTAT_RXCOUNT_SHIFT 16
66#define REG_FDSTAT_RXCOUNT (0xff << REG_FDSTAT_RXCOUNT_SHIFT)
67#define REG_FDSTAT_RXCHAN_SHIFT 4
68#define REG_FDSTAT_RXCHAN (0xf << REG_FDSTAT_RXCHAN_SHIFT)
69#define REG_FDSTAT_RXE BIT(3) /* Rx Empty */
70#define REG_FDSTAT_RXF BIT(2) /* Rx Full */
71#define REG_FDSTAT_TXE BIT(1) /* Tx Empty */
72#define REG_FDSTAT_TXF BIT(0) /* Tx Full */
73
74/* Default channel for the early console */
75#define CONSOLE_CHANNEL 1
76
77#define NUM_TTY_CHANNELS 16
78
79#define RX_BUF_SIZE 1024
80
81/*
82 * When the IRQ is unavailable, the FDC state must be polled for incoming data
83 * and space becoming available in TX FIFO.
84 */
85#define FDC_TTY_POLL (HZ / 50)
86
87struct mips_ejtag_fdc_tty;
88
89/**
90 * struct mips_ejtag_fdc_tty_port - Wrapper struct for FDC tty_port.
91 * @port: TTY port data
92 * @driver: TTY driver.
93 * @rx_lock: Lock for rx_buf.
94 * This protects between the hard interrupt and user
95 * context. It's also held during read SWITCH operations.
96 * @rx_buf: Read buffer.
97 * @xmit_lock: Lock for xmit_*, and port.xmit_buf.
98 * This protects between user context and kernel thread.
99 * It is used from chars_in_buffer()/write_room() TTY
100 * callbacks which are used during wait operations, so a
101 * mutex is unsuitable.
102 * @xmit_cnt: Size of xmit buffer contents.
103 * @xmit_head: Head of xmit buffer where data is written.
104 * @xmit_tail: Tail of xmit buffer where data is read.
105 * @xmit_empty: Completion for xmit buffer being empty.
106 */
107struct mips_ejtag_fdc_tty_port {
108 struct tty_port port;
109 struct mips_ejtag_fdc_tty *driver;
110 raw_spinlock_t rx_lock;
111 void *rx_buf;
112 spinlock_t xmit_lock;
113 unsigned int xmit_cnt;
114 unsigned int xmit_head;
115 unsigned int xmit_tail;
116 struct completion xmit_empty;
117};
118
119/**
120 * struct mips_ejtag_fdc_tty - Driver data for FDC as a whole.
121 * @dev: FDC device (for dev_*() logging).
122 * @driver: TTY driver.
123 * @cpu: CPU number for this FDC.
124 * @fdc_name: FDC name (not for base of channel names).
125 * @driver_name: Base of driver name.
126 * @ports: Per-channel data.
127 * @waitqueue: Wait queue for waiting for TX data, or for space in TX
128 * FIFO.
129 * @lock: Lock to protect FDCFG (interrupt enable).
130 * @thread: KThread for writing out data to FDC.
131 * @reg: FDC registers.
132 * @tx_fifo: TX FIFO size.
133 * @xmit_size: Size of each port's xmit buffer.
134 * @xmit_total: Total number of bytes (from all ports) to transmit.
135 * @xmit_next: Next port number to transmit from (round robin).
136 * @xmit_full: Indicates TX FIFO is full, we're waiting for space.
137 * @irq: IRQ number (negative if no IRQ).
138 * @removing: Indicates the device is being removed and @poll_timer
139 * should not be restarted.
140 * @poll_timer: Timer for polling for interrupt events when @irq < 0.
141 * @sysrq_pressed: Whether the magic sysrq key combination has been
142 * detected. See mips_ejtag_fdc_handle().
143 */
144struct mips_ejtag_fdc_tty {
145 struct device *dev;
146 struct tty_driver *driver;
147 unsigned int cpu;
148 char fdc_name[16];
149 char driver_name[16];
150 struct mips_ejtag_fdc_tty_port ports[NUM_TTY_CHANNELS];
151 wait_queue_head_t waitqueue;
152 raw_spinlock_t lock;
153 struct task_struct *thread;
154
155 void __iomem *reg;
156 u8 tx_fifo;
157
158 unsigned int xmit_size;
159 atomic_t xmit_total;
160 unsigned int xmit_next;
161 bool xmit_full;
162
163 int irq;
164 bool removing;
165 struct timer_list poll_timer;
166
167#ifdef CONFIG_MAGIC_SYSRQ
168 bool sysrq_pressed;
169#endif
170};
171
172/* Hardware access */
173
174static inline void mips_ejtag_fdc_write(struct mips_ejtag_fdc_tty *priv,
175 unsigned int offs, unsigned int data)
176{
177 iowrite32(data, priv->reg + offs);
178}
179
180static inline unsigned int mips_ejtag_fdc_read(struct mips_ejtag_fdc_tty *priv,
181 unsigned int offs)
182{
183 return ioread32(priv->reg + offs);
184}
185
186/* Encoding of byte stream in FDC words */
187
188/**
189 * struct fdc_word - FDC word encoding some number of bytes of data.
190 * @word: Raw FDC word.
191 * @bytes: Number of bytes encoded by @word.
192 */
193struct fdc_word {
194 u32 word;
195 unsigned int bytes;
196};
197
198/*
199 * This is a compact encoding which allows every 1 byte, 2 byte, and 3 byte
200 * sequence to be encoded in a single word, while allowing the majority of 4
201 * byte sequences (including all ASCII and common binary data) to be encoded in
202 * a single word too.
203 * _______________________ _____________
204 * | FDC Word | |
205 * |31-24|23-16|15-8 | 7-0 | Bytes |
206 * |_____|_____|_____|_____|_____________|
207 * | | | | | |
208 * |0x80 |0x80 |0x80 | WW | WW |
209 * |0x81 |0x81 | XX | WW | WW XX |
210 * |0x82 | YY | XX | WW | WW XX YY |
211 * | ZZ | YY | XX | WW | WW XX YY ZZ |
212 * |_____|_____|_____|_____|_____________|
213 *
214 * Note that the 4-byte encoding can only be used where none of the other 3
215 * encodings match, otherwise it must fall back to the 3 byte encoding.
216 */
217
218/* ranges >= 1 && sizes[0] >= 1 */
219static struct fdc_word mips_ejtag_fdc_encode(const char **ptrs,
220 unsigned int *sizes,
221 unsigned int ranges)
222{
223 struct fdc_word word = { 0, 0 };
224 const char **ptrs_end = ptrs + ranges;
225
226 for (; ptrs < ptrs_end; ++ptrs) {
227 const char *ptr = *(ptrs++);
228 const char *end = ptr + *(sizes++);
229
230 for (; ptr < end; ++ptr) {
231 word.word |= (u8)*ptr << (8*word.bytes);
232 ++word.bytes;
233 if (word.bytes == 4)
234 goto done;
235 }
236 }
237done:
238 /* Choose the appropriate encoding */
239 switch (word.bytes) {
240 case 4:
241 /* 4 byte encoding, but don't match the 1-3 byte encodings */
242 if ((word.word >> 8) != 0x808080 &&
243 (word.word >> 16) != 0x8181 &&
244 (word.word >> 24) != 0x82)
245 break;
246 /* Fall back to a 3 byte encoding */
247 word.bytes = 3;
248 word.word &= 0x00ffffff;
249 case 3:
250 /* 3 byte encoding */
251 word.word |= 0x82000000;
252 break;
253 case 2:
254 /* 2 byte encoding */
255 word.word |= 0x81810000;
256 break;
257 case 1:
258 /* 1 byte encoding */
259 word.word |= 0x80808000;
260 break;
261 }
262 return word;
263}
264
265static unsigned int mips_ejtag_fdc_decode(u32 word, char *buf)
266{
267 buf[0] = (u8)word;
268 word >>= 8;
269 if (word == 0x808080)
270 return 1;
271 buf[1] = (u8)word;
272 word >>= 8;
273 if (word == 0x8181)
274 return 2;
275 buf[2] = (u8)word;
276 word >>= 8;
277 if (word == 0x82)
278 return 3;
279 buf[3] = (u8)word;
280 return 4;
281}
282
283/* Console operations */
284
285/**
286 * struct mips_ejtag_fdc_console - Wrapper struct for FDC consoles.
287 * @cons: Console object.
288 * @tty_drv: TTY driver associated with this console.
289 * @lock: Lock to protect concurrent access to other fields.
290 * This is raw because it may be used very early.
291 * @initialised: Whether the console is initialised.
292 * @regs: Registers base address for each CPU.
293 */
294struct mips_ejtag_fdc_console {
295 struct console cons;
296 struct tty_driver *tty_drv;
297 raw_spinlock_t lock;
298 bool initialised;
299 void __iomem *regs[NR_CPUS];
300};
301
302/* Low level console write shared by early console and normal console */
303static void mips_ejtag_fdc_console_write(struct console *c, const char *s,
304 unsigned int count)
305{
306 struct mips_ejtag_fdc_console *cons =
307 container_of(c, struct mips_ejtag_fdc_console, cons);
308 void __iomem *regs;
309 struct fdc_word word;
310 unsigned long flags;
311 unsigned int i, buf_len, cpu;
312 bool done_cr = false;
313 char buf[4];
314 const char *buf_ptr = buf;
315 /* Number of bytes of input data encoded up to each byte in buf */
316 u8 inc[4];
317
318 local_irq_save(flags);
319 cpu = smp_processor_id();
320 regs = cons->regs[cpu];
321 /* First console output on this CPU? */
322 if (!regs) {
323 regs = mips_cdmm_early_probe(0xfd);
324 cons->regs[cpu] = regs;
325 }
326 /* Already tried and failed to find FDC on this CPU? */
327 if (IS_ERR(regs))
328 goto out;
329 while (count) {
330 /*
331 * Copy the next few characters to a buffer so we can inject
332 * carriage returns before newlines.
333 */
334 for (buf_len = 0, i = 0; buf_len < 4 && i < count; ++buf_len) {
335 if (s[i] == '\n' && !done_cr) {
336 buf[buf_len] = '\r';
337 done_cr = true;
338 } else {
339 buf[buf_len] = s[i];
340 done_cr = false;
341 ++i;
342 }
343 inc[buf_len] = i;
344 }
345 word = mips_ejtag_fdc_encode(&buf_ptr, &buf_len, 1);
346 count -= inc[word.bytes - 1];
347 s += inc[word.bytes - 1];
348
349 /* Busy wait until there's space in fifo */
350 while (ioread32(regs + REG_FDSTAT) & REG_FDSTAT_TXF)
351 ;
352 iowrite32(word.word, regs + REG_FDTX(c->index));
353 }
354out:
355 local_irq_restore(flags);
356}
357
358static struct tty_driver *mips_ejtag_fdc_console_device(struct console *c,
359 int *index)
360{
361 struct mips_ejtag_fdc_console *cons =
362 container_of(c, struct mips_ejtag_fdc_console, cons);
363
364 *index = c->index;
365 return cons->tty_drv;
366}
367
368/* Initialise an FDC console (early or normal */
369static int __init mips_ejtag_fdc_console_init(struct mips_ejtag_fdc_console *c)
370{
371 void __iomem *regs;
372 unsigned long flags;
373 int ret = 0;
374
375 raw_spin_lock_irqsave(&c->lock, flags);
376 /* Don't init twice */
377 if (c->initialised)
378 goto out;
379 /* Look for the FDC device */
380 regs = mips_cdmm_early_probe(0xfd);
381 if (IS_ERR(regs)) {
382 ret = PTR_ERR(regs);
383 goto out;
384 }
385
386 c->initialised = true;
387 c->regs[smp_processor_id()] = regs;
388 register_console(&c->cons);
389out:
390 raw_spin_unlock_irqrestore(&c->lock, flags);
391 return ret;
392}
393
394static struct mips_ejtag_fdc_console mips_ejtag_fdc_con = {
395 .cons = {
396 .name = "fdc",
397 .write = mips_ejtag_fdc_console_write,
398 .device = mips_ejtag_fdc_console_device,
399 .flags = CON_PRINTBUFFER,
400 .index = -1,
401 },
402 .lock = __RAW_SPIN_LOCK_UNLOCKED(mips_ejtag_fdc_con.lock),
403};
404
405/* TTY RX/TX operations */
406
407/**
408 * mips_ejtag_fdc_put_chan() - Write out a block of channel data.
409 * @priv: Pointer to driver private data.
410 * @chan: Channel number.
411 *
412 * Write a single block of data out to the debug adapter. If the circular buffer
413 * is wrapped then only the first block is written.
414 *
415 * Returns: The number of bytes that were written.
416 */
417static unsigned int mips_ejtag_fdc_put_chan(struct mips_ejtag_fdc_tty *priv,
418 unsigned int chan)
419{
420 struct mips_ejtag_fdc_tty_port *dport;
421 struct tty_struct *tty;
422 const char *ptrs[2];
423 unsigned int sizes[2] = { 0 };
424 struct fdc_word word = { .bytes = 0 };
425 unsigned long flags;
426
427 dport = &priv->ports[chan];
428 spin_lock(&dport->xmit_lock);
429 if (dport->xmit_cnt) {
430 ptrs[0] = dport->port.xmit_buf + dport->xmit_tail;
431 sizes[0] = min_t(unsigned int,
432 priv->xmit_size - dport->xmit_tail,
433 dport->xmit_cnt);
434 ptrs[1] = dport->port.xmit_buf;
435 sizes[1] = dport->xmit_cnt - sizes[0];
436 word = mips_ejtag_fdc_encode(ptrs, sizes, 1 + !!sizes[1]);
437
438 dev_dbg(priv->dev, "%s%u: out %08x: \"%*pE%*pE\"\n",
439 priv->driver_name, chan, word.word,
440 min_t(int, word.bytes, sizes[0]), ptrs[0],
441 max_t(int, 0, word.bytes - sizes[0]), ptrs[1]);
442
443 local_irq_save(flags);
444 /* Maybe we raced with the console and TX FIFO is full */
445 if (mips_ejtag_fdc_read(priv, REG_FDSTAT) & REG_FDSTAT_TXF)
446 word.bytes = 0;
447 else
448 mips_ejtag_fdc_write(priv, REG_FDTX(chan), word.word);
449 local_irq_restore(flags);
450
451 dport->xmit_cnt -= word.bytes;
452 if (!dport->xmit_cnt) {
453 /* Reset pointers to avoid wraps */
454 dport->xmit_head = 0;
455 dport->xmit_tail = 0;
456 complete(&dport->xmit_empty);
457 } else {
458 dport->xmit_tail += word.bytes;
459 if (dport->xmit_tail >= priv->xmit_size)
460 dport->xmit_tail -= priv->xmit_size;
461 }
462 atomic_sub(word.bytes, &priv->xmit_total);
463 }
464 spin_unlock(&dport->xmit_lock);
465
466 /* If we've made more data available, wake up tty */
467 if (sizes[0] && word.bytes) {
468 tty = tty_port_tty_get(&dport->port);
469 if (tty) {
470 tty_wakeup(tty);
471 tty_kref_put(tty);
472 }
473 }
474
475 return word.bytes;
476}
477
478/**
479 * mips_ejtag_fdc_put() - Kernel thread to write out channel data to FDC.
480 * @arg: Driver pointer.
481 *
482 * This kernel thread runs while @priv->xmit_total != 0, and round robins the
483 * channels writing out blocks of buffered data to the FDC TX FIFO.
484 */
485static int mips_ejtag_fdc_put(void *arg)
486{
487 struct mips_ejtag_fdc_tty *priv = arg;
488 struct mips_ejtag_fdc_tty_port *dport;
489 unsigned int ret;
490 u32 cfg;
491
492 __set_current_state(TASK_RUNNING);
493 while (!kthread_should_stop()) {
494 /* Wait for data to actually write */
495 wait_event_interruptible(priv->waitqueue,
496 atomic_read(&priv->xmit_total) ||
497 kthread_should_stop());
498 if (kthread_should_stop())
499 break;
500
501 /* Wait for TX FIFO space to write data */
502 raw_spin_lock_irq(&priv->lock);
503 if (mips_ejtag_fdc_read(priv, REG_FDSTAT) & REG_FDSTAT_TXF) {
504 priv->xmit_full = true;
505 if (priv->irq >= 0) {
506 /* Enable TX interrupt */
507 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG);
508 cfg &= ~REG_FDCFG_TXINTTHRES;
509 cfg |= REG_FDCFG_TXINTTHRES_NOTFULL;
510 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg);
511 }
512 }
513 raw_spin_unlock_irq(&priv->lock);
514 wait_event_interruptible(priv->waitqueue,
515 !(mips_ejtag_fdc_read(priv, REG_FDSTAT)
516 & REG_FDSTAT_TXF) ||
517 kthread_should_stop());
518 if (kthread_should_stop())
519 break;
520
521 /* Find next channel with data to output */
522 for (;;) {
523 dport = &priv->ports[priv->xmit_next];
524 spin_lock(&dport->xmit_lock);
525 ret = dport->xmit_cnt;
526 spin_unlock(&dport->xmit_lock);
527 if (ret)
528 break;
529 /* Round robin */
530 ++priv->xmit_next;
531 if (priv->xmit_next >= NUM_TTY_CHANNELS)
532 priv->xmit_next = 0;
533 }
534
535 /* Try writing data to the chosen channel */
536 ret = mips_ejtag_fdc_put_chan(priv, priv->xmit_next);
537
538 /*
539 * If anything was output, move on to the next channel so as not
540 * to starve other channels.
541 */
542 if (ret) {
543 ++priv->xmit_next;
544 if (priv->xmit_next >= NUM_TTY_CHANNELS)
545 priv->xmit_next = 0;
546 }
547 }
548
549 return 0;
550}
551
552/**
553 * mips_ejtag_fdc_handle() - Handle FDC events.
554 * @priv: Pointer to driver private data.
555 *
556 * Handle FDC events, such as new incoming data which needs draining out of the
557 * RX FIFO and feeding into the appropriate TTY ports, and space becoming
558 * available in the TX FIFO which would allow more data to be written out.
559 */
560static void mips_ejtag_fdc_handle(struct mips_ejtag_fdc_tty *priv)
561{
562 struct mips_ejtag_fdc_tty_port *dport;
563 unsigned int stat, channel, data, cfg, i, flipped;
564 int len;
565 char buf[4];
566
567 for (;;) {
568 /* Find which channel the next FDC word is destined for */
569 stat = mips_ejtag_fdc_read(priv, REG_FDSTAT);
570 if (stat & REG_FDSTAT_RXE)
571 break;
572 channel = (stat & REG_FDSTAT_RXCHAN) >> REG_FDSTAT_RXCHAN_SHIFT;
573 dport = &priv->ports[channel];
574
575 /* Read out the FDC word, decode it, and pass to tty layer */
576 raw_spin_lock(&dport->rx_lock);
577 data = mips_ejtag_fdc_read(priv, REG_FDRX);
578
579 len = mips_ejtag_fdc_decode(data, buf);
580 dev_dbg(priv->dev, "%s%u: in %08x: \"%*pE\"\n",
581 priv->driver_name, channel, data, len, buf);
582
583 flipped = 0;
584 for (i = 0; i < len; ++i) {
585#ifdef CONFIG_MAGIC_SYSRQ
586#ifdef CONFIG_MIPS_EJTAG_FDC_KGDB
587 /* Support just Ctrl+C with KGDB channel */
588 if (channel == CONFIG_MIPS_EJTAG_FDC_KGDB_CHAN) {
589 if (buf[i] == '\x03') { /* ^C */
590 handle_sysrq('g');
591 continue;
592 }
593 }
594#endif
595 /* Support Ctrl+O for console channel */
596 if (channel == mips_ejtag_fdc_con.cons.index) {
597 if (buf[i] == '\x0f') { /* ^O */
598 priv->sysrq_pressed =
599 !priv->sysrq_pressed;
600 if (priv->sysrq_pressed)
601 continue;
602 } else if (priv->sysrq_pressed) {
603 handle_sysrq(buf[i]);
604 priv->sysrq_pressed = false;
605 continue;
606 }
607 }
608#endif /* CONFIG_MAGIC_SYSRQ */
609
610 /* Check the port isn't being shut down */
611 if (!dport->rx_buf)
612 continue;
613
614 flipped += tty_insert_flip_char(&dport->port, buf[i],
615 TTY_NORMAL);
616 }
617 if (flipped)
618 tty_flip_buffer_push(&dport->port);
619
620 raw_spin_unlock(&dport->rx_lock);
621 }
622
623 /* If TX FIFO no longer full we may be able to write more data */
624 raw_spin_lock(&priv->lock);
625 if (priv->xmit_full && !(stat & REG_FDSTAT_TXF)) {
626 priv->xmit_full = false;
627
628 /* Disable TX interrupt */
629 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG);
630 cfg &= ~REG_FDCFG_TXINTTHRES;
631 cfg |= REG_FDCFG_TXINTTHRES_DISABLED;
632 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg);
633
634 /* Wait the kthread so it can try writing more data */
635 wake_up_interruptible(&priv->waitqueue);
636 }
637 raw_spin_unlock(&priv->lock);
638}
639
640/**
641 * mips_ejtag_fdc_isr() - Interrupt handler.
642 * @irq: IRQ number.
643 * @dev_id: Pointer to driver private data.
644 *
645 * This is the interrupt handler, used when interrupts are enabled.
646 *
647 * It simply triggers the common FDC handler code.
648 *
649 * Returns: IRQ_HANDLED if an FDC interrupt was pending.
650 * IRQ_NONE otherwise.
651 */
652static irqreturn_t mips_ejtag_fdc_isr(int irq, void *dev_id)
653{
654 struct mips_ejtag_fdc_tty *priv = dev_id;
655
656 /*
657 * We're not using proper per-cpu IRQs, so we must be careful not to
658 * handle IRQs on CPUs we're not interested in.
659 *
660 * Ideally proper per-cpu IRQ handlers could be used, but that doesn't
661 * fit well with the whole sharing of the main CPU IRQ lines. When we
662 * have something with a GIC that routes the FDC IRQs (i.e. no sharing
663 * between handlers) then support could be added more easily.
664 */
665 if (smp_processor_id() != priv->cpu)
666 return IRQ_NONE;
667
668 /* If no FDC interrupt pending, it wasn't for us */
669 if (!(read_c0_cause() & CAUSEF_FDCI))
670 return IRQ_NONE;
671
672 mips_ejtag_fdc_handle(priv);
673 return IRQ_HANDLED;
674}
675
676/**
677 * mips_ejtag_fdc_tty_timer() - Poll FDC for incoming data.
678 * @opaque: Pointer to driver private data.
679 *
680 * This is the timer handler for when interrupts are disabled and polling the
681 * FDC state is required.
682 *
683 * It simply triggers the common FDC handler code and arranges for further
684 * polling.
685 */
686static void mips_ejtag_fdc_tty_timer(unsigned long opaque)
687{
688 struct mips_ejtag_fdc_tty *priv = (void *)opaque;
689
690 mips_ejtag_fdc_handle(priv);
691 if (!priv->removing)
692 mod_timer_pinned(&priv->poll_timer, jiffies + FDC_TTY_POLL);
693}
694
695/* TTY Port operations */
696
697static int mips_ejtag_fdc_tty_port_activate(struct tty_port *port,
698 struct tty_struct *tty)
699{
700 struct mips_ejtag_fdc_tty_port *dport =
701 container_of(port, struct mips_ejtag_fdc_tty_port, port);
702 void *rx_buf;
703
704 /* Allocate the buffer we use for writing data */
705 if (tty_port_alloc_xmit_buf(port) < 0)
706 goto err;
707
708 /* Allocate the buffer we use for reading data */
709 rx_buf = kzalloc(RX_BUF_SIZE, GFP_KERNEL);
710 if (!rx_buf)
711 goto err_free_xmit;
712
713 raw_spin_lock_irq(&dport->rx_lock);
714 dport->rx_buf = rx_buf;
715 raw_spin_unlock_irq(&dport->rx_lock);
716
717 return 0;
718err_free_xmit:
719 tty_port_free_xmit_buf(port);
720err:
721 return -ENOMEM;
722}
723
724static void mips_ejtag_fdc_tty_port_shutdown(struct tty_port *port)
725{
726 struct mips_ejtag_fdc_tty_port *dport =
727 container_of(port, struct mips_ejtag_fdc_tty_port, port);
728 struct mips_ejtag_fdc_tty *priv = dport->driver;
729 void *rx_buf;
730 unsigned int count;
731
732 spin_lock(&dport->xmit_lock);
733 count = dport->xmit_cnt;
734 spin_unlock(&dport->xmit_lock);
735 if (count) {
736 /*
737 * There's still data to write out, so wake and wait for the
738 * writer thread to drain the buffer.
739 */
740 wake_up_interruptible(&priv->waitqueue);
741 wait_for_completion(&dport->xmit_empty);
742 }
743
744 /* Null the read buffer (timer could still be running!) */
745 raw_spin_lock_irq(&dport->rx_lock);
746 rx_buf = dport->rx_buf;
747 dport->rx_buf = NULL;
748 raw_spin_unlock_irq(&dport->rx_lock);
749 /* Free the read buffer */
750 kfree(rx_buf);
751
752 /* Free the write buffer */
753 tty_port_free_xmit_buf(port);
754}
755
756static const struct tty_port_operations mips_ejtag_fdc_tty_port_ops = {
757 .activate = mips_ejtag_fdc_tty_port_activate,
758 .shutdown = mips_ejtag_fdc_tty_port_shutdown,
759};
760
761/* TTY operations */
762
763static int mips_ejtag_fdc_tty_install(struct tty_driver *driver,
764 struct tty_struct *tty)
765{
766 struct mips_ejtag_fdc_tty *priv = driver->driver_state;
767
768 tty->driver_data = &priv->ports[tty->index];
769 return tty_port_install(&priv->ports[tty->index].port, driver, tty);
770}
771
772static int mips_ejtag_fdc_tty_open(struct tty_struct *tty, struct file *filp)
773{
774 return tty_port_open(tty->port, tty, filp);
775}
776
777static void mips_ejtag_fdc_tty_close(struct tty_struct *tty, struct file *filp)
778{
779 return tty_port_close(tty->port, tty, filp);
780}
781
782static void mips_ejtag_fdc_tty_hangup(struct tty_struct *tty)
783{
784 struct mips_ejtag_fdc_tty_port *dport = tty->driver_data;
785 struct mips_ejtag_fdc_tty *priv = dport->driver;
786
787 /* Drop any data in the xmit buffer */
788 spin_lock(&dport->xmit_lock);
789 if (dport->xmit_cnt) {
790 atomic_sub(dport->xmit_cnt, &priv->xmit_total);
791 dport->xmit_cnt = 0;
792 dport->xmit_head = 0;
793 dport->xmit_tail = 0;
794 complete(&dport->xmit_empty);
795 }
796 spin_unlock(&dport->xmit_lock);
797
798 tty_port_hangup(tty->port);
799}
800
801static int mips_ejtag_fdc_tty_write(struct tty_struct *tty,
802 const unsigned char *buf, int total)
803{
804 int count, block;
805 struct mips_ejtag_fdc_tty_port *dport = tty->driver_data;
806 struct mips_ejtag_fdc_tty *priv = dport->driver;
807
808 /*
809 * Write to output buffer.
810 *
811 * The reason that we asynchronously write the buffer is because if we
812 * were to write the buffer synchronously then because the channels are
813 * per-CPU the buffer would be written to the channel of whatever CPU
814 * we're running on.
815 *
816 * What we actually want to happen is have all input and output done on
817 * one CPU.
818 */
819 spin_lock(&dport->xmit_lock);
820 /* Work out how many bytes we can write to the xmit buffer */
821 total = min(total, (int)(priv->xmit_size - dport->xmit_cnt));
822 atomic_add(total, &priv->xmit_total);
823 dport->xmit_cnt += total;
824 /* Write the actual bytes (may need splitting if it wraps) */
825 for (count = total; count; count -= block) {
826 block = min(count, (int)(priv->xmit_size - dport->xmit_head));
827 memcpy(dport->port.xmit_buf + dport->xmit_head, buf, block);
828 dport->xmit_head += block;
829 if (dport->xmit_head >= priv->xmit_size)
830 dport->xmit_head -= priv->xmit_size;
831 buf += block;
832 }
833 count = dport->xmit_cnt;
834 /* Xmit buffer no longer empty? */
835 if (count)
836 reinit_completion(&dport->xmit_empty);
837 spin_unlock(&dport->xmit_lock);
838
839 /* Wake up the kthread */
840 if (total)
841 wake_up_interruptible(&priv->waitqueue);
842 return total;
843}
844
845static int mips_ejtag_fdc_tty_write_room(struct tty_struct *tty)
846{
847 struct mips_ejtag_fdc_tty_port *dport = tty->driver_data;
848 struct mips_ejtag_fdc_tty *priv = dport->driver;
849 int room;
850
851 /* Report the space in the xmit buffer */
852 spin_lock(&dport->xmit_lock);
853 room = priv->xmit_size - dport->xmit_cnt;
854 spin_unlock(&dport->xmit_lock);
855
856 return room;
857}
858
859static int mips_ejtag_fdc_tty_chars_in_buffer(struct tty_struct *tty)
860{
861 struct mips_ejtag_fdc_tty_port *dport = tty->driver_data;
862 int chars;
863
864 /* Report the number of bytes in the xmit buffer */
865 spin_lock(&dport->xmit_lock);
866 chars = dport->xmit_cnt;
867 spin_unlock(&dport->xmit_lock);
868
869 return chars;
870}
871
872static const struct tty_operations mips_ejtag_fdc_tty_ops = {
873 .install = mips_ejtag_fdc_tty_install,
874 .open = mips_ejtag_fdc_tty_open,
875 .close = mips_ejtag_fdc_tty_close,
876 .hangup = mips_ejtag_fdc_tty_hangup,
877 .write = mips_ejtag_fdc_tty_write,
878 .write_room = mips_ejtag_fdc_tty_write_room,
879 .chars_in_buffer = mips_ejtag_fdc_tty_chars_in_buffer,
880};
881
882static int mips_ejtag_fdc_tty_probe(struct mips_cdmm_device *dev)
883{
884 int ret, nport;
885 struct mips_ejtag_fdc_tty_port *dport;
886 struct mips_ejtag_fdc_tty *priv;
887 struct tty_driver *driver;
888 unsigned int cfg, tx_fifo;
889
890 priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
891 if (!priv)
892 return -ENOMEM;
893 priv->cpu = dev->cpu;
894 priv->dev = &dev->dev;
895 mips_cdmm_set_drvdata(dev, priv);
896 atomic_set(&priv->xmit_total, 0);
897 raw_spin_lock_init(&priv->lock);
898
899 priv->reg = devm_ioremap_nocache(priv->dev, dev->res.start,
900 resource_size(&dev->res));
901 if (!priv->reg) {
902 dev_err(priv->dev, "ioremap failed for resource %pR\n",
903 &dev->res);
904 return -ENOMEM;
905 }
906
907 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG);
908 tx_fifo = (cfg & REG_FDCFG_TXFIFOSIZE) >> REG_FDCFG_TXFIFOSIZE_SHIFT;
909 /* Disable interrupts */
910 cfg &= ~(REG_FDCFG_TXINTTHRES | REG_FDCFG_RXINTTHRES);
911 cfg |= REG_FDCFG_TXINTTHRES_DISABLED;
912 cfg |= REG_FDCFG_RXINTTHRES_DISABLED;
913 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg);
914
915 /* Make each port's xmit FIFO big enough to fill FDC TX FIFO */
916 priv->xmit_size = min(tx_fifo * 4, (unsigned int)SERIAL_XMIT_SIZE);
917
918 driver = tty_alloc_driver(NUM_TTY_CHANNELS, TTY_DRIVER_REAL_RAW);
919 if (IS_ERR(driver))
920 return PTR_ERR(driver);
921 priv->driver = driver;
922
923 driver->driver_name = "ejtag_fdc";
924 snprintf(priv->fdc_name, sizeof(priv->fdc_name), "ttyFDC%u", dev->cpu);
925 snprintf(priv->driver_name, sizeof(priv->driver_name), "%sc",
926 priv->fdc_name);
927 driver->name = priv->driver_name;
928 driver->major = 0; /* Auto-allocate */
929 driver->minor_start = 0;
930 driver->type = TTY_DRIVER_TYPE_SERIAL;
931 driver->subtype = SERIAL_TYPE_NORMAL;
932 driver->init_termios = tty_std_termios;
933 driver->init_termios.c_cflag |= CLOCAL;
934 driver->driver_state = priv;
935
936 tty_set_operations(driver, &mips_ejtag_fdc_tty_ops);
937 for (nport = 0; nport < NUM_TTY_CHANNELS; nport++) {
938 dport = &priv->ports[nport];
939 dport->driver = priv;
940 tty_port_init(&dport->port);
941 dport->port.ops = &mips_ejtag_fdc_tty_port_ops;
942 raw_spin_lock_init(&dport->rx_lock);
943 spin_lock_init(&dport->xmit_lock);
944 /* The xmit buffer starts empty, i.e. completely written */
945 init_completion(&dport->xmit_empty);
946 complete(&dport->xmit_empty);
947 }
948
949 /* Set up the console */
950 mips_ejtag_fdc_con.regs[dev->cpu] = priv->reg;
951 if (dev->cpu == 0)
952 mips_ejtag_fdc_con.tty_drv = driver;
953
954 init_waitqueue_head(&priv->waitqueue);
955 priv->thread = kthread_create(mips_ejtag_fdc_put, priv, priv->fdc_name);
956 if (IS_ERR(priv->thread)) {
957 ret = PTR_ERR(priv->thread);
958 dev_err(priv->dev, "Couldn't create kthread (%d)\n", ret);
959 goto err_destroy_ports;
960 }
961 /*
962 * Bind the writer thread to the right CPU so it can't migrate.
963 * The channels are per-CPU and we want all channel I/O to be on a
964 * single predictable CPU.
965 */
966 kthread_bind(priv->thread, dev->cpu);
967 wake_up_process(priv->thread);
968
969 /* Look for an FDC IRQ */
970 priv->irq = -1;
971 if (get_c0_fdc_int)
972 priv->irq = get_c0_fdc_int();
973
974 /* Try requesting the IRQ */
975 if (priv->irq >= 0) {
976 /*
977 * IRQF_SHARED, IRQF_NO_SUSPEND: The FDC IRQ may be shared with
978 * other local interrupts such as the timer which sets
979 * IRQF_TIMER (including IRQF_NO_SUSPEND).
980 *
981 * IRQF_NO_THREAD: The FDC IRQ isn't individually maskable so it
982 * cannot be deferred and handled by a thread on RT kernels. For
983 * this reason any spinlocks used from the ISR are raw.
984 */
985 ret = devm_request_irq(priv->dev, priv->irq, mips_ejtag_fdc_isr,
986 IRQF_PERCPU | IRQF_SHARED |
987 IRQF_NO_THREAD | IRQF_NO_SUSPEND,
988 priv->fdc_name, priv);
989 if (ret)
990 priv->irq = -1;
991 }
992 if (priv->irq >= 0) {
993 /* IRQ is usable, enable RX interrupt */
994 raw_spin_lock_irq(&priv->lock);
995 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG);
996 cfg &= ~REG_FDCFG_RXINTTHRES;
997 cfg |= REG_FDCFG_RXINTTHRES_NOTEMPTY;
998 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg);
999 raw_spin_unlock_irq(&priv->lock);
1000 } else {
1001 /* If we didn't get an usable IRQ, poll instead */
1002 setup_timer(&priv->poll_timer, mips_ejtag_fdc_tty_timer,
1003 (unsigned long)priv);
1004 priv->poll_timer.expires = jiffies + FDC_TTY_POLL;
1005 /*
1006 * Always attach the timer to the right CPU. The channels are
1007 * per-CPU so all polling should be from a single CPU.
1008 */
1009 add_timer_on(&priv->poll_timer, dev->cpu);
1010
1011 dev_info(priv->dev, "No usable IRQ, polling enabled\n");
1012 }
1013
1014 ret = tty_register_driver(driver);
1015 if (ret < 0) {
1016 dev_err(priv->dev, "Couldn't install tty driver (%d)\n", ret);
1017 goto err_stop_irq;
1018 }
1019
1020 return 0;
1021
1022err_stop_irq:
1023 if (priv->irq >= 0) {
1024 raw_spin_lock_irq(&priv->lock);
1025 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG);
1026 /* Disable interrupts */
1027 cfg &= ~(REG_FDCFG_TXINTTHRES | REG_FDCFG_RXINTTHRES);
1028 cfg |= REG_FDCFG_TXINTTHRES_DISABLED;
1029 cfg |= REG_FDCFG_RXINTTHRES_DISABLED;
1030 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg);
1031 raw_spin_unlock_irq(&priv->lock);
1032 } else {
1033 priv->removing = true;
1034 del_timer_sync(&priv->poll_timer);
1035 }
1036 kthread_stop(priv->thread);
1037err_destroy_ports:
1038 if (dev->cpu == 0)
1039 mips_ejtag_fdc_con.tty_drv = NULL;
1040 for (nport = 0; nport < NUM_TTY_CHANNELS; nport++) {
1041 dport = &priv->ports[nport];
1042 tty_port_destroy(&dport->port);
1043 }
1044 put_tty_driver(priv->driver);
1045 return ret;
1046}
1047
1048static int mips_ejtag_fdc_tty_remove(struct mips_cdmm_device *dev)
1049{
1050 struct mips_ejtag_fdc_tty *priv = mips_cdmm_get_drvdata(dev);
1051 struct mips_ejtag_fdc_tty_port *dport;
1052 int nport;
1053 unsigned int cfg;
1054
1055 if (priv->irq >= 0) {
1056 raw_spin_lock_irq(&priv->lock);
1057 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG);
1058 /* Disable interrupts */
1059 cfg &= ~(REG_FDCFG_TXINTTHRES | REG_FDCFG_RXINTTHRES);
1060 cfg |= REG_FDCFG_TXINTTHRES_DISABLED;
1061 cfg |= REG_FDCFG_RXINTTHRES_DISABLED;
1062 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg);
1063 raw_spin_unlock_irq(&priv->lock);
1064 } else {
1065 priv->removing = true;
1066 del_timer_sync(&priv->poll_timer);
1067 }
1068 kthread_stop(priv->thread);
1069 if (dev->cpu == 0)
1070 mips_ejtag_fdc_con.tty_drv = NULL;
1071 tty_unregister_driver(priv->driver);
1072 for (nport = 0; nport < NUM_TTY_CHANNELS; nport++) {
1073 dport = &priv->ports[nport];
1074 tty_port_destroy(&dport->port);
1075 }
1076 put_tty_driver(priv->driver);
1077 return 0;
1078}
1079
1080static int mips_ejtag_fdc_tty_cpu_down(struct mips_cdmm_device *dev)
1081{
1082 struct mips_ejtag_fdc_tty *priv = mips_cdmm_get_drvdata(dev);
1083 unsigned int cfg;
1084
1085 if (priv->irq >= 0) {
1086 raw_spin_lock_irq(&priv->lock);
1087 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG);
1088 /* Disable interrupts */
1089 cfg &= ~(REG_FDCFG_TXINTTHRES | REG_FDCFG_RXINTTHRES);
1090 cfg |= REG_FDCFG_TXINTTHRES_DISABLED;
1091 cfg |= REG_FDCFG_RXINTTHRES_DISABLED;
1092 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg);
1093 raw_spin_unlock_irq(&priv->lock);
1094 } else {
1095 priv->removing = true;
1096 del_timer_sync(&priv->poll_timer);
1097 }
1098 kthread_stop(priv->thread);
1099
1100 return 0;
1101}
1102
1103static int mips_ejtag_fdc_tty_cpu_up(struct mips_cdmm_device *dev)
1104{
1105 struct mips_ejtag_fdc_tty *priv = mips_cdmm_get_drvdata(dev);
1106 unsigned int cfg;
1107 int ret = 0;
1108
1109 if (priv->irq >= 0) {
1110 /*
1111 * IRQ is usable, enable RX interrupt
1112 * This must be before kthread is restarted, as kthread may
1113 * enable TX interrupt.
1114 */
1115 raw_spin_lock_irq(&priv->lock);
1116 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG);
1117 cfg &= ~(REG_FDCFG_TXINTTHRES | REG_FDCFG_RXINTTHRES);
1118 cfg |= REG_FDCFG_TXINTTHRES_DISABLED;
1119 cfg |= REG_FDCFG_RXINTTHRES_NOTEMPTY;
1120 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg);
1121 raw_spin_unlock_irq(&priv->lock);
1122 } else {
1123 /* Restart poll timer */
1124 priv->removing = false;
1125 add_timer_on(&priv->poll_timer, dev->cpu);
1126 }
1127
1128 /* Restart the kthread */
1129 priv->thread = kthread_create(mips_ejtag_fdc_put, priv, priv->fdc_name);
1130 if (IS_ERR(priv->thread)) {
1131 ret = PTR_ERR(priv->thread);
1132 dev_err(priv->dev, "Couldn't re-create kthread (%d)\n", ret);
1133 goto out;
1134 }
1135 /* Bind it back to the right CPU and set it off */
1136 kthread_bind(priv->thread, dev->cpu);
1137 wake_up_process(priv->thread);
1138out:
1139 return ret;
1140}
1141
1142static struct mips_cdmm_device_id mips_ejtag_fdc_tty_ids[] = {
1143 { .type = 0xfd },
1144 { }
1145};
1146
1147static struct mips_cdmm_driver mips_ejtag_fdc_tty_driver = {
1148 .drv = {
1149 .name = "mips_ejtag_fdc",
1150 },
1151 .probe = mips_ejtag_fdc_tty_probe,
1152 .remove = mips_ejtag_fdc_tty_remove,
1153 .cpu_down = mips_ejtag_fdc_tty_cpu_down,
1154 .cpu_up = mips_ejtag_fdc_tty_cpu_up,
1155 .id_table = mips_ejtag_fdc_tty_ids,
1156};
1157module_mips_cdmm_driver(mips_ejtag_fdc_tty_driver);
1158
1159static int __init mips_ejtag_fdc_init_console(void)
1160{
1161 return mips_ejtag_fdc_console_init(&mips_ejtag_fdc_con);
1162}
1163console_initcall(mips_ejtag_fdc_init_console);
1164
1165#ifdef CONFIG_MIPS_EJTAG_FDC_EARLYCON
1166static struct mips_ejtag_fdc_console mips_ejtag_fdc_earlycon = {
1167 .cons = {
1168 .name = "early_fdc",
1169 .write = mips_ejtag_fdc_console_write,
1170 .flags = CON_PRINTBUFFER | CON_BOOT,
1171 .index = CONSOLE_CHANNEL,
1172 },
1173 .lock = __RAW_SPIN_LOCK_UNLOCKED(mips_ejtag_fdc_earlycon.lock),
1174};
1175
1176int __init setup_early_fdc_console(void)
1177{
1178 return mips_ejtag_fdc_console_init(&mips_ejtag_fdc_earlycon);
1179}
1180#endif
1181
1182#ifdef CONFIG_MIPS_EJTAG_FDC_KGDB
1183
1184/* read buffer to allow decompaction */
1185static unsigned int kgdbfdc_rbuflen;
1186static unsigned int kgdbfdc_rpos;
1187static char kgdbfdc_rbuf[4];
1188
1189/* write buffer to allow compaction */
1190static unsigned int kgdbfdc_wbuflen;
1191static char kgdbfdc_wbuf[4];
1192
1193static void __iomem *kgdbfdc_setup(void)
1194{
1195 void __iomem *regs;
1196 unsigned int cpu;
1197
1198 /* Find address, piggy backing off console percpu regs */
1199 cpu = smp_processor_id();
1200 regs = mips_ejtag_fdc_con.regs[cpu];
1201 /* First console output on this CPU? */
1202 if (!regs) {
1203 regs = mips_cdmm_early_probe(0xfd);
1204 mips_ejtag_fdc_con.regs[cpu] = regs;
1205 }
1206 /* Already tried and failed to find FDC on this CPU? */
1207 if (IS_ERR(regs))
1208 return regs;
1209
1210 return regs;
1211}
1212
1213/* read a character from the read buffer, filling from FDC RX FIFO */
1214static int kgdbfdc_read_char(void)
1215{
1216 unsigned int stat, channel, data;
1217 void __iomem *regs;
1218
1219 /* No more data, try and read another FDC word from RX FIFO */
1220 if (kgdbfdc_rpos >= kgdbfdc_rbuflen) {
1221 kgdbfdc_rpos = 0;
1222 kgdbfdc_rbuflen = 0;
1223
1224 regs = kgdbfdc_setup();
1225 if (IS_ERR(regs))
1226 return NO_POLL_CHAR;
1227
1228 /* Read next word from KGDB channel */
1229 do {
1230 stat = ioread32(regs + REG_FDSTAT);
1231
1232 /* No data waiting? */
1233 if (stat & REG_FDSTAT_RXE)
1234 return NO_POLL_CHAR;
1235
1236 /* Read next word */
1237 channel = (stat & REG_FDSTAT_RXCHAN) >>
1238 REG_FDSTAT_RXCHAN_SHIFT;
1239 data = ioread32(regs + REG_FDRX);
1240 } while (channel != CONFIG_MIPS_EJTAG_FDC_KGDB_CHAN);
1241
1242 /* Decode into rbuf */
1243 kgdbfdc_rbuflen = mips_ejtag_fdc_decode(data, kgdbfdc_rbuf);
1244 }
1245 pr_devel("kgdbfdc r %c\n", kgdbfdc_rbuf[kgdbfdc_rpos]);
1246 return kgdbfdc_rbuf[kgdbfdc_rpos++];
1247}
1248
1249/* push an FDC word from write buffer to TX FIFO */
1250static void kgdbfdc_push_one(void)
1251{
1252 const char *bufs[1] = { kgdbfdc_wbuf };
1253 struct fdc_word word;
1254 void __iomem *regs;
1255 unsigned int i;
1256
1257 /* Construct a word from any data in buffer */
1258 word = mips_ejtag_fdc_encode(bufs, &kgdbfdc_wbuflen, 1);
1259 /* Relocate any remaining data to beginnning of buffer */
1260 kgdbfdc_wbuflen -= word.bytes;
1261 for (i = 0; i < kgdbfdc_wbuflen; ++i)
1262 kgdbfdc_wbuf[i] = kgdbfdc_wbuf[i + word.bytes];
1263
1264 regs = kgdbfdc_setup();
1265 if (IS_ERR(regs))
1266 return;
1267
1268 /* Busy wait until there's space in fifo */
1269 while (ioread32(regs + REG_FDSTAT) & REG_FDSTAT_TXF)
1270 ;
1271 iowrite32(word.word, regs + REG_FDTX(CONFIG_MIPS_EJTAG_FDC_KGDB_CHAN));
1272}
1273
1274/* flush the whole write buffer to the TX FIFO */
1275static void kgdbfdc_flush(void)
1276{
1277 while (kgdbfdc_wbuflen)
1278 kgdbfdc_push_one();
1279}
1280
1281/* write a character into the write buffer, writing out if full */
1282static void kgdbfdc_write_char(u8 chr)
1283{
1284 pr_devel("kgdbfdc w %c\n", chr);
1285 kgdbfdc_wbuf[kgdbfdc_wbuflen++] = chr;
1286 if (kgdbfdc_wbuflen >= sizeof(kgdbfdc_wbuf))
1287 kgdbfdc_push_one();
1288}
1289
1290static struct kgdb_io kgdbfdc_io_ops = {
1291 .name = "kgdbfdc",
1292 .read_char = kgdbfdc_read_char,
1293 .write_char = kgdbfdc_write_char,
1294 .flush = kgdbfdc_flush,
1295};
1296
1297static int __init kgdbfdc_init(void)
1298{
1299 kgdb_register_io_module(&kgdbfdc_io_ops);
1300 return 0;
1301}
1302early_initcall(kgdbfdc_init);
1303#endif
diff --git a/firmware/ihex2fw.c b/firmware/ihex2fw.c
index cf38e159131a..08d90e25abf0 100644
--- a/firmware/ihex2fw.c
+++ b/firmware/ihex2fw.c
@@ -86,6 +86,7 @@ int main(int argc, char **argv)
86 case 'j': 86 case 'j':
87 include_jump = 1; 87 include_jump = 1;
88 break; 88 break;
89 default:
89 return usage(); 90 return usage();
90 } 91 }
91 } 92 }
diff --git a/fs/9p/vfs_addr.c b/fs/9p/vfs_addr.c
index 2e38f9a5b472..be35d05a4d0e 100644
--- a/fs/9p/vfs_addr.c
+++ b/fs/9p/vfs_addr.c
@@ -230,7 +230,6 @@ static int v9fs_launder_page(struct page *page)
230 230
231/** 231/**
232 * v9fs_direct_IO - 9P address space operation for direct I/O 232 * v9fs_direct_IO - 9P address space operation for direct I/O
233 * @rw: direction (read or write)
234 * @iocb: target I/O control block 233 * @iocb: target I/O control block
235 * @iov: array of vectors that define I/O buffer 234 * @iov: array of vectors that define I/O buffer
236 * @pos: offset in file to begin the operation 235 * @pos: offset in file to begin the operation
@@ -248,12 +247,12 @@ static int v9fs_launder_page(struct page *page)
248 * 247 *
249 */ 248 */
250static ssize_t 249static ssize_t
251v9fs_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter, loff_t pos) 250v9fs_direct_IO(struct kiocb *iocb, struct iov_iter *iter, loff_t pos)
252{ 251{
253 struct file *file = iocb->ki_filp; 252 struct file *file = iocb->ki_filp;
254 ssize_t n; 253 ssize_t n;
255 int err = 0; 254 int err = 0;
256 if (rw & WRITE) { 255 if (iov_iter_rw(iter) == WRITE) {
257 n = p9_client_write(file->private_data, pos, iter, &err); 256 n = p9_client_write(file->private_data, pos, iter, &err);
258 if (n) { 257 if (n) {
259 struct inode *inode = file_inode(file); 258 struct inode *inode = file_inode(file);
diff --git a/fs/9p/vfs_file.c b/fs/9p/vfs_file.c
index d7fcb775311e..2a9dd37dc426 100644
--- a/fs/9p/vfs_file.c
+++ b/fs/9p/vfs_file.c
@@ -404,21 +404,16 @@ static ssize_t
404v9fs_file_write_iter(struct kiocb *iocb, struct iov_iter *from) 404v9fs_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
405{ 405{
406 struct file *file = iocb->ki_filp; 406 struct file *file = iocb->ki_filp;
407 ssize_t retval = 0; 407 ssize_t retval;
408 loff_t origin = iocb->ki_pos; 408 loff_t origin;
409 size_t count = iov_iter_count(from);
410 int err = 0; 409 int err = 0;
411 410
412 retval = generic_write_checks(file, &origin, &count, 0); 411 retval = generic_write_checks(iocb, from);
413 if (retval) 412 if (retval <= 0)
414 return retval; 413 return retval;
415 414
416 iov_iter_truncate(from, count); 415 origin = iocb->ki_pos;
417 416 retval = p9_client_write(file->private_data, iocb->ki_pos, from, &err);
418 if (!count)
419 return 0;
420
421 retval = p9_client_write(file->private_data, origin, from, &err);
422 if (retval > 0) { 417 if (retval > 0) {
423 struct inode *inode = file_inode(file); 418 struct inode *inode = file_inode(file);
424 loff_t i_size; 419 loff_t i_size;
@@ -428,12 +423,11 @@ v9fs_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
428 if (inode->i_mapping && inode->i_mapping->nrpages) 423 if (inode->i_mapping && inode->i_mapping->nrpages)
429 invalidate_inode_pages2_range(inode->i_mapping, 424 invalidate_inode_pages2_range(inode->i_mapping,
430 pg_start, pg_end); 425 pg_start, pg_end);
431 origin += retval; 426 iocb->ki_pos += retval;
432 i_size = i_size_read(inode); 427 i_size = i_size_read(inode);
433 iocb->ki_pos = origin; 428 if (iocb->ki_pos > i_size) {
434 if (origin > i_size) { 429 inode_add_bytes(inode, iocb->ki_pos - i_size);
435 inode_add_bytes(inode, origin - i_size); 430 i_size_write(inode, iocb->ki_pos);
436 i_size_write(inode, origin);
437 } 431 }
438 return retval; 432 return retval;
439 } 433 }
diff --git a/fs/adfs/dir_fplus.c b/fs/adfs/dir_fplus.c
index f2ba88ab4aed..82d14cdf70f9 100644
--- a/fs/adfs/dir_fplus.c
+++ b/fs/adfs/dir_fplus.c
@@ -61,6 +61,7 @@ adfs_fplus_read(struct super_block *sb, unsigned int id, unsigned int sz, struct
61 kcalloc(size, sizeof(struct buffer_head *), 61 kcalloc(size, sizeof(struct buffer_head *),
62 GFP_KERNEL); 62 GFP_KERNEL);
63 if (!bh_fplus) { 63 if (!bh_fplus) {
64 ret = -ENOMEM;
64 adfs_error(sb, "not enough memory for" 65 adfs_error(sb, "not enough memory for"
65 " dir object %X (%d blocks)", id, size); 66 " dir object %X (%d blocks)", id, size);
66 goto out; 67 goto out;
diff --git a/fs/adfs/super.c b/fs/adfs/super.c
index 9852bdf34d76..a19c31d3f369 100644
--- a/fs/adfs/super.c
+++ b/fs/adfs/super.c
@@ -316,7 +316,7 @@ static struct adfs_discmap *adfs_read_map(struct super_block *sb, struct adfs_di
316 dm = kmalloc(nzones * sizeof(*dm), GFP_KERNEL); 316 dm = kmalloc(nzones * sizeof(*dm), GFP_KERNEL);
317 if (dm == NULL) { 317 if (dm == NULL) {
318 adfs_error(sb, "not enough memory"); 318 adfs_error(sb, "not enough memory");
319 return NULL; 319 return ERR_PTR(-ENOMEM);
320 } 320 }
321 321
322 for (zone = 0; zone < nzones; zone++, map_addr++) { 322 for (zone = 0; zone < nzones; zone++, map_addr++) {
@@ -349,7 +349,7 @@ error_free:
349 brelse(dm[zone].dm_bh); 349 brelse(dm[zone].dm_bh);
350 350
351 kfree(dm); 351 kfree(dm);
352 return NULL; 352 return ERR_PTR(-EIO);
353} 353}
354 354
355static inline unsigned long adfs_discsize(struct adfs_discrecord *dr, int block_bits) 355static inline unsigned long adfs_discsize(struct adfs_discrecord *dr, int block_bits)
@@ -370,6 +370,7 @@ static int adfs_fill_super(struct super_block *sb, void *data, int silent)
370 unsigned char *b_data; 370 unsigned char *b_data;
371 struct adfs_sb_info *asb; 371 struct adfs_sb_info *asb;
372 struct inode *root; 372 struct inode *root;
373 int ret = -EINVAL;
373 374
374 sb->s_flags |= MS_NODIRATIME; 375 sb->s_flags |= MS_NODIRATIME;
375 376
@@ -391,6 +392,7 @@ static int adfs_fill_super(struct super_block *sb, void *data, int silent)
391 sb_set_blocksize(sb, BLOCK_SIZE); 392 sb_set_blocksize(sb, BLOCK_SIZE);
392 if (!(bh = sb_bread(sb, ADFS_DISCRECORD / BLOCK_SIZE))) { 393 if (!(bh = sb_bread(sb, ADFS_DISCRECORD / BLOCK_SIZE))) {
393 adfs_error(sb, "unable to read superblock"); 394 adfs_error(sb, "unable to read superblock");
395 ret = -EIO;
394 goto error; 396 goto error;
395 } 397 }
396 398
@@ -400,6 +402,7 @@ static int adfs_fill_super(struct super_block *sb, void *data, int silent)
400 if (!silent) 402 if (!silent)
401 printk("VFS: Can't find an adfs filesystem on dev " 403 printk("VFS: Can't find an adfs filesystem on dev "
402 "%s.\n", sb->s_id); 404 "%s.\n", sb->s_id);
405 ret = -EINVAL;
403 goto error_free_bh; 406 goto error_free_bh;
404 } 407 }
405 408
@@ -412,6 +415,7 @@ static int adfs_fill_super(struct super_block *sb, void *data, int silent)
412 if (!silent) 415 if (!silent)
413 printk("VPS: Can't find an adfs filesystem on dev " 416 printk("VPS: Can't find an adfs filesystem on dev "
414 "%s.\n", sb->s_id); 417 "%s.\n", sb->s_id);
418 ret = -EINVAL;
415 goto error_free_bh; 419 goto error_free_bh;
416 } 420 }
417 421
@@ -421,11 +425,13 @@ static int adfs_fill_super(struct super_block *sb, void *data, int silent)
421 if (!bh) { 425 if (!bh) {
422 adfs_error(sb, "couldn't read superblock on " 426 adfs_error(sb, "couldn't read superblock on "
423 "2nd try."); 427 "2nd try.");
428 ret = -EIO;
424 goto error; 429 goto error;
425 } 430 }
426 b_data = bh->b_data + (ADFS_DISCRECORD % sb->s_blocksize); 431 b_data = bh->b_data + (ADFS_DISCRECORD % sb->s_blocksize);
427 if (adfs_checkbblk(b_data)) { 432 if (adfs_checkbblk(b_data)) {
428 adfs_error(sb, "disc record mismatch, very weird!"); 433 adfs_error(sb, "disc record mismatch, very weird!");
434 ret = -EINVAL;
429 goto error_free_bh; 435 goto error_free_bh;
430 } 436 }
431 dr = (struct adfs_discrecord *)(b_data + ADFS_DR_OFFSET); 437 dr = (struct adfs_discrecord *)(b_data + ADFS_DR_OFFSET);
@@ -433,6 +439,7 @@ static int adfs_fill_super(struct super_block *sb, void *data, int silent)
433 if (!silent) 439 if (!silent)
434 printk(KERN_ERR "VFS: Unsupported blocksize on dev " 440 printk(KERN_ERR "VFS: Unsupported blocksize on dev "
435 "%s.\n", sb->s_id); 441 "%s.\n", sb->s_id);
442 ret = -EINVAL;
436 goto error; 443 goto error;
437 } 444 }
438 445
@@ -447,10 +454,12 @@ static int adfs_fill_super(struct super_block *sb, void *data, int silent)
447 asb->s_size = adfs_discsize(dr, sb->s_blocksize_bits); 454 asb->s_size = adfs_discsize(dr, sb->s_blocksize_bits);
448 asb->s_version = dr->format_version; 455 asb->s_version = dr->format_version;
449 asb->s_log2sharesize = dr->log2sharesize; 456 asb->s_log2sharesize = dr->log2sharesize;
450 457
451 asb->s_map = adfs_read_map(sb, dr); 458 asb->s_map = adfs_read_map(sb, dr);
452 if (!asb->s_map) 459 if (IS_ERR(asb->s_map)) {
460 ret = PTR_ERR(asb->s_map);
453 goto error_free_bh; 461 goto error_free_bh;
462 }
454 463
455 brelse(bh); 464 brelse(bh);
456 465
@@ -499,6 +508,7 @@ static int adfs_fill_super(struct super_block *sb, void *data, int silent)
499 brelse(asb->s_map[i].dm_bh); 508 brelse(asb->s_map[i].dm_bh);
500 kfree(asb->s_map); 509 kfree(asb->s_map);
501 adfs_error(sb, "get root inode failed\n"); 510 adfs_error(sb, "get root inode failed\n");
511 ret = -EIO;
502 goto error; 512 goto error;
503 } 513 }
504 return 0; 514 return 0;
@@ -508,7 +518,7 @@ error_free_bh:
508error: 518error:
509 sb->s_fs_info = NULL; 519 sb->s_fs_info = NULL;
510 kfree(asb); 520 kfree(asb);
511 return -EINVAL; 521 return ret;
512} 522}
513 523
514static struct dentry *adfs_mount(struct file_system_type *fs_type, 524static struct dentry *adfs_mount(struct file_system_type *fs_type,
diff --git a/fs/affs/affs.h b/fs/affs/affs.h
index c8764bd7497d..cffe8370fb44 100644
--- a/fs/affs/affs.h
+++ b/fs/affs/affs.h
@@ -106,18 +106,22 @@ struct affs_sb_info {
106 spinlock_t work_lock; /* protects sb_work and work_queued */ 106 spinlock_t work_lock; /* protects sb_work and work_queued */
107}; 107};
108 108
109#define SF_INTL 0x0001 /* International filesystem. */ 109#define AFFS_MOUNT_SF_INTL 0x0001 /* International filesystem. */
110#define SF_BM_VALID 0x0002 /* Bitmap is valid. */ 110#define AFFS_MOUNT_SF_BM_VALID 0x0002 /* Bitmap is valid. */
111#define SF_IMMUTABLE 0x0004 /* Protection bits cannot be changed */ 111#define AFFS_MOUNT_SF_IMMUTABLE 0x0004 /* Protection bits cannot be changed */
112#define SF_QUIET 0x0008 /* chmod errors will be not reported */ 112#define AFFS_MOUNT_SF_QUIET 0x0008 /* chmod errors will be not reported */
113#define SF_SETUID 0x0010 /* Ignore Amiga uid */ 113#define AFFS_MOUNT_SF_SETUID 0x0010 /* Ignore Amiga uid */
114#define SF_SETGID 0x0020 /* Ignore Amiga gid */ 114#define AFFS_MOUNT_SF_SETGID 0x0020 /* Ignore Amiga gid */
115#define SF_SETMODE 0x0040 /* Ignore Amiga protection bits */ 115#define AFFS_MOUNT_SF_SETMODE 0x0040 /* Ignore Amiga protection bits */
116#define SF_MUFS 0x0100 /* Use MUFS uid/gid mapping */ 116#define AFFS_MOUNT_SF_MUFS 0x0100 /* Use MUFS uid/gid mapping */
117#define SF_OFS 0x0200 /* Old filesystem */ 117#define AFFS_MOUNT_SF_OFS 0x0200 /* Old filesystem */
118#define SF_PREFIX 0x0400 /* Buffer for prefix is allocated */ 118#define AFFS_MOUNT_SF_PREFIX 0x0400 /* Buffer for prefix is allocated */
119#define SF_VERBOSE 0x0800 /* Talk about fs when mounting */ 119#define AFFS_MOUNT_SF_VERBOSE 0x0800 /* Talk about fs when mounting */
120#define SF_NO_TRUNCATE 0x1000 /* Don't truncate filenames */ 120#define AFFS_MOUNT_SF_NO_TRUNCATE 0x1000 /* Don't truncate filenames */
121
122#define affs_clear_opt(o, opt) (o &= ~AFFS_MOUNT_##opt)
123#define affs_set_opt(o, opt) (o |= AFFS_MOUNT_##opt)
124#define affs_test_opt(o, opt) ((o) & AFFS_MOUNT_##opt)
121 125
122/* short cut to get to the affs specific sb data */ 126/* short cut to get to the affs specific sb data */
123static inline struct affs_sb_info *AFFS_SB(struct super_block *sb) 127static inline struct affs_sb_info *AFFS_SB(struct super_block *sb)
diff --git a/fs/affs/amigaffs.c b/fs/affs/amigaffs.c
index 388da1ea815d..5022ac96aa40 100644
--- a/fs/affs/amigaffs.c
+++ b/fs/affs/amigaffs.c
@@ -472,7 +472,8 @@ bool
472affs_nofilenametruncate(const struct dentry *dentry) 472affs_nofilenametruncate(const struct dentry *dentry)
473{ 473{
474 struct inode *inode = dentry->d_inode; 474 struct inode *inode = dentry->d_inode;
475 return AFFS_SB(inode->i_sb)->s_flags & SF_NO_TRUNCATE; 475
476 return affs_test_opt(AFFS_SB(inode->i_sb)->s_flags, SF_NO_TRUNCATE);
476 477
477} 478}
478 479
diff --git a/fs/affs/file.c b/fs/affs/file.c
index 7c1a3d4c19c2..659c579c4588 100644
--- a/fs/affs/file.c
+++ b/fs/affs/file.c
@@ -389,8 +389,7 @@ static void affs_write_failed(struct address_space *mapping, loff_t to)
389} 389}
390 390
391static ssize_t 391static ssize_t
392affs_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter, 392affs_direct_IO(struct kiocb *iocb, struct iov_iter *iter, loff_t offset)
393 loff_t offset)
394{ 393{
395 struct file *file = iocb->ki_filp; 394 struct file *file = iocb->ki_filp;
396 struct address_space *mapping = file->f_mapping; 395 struct address_space *mapping = file->f_mapping;
@@ -398,15 +397,15 @@ affs_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter,
398 size_t count = iov_iter_count(iter); 397 size_t count = iov_iter_count(iter);
399 ssize_t ret; 398 ssize_t ret;
400 399
401 if (rw == WRITE) { 400 if (iov_iter_rw(iter) == WRITE) {
402 loff_t size = offset + count; 401 loff_t size = offset + count;
403 402
404 if (AFFS_I(inode)->mmu_private < size) 403 if (AFFS_I(inode)->mmu_private < size)
405 return 0; 404 return 0;
406 } 405 }
407 406
408 ret = blockdev_direct_IO(rw, iocb, inode, iter, offset, affs_get_block); 407 ret = blockdev_direct_IO(iocb, inode, iter, offset, affs_get_block);
409 if (ret < 0 && (rw & WRITE)) 408 if (ret < 0 && iov_iter_rw(iter) == WRITE)
410 affs_write_failed(mapping, offset + count); 409 affs_write_failed(mapping, offset + count);
411 return ret; 410 return ret;
412} 411}
@@ -915,7 +914,7 @@ affs_truncate(struct inode *inode)
915 if (inode->i_size) { 914 if (inode->i_size) {
916 AFFS_I(inode)->i_blkcnt = last_blk + 1; 915 AFFS_I(inode)->i_blkcnt = last_blk + 1;
917 AFFS_I(inode)->i_extcnt = ext + 1; 916 AFFS_I(inode)->i_extcnt = ext + 1;
918 if (AFFS_SB(sb)->s_flags & SF_OFS) { 917 if (affs_test_opt(AFFS_SB(sb)->s_flags, SF_OFS)) {
919 struct buffer_head *bh = affs_bread_ino(inode, last_blk, 0); 918 struct buffer_head *bh = affs_bread_ino(inode, last_blk, 0);
920 u32 tmp; 919 u32 tmp;
921 if (IS_ERR(bh)) { 920 if (IS_ERR(bh)) {
diff --git a/fs/affs/inode.c b/fs/affs/inode.c
index 6f34510449e8..9628003ccd2f 100644
--- a/fs/affs/inode.c
+++ b/fs/affs/inode.c
@@ -66,23 +66,23 @@ struct inode *affs_iget(struct super_block *sb, unsigned long ino)
66 AFFS_I(inode)->i_lastalloc = 0; 66 AFFS_I(inode)->i_lastalloc = 0;
67 AFFS_I(inode)->i_pa_cnt = 0; 67 AFFS_I(inode)->i_pa_cnt = 0;
68 68
69 if (sbi->s_flags & SF_SETMODE) 69 if (affs_test_opt(sbi->s_flags, SF_SETMODE))
70 inode->i_mode = sbi->s_mode; 70 inode->i_mode = sbi->s_mode;
71 else 71 else
72 inode->i_mode = prot_to_mode(prot); 72 inode->i_mode = prot_to_mode(prot);
73 73
74 id = be16_to_cpu(tail->uid); 74 id = be16_to_cpu(tail->uid);
75 if (id == 0 || sbi->s_flags & SF_SETUID) 75 if (id == 0 || affs_test_opt(sbi->s_flags, SF_SETUID))
76 inode->i_uid = sbi->s_uid; 76 inode->i_uid = sbi->s_uid;
77 else if (id == 0xFFFF && sbi->s_flags & SF_MUFS) 77 else if (id == 0xFFFF && affs_test_opt(sbi->s_flags, SF_MUFS))
78 i_uid_write(inode, 0); 78 i_uid_write(inode, 0);
79 else 79 else
80 i_uid_write(inode, id); 80 i_uid_write(inode, id);
81 81
82 id = be16_to_cpu(tail->gid); 82 id = be16_to_cpu(tail->gid);
83 if (id == 0 || sbi->s_flags & SF_SETGID) 83 if (id == 0 || affs_test_opt(sbi->s_flags, SF_SETGID))
84 inode->i_gid = sbi->s_gid; 84 inode->i_gid = sbi->s_gid;
85 else if (id == 0xFFFF && sbi->s_flags & SF_MUFS) 85 else if (id == 0xFFFF && affs_test_opt(sbi->s_flags, SF_MUFS))
86 i_gid_write(inode, 0); 86 i_gid_write(inode, 0);
87 else 87 else
88 i_gid_write(inode, id); 88 i_gid_write(inode, id);
@@ -94,7 +94,7 @@ struct inode *affs_iget(struct super_block *sb, unsigned long ino)
94 /* fall through */ 94 /* fall through */
95 case ST_USERDIR: 95 case ST_USERDIR:
96 if (be32_to_cpu(tail->stype) == ST_USERDIR || 96 if (be32_to_cpu(tail->stype) == ST_USERDIR ||
97 sbi->s_flags & SF_SETMODE) { 97 affs_test_opt(sbi->s_flags, SF_SETMODE)) {
98 if (inode->i_mode & S_IRUSR) 98 if (inode->i_mode & S_IRUSR)
99 inode->i_mode |= S_IXUSR; 99 inode->i_mode |= S_IXUSR;
100 if (inode->i_mode & S_IRGRP) 100 if (inode->i_mode & S_IRGRP)
@@ -133,7 +133,8 @@ struct inode *affs_iget(struct super_block *sb, unsigned long ino)
133 } 133 }
134 if (tail->link_chain) 134 if (tail->link_chain)
135 set_nlink(inode, 2); 135 set_nlink(inode, 2);
136 inode->i_mapping->a_ops = (sbi->s_flags & SF_OFS) ? &affs_aops_ofs : &affs_aops; 136 inode->i_mapping->a_ops = affs_test_opt(sbi->s_flags, SF_OFS) ?
137 &affs_aops_ofs : &affs_aops;
137 inode->i_op = &affs_file_inode_operations; 138 inode->i_op = &affs_file_inode_operations;
138 inode->i_fop = &affs_file_operations; 139 inode->i_fop = &affs_file_operations;
139 break; 140 break;
@@ -190,15 +191,15 @@ affs_write_inode(struct inode *inode, struct writeback_control *wbc)
190 if (!(inode->i_ino == AFFS_SB(sb)->s_root_block)) { 191 if (!(inode->i_ino == AFFS_SB(sb)->s_root_block)) {
191 uid = i_uid_read(inode); 192 uid = i_uid_read(inode);
192 gid = i_gid_read(inode); 193 gid = i_gid_read(inode);
193 if (AFFS_SB(sb)->s_flags & SF_MUFS) { 194 if (affs_test_opt(AFFS_SB(sb)->s_flags, SF_MUFS)) {
194 if (uid == 0 || uid == 0xFFFF) 195 if (uid == 0 || uid == 0xFFFF)
195 uid = uid ^ ~0; 196 uid = uid ^ ~0;
196 if (gid == 0 || gid == 0xFFFF) 197 if (gid == 0 || gid == 0xFFFF)
197 gid = gid ^ ~0; 198 gid = gid ^ ~0;
198 } 199 }
199 if (!(AFFS_SB(sb)->s_flags & SF_SETUID)) 200 if (!affs_test_opt(AFFS_SB(sb)->s_flags, SF_SETUID))
200 tail->uid = cpu_to_be16(uid); 201 tail->uid = cpu_to_be16(uid);
201 if (!(AFFS_SB(sb)->s_flags & SF_SETGID)) 202 if (!affs_test_opt(AFFS_SB(sb)->s_flags, SF_SETGID))
202 tail->gid = cpu_to_be16(gid); 203 tail->gid = cpu_to_be16(gid);
203 } 204 }
204 } 205 }
@@ -221,11 +222,14 @@ affs_notify_change(struct dentry *dentry, struct iattr *attr)
221 if (error) 222 if (error)
222 goto out; 223 goto out;
223 224
224 if (((attr->ia_valid & ATTR_UID) && (AFFS_SB(inode->i_sb)->s_flags & SF_SETUID)) || 225 if (((attr->ia_valid & ATTR_UID) &&
225 ((attr->ia_valid & ATTR_GID) && (AFFS_SB(inode->i_sb)->s_flags & SF_SETGID)) || 226 affs_test_opt(AFFS_SB(inode->i_sb)->s_flags, SF_SETUID)) ||
227 ((attr->ia_valid & ATTR_GID) &&
228 affs_test_opt(AFFS_SB(inode->i_sb)->s_flags, SF_SETGID)) ||
226 ((attr->ia_valid & ATTR_MODE) && 229 ((attr->ia_valid & ATTR_MODE) &&
227 (AFFS_SB(inode->i_sb)->s_flags & (SF_SETMODE | SF_IMMUTABLE)))) { 230 (AFFS_SB(inode->i_sb)->s_flags &
228 if (!(AFFS_SB(inode->i_sb)->s_flags & SF_QUIET)) 231 (AFFS_MOUNT_SF_SETMODE | AFFS_MOUNT_SF_IMMUTABLE)))) {
232 if (!affs_test_opt(AFFS_SB(inode->i_sb)->s_flags, SF_QUIET))
229 error = -EPERM; 233 error = -EPERM;
230 goto out; 234 goto out;
231 } 235 }
diff --git a/fs/affs/namei.c b/fs/affs/namei.c
index ffb7bd82c2a5..ec8ca0efb960 100644
--- a/fs/affs/namei.c
+++ b/fs/affs/namei.c
@@ -53,7 +53,8 @@ affs_intl_toupper(int ch)
53static inline toupper_t 53static inline toupper_t
54affs_get_toupper(struct super_block *sb) 54affs_get_toupper(struct super_block *sb)
55{ 55{
56 return AFFS_SB(sb)->s_flags & SF_INTL ? affs_intl_toupper : affs_toupper; 56 return affs_test_opt(AFFS_SB(sb)->s_flags, SF_INTL) ?
57 affs_intl_toupper : affs_toupper;
57} 58}
58 59
59/* 60/*
@@ -275,7 +276,8 @@ affs_create(struct inode *dir, struct dentry *dentry, umode_t mode, bool excl)
275 276
276 inode->i_op = &affs_file_inode_operations; 277 inode->i_op = &affs_file_inode_operations;
277 inode->i_fop = &affs_file_operations; 278 inode->i_fop = &affs_file_operations;
278 inode->i_mapping->a_ops = (AFFS_SB(sb)->s_flags & SF_OFS) ? &affs_aops_ofs : &affs_aops; 279 inode->i_mapping->a_ops = affs_test_opt(AFFS_SB(sb)->s_flags, SF_OFS) ?
280 &affs_aops_ofs : &affs_aops;
279 error = affs_add_entry(dir, inode, dentry, ST_FILE); 281 error = affs_add_entry(dir, inode, dentry, ST_FILE);
280 if (error) { 282 if (error) {
281 clear_nlink(inode); 283 clear_nlink(inode);
diff --git a/fs/affs/super.c b/fs/affs/super.c
index 4cf0e9113fb6..3f89c9e05b40 100644
--- a/fs/affs/super.c
+++ b/fs/affs/super.c
@@ -227,22 +227,22 @@ parse_options(char *options, kuid_t *uid, kgid_t *gid, int *mode, int *reserved,
227 if (match_octal(&args[0], &option)) 227 if (match_octal(&args[0], &option))
228 return 0; 228 return 0;
229 *mode = option & 0777; 229 *mode = option & 0777;
230 *mount_opts |= SF_SETMODE; 230 affs_set_opt(*mount_opts, SF_SETMODE);
231 break; 231 break;
232 case Opt_mufs: 232 case Opt_mufs:
233 *mount_opts |= SF_MUFS; 233 affs_set_opt(*mount_opts, SF_MUFS);
234 break; 234 break;
235 case Opt_notruncate: 235 case Opt_notruncate:
236 *mount_opts |= SF_NO_TRUNCATE; 236 affs_set_opt(*mount_opts, SF_NO_TRUNCATE);
237 break; 237 break;
238 case Opt_prefix: 238 case Opt_prefix:
239 *prefix = match_strdup(&args[0]); 239 *prefix = match_strdup(&args[0]);
240 if (!*prefix) 240 if (!*prefix)
241 return 0; 241 return 0;
242 *mount_opts |= SF_PREFIX; 242 affs_set_opt(*mount_opts, SF_PREFIX);
243 break; 243 break;
244 case Opt_protect: 244 case Opt_protect:
245 *mount_opts |= SF_IMMUTABLE; 245 affs_set_opt(*mount_opts, SF_IMMUTABLE);
246 break; 246 break;
247 case Opt_reserved: 247 case Opt_reserved:
248 if (match_int(&args[0], reserved)) 248 if (match_int(&args[0], reserved))
@@ -258,7 +258,7 @@ parse_options(char *options, kuid_t *uid, kgid_t *gid, int *mode, int *reserved,
258 *gid = make_kgid(current_user_ns(), option); 258 *gid = make_kgid(current_user_ns(), option);
259 if (!gid_valid(*gid)) 259 if (!gid_valid(*gid))
260 return 0; 260 return 0;
261 *mount_opts |= SF_SETGID; 261 affs_set_opt(*mount_opts, SF_SETGID);
262 break; 262 break;
263 case Opt_setuid: 263 case Opt_setuid:
264 if (match_int(&args[0], &option)) 264 if (match_int(&args[0], &option))
@@ -266,10 +266,10 @@ parse_options(char *options, kuid_t *uid, kgid_t *gid, int *mode, int *reserved,
266 *uid = make_kuid(current_user_ns(), option); 266 *uid = make_kuid(current_user_ns(), option);
267 if (!uid_valid(*uid)) 267 if (!uid_valid(*uid))
268 return 0; 268 return 0;
269 *mount_opts |= SF_SETUID; 269 affs_set_opt(*mount_opts, SF_SETUID);
270 break; 270 break;
271 case Opt_verbose: 271 case Opt_verbose:
272 *mount_opts |= SF_VERBOSE; 272 affs_set_opt(*mount_opts, SF_VERBOSE);
273 break; 273 break;
274 case Opt_volume: { 274 case Opt_volume: {
275 char *vol = match_strdup(&args[0]); 275 char *vol = match_strdup(&args[0]);
@@ -435,30 +435,31 @@ got_root:
435 case MUFS_FS: 435 case MUFS_FS:
436 case MUFS_INTLFFS: 436 case MUFS_INTLFFS:
437 case MUFS_DCFFS: 437 case MUFS_DCFFS:
438 sbi->s_flags |= SF_MUFS; 438 affs_set_opt(sbi->s_flags, SF_MUFS);
439 /* fall thru */ 439 /* fall thru */
440 case FS_INTLFFS: 440 case FS_INTLFFS:
441 case FS_DCFFS: 441 case FS_DCFFS:
442 sbi->s_flags |= SF_INTL; 442 affs_set_opt(sbi->s_flags, SF_INTL);
443 break; 443 break;
444 case MUFS_FFS: 444 case MUFS_FFS:
445 sbi->s_flags |= SF_MUFS; 445 affs_set_opt(sbi->s_flags, SF_MUFS);
446 break; 446 break;
447 case FS_FFS: 447 case FS_FFS:
448 break; 448 break;
449 case MUFS_OFS: 449 case MUFS_OFS:
450 sbi->s_flags |= SF_MUFS; 450 affs_set_opt(sbi->s_flags, SF_MUFS);
451 /* fall thru */ 451 /* fall thru */
452 case FS_OFS: 452 case FS_OFS:
453 sbi->s_flags |= SF_OFS; 453 affs_set_opt(sbi->s_flags, SF_OFS);
454 sb->s_flags |= MS_NOEXEC; 454 sb->s_flags |= MS_NOEXEC;
455 break; 455 break;
456 case MUFS_DCOFS: 456 case MUFS_DCOFS:
457 case MUFS_INTLOFS: 457 case MUFS_INTLOFS:
458 sbi->s_flags |= SF_MUFS; 458 affs_set_opt(sbi->s_flags, SF_MUFS);
459 case FS_DCOFS: 459 case FS_DCOFS:
460 case FS_INTLOFS: 460 case FS_INTLOFS:
461 sbi->s_flags |= SF_INTL | SF_OFS; 461 affs_set_opt(sbi->s_flags, SF_INTL);
462 affs_set_opt(sbi->s_flags, SF_OFS);
462 sb->s_flags |= MS_NOEXEC; 463 sb->s_flags |= MS_NOEXEC;
463 break; 464 break;
464 default: 465 default:
@@ -467,7 +468,7 @@ got_root:
467 return -EINVAL; 468 return -EINVAL;
468 } 469 }
469 470
470 if (mount_flags & SF_VERBOSE) { 471 if (affs_test_opt(mount_flags, SF_VERBOSE)) {
471 u8 len = AFFS_ROOT_TAIL(sb, root_bh)->disk_name[0]; 472 u8 len = AFFS_ROOT_TAIL(sb, root_bh)->disk_name[0];
472 pr_notice("Mounting volume \"%.*s\": Type=%.3s\\%c, Blocksize=%d\n", 473 pr_notice("Mounting volume \"%.*s\": Type=%.3s\\%c, Blocksize=%d\n",
473 len > 31 ? 31 : len, 474 len > 31 ? 31 : len,
@@ -478,7 +479,7 @@ got_root:
478 sb->s_flags |= MS_NODEV | MS_NOSUID; 479 sb->s_flags |= MS_NODEV | MS_NOSUID;
479 480
480 sbi->s_data_blksize = sb->s_blocksize; 481 sbi->s_data_blksize = sb->s_blocksize;
481 if (sbi->s_flags & SF_OFS) 482 if (affs_test_opt(sbi->s_flags, SF_OFS))
482 sbi->s_data_blksize -= 24; 483 sbi->s_data_blksize -= 24;
483 484
484 tmp_flags = sb->s_flags; 485 tmp_flags = sb->s_flags;
@@ -493,7 +494,7 @@ got_root:
493 if (IS_ERR(root_inode)) 494 if (IS_ERR(root_inode))
494 return PTR_ERR(root_inode); 495 return PTR_ERR(root_inode);
495 496
496 if (AFFS_SB(sb)->s_flags & SF_INTL) 497 if (affs_test_opt(AFFS_SB(sb)->s_flags, SF_INTL))
497 sb->s_d_op = &affs_intl_dentry_operations; 498 sb->s_d_op = &affs_intl_dentry_operations;
498 else 499 else
499 sb->s_d_op = &affs_dentry_operations; 500 sb->s_d_op = &affs_dentry_operations;
@@ -520,10 +521,14 @@ affs_remount(struct super_block *sb, int *flags, char *data)
520 int root_block; 521 int root_block;
521 unsigned long mount_flags; 522 unsigned long mount_flags;
522 int res = 0; 523 int res = 0;
523 char *new_opts = kstrdup(data, GFP_KERNEL); 524 char *new_opts;
524 char volume[32]; 525 char volume[32];
525 char *prefix = NULL; 526 char *prefix = NULL;
526 527
528 new_opts = kstrdup(data, GFP_KERNEL);
529 if (!new_opts)
530 return -ENOMEM;
531
527 pr_debug("%s(flags=0x%x,opts=\"%s\")\n", __func__, *flags, data); 532 pr_debug("%s(flags=0x%x,opts=\"%s\")\n", __func__, *flags, data);
528 533
529 sync_filesystem(sb); 534 sync_filesystem(sb);
diff --git a/fs/aio.c b/fs/aio.c
index 5785c4b58fea..480440f4701f 100644
--- a/fs/aio.c
+++ b/fs/aio.c
@@ -77,6 +77,11 @@ struct kioctx_cpu {
77 unsigned reqs_available; 77 unsigned reqs_available;
78}; 78};
79 79
80struct ctx_rq_wait {
81 struct completion comp;
82 atomic_t count;
83};
84
80struct kioctx { 85struct kioctx {
81 struct percpu_ref users; 86 struct percpu_ref users;
82 atomic_t dead; 87 atomic_t dead;
@@ -115,7 +120,7 @@ struct kioctx {
115 /* 120 /*
116 * signals when all in-flight requests are done 121 * signals when all in-flight requests are done
117 */ 122 */
118 struct completion *requests_done; 123 struct ctx_rq_wait *rq_wait;
119 124
120 struct { 125 struct {
121 /* 126 /*
@@ -572,8 +577,8 @@ static void free_ioctx_reqs(struct percpu_ref *ref)
572 struct kioctx *ctx = container_of(ref, struct kioctx, reqs); 577 struct kioctx *ctx = container_of(ref, struct kioctx, reqs);
573 578
574 /* At this point we know that there are no any in-flight requests */ 579 /* At this point we know that there are no any in-flight requests */
575 if (ctx->requests_done) 580 if (ctx->rq_wait && atomic_dec_and_test(&ctx->rq_wait->count))
576 complete(ctx->requests_done); 581 complete(&ctx->rq_wait->comp);
577 582
578 INIT_WORK(&ctx->free_work, free_ioctx); 583 INIT_WORK(&ctx->free_work, free_ioctx);
579 schedule_work(&ctx->free_work); 584 schedule_work(&ctx->free_work);
@@ -783,7 +788,7 @@ err:
783 * the rapid destruction of the kioctx. 788 * the rapid destruction of the kioctx.
784 */ 789 */
785static int kill_ioctx(struct mm_struct *mm, struct kioctx *ctx, 790static int kill_ioctx(struct mm_struct *mm, struct kioctx *ctx,
786 struct completion *requests_done) 791 struct ctx_rq_wait *wait)
787{ 792{
788 struct kioctx_table *table; 793 struct kioctx_table *table;
789 794
@@ -813,7 +818,7 @@ static int kill_ioctx(struct mm_struct *mm, struct kioctx *ctx,
813 if (ctx->mmap_size) 818 if (ctx->mmap_size)
814 vm_munmap(ctx->mmap_base, ctx->mmap_size); 819 vm_munmap(ctx->mmap_base, ctx->mmap_size);
815 820
816 ctx->requests_done = requests_done; 821 ctx->rq_wait = wait;
817 percpu_ref_kill(&ctx->users); 822 percpu_ref_kill(&ctx->users);
818 return 0; 823 return 0;
819} 824}
@@ -829,18 +834,24 @@ static int kill_ioctx(struct mm_struct *mm, struct kioctx *ctx,
829void exit_aio(struct mm_struct *mm) 834void exit_aio(struct mm_struct *mm)
830{ 835{
831 struct kioctx_table *table = rcu_dereference_raw(mm->ioctx_table); 836 struct kioctx_table *table = rcu_dereference_raw(mm->ioctx_table);
832 int i; 837 struct ctx_rq_wait wait;
838 int i, skipped;
833 839
834 if (!table) 840 if (!table)
835 return; 841 return;
836 842
843 atomic_set(&wait.count, table->nr);
844 init_completion(&wait.comp);
845
846 skipped = 0;
837 for (i = 0; i < table->nr; ++i) { 847 for (i = 0; i < table->nr; ++i) {
838 struct kioctx *ctx = table->table[i]; 848 struct kioctx *ctx = table->table[i];
839 struct completion requests_done =
840 COMPLETION_INITIALIZER_ONSTACK(requests_done);
841 849
842 if (!ctx) 850 if (!ctx) {
851 skipped++;
843 continue; 852 continue;
853 }
854
844 /* 855 /*
845 * We don't need to bother with munmap() here - exit_mmap(mm) 856 * We don't need to bother with munmap() here - exit_mmap(mm)
846 * is coming and it'll unmap everything. And we simply can't, 857 * is coming and it'll unmap everything. And we simply can't,
@@ -849,10 +860,12 @@ void exit_aio(struct mm_struct *mm)
849 * that it needs to unmap the area, just set it to 0. 860 * that it needs to unmap the area, just set it to 0.
850 */ 861 */
851 ctx->mmap_size = 0; 862 ctx->mmap_size = 0;
852 kill_ioctx(mm, ctx, &requests_done); 863 kill_ioctx(mm, ctx, &wait);
864 }
853 865
866 if (!atomic_sub_and_test(skipped, &wait.count)) {
854 /* Wait until all IO for the context are done. */ 867 /* Wait until all IO for the context are done. */
855 wait_for_completion(&requests_done); 868 wait_for_completion(&wait.comp);
856 } 869 }
857 870
858 RCU_INIT_POINTER(mm->ioctx_table, NULL); 871 RCU_INIT_POINTER(mm->ioctx_table, NULL);
@@ -1331,15 +1344,17 @@ SYSCALL_DEFINE1(io_destroy, aio_context_t, ctx)
1331{ 1344{
1332 struct kioctx *ioctx = lookup_ioctx(ctx); 1345 struct kioctx *ioctx = lookup_ioctx(ctx);
1333 if (likely(NULL != ioctx)) { 1346 if (likely(NULL != ioctx)) {
1334 struct completion requests_done = 1347 struct ctx_rq_wait wait;
1335 COMPLETION_INITIALIZER_ONSTACK(requests_done);
1336 int ret; 1348 int ret;
1337 1349
1350 init_completion(&wait.comp);
1351 atomic_set(&wait.count, 1);
1352
1338 /* Pass requests_done to kill_ioctx() where it can be set 1353 /* Pass requests_done to kill_ioctx() where it can be set
1339 * in a thread-safe way. If we try to set it here then we have 1354 * in a thread-safe way. If we try to set it here then we have
1340 * a race condition if two io_destroy() called simultaneously. 1355 * a race condition if two io_destroy() called simultaneously.
1341 */ 1356 */
1342 ret = kill_ioctx(current->mm, ioctx, &requests_done); 1357 ret = kill_ioctx(current->mm, ioctx, &wait);
1343 percpu_ref_put(&ioctx->users); 1358 percpu_ref_put(&ioctx->users);
1344 1359
1345 /* Wait until all IO for the context are done. Otherwise kernel 1360 /* Wait until all IO for the context are done. Otherwise kernel
@@ -1347,7 +1362,7 @@ SYSCALL_DEFINE1(io_destroy, aio_context_t, ctx)
1347 * is destroyed. 1362 * is destroyed.
1348 */ 1363 */
1349 if (!ret) 1364 if (!ret)
1350 wait_for_completion(&requests_done); 1365 wait_for_completion(&wait.comp);
1351 1366
1352 return ret; 1367 return ret;
1353 } 1368 }
@@ -1502,7 +1517,7 @@ static int io_submit_one(struct kioctx *ctx, struct iocb __user *user_iocb,
1502 } 1517 }
1503 req->common.ki_pos = iocb->aio_offset; 1518 req->common.ki_pos = iocb->aio_offset;
1504 req->common.ki_complete = aio_complete; 1519 req->common.ki_complete = aio_complete;
1505 req->common.ki_flags = 0; 1520 req->common.ki_flags = iocb_flags(req->common.ki_filp);
1506 1521
1507 if (iocb->aio_flags & IOCB_FLAG_RESFD) { 1522 if (iocb->aio_flags & IOCB_FLAG_RESFD) {
1508 /* 1523 /*
diff --git a/fs/befs/befs.h b/fs/befs/befs.h
index 3a7813ab8c95..1fead8d56a98 100644
--- a/fs/befs/befs.h
+++ b/fs/befs/befs.h
@@ -19,16 +19,16 @@ typedef u64 befs_blocknr_t;
19 * BeFS in memory structures 19 * BeFS in memory structures
20 */ 20 */
21 21
22typedef struct befs_mount_options { 22struct befs_mount_options {
23 kgid_t gid; 23 kgid_t gid;
24 kuid_t uid; 24 kuid_t uid;
25 int use_gid; 25 int use_gid;
26 int use_uid; 26 int use_uid;
27 int debug; 27 int debug;
28 char *iocharset; 28 char *iocharset;
29} befs_mount_options; 29};
30 30
31typedef struct befs_sb_info { 31struct befs_sb_info {
32 u32 magic1; 32 u32 magic1;
33 u32 block_size; 33 u32 block_size;
34 u32 block_shift; 34 u32 block_shift;
@@ -52,12 +52,11 @@ typedef struct befs_sb_info {
52 befs_inode_addr indices; 52 befs_inode_addr indices;
53 u32 magic3; 53 u32 magic3;
54 54
55 befs_mount_options mount_opts; 55 struct befs_mount_options mount_opts;
56 struct nls_table *nls; 56 struct nls_table *nls;
57};
57 58
58} befs_sb_info; 59struct befs_inode_info {
59
60typedef struct befs_inode_info {
61 u32 i_flags; 60 u32 i_flags;
62 u32 i_type; 61 u32 i_type;
63 62
@@ -71,8 +70,7 @@ typedef struct befs_inode_info {
71 } i_data; 70 } i_data;
72 71
73 struct inode vfs_inode; 72 struct inode vfs_inode;
74 73};
75} befs_inode_info;
76 74
77enum befs_err { 75enum befs_err {
78 BEFS_OK, 76 BEFS_OK,
@@ -105,13 +103,13 @@ void befs_dump_index_node(const struct super_block *sb, befs_btree_nodehead *);
105/* Gets a pointer to the private portion of the super_block 103/* Gets a pointer to the private portion of the super_block
106 * structure from the public part 104 * structure from the public part
107 */ 105 */
108static inline befs_sb_info * 106static inline struct befs_sb_info *
109BEFS_SB(const struct super_block *super) 107BEFS_SB(const struct super_block *super)
110{ 108{
111 return (befs_sb_info *) super->s_fs_info; 109 return (struct befs_sb_info *) super->s_fs_info;
112} 110}
113 111
114static inline befs_inode_info * 112static inline struct befs_inode_info *
115BEFS_I(const struct inode *inode) 113BEFS_I(const struct inode *inode)
116{ 114{
117 return list_entry(inode, struct befs_inode_info, vfs_inode); 115 return list_entry(inode, struct befs_inode_info, vfs_inode);
diff --git a/fs/befs/datastream.c b/fs/befs/datastream.c
index 1e8e0b8d8836..ebd50718659f 100644
--- a/fs/befs/datastream.c
+++ b/fs/befs/datastream.c
@@ -168,7 +168,7 @@ befs_count_blocks(struct super_block * sb, befs_data_stream * ds)
168 befs_blocknr_t blocks; 168 befs_blocknr_t blocks;
169 befs_blocknr_t datablocks; /* File data blocks */ 169 befs_blocknr_t datablocks; /* File data blocks */
170 befs_blocknr_t metablocks; /* FS metadata blocks */ 170 befs_blocknr_t metablocks; /* FS metadata blocks */
171 befs_sb_info *befs_sb = BEFS_SB(sb); 171 struct befs_sb_info *befs_sb = BEFS_SB(sb);
172 172
173 befs_debug(sb, "---> %s", __func__); 173 befs_debug(sb, "---> %s", __func__);
174 174
@@ -428,7 +428,7 @@ befs_find_brun_dblindirect(struct super_block *sb,
428 struct buffer_head *indir_block; 428 struct buffer_head *indir_block;
429 befs_block_run indir_run; 429 befs_block_run indir_run;
430 befs_disk_inode_addr *iaddr_array = NULL; 430 befs_disk_inode_addr *iaddr_array = NULL;
431 befs_sb_info *befs_sb = BEFS_SB(sb); 431 struct befs_sb_info *befs_sb = BEFS_SB(sb);
432 432
433 befs_blocknr_t indir_start_blk = 433 befs_blocknr_t indir_start_blk =
434 data->max_indirect_range >> befs_sb->block_shift; 434 data->max_indirect_range >> befs_sb->block_shift;
diff --git a/fs/befs/io.c b/fs/befs/io.c
index 0408a3d601d0..7a5b4ec21c56 100644
--- a/fs/befs/io.c
+++ b/fs/befs/io.c
@@ -28,7 +28,7 @@ befs_bread_iaddr(struct super_block *sb, befs_inode_addr iaddr)
28{ 28{
29 struct buffer_head *bh = NULL; 29 struct buffer_head *bh = NULL;
30 befs_blocknr_t block = 0; 30 befs_blocknr_t block = 0;
31 befs_sb_info *befs_sb = BEFS_SB(sb); 31 struct befs_sb_info *befs_sb = BEFS_SB(sb);
32 32
33 befs_debug(sb, "---> Enter %s " 33 befs_debug(sb, "---> Enter %s "
34 "[%u, %hu, %hu]", __func__, iaddr.allocation_group, 34 "[%u, %hu, %hu]", __func__, iaddr.allocation_group,
diff --git a/fs/befs/linuxvfs.c b/fs/befs/linuxvfs.c
index e089f1985fca..16e0a48bfccd 100644
--- a/fs/befs/linuxvfs.c
+++ b/fs/befs/linuxvfs.c
@@ -51,7 +51,7 @@ static int befs_nls2utf(struct super_block *sb, const char *in, int in_len,
51static void befs_put_super(struct super_block *); 51static void befs_put_super(struct super_block *);
52static int befs_remount(struct super_block *, int *, char *); 52static int befs_remount(struct super_block *, int *, char *);
53static int befs_statfs(struct dentry *, struct kstatfs *); 53static int befs_statfs(struct dentry *, struct kstatfs *);
54static int parse_options(char *, befs_mount_options *); 54static int parse_options(char *, struct befs_mount_options *);
55 55
56static const struct super_operations befs_sops = { 56static const struct super_operations befs_sops = {
57 .alloc_inode = befs_alloc_inode, /* allocate a new inode */ 57 .alloc_inode = befs_alloc_inode, /* allocate a new inode */
@@ -304,9 +304,8 @@ static struct inode *befs_iget(struct super_block *sb, unsigned long ino)
304{ 304{
305 struct buffer_head *bh = NULL; 305 struct buffer_head *bh = NULL;
306 befs_inode *raw_inode = NULL; 306 befs_inode *raw_inode = NULL;
307 307 struct befs_sb_info *befs_sb = BEFS_SB(sb);
308 befs_sb_info *befs_sb = BEFS_SB(sb); 308 struct befs_inode_info *befs_ino = NULL;
309 befs_inode_info *befs_ino = NULL;
310 struct inode *inode; 309 struct inode *inode;
311 long ret = -EIO; 310 long ret = -EIO;
312 311
@@ -472,7 +471,7 @@ static void *
472befs_follow_link(struct dentry *dentry, struct nameidata *nd) 471befs_follow_link(struct dentry *dentry, struct nameidata *nd)
473{ 472{
474 struct super_block *sb = dentry->d_sb; 473 struct super_block *sb = dentry->d_sb;
475 befs_inode_info *befs_ino = BEFS_I(dentry->d_inode); 474 struct befs_inode_info *befs_ino = BEFS_I(dentry->d_inode);
476 befs_data_stream *data = &befs_ino->i_data.ds; 475 befs_data_stream *data = &befs_ino->i_data.ds;
477 befs_off_t len = data->size; 476 befs_off_t len = data->size;
478 char *link; 477 char *link;
@@ -502,7 +501,8 @@ befs_follow_link(struct dentry *dentry, struct nameidata *nd)
502static void * 501static void *
503befs_fast_follow_link(struct dentry *dentry, struct nameidata *nd) 502befs_fast_follow_link(struct dentry *dentry, struct nameidata *nd)
504{ 503{
505 befs_inode_info *befs_ino = BEFS_I(dentry->d_inode); 504 struct befs_inode_info *befs_ino = BEFS_I(dentry->d_inode);
505
506 nd_set_link(nd, befs_ino->i_data.symlink); 506 nd_set_link(nd, befs_ino->i_data.symlink);
507 return NULL; 507 return NULL;
508} 508}
@@ -669,7 +669,7 @@ static const match_table_t befs_tokens = {
669}; 669};
670 670
671static int 671static int
672parse_options(char *options, befs_mount_options * opts) 672parse_options(char *options, struct befs_mount_options *opts)
673{ 673{
674 char *p; 674 char *p;
675 substring_t args[MAX_OPT_ARGS]; 675 substring_t args[MAX_OPT_ARGS];
@@ -769,7 +769,7 @@ static int
769befs_fill_super(struct super_block *sb, void *data, int silent) 769befs_fill_super(struct super_block *sb, void *data, int silent)
770{ 770{
771 struct buffer_head *bh; 771 struct buffer_head *bh;
772 befs_sb_info *befs_sb; 772 struct befs_sb_info *befs_sb;
773 befs_super_block *disk_sb; 773 befs_super_block *disk_sb;
774 struct inode *root; 774 struct inode *root;
775 long ret = -EINVAL; 775 long ret = -EINVAL;
diff --git a/fs/befs/super.c b/fs/befs/super.c
index ca40f828f64d..aeafc4d84278 100644
--- a/fs/befs/super.c
+++ b/fs/befs/super.c
@@ -24,7 +24,7 @@
24int 24int
25befs_load_sb(struct super_block *sb, befs_super_block * disk_sb) 25befs_load_sb(struct super_block *sb, befs_super_block * disk_sb)
26{ 26{
27 befs_sb_info *befs_sb = BEFS_SB(sb); 27 struct befs_sb_info *befs_sb = BEFS_SB(sb);
28 28
29 /* Check the byte order of the filesystem */ 29 /* Check the byte order of the filesystem */
30 if (disk_sb->fs_byte_order == BEFS_BYTEORDER_NATIVE_LE) 30 if (disk_sb->fs_byte_order == BEFS_BYTEORDER_NATIVE_LE)
@@ -59,7 +59,7 @@ befs_load_sb(struct super_block *sb, befs_super_block * disk_sb)
59int 59int
60befs_check_sb(struct super_block *sb) 60befs_check_sb(struct super_block *sb)
61{ 61{
62 befs_sb_info *befs_sb = BEFS_SB(sb); 62 struct befs_sb_info *befs_sb = BEFS_SB(sb);
63 63
64 /* Check magic headers of super block */ 64 /* Check magic headers of super block */
65 if ((befs_sb->magic1 != BEFS_SUPER_MAGIC1) 65 if ((befs_sb->magic1 != BEFS_SUPER_MAGIC1)
diff --git a/fs/bfs/dir.c b/fs/bfs/dir.c
index 08063ae0a17c..7a8182770649 100644
--- a/fs/bfs/dir.c
+++ b/fs/bfs/dir.c
@@ -86,7 +86,7 @@ static int bfs_create(struct inode *dir, struct dentry *dentry, umode_t mode,
86 86
87 inode = new_inode(s); 87 inode = new_inode(s);
88 if (!inode) 88 if (!inode)
89 return -ENOSPC; 89 return -ENOMEM;
90 mutex_lock(&info->bfs_lock); 90 mutex_lock(&info->bfs_lock);
91 ino = find_first_zero_bit(info->si_imap, info->si_lasti + 1); 91 ino = find_first_zero_bit(info->si_imap, info->si_lasti + 1);
92 if (ino > info->si_lasti) { 92 if (ino > info->si_lasti) {
@@ -293,7 +293,7 @@ static int bfs_add_entry(struct inode *dir, const unsigned char *name,
293 for (block = sblock; block <= eblock; block++) { 293 for (block = sblock; block <= eblock; block++) {
294 bh = sb_bread(dir->i_sb, block); 294 bh = sb_bread(dir->i_sb, block);
295 if (!bh) 295 if (!bh)
296 return -ENOSPC; 296 return -EIO;
297 for (off = 0; off < BFS_BSIZE; off += BFS_DIRENT_SIZE) { 297 for (off = 0; off < BFS_BSIZE; off += BFS_DIRENT_SIZE) {
298 de = (struct bfs_dirent *)(bh->b_data + off); 298 de = (struct bfs_dirent *)(bh->b_data + off);
299 if (!de->ino) { 299 if (!de->ino) {
diff --git a/fs/binfmt_misc.c b/fs/binfmt_misc.c
index 97aff2879cda..9dcb05409ba7 100644
--- a/fs/binfmt_misc.c
+++ b/fs/binfmt_misc.c
@@ -9,6 +9,7 @@
9 9
10#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 10#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11 11
12#include <linux/kernel.h>
12#include <linux/module.h> 13#include <linux/module.h>
13#include <linux/init.h> 14#include <linux/init.h>
14#include <linux/sched.h> 15#include <linux/sched.h>
@@ -521,9 +522,8 @@ static int parse_command(const char __user *buffer, size_t count)
521 522
522static void entry_status(Node *e, char *page) 523static void entry_status(Node *e, char *page)
523{ 524{
524 char *dp; 525 char *dp = page;
525 char *status = "disabled"; 526 const char *status = "disabled";
526 const char *flags = "flags: ";
527 527
528 if (test_bit(Enabled, &e->flags)) 528 if (test_bit(Enabled, &e->flags))
529 status = "enabled"; 529 status = "enabled";
@@ -533,12 +533,10 @@ static void entry_status(Node *e, char *page)
533 return; 533 return;
534 } 534 }
535 535
536 sprintf(page, "%s\ninterpreter %s\n", status, e->interpreter); 536 dp += sprintf(dp, "%s\ninterpreter %s\n", status, e->interpreter);
537 dp = page + strlen(page);
538 537
539 /* print the special flags */ 538 /* print the special flags */
540 sprintf(dp, "%s", flags); 539 dp += sprintf(dp, "flags: ");
541 dp += strlen(flags);
542 if (e->flags & MISC_FMT_PRESERVE_ARGV0) 540 if (e->flags & MISC_FMT_PRESERVE_ARGV0)
543 *dp++ = 'P'; 541 *dp++ = 'P';
544 if (e->flags & MISC_FMT_OPEN_BINARY) 542 if (e->flags & MISC_FMT_OPEN_BINARY)
@@ -550,21 +548,11 @@ static void entry_status(Node *e, char *page)
550 if (!test_bit(Magic, &e->flags)) { 548 if (!test_bit(Magic, &e->flags)) {
551 sprintf(dp, "extension .%s\n", e->magic); 549 sprintf(dp, "extension .%s\n", e->magic);
552 } else { 550 } else {
553 int i; 551 dp += sprintf(dp, "offset %i\nmagic ", e->offset);
554 552 dp = bin2hex(dp, e->magic, e->size);
555 sprintf(dp, "offset %i\nmagic ", e->offset);
556 dp = page + strlen(page);
557 for (i = 0; i < e->size; i++) {
558 sprintf(dp, "%02x", 0xff & (int) (e->magic[i]));
559 dp += 2;
560 }
561 if (e->mask) { 553 if (e->mask) {
562 sprintf(dp, "\nmask "); 554 dp += sprintf(dp, "\nmask ");
563 dp += 6; 555 dp = bin2hex(dp, e->mask, e->size);
564 for (i = 0; i < e->size; i++) {
565 sprintf(dp, "%02x", 0xff & (int) (e->mask[i]));
566 dp += 2;
567 }
568 } 556 }
569 *dp++ = '\n'; 557 *dp++ = '\n';
570 *dp = '\0'; 558 *dp = '\0';
diff --git a/fs/block_dev.c b/fs/block_dev.c
index b5e87896f517..897ee0503932 100644
--- a/fs/block_dev.c
+++ b/fs/block_dev.c
@@ -146,15 +146,13 @@ blkdev_get_block(struct inode *inode, sector_t iblock,
146} 146}
147 147
148static ssize_t 148static ssize_t
149blkdev_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter, 149blkdev_direct_IO(struct kiocb *iocb, struct iov_iter *iter, loff_t offset)
150 loff_t offset)
151{ 150{
152 struct file *file = iocb->ki_filp; 151 struct file *file = iocb->ki_filp;
153 struct inode *inode = file->f_mapping->host; 152 struct inode *inode = file->f_mapping->host;
154 153
155 return __blockdev_direct_IO(rw, iocb, inode, I_BDEV(inode), iter, 154 return __blockdev_direct_IO(iocb, inode, I_BDEV(inode), iter, offset,
156 offset, blkdev_get_block, 155 blkdev_get_block, NULL, NULL, 0);
157 NULL, NULL, 0);
158} 156}
159 157
160int __sync_blockdev(struct block_device *bdev, int wait) 158int __sync_blockdev(struct block_device *bdev, int wait)
@@ -1597,9 +1595,22 @@ static long block_ioctl(struct file *file, unsigned cmd, unsigned long arg)
1597ssize_t blkdev_write_iter(struct kiocb *iocb, struct iov_iter *from) 1595ssize_t blkdev_write_iter(struct kiocb *iocb, struct iov_iter *from)
1598{ 1596{
1599 struct file *file = iocb->ki_filp; 1597 struct file *file = iocb->ki_filp;
1598 struct inode *bd_inode = file->f_mapping->host;
1599 loff_t size = i_size_read(bd_inode);
1600 struct blk_plug plug; 1600 struct blk_plug plug;
1601 ssize_t ret; 1601 ssize_t ret;
1602 1602
1603 if (bdev_read_only(I_BDEV(bd_inode)))
1604 return -EPERM;
1605
1606 if (!iov_iter_count(from))
1607 return 0;
1608
1609 if (iocb->ki_pos >= size)
1610 return -ENOSPC;
1611
1612 iov_iter_truncate(from, size - iocb->ki_pos);
1613
1603 blk_start_plug(&plug); 1614 blk_start_plug(&plug);
1604 ret = __generic_file_write_iter(iocb, from); 1615 ret = __generic_file_write_iter(iocb, from);
1605 if (ret > 0) { 1616 if (ret > 0) {
diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c
index cdc801c85105..faa7d390841b 100644
--- a/fs/btrfs/file.c
+++ b/fs/btrfs/file.c
@@ -1739,27 +1739,19 @@ static ssize_t btrfs_file_write_iter(struct kiocb *iocb,
1739 u64 start_pos; 1739 u64 start_pos;
1740 u64 end_pos; 1740 u64 end_pos;
1741 ssize_t num_written = 0; 1741 ssize_t num_written = 0;
1742 ssize_t err = 0;
1743 size_t count = iov_iter_count(from);
1744 bool sync = (file->f_flags & O_DSYNC) || IS_SYNC(file->f_mapping->host); 1742 bool sync = (file->f_flags & O_DSYNC) || IS_SYNC(file->f_mapping->host);
1745 loff_t pos = iocb->ki_pos; 1743 ssize_t err;
1744 loff_t pos;
1745 size_t count;
1746 1746
1747 mutex_lock(&inode->i_mutex); 1747 mutex_lock(&inode->i_mutex);
1748 1748 err = generic_write_checks(iocb, from);
1749 current->backing_dev_info = inode_to_bdi(inode); 1749 if (err <= 0) {
1750 err = generic_write_checks(file, &pos, &count, S_ISBLK(inode->i_mode));
1751 if (err) {
1752 mutex_unlock(&inode->i_mutex); 1750 mutex_unlock(&inode->i_mutex);
1753 goto out; 1751 return err;
1754 }
1755
1756 if (count == 0) {
1757 mutex_unlock(&inode->i_mutex);
1758 goto out;
1759 } 1752 }
1760 1753
1761 iov_iter_truncate(from, count); 1754 current->backing_dev_info = inode_to_bdi(inode);
1762
1763 err = file_remove_suid(file); 1755 err = file_remove_suid(file);
1764 if (err) { 1756 if (err) {
1765 mutex_unlock(&inode->i_mutex); 1757 mutex_unlock(&inode->i_mutex);
@@ -1786,6 +1778,8 @@ static ssize_t btrfs_file_write_iter(struct kiocb *iocb,
1786 */ 1778 */
1787 update_time_for_write(inode); 1779 update_time_for_write(inode);
1788 1780
1781 pos = iocb->ki_pos;
1782 count = iov_iter_count(from);
1789 start_pos = round_down(pos, root->sectorsize); 1783 start_pos = round_down(pos, root->sectorsize);
1790 if (start_pos > i_size_read(inode)) { 1784 if (start_pos > i_size_read(inode)) {
1791 /* Expand hole size to cover write data, preventing empty gap */ 1785 /* Expand hole size to cover write data, preventing empty gap */
@@ -1800,7 +1794,7 @@ static ssize_t btrfs_file_write_iter(struct kiocb *iocb,
1800 if (sync) 1794 if (sync)
1801 atomic_inc(&BTRFS_I(inode)->sync_writers); 1795 atomic_inc(&BTRFS_I(inode)->sync_writers);
1802 1796
1803 if (file->f_flags & O_DIRECT) { 1797 if (iocb->ki_flags & IOCB_DIRECT) {
1804 num_written = __btrfs_direct_write(iocb, from, pos); 1798 num_written = __btrfs_direct_write(iocb, from, pos);
1805 } else { 1799 } else {
1806 num_written = __btrfs_buffered_write(file, from, pos); 1800 num_written = __btrfs_buffered_write(file, from, pos);
diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c
index 686331f22b15..43192e10cc43 100644
--- a/fs/btrfs/inode.c
+++ b/fs/btrfs/inode.c
@@ -8081,7 +8081,7 @@ free_ordered:
8081 bio_endio(dio_bio, ret); 8081 bio_endio(dio_bio, ret);
8082} 8082}
8083 8083
8084static ssize_t check_direct_IO(struct btrfs_root *root, int rw, struct kiocb *iocb, 8084static ssize_t check_direct_IO(struct btrfs_root *root, struct kiocb *iocb,
8085 const struct iov_iter *iter, loff_t offset) 8085 const struct iov_iter *iter, loff_t offset)
8086{ 8086{
8087 int seg; 8087 int seg;
@@ -8096,7 +8096,7 @@ static ssize_t check_direct_IO(struct btrfs_root *root, int rw, struct kiocb *io
8096 goto out; 8096 goto out;
8097 8097
8098 /* If this is a write we don't need to check anymore */ 8098 /* If this is a write we don't need to check anymore */
8099 if (rw & WRITE) 8099 if (iov_iter_rw(iter) == WRITE)
8100 return 0; 8100 return 0;
8101 /* 8101 /*
8102 * Check to make sure we don't have duplicate iov_base's in this 8102 * Check to make sure we don't have duplicate iov_base's in this
@@ -8114,8 +8114,8 @@ out:
8114 return retval; 8114 return retval;
8115} 8115}
8116 8116
8117static ssize_t btrfs_direct_IO(int rw, struct kiocb *iocb, 8117static ssize_t btrfs_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
8118 struct iov_iter *iter, loff_t offset) 8118 loff_t offset)
8119{ 8119{
8120 struct file *file = iocb->ki_filp; 8120 struct file *file = iocb->ki_filp;
8121 struct inode *inode = file->f_mapping->host; 8121 struct inode *inode = file->f_mapping->host;
@@ -8126,7 +8126,7 @@ static ssize_t btrfs_direct_IO(int rw, struct kiocb *iocb,
8126 bool relock = false; 8126 bool relock = false;
8127 ssize_t ret; 8127 ssize_t ret;
8128 8128
8129 if (check_direct_IO(BTRFS_I(inode)->root, rw, iocb, iter, offset)) 8129 if (check_direct_IO(BTRFS_I(inode)->root, iocb, iter, offset))
8130 return 0; 8130 return 0;
8131 8131
8132 atomic_inc(&inode->i_dio_count); 8132 atomic_inc(&inode->i_dio_count);
@@ -8144,7 +8144,7 @@ static ssize_t btrfs_direct_IO(int rw, struct kiocb *iocb,
8144 filemap_fdatawrite_range(inode->i_mapping, offset, 8144 filemap_fdatawrite_range(inode->i_mapping, offset,
8145 offset + count - 1); 8145 offset + count - 1);
8146 8146
8147 if (rw & WRITE) { 8147 if (iov_iter_rw(iter) == WRITE) {
8148 /* 8148 /*
8149 * If the write DIO is beyond the EOF, we need update 8149 * If the write DIO is beyond the EOF, we need update
8150 * the isize, but it is protected by i_mutex. So we can 8150 * the isize, but it is protected by i_mutex. So we can
@@ -8174,11 +8174,11 @@ static ssize_t btrfs_direct_IO(int rw, struct kiocb *iocb,
8174 wakeup = false; 8174 wakeup = false;
8175 } 8175 }
8176 8176
8177 ret = __blockdev_direct_IO(rw, iocb, inode, 8177 ret = __blockdev_direct_IO(iocb, inode,
8178 BTRFS_I(inode)->root->fs_info->fs_devices->latest_bdev, 8178 BTRFS_I(inode)->root->fs_info->fs_devices->latest_bdev,
8179 iter, offset, btrfs_get_blocks_direct, NULL, 8179 iter, offset, btrfs_get_blocks_direct, NULL,
8180 btrfs_submit_direct, flags); 8180 btrfs_submit_direct, flags);
8181 if (rw & WRITE) { 8181 if (iov_iter_rw(iter) == WRITE) {
8182 current->journal_info = NULL; 8182 current->journal_info = NULL;
8183 if (ret < 0 && ret != -EIOCBQUEUED) 8183 if (ret < 0 && ret != -EIOCBQUEUED)
8184 btrfs_delalloc_release_space(inode, count); 8184 btrfs_delalloc_release_space(inode, count);
diff --git a/fs/ceph/addr.c b/fs/ceph/addr.c
index fd5599d32362..155ab9c0246b 100644
--- a/fs/ceph/addr.c
+++ b/fs/ceph/addr.c
@@ -1198,8 +1198,7 @@ static int ceph_write_end(struct file *file, struct address_space *mapping,
1198 * intercept O_DIRECT reads and writes early, this function should 1198 * intercept O_DIRECT reads and writes early, this function should
1199 * never get called. 1199 * never get called.
1200 */ 1200 */
1201static ssize_t ceph_direct_io(int rw, struct kiocb *iocb, 1201static ssize_t ceph_direct_io(struct kiocb *iocb, struct iov_iter *iter,
1202 struct iov_iter *iter,
1203 loff_t pos) 1202 loff_t pos)
1204{ 1203{
1205 WARN_ON(1); 1204 WARN_ON(1);
diff --git a/fs/ceph/file.c b/fs/ceph/file.c
index 56237ea5fc22..b9b8eb225f66 100644
--- a/fs/ceph/file.c
+++ b/fs/ceph/file.c
@@ -457,7 +457,7 @@ static ssize_t ceph_sync_read(struct kiocb *iocb, struct iov_iter *i,
457 if (ret < 0) 457 if (ret < 0)
458 return ret; 458 return ret;
459 459
460 if (file->f_flags & O_DIRECT) { 460 if (iocb->ki_flags & IOCB_DIRECT) {
461 while (iov_iter_count(i)) { 461 while (iov_iter_count(i)) {
462 size_t start; 462 size_t start;
463 ssize_t n; 463 ssize_t n;
@@ -828,7 +828,7 @@ again:
828 return ret; 828 return ret;
829 829
830 if ((got & (CEPH_CAP_FILE_CACHE|CEPH_CAP_FILE_LAZYIO)) == 0 || 830 if ((got & (CEPH_CAP_FILE_CACHE|CEPH_CAP_FILE_LAZYIO)) == 0 ||
831 (iocb->ki_filp->f_flags & O_DIRECT) || 831 (iocb->ki_flags & IOCB_DIRECT) ||
832 (fi->flags & CEPH_F_SYNC)) { 832 (fi->flags & CEPH_F_SYNC)) {
833 833
834 dout("aio_sync_read %p %llx.%llx %llu~%u got cap refs on %s\n", 834 dout("aio_sync_read %p %llx.%llx %llu~%u got cap refs on %s\n",
@@ -941,9 +941,9 @@ static ssize_t ceph_write_iter(struct kiocb *iocb, struct iov_iter *from)
941 struct ceph_inode_info *ci = ceph_inode(inode); 941 struct ceph_inode_info *ci = ceph_inode(inode);
942 struct ceph_osd_client *osdc = 942 struct ceph_osd_client *osdc =
943 &ceph_sb_to_client(inode->i_sb)->client->osdc; 943 &ceph_sb_to_client(inode->i_sb)->client->osdc;
944 ssize_t count = iov_iter_count(from), written = 0; 944 ssize_t count, written = 0;
945 int err, want, got; 945 int err, want, got;
946 loff_t pos = iocb->ki_pos; 946 loff_t pos;
947 947
948 if (ceph_snap(inode) != CEPH_NOSNAP) 948 if (ceph_snap(inode) != CEPH_NOSNAP)
949 return -EROFS; 949 return -EROFS;
@@ -953,14 +953,12 @@ static ssize_t ceph_write_iter(struct kiocb *iocb, struct iov_iter *from)
953 /* We can write back this queue in page reclaim */ 953 /* We can write back this queue in page reclaim */
954 current->backing_dev_info = inode_to_bdi(inode); 954 current->backing_dev_info = inode_to_bdi(inode);
955 955
956 err = generic_write_checks(file, &pos, &count, S_ISBLK(inode->i_mode)); 956 err = generic_write_checks(iocb, from);
957 if (err) 957 if (err <= 0)
958 goto out;
959
960 if (count == 0)
961 goto out; 958 goto out;
962 iov_iter_truncate(from, count);
963 959
960 pos = iocb->ki_pos;
961 count = iov_iter_count(from);
964 err = file_remove_suid(file); 962 err = file_remove_suid(file);
965 if (err) 963 if (err)
966 goto out; 964 goto out;
@@ -997,12 +995,12 @@ retry_snap:
997 inode, ceph_vinop(inode), pos, count, ceph_cap_string(got)); 995 inode, ceph_vinop(inode), pos, count, ceph_cap_string(got));
998 996
999 if ((got & (CEPH_CAP_FILE_BUFFER|CEPH_CAP_FILE_LAZYIO)) == 0 || 997 if ((got & (CEPH_CAP_FILE_BUFFER|CEPH_CAP_FILE_LAZYIO)) == 0 ||
1000 (file->f_flags & O_DIRECT) || (fi->flags & CEPH_F_SYNC)) { 998 (iocb->ki_flags & IOCB_DIRECT) || (fi->flags & CEPH_F_SYNC)) {
1001 struct iov_iter data; 999 struct iov_iter data;
1002 mutex_unlock(&inode->i_mutex); 1000 mutex_unlock(&inode->i_mutex);
1003 /* we might need to revert back to that point */ 1001 /* we might need to revert back to that point */
1004 data = *from; 1002 data = *from;
1005 if (file->f_flags & O_DIRECT) 1003 if (iocb->ki_flags & IOCB_DIRECT)
1006 written = ceph_sync_direct_write(iocb, &data, pos); 1004 written = ceph_sync_direct_write(iocb, &data, pos);
1007 else 1005 else
1008 written = ceph_sync_write(iocb, &data, pos); 1006 written = ceph_sync_write(iocb, &data, pos);
diff --git a/fs/cifs/file.c b/fs/cifs/file.c
index ca30c391a894..ca2bc5406306 100644
--- a/fs/cifs/file.c
+++ b/fs/cifs/file.c
@@ -2560,10 +2560,9 @@ cifs_write_from_iter(loff_t offset, size_t len, struct iov_iter *from,
2560 return rc; 2560 return rc;
2561} 2561}
2562 2562
2563static ssize_t 2563ssize_t cifs_user_writev(struct kiocb *iocb, struct iov_iter *from)
2564cifs_iovec_write(struct file *file, struct iov_iter *from, loff_t *poffset)
2565{ 2564{
2566 size_t len; 2565 struct file *file = iocb->ki_filp;
2567 ssize_t total_written = 0; 2566 ssize_t total_written = 0;
2568 struct cifsFileInfo *open_file; 2567 struct cifsFileInfo *open_file;
2569 struct cifs_tcon *tcon; 2568 struct cifs_tcon *tcon;
@@ -2573,15 +2572,15 @@ cifs_iovec_write(struct file *file, struct iov_iter *from, loff_t *poffset)
2573 struct iov_iter saved_from; 2572 struct iov_iter saved_from;
2574 int rc; 2573 int rc;
2575 2574
2576 len = iov_iter_count(from); 2575 /*
2577 rc = generic_write_checks(file, poffset, &len, 0); 2576 * BB - optimize the way when signing is disabled. We can drop this
2578 if (rc) 2577 * extra memory-to-memory copying and use iovec buffers for constructing
2579 return rc; 2578 * write request.
2580 2579 */
2581 if (!len)
2582 return 0;
2583 2580
2584 iov_iter_truncate(from, len); 2581 rc = generic_write_checks(iocb, from);
2582 if (rc <= 0)
2583 return rc;
2585 2584
2586 INIT_LIST_HEAD(&wdata_list); 2585 INIT_LIST_HEAD(&wdata_list);
2587 cifs_sb = CIFS_FILE_SB(file); 2586 cifs_sb = CIFS_FILE_SB(file);
@@ -2593,8 +2592,8 @@ cifs_iovec_write(struct file *file, struct iov_iter *from, loff_t *poffset)
2593 2592
2594 memcpy(&saved_from, from, sizeof(struct iov_iter)); 2593 memcpy(&saved_from, from, sizeof(struct iov_iter));
2595 2594
2596 rc = cifs_write_from_iter(*poffset, len, from, open_file, cifs_sb, 2595 rc = cifs_write_from_iter(iocb->ki_pos, iov_iter_count(from), from,
2597 &wdata_list); 2596 open_file, cifs_sb, &wdata_list);
2598 2597
2599 /* 2598 /*
2600 * If at least one write was successfully sent, then discard any rc 2599 * If at least one write was successfully sent, then discard any rc
@@ -2633,7 +2632,7 @@ restart_loop:
2633 memcpy(&tmp_from, &saved_from, 2632 memcpy(&tmp_from, &saved_from,
2634 sizeof(struct iov_iter)); 2633 sizeof(struct iov_iter));
2635 iov_iter_advance(&tmp_from, 2634 iov_iter_advance(&tmp_from,
2636 wdata->offset - *poffset); 2635 wdata->offset - iocb->ki_pos);
2637 2636
2638 rc = cifs_write_from_iter(wdata->offset, 2637 rc = cifs_write_from_iter(wdata->offset,
2639 wdata->bytes, &tmp_from, 2638 wdata->bytes, &tmp_from,
@@ -2650,34 +2649,13 @@ restart_loop:
2650 kref_put(&wdata->refcount, cifs_uncached_writedata_release); 2649 kref_put(&wdata->refcount, cifs_uncached_writedata_release);
2651 } 2650 }
2652 2651
2653 if (total_written > 0) 2652 if (unlikely(!total_written))
2654 *poffset += total_written; 2653 return rc;
2655 2654
2655 iocb->ki_pos += total_written;
2656 set_bit(CIFS_INO_INVALID_MAPPING, &CIFS_I(file_inode(file))->flags);
2656 cifs_stats_bytes_written(tcon, total_written); 2657 cifs_stats_bytes_written(tcon, total_written);
2657 return total_written ? total_written : (ssize_t)rc; 2658 return total_written;
2658}
2659
2660ssize_t cifs_user_writev(struct kiocb *iocb, struct iov_iter *from)
2661{
2662 ssize_t written;
2663 struct inode *inode;
2664 loff_t pos = iocb->ki_pos;
2665
2666 inode = file_inode(iocb->ki_filp);
2667
2668 /*
2669 * BB - optimize the way when signing is disabled. We can drop this
2670 * extra memory-to-memory copying and use iovec buffers for constructing
2671 * write request.
2672 */
2673
2674 written = cifs_iovec_write(iocb->ki_filp, from, &pos);
2675 if (written > 0) {
2676 set_bit(CIFS_INO_INVALID_MAPPING, &CIFS_I(inode)->flags);
2677 iocb->ki_pos = pos;
2678 }
2679
2680 return written;
2681} 2659}
2682 2660
2683static ssize_t 2661static ssize_t
@@ -2688,8 +2666,7 @@ cifs_writev(struct kiocb *iocb, struct iov_iter *from)
2688 struct inode *inode = file->f_mapping->host; 2666 struct inode *inode = file->f_mapping->host;
2689 struct cifsInodeInfo *cinode = CIFS_I(inode); 2667 struct cifsInodeInfo *cinode = CIFS_I(inode);
2690 struct TCP_Server_Info *server = tlink_tcon(cfile->tlink)->ses->server; 2668 struct TCP_Server_Info *server = tlink_tcon(cfile->tlink)->ses->server;
2691 ssize_t rc = -EACCES; 2669 ssize_t rc;
2692 loff_t lock_pos = iocb->ki_pos;
2693 2670
2694 /* 2671 /*
2695 * We need to hold the sem to be sure nobody modifies lock list 2672 * We need to hold the sem to be sure nobody modifies lock list
@@ -2697,23 +2674,24 @@ cifs_writev(struct kiocb *iocb, struct iov_iter *from)
2697 */ 2674 */
2698 down_read(&cinode->lock_sem); 2675 down_read(&cinode->lock_sem);
2699 mutex_lock(&inode->i_mutex); 2676 mutex_lock(&inode->i_mutex);
2700 if (file->f_flags & O_APPEND) 2677
2701 lock_pos = i_size_read(inode); 2678 rc = generic_write_checks(iocb, from);
2702 if (!cifs_find_lock_conflict(cfile, lock_pos, iov_iter_count(from), 2679 if (rc <= 0)
2680 goto out;
2681
2682 if (!cifs_find_lock_conflict(cfile, iocb->ki_pos, iov_iter_count(from),
2703 server->vals->exclusive_lock_type, NULL, 2683 server->vals->exclusive_lock_type, NULL,
2704 CIFS_WRITE_OP)) { 2684 CIFS_WRITE_OP))
2705 rc = __generic_file_write_iter(iocb, from); 2685 rc = __generic_file_write_iter(iocb, from);
2706 mutex_unlock(&inode->i_mutex); 2686 else
2707 2687 rc = -EACCES;
2708 if (rc > 0) { 2688out:
2709 ssize_t err; 2689 mutex_unlock(&inode->i_mutex);
2710 2690
2711 err = generic_write_sync(file, iocb->ki_pos - rc, rc); 2691 if (rc > 0) {
2712 if (err < 0) 2692 ssize_t err = generic_write_sync(file, iocb->ki_pos - rc, rc);
2713 rc = err; 2693 if (err < 0)
2714 } 2694 rc = err;
2715 } else {
2716 mutex_unlock(&inode->i_mutex);
2717 } 2695 }
2718 up_read(&cinode->lock_sem); 2696 up_read(&cinode->lock_sem);
2719 return rc; 2697 return rc;
@@ -3877,8 +3855,7 @@ void cifs_oplock_break(struct work_struct *work)
3877 * Direct IO is not yet supported in the cached mode. 3855 * Direct IO is not yet supported in the cached mode.
3878 */ 3856 */
3879static ssize_t 3857static ssize_t
3880cifs_direct_io(int rw, struct kiocb *iocb, struct iov_iter *iter, 3858cifs_direct_io(struct kiocb *iocb, struct iov_iter *iter, loff_t pos)
3881 loff_t pos)
3882{ 3859{
3883 /* 3860 /*
3884 * FIXME 3861 * FIXME
diff --git a/fs/configfs/dir.c b/fs/configfs/dir.c
index cf0db005d2f5..acb3d63bc9dc 100644
--- a/fs/configfs/dir.c
+++ b/fs/configfs/dir.c
@@ -1598,7 +1598,7 @@ static loff_t configfs_dir_lseek(struct file *file, loff_t offset, int whence)
1598 if (offset >= 0) 1598 if (offset >= 0)
1599 break; 1599 break;
1600 default: 1600 default:
1601 mutex_unlock(&file_inode(file)->i_mutex); 1601 mutex_unlock(&dentry->d_inode->i_mutex);
1602 return -EINVAL; 1602 return -EINVAL;
1603 } 1603 }
1604 if (offset != file->f_pos) { 1604 if (offset != file->f_pos) {
diff --git a/fs/dax.c b/fs/dax.c
index d0bd1f4f81b3..0bb0aecb556c 100644
--- a/fs/dax.c
+++ b/fs/dax.c
@@ -98,9 +98,9 @@ static bool buffer_size_valid(struct buffer_head *bh)
98 return bh->b_state != 0; 98 return bh->b_state != 0;
99} 99}
100 100
101static ssize_t dax_io(int rw, struct inode *inode, struct iov_iter *iter, 101static ssize_t dax_io(struct inode *inode, struct iov_iter *iter,
102 loff_t start, loff_t end, get_block_t get_block, 102 loff_t start, loff_t end, get_block_t get_block,
103 struct buffer_head *bh) 103 struct buffer_head *bh)
104{ 104{
105 ssize_t retval = 0; 105 ssize_t retval = 0;
106 loff_t pos = start; 106 loff_t pos = start;
@@ -109,7 +109,7 @@ static ssize_t dax_io(int rw, struct inode *inode, struct iov_iter *iter,
109 void *addr; 109 void *addr;
110 bool hole = false; 110 bool hole = false;
111 111
112 if (rw != WRITE) 112 if (iov_iter_rw(iter) != WRITE)
113 end = min(end, i_size_read(inode)); 113 end = min(end, i_size_read(inode));
114 114
115 while (pos < end) { 115 while (pos < end) {
@@ -124,7 +124,7 @@ static ssize_t dax_io(int rw, struct inode *inode, struct iov_iter *iter,
124 bh->b_size = PAGE_ALIGN(end - pos); 124 bh->b_size = PAGE_ALIGN(end - pos);
125 bh->b_state = 0; 125 bh->b_state = 0;
126 retval = get_block(inode, block, bh, 126 retval = get_block(inode, block, bh,
127 rw == WRITE); 127 iov_iter_rw(iter) == WRITE);
128 if (retval) 128 if (retval)
129 break; 129 break;
130 if (!buffer_size_valid(bh)) 130 if (!buffer_size_valid(bh))
@@ -137,7 +137,7 @@ static ssize_t dax_io(int rw, struct inode *inode, struct iov_iter *iter,
137 bh->b_size -= done; 137 bh->b_size -= done;
138 } 138 }
139 139
140 hole = (rw != WRITE) && !buffer_written(bh); 140 hole = iov_iter_rw(iter) != WRITE && !buffer_written(bh);
141 if (hole) { 141 if (hole) {
142 addr = NULL; 142 addr = NULL;
143 size = bh->b_size - first; 143 size = bh->b_size - first;
@@ -154,7 +154,7 @@ static ssize_t dax_io(int rw, struct inode *inode, struct iov_iter *iter,
154 max = min(pos + size, end); 154 max = min(pos + size, end);
155 } 155 }
156 156
157 if (rw == WRITE) 157 if (iov_iter_rw(iter) == WRITE)
158 len = copy_from_iter(addr, max - pos, iter); 158 len = copy_from_iter(addr, max - pos, iter);
159 else if (!hole) 159 else if (!hole)
160 len = copy_to_iter(addr, max - pos, iter); 160 len = copy_to_iter(addr, max - pos, iter);
@@ -173,7 +173,6 @@ static ssize_t dax_io(int rw, struct inode *inode, struct iov_iter *iter,
173 173
174/** 174/**
175 * dax_do_io - Perform I/O to a DAX file 175 * dax_do_io - Perform I/O to a DAX file
176 * @rw: READ to read or WRITE to write
177 * @iocb: The control block for this I/O 176 * @iocb: The control block for this I/O
178 * @inode: The file which the I/O is directed at 177 * @inode: The file which the I/O is directed at
179 * @iter: The addresses to do I/O from or to 178 * @iter: The addresses to do I/O from or to
@@ -189,9 +188,9 @@ static ssize_t dax_io(int rw, struct inode *inode, struct iov_iter *iter,
189 * As with do_blockdev_direct_IO(), we increment i_dio_count while the I/O 188 * As with do_blockdev_direct_IO(), we increment i_dio_count while the I/O
190 * is in progress. 189 * is in progress.
191 */ 190 */
192ssize_t dax_do_io(int rw, struct kiocb *iocb, struct inode *inode, 191ssize_t dax_do_io(struct kiocb *iocb, struct inode *inode,
193 struct iov_iter *iter, loff_t pos, 192 struct iov_iter *iter, loff_t pos, get_block_t get_block,
194 get_block_t get_block, dio_iodone_t end_io, int flags) 193 dio_iodone_t end_io, int flags)
195{ 194{
196 struct buffer_head bh; 195 struct buffer_head bh;
197 ssize_t retval = -EINVAL; 196 ssize_t retval = -EINVAL;
@@ -199,7 +198,7 @@ ssize_t dax_do_io(int rw, struct kiocb *iocb, struct inode *inode,
199 198
200 memset(&bh, 0, sizeof(bh)); 199 memset(&bh, 0, sizeof(bh));
201 200
202 if ((flags & DIO_LOCKING) && (rw == READ)) { 201 if ((flags & DIO_LOCKING) && iov_iter_rw(iter) == READ) {
203 struct address_space *mapping = inode->i_mapping; 202 struct address_space *mapping = inode->i_mapping;
204 mutex_lock(&inode->i_mutex); 203 mutex_lock(&inode->i_mutex);
205 retval = filemap_write_and_wait_range(mapping, pos, end - 1); 204 retval = filemap_write_and_wait_range(mapping, pos, end - 1);
@@ -212,9 +211,9 @@ ssize_t dax_do_io(int rw, struct kiocb *iocb, struct inode *inode,
212 /* Protects against truncate */ 211 /* Protects against truncate */
213 atomic_inc(&inode->i_dio_count); 212 atomic_inc(&inode->i_dio_count);
214 213
215 retval = dax_io(rw, inode, iter, pos, end, get_block, &bh); 214 retval = dax_io(inode, iter, pos, end, get_block, &bh);
216 215
217 if ((flags & DIO_LOCKING) && (rw == READ)) 216 if ((flags & DIO_LOCKING) && iov_iter_rw(iter) == READ)
218 mutex_unlock(&inode->i_mutex); 217 mutex_unlock(&inode->i_mutex);
219 218
220 if ((retval > 0) && end_io) 219 if ((retval > 0) && end_io)
diff --git a/fs/dcache.c b/fs/dcache.c
index d99736a63e3c..656ce522a218 100644
--- a/fs/dcache.c
+++ b/fs/dcache.c
@@ -269,6 +269,41 @@ static inline int dname_external(const struct dentry *dentry)
269 return dentry->d_name.name != dentry->d_iname; 269 return dentry->d_name.name != dentry->d_iname;
270} 270}
271 271
272/*
273 * Make sure other CPUs see the inode attached before the type is set.
274 */
275static inline void __d_set_inode_and_type(struct dentry *dentry,
276 struct inode *inode,
277 unsigned type_flags)
278{
279 unsigned flags;
280
281 dentry->d_inode = inode;
282 smp_wmb();
283 flags = READ_ONCE(dentry->d_flags);
284 flags &= ~(DCACHE_ENTRY_TYPE | DCACHE_FALLTHRU);
285 flags |= type_flags;
286 WRITE_ONCE(dentry->d_flags, flags);
287}
288
289/*
290 * Ideally, we want to make sure that other CPUs see the flags cleared before
291 * the inode is detached, but this is really a violation of RCU principles
292 * since the ordering suggests we should always set inode before flags.
293 *
294 * We should instead replace or discard the entire dentry - but that sucks
295 * performancewise on mass deletion/rename.
296 */
297static inline void __d_clear_type_and_inode(struct dentry *dentry)
298{
299 unsigned flags = READ_ONCE(dentry->d_flags);
300
301 flags &= ~(DCACHE_ENTRY_TYPE | DCACHE_FALLTHRU);
302 WRITE_ONCE(dentry->d_flags, flags);
303 smp_wmb();
304 dentry->d_inode = NULL;
305}
306
272static void dentry_free(struct dentry *dentry) 307static void dentry_free(struct dentry *dentry)
273{ 308{
274 WARN_ON(!hlist_unhashed(&dentry->d_u.d_alias)); 309 WARN_ON(!hlist_unhashed(&dentry->d_u.d_alias));
@@ -311,7 +346,7 @@ static void dentry_iput(struct dentry * dentry)
311{ 346{
312 struct inode *inode = dentry->d_inode; 347 struct inode *inode = dentry->d_inode;
313 if (inode) { 348 if (inode) {
314 dentry->d_inode = NULL; 349 __d_clear_type_and_inode(dentry);
315 hlist_del_init(&dentry->d_u.d_alias); 350 hlist_del_init(&dentry->d_u.d_alias);
316 spin_unlock(&dentry->d_lock); 351 spin_unlock(&dentry->d_lock);
317 spin_unlock(&inode->i_lock); 352 spin_unlock(&inode->i_lock);
@@ -335,8 +370,7 @@ static void dentry_unlink_inode(struct dentry * dentry)
335 __releases(dentry->d_inode->i_lock) 370 __releases(dentry->d_inode->i_lock)
336{ 371{
337 struct inode *inode = dentry->d_inode; 372 struct inode *inode = dentry->d_inode;
338 __d_clear_type(dentry); 373 __d_clear_type_and_inode(dentry);
339 dentry->d_inode = NULL;
340 hlist_del_init(&dentry->d_u.d_alias); 374 hlist_del_init(&dentry->d_u.d_alias);
341 dentry_rcuwalk_barrier(dentry); 375 dentry_rcuwalk_barrier(dentry);
342 spin_unlock(&dentry->d_lock); 376 spin_unlock(&dentry->d_lock);
@@ -1715,11 +1749,9 @@ static void __d_instantiate(struct dentry *dentry, struct inode *inode)
1715 unsigned add_flags = d_flags_for_inode(inode); 1749 unsigned add_flags = d_flags_for_inode(inode);
1716 1750
1717 spin_lock(&dentry->d_lock); 1751 spin_lock(&dentry->d_lock);
1718 dentry->d_flags &= ~(DCACHE_ENTRY_TYPE | DCACHE_FALLTHRU);
1719 dentry->d_flags |= add_flags;
1720 if (inode) 1752 if (inode)
1721 hlist_add_head(&dentry->d_u.d_alias, &inode->i_dentry); 1753 hlist_add_head(&dentry->d_u.d_alias, &inode->i_dentry);
1722 dentry->d_inode = inode; 1754 __d_set_inode_and_type(dentry, inode, add_flags);
1723 dentry_rcuwalk_barrier(dentry); 1755 dentry_rcuwalk_barrier(dentry);
1724 spin_unlock(&dentry->d_lock); 1756 spin_unlock(&dentry->d_lock);
1725 fsnotify_d_instantiate(dentry, inode); 1757 fsnotify_d_instantiate(dentry, inode);
@@ -1937,8 +1969,7 @@ static struct dentry *__d_obtain_alias(struct inode *inode, int disconnected)
1937 add_flags |= DCACHE_DISCONNECTED; 1969 add_flags |= DCACHE_DISCONNECTED;
1938 1970
1939 spin_lock(&tmp->d_lock); 1971 spin_lock(&tmp->d_lock);
1940 tmp->d_inode = inode; 1972 __d_set_inode_and_type(tmp, inode, add_flags);
1941 tmp->d_flags |= add_flags;
1942 hlist_add_head(&tmp->d_u.d_alias, &inode->i_dentry); 1973 hlist_add_head(&tmp->d_u.d_alias, &inode->i_dentry);
1943 hlist_bl_lock(&tmp->d_sb->s_anon); 1974 hlist_bl_lock(&tmp->d_sb->s_anon);
1944 hlist_bl_add_head(&tmp->d_hash, &tmp->d_sb->s_anon); 1975 hlist_bl_add_head(&tmp->d_hash, &tmp->d_sb->s_anon);
diff --git a/fs/debugfs/inode.c b/fs/debugfs/inode.c
index 61e72d44cf94..c9ee0dfe90b5 100644
--- a/fs/debugfs/inode.c
+++ b/fs/debugfs/inode.c
@@ -524,7 +524,7 @@ static int __debugfs_remove(struct dentry *dentry, struct dentry *parent)
524 524
525 if (debugfs_positive(dentry)) { 525 if (debugfs_positive(dentry)) {
526 dget(dentry); 526 dget(dentry);
527 if (S_ISDIR(dentry->d_inode->i_mode)) 527 if (d_is_dir(dentry))
528 ret = simple_rmdir(parent->d_inode, dentry); 528 ret = simple_rmdir(parent->d_inode, dentry);
529 else 529 else
530 simple_unlink(parent->d_inode, dentry); 530 simple_unlink(parent->d_inode, dentry);
diff --git a/fs/direct-io.c b/fs/direct-io.c
index 6fb00e3f1059..c3b560b24a46 100644
--- a/fs/direct-io.c
+++ b/fs/direct-io.c
@@ -1093,10 +1093,10 @@ static inline int drop_refcount(struct dio *dio)
1093 * for the whole file. 1093 * for the whole file.
1094 */ 1094 */
1095static inline ssize_t 1095static inline ssize_t
1096do_blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode, 1096do_blockdev_direct_IO(struct kiocb *iocb, struct inode *inode,
1097 struct block_device *bdev, struct iov_iter *iter, loff_t offset, 1097 struct block_device *bdev, struct iov_iter *iter,
1098 get_block_t get_block, dio_iodone_t end_io, 1098 loff_t offset, get_block_t get_block, dio_iodone_t end_io,
1099 dio_submit_t submit_io, int flags) 1099 dio_submit_t submit_io, int flags)
1100{ 1100{
1101 unsigned i_blkbits = ACCESS_ONCE(inode->i_blkbits); 1101 unsigned i_blkbits = ACCESS_ONCE(inode->i_blkbits);
1102 unsigned blkbits = i_blkbits; 1102 unsigned blkbits = i_blkbits;
@@ -1110,9 +1110,6 @@ do_blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
1110 struct blk_plug plug; 1110 struct blk_plug plug;
1111 unsigned long align = offset | iov_iter_alignment(iter); 1111 unsigned long align = offset | iov_iter_alignment(iter);
1112 1112
1113 if (rw & WRITE)
1114 rw = WRITE_ODIRECT;
1115
1116 /* 1113 /*
1117 * Avoid references to bdev if not absolutely needed to give 1114 * Avoid references to bdev if not absolutely needed to give
1118 * the early prefetch in the caller enough time. 1115 * the early prefetch in the caller enough time.
@@ -1127,7 +1124,7 @@ do_blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
1127 } 1124 }
1128 1125
1129 /* watch out for a 0 len io from a tricksy fs */ 1126 /* watch out for a 0 len io from a tricksy fs */
1130 if (rw == READ && !iov_iter_count(iter)) 1127 if (iov_iter_rw(iter) == READ && !iov_iter_count(iter))
1131 return 0; 1128 return 0;
1132 1129
1133 dio = kmem_cache_alloc(dio_cache, GFP_KERNEL); 1130 dio = kmem_cache_alloc(dio_cache, GFP_KERNEL);
@@ -1143,7 +1140,7 @@ do_blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
1143 1140
1144 dio->flags = flags; 1141 dio->flags = flags;
1145 if (dio->flags & DIO_LOCKING) { 1142 if (dio->flags & DIO_LOCKING) {
1146 if (rw == READ) { 1143 if (iov_iter_rw(iter) == READ) {
1147 struct address_space *mapping = 1144 struct address_space *mapping =
1148 iocb->ki_filp->f_mapping; 1145 iocb->ki_filp->f_mapping;
1149 1146
@@ -1169,19 +1166,19 @@ do_blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
1169 if (is_sync_kiocb(iocb)) 1166 if (is_sync_kiocb(iocb))
1170 dio->is_async = false; 1167 dio->is_async = false;
1171 else if (!(dio->flags & DIO_ASYNC_EXTEND) && 1168 else if (!(dio->flags & DIO_ASYNC_EXTEND) &&
1172 (rw & WRITE) && end > i_size_read(inode)) 1169 iov_iter_rw(iter) == WRITE && end > i_size_read(inode))
1173 dio->is_async = false; 1170 dio->is_async = false;
1174 else 1171 else
1175 dio->is_async = true; 1172 dio->is_async = true;
1176 1173
1177 dio->inode = inode; 1174 dio->inode = inode;
1178 dio->rw = rw; 1175 dio->rw = iov_iter_rw(iter) == WRITE ? WRITE_ODIRECT : READ;
1179 1176
1180 /* 1177 /*
1181 * For AIO O_(D)SYNC writes we need to defer completions to a workqueue 1178 * For AIO O_(D)SYNC writes we need to defer completions to a workqueue
1182 * so that we can call ->fsync. 1179 * so that we can call ->fsync.
1183 */ 1180 */
1184 if (dio->is_async && (rw & WRITE) && 1181 if (dio->is_async && iov_iter_rw(iter) == WRITE &&
1185 ((iocb->ki_filp->f_flags & O_DSYNC) || 1182 ((iocb->ki_filp->f_flags & O_DSYNC) ||
1186 IS_SYNC(iocb->ki_filp->f_mapping->host))) { 1183 IS_SYNC(iocb->ki_filp->f_mapping->host))) {
1187 retval = dio_set_defer_completion(dio); 1184 retval = dio_set_defer_completion(dio);
@@ -1274,7 +1271,7 @@ do_blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
1274 * we can let i_mutex go now that its achieved its purpose 1271 * we can let i_mutex go now that its achieved its purpose
1275 * of protecting us from looking up uninitialized blocks. 1272 * of protecting us from looking up uninitialized blocks.
1276 */ 1273 */
1277 if (rw == READ && (dio->flags & DIO_LOCKING)) 1274 if (iov_iter_rw(iter) == READ && (dio->flags & DIO_LOCKING))
1278 mutex_unlock(&dio->inode->i_mutex); 1275 mutex_unlock(&dio->inode->i_mutex);
1279 1276
1280 /* 1277 /*
@@ -1286,7 +1283,7 @@ do_blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
1286 */ 1283 */
1287 BUG_ON(retval == -EIOCBQUEUED); 1284 BUG_ON(retval == -EIOCBQUEUED);
1288 if (dio->is_async && retval == 0 && dio->result && 1285 if (dio->is_async && retval == 0 && dio->result &&
1289 (rw == READ || dio->result == count)) 1286 (iov_iter_rw(iter) == READ || dio->result == count))
1290 retval = -EIOCBQUEUED; 1287 retval = -EIOCBQUEUED;
1291 else 1288 else
1292 dio_await_completion(dio); 1289 dio_await_completion(dio);
@@ -1300,11 +1297,11 @@ out:
1300 return retval; 1297 return retval;
1301} 1298}
1302 1299
1303ssize_t 1300ssize_t __blockdev_direct_IO(struct kiocb *iocb, struct inode *inode,
1304__blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode, 1301 struct block_device *bdev, struct iov_iter *iter,
1305 struct block_device *bdev, struct iov_iter *iter, loff_t offset, 1302 loff_t offset, get_block_t get_block,
1306 get_block_t get_block, dio_iodone_t end_io, 1303 dio_iodone_t end_io, dio_submit_t submit_io,
1307 dio_submit_t submit_io, int flags) 1304 int flags)
1308{ 1305{
1309 /* 1306 /*
1310 * The block device state is needed in the end to finally 1307 * The block device state is needed in the end to finally
@@ -1318,8 +1315,8 @@ __blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
1318 prefetch(bdev->bd_queue); 1315 prefetch(bdev->bd_queue);
1319 prefetch((char *)bdev->bd_queue + SMP_CACHE_BYTES); 1316 prefetch((char *)bdev->bd_queue + SMP_CACHE_BYTES);
1320 1317
1321 return do_blockdev_direct_IO(rw, iocb, inode, bdev, iter, offset, 1318 return do_blockdev_direct_IO(iocb, inode, bdev, iter, offset, get_block,
1322 get_block, end_io, submit_io, flags); 1319 end_io, submit_io, flags);
1323} 1320}
1324 1321
1325EXPORT_SYMBOL(__blockdev_direct_IO); 1322EXPORT_SYMBOL(__blockdev_direct_IO);
diff --git a/fs/exec.c b/fs/exec.c
index c7f9b733406d..02bfd980a40c 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -926,10 +926,14 @@ static int de_thread(struct task_struct *tsk)
926 if (!thread_group_leader(tsk)) { 926 if (!thread_group_leader(tsk)) {
927 struct task_struct *leader = tsk->group_leader; 927 struct task_struct *leader = tsk->group_leader;
928 928
929 sig->notify_count = -1; /* for exit_notify() */
930 for (;;) { 929 for (;;) {
931 threadgroup_change_begin(tsk); 930 threadgroup_change_begin(tsk);
932 write_lock_irq(&tasklist_lock); 931 write_lock_irq(&tasklist_lock);
932 /*
933 * Do this under tasklist_lock to ensure that
934 * exit_notify() can't miss ->group_exit_task
935 */
936 sig->notify_count = -1;
933 if (likely(leader->exit_state)) 937 if (likely(leader->exit_state))
934 break; 938 break;
935 __set_current_state(TASK_KILLABLE); 939 __set_current_state(TASK_KILLABLE);
@@ -1078,7 +1082,13 @@ int flush_old_exec(struct linux_binprm * bprm)
1078 if (retval) 1082 if (retval)
1079 goto out; 1083 goto out;
1080 1084
1085 /*
1086 * Must be called _before_ exec_mmap() as bprm->mm is
1087 * not visibile until then. This also enables the update
1088 * to be lockless.
1089 */
1081 set_mm_exe_file(bprm->mm, bprm->file); 1090 set_mm_exe_file(bprm->mm, bprm->file);
1091
1082 /* 1092 /*
1083 * Release all of the old mmap stuff 1093 * Release all of the old mmap stuff
1084 */ 1094 */
diff --git a/fs/exofs/inode.c b/fs/exofs/inode.c
index a198e94813fe..35073aaec6e0 100644
--- a/fs/exofs/inode.c
+++ b/fs/exofs/inode.c
@@ -963,8 +963,8 @@ static void exofs_invalidatepage(struct page *page, unsigned int offset,
963 963
964 964
965 /* TODO: Should be easy enough to do proprly */ 965 /* TODO: Should be easy enough to do proprly */
966static ssize_t exofs_direct_IO(int rw, struct kiocb *iocb, 966static ssize_t exofs_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
967 struct iov_iter *iter, loff_t offset) 967 loff_t offset)
968{ 968{
969 return 0; 969 return 0;
970} 970}
diff --git a/fs/ext2/inode.c b/fs/ext2/inode.c
index b29eb6747116..5d9213963fae 100644
--- a/fs/ext2/inode.c
+++ b/fs/ext2/inode.c
@@ -851,8 +851,7 @@ static sector_t ext2_bmap(struct address_space *mapping, sector_t block)
851} 851}
852 852
853static ssize_t 853static ssize_t
854ext2_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter, 854ext2_direct_IO(struct kiocb *iocb, struct iov_iter *iter, loff_t offset)
855 loff_t offset)
856{ 855{
857 struct file *file = iocb->ki_filp; 856 struct file *file = iocb->ki_filp;
858 struct address_space *mapping = file->f_mapping; 857 struct address_space *mapping = file->f_mapping;
@@ -861,12 +860,12 @@ ext2_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter,
861 ssize_t ret; 860 ssize_t ret;
862 861
863 if (IS_DAX(inode)) 862 if (IS_DAX(inode))
864 ret = dax_do_io(rw, iocb, inode, iter, offset, ext2_get_block, 863 ret = dax_do_io(iocb, inode, iter, offset, ext2_get_block, NULL,
865 NULL, DIO_LOCKING); 864 DIO_LOCKING);
866 else 865 else
867 ret = blockdev_direct_IO(rw, iocb, inode, iter, offset, 866 ret = blockdev_direct_IO(iocb, inode, iter, offset,
868 ext2_get_block); 867 ext2_get_block);
869 if (ret < 0 && (rw & WRITE)) 868 if (ret < 0 && iov_iter_rw(iter) == WRITE)
870 ext2_write_failed(mapping, offset + count); 869 ext2_write_failed(mapping, offset + count);
871 return ret; 870 return ret;
872} 871}
diff --git a/fs/ext3/inode.c b/fs/ext3/inode.c
index db07ffbe7c85..13c0868c7160 100644
--- a/fs/ext3/inode.c
+++ b/fs/ext3/inode.c
@@ -1820,8 +1820,8 @@ static int ext3_releasepage(struct page *page, gfp_t wait)
1820 * crashes then stale disk data _may_ be exposed inside the file. But current 1820 * crashes then stale disk data _may_ be exposed inside the file. But current
1821 * VFS code falls back into buffered path in that case so we are safe. 1821 * VFS code falls back into buffered path in that case so we are safe.
1822 */ 1822 */
1823static ssize_t ext3_direct_IO(int rw, struct kiocb *iocb, 1823static ssize_t ext3_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
1824 struct iov_iter *iter, loff_t offset) 1824 loff_t offset)
1825{ 1825{
1826 struct file *file = iocb->ki_filp; 1826 struct file *file = iocb->ki_filp;
1827 struct inode *inode = file->f_mapping->host; 1827 struct inode *inode = file->f_mapping->host;
@@ -1832,9 +1832,9 @@ static ssize_t ext3_direct_IO(int rw, struct kiocb *iocb,
1832 size_t count = iov_iter_count(iter); 1832 size_t count = iov_iter_count(iter);
1833 int retries = 0; 1833 int retries = 0;
1834 1834
1835 trace_ext3_direct_IO_enter(inode, offset, count, rw); 1835 trace_ext3_direct_IO_enter(inode, offset, count, iov_iter_rw(iter));
1836 1836
1837 if (rw == WRITE) { 1837 if (iov_iter_rw(iter) == WRITE) {
1838 loff_t final_size = offset + count; 1838 loff_t final_size = offset + count;
1839 1839
1840 if (final_size > inode->i_size) { 1840 if (final_size > inode->i_size) {
@@ -1856,12 +1856,12 @@ static ssize_t ext3_direct_IO(int rw, struct kiocb *iocb,
1856 } 1856 }
1857 1857
1858retry: 1858retry:
1859 ret = blockdev_direct_IO(rw, iocb, inode, iter, offset, ext3_get_block); 1859 ret = blockdev_direct_IO(iocb, inode, iter, offset, ext3_get_block);
1860 /* 1860 /*
1861 * In case of error extending write may have instantiated a few 1861 * In case of error extending write may have instantiated a few
1862 * blocks outside i_size. Trim these off again. 1862 * blocks outside i_size. Trim these off again.
1863 */ 1863 */
1864 if (unlikely((rw & WRITE) && ret < 0)) { 1864 if (unlikely(iov_iter_rw(iter) == WRITE && ret < 0)) {
1865 loff_t isize = i_size_read(inode); 1865 loff_t isize = i_size_read(inode);
1866 loff_t end = offset + count; 1866 loff_t end = offset + count;
1867 1867
@@ -1908,7 +1908,7 @@ retry:
1908 ret = err; 1908 ret = err;
1909 } 1909 }
1910out: 1910out:
1911 trace_ext3_direct_IO_exit(inode, offset, count, rw, ret); 1911 trace_ext3_direct_IO_exit(inode, offset, count, iov_iter_rw(iter), ret);
1912 return ret; 1912 return ret;
1913} 1913}
1914 1914
diff --git a/fs/ext3/super.c b/fs/ext3/super.c
index d4dbf3c259b3..f037b4b27300 100644
--- a/fs/ext3/super.c
+++ b/fs/ext3/super.c
@@ -789,7 +789,7 @@ static const struct quotactl_ops ext3_qctl_operations = {
789 .quota_on = ext3_quota_on, 789 .quota_on = ext3_quota_on,
790 .quota_off = dquot_quota_off, 790 .quota_off = dquot_quota_off,
791 .quota_sync = dquot_quota_sync, 791 .quota_sync = dquot_quota_sync,
792 .get_info = dquot_get_dqinfo, 792 .get_state = dquot_get_state,
793 .set_info = dquot_set_dqinfo, 793 .set_info = dquot_set_dqinfo,
794 .get_dqblk = dquot_get_dqblk, 794 .get_dqblk = dquot_get_dqblk,
795 .set_dqblk = dquot_set_dqblk 795 .set_dqblk = dquot_set_dqblk
diff --git a/fs/ext3/xattr.c b/fs/ext3/xattr.c
index c6874be6d58b..24215dc09a18 100644
--- a/fs/ext3/xattr.c
+++ b/fs/ext3/xattr.c
@@ -546,8 +546,7 @@ ext3_xattr_set_entry(struct ext3_xattr_info *i, struct ext3_xattr_search *s)
546 free += EXT3_XATTR_LEN(name_len); 546 free += EXT3_XATTR_LEN(name_len);
547 } 547 }
548 if (i->value) { 548 if (i->value) {
549 if (free < EXT3_XATTR_SIZE(i->value_len) || 549 if (free < EXT3_XATTR_LEN(name_len) +
550 free < EXT3_XATTR_LEN(name_len) +
551 EXT3_XATTR_SIZE(i->value_len)) 550 EXT3_XATTR_SIZE(i->value_len))
552 return -ENOSPC; 551 return -ENOSPC;
553 } 552 }
diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h
index 8a3981ea35d8..c8eb32eefc3c 100644
--- a/fs/ext4/ext4.h
+++ b/fs/ext4/ext4.h
@@ -2152,8 +2152,8 @@ extern void ext4_da_update_reserve_space(struct inode *inode,
2152/* indirect.c */ 2152/* indirect.c */
2153extern int ext4_ind_map_blocks(handle_t *handle, struct inode *inode, 2153extern int ext4_ind_map_blocks(handle_t *handle, struct inode *inode,
2154 struct ext4_map_blocks *map, int flags); 2154 struct ext4_map_blocks *map, int flags);
2155extern ssize_t ext4_ind_direct_IO(int rw, struct kiocb *iocb, 2155extern ssize_t ext4_ind_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
2156 struct iov_iter *iter, loff_t offset); 2156 loff_t offset);
2157extern int ext4_ind_calc_metadata_amount(struct inode *inode, sector_t lblock); 2157extern int ext4_ind_calc_metadata_amount(struct inode *inode, sector_t lblock);
2158extern int ext4_ind_trans_blocks(struct inode *inode, int nrblocks); 2158extern int ext4_ind_trans_blocks(struct inode *inode, int nrblocks);
2159extern void ext4_ind_truncate(handle_t *, struct inode *inode); 2159extern void ext4_ind_truncate(handle_t *, struct inode *inode);
diff --git a/fs/ext4/file.c b/fs/ext4/file.c
index 7a6defcf3352..e576d682b353 100644
--- a/fs/ext4/file.c
+++ b/fs/ext4/file.c
@@ -95,11 +95,9 @@ ext4_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
95 struct inode *inode = file_inode(iocb->ki_filp); 95 struct inode *inode = file_inode(iocb->ki_filp);
96 struct mutex *aio_mutex = NULL; 96 struct mutex *aio_mutex = NULL;
97 struct blk_plug plug; 97 struct blk_plug plug;
98 int o_direct = io_is_direct(file); 98 int o_direct = iocb->ki_flags & IOCB_DIRECT;
99 int overwrite = 0; 99 int overwrite = 0;
100 size_t length = iov_iter_count(from);
101 ssize_t ret; 100 ssize_t ret;
102 loff_t pos = iocb->ki_pos;
103 101
104 /* 102 /*
105 * Unaligned direct AIO must be serialized; see comment above 103 * Unaligned direct AIO must be serialized; see comment above
@@ -108,16 +106,17 @@ ext4_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
108 if (o_direct && 106 if (o_direct &&
109 ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS) && 107 ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS) &&
110 !is_sync_kiocb(iocb) && 108 !is_sync_kiocb(iocb) &&
111 (file->f_flags & O_APPEND || 109 (iocb->ki_flags & IOCB_APPEND ||
112 ext4_unaligned_aio(inode, from, pos))) { 110 ext4_unaligned_aio(inode, from, iocb->ki_pos))) {
113 aio_mutex = ext4_aio_mutex(inode); 111 aio_mutex = ext4_aio_mutex(inode);
114 mutex_lock(aio_mutex); 112 mutex_lock(aio_mutex);
115 ext4_unwritten_wait(inode); 113 ext4_unwritten_wait(inode);
116 } 114 }
117 115
118 mutex_lock(&inode->i_mutex); 116 mutex_lock(&inode->i_mutex);
119 if (file->f_flags & O_APPEND) 117 ret = generic_write_checks(iocb, from);
120 iocb->ki_pos = pos = i_size_read(inode); 118 if (ret <= 0)
119 goto out;
121 120
122 /* 121 /*
123 * If we have encountered a bitmap-format file, the size limit 122 * If we have encountered a bitmap-format file, the size limit
@@ -126,22 +125,19 @@ ext4_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
126 if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))) { 125 if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))) {
127 struct ext4_sb_info *sbi = EXT4_SB(inode->i_sb); 126 struct ext4_sb_info *sbi = EXT4_SB(inode->i_sb);
128 127
129 if ((pos > sbi->s_bitmap_maxbytes) || 128 if (iocb->ki_pos >= sbi->s_bitmap_maxbytes) {
130 (pos == sbi->s_bitmap_maxbytes && length > 0)) {
131 mutex_unlock(&inode->i_mutex);
132 ret = -EFBIG; 129 ret = -EFBIG;
133 goto errout; 130 goto out;
134 } 131 }
135 132 iov_iter_truncate(from, sbi->s_bitmap_maxbytes - iocb->ki_pos);
136 if (pos + length > sbi->s_bitmap_maxbytes)
137 iov_iter_truncate(from, sbi->s_bitmap_maxbytes - pos);
138 } 133 }
139 134
140 iocb->private = &overwrite; 135 iocb->private = &overwrite;
141 if (o_direct) { 136 if (o_direct) {
137 size_t length = iov_iter_count(from);
138 loff_t pos = iocb->ki_pos;
142 blk_start_plug(&plug); 139 blk_start_plug(&plug);
143 140
144
145 /* check whether we do a DIO overwrite or not */ 141 /* check whether we do a DIO overwrite or not */
146 if (ext4_should_dioread_nolock(inode) && !aio_mutex && 142 if (ext4_should_dioread_nolock(inode) && !aio_mutex &&
147 !file->f_mapping->nrpages && pos + length <= i_size_read(inode)) { 143 !file->f_mapping->nrpages && pos + length <= i_size_read(inode)) {
@@ -185,7 +181,12 @@ ext4_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
185 if (o_direct) 181 if (o_direct)
186 blk_finish_plug(&plug); 182 blk_finish_plug(&plug);
187 183
188errout: 184 if (aio_mutex)
185 mutex_unlock(aio_mutex);
186 return ret;
187
188out:
189 mutex_unlock(&inode->i_mutex);
189 if (aio_mutex) 190 if (aio_mutex)
190 mutex_unlock(aio_mutex); 191 mutex_unlock(aio_mutex);
191 return ret; 192 return ret;
diff --git a/fs/ext4/indirect.c b/fs/ext4/indirect.c
index 740c7871c117..3580629e42d3 100644
--- a/fs/ext4/indirect.c
+++ b/fs/ext4/indirect.c
@@ -642,8 +642,8 @@ out:
642 * crashes then stale disk data _may_ be exposed inside the file. But current 642 * crashes then stale disk data _may_ be exposed inside the file. But current
643 * VFS code falls back into buffered path in that case so we are safe. 643 * VFS code falls back into buffered path in that case so we are safe.
644 */ 644 */
645ssize_t ext4_ind_direct_IO(int rw, struct kiocb *iocb, 645ssize_t ext4_ind_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
646 struct iov_iter *iter, loff_t offset) 646 loff_t offset)
647{ 647{
648 struct file *file = iocb->ki_filp; 648 struct file *file = iocb->ki_filp;
649 struct inode *inode = file->f_mapping->host; 649 struct inode *inode = file->f_mapping->host;
@@ -654,7 +654,7 @@ ssize_t ext4_ind_direct_IO(int rw, struct kiocb *iocb,
654 size_t count = iov_iter_count(iter); 654 size_t count = iov_iter_count(iter);
655 int retries = 0; 655 int retries = 0;
656 656
657 if (rw == WRITE) { 657 if (iov_iter_rw(iter) == WRITE) {
658 loff_t final_size = offset + count; 658 loff_t final_size = offset + count;
659 659
660 if (final_size > inode->i_size) { 660 if (final_size > inode->i_size) {
@@ -676,7 +676,7 @@ ssize_t ext4_ind_direct_IO(int rw, struct kiocb *iocb,
676 } 676 }
677 677
678retry: 678retry:
679 if (rw == READ && ext4_should_dioread_nolock(inode)) { 679 if (iov_iter_rw(iter) == READ && ext4_should_dioread_nolock(inode)) {
680 /* 680 /*
681 * Nolock dioread optimization may be dynamically disabled 681 * Nolock dioread optimization may be dynamically disabled
682 * via ext4_inode_block_unlocked_dio(). Check inode's state 682 * via ext4_inode_block_unlocked_dio(). Check inode's state
@@ -690,23 +690,24 @@ retry:
690 goto locked; 690 goto locked;
691 } 691 }
692 if (IS_DAX(inode)) 692 if (IS_DAX(inode))
693 ret = dax_do_io(rw, iocb, inode, iter, offset, 693 ret = dax_do_io(iocb, inode, iter, offset,
694 ext4_get_block, NULL, 0); 694 ext4_get_block, NULL, 0);
695 else 695 else
696 ret = __blockdev_direct_IO(rw, iocb, inode, 696 ret = __blockdev_direct_IO(iocb, inode,
697 inode->i_sb->s_bdev, iter, offset, 697 inode->i_sb->s_bdev, iter,
698 ext4_get_block, NULL, NULL, 0); 698 offset, ext4_get_block, NULL,
699 NULL, 0);
699 inode_dio_done(inode); 700 inode_dio_done(inode);
700 } else { 701 } else {
701locked: 702locked:
702 if (IS_DAX(inode)) 703 if (IS_DAX(inode))
703 ret = dax_do_io(rw, iocb, inode, iter, offset, 704 ret = dax_do_io(iocb, inode, iter, offset,
704 ext4_get_block, NULL, DIO_LOCKING); 705 ext4_get_block, NULL, DIO_LOCKING);
705 else 706 else
706 ret = blockdev_direct_IO(rw, iocb, inode, iter, 707 ret = blockdev_direct_IO(iocb, inode, iter, offset,
707 offset, ext4_get_block); 708 ext4_get_block);
708 709
709 if (unlikely((rw & WRITE) && ret < 0)) { 710 if (unlikely(iov_iter_rw(iter) == WRITE && ret < 0)) {
710 loff_t isize = i_size_read(inode); 711 loff_t isize = i_size_read(inode);
711 loff_t end = offset + count; 712 loff_t end = offset + count;
712 713
diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c
index 035b7a06f1c3..b49cf6e59953 100644
--- a/fs/ext4/inode.c
+++ b/fs/ext4/inode.c
@@ -2952,8 +2952,8 @@ static void ext4_end_io_dio(struct kiocb *iocb, loff_t offset,
2952 * if the machine crashes during the write. 2952 * if the machine crashes during the write.
2953 * 2953 *
2954 */ 2954 */
2955static ssize_t ext4_ext_direct_IO(int rw, struct kiocb *iocb, 2955static ssize_t ext4_ext_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
2956 struct iov_iter *iter, loff_t offset) 2956 loff_t offset)
2957{ 2957{
2958 struct file *file = iocb->ki_filp; 2958 struct file *file = iocb->ki_filp;
2959 struct inode *inode = file->f_mapping->host; 2959 struct inode *inode = file->f_mapping->host;
@@ -2966,8 +2966,8 @@ static ssize_t ext4_ext_direct_IO(int rw, struct kiocb *iocb,
2966 ext4_io_end_t *io_end = NULL; 2966 ext4_io_end_t *io_end = NULL;
2967 2967
2968 /* Use the old path for reads and writes beyond i_size. */ 2968 /* Use the old path for reads and writes beyond i_size. */
2969 if (rw != WRITE || final_size > inode->i_size) 2969 if (iov_iter_rw(iter) != WRITE || final_size > inode->i_size)
2970 return ext4_ind_direct_IO(rw, iocb, iter, offset); 2970 return ext4_ind_direct_IO(iocb, iter, offset);
2971 2971
2972 BUG_ON(iocb->private == NULL); 2972 BUG_ON(iocb->private == NULL);
2973 2973
@@ -2976,7 +2976,7 @@ static ssize_t ext4_ext_direct_IO(int rw, struct kiocb *iocb,
2976 * conversion. This also disallows race between truncate() and 2976 * conversion. This also disallows race between truncate() and
2977 * overwrite DIO as i_dio_count needs to be incremented under i_mutex. 2977 * overwrite DIO as i_dio_count needs to be incremented under i_mutex.
2978 */ 2978 */
2979 if (rw == WRITE) 2979 if (iov_iter_rw(iter) == WRITE)
2980 atomic_inc(&inode->i_dio_count); 2980 atomic_inc(&inode->i_dio_count);
2981 2981
2982 /* If we do a overwrite dio, i_mutex locking can be released */ 2982 /* If we do a overwrite dio, i_mutex locking can be released */
@@ -3034,10 +3034,10 @@ static ssize_t ext4_ext_direct_IO(int rw, struct kiocb *iocb,
3034 dio_flags = DIO_LOCKING; 3034 dio_flags = DIO_LOCKING;
3035 } 3035 }
3036 if (IS_DAX(inode)) 3036 if (IS_DAX(inode))
3037 ret = dax_do_io(rw, iocb, inode, iter, offset, get_block_func, 3037 ret = dax_do_io(iocb, inode, iter, offset, get_block_func,
3038 ext4_end_io_dio, dio_flags); 3038 ext4_end_io_dio, dio_flags);
3039 else 3039 else
3040 ret = __blockdev_direct_IO(rw, iocb, inode, 3040 ret = __blockdev_direct_IO(iocb, inode,
3041 inode->i_sb->s_bdev, iter, offset, 3041 inode->i_sb->s_bdev, iter, offset,
3042 get_block_func, 3042 get_block_func,
3043 ext4_end_io_dio, NULL, dio_flags); 3043 ext4_end_io_dio, NULL, dio_flags);
@@ -3078,7 +3078,7 @@ static ssize_t ext4_ext_direct_IO(int rw, struct kiocb *iocb,
3078 } 3078 }
3079 3079
3080retake_lock: 3080retake_lock:
3081 if (rw == WRITE) 3081 if (iov_iter_rw(iter) == WRITE)
3082 inode_dio_done(inode); 3082 inode_dio_done(inode);
3083 /* take i_mutex locking again if we do a ovewrite dio */ 3083 /* take i_mutex locking again if we do a ovewrite dio */
3084 if (overwrite) { 3084 if (overwrite) {
@@ -3089,8 +3089,8 @@ retake_lock:
3089 return ret; 3089 return ret;
3090} 3090}
3091 3091
3092static ssize_t ext4_direct_IO(int rw, struct kiocb *iocb, 3092static ssize_t ext4_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
3093 struct iov_iter *iter, loff_t offset) 3093 loff_t offset)
3094{ 3094{
3095 struct file *file = iocb->ki_filp; 3095 struct file *file = iocb->ki_filp;
3096 struct inode *inode = file->f_mapping->host; 3096 struct inode *inode = file->f_mapping->host;
@@ -3107,12 +3107,12 @@ static ssize_t ext4_direct_IO(int rw, struct kiocb *iocb,
3107 if (ext4_has_inline_data(inode)) 3107 if (ext4_has_inline_data(inode))
3108 return 0; 3108 return 0;
3109 3109
3110 trace_ext4_direct_IO_enter(inode, offset, count, rw); 3110 trace_ext4_direct_IO_enter(inode, offset, count, iov_iter_rw(iter));
3111 if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)) 3111 if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))
3112 ret = ext4_ext_direct_IO(rw, iocb, iter, offset); 3112 ret = ext4_ext_direct_IO(iocb, iter, offset);
3113 else 3113 else
3114 ret = ext4_ind_direct_IO(rw, iocb, iter, offset); 3114 ret = ext4_ind_direct_IO(iocb, iter, offset);
3115 trace_ext4_direct_IO_exit(inode, offset, count, rw, ret); 3115 trace_ext4_direct_IO_exit(inode, offset, count, iov_iter_rw(iter), ret);
3116 return ret; 3116 return ret;
3117} 3117}
3118 3118
diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index e061e66c8280..d348c7d29d80 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -1076,7 +1076,7 @@ static const struct quotactl_ops ext4_qctl_operations = {
1076 .quota_on = ext4_quota_on, 1076 .quota_on = ext4_quota_on,
1077 .quota_off = ext4_quota_off, 1077 .quota_off = ext4_quota_off,
1078 .quota_sync = dquot_quota_sync, 1078 .quota_sync = dquot_quota_sync,
1079 .get_info = dquot_get_dqinfo, 1079 .get_state = dquot_get_state,
1080 .set_info = dquot_set_dqinfo, 1080 .set_info = dquot_set_dqinfo,
1081 .get_dqblk = dquot_get_dqblk, 1081 .get_dqblk = dquot_get_dqblk,
1082 .set_dqblk = dquot_set_dqblk 1082 .set_dqblk = dquot_set_dqblk
diff --git a/fs/f2fs/data.c b/fs/f2fs/data.c
index 497f8515d205..319eda511c4f 100644
--- a/fs/f2fs/data.c
+++ b/fs/f2fs/data.c
@@ -1118,12 +1118,12 @@ static int f2fs_write_end(struct file *file,
1118 return copied; 1118 return copied;
1119} 1119}
1120 1120
1121static int check_direct_IO(struct inode *inode, int rw, 1121static int check_direct_IO(struct inode *inode, struct iov_iter *iter,
1122 struct iov_iter *iter, loff_t offset) 1122 loff_t offset)
1123{ 1123{
1124 unsigned blocksize_mask = inode->i_sb->s_blocksize - 1; 1124 unsigned blocksize_mask = inode->i_sb->s_blocksize - 1;
1125 1125
1126 if (rw == READ) 1126 if (iov_iter_rw(iter) == READ)
1127 return 0; 1127 return 0;
1128 1128
1129 if (offset & blocksize_mask) 1129 if (offset & blocksize_mask)
@@ -1135,8 +1135,8 @@ static int check_direct_IO(struct inode *inode, int rw,
1135 return 0; 1135 return 0;
1136} 1136}
1137 1137
1138static ssize_t f2fs_direct_IO(int rw, struct kiocb *iocb, 1138static ssize_t f2fs_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
1139 struct iov_iter *iter, loff_t offset) 1139 loff_t offset)
1140{ 1140{
1141 struct file *file = iocb->ki_filp; 1141 struct file *file = iocb->ki_filp;
1142 struct address_space *mapping = file->f_mapping; 1142 struct address_space *mapping = file->f_mapping;
@@ -1151,19 +1151,19 @@ static ssize_t f2fs_direct_IO(int rw, struct kiocb *iocb,
1151 return err; 1151 return err;
1152 } 1152 }
1153 1153
1154 if (check_direct_IO(inode, rw, iter, offset)) 1154 if (check_direct_IO(inode, iter, offset))
1155 return 0; 1155 return 0;
1156 1156
1157 trace_f2fs_direct_IO_enter(inode, offset, count, rw); 1157 trace_f2fs_direct_IO_enter(inode, offset, count, iov_iter_rw(iter));
1158 1158
1159 if (rw & WRITE) 1159 if (iov_iter_rw(iter) == WRITE)
1160 __allocate_data_blocks(inode, offset, count); 1160 __allocate_data_blocks(inode, offset, count);
1161 1161
1162 err = blockdev_direct_IO(rw, iocb, inode, iter, offset, get_data_block); 1162 err = blockdev_direct_IO(iocb, inode, iter, offset, get_data_block);
1163 if (err < 0 && (rw & WRITE)) 1163 if (err < 0 && iov_iter_rw(iter) == WRITE)
1164 f2fs_write_failed(mapping, offset + count); 1164 f2fs_write_failed(mapping, offset + count);
1165 1165
1166 trace_f2fs_direct_IO_exit(inode, offset, count, rw, err); 1166 trace_f2fs_direct_IO_exit(inode, offset, count, iov_iter_rw(iter), err);
1167 1167
1168 return err; 1168 return err;
1169} 1169}
diff --git a/fs/fat/cache.c b/fs/fat/cache.c
index 91ad9e1c9441..93fc62232ec2 100644
--- a/fs/fat/cache.c
+++ b/fs/fat/cache.c
@@ -8,9 +8,7 @@
8 * May 1999. AV. Fixed the bogosity with FAT32 (read "FAT28"). Fscking lusers. 8 * May 1999. AV. Fixed the bogosity with FAT32 (read "FAT28"). Fscking lusers.
9 */ 9 */
10 10
11#include <linux/fs.h>
12#include <linux/slab.h> 11#include <linux/slab.h>
13#include <linux/buffer_head.h>
14#include "fat.h" 12#include "fat.h"
15 13
16/* this must be > 0. */ 14/* this must be > 0. */
diff --git a/fs/fat/dir.c b/fs/fat/dir.c
index c5d6bb939d19..4afc4d9d2e41 100644
--- a/fs/fat/dir.c
+++ b/fs/fat/dir.c
@@ -13,13 +13,9 @@
13 * Short name translation 1999, 2001 by Wolfram Pienkoss <wp@bszh.de> 13 * Short name translation 1999, 2001 by Wolfram Pienkoss <wp@bszh.de>
14 */ 14 */
15 15
16#include <linux/module.h>
17#include <linux/slab.h> 16#include <linux/slab.h>
18#include <linux/time.h>
19#include <linux/buffer_head.h>
20#include <linux/compat.h> 17#include <linux/compat.h>
21#include <linux/uaccess.h> 18#include <linux/uaccess.h>
22#include <linux/kernel.h>
23#include "fat.h" 19#include "fat.h"
24 20
25/* 21/*
diff --git a/fs/fat/fat.h b/fs/fat/fat.h
index 64e295e8ff38..be5e15323bab 100644
--- a/fs/fat/fat.h
+++ b/fs/fat/fat.h
@@ -2,11 +2,8 @@
2#define _FAT_H 2#define _FAT_H
3 3
4#include <linux/buffer_head.h> 4#include <linux/buffer_head.h>
5#include <linux/string.h>
6#include <linux/nls.h> 5#include <linux/nls.h>
7#include <linux/fs.h>
8#include <linux/hash.h> 6#include <linux/hash.h>
9#include <linux/mutex.h>
10#include <linux/ratelimit.h> 7#include <linux/ratelimit.h>
11#include <linux/msdos_fs.h> 8#include <linux/msdos_fs.h>
12 9
@@ -66,7 +63,7 @@ struct msdos_sb_info {
66 unsigned short sec_per_clus; /* sectors/cluster */ 63 unsigned short sec_per_clus; /* sectors/cluster */
67 unsigned short cluster_bits; /* log2(cluster_size) */ 64 unsigned short cluster_bits; /* log2(cluster_size) */
68 unsigned int cluster_size; /* cluster size */ 65 unsigned int cluster_size; /* cluster size */
69 unsigned char fats, fat_bits; /* number of FATs, FAT bits (12 or 16) */ 66 unsigned char fats, fat_bits; /* number of FATs, FAT bits (12,16 or 32) */
70 unsigned short fat_start; 67 unsigned short fat_start;
71 unsigned long fat_length; /* FAT start & length (sec.) */ 68 unsigned long fat_length; /* FAT start & length (sec.) */
72 unsigned long dir_start; 69 unsigned long dir_start;
diff --git a/fs/fat/fatent.c b/fs/fat/fatent.c
index 260705c58062..8226557130a2 100644
--- a/fs/fat/fatent.c
+++ b/fs/fat/fatent.c
@@ -3,9 +3,6 @@
3 * Released under GPL v2. 3 * Released under GPL v2.
4 */ 4 */
5 5
6#include <linux/module.h>
7#include <linux/fs.h>
8#include <linux/msdos_fs.h>
9#include <linux/blkdev.h> 6#include <linux/blkdev.h>
10#include "fat.h" 7#include "fat.h"
11 8
diff --git a/fs/fat/file.c b/fs/fat/file.c
index 1e98d333879f..cf50d93565a2 100644
--- a/fs/fat/file.c
+++ b/fs/fat/file.c
@@ -10,10 +10,6 @@
10#include <linux/module.h> 10#include <linux/module.h>
11#include <linux/compat.h> 11#include <linux/compat.h>
12#include <linux/mount.h> 12#include <linux/mount.h>
13#include <linux/time.h>
14#include <linux/buffer_head.h>
15#include <linux/writeback.h>
16#include <linux/backing-dev.h>
17#include <linux/blkdev.h> 13#include <linux/blkdev.h>
18#include <linux/fsnotify.h> 14#include <linux/fsnotify.h>
19#include <linux/security.h> 15#include <linux/security.h>
diff --git a/fs/fat/inode.c b/fs/fat/inode.c
index 8521207de229..c06774658345 100644
--- a/fs/fat/inode.c
+++ b/fs/fat/inode.c
@@ -11,20 +11,12 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/time.h>
16#include <linux/slab.h>
17#include <linux/seq_file.h>
18#include <linux/pagemap.h> 14#include <linux/pagemap.h>
19#include <linux/mpage.h> 15#include <linux/mpage.h>
20#include <linux/buffer_head.h>
21#include <linux/mount.h>
22#include <linux/vfs.h> 16#include <linux/vfs.h>
17#include <linux/seq_file.h>
23#include <linux/parser.h> 18#include <linux/parser.h>
24#include <linux/uio.h> 19#include <linux/uio.h>
25#include <linux/writeback.h>
26#include <linux/log2.h>
27#include <linux/hash.h>
28#include <linux/blkdev.h> 20#include <linux/blkdev.h>
29#include <asm/unaligned.h> 21#include <asm/unaligned.h>
30#include "fat.h" 22#include "fat.h"
@@ -245,8 +237,7 @@ static int fat_write_end(struct file *file, struct address_space *mapping,
245 return err; 237 return err;
246} 238}
247 239
248static ssize_t fat_direct_IO(int rw, struct kiocb *iocb, 240static ssize_t fat_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
249 struct iov_iter *iter,
250 loff_t offset) 241 loff_t offset)
251{ 242{
252 struct file *file = iocb->ki_filp; 243 struct file *file = iocb->ki_filp;
@@ -255,7 +246,7 @@ static ssize_t fat_direct_IO(int rw, struct kiocb *iocb,
255 size_t count = iov_iter_count(iter); 246 size_t count = iov_iter_count(iter);
256 ssize_t ret; 247 ssize_t ret;
257 248
258 if (rw == WRITE) { 249 if (iov_iter_rw(iter) == WRITE) {
259 /* 250 /*
260 * FIXME: blockdev_direct_IO() doesn't use ->write_begin(), 251 * FIXME: blockdev_direct_IO() doesn't use ->write_begin(),
261 * so we need to update the ->mmu_private to block boundary. 252 * so we need to update the ->mmu_private to block boundary.
@@ -274,8 +265,8 @@ static ssize_t fat_direct_IO(int rw, struct kiocb *iocb,
274 * FAT need to use the DIO_LOCKING for avoiding the race 265 * FAT need to use the DIO_LOCKING for avoiding the race
275 * condition of fat_get_block() and ->truncate(). 266 * condition of fat_get_block() and ->truncate().
276 */ 267 */
277 ret = blockdev_direct_IO(rw, iocb, inode, iter, offset, fat_get_block); 268 ret = blockdev_direct_IO(iocb, inode, iter, offset, fat_get_block);
278 if (ret < 0 && (rw & WRITE)) 269 if (ret < 0 && iov_iter_rw(iter) == WRITE)
279 fat_write_failed(mapping, offset + count); 270 fat_write_failed(mapping, offset + count);
280 271
281 return ret; 272 return ret;
@@ -1279,8 +1270,7 @@ out:
1279 1270
1280static int fat_read_root(struct inode *inode) 1271static int fat_read_root(struct inode *inode)
1281{ 1272{
1282 struct super_block *sb = inode->i_sb; 1273 struct msdos_sb_info *sbi = MSDOS_SB(inode->i_sb);
1283 struct msdos_sb_info *sbi = MSDOS_SB(sb);
1284 int error; 1274 int error;
1285 1275
1286 MSDOS_I(inode)->i_pos = MSDOS_ROOT_INO; 1276 MSDOS_I(inode)->i_pos = MSDOS_ROOT_INO;
diff --git a/fs/fat/misc.c b/fs/fat/misc.c
index d8da2d2e30ae..c4589e981760 100644
--- a/fs/fat/misc.c
+++ b/fs/fat/misc.c
@@ -6,10 +6,6 @@
6 * and date_dos2unix for date==0 by Igor Zhbanov(bsg@uniyar.ac.ru) 6 * and date_dos2unix for date==0 by Igor Zhbanov(bsg@uniyar.ac.ru)
7 */ 7 */
8 8
9#include <linux/module.h>
10#include <linux/fs.h>
11#include <linux/buffer_head.h>
12#include <linux/time.h>
13#include "fat.h" 9#include "fat.h"
14 10
15/* 11/*
diff --git a/fs/fat/namei_msdos.c b/fs/fat/namei_msdos.c
index a783b0e1272a..cc6a8541b668 100644
--- a/fs/fat/namei_msdos.c
+++ b/fs/fat/namei_msdos.c
@@ -7,8 +7,6 @@
7 */ 7 */
8 8
9#include <linux/module.h> 9#include <linux/module.h>
10#include <linux/time.h>
11#include <linux/buffer_head.h>
12#include "fat.h" 10#include "fat.h"
13 11
14/* Characters that are undesirable in an MS-DOS file name */ 12/* Characters that are undesirable in an MS-DOS file name */
diff --git a/fs/fat/namei_vfat.c b/fs/fat/namei_vfat.c
index b8b92c2f9683..7e0974eebd8e 100644
--- a/fs/fat/namei_vfat.c
+++ b/fs/fat/namei_vfat.c
@@ -16,10 +16,8 @@
16 */ 16 */
17 17
18#include <linux/module.h> 18#include <linux/module.h>
19#include <linux/jiffies.h>
20#include <linux/ctype.h> 19#include <linux/ctype.h>
21#include <linux/slab.h> 20#include <linux/slab.h>
22#include <linux/buffer_head.h>
23#include <linux/namei.h> 21#include <linux/namei.h>
24#include "fat.h" 22#include "fat.h"
25 23
diff --git a/fs/file.c b/fs/file.c
index ee738ea028fa..93c5f89c248b 100644
--- a/fs/file.c
+++ b/fs/file.c
@@ -638,8 +638,7 @@ static struct file *__fget(unsigned int fd, fmode_t mask)
638 file = fcheck_files(files, fd); 638 file = fcheck_files(files, fd);
639 if (file) { 639 if (file) {
640 /* File object ref couldn't be taken */ 640 /* File object ref couldn't be taken */
641 if ((file->f_mode & mask) || 641 if ((file->f_mode & mask) || !get_file_rcu(file))
642 !atomic_long_inc_not_zero(&file->f_count))
643 file = NULL; 642 file = NULL;
644 } 643 }
645 rcu_read_unlock(); 644 rcu_read_unlock();
diff --git a/fs/fuse/file.c b/fs/fuse/file.c
index e1afdd7abf90..5ef05b5c4cff 100644
--- a/fs/fuse/file.c
+++ b/fs/fuse/file.c
@@ -1145,13 +1145,11 @@ static ssize_t fuse_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
1145{ 1145{
1146 struct file *file = iocb->ki_filp; 1146 struct file *file = iocb->ki_filp;
1147 struct address_space *mapping = file->f_mapping; 1147 struct address_space *mapping = file->f_mapping;
1148 size_t count = iov_iter_count(from);
1149 ssize_t written = 0; 1148 ssize_t written = 0;
1150 ssize_t written_buffered = 0; 1149 ssize_t written_buffered = 0;
1151 struct inode *inode = mapping->host; 1150 struct inode *inode = mapping->host;
1152 ssize_t err; 1151 ssize_t err;
1153 loff_t endbyte = 0; 1152 loff_t endbyte = 0;
1154 loff_t pos = iocb->ki_pos;
1155 1153
1156 if (get_fuse_conn(inode)->writeback_cache) { 1154 if (get_fuse_conn(inode)->writeback_cache) {
1157 /* Update size (EOF optimization) and mode (SUID clearing) */ 1155 /* Update size (EOF optimization) and mode (SUID clearing) */
@@ -1167,14 +1165,10 @@ static ssize_t fuse_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
1167 /* We can write back this queue in page reclaim */ 1165 /* We can write back this queue in page reclaim */
1168 current->backing_dev_info = inode_to_bdi(inode); 1166 current->backing_dev_info = inode_to_bdi(inode);
1169 1167
1170 err = generic_write_checks(file, &pos, &count, S_ISBLK(inode->i_mode)); 1168 err = generic_write_checks(iocb, from);
1171 if (err) 1169 if (err <= 0)
1172 goto out;
1173
1174 if (count == 0)
1175 goto out; 1170 goto out;
1176 1171
1177 iov_iter_truncate(from, count);
1178 err = file_remove_suid(file); 1172 err = file_remove_suid(file);
1179 if (err) 1173 if (err)
1180 goto out; 1174 goto out;
@@ -1183,7 +1177,8 @@ static ssize_t fuse_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
1183 if (err) 1177 if (err)
1184 goto out; 1178 goto out;
1185 1179
1186 if (file->f_flags & O_DIRECT) { 1180 if (iocb->ki_flags & IOCB_DIRECT) {
1181 loff_t pos = iocb->ki_pos;
1187 written = generic_file_direct_write(iocb, from, pos); 1182 written = generic_file_direct_write(iocb, from, pos);
1188 if (written < 0 || !iov_iter_count(from)) 1183 if (written < 0 || !iov_iter_count(from))
1189 goto out; 1184 goto out;
@@ -1209,9 +1204,9 @@ static ssize_t fuse_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
1209 written += written_buffered; 1204 written += written_buffered;
1210 iocb->ki_pos = pos + written_buffered; 1205 iocb->ki_pos = pos + written_buffered;
1211 } else { 1206 } else {
1212 written = fuse_perform_write(file, mapping, from, pos); 1207 written = fuse_perform_write(file, mapping, from, iocb->ki_pos);
1213 if (written >= 0) 1208 if (written >= 0)
1214 iocb->ki_pos = pos + written; 1209 iocb->ki_pos += written;
1215 } 1210 }
1216out: 1211out:
1217 current->backing_dev_info = NULL; 1212 current->backing_dev_info = NULL;
@@ -1412,7 +1407,6 @@ static ssize_t fuse_direct_write_iter(struct kiocb *iocb, struct iov_iter *from)
1412 struct file *file = iocb->ki_filp; 1407 struct file *file = iocb->ki_filp;
1413 struct inode *inode = file_inode(file); 1408 struct inode *inode = file_inode(file);
1414 struct fuse_io_priv io = { .async = 0, .file = file }; 1409 struct fuse_io_priv io = { .async = 0, .file = file };
1415 size_t count = iov_iter_count(from);
1416 ssize_t res; 1410 ssize_t res;
1417 1411
1418 if (is_bad_inode(inode)) 1412 if (is_bad_inode(inode))
@@ -1420,11 +1414,9 @@ static ssize_t fuse_direct_write_iter(struct kiocb *iocb, struct iov_iter *from)
1420 1414
1421 /* Don't allow parallel writes to the same file */ 1415 /* Don't allow parallel writes to the same file */
1422 mutex_lock(&inode->i_mutex); 1416 mutex_lock(&inode->i_mutex);
1423 res = generic_write_checks(file, &iocb->ki_pos, &count, 0); 1417 res = generic_write_checks(iocb, from);
1424 if (!res) { 1418 if (res > 0)
1425 iov_iter_truncate(from, count);
1426 res = fuse_direct_io(&io, from, &iocb->ki_pos, FUSE_DIO_WRITE); 1419 res = fuse_direct_io(&io, from, &iocb->ki_pos, FUSE_DIO_WRITE);
1427 }
1428 fuse_invalidate_attr(inode); 1420 fuse_invalidate_attr(inode);
1429 if (res > 0) 1421 if (res > 0)
1430 fuse_write_update_size(inode, iocb->ki_pos); 1422 fuse_write_update_size(inode, iocb->ki_pos);
@@ -2782,8 +2774,7 @@ static inline loff_t fuse_round_up(loff_t off)
2782} 2774}
2783 2775
2784static ssize_t 2776static ssize_t
2785fuse_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter, 2777fuse_direct_IO(struct kiocb *iocb, struct iov_iter *iter, loff_t offset)
2786 loff_t offset)
2787{ 2778{
2788 DECLARE_COMPLETION_ONSTACK(wait); 2779 DECLARE_COMPLETION_ONSTACK(wait);
2789 ssize_t ret = 0; 2780 ssize_t ret = 0;
@@ -2800,15 +2791,15 @@ fuse_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter,
2800 inode = file->f_mapping->host; 2791 inode = file->f_mapping->host;
2801 i_size = i_size_read(inode); 2792 i_size = i_size_read(inode);
2802 2793
2803 if ((rw == READ) && (offset > i_size)) 2794 if ((iov_iter_rw(iter) == READ) && (offset > i_size))
2804 return 0; 2795 return 0;
2805 2796
2806 /* optimization for short read */ 2797 /* optimization for short read */
2807 if (async_dio && rw != WRITE && offset + count > i_size) { 2798 if (async_dio && iov_iter_rw(iter) != WRITE && offset + count > i_size) {
2808 if (offset >= i_size) 2799 if (offset >= i_size)
2809 return 0; 2800 return 0;
2810 count = min_t(loff_t, count, fuse_round_up(i_size - offset)); 2801 iov_iter_truncate(iter, fuse_round_up(i_size - offset));
2811 iov_iter_truncate(iter, count); 2802 count = iov_iter_count(iter);
2812 } 2803 }
2813 2804
2814 io = kmalloc(sizeof(struct fuse_io_priv), GFP_KERNEL); 2805 io = kmalloc(sizeof(struct fuse_io_priv), GFP_KERNEL);
@@ -2819,7 +2810,7 @@ fuse_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter,
2819 io->bytes = -1; 2810 io->bytes = -1;
2820 io->size = 0; 2811 io->size = 0;
2821 io->offset = offset; 2812 io->offset = offset;
2822 io->write = (rw == WRITE); 2813 io->write = (iov_iter_rw(iter) == WRITE);
2823 io->err = 0; 2814 io->err = 0;
2824 io->file = file; 2815 io->file = file;
2825 /* 2816 /*
@@ -2834,19 +2825,15 @@ fuse_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter,
2834 * to wait on real async I/O requests, so we must submit this request 2825 * to wait on real async I/O requests, so we must submit this request
2835 * synchronously. 2826 * synchronously.
2836 */ 2827 */
2837 if (!is_sync_kiocb(iocb) && (offset + count > i_size) && rw == WRITE) 2828 if (!is_sync_kiocb(iocb) && (offset + count > i_size) &&
2829 iov_iter_rw(iter) == WRITE)
2838 io->async = false; 2830 io->async = false;
2839 2831
2840 if (io->async && is_sync_kiocb(iocb)) 2832 if (io->async && is_sync_kiocb(iocb))
2841 io->done = &wait; 2833 io->done = &wait;
2842 2834
2843 if (rw == WRITE) { 2835 if (iov_iter_rw(iter) == WRITE) {
2844 ret = generic_write_checks(file, &pos, &count, 0); 2836 ret = fuse_direct_io(io, iter, &pos, FUSE_DIO_WRITE);
2845 if (!ret) {
2846 iov_iter_truncate(iter, count);
2847 ret = fuse_direct_io(io, iter, &pos, FUSE_DIO_WRITE);
2848 }
2849
2850 fuse_invalidate_attr(inode); 2837 fuse_invalidate_attr(inode);
2851 } else { 2838 } else {
2852 ret = __fuse_direct_read(io, iter, &pos); 2839 ret = __fuse_direct_read(io, iter, &pos);
@@ -2865,7 +2852,7 @@ fuse_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter,
2865 2852
2866 kfree(io); 2853 kfree(io);
2867 2854
2868 if (rw == WRITE) { 2855 if (iov_iter_rw(iter) == WRITE) {
2869 if (ret > 0) 2856 if (ret > 0)
2870 fuse_write_update_size(inode, pos); 2857 fuse_write_update_size(inode, pos);
2871 else if (ret < 0 && offset + count > i_size) 2858 else if (ret < 0 && offset + count > i_size)
diff --git a/fs/gfs2/aops.c b/fs/gfs2/aops.c
index a6e6990aea39..5551fea0afd7 100644
--- a/fs/gfs2/aops.c
+++ b/fs/gfs2/aops.c
@@ -1016,13 +1016,12 @@ out:
1016/** 1016/**
1017 * gfs2_ok_for_dio - check that dio is valid on this file 1017 * gfs2_ok_for_dio - check that dio is valid on this file
1018 * @ip: The inode 1018 * @ip: The inode
1019 * @rw: READ or WRITE
1020 * @offset: The offset at which we are reading or writing 1019 * @offset: The offset at which we are reading or writing
1021 * 1020 *
1022 * Returns: 0 (to ignore the i/o request and thus fall back to buffered i/o) 1021 * Returns: 0 (to ignore the i/o request and thus fall back to buffered i/o)
1023 * 1 (to accept the i/o request) 1022 * 1 (to accept the i/o request)
1024 */ 1023 */
1025static int gfs2_ok_for_dio(struct gfs2_inode *ip, int rw, loff_t offset) 1024static int gfs2_ok_for_dio(struct gfs2_inode *ip, loff_t offset)
1026{ 1025{
1027 /* 1026 /*
1028 * Should we return an error here? I can't see that O_DIRECT for 1027 * Should we return an error here? I can't see that O_DIRECT for
@@ -1039,8 +1038,8 @@ static int gfs2_ok_for_dio(struct gfs2_inode *ip, int rw, loff_t offset)
1039 1038
1040 1039
1041 1040
1042static ssize_t gfs2_direct_IO(int rw, struct kiocb *iocb, 1041static ssize_t gfs2_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
1043 struct iov_iter *iter, loff_t offset) 1042 loff_t offset)
1044{ 1043{
1045 struct file *file = iocb->ki_filp; 1044 struct file *file = iocb->ki_filp;
1046 struct inode *inode = file->f_mapping->host; 1045 struct inode *inode = file->f_mapping->host;
@@ -1061,7 +1060,7 @@ static ssize_t gfs2_direct_IO(int rw, struct kiocb *iocb,
1061 rv = gfs2_glock_nq(&gh); 1060 rv = gfs2_glock_nq(&gh);
1062 if (rv) 1061 if (rv)
1063 return rv; 1062 return rv;
1064 rv = gfs2_ok_for_dio(ip, rw, offset); 1063 rv = gfs2_ok_for_dio(ip, offset);
1065 if (rv != 1) 1064 if (rv != 1)
1066 goto out; /* dio not valid, fall back to buffered i/o */ 1065 goto out; /* dio not valid, fall back to buffered i/o */
1067 1066
@@ -1091,13 +1090,12 @@ static ssize_t gfs2_direct_IO(int rw, struct kiocb *iocb,
1091 rv = filemap_write_and_wait_range(mapping, lstart, end); 1090 rv = filemap_write_and_wait_range(mapping, lstart, end);
1092 if (rv) 1091 if (rv)
1093 goto out; 1092 goto out;
1094 if (rw == WRITE) 1093 if (iov_iter_rw(iter) == WRITE)
1095 truncate_inode_pages_range(mapping, lstart, end); 1094 truncate_inode_pages_range(mapping, lstart, end);
1096 } 1095 }
1097 1096
1098 rv = __blockdev_direct_IO(rw, iocb, inode, inode->i_sb->s_bdev, 1097 rv = __blockdev_direct_IO(iocb, inode, inode->i_sb->s_bdev, iter,
1099 iter, offset, 1098 offset, gfs2_get_block_direct, NULL, NULL, 0);
1100 gfs2_get_block_direct, NULL, NULL, 0);
1101out: 1099out:
1102 gfs2_glock_dq(&gh); 1100 gfs2_glock_dq(&gh);
1103 gfs2_holder_uninit(&gh); 1101 gfs2_holder_uninit(&gh);
diff --git a/fs/gfs2/file.c b/fs/gfs2/file.c
index 207eb4a8135e..31892871ea87 100644
--- a/fs/gfs2/file.c
+++ b/fs/gfs2/file.c
@@ -709,7 +709,7 @@ static ssize_t gfs2_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
709 709
710 gfs2_size_hint(file, iocb->ki_pos, iov_iter_count(from)); 710 gfs2_size_hint(file, iocb->ki_pos, iov_iter_count(from));
711 711
712 if (file->f_flags & O_APPEND) { 712 if (iocb->ki_flags & IOCB_APPEND) {
713 struct gfs2_holder gh; 713 struct gfs2_holder gh;
714 714
715 ret = gfs2_glock_nq_init(ip->i_gl, LM_ST_SHARED, 0, &gh); 715 ret = gfs2_glock_nq_init(ip->i_gl, LM_ST_SHARED, 0, &gh);
diff --git a/fs/gfs2/quota.c b/fs/gfs2/quota.c
index 5c27e48aa76f..e3065cb9ab08 100644
--- a/fs/gfs2/quota.c
+++ b/fs/gfs2/quota.c
@@ -1494,32 +1494,34 @@ int gfs2_quotad(void *data)
1494 return 0; 1494 return 0;
1495} 1495}
1496 1496
1497static int gfs2_quota_get_xstate(struct super_block *sb, 1497static int gfs2_quota_get_state(struct super_block *sb, struct qc_state *state)
1498 struct fs_quota_stat *fqs)
1499{ 1498{
1500 struct gfs2_sbd *sdp = sb->s_fs_info; 1499 struct gfs2_sbd *sdp = sb->s_fs_info;
1501 1500
1502 memset(fqs, 0, sizeof(struct fs_quota_stat)); 1501 memset(state, 0, sizeof(*state));
1503 fqs->qs_version = FS_QSTAT_VERSION;
1504 1502
1505 switch (sdp->sd_args.ar_quota) { 1503 switch (sdp->sd_args.ar_quota) {
1506 case GFS2_QUOTA_ON: 1504 case GFS2_QUOTA_ON:
1507 fqs->qs_flags |= (FS_QUOTA_UDQ_ENFD | FS_QUOTA_GDQ_ENFD); 1505 state->s_state[USRQUOTA].flags |= QCI_LIMITS_ENFORCED;
1506 state->s_state[GRPQUOTA].flags |= QCI_LIMITS_ENFORCED;
1508 /*FALLTHRU*/ 1507 /*FALLTHRU*/
1509 case GFS2_QUOTA_ACCOUNT: 1508 case GFS2_QUOTA_ACCOUNT:
1510 fqs->qs_flags |= (FS_QUOTA_UDQ_ACCT | FS_QUOTA_GDQ_ACCT); 1509 state->s_state[USRQUOTA].flags |= QCI_ACCT_ENABLED |
1510 QCI_SYSFILE;
1511 state->s_state[GRPQUOTA].flags |= QCI_ACCT_ENABLED |
1512 QCI_SYSFILE;
1511 break; 1513 break;
1512 case GFS2_QUOTA_OFF: 1514 case GFS2_QUOTA_OFF:
1513 break; 1515 break;
1514 } 1516 }
1515
1516 if (sdp->sd_quota_inode) { 1517 if (sdp->sd_quota_inode) {
1517 fqs->qs_uquota.qfs_ino = GFS2_I(sdp->sd_quota_inode)->i_no_addr; 1518 state->s_state[USRQUOTA].ino =
1518 fqs->qs_uquota.qfs_nblks = sdp->sd_quota_inode->i_blocks; 1519 GFS2_I(sdp->sd_quota_inode)->i_no_addr;
1520 state->s_state[USRQUOTA].blocks = sdp->sd_quota_inode->i_blocks;
1519 } 1521 }
1520 fqs->qs_uquota.qfs_nextents = 1; /* unsupported */ 1522 state->s_state[USRQUOTA].nextents = 1; /* unsupported */
1521 fqs->qs_gquota = fqs->qs_uquota; /* its the same inode in both cases */ 1523 state->s_state[GRPQUOTA] = state->s_state[USRQUOTA];
1522 fqs->qs_incoredqs = list_lru_count(&gfs2_qd_lru); 1524 state->s_incoredqs = list_lru_count(&gfs2_qd_lru);
1523 return 0; 1525 return 0;
1524} 1526}
1525 1527
@@ -1664,7 +1666,7 @@ out_put:
1664 1666
1665const struct quotactl_ops gfs2_quotactl_ops = { 1667const struct quotactl_ops gfs2_quotactl_ops = {
1666 .quota_sync = gfs2_quota_sync, 1668 .quota_sync = gfs2_quota_sync,
1667 .get_xstate = gfs2_quota_get_xstate, 1669 .get_state = gfs2_quota_get_state,
1668 .get_dqblk = gfs2_get_dqblk, 1670 .get_dqblk = gfs2_get_dqblk,
1669 .set_dqblk = gfs2_set_dqblk, 1671 .set_dqblk = gfs2_set_dqblk,
1670}; 1672};
diff --git a/fs/hfs/dir.c b/fs/hfs/dir.c
index 145566851e7a..36d1a6ae7655 100644
--- a/fs/hfs/dir.c
+++ b/fs/hfs/dir.c
@@ -197,7 +197,7 @@ static int hfs_create(struct inode *dir, struct dentry *dentry, umode_t mode,
197 197
198 inode = hfs_new_inode(dir, &dentry->d_name, mode); 198 inode = hfs_new_inode(dir, &dentry->d_name, mode);
199 if (!inode) 199 if (!inode)
200 return -ENOSPC; 200 return -ENOMEM;
201 201
202 res = hfs_cat_create(inode->i_ino, dir, &dentry->d_name, inode); 202 res = hfs_cat_create(inode->i_ino, dir, &dentry->d_name, inode);
203 if (res) { 203 if (res) {
@@ -226,7 +226,7 @@ static int hfs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode)
226 226
227 inode = hfs_new_inode(dir, &dentry->d_name, S_IFDIR | mode); 227 inode = hfs_new_inode(dir, &dentry->d_name, S_IFDIR | mode);
228 if (!inode) 228 if (!inode)
229 return -ENOSPC; 229 return -ENOMEM;
230 230
231 res = hfs_cat_create(inode->i_ino, dir, &dentry->d_name, inode); 231 res = hfs_cat_create(inode->i_ino, dir, &dentry->d_name, inode);
232 if (res) { 232 if (res) {
diff --git a/fs/hfs/inode.c b/fs/hfs/inode.c
index 9337065bcc67..75fd5d873c19 100644
--- a/fs/hfs/inode.c
+++ b/fs/hfs/inode.c
@@ -124,8 +124,8 @@ static int hfs_releasepage(struct page *page, gfp_t mask)
124 return res ? try_to_free_buffers(page) : 0; 124 return res ? try_to_free_buffers(page) : 0;
125} 125}
126 126
127static ssize_t hfs_direct_IO(int rw, struct kiocb *iocb, 127static ssize_t hfs_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
128 struct iov_iter *iter, loff_t offset) 128 loff_t offset)
129{ 129{
130 struct file *file = iocb->ki_filp; 130 struct file *file = iocb->ki_filp;
131 struct address_space *mapping = file->f_mapping; 131 struct address_space *mapping = file->f_mapping;
@@ -133,13 +133,13 @@ static ssize_t hfs_direct_IO(int rw, struct kiocb *iocb,
133 size_t count = iov_iter_count(iter); 133 size_t count = iov_iter_count(iter);
134 ssize_t ret; 134 ssize_t ret;
135 135
136 ret = blockdev_direct_IO(rw, iocb, inode, iter, offset, hfs_get_block); 136 ret = blockdev_direct_IO(iocb, inode, iter, offset, hfs_get_block);
137 137
138 /* 138 /*
139 * In case of error extending write may have instantiated a few 139 * In case of error extending write may have instantiated a few
140 * blocks outside i_size. Trim these off again. 140 * blocks outside i_size. Trim these off again.
141 */ 141 */
142 if (unlikely((rw & WRITE) && ret < 0)) { 142 if (unlikely(iov_iter_rw(iter) == WRITE && ret < 0)) {
143 loff_t isize = i_size_read(inode); 143 loff_t isize = i_size_read(inode);
144 loff_t end = offset + count; 144 loff_t end = offset + count;
145 145
diff --git a/fs/hfsplus/bfind.c b/fs/hfsplus/bfind.c
index c1422d91cd36..528e38b5af7f 100644
--- a/fs/hfsplus/bfind.c
+++ b/fs/hfsplus/bfind.c
@@ -118,9 +118,7 @@ int __hfs_brec_find(struct hfs_bnode *bnode, struct hfs_find_data *fd,
118 int b, e; 118 int b, e;
119 int res; 119 int res;
120 120
121 if (!rec_found) 121 BUG_ON(!rec_found);
122 BUG();
123
124 b = 0; 122 b = 0;
125 e = bnode->num_recs - 1; 123 e = bnode->num_recs - 1;
126 res = -ENOENT; 124 res = -ENOENT;
diff --git a/fs/hfsplus/catalog.c b/fs/hfsplus/catalog.c
index 7892e6fddb66..022974ab6e3c 100644
--- a/fs/hfsplus/catalog.c
+++ b/fs/hfsplus/catalog.c
@@ -350,10 +350,11 @@ int hfsplus_delete_cat(u32 cnid, struct inode *dir, struct qstr *str)
350 &fd.search_key->cat.name.unicode, 350 &fd.search_key->cat.name.unicode,
351 off + 2, len); 351 off + 2, len);
352 fd.search_key->key_len = cpu_to_be16(6 + len); 352 fd.search_key->key_len = cpu_to_be16(6 + len);
353 } else 353 } else {
354 err = hfsplus_cat_build_key(sb, fd.search_key, dir->i_ino, str); 354 err = hfsplus_cat_build_key(sb, fd.search_key, dir->i_ino, str);
355 if (unlikely(err)) 355 if (unlikely(err))
356 goto out; 356 goto out;
357 }
357 358
358 err = hfs_brec_find(&fd, hfs_find_rec_by_key); 359 err = hfs_brec_find(&fd, hfs_find_rec_by_key);
359 if (err) 360 if (err)
diff --git a/fs/hfsplus/dir.c b/fs/hfsplus/dir.c
index f0235c1640af..3074609befc3 100644
--- a/fs/hfsplus/dir.c
+++ b/fs/hfsplus/dir.c
@@ -434,7 +434,7 @@ static int hfsplus_symlink(struct inode *dir, struct dentry *dentry,
434{ 434{
435 struct hfsplus_sb_info *sbi = HFSPLUS_SB(dir->i_sb); 435 struct hfsplus_sb_info *sbi = HFSPLUS_SB(dir->i_sb);
436 struct inode *inode; 436 struct inode *inode;
437 int res = -ENOSPC; 437 int res = -ENOMEM;
438 438
439 mutex_lock(&sbi->vh_mutex); 439 mutex_lock(&sbi->vh_mutex);
440 inode = hfsplus_new_inode(dir->i_sb, S_IFLNK | S_IRWXUGO); 440 inode = hfsplus_new_inode(dir->i_sb, S_IFLNK | S_IRWXUGO);
@@ -476,7 +476,7 @@ static int hfsplus_mknod(struct inode *dir, struct dentry *dentry,
476{ 476{
477 struct hfsplus_sb_info *sbi = HFSPLUS_SB(dir->i_sb); 477 struct hfsplus_sb_info *sbi = HFSPLUS_SB(dir->i_sb);
478 struct inode *inode; 478 struct inode *inode;
479 int res = -ENOSPC; 479 int res = -ENOMEM;
480 480
481 mutex_lock(&sbi->vh_mutex); 481 mutex_lock(&sbi->vh_mutex);
482 inode = hfsplus_new_inode(dir->i_sb, mode); 482 inode = hfsplus_new_inode(dir->i_sb, mode);
diff --git a/fs/hfsplus/inode.c b/fs/hfsplus/inode.c
index 5f86cadb0542..b0afedbef12b 100644
--- a/fs/hfsplus/inode.c
+++ b/fs/hfsplus/inode.c
@@ -122,8 +122,8 @@ static int hfsplus_releasepage(struct page *page, gfp_t mask)
122 return res ? try_to_free_buffers(page) : 0; 122 return res ? try_to_free_buffers(page) : 0;
123} 123}
124 124
125static ssize_t hfsplus_direct_IO(int rw, struct kiocb *iocb, 125static ssize_t hfsplus_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
126 struct iov_iter *iter, loff_t offset) 126 loff_t offset)
127{ 127{
128 struct file *file = iocb->ki_filp; 128 struct file *file = iocb->ki_filp;
129 struct address_space *mapping = file->f_mapping; 129 struct address_space *mapping = file->f_mapping;
@@ -131,14 +131,13 @@ static ssize_t hfsplus_direct_IO(int rw, struct kiocb *iocb,
131 size_t count = iov_iter_count(iter); 131 size_t count = iov_iter_count(iter);
132 ssize_t ret; 132 ssize_t ret;
133 133
134 ret = blockdev_direct_IO(rw, iocb, inode, iter, offset, 134 ret = blockdev_direct_IO(iocb, inode, iter, offset, hfsplus_get_block);
135 hfsplus_get_block);
136 135
137 /* 136 /*
138 * In case of error extending write may have instantiated a few 137 * In case of error extending write may have instantiated a few
139 * blocks outside i_size. Trim these off again. 138 * blocks outside i_size. Trim these off again.
140 */ 139 */
141 if (unlikely((rw & WRITE) && ret < 0)) { 140 if (unlikely(iov_iter_rw(iter) == WRITE && ret < 0)) {
142 loff_t isize = i_size_read(inode); 141 loff_t isize = i_size_read(inode);
143 loff_t end = offset + count; 142 loff_t end = offset + count;
144 143
@@ -254,6 +253,12 @@ static int hfsplus_setattr(struct dentry *dentry, struct iattr *attr)
254 if ((attr->ia_valid & ATTR_SIZE) && 253 if ((attr->ia_valid & ATTR_SIZE) &&
255 attr->ia_size != i_size_read(inode)) { 254 attr->ia_size != i_size_read(inode)) {
256 inode_dio_wait(inode); 255 inode_dio_wait(inode);
256 if (attr->ia_size > inode->i_size) {
257 error = generic_cont_expand_simple(inode,
258 attr->ia_size);
259 if (error)
260 return error;
261 }
257 truncate_setsize(inode, attr->ia_size); 262 truncate_setsize(inode, attr->ia_size);
258 hfsplus_file_truncate(inode); 263 hfsplus_file_truncate(inode);
259 } 264 }
diff --git a/fs/hfsplus/ioctl.c b/fs/hfsplus/ioctl.c
index d3ff5cc317d7..8e98f5db6ad6 100644
--- a/fs/hfsplus/ioctl.c
+++ b/fs/hfsplus/ioctl.c
@@ -76,7 +76,7 @@ static int hfsplus_ioctl_setflags(struct file *file, int __user *user_flags)
76{ 76{
77 struct inode *inode = file_inode(file); 77 struct inode *inode = file_inode(file);
78 struct hfsplus_inode_info *hip = HFSPLUS_I(inode); 78 struct hfsplus_inode_info *hip = HFSPLUS_I(inode);
79 unsigned int flags; 79 unsigned int flags, new_fl = 0;
80 int err = 0; 80 int err = 0;
81 81
82 err = mnt_want_write_file(file); 82 err = mnt_want_write_file(file);
@@ -110,14 +110,12 @@ static int hfsplus_ioctl_setflags(struct file *file, int __user *user_flags)
110 } 110 }
111 111
112 if (flags & FS_IMMUTABLE_FL) 112 if (flags & FS_IMMUTABLE_FL)
113 inode->i_flags |= S_IMMUTABLE; 113 new_fl |= S_IMMUTABLE;
114 else
115 inode->i_flags &= ~S_IMMUTABLE;
116 114
117 if (flags & FS_APPEND_FL) 115 if (flags & FS_APPEND_FL)
118 inode->i_flags |= S_APPEND; 116 new_fl |= S_APPEND;
119 else 117
120 inode->i_flags &= ~S_APPEND; 118 inode_set_flags(inode, new_fl, S_IMMUTABLE | S_APPEND);
121 119
122 if (flags & FS_NODUMP_FL) 120 if (flags & FS_NODUMP_FL)
123 hip->userflags |= HFSPLUS_FLG_NODUMP; 121 hip->userflags |= HFSPLUS_FLG_NODUMP;
diff --git a/fs/hfsplus/xattr.c b/fs/hfsplus/xattr.c
index d98094a9f476..89f262d8fcd8 100644
--- a/fs/hfsplus/xattr.c
+++ b/fs/hfsplus/xattr.c
@@ -44,7 +44,7 @@ static int strcmp_xattr_acl(const char *name)
44 return -1; 44 return -1;
45} 45}
46 46
47static inline int is_known_namespace(const char *name) 47static bool is_known_namespace(const char *name)
48{ 48{
49 if (strncmp(name, XATTR_SYSTEM_PREFIX, XATTR_SYSTEM_PREFIX_LEN) && 49 if (strncmp(name, XATTR_SYSTEM_PREFIX, XATTR_SYSTEM_PREFIX_LEN) &&
50 strncmp(name, XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN) && 50 strncmp(name, XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN) &&
@@ -424,6 +424,28 @@ static int copy_name(char *buffer, const char *xattr_name, int name_len)
424 return len; 424 return len;
425} 425}
426 426
427int hfsplus_setxattr(struct dentry *dentry, const char *name,
428 const void *value, size_t size, int flags,
429 const char *prefix, size_t prefixlen)
430{
431 char *xattr_name;
432 int res;
433
434 if (!strcmp(name, ""))
435 return -EINVAL;
436
437 xattr_name = kmalloc(NLS_MAX_CHARSET_SIZE * HFSPLUS_ATTR_MAX_STRLEN + 1,
438 GFP_KERNEL);
439 if (!xattr_name)
440 return -ENOMEM;
441 strcpy(xattr_name, prefix);
442 strcpy(xattr_name + prefixlen, name);
443 res = __hfsplus_setxattr(dentry->d_inode, xattr_name, value, size,
444 flags);
445 kfree(xattr_name);
446 return res;
447}
448
427static ssize_t hfsplus_getxattr_finder_info(struct inode *inode, 449static ssize_t hfsplus_getxattr_finder_info(struct inode *inode,
428 void *value, size_t size) 450 void *value, size_t size)
429{ 451{
@@ -560,6 +582,30 @@ failed_getxattr_init:
560 return res; 582 return res;
561} 583}
562 584
585ssize_t hfsplus_getxattr(struct dentry *dentry, const char *name,
586 void *value, size_t size,
587 const char *prefix, size_t prefixlen)
588{
589 int res;
590 char *xattr_name;
591
592 if (!strcmp(name, ""))
593 return -EINVAL;
594
595 xattr_name = kmalloc(NLS_MAX_CHARSET_SIZE * HFSPLUS_ATTR_MAX_STRLEN + 1,
596 GFP_KERNEL);
597 if (!xattr_name)
598 return -ENOMEM;
599
600 strcpy(xattr_name, prefix);
601 strcpy(xattr_name + prefixlen, name);
602
603 res = __hfsplus_getxattr(dentry->d_inode, xattr_name, value, size);
604 kfree(xattr_name);
605 return res;
606
607}
608
563static inline int can_list(const char *xattr_name) 609static inline int can_list(const char *xattr_name)
564{ 610{
565 if (!xattr_name) 611 if (!xattr_name)
@@ -806,9 +852,6 @@ end_removexattr:
806static int hfsplus_osx_getxattr(struct dentry *dentry, const char *name, 852static int hfsplus_osx_getxattr(struct dentry *dentry, const char *name,
807 void *buffer, size_t size, int type) 853 void *buffer, size_t size, int type)
808{ 854{
809 char *xattr_name;
810 int res;
811
812 if (!strcmp(name, "")) 855 if (!strcmp(name, ""))
813 return -EINVAL; 856 return -EINVAL;
814 857
@@ -818,24 +861,19 @@ static int hfsplus_osx_getxattr(struct dentry *dentry, const char *name,
818 */ 861 */
819 if (is_known_namespace(name)) 862 if (is_known_namespace(name))
820 return -EOPNOTSUPP; 863 return -EOPNOTSUPP;
821 xattr_name = kmalloc(NLS_MAX_CHARSET_SIZE * HFSPLUS_ATTR_MAX_STRLEN
822 + XATTR_MAC_OSX_PREFIX_LEN + 1, GFP_KERNEL);
823 if (!xattr_name)
824 return -ENOMEM;
825 strcpy(xattr_name, XATTR_MAC_OSX_PREFIX);
826 strcpy(xattr_name + XATTR_MAC_OSX_PREFIX_LEN, name);
827 864
828 res = hfsplus_getxattr(dentry, xattr_name, buffer, size); 865 /*
829 kfree(xattr_name); 866 * osx is the namespace we use to indicate an unprefixed
830 return res; 867 * attribute on the filesystem (like the ones that OS X
868 * creates), so we pass the name through unmodified (after
869 * ensuring it doesn't conflict with another namespace).
870 */
871 return __hfsplus_getxattr(dentry->d_inode, name, buffer, size);
831} 872}
832 873
833static int hfsplus_osx_setxattr(struct dentry *dentry, const char *name, 874static int hfsplus_osx_setxattr(struct dentry *dentry, const char *name,
834 const void *buffer, size_t size, int flags, int type) 875 const void *buffer, size_t size, int flags, int type)
835{ 876{
836 char *xattr_name;
837 int res;
838
839 if (!strcmp(name, "")) 877 if (!strcmp(name, ""))
840 return -EINVAL; 878 return -EINVAL;
841 879
@@ -845,16 +883,14 @@ static int hfsplus_osx_setxattr(struct dentry *dentry, const char *name,
845 */ 883 */
846 if (is_known_namespace(name)) 884 if (is_known_namespace(name))
847 return -EOPNOTSUPP; 885 return -EOPNOTSUPP;
848 xattr_name = kmalloc(NLS_MAX_CHARSET_SIZE * HFSPLUS_ATTR_MAX_STRLEN
849 + XATTR_MAC_OSX_PREFIX_LEN + 1, GFP_KERNEL);
850 if (!xattr_name)
851 return -ENOMEM;
852 strcpy(xattr_name, XATTR_MAC_OSX_PREFIX);
853 strcpy(xattr_name + XATTR_MAC_OSX_PREFIX_LEN, name);
854 886
855 res = hfsplus_setxattr(dentry, xattr_name, buffer, size, flags); 887 /*
856 kfree(xattr_name); 888 * osx is the namespace we use to indicate an unprefixed
857 return res; 889 * attribute on the filesystem (like the ones that OS X
890 * creates), so we pass the name through unmodified (after
891 * ensuring it doesn't conflict with another namespace).
892 */
893 return __hfsplus_setxattr(dentry->d_inode, name, buffer, size, flags);
858} 894}
859 895
860static size_t hfsplus_osx_listxattr(struct dentry *dentry, char *list, 896static size_t hfsplus_osx_listxattr(struct dentry *dentry, char *list,
diff --git a/fs/hfsplus/xattr.h b/fs/hfsplus/xattr.h
index 288530cf80b5..f9b0955b3d28 100644
--- a/fs/hfsplus/xattr.h
+++ b/fs/hfsplus/xattr.h
@@ -21,22 +21,16 @@ extern const struct xattr_handler *hfsplus_xattr_handlers[];
21int __hfsplus_setxattr(struct inode *inode, const char *name, 21int __hfsplus_setxattr(struct inode *inode, const char *name,
22 const void *value, size_t size, int flags); 22 const void *value, size_t size, int flags);
23 23
24static inline int hfsplus_setxattr(struct dentry *dentry, const char *name, 24int hfsplus_setxattr(struct dentry *dentry, const char *name,
25 const void *value, size_t size, int flags) 25 const void *value, size_t size, int flags,
26{ 26 const char *prefix, size_t prefixlen);
27 return __hfsplus_setxattr(dentry->d_inode, name, value, size, flags);
28}
29 27
30ssize_t __hfsplus_getxattr(struct inode *inode, const char *name, 28ssize_t __hfsplus_getxattr(struct inode *inode, const char *name,
31 void *value, size_t size); 29 void *value, size_t size);
32 30
33static inline ssize_t hfsplus_getxattr(struct dentry *dentry, 31ssize_t hfsplus_getxattr(struct dentry *dentry, const char *name,
34 const char *name, 32 void *value, size_t size,
35 void *value, 33 const char *prefix, size_t prefixlen);
36 size_t size)
37{
38 return __hfsplus_getxattr(dentry->d_inode, name, value, size);
39}
40 34
41ssize_t hfsplus_listxattr(struct dentry *dentry, char *buffer, size_t size); 35ssize_t hfsplus_listxattr(struct dentry *dentry, char *buffer, size_t size);
42 36
diff --git a/fs/hfsplus/xattr_security.c b/fs/hfsplus/xattr_security.c
index 6ec5e107691f..aacff00a9ff9 100644
--- a/fs/hfsplus/xattr_security.c
+++ b/fs/hfsplus/xattr_security.c
@@ -16,43 +16,17 @@
16static int hfsplus_security_getxattr(struct dentry *dentry, const char *name, 16static int hfsplus_security_getxattr(struct dentry *dentry, const char *name,
17 void *buffer, size_t size, int type) 17 void *buffer, size_t size, int type)
18{ 18{
19 char *xattr_name; 19 return hfsplus_getxattr(dentry, name, buffer, size,
20 int res; 20 XATTR_SECURITY_PREFIX,
21 21 XATTR_SECURITY_PREFIX_LEN);
22 if (!strcmp(name, ""))
23 return -EINVAL;
24
25 xattr_name = kmalloc(NLS_MAX_CHARSET_SIZE * HFSPLUS_ATTR_MAX_STRLEN + 1,
26 GFP_KERNEL);
27 if (!xattr_name)
28 return -ENOMEM;
29 strcpy(xattr_name, XATTR_SECURITY_PREFIX);
30 strcpy(xattr_name + XATTR_SECURITY_PREFIX_LEN, name);
31
32 res = hfsplus_getxattr(dentry, xattr_name, buffer, size);
33 kfree(xattr_name);
34 return res;
35} 22}
36 23
37static int hfsplus_security_setxattr(struct dentry *dentry, const char *name, 24static int hfsplus_security_setxattr(struct dentry *dentry, const char *name,
38 const void *buffer, size_t size, int flags, int type) 25 const void *buffer, size_t size, int flags, int type)
39{ 26{
40 char *xattr_name; 27 return hfsplus_setxattr(dentry, name, buffer, size, flags,
41 int res; 28 XATTR_SECURITY_PREFIX,
42 29 XATTR_SECURITY_PREFIX_LEN);
43 if (!strcmp(name, ""))
44 return -EINVAL;
45
46 xattr_name = kmalloc(NLS_MAX_CHARSET_SIZE * HFSPLUS_ATTR_MAX_STRLEN + 1,
47 GFP_KERNEL);
48 if (!xattr_name)
49 return -ENOMEM;
50 strcpy(xattr_name, XATTR_SECURITY_PREFIX);
51 strcpy(xattr_name + XATTR_SECURITY_PREFIX_LEN, name);
52
53 res = hfsplus_setxattr(dentry, xattr_name, buffer, size, flags);
54 kfree(xattr_name);
55 return res;
56} 30}
57 31
58static size_t hfsplus_security_listxattr(struct dentry *dentry, char *list, 32static size_t hfsplus_security_listxattr(struct dentry *dentry, char *list,
diff --git a/fs/hfsplus/xattr_trusted.c b/fs/hfsplus/xattr_trusted.c
index 3c5f27e4746a..bcf65089b7f7 100644
--- a/fs/hfsplus/xattr_trusted.c
+++ b/fs/hfsplus/xattr_trusted.c
@@ -14,43 +14,16 @@
14static int hfsplus_trusted_getxattr(struct dentry *dentry, const char *name, 14static int hfsplus_trusted_getxattr(struct dentry *dentry, const char *name,
15 void *buffer, size_t size, int type) 15 void *buffer, size_t size, int type)
16{ 16{
17 char *xattr_name; 17 return hfsplus_getxattr(dentry, name, buffer, size,
18 int res; 18 XATTR_TRUSTED_PREFIX,
19 19 XATTR_TRUSTED_PREFIX_LEN);
20 if (!strcmp(name, ""))
21 return -EINVAL;
22
23 xattr_name = kmalloc(NLS_MAX_CHARSET_SIZE * HFSPLUS_ATTR_MAX_STRLEN + 1,
24 GFP_KERNEL);
25 if (!xattr_name)
26 return -ENOMEM;
27 strcpy(xattr_name, XATTR_TRUSTED_PREFIX);
28 strcpy(xattr_name + XATTR_TRUSTED_PREFIX_LEN, name);
29
30 res = hfsplus_getxattr(dentry, xattr_name, buffer, size);
31 kfree(xattr_name);
32 return res;
33} 20}
34 21
35static int hfsplus_trusted_setxattr(struct dentry *dentry, const char *name, 22static int hfsplus_trusted_setxattr(struct dentry *dentry, const char *name,
36 const void *buffer, size_t size, int flags, int type) 23 const void *buffer, size_t size, int flags, int type)
37{ 24{
38 char *xattr_name; 25 return hfsplus_setxattr(dentry, name, buffer, size, flags,
39 int res; 26 XATTR_TRUSTED_PREFIX, XATTR_TRUSTED_PREFIX_LEN);
40
41 if (!strcmp(name, ""))
42 return -EINVAL;
43
44 xattr_name = kmalloc(NLS_MAX_CHARSET_SIZE * HFSPLUS_ATTR_MAX_STRLEN + 1,
45 GFP_KERNEL);
46 if (!xattr_name)
47 return -ENOMEM;
48 strcpy(xattr_name, XATTR_TRUSTED_PREFIX);
49 strcpy(xattr_name + XATTR_TRUSTED_PREFIX_LEN, name);
50
51 res = hfsplus_setxattr(dentry, xattr_name, buffer, size, flags);
52 kfree(xattr_name);
53 return res;
54} 27}
55 28
56static size_t hfsplus_trusted_listxattr(struct dentry *dentry, char *list, 29static size_t hfsplus_trusted_listxattr(struct dentry *dentry, char *list,
diff --git a/fs/hfsplus/xattr_user.c b/fs/hfsplus/xattr_user.c
index 2b625a538b64..5aa0e6dc4a1e 100644
--- a/fs/hfsplus/xattr_user.c
+++ b/fs/hfsplus/xattr_user.c
@@ -14,43 +14,16 @@
14static int hfsplus_user_getxattr(struct dentry *dentry, const char *name, 14static int hfsplus_user_getxattr(struct dentry *dentry, const char *name,
15 void *buffer, size_t size, int type) 15 void *buffer, size_t size, int type)
16{ 16{
17 char *xattr_name;
18 int res;
19 17
20 if (!strcmp(name, "")) 18 return hfsplus_getxattr(dentry, name, buffer, size,
21 return -EINVAL; 19 XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN);
22
23 xattr_name = kmalloc(NLS_MAX_CHARSET_SIZE * HFSPLUS_ATTR_MAX_STRLEN + 1,
24 GFP_KERNEL);
25 if (!xattr_name)
26 return -ENOMEM;
27 strcpy(xattr_name, XATTR_USER_PREFIX);
28 strcpy(xattr_name + XATTR_USER_PREFIX_LEN, name);
29
30 res = hfsplus_getxattr(dentry, xattr_name, buffer, size);
31 kfree(xattr_name);
32 return res;
33} 20}
34 21
35static int hfsplus_user_setxattr(struct dentry *dentry, const char *name, 22static int hfsplus_user_setxattr(struct dentry *dentry, const char *name,
36 const void *buffer, size_t size, int flags, int type) 23 const void *buffer, size_t size, int flags, int type)
37{ 24{
38 char *xattr_name; 25 return hfsplus_setxattr(dentry, name, buffer, size, flags,
39 int res; 26 XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN);
40
41 if (!strcmp(name, ""))
42 return -EINVAL;
43
44 xattr_name = kmalloc(NLS_MAX_CHARSET_SIZE * HFSPLUS_ATTR_MAX_STRLEN + 1,
45 GFP_KERNEL);
46 if (!xattr_name)
47 return -ENOMEM;
48 strcpy(xattr_name, XATTR_USER_PREFIX);
49 strcpy(xattr_name + XATTR_USER_PREFIX_LEN, name);
50
51 res = hfsplus_setxattr(dentry, xattr_name, buffer, size, flags);
52 kfree(xattr_name);
53 return res;
54} 27}
55 28
56static size_t hfsplus_user_listxattr(struct dentry *dentry, char *list, 29static size_t hfsplus_user_listxattr(struct dentry *dentry, char *list,
diff --git a/fs/jfs/inode.c b/fs/jfs/inode.c
index 3197aed10614..070dc4b33544 100644
--- a/fs/jfs/inode.c
+++ b/fs/jfs/inode.c
@@ -330,8 +330,8 @@ static sector_t jfs_bmap(struct address_space *mapping, sector_t block)
330 return generic_block_bmap(mapping, block, jfs_get_block); 330 return generic_block_bmap(mapping, block, jfs_get_block);
331} 331}
332 332
333static ssize_t jfs_direct_IO(int rw, struct kiocb *iocb, 333static ssize_t jfs_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
334 struct iov_iter *iter, loff_t offset) 334 loff_t offset)
335{ 335{
336 struct file *file = iocb->ki_filp; 336 struct file *file = iocb->ki_filp;
337 struct address_space *mapping = file->f_mapping; 337 struct address_space *mapping = file->f_mapping;
@@ -339,13 +339,13 @@ static ssize_t jfs_direct_IO(int rw, struct kiocb *iocb,
339 size_t count = iov_iter_count(iter); 339 size_t count = iov_iter_count(iter);
340 ssize_t ret; 340 ssize_t ret;
341 341
342 ret = blockdev_direct_IO(rw, iocb, inode, iter, offset, jfs_get_block); 342 ret = blockdev_direct_IO(iocb, inode, iter, offset, jfs_get_block);
343 343
344 /* 344 /*
345 * In case of error extending write may have instantiated a few 345 * In case of error extending write may have instantiated a few
346 * blocks outside i_size. Trim these off again. 346 * blocks outside i_size. Trim these off again.
347 */ 347 */
348 if (unlikely((rw & WRITE) && ret < 0)) { 348 if (unlikely(iov_iter_rw(iter) == WRITE && ret < 0)) {
349 loff_t isize = i_size_read(inode); 349 loff_t isize = i_size_read(inode);
350 loff_t end = offset + count; 350 loff_t end = offset + count;
351 351
diff --git a/fs/locks.c b/fs/locks.c
index 52b780fb5258..653faabb07f4 100644
--- a/fs/locks.c
+++ b/fs/locks.c
@@ -2590,6 +2590,44 @@ static int locks_show(struct seq_file *f, void *v)
2590 return 0; 2590 return 0;
2591} 2591}
2592 2592
2593static void __show_fd_locks(struct seq_file *f,
2594 struct list_head *head, int *id,
2595 struct file *filp, struct files_struct *files)
2596{
2597 struct file_lock *fl;
2598
2599 list_for_each_entry(fl, head, fl_list) {
2600
2601 if (filp != fl->fl_file)
2602 continue;
2603 if (fl->fl_owner != files &&
2604 fl->fl_owner != filp)
2605 continue;
2606
2607 (*id)++;
2608 seq_puts(f, "lock:\t");
2609 lock_get_status(f, fl, *id, "");
2610 }
2611}
2612
2613void show_fd_locks(struct seq_file *f,
2614 struct file *filp, struct files_struct *files)
2615{
2616 struct inode *inode = file_inode(filp);
2617 struct file_lock_context *ctx;
2618 int id = 0;
2619
2620 ctx = inode->i_flctx;
2621 if (!ctx)
2622 return;
2623
2624 spin_lock(&ctx->flc_lock);
2625 __show_fd_locks(f, &ctx->flc_flock, &id, filp, files);
2626 __show_fd_locks(f, &ctx->flc_posix, &id, filp, files);
2627 __show_fd_locks(f, &ctx->flc_lease, &id, filp, files);
2628 spin_unlock(&ctx->flc_lock);
2629}
2630
2593static void *locks_start(struct seq_file *f, loff_t *pos) 2631static void *locks_start(struct seq_file *f, loff_t *pos)
2594 __acquires(&blocked_lock_lock) 2632 __acquires(&blocked_lock_lock)
2595{ 2633{
diff --git a/fs/namei.c b/fs/namei.c
index 76fb76a0818b..ffab2e06e147 100644
--- a/fs/namei.c
+++ b/fs/namei.c
@@ -1585,7 +1585,7 @@ static inline int walk_component(struct nameidata *nd, struct path *path,
1585 inode = path->dentry->d_inode; 1585 inode = path->dentry->d_inode;
1586 } 1586 }
1587 err = -ENOENT; 1587 err = -ENOENT;
1588 if (!inode || d_is_negative(path->dentry)) 1588 if (d_is_negative(path->dentry))
1589 goto out_path_put; 1589 goto out_path_put;
1590 1590
1591 if (should_follow_link(path->dentry, follow)) { 1591 if (should_follow_link(path->dentry, follow)) {
@@ -2310,7 +2310,7 @@ mountpoint_last(struct nameidata *nd, struct path *path)
2310 mutex_unlock(&dir->d_inode->i_mutex); 2310 mutex_unlock(&dir->d_inode->i_mutex);
2311 2311
2312done: 2312done:
2313 if (!dentry->d_inode || d_is_negative(dentry)) { 2313 if (d_is_negative(dentry)) {
2314 error = -ENOENT; 2314 error = -ENOENT;
2315 dput(dentry); 2315 dput(dentry);
2316 goto out; 2316 goto out;
@@ -3038,7 +3038,7 @@ retry_lookup:
3038finish_lookup: 3038finish_lookup:
3039 /* we _can_ be in RCU mode here */ 3039 /* we _can_ be in RCU mode here */
3040 error = -ENOENT; 3040 error = -ENOENT;
3041 if (!inode || d_is_negative(path->dentry)) { 3041 if (d_is_negative(path->dentry)) {
3042 path_to_nameidata(path, nd); 3042 path_to_nameidata(path, nd);
3043 goto out; 3043 goto out;
3044 } 3044 }
@@ -3077,7 +3077,7 @@ finish_open:
3077 error = -ENOTDIR; 3077 error = -ENOTDIR;
3078 if ((nd->flags & LOOKUP_DIRECTORY) && !d_can_lookup(nd->path.dentry)) 3078 if ((nd->flags & LOOKUP_DIRECTORY) && !d_can_lookup(nd->path.dentry))
3079 goto out; 3079 goto out;
3080 if (!S_ISREG(nd->inode->i_mode)) 3080 if (!d_is_reg(nd->path.dentry))
3081 will_truncate = false; 3081 will_truncate = false;
3082 3082
3083 if (will_truncate) { 3083 if (will_truncate) {
diff --git a/fs/ncpfs/file.c b/fs/ncpfs/file.c
index 479bf8db264e..011324ce9df2 100644
--- a/fs/ncpfs/file.c
+++ b/fs/ncpfs/file.c
@@ -170,20 +170,15 @@ ncp_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
170 struct file *file = iocb->ki_filp; 170 struct file *file = iocb->ki_filp;
171 struct inode *inode = file_inode(file); 171 struct inode *inode = file_inode(file);
172 size_t already_written = 0; 172 size_t already_written = 0;
173 loff_t pos = iocb->ki_pos;
174 size_t count = iov_iter_count(from);
175 size_t bufsize; 173 size_t bufsize;
176 int errno; 174 int errno;
177 void *bouncebuffer; 175 void *bouncebuffer;
176 off_t pos;
178 177
179 ncp_dbg(1, "enter %pD2\n", file); 178 ncp_dbg(1, "enter %pD2\n", file);
180 errno = generic_write_checks(file, &pos, &count, 0); 179 errno = generic_write_checks(iocb, from);
181 if (errno) 180 if (errno <= 0)
182 return errno; 181 return errno;
183 iov_iter_truncate(from, count);
184
185 if (!count)
186 return 0;
187 182
188 errno = ncp_make_open(inode, O_WRONLY); 183 errno = ncp_make_open(inode, O_WRONLY);
189 if (errno) { 184 if (errno) {
@@ -201,10 +196,11 @@ ncp_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
201 errno = -EIO; /* -ENOMEM */ 196 errno = -EIO; /* -ENOMEM */
202 goto outrel; 197 goto outrel;
203 } 198 }
199 pos = iocb->ki_pos;
204 while (iov_iter_count(from)) { 200 while (iov_iter_count(from)) {
205 int written_this_time; 201 int written_this_time;
206 size_t to_write = min_t(size_t, 202 size_t to_write = min_t(size_t,
207 bufsize - ((off_t)pos % bufsize), 203 bufsize - (pos % bufsize),
208 iov_iter_count(from)); 204 iov_iter_count(from));
209 205
210 if (copy_from_iter(bouncebuffer, to_write, from) != to_write) { 206 if (copy_from_iter(bouncebuffer, to_write, from) != to_write) {
diff --git a/fs/nfs/direct.c b/fs/nfs/direct.c
index c3929fb2ab26..682f65fe09b5 100644
--- a/fs/nfs/direct.c
+++ b/fs/nfs/direct.c
@@ -240,7 +240,6 @@ static int nfs_direct_cmp_commit_data_verf(struct nfs_direct_req *dreq,
240 240
241/** 241/**
242 * nfs_direct_IO - NFS address space operation for direct I/O 242 * nfs_direct_IO - NFS address space operation for direct I/O
243 * @rw: direction (read or write)
244 * @iocb: target I/O control block 243 * @iocb: target I/O control block
245 * @iov: array of vectors that define I/O buffer 244 * @iov: array of vectors that define I/O buffer
246 * @pos: offset in file to begin the operation 245 * @pos: offset in file to begin the operation
@@ -251,7 +250,7 @@ static int nfs_direct_cmp_commit_data_verf(struct nfs_direct_req *dreq,
251 * shunt off direct read and write requests before the VFS gets them, 250 * shunt off direct read and write requests before the VFS gets them,
252 * so this method is only ever called for swap. 251 * so this method is only ever called for swap.
253 */ 252 */
254ssize_t nfs_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter, loff_t pos) 253ssize_t nfs_direct_IO(struct kiocb *iocb, struct iov_iter *iter, loff_t pos)
255{ 254{
256 struct inode *inode = iocb->ki_filp->f_mapping->host; 255 struct inode *inode = iocb->ki_filp->f_mapping->host;
257 256
@@ -267,9 +266,9 @@ ssize_t nfs_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter, loff_t
267#else 266#else
268 VM_BUG_ON(iov_iter_count(iter) != PAGE_SIZE); 267 VM_BUG_ON(iov_iter_count(iter) != PAGE_SIZE);
269 268
270 if (rw == READ) 269 if (iov_iter_rw(iter) == READ)
271 return nfs_file_direct_read(iocb, iter, pos); 270 return nfs_file_direct_read(iocb, iter, pos);
272 return nfs_file_direct_write(iocb, iter, pos); 271 return nfs_file_direct_write(iocb, iter);
273#endif /* CONFIG_NFS_SWAP */ 272#endif /* CONFIG_NFS_SWAP */
274} 273}
275 274
@@ -960,8 +959,7 @@ static ssize_t nfs_direct_write_schedule_iovec(struct nfs_direct_req *dreq,
960 * Note that O_APPEND is not supported for NFS direct writes, as there 959 * Note that O_APPEND is not supported for NFS direct writes, as there
961 * is no atomic O_APPEND write facility in the NFS protocol. 960 * is no atomic O_APPEND write facility in the NFS protocol.
962 */ 961 */
963ssize_t nfs_file_direct_write(struct kiocb *iocb, struct iov_iter *iter, 962ssize_t nfs_file_direct_write(struct kiocb *iocb, struct iov_iter *iter)
964 loff_t pos)
965{ 963{
966 ssize_t result = -EINVAL; 964 ssize_t result = -EINVAL;
967 struct file *file = iocb->ki_filp; 965 struct file *file = iocb->ki_filp;
@@ -969,25 +967,16 @@ ssize_t nfs_file_direct_write(struct kiocb *iocb, struct iov_iter *iter,
969 struct inode *inode = mapping->host; 967 struct inode *inode = mapping->host;
970 struct nfs_direct_req *dreq; 968 struct nfs_direct_req *dreq;
971 struct nfs_lock_context *l_ctx; 969 struct nfs_lock_context *l_ctx;
972 loff_t end; 970 loff_t pos, end;
973 size_t count = iov_iter_count(iter);
974 end = (pos + count - 1) >> PAGE_CACHE_SHIFT;
975
976 nfs_add_stats(mapping->host, NFSIOS_DIRECTWRITTENBYTES, count);
977 971
978 dfprintk(FILE, "NFS: direct write(%pD2, %zd@%Ld)\n", 972 dfprintk(FILE, "NFS: direct write(%pD2, %zd@%Ld)\n",
979 file, count, (long long) pos); 973 file, iov_iter_count(iter), (long long) iocb->ki_pos);
980 974
981 result = generic_write_checks(file, &pos, &count, 0); 975 nfs_add_stats(mapping->host, NFSIOS_DIRECTWRITTENBYTES,
982 if (result) 976 iov_iter_count(iter));
983 goto out;
984 977
985 result = -EINVAL; 978 pos = iocb->ki_pos;
986 if ((ssize_t) count < 0) 979 end = (pos + iov_iter_count(iter) - 1) >> PAGE_CACHE_SHIFT;
987 goto out;
988 result = 0;
989 if (!count)
990 goto out;
991 980
992 mutex_lock(&inode->i_mutex); 981 mutex_lock(&inode->i_mutex);
993 982
@@ -1002,7 +991,7 @@ ssize_t nfs_file_direct_write(struct kiocb *iocb, struct iov_iter *iter,
1002 goto out_unlock; 991 goto out_unlock;
1003 } 992 }
1004 993
1005 task_io_account_write(count); 994 task_io_account_write(iov_iter_count(iter));
1006 995
1007 result = -ENOMEM; 996 result = -ENOMEM;
1008 dreq = nfs_direct_req_alloc(); 997 dreq = nfs_direct_req_alloc();
@@ -1010,7 +999,7 @@ ssize_t nfs_file_direct_write(struct kiocb *iocb, struct iov_iter *iter,
1010 goto out_unlock; 999 goto out_unlock;
1011 1000
1012 dreq->inode = inode; 1001 dreq->inode = inode;
1013 dreq->bytes_left = count; 1002 dreq->bytes_left = iov_iter_count(iter);
1014 dreq->io_start = pos; 1003 dreq->io_start = pos;
1015 dreq->ctx = get_nfs_open_context(nfs_file_open_context(iocb->ki_filp)); 1004 dreq->ctx = get_nfs_open_context(nfs_file_open_context(iocb->ki_filp));
1016 l_ctx = nfs_get_lock_context(dreq->ctx); 1005 l_ctx = nfs_get_lock_context(dreq->ctx);
@@ -1050,7 +1039,6 @@ out_release:
1050 nfs_direct_req_release(dreq); 1039 nfs_direct_req_release(dreq);
1051out_unlock: 1040out_unlock:
1052 mutex_unlock(&inode->i_mutex); 1041 mutex_unlock(&inode->i_mutex);
1053out:
1054 return result; 1042 return result;
1055} 1043}
1056 1044
diff --git a/fs/nfs/file.c b/fs/nfs/file.c
index f6a3adedf027..c40e4363e746 100644
--- a/fs/nfs/file.c
+++ b/fs/nfs/file.c
@@ -170,7 +170,7 @@ nfs_file_read(struct kiocb *iocb, struct iov_iter *to)
170 struct inode *inode = file_inode(iocb->ki_filp); 170 struct inode *inode = file_inode(iocb->ki_filp);
171 ssize_t result; 171 ssize_t result;
172 172
173 if (iocb->ki_filp->f_flags & O_DIRECT) 173 if (iocb->ki_flags & IOCB_DIRECT)
174 return nfs_file_direct_read(iocb, to, iocb->ki_pos); 174 return nfs_file_direct_read(iocb, to, iocb->ki_pos);
175 175
176 dprintk("NFS: read(%pD2, %zu@%lu)\n", 176 dprintk("NFS: read(%pD2, %zu@%lu)\n",
@@ -674,17 +674,20 @@ ssize_t nfs_file_write(struct kiocb *iocb, struct iov_iter *from)
674 unsigned long written = 0; 674 unsigned long written = 0;
675 ssize_t result; 675 ssize_t result;
676 size_t count = iov_iter_count(from); 676 size_t count = iov_iter_count(from);
677 loff_t pos = iocb->ki_pos;
678 677
679 result = nfs_key_timeout_notify(file, inode); 678 result = nfs_key_timeout_notify(file, inode);
680 if (result) 679 if (result)
681 return result; 680 return result;
682 681
683 if (file->f_flags & O_DIRECT) 682 if (iocb->ki_flags & IOCB_DIRECT) {
684 return nfs_file_direct_write(iocb, from, pos); 683 result = generic_write_checks(iocb, from);
684 if (result <= 0)
685 return result;
686 return nfs_file_direct_write(iocb, from);
687 }
685 688
686 dprintk("NFS: write(%pD2, %zu@%Ld)\n", 689 dprintk("NFS: write(%pD2, %zu@%Ld)\n",
687 file, count, (long long) pos); 690 file, count, (long long) iocb->ki_pos);
688 691
689 result = -EBUSY; 692 result = -EBUSY;
690 if (IS_SWAPFILE(inode)) 693 if (IS_SWAPFILE(inode))
@@ -692,7 +695,7 @@ ssize_t nfs_file_write(struct kiocb *iocb, struct iov_iter *from)
692 /* 695 /*
693 * O_APPEND implies that we must revalidate the file length. 696 * O_APPEND implies that we must revalidate the file length.
694 */ 697 */
695 if (file->f_flags & O_APPEND) { 698 if (iocb->ki_flags & IOCB_APPEND) {
696 result = nfs_revalidate_file_size(inode, file); 699 result = nfs_revalidate_file_size(inode, file);
697 if (result) 700 if (result)
698 goto out; 701 goto out;
diff --git a/fs/nfs/read.c b/fs/nfs/read.c
index 568ecf0a880f..b8f5c63f77b2 100644
--- a/fs/nfs/read.c
+++ b/fs/nfs/read.c
@@ -117,15 +117,15 @@ int nfs_readpage_async(struct nfs_open_context *ctx, struct inode *inode,
117 117
118static void nfs_readpage_release(struct nfs_page *req) 118static void nfs_readpage_release(struct nfs_page *req)
119{ 119{
120 struct inode *d_inode = req->wb_context->dentry->d_inode; 120 struct inode *inode = req->wb_context->dentry->d_inode;
121 121
122 dprintk("NFS: read done (%s/%llu %d@%lld)\n", d_inode->i_sb->s_id, 122 dprintk("NFS: read done (%s/%llu %d@%lld)\n", inode->i_sb->s_id,
123 (unsigned long long)NFS_FILEID(d_inode), req->wb_bytes, 123 (unsigned long long)NFS_FILEID(inode), req->wb_bytes,
124 (long long)req_offset(req)); 124 (long long)req_offset(req));
125 125
126 if (nfs_page_group_sync_on_bit(req, PG_UNLOCKPAGE)) { 126 if (nfs_page_group_sync_on_bit(req, PG_UNLOCKPAGE)) {
127 if (PageUptodate(req->wb_page)) 127 if (PageUptodate(req->wb_page))
128 nfs_readpage_to_fscache(d_inode, req->wb_page, 0); 128 nfs_readpage_to_fscache(inode, req->wb_page, 0);
129 129
130 unlock_page(req->wb_page); 130 unlock_page(req->wb_page);
131 } 131 }
diff --git a/fs/nilfs2/alloc.c b/fs/nilfs2/alloc.c
index 741fd02e0444..8df0f3b7839b 100644
--- a/fs/nilfs2/alloc.c
+++ b/fs/nilfs2/alloc.c
@@ -405,13 +405,14 @@ nilfs_palloc_rest_groups_in_desc_block(const struct inode *inode,
405static int nilfs_palloc_count_desc_blocks(struct inode *inode, 405static int nilfs_palloc_count_desc_blocks(struct inode *inode,
406 unsigned long *desc_blocks) 406 unsigned long *desc_blocks)
407{ 407{
408 unsigned long blknum; 408 __u64 blknum;
409 int ret; 409 int ret;
410 410
411 ret = nilfs_bmap_last_key(NILFS_I(inode)->i_bmap, &blknum); 411 ret = nilfs_bmap_last_key(NILFS_I(inode)->i_bmap, &blknum);
412 if (likely(!ret)) 412 if (likely(!ret))
413 *desc_blocks = DIV_ROUND_UP( 413 *desc_blocks = DIV_ROUND_UP(
414 blknum, NILFS_MDT(inode)->mi_blocks_per_desc_block); 414 (unsigned long)blknum,
415 NILFS_MDT(inode)->mi_blocks_per_desc_block);
415 return ret; 416 return ret;
416} 417}
417 418
diff --git a/fs/nilfs2/bmap.c b/fs/nilfs2/bmap.c
index aadbd0b5e3e8..27f75bcbeb30 100644
--- a/fs/nilfs2/bmap.c
+++ b/fs/nilfs2/bmap.c
@@ -152,9 +152,7 @@ static int nilfs_bmap_do_insert(struct nilfs_bmap *bmap, __u64 key, __u64 ptr)
152 * 152 *
153 * %-EEXIST - A record associated with @key already exist. 153 * %-EEXIST - A record associated with @key already exist.
154 */ 154 */
155int nilfs_bmap_insert(struct nilfs_bmap *bmap, 155int nilfs_bmap_insert(struct nilfs_bmap *bmap, __u64 key, unsigned long rec)
156 unsigned long key,
157 unsigned long rec)
158{ 156{
159 int ret; 157 int ret;
160 158
@@ -191,19 +189,47 @@ static int nilfs_bmap_do_delete(struct nilfs_bmap *bmap, __u64 key)
191 return bmap->b_ops->bop_delete(bmap, key); 189 return bmap->b_ops->bop_delete(bmap, key);
192} 190}
193 191
194int nilfs_bmap_last_key(struct nilfs_bmap *bmap, unsigned long *key) 192/**
193 * nilfs_bmap_seek_key - seek a valid entry and return its key
194 * @bmap: bmap struct
195 * @start: start key number
196 * @keyp: place to store valid key
197 *
198 * Description: nilfs_bmap_seek_key() seeks a valid key on @bmap
199 * starting from @start, and stores it to @keyp if found.
200 *
201 * Return Value: On success, 0 is returned. On error, one of the following
202 * negative error codes is returned.
203 *
204 * %-EIO - I/O error.
205 *
206 * %-ENOMEM - Insufficient amount of memory available.
207 *
208 * %-ENOENT - No valid entry was found
209 */
210int nilfs_bmap_seek_key(struct nilfs_bmap *bmap, __u64 start, __u64 *keyp)
195{ 211{
196 __u64 lastkey;
197 int ret; 212 int ret;
198 213
199 down_read(&bmap->b_sem); 214 down_read(&bmap->b_sem);
200 ret = bmap->b_ops->bop_last_key(bmap, &lastkey); 215 ret = bmap->b_ops->bop_seek_key(bmap, start, keyp);
216 up_read(&bmap->b_sem);
217
218 if (ret < 0)
219 ret = nilfs_bmap_convert_error(bmap, __func__, ret);
220 return ret;
221}
222
223int nilfs_bmap_last_key(struct nilfs_bmap *bmap, __u64 *keyp)
224{
225 int ret;
226
227 down_read(&bmap->b_sem);
228 ret = bmap->b_ops->bop_last_key(bmap, keyp);
201 up_read(&bmap->b_sem); 229 up_read(&bmap->b_sem);
202 230
203 if (ret < 0) 231 if (ret < 0)
204 ret = nilfs_bmap_convert_error(bmap, __func__, ret); 232 ret = nilfs_bmap_convert_error(bmap, __func__, ret);
205 else
206 *key = lastkey;
207 return ret; 233 return ret;
208} 234}
209 235
@@ -224,7 +250,7 @@ int nilfs_bmap_last_key(struct nilfs_bmap *bmap, unsigned long *key)
224 * 250 *
225 * %-ENOENT - A record associated with @key does not exist. 251 * %-ENOENT - A record associated with @key does not exist.
226 */ 252 */
227int nilfs_bmap_delete(struct nilfs_bmap *bmap, unsigned long key) 253int nilfs_bmap_delete(struct nilfs_bmap *bmap, __u64 key)
228{ 254{
229 int ret; 255 int ret;
230 256
@@ -235,7 +261,7 @@ int nilfs_bmap_delete(struct nilfs_bmap *bmap, unsigned long key)
235 return nilfs_bmap_convert_error(bmap, __func__, ret); 261 return nilfs_bmap_convert_error(bmap, __func__, ret);
236} 262}
237 263
238static int nilfs_bmap_do_truncate(struct nilfs_bmap *bmap, unsigned long key) 264static int nilfs_bmap_do_truncate(struct nilfs_bmap *bmap, __u64 key)
239{ 265{
240 __u64 lastkey; 266 __u64 lastkey;
241 int ret; 267 int ret;
@@ -276,7 +302,7 @@ static int nilfs_bmap_do_truncate(struct nilfs_bmap *bmap, unsigned long key)
276 * 302 *
277 * %-ENOMEM - Insufficient amount of memory available. 303 * %-ENOMEM - Insufficient amount of memory available.
278 */ 304 */
279int nilfs_bmap_truncate(struct nilfs_bmap *bmap, unsigned long key) 305int nilfs_bmap_truncate(struct nilfs_bmap *bmap, __u64 key)
280{ 306{
281 int ret; 307 int ret;
282 308
diff --git a/fs/nilfs2/bmap.h b/fs/nilfs2/bmap.h
index b89e68076adc..bfa817ce40b3 100644
--- a/fs/nilfs2/bmap.h
+++ b/fs/nilfs2/bmap.h
@@ -76,8 +76,10 @@ struct nilfs_bmap_operations {
76 union nilfs_binfo *); 76 union nilfs_binfo *);
77 int (*bop_mark)(struct nilfs_bmap *, __u64, int); 77 int (*bop_mark)(struct nilfs_bmap *, __u64, int);
78 78
79 /* The following functions are internal use only. */ 79 int (*bop_seek_key)(const struct nilfs_bmap *, __u64, __u64 *);
80 int (*bop_last_key)(const struct nilfs_bmap *, __u64 *); 80 int (*bop_last_key)(const struct nilfs_bmap *, __u64 *);
81
82 /* The following functions are internal use only. */
81 int (*bop_check_insert)(const struct nilfs_bmap *, __u64); 83 int (*bop_check_insert)(const struct nilfs_bmap *, __u64);
82 int (*bop_check_delete)(struct nilfs_bmap *, __u64); 84 int (*bop_check_delete)(struct nilfs_bmap *, __u64);
83 int (*bop_gather_data)(struct nilfs_bmap *, __u64 *, __u64 *, int); 85 int (*bop_gather_data)(struct nilfs_bmap *, __u64 *, __u64 *, int);
@@ -153,10 +155,11 @@ int nilfs_bmap_test_and_clear_dirty(struct nilfs_bmap *);
153int nilfs_bmap_read(struct nilfs_bmap *, struct nilfs_inode *); 155int nilfs_bmap_read(struct nilfs_bmap *, struct nilfs_inode *);
154void nilfs_bmap_write(struct nilfs_bmap *, struct nilfs_inode *); 156void nilfs_bmap_write(struct nilfs_bmap *, struct nilfs_inode *);
155int nilfs_bmap_lookup_contig(struct nilfs_bmap *, __u64, __u64 *, unsigned); 157int nilfs_bmap_lookup_contig(struct nilfs_bmap *, __u64, __u64 *, unsigned);
156int nilfs_bmap_insert(struct nilfs_bmap *, unsigned long, unsigned long); 158int nilfs_bmap_insert(struct nilfs_bmap *bmap, __u64 key, unsigned long rec);
157int nilfs_bmap_delete(struct nilfs_bmap *, unsigned long); 159int nilfs_bmap_delete(struct nilfs_bmap *bmap, __u64 key);
158int nilfs_bmap_last_key(struct nilfs_bmap *, unsigned long *); 160int nilfs_bmap_seek_key(struct nilfs_bmap *bmap, __u64 start, __u64 *keyp);
159int nilfs_bmap_truncate(struct nilfs_bmap *, unsigned long); 161int nilfs_bmap_last_key(struct nilfs_bmap *bmap, __u64 *keyp);
162int nilfs_bmap_truncate(struct nilfs_bmap *bmap, __u64 key);
160void nilfs_bmap_clear(struct nilfs_bmap *); 163void nilfs_bmap_clear(struct nilfs_bmap *);
161int nilfs_bmap_propagate(struct nilfs_bmap *, struct buffer_head *); 164int nilfs_bmap_propagate(struct nilfs_bmap *, struct buffer_head *);
162void nilfs_bmap_lookup_dirty_buffers(struct nilfs_bmap *, struct list_head *); 165void nilfs_bmap_lookup_dirty_buffers(struct nilfs_bmap *, struct list_head *);
diff --git a/fs/nilfs2/btree.c b/fs/nilfs2/btree.c
index ecdbae19a766..059f37137f9a 100644
--- a/fs/nilfs2/btree.c
+++ b/fs/nilfs2/btree.c
@@ -633,6 +633,44 @@ static int nilfs_btree_do_lookup_last(const struct nilfs_bmap *btree,
633 return 0; 633 return 0;
634} 634}
635 635
636/**
637 * nilfs_btree_get_next_key - get next valid key from btree path array
638 * @btree: bmap struct of btree
639 * @path: array of nilfs_btree_path struct
640 * @minlevel: start level
641 * @nextkey: place to store the next valid key
642 *
643 * Return Value: If a next key was found, 0 is returned. Otherwise,
644 * -ENOENT is returned.
645 */
646static int nilfs_btree_get_next_key(const struct nilfs_bmap *btree,
647 const struct nilfs_btree_path *path,
648 int minlevel, __u64 *nextkey)
649{
650 struct nilfs_btree_node *node;
651 int maxlevel = nilfs_btree_height(btree) - 1;
652 int index, next_adj, level;
653
654 /* Next index is already set to bp_index for leaf nodes. */
655 next_adj = 0;
656 for (level = minlevel; level <= maxlevel; level++) {
657 if (level == maxlevel)
658 node = nilfs_btree_get_root(btree);
659 else
660 node = nilfs_btree_get_nonroot_node(path, level);
661
662 index = path[level].bp_index + next_adj;
663 if (index < nilfs_btree_node_get_nchildren(node)) {
664 /* Next key is in this node */
665 *nextkey = nilfs_btree_node_get_key(node, index);
666 return 0;
667 }
668 /* For non-leaf nodes, next index is stored at bp_index + 1. */
669 next_adj = 1;
670 }
671 return -ENOENT;
672}
673
636static int nilfs_btree_lookup(const struct nilfs_bmap *btree, 674static int nilfs_btree_lookup(const struct nilfs_bmap *btree,
637 __u64 key, int level, __u64 *ptrp) 675 __u64 key, int level, __u64 *ptrp)
638{ 676{
@@ -1563,6 +1601,27 @@ out:
1563 return ret; 1601 return ret;
1564} 1602}
1565 1603
1604static int nilfs_btree_seek_key(const struct nilfs_bmap *btree, __u64 start,
1605 __u64 *keyp)
1606{
1607 struct nilfs_btree_path *path;
1608 const int minlevel = NILFS_BTREE_LEVEL_NODE_MIN;
1609 int ret;
1610
1611 path = nilfs_btree_alloc_path();
1612 if (!path)
1613 return -ENOMEM;
1614
1615 ret = nilfs_btree_do_lookup(btree, path, start, NULL, minlevel, 0);
1616 if (!ret)
1617 *keyp = start;
1618 else if (ret == -ENOENT)
1619 ret = nilfs_btree_get_next_key(btree, path, minlevel, keyp);
1620
1621 nilfs_btree_free_path(path);
1622 return ret;
1623}
1624
1566static int nilfs_btree_last_key(const struct nilfs_bmap *btree, __u64 *keyp) 1625static int nilfs_btree_last_key(const struct nilfs_bmap *btree, __u64 *keyp)
1567{ 1626{
1568 struct nilfs_btree_path *path; 1627 struct nilfs_btree_path *path;
@@ -2298,7 +2357,9 @@ static const struct nilfs_bmap_operations nilfs_btree_ops = {
2298 .bop_assign = nilfs_btree_assign, 2357 .bop_assign = nilfs_btree_assign,
2299 .bop_mark = nilfs_btree_mark, 2358 .bop_mark = nilfs_btree_mark,
2300 2359
2360 .bop_seek_key = nilfs_btree_seek_key,
2301 .bop_last_key = nilfs_btree_last_key, 2361 .bop_last_key = nilfs_btree_last_key,
2362
2302 .bop_check_insert = NULL, 2363 .bop_check_insert = NULL,
2303 .bop_check_delete = nilfs_btree_check_delete, 2364 .bop_check_delete = nilfs_btree_check_delete,
2304 .bop_gather_data = nilfs_btree_gather_data, 2365 .bop_gather_data = nilfs_btree_gather_data,
@@ -2318,7 +2379,9 @@ static const struct nilfs_bmap_operations nilfs_btree_ops_gc = {
2318 .bop_assign = nilfs_btree_assign_gc, 2379 .bop_assign = nilfs_btree_assign_gc,
2319 .bop_mark = NULL, 2380 .bop_mark = NULL,
2320 2381
2382 .bop_seek_key = NULL,
2321 .bop_last_key = NULL, 2383 .bop_last_key = NULL,
2384
2322 .bop_check_insert = NULL, 2385 .bop_check_insert = NULL,
2323 .bop_check_delete = NULL, 2386 .bop_check_delete = NULL,
2324 .bop_gather_data = NULL, 2387 .bop_gather_data = NULL,
diff --git a/fs/nilfs2/cpfile.c b/fs/nilfs2/cpfile.c
index 0d58075f34e2..b6596cab9e99 100644
--- a/fs/nilfs2/cpfile.c
+++ b/fs/nilfs2/cpfile.c
@@ -53,6 +53,13 @@ nilfs_cpfile_get_offset(const struct inode *cpfile, __u64 cno)
53 return do_div(tcno, nilfs_cpfile_checkpoints_per_block(cpfile)); 53 return do_div(tcno, nilfs_cpfile_checkpoints_per_block(cpfile));
54} 54}
55 55
56static __u64 nilfs_cpfile_first_checkpoint_in_block(const struct inode *cpfile,
57 unsigned long blkoff)
58{
59 return (__u64)nilfs_cpfile_checkpoints_per_block(cpfile) * blkoff
60 + 1 - NILFS_MDT(cpfile)->mi_first_entry_offset;
61}
62
56static unsigned long 63static unsigned long
57nilfs_cpfile_checkpoints_in_block(const struct inode *cpfile, 64nilfs_cpfile_checkpoints_in_block(const struct inode *cpfile,
58 __u64 curr, 65 __u64 curr,
@@ -146,6 +153,44 @@ static inline int nilfs_cpfile_get_checkpoint_block(struct inode *cpfile,
146 create, nilfs_cpfile_block_init, bhp); 153 create, nilfs_cpfile_block_init, bhp);
147} 154}
148 155
156/**
157 * nilfs_cpfile_find_checkpoint_block - find and get a buffer on cpfile
158 * @cpfile: inode of cpfile
159 * @start_cno: start checkpoint number (inclusive)
160 * @end_cno: end checkpoint number (inclusive)
161 * @cnop: place to store the next checkpoint number
162 * @bhp: place to store a pointer to buffer_head struct
163 *
164 * Return Value: On success, it returns 0. On error, the following negative
165 * error code is returned.
166 *
167 * %-ENOMEM - Insufficient memory available.
168 *
169 * %-EIO - I/O error
170 *
171 * %-ENOENT - no block exists in the range.
172 */
173static int nilfs_cpfile_find_checkpoint_block(struct inode *cpfile,
174 __u64 start_cno, __u64 end_cno,
175 __u64 *cnop,
176 struct buffer_head **bhp)
177{
178 unsigned long start, end, blkoff;
179 int ret;
180
181 if (unlikely(start_cno > end_cno))
182 return -ENOENT;
183
184 start = nilfs_cpfile_get_blkoff(cpfile, start_cno);
185 end = nilfs_cpfile_get_blkoff(cpfile, end_cno);
186
187 ret = nilfs_mdt_find_block(cpfile, start, end, &blkoff, bhp);
188 if (!ret)
189 *cnop = (blkoff == start) ? start_cno :
190 nilfs_cpfile_first_checkpoint_in_block(cpfile, blkoff);
191 return ret;
192}
193
149static inline int nilfs_cpfile_delete_checkpoint_block(struct inode *cpfile, 194static inline int nilfs_cpfile_delete_checkpoint_block(struct inode *cpfile,
150 __u64 cno) 195 __u64 cno)
151{ 196{
@@ -403,14 +448,15 @@ static ssize_t nilfs_cpfile_do_get_cpinfo(struct inode *cpfile, __u64 *cnop,
403 return -ENOENT; /* checkpoint number 0 is invalid */ 448 return -ENOENT; /* checkpoint number 0 is invalid */
404 down_read(&NILFS_MDT(cpfile)->mi_sem); 449 down_read(&NILFS_MDT(cpfile)->mi_sem);
405 450
406 for (n = 0; cno < cur_cno && n < nci; cno += ncps) { 451 for (n = 0; n < nci; cno += ncps) {
407 ncps = nilfs_cpfile_checkpoints_in_block(cpfile, cno, cur_cno); 452 ret = nilfs_cpfile_find_checkpoint_block(
408 ret = nilfs_cpfile_get_checkpoint_block(cpfile, cno, 0, &bh); 453 cpfile, cno, cur_cno - 1, &cno, &bh);
409 if (ret < 0) { 454 if (ret < 0) {
410 if (ret != -ENOENT) 455 if (likely(ret == -ENOENT))
411 goto out; 456 break;
412 continue; /* skip hole */ 457 goto out;
413 } 458 }
459 ncps = nilfs_cpfile_checkpoints_in_block(cpfile, cno, cur_cno);
414 460
415 kaddr = kmap_atomic(bh->b_page); 461 kaddr = kmap_atomic(bh->b_page);
416 cp = nilfs_cpfile_block_get_checkpoint(cpfile, cno, bh, kaddr); 462 cp = nilfs_cpfile_block_get_checkpoint(cpfile, cno, bh, kaddr);
diff --git a/fs/nilfs2/direct.c b/fs/nilfs2/direct.c
index 82f4865e86dd..ebf89fd8ac1a 100644
--- a/fs/nilfs2/direct.c
+++ b/fs/nilfs2/direct.c
@@ -173,6 +173,21 @@ static int nilfs_direct_delete(struct nilfs_bmap *bmap, __u64 key)
173 return ret; 173 return ret;
174} 174}
175 175
176static int nilfs_direct_seek_key(const struct nilfs_bmap *direct, __u64 start,
177 __u64 *keyp)
178{
179 __u64 key;
180
181 for (key = start; key <= NILFS_DIRECT_KEY_MAX; key++) {
182 if (nilfs_direct_get_ptr(direct, key) !=
183 NILFS_BMAP_INVALID_PTR) {
184 *keyp = key;
185 return 0;
186 }
187 }
188 return -ENOENT;
189}
190
176static int nilfs_direct_last_key(const struct nilfs_bmap *direct, __u64 *keyp) 191static int nilfs_direct_last_key(const struct nilfs_bmap *direct, __u64 *keyp)
177{ 192{
178 __u64 key, lastkey; 193 __u64 key, lastkey;
@@ -355,7 +370,9 @@ static const struct nilfs_bmap_operations nilfs_direct_ops = {
355 .bop_assign = nilfs_direct_assign, 370 .bop_assign = nilfs_direct_assign,
356 .bop_mark = NULL, 371 .bop_mark = NULL,
357 372
373 .bop_seek_key = nilfs_direct_seek_key,
358 .bop_last_key = nilfs_direct_last_key, 374 .bop_last_key = nilfs_direct_last_key,
375
359 .bop_check_insert = nilfs_direct_check_insert, 376 .bop_check_insert = nilfs_direct_check_insert,
360 .bop_check_delete = NULL, 377 .bop_check_delete = NULL,
361 .bop_gather_data = nilfs_direct_gather_data, 378 .bop_gather_data = nilfs_direct_gather_data,
diff --git a/fs/nilfs2/inode.c b/fs/nilfs2/inode.c
index ab4987bc637f..be936df4ba73 100644
--- a/fs/nilfs2/inode.c
+++ b/fs/nilfs2/inode.c
@@ -106,7 +106,7 @@ int nilfs_get_block(struct inode *inode, sector_t blkoff,
106 err = nilfs_transaction_begin(inode->i_sb, &ti, 1); 106 err = nilfs_transaction_begin(inode->i_sb, &ti, 1);
107 if (unlikely(err)) 107 if (unlikely(err))
108 goto out; 108 goto out;
109 err = nilfs_bmap_insert(ii->i_bmap, (unsigned long)blkoff, 109 err = nilfs_bmap_insert(ii->i_bmap, blkoff,
110 (unsigned long)bh_result); 110 (unsigned long)bh_result);
111 if (unlikely(err != 0)) { 111 if (unlikely(err != 0)) {
112 if (err == -EEXIST) { 112 if (err == -EEXIST) {
@@ -305,8 +305,7 @@ static int nilfs_write_end(struct file *file, struct address_space *mapping,
305} 305}
306 306
307static ssize_t 307static ssize_t
308nilfs_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter, 308nilfs_direct_IO(struct kiocb *iocb, struct iov_iter *iter, loff_t offset)
309 loff_t offset)
310{ 309{
311 struct file *file = iocb->ki_filp; 310 struct file *file = iocb->ki_filp;
312 struct address_space *mapping = file->f_mapping; 311 struct address_space *mapping = file->f_mapping;
@@ -314,18 +313,17 @@ nilfs_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter,
314 size_t count = iov_iter_count(iter); 313 size_t count = iov_iter_count(iter);
315 ssize_t size; 314 ssize_t size;
316 315
317 if (rw == WRITE) 316 if (iov_iter_rw(iter) == WRITE)
318 return 0; 317 return 0;
319 318
320 /* Needs synchronization with the cleaner */ 319 /* Needs synchronization with the cleaner */
321 size = blockdev_direct_IO(rw, iocb, inode, iter, offset, 320 size = blockdev_direct_IO(iocb, inode, iter, offset, nilfs_get_block);
322 nilfs_get_block);
323 321
324 /* 322 /*
325 * In case of error extending write may have instantiated a few 323 * In case of error extending write may have instantiated a few
326 * blocks outside i_size. Trim these off again. 324 * blocks outside i_size. Trim these off again.
327 */ 325 */
328 if (unlikely((rw & WRITE) && size < 0)) { 326 if (unlikely(iov_iter_rw(iter) == WRITE && size < 0)) {
329 loff_t isize = i_size_read(inode); 327 loff_t isize = i_size_read(inode);
330 loff_t end = offset + count; 328 loff_t end = offset + count;
331 329
@@ -443,21 +441,20 @@ struct inode *nilfs_new_inode(struct inode *dir, umode_t mode)
443void nilfs_set_inode_flags(struct inode *inode) 441void nilfs_set_inode_flags(struct inode *inode)
444{ 442{
445 unsigned int flags = NILFS_I(inode)->i_flags; 443 unsigned int flags = NILFS_I(inode)->i_flags;
444 unsigned int new_fl = 0;
446 445
447 inode->i_flags &= ~(S_SYNC | S_APPEND | S_IMMUTABLE | S_NOATIME |
448 S_DIRSYNC);
449 if (flags & FS_SYNC_FL) 446 if (flags & FS_SYNC_FL)
450 inode->i_flags |= S_SYNC; 447 new_fl |= S_SYNC;
451 if (flags & FS_APPEND_FL) 448 if (flags & FS_APPEND_FL)
452 inode->i_flags |= S_APPEND; 449 new_fl |= S_APPEND;
453 if (flags & FS_IMMUTABLE_FL) 450 if (flags & FS_IMMUTABLE_FL)
454 inode->i_flags |= S_IMMUTABLE; 451 new_fl |= S_IMMUTABLE;
455 if (flags & FS_NOATIME_FL) 452 if (flags & FS_NOATIME_FL)
456 inode->i_flags |= S_NOATIME; 453 new_fl |= S_NOATIME;
457 if (flags & FS_DIRSYNC_FL) 454 if (flags & FS_DIRSYNC_FL)
458 inode->i_flags |= S_DIRSYNC; 455 new_fl |= S_DIRSYNC;
459 mapping_set_gfp_mask(inode->i_mapping, 456 inode_set_flags(inode, new_fl, S_SYNC | S_APPEND | S_IMMUTABLE |
460 mapping_gfp_mask(inode->i_mapping) & ~__GFP_FS); 457 S_NOATIME | S_DIRSYNC);
461} 458}
462 459
463int nilfs_read_inode_common(struct inode *inode, 460int nilfs_read_inode_common(struct inode *inode,
@@ -542,6 +539,8 @@ static int __nilfs_read_inode(struct super_block *sb,
542 brelse(bh); 539 brelse(bh);
543 up_read(&NILFS_MDT(nilfs->ns_dat)->mi_sem); 540 up_read(&NILFS_MDT(nilfs->ns_dat)->mi_sem);
544 nilfs_set_inode_flags(inode); 541 nilfs_set_inode_flags(inode);
542 mapping_set_gfp_mask(inode->i_mapping,
543 mapping_gfp_mask(inode->i_mapping) & ~__GFP_FS);
545 return 0; 544 return 0;
546 545
547 failed_unmap: 546 failed_unmap:
@@ -714,7 +713,7 @@ void nilfs_update_inode(struct inode *inode, struct buffer_head *ibh, int flags)
714static void nilfs_truncate_bmap(struct nilfs_inode_info *ii, 713static void nilfs_truncate_bmap(struct nilfs_inode_info *ii,
715 unsigned long from) 714 unsigned long from)
716{ 715{
717 unsigned long b; 716 __u64 b;
718 int ret; 717 int ret;
719 718
720 if (!test_bit(NILFS_I_BMAP, &ii->i_state)) 719 if (!test_bit(NILFS_I_BMAP, &ii->i_state))
@@ -729,7 +728,7 @@ repeat:
729 if (b < from) 728 if (b < from)
730 return; 729 return;
731 730
732 b -= min_t(unsigned long, NILFS_MAX_TRUNCATE_BLOCKS, b - from); 731 b -= min_t(__u64, NILFS_MAX_TRUNCATE_BLOCKS, b - from);
733 ret = nilfs_bmap_truncate(ii->i_bmap, b); 732 ret = nilfs_bmap_truncate(ii->i_bmap, b);
734 nilfs_relax_pressure_in_lock(ii->vfs_inode.i_sb); 733 nilfs_relax_pressure_in_lock(ii->vfs_inode.i_sb);
735 if (!ret || (ret == -ENOMEM && 734 if (!ret || (ret == -ENOMEM &&
diff --git a/fs/nilfs2/mdt.c b/fs/nilfs2/mdt.c
index 892cf5ffdb8e..dee34d990281 100644
--- a/fs/nilfs2/mdt.c
+++ b/fs/nilfs2/mdt.c
@@ -261,6 +261,60 @@ int nilfs_mdt_get_block(struct inode *inode, unsigned long blkoff, int create,
261} 261}
262 262
263/** 263/**
264 * nilfs_mdt_find_block - find and get a buffer on meta data file.
265 * @inode: inode of the meta data file
266 * @start: start block offset (inclusive)
267 * @end: end block offset (inclusive)
268 * @blkoff: block offset
269 * @out_bh: place to store a pointer to buffer_head struct
270 *
271 * nilfs_mdt_find_block() looks up an existing block in range of
272 * [@start, @end] and stores pointer to a buffer head of the block to
273 * @out_bh, and block offset to @blkoff, respectively. @out_bh and
274 * @blkoff are substituted only when zero is returned.
275 *
276 * Return Value: On success, it returns 0. On error, the following negative
277 * error code is returned.
278 *
279 * %-ENOMEM - Insufficient memory available.
280 *
281 * %-EIO - I/O error
282 *
283 * %-ENOENT - no block was found in the range
284 */
285int nilfs_mdt_find_block(struct inode *inode, unsigned long start,
286 unsigned long end, unsigned long *blkoff,
287 struct buffer_head **out_bh)
288{
289 __u64 next;
290 int ret;
291
292 if (unlikely(start > end))
293 return -ENOENT;
294
295 ret = nilfs_mdt_read_block(inode, start, true, out_bh);
296 if (!ret) {
297 *blkoff = start;
298 goto out;
299 }
300 if (unlikely(ret != -ENOENT || start == ULONG_MAX))
301 goto out;
302
303 ret = nilfs_bmap_seek_key(NILFS_I(inode)->i_bmap, start + 1, &next);
304 if (!ret) {
305 if (next <= end) {
306 ret = nilfs_mdt_read_block(inode, next, true, out_bh);
307 if (!ret)
308 *blkoff = next;
309 } else {
310 ret = -ENOENT;
311 }
312 }
313out:
314 return ret;
315}
316
317/**
264 * nilfs_mdt_delete_block - make a hole on the meta data file. 318 * nilfs_mdt_delete_block - make a hole on the meta data file.
265 * @inode: inode of the meta data file 319 * @inode: inode of the meta data file
266 * @block: block offset 320 * @block: block offset
diff --git a/fs/nilfs2/mdt.h b/fs/nilfs2/mdt.h
index ab172e8549c5..fe529a87a208 100644
--- a/fs/nilfs2/mdt.h
+++ b/fs/nilfs2/mdt.h
@@ -78,6 +78,9 @@ int nilfs_mdt_get_block(struct inode *, unsigned long, int,
78 void (*init_block)(struct inode *, 78 void (*init_block)(struct inode *,
79 struct buffer_head *, void *), 79 struct buffer_head *, void *),
80 struct buffer_head **); 80 struct buffer_head **);
81int nilfs_mdt_find_block(struct inode *inode, unsigned long start,
82 unsigned long end, unsigned long *blkoff,
83 struct buffer_head **out_bh);
81int nilfs_mdt_delete_block(struct inode *, unsigned long); 84int nilfs_mdt_delete_block(struct inode *, unsigned long);
82int nilfs_mdt_forget_block(struct inode *, unsigned long); 85int nilfs_mdt_forget_block(struct inode *, unsigned long);
83int nilfs_mdt_mark_block_dirty(struct inode *, unsigned long); 86int nilfs_mdt_mark_block_dirty(struct inode *, unsigned long);
@@ -111,7 +114,10 @@ static inline __u64 nilfs_mdt_cno(struct inode *inode)
111 return ((struct the_nilfs *)inode->i_sb->s_fs_info)->ns_cno; 114 return ((struct the_nilfs *)inode->i_sb->s_fs_info)->ns_cno;
112} 115}
113 116
114#define nilfs_mdt_bgl_lock(inode, bg) \ 117static inline spinlock_t *
115 (&NILFS_MDT(inode)->mi_bgl->locks[(bg) & (NR_BG_LOCKS-1)].lock) 118nilfs_mdt_bgl_lock(struct inode *inode, unsigned int block_group)
119{
120 return bgl_lock_ptr(NILFS_MDT(inode)->mi_bgl, block_group);
121}
116 122
117#endif /* _NILFS_MDT_H */ 123#endif /* _NILFS_MDT_H */
diff --git a/fs/nilfs2/page.c b/fs/nilfs2/page.c
index 700ecbcca55d..45d650addd56 100644
--- a/fs/nilfs2/page.c
+++ b/fs/nilfs2/page.c
@@ -89,18 +89,16 @@ struct buffer_head *nilfs_grab_buffer(struct inode *inode,
89void nilfs_forget_buffer(struct buffer_head *bh) 89void nilfs_forget_buffer(struct buffer_head *bh)
90{ 90{
91 struct page *page = bh->b_page; 91 struct page *page = bh->b_page;
92 const unsigned long clear_bits =
93 (1 << BH_Uptodate | 1 << BH_Dirty | 1 << BH_Mapped |
94 1 << BH_Async_Write | 1 << BH_NILFS_Volatile |
95 1 << BH_NILFS_Checked | 1 << BH_NILFS_Redirected);
92 96
93 lock_buffer(bh); 97 lock_buffer(bh);
94 clear_buffer_nilfs_volatile(bh); 98 set_mask_bits(&bh->b_state, clear_bits, 0);
95 clear_buffer_nilfs_checked(bh);
96 clear_buffer_nilfs_redirected(bh);
97 clear_buffer_async_write(bh);
98 clear_buffer_dirty(bh);
99 if (nilfs_page_buffers_clean(page)) 99 if (nilfs_page_buffers_clean(page))
100 __nilfs_clear_page_dirty(page); 100 __nilfs_clear_page_dirty(page);
101 101
102 clear_buffer_uptodate(bh);
103 clear_buffer_mapped(bh);
104 bh->b_blocknr = -1; 102 bh->b_blocknr = -1;
105 ClearPageUptodate(page); 103 ClearPageUptodate(page);
106 ClearPageMappedToDisk(page); 104 ClearPageMappedToDisk(page);
@@ -421,6 +419,10 @@ void nilfs_clear_dirty_page(struct page *page, bool silent)
421 419
422 if (page_has_buffers(page)) { 420 if (page_has_buffers(page)) {
423 struct buffer_head *bh, *head; 421 struct buffer_head *bh, *head;
422 const unsigned long clear_bits =
423 (1 << BH_Uptodate | 1 << BH_Dirty | 1 << BH_Mapped |
424 1 << BH_Async_Write | 1 << BH_NILFS_Volatile |
425 1 << BH_NILFS_Checked | 1 << BH_NILFS_Redirected);
424 426
425 bh = head = page_buffers(page); 427 bh = head = page_buffers(page);
426 do { 428 do {
@@ -430,13 +432,7 @@ void nilfs_clear_dirty_page(struct page *page, bool silent)
430 "discard block %llu, size %zu", 432 "discard block %llu, size %zu",
431 (u64)bh->b_blocknr, bh->b_size); 433 (u64)bh->b_blocknr, bh->b_size);
432 } 434 }
433 clear_buffer_async_write(bh); 435 set_mask_bits(&bh->b_state, clear_bits, 0);
434 clear_buffer_dirty(bh);
435 clear_buffer_nilfs_volatile(bh);
436 clear_buffer_nilfs_checked(bh);
437 clear_buffer_nilfs_redirected(bh);
438 clear_buffer_uptodate(bh);
439 clear_buffer_mapped(bh);
440 unlock_buffer(bh); 436 unlock_buffer(bh);
441 } while (bh = bh->b_this_page, bh != head); 437 } while (bh = bh->b_this_page, bh != head);
442 } 438 }
diff --git a/fs/nilfs2/segment.c b/fs/nilfs2/segment.c
index 0c3f303baf32..c6abbad9b8e3 100644
--- a/fs/nilfs2/segment.c
+++ b/fs/nilfs2/segment.c
@@ -24,6 +24,7 @@
24#include <linux/pagemap.h> 24#include <linux/pagemap.h>
25#include <linux/buffer_head.h> 25#include <linux/buffer_head.h>
26#include <linux/writeback.h> 26#include <linux/writeback.h>
27#include <linux/bitops.h>
27#include <linux/bio.h> 28#include <linux/bio.h>
28#include <linux/completion.h> 29#include <linux/completion.h>
29#include <linux/blkdev.h> 30#include <linux/blkdev.h>
@@ -1588,7 +1589,6 @@ static void nilfs_segctor_prepare_write(struct nilfs_sc_info *sci)
1588 1589
1589 list_for_each_entry(bh, &segbuf->sb_segsum_buffers, 1590 list_for_each_entry(bh, &segbuf->sb_segsum_buffers,
1590 b_assoc_buffers) { 1591 b_assoc_buffers) {
1591 set_buffer_async_write(bh);
1592 if (bh->b_page != bd_page) { 1592 if (bh->b_page != bd_page) {
1593 if (bd_page) { 1593 if (bd_page) {
1594 lock_page(bd_page); 1594 lock_page(bd_page);
@@ -1688,7 +1688,6 @@ static void nilfs_abort_logs(struct list_head *logs, int err)
1688 list_for_each_entry(segbuf, logs, sb_list) { 1688 list_for_each_entry(segbuf, logs, sb_list) {
1689 list_for_each_entry(bh, &segbuf->sb_segsum_buffers, 1689 list_for_each_entry(bh, &segbuf->sb_segsum_buffers,
1690 b_assoc_buffers) { 1690 b_assoc_buffers) {
1691 clear_buffer_async_write(bh);
1692 if (bh->b_page != bd_page) { 1691 if (bh->b_page != bd_page) {
1693 if (bd_page) 1692 if (bd_page)
1694 end_page_writeback(bd_page); 1693 end_page_writeback(bd_page);
@@ -1768,7 +1767,6 @@ static void nilfs_segctor_complete_write(struct nilfs_sc_info *sci)
1768 b_assoc_buffers) { 1767 b_assoc_buffers) {
1769 set_buffer_uptodate(bh); 1768 set_buffer_uptodate(bh);
1770 clear_buffer_dirty(bh); 1769 clear_buffer_dirty(bh);
1771 clear_buffer_async_write(bh);
1772 if (bh->b_page != bd_page) { 1770 if (bh->b_page != bd_page) {
1773 if (bd_page) 1771 if (bd_page)
1774 end_page_writeback(bd_page); 1772 end_page_writeback(bd_page);
@@ -1788,12 +1786,13 @@ static void nilfs_segctor_complete_write(struct nilfs_sc_info *sci)
1788 */ 1786 */
1789 list_for_each_entry(bh, &segbuf->sb_payload_buffers, 1787 list_for_each_entry(bh, &segbuf->sb_payload_buffers,
1790 b_assoc_buffers) { 1788 b_assoc_buffers) {
1791 set_buffer_uptodate(bh); 1789 const unsigned long set_bits = (1 << BH_Uptodate);
1792 clear_buffer_dirty(bh); 1790 const unsigned long clear_bits =
1793 clear_buffer_async_write(bh); 1791 (1 << BH_Dirty | 1 << BH_Async_Write |
1794 clear_buffer_delay(bh); 1792 1 << BH_Delay | 1 << BH_NILFS_Volatile |
1795 clear_buffer_nilfs_volatile(bh); 1793 1 << BH_NILFS_Redirected);
1796 clear_buffer_nilfs_redirected(bh); 1794
1795 set_mask_bits(&bh->b_state, clear_bits, set_bits);
1797 if (bh == segbuf->sb_super_root) { 1796 if (bh == segbuf->sb_super_root) {
1798 if (bh->b_page != bd_page) { 1797 if (bh->b_page != bd_page) {
1799 end_page_writeback(bd_page); 1798 end_page_writeback(bd_page);
diff --git a/fs/nilfs2/super.c b/fs/nilfs2/super.c
index 5bc2a1cf73c3..c1725f20a9d1 100644
--- a/fs/nilfs2/super.c
+++ b/fs/nilfs2/super.c
@@ -1020,7 +1020,7 @@ int nilfs_checkpoint_is_mounted(struct super_block *sb, __u64 cno)
1020 struct dentry *dentry; 1020 struct dentry *dentry;
1021 int ret; 1021 int ret;
1022 1022
1023 if (cno < 0 || cno > nilfs->ns_cno) 1023 if (cno > nilfs->ns_cno)
1024 return false; 1024 return false;
1025 1025
1026 if (cno >= nilfs_last_cno(nilfs)) 1026 if (cno >= nilfs_last_cno(nilfs))
diff --git a/fs/ntfs/file.c b/fs/ntfs/file.c
index 840e95e3f1d2..7bb487e663b4 100644
--- a/fs/ntfs/file.c
+++ b/fs/ntfs/file.c
@@ -328,25 +328,25 @@ err_out:
328 return err; 328 return err;
329} 329}
330 330
331static ssize_t ntfs_prepare_file_for_write(struct file *file, loff_t *ppos, 331static ssize_t ntfs_prepare_file_for_write(struct kiocb *iocb,
332 size_t *count) 332 struct iov_iter *from)
333{ 333{
334 loff_t pos; 334 loff_t pos;
335 s64 end, ll; 335 s64 end, ll;
336 ssize_t err; 336 ssize_t err;
337 unsigned long flags; 337 unsigned long flags;
338 struct file *file = iocb->ki_filp;
338 struct inode *vi = file_inode(file); 339 struct inode *vi = file_inode(file);
339 ntfs_inode *base_ni, *ni = NTFS_I(vi); 340 ntfs_inode *base_ni, *ni = NTFS_I(vi);
340 ntfs_volume *vol = ni->vol; 341 ntfs_volume *vol = ni->vol;
341 342
342 ntfs_debug("Entering for i_ino 0x%lx, attribute type 0x%x, pos " 343 ntfs_debug("Entering for i_ino 0x%lx, attribute type 0x%x, pos "
343 "0x%llx, count 0x%lx.", vi->i_ino, 344 "0x%llx, count 0x%zx.", vi->i_ino,
344 (unsigned)le32_to_cpu(ni->type), 345 (unsigned)le32_to_cpu(ni->type),
345 (unsigned long long)*ppos, (unsigned long)*count); 346 (unsigned long long)iocb->ki_pos,
346 /* We can write back this queue in page reclaim. */ 347 iov_iter_count(from));
347 current->backing_dev_info = inode_to_bdi(vi); 348 err = generic_write_checks(iocb, from);
348 err = generic_write_checks(file, ppos, count, S_ISBLK(vi->i_mode)); 349 if (unlikely(err <= 0))
349 if (unlikely(err))
350 goto out; 350 goto out;
351 /* 351 /*
352 * All checks have passed. Before we start doing any writing we want 352 * All checks have passed. Before we start doing any writing we want
@@ -379,8 +379,6 @@ static ssize_t ntfs_prepare_file_for_write(struct file *file, loff_t *ppos,
379 err = -EOPNOTSUPP; 379 err = -EOPNOTSUPP;
380 goto out; 380 goto out;
381 } 381 }
382 if (*count == 0)
383 goto out;
384 base_ni = ni; 382 base_ni = ni;
385 if (NInoAttr(ni)) 383 if (NInoAttr(ni))
386 base_ni = ni->ext.base_ntfs_ino; 384 base_ni = ni->ext.base_ntfs_ino;
@@ -392,9 +390,9 @@ static ssize_t ntfs_prepare_file_for_write(struct file *file, loff_t *ppos,
392 * cannot fail either so there is no need to check the return code. 390 * cannot fail either so there is no need to check the return code.
393 */ 391 */
394 file_update_time(file); 392 file_update_time(file);
395 pos = *ppos; 393 pos = iocb->ki_pos;
396 /* The first byte after the last cluster being written to. */ 394 /* The first byte after the last cluster being written to. */
397 end = (pos + *count + vol->cluster_size_mask) & 395 end = (pos + iov_iter_count(from) + vol->cluster_size_mask) &
398 ~(u64)vol->cluster_size_mask; 396 ~(u64)vol->cluster_size_mask;
399 /* 397 /*
400 * If the write goes beyond the allocated size, extend the allocation 398 * If the write goes beyond the allocated size, extend the allocation
@@ -422,7 +420,7 @@ static ssize_t ntfs_prepare_file_for_write(struct file *file, loff_t *ppos,
422 "partially extended.", 420 "partially extended.",
423 vi->i_ino, (unsigned) 421 vi->i_ino, (unsigned)
424 le32_to_cpu(ni->type)); 422 le32_to_cpu(ni->type));
425 *count = ll - pos; 423 iov_iter_truncate(from, ll - pos);
426 } 424 }
427 } else { 425 } else {
428 err = ll; 426 err = ll;
@@ -438,7 +436,7 @@ static ssize_t ntfs_prepare_file_for_write(struct file *file, loff_t *ppos,
438 vi->i_ino, (unsigned) 436 vi->i_ino, (unsigned)
439 le32_to_cpu(ni->type), 437 le32_to_cpu(ni->type),
440 (int)-err); 438 (int)-err);
441 *count = ll - pos; 439 iov_iter_truncate(from, ll - pos);
442 } else { 440 } else {
443 if (err != -ENOSPC) 441 if (err != -ENOSPC)
444 ntfs_error(vi->i_sb, "Cannot perform " 442 ntfs_error(vi->i_sb, "Cannot perform "
@@ -1930,60 +1928,36 @@ again:
1930} 1928}
1931 1929
1932/** 1930/**
1933 * ntfs_file_write_iter_nolock - write data to a file
1934 * @iocb: IO state structure (file, offset, etc.)
1935 * @from: iov_iter with data to write
1936 *
1937 * Basically the same as __generic_file_write_iter() except that it ends
1938 * up calling ntfs_perform_write() instead of generic_perform_write() and that
1939 * O_DIRECT is not implemented.
1940 */
1941static ssize_t ntfs_file_write_iter_nolock(struct kiocb *iocb,
1942 struct iov_iter *from)
1943{
1944 struct file *file = iocb->ki_filp;
1945 loff_t pos = iocb->ki_pos;
1946 ssize_t written = 0;
1947 ssize_t err;
1948 size_t count = iov_iter_count(from);
1949
1950 err = ntfs_prepare_file_for_write(file, &pos, &count);
1951 if (count && !err) {
1952 iov_iter_truncate(from, count);
1953 written = ntfs_perform_write(file, from, pos);
1954 if (likely(written >= 0))
1955 iocb->ki_pos = pos + written;
1956 }
1957 current->backing_dev_info = NULL;
1958 return written ? written : err;
1959}
1960
1961/**
1962 * ntfs_file_write_iter - simple wrapper for ntfs_file_write_iter_nolock() 1931 * ntfs_file_write_iter - simple wrapper for ntfs_file_write_iter_nolock()
1963 * @iocb: IO state structure 1932 * @iocb: IO state structure
1964 * @from: iov_iter with data to write 1933 * @from: iov_iter with data to write
1965 * 1934 *
1966 * Basically the same as generic_file_write_iter() except that it ends up 1935 * Basically the same as generic_file_write_iter() except that it ends up
1967 * calling ntfs_file_write_iter_nolock() instead of 1936 * up calling ntfs_perform_write() instead of generic_perform_write() and that
1968 * __generic_file_write_iter(). 1937 * O_DIRECT is not implemented.
1969 */ 1938 */
1970static ssize_t ntfs_file_write_iter(struct kiocb *iocb, struct iov_iter *from) 1939static ssize_t ntfs_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
1971{ 1940{
1972 struct file *file = iocb->ki_filp; 1941 struct file *file = iocb->ki_filp;
1973 struct inode *vi = file_inode(file); 1942 struct inode *vi = file_inode(file);
1974 ssize_t ret; 1943 ssize_t written = 0;
1944 ssize_t err;
1975 1945
1976 mutex_lock(&vi->i_mutex); 1946 mutex_lock(&vi->i_mutex);
1977 ret = ntfs_file_write_iter_nolock(iocb, from); 1947 /* We can write back this queue in page reclaim. */
1948 current->backing_dev_info = inode_to_bdi(vi);
1949 err = ntfs_prepare_file_for_write(iocb, from);
1950 if (iov_iter_count(from) && !err)
1951 written = ntfs_perform_write(file, from, iocb->ki_pos);
1952 current->backing_dev_info = NULL;
1978 mutex_unlock(&vi->i_mutex); 1953 mutex_unlock(&vi->i_mutex);
1979 if (ret > 0) { 1954 if (likely(written > 0)) {
1980 ssize_t err; 1955 err = generic_write_sync(file, iocb->ki_pos, written);
1981
1982 err = generic_write_sync(file, iocb->ki_pos - ret, ret);
1983 if (err < 0) 1956 if (err < 0)
1984 ret = err; 1957 written = 0;
1985 } 1958 }
1986 return ret; 1959 iocb->ki_pos += written;
1960 return written ? written : err;
1987} 1961}
1988 1962
1989/** 1963/**
diff --git a/fs/ocfs2/aops.c b/fs/ocfs2/aops.c
index 8d2bc840c288..f906a250da6a 100644
--- a/fs/ocfs2/aops.c
+++ b/fs/ocfs2/aops.c
@@ -855,10 +855,9 @@ static ssize_t ocfs2_direct_IO_write(struct kiocb *iocb,
855 ocfs2_inode_unlock(inode, 1); 855 ocfs2_inode_unlock(inode, 1);
856 } 856 }
857 857
858 written = __blockdev_direct_IO(WRITE, iocb, inode, inode->i_sb->s_bdev, 858 written = __blockdev_direct_IO(iocb, inode, inode->i_sb->s_bdev, iter,
859 iter, offset, 859 offset, ocfs2_direct_IO_get_blocks,
860 ocfs2_direct_IO_get_blocks, 860 ocfs2_dio_end_io, NULL, 0);
861 ocfs2_dio_end_io, NULL, 0);
862 if (unlikely(written < 0)) { 861 if (unlikely(written < 0)) {
863 loff_t i_size = i_size_read(inode); 862 loff_t i_size = i_size_read(inode);
864 863
@@ -946,9 +945,7 @@ out:
946 return ret; 945 return ret;
947} 946}
948 947
949static ssize_t ocfs2_direct_IO(int rw, 948static ssize_t ocfs2_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
950 struct kiocb *iocb,
951 struct iov_iter *iter,
952 loff_t offset) 949 loff_t offset)
953{ 950{
954 struct file *file = iocb->ki_filp; 951 struct file *file = iocb->ki_filp;
@@ -970,12 +967,11 @@ static ssize_t ocfs2_direct_IO(int rw,
970 if (i_size_read(inode) <= offset && !full_coherency) 967 if (i_size_read(inode) <= offset && !full_coherency)
971 return 0; 968 return 0;
972 969
973 if (rw == READ) 970 if (iov_iter_rw(iter) == READ)
974 return __blockdev_direct_IO(rw, iocb, inode, 971 return __blockdev_direct_IO(iocb, inode, inode->i_sb->s_bdev,
975 inode->i_sb->s_bdev, 972 iter, offset,
976 iter, offset, 973 ocfs2_direct_IO_get_blocks,
977 ocfs2_direct_IO_get_blocks, 974 ocfs2_dio_end_io, NULL, 0);
978 ocfs2_dio_end_io, NULL, 0);
979 else 975 else
980 return ocfs2_direct_IO_write(iocb, iter, offset); 976 return ocfs2_direct_IO_write(iocb, iter, offset);
981} 977}
diff --git a/fs/ocfs2/file.c b/fs/ocfs2/file.c
index 8c48e989beba..913fc250d85a 100644
--- a/fs/ocfs2/file.c
+++ b/fs/ocfs2/file.c
@@ -2106,7 +2106,7 @@ out:
2106} 2106}
2107 2107
2108static int ocfs2_prepare_inode_for_write(struct file *file, 2108static int ocfs2_prepare_inode_for_write(struct file *file,
2109 loff_t *ppos, 2109 loff_t pos,
2110 size_t count, 2110 size_t count,
2111 int appending, 2111 int appending,
2112 int *direct_io, 2112 int *direct_io,
@@ -2115,7 +2115,7 @@ static int ocfs2_prepare_inode_for_write(struct file *file,
2115 int ret = 0, meta_level = 0; 2115 int ret = 0, meta_level = 0;
2116 struct dentry *dentry = file->f_path.dentry; 2116 struct dentry *dentry = file->f_path.dentry;
2117 struct inode *inode = dentry->d_inode; 2117 struct inode *inode = dentry->d_inode;
2118 loff_t saved_pos = 0, end; 2118 loff_t end;
2119 struct ocfs2_super *osb = OCFS2_SB(inode->i_sb); 2119 struct ocfs2_super *osb = OCFS2_SB(inode->i_sb);
2120 int full_coherency = !(osb->s_mount_opt & 2120 int full_coherency = !(osb->s_mount_opt &
2121 OCFS2_MOUNT_COHERENCY_BUFFERED); 2121 OCFS2_MOUNT_COHERENCY_BUFFERED);
@@ -2155,23 +2155,16 @@ static int ocfs2_prepare_inode_for_write(struct file *file,
2155 } 2155 }
2156 } 2156 }
2157 2157
2158 /* work on a copy of ppos until we're sure that we won't have 2158 end = pos + count;
2159 * to recalculate it due to relocking. */
2160 if (appending)
2161 saved_pos = i_size_read(inode);
2162 else
2163 saved_pos = *ppos;
2164
2165 end = saved_pos + count;
2166 2159
2167 ret = ocfs2_check_range_for_refcount(inode, saved_pos, count); 2160 ret = ocfs2_check_range_for_refcount(inode, pos, count);
2168 if (ret == 1) { 2161 if (ret == 1) {
2169 ocfs2_inode_unlock(inode, meta_level); 2162 ocfs2_inode_unlock(inode, meta_level);
2170 meta_level = -1; 2163 meta_level = -1;
2171 2164
2172 ret = ocfs2_prepare_inode_for_refcount(inode, 2165 ret = ocfs2_prepare_inode_for_refcount(inode,
2173 file, 2166 file,
2174 saved_pos, 2167 pos,
2175 count, 2168 count,
2176 &meta_level); 2169 &meta_level);
2177 if (has_refcount) 2170 if (has_refcount)
@@ -2227,7 +2220,7 @@ static int ocfs2_prepare_inode_for_write(struct file *file,
2227 * caller will have to retake some cluster 2220 * caller will have to retake some cluster
2228 * locks and initiate the io as buffered. 2221 * locks and initiate the io as buffered.
2229 */ 2222 */
2230 ret = ocfs2_check_range_for_holes(inode, saved_pos, count); 2223 ret = ocfs2_check_range_for_holes(inode, pos, count);
2231 if (ret == 1) { 2224 if (ret == 1) {
2232 /* 2225 /*
2233 * Fallback to old way if the feature bit is not set. 2226 * Fallback to old way if the feature bit is not set.
@@ -2242,12 +2235,9 @@ static int ocfs2_prepare_inode_for_write(struct file *file,
2242 break; 2235 break;
2243 } 2236 }
2244 2237
2245 if (appending)
2246 *ppos = saved_pos;
2247
2248out_unlock: 2238out_unlock:
2249 trace_ocfs2_prepare_inode_for_write(OCFS2_I(inode)->ip_blkno, 2239 trace_ocfs2_prepare_inode_for_write(OCFS2_I(inode)->ip_blkno,
2250 saved_pos, appending, count, 2240 pos, appending, count,
2251 direct_io, has_refcount); 2241 direct_io, has_refcount);
2252 2242
2253 if (meta_level >= 0) 2243 if (meta_level >= 0)
@@ -2260,19 +2250,20 @@ out:
2260static ssize_t ocfs2_file_write_iter(struct kiocb *iocb, 2250static ssize_t ocfs2_file_write_iter(struct kiocb *iocb,
2261 struct iov_iter *from) 2251 struct iov_iter *from)
2262{ 2252{
2263 int ret, direct_io, appending, rw_level, have_alloc_sem = 0; 2253 int direct_io, appending, rw_level, have_alloc_sem = 0;
2264 int can_do_direct, has_refcount = 0; 2254 int can_do_direct, has_refcount = 0;
2265 ssize_t written = 0; 2255 ssize_t written = 0;
2266 size_t count = iov_iter_count(from); 2256 ssize_t ret;
2267 loff_t old_size, *ppos = &iocb->ki_pos; 2257 size_t count = iov_iter_count(from), orig_count;
2258 loff_t old_size;
2268 u32 old_clusters; 2259 u32 old_clusters;
2269 struct file *file = iocb->ki_filp; 2260 struct file *file = iocb->ki_filp;
2270 struct inode *inode = file_inode(file); 2261 struct inode *inode = file_inode(file);
2271 struct address_space *mapping = file->f_mapping;
2272 struct ocfs2_super *osb = OCFS2_SB(inode->i_sb); 2262 struct ocfs2_super *osb = OCFS2_SB(inode->i_sb);
2273 int full_coherency = !(osb->s_mount_opt & 2263 int full_coherency = !(osb->s_mount_opt &
2274 OCFS2_MOUNT_COHERENCY_BUFFERED); 2264 OCFS2_MOUNT_COHERENCY_BUFFERED);
2275 int unaligned_dio = 0; 2265 int unaligned_dio = 0;
2266 int dropped_dio = 0;
2276 2267
2277 trace_ocfs2_file_aio_write(inode, file, file->f_path.dentry, 2268 trace_ocfs2_file_aio_write(inode, file, file->f_path.dentry,
2278 (unsigned long long)OCFS2_I(inode)->ip_blkno, 2269 (unsigned long long)OCFS2_I(inode)->ip_blkno,
@@ -2283,8 +2274,8 @@ static ssize_t ocfs2_file_write_iter(struct kiocb *iocb,
2283 if (count == 0) 2274 if (count == 0)
2284 return 0; 2275 return 0;
2285 2276
2286 appending = file->f_flags & O_APPEND ? 1 : 0; 2277 appending = iocb->ki_flags & IOCB_APPEND ? 1 : 0;
2287 direct_io = file->f_flags & O_DIRECT ? 1 : 0; 2278 direct_io = iocb->ki_flags & IOCB_DIRECT ? 1 : 0;
2288 2279
2289 mutex_lock(&inode->i_mutex); 2280 mutex_lock(&inode->i_mutex);
2290 2281
@@ -2329,8 +2320,17 @@ relock:
2329 ocfs2_inode_unlock(inode, 1); 2320 ocfs2_inode_unlock(inode, 1);
2330 } 2321 }
2331 2322
2323 orig_count = iov_iter_count(from);
2324 ret = generic_write_checks(iocb, from);
2325 if (ret <= 0) {
2326 if (ret)
2327 mlog_errno(ret);
2328 goto out;
2329 }
2330 count = ret;
2331
2332 can_do_direct = direct_io; 2332 can_do_direct = direct_io;
2333 ret = ocfs2_prepare_inode_for_write(file, ppos, count, appending, 2333 ret = ocfs2_prepare_inode_for_write(file, iocb->ki_pos, count, appending,
2334 &can_do_direct, &has_refcount); 2334 &can_do_direct, &has_refcount);
2335 if (ret < 0) { 2335 if (ret < 0) {
2336 mlog_errno(ret); 2336 mlog_errno(ret);
@@ -2338,7 +2338,7 @@ relock:
2338 } 2338 }
2339 2339
2340 if (direct_io && !is_sync_kiocb(iocb)) 2340 if (direct_io && !is_sync_kiocb(iocb))
2341 unaligned_dio = ocfs2_is_io_unaligned(inode, count, *ppos); 2341 unaligned_dio = ocfs2_is_io_unaligned(inode, count, iocb->ki_pos);
2342 2342
2343 /* 2343 /*
2344 * We can't complete the direct I/O as requested, fall back to 2344 * We can't complete the direct I/O as requested, fall back to
@@ -2351,6 +2351,9 @@ relock:
2351 rw_level = -1; 2351 rw_level = -1;
2352 2352
2353 direct_io = 0; 2353 direct_io = 0;
2354 iocb->ki_flags &= ~IOCB_DIRECT;
2355 iov_iter_reexpand(from, orig_count);
2356 dropped_dio = 1;
2354 goto relock; 2357 goto relock;
2355 } 2358 }
2356 2359
@@ -2374,74 +2377,15 @@ relock:
2374 /* communicate with ocfs2_dio_end_io */ 2377 /* communicate with ocfs2_dio_end_io */
2375 ocfs2_iocb_set_rw_locked(iocb, rw_level); 2378 ocfs2_iocb_set_rw_locked(iocb, rw_level);
2376 2379
2377 ret = generic_write_checks(file, ppos, &count, 2380 written = __generic_file_write_iter(iocb, from);
2378 S_ISBLK(inode->i_mode));
2379 if (ret)
2380 goto out_dio;
2381
2382 iov_iter_truncate(from, count);
2383 if (direct_io) {
2384 loff_t endbyte;
2385 ssize_t written_buffered;
2386 written = generic_file_direct_write(iocb, from, *ppos);
2387 if (written < 0 || written == count) {
2388 ret = written;
2389 goto out_dio;
2390 }
2391
2392 /*
2393 * for completing the rest of the request.
2394 */
2395 count -= written;
2396 written_buffered = generic_perform_write(file, from, *ppos);
2397 /*
2398 * If generic_file_buffered_write() returned a synchronous error
2399 * then we want to return the number of bytes which were
2400 * direct-written, or the error code if that was zero. Note
2401 * that this differs from normal direct-io semantics, which
2402 * will return -EFOO even if some bytes were written.
2403 */
2404 if (written_buffered < 0) {
2405 ret = written_buffered;
2406 goto out_dio;
2407 }
2408
2409 /* We need to ensure that the page cache pages are written to
2410 * disk and invalidated to preserve the expected O_DIRECT
2411 * semantics.
2412 */
2413 endbyte = *ppos + written_buffered - 1;
2414 ret = filemap_write_and_wait_range(file->f_mapping, *ppos,
2415 endbyte);
2416 if (ret == 0) {
2417 iocb->ki_pos = *ppos + written_buffered;
2418 written += written_buffered;
2419 invalidate_mapping_pages(mapping,
2420 *ppos >> PAGE_CACHE_SHIFT,
2421 endbyte >> PAGE_CACHE_SHIFT);
2422 } else {
2423 /*
2424 * We don't know how much we wrote, so just return
2425 * the number of bytes which were direct-written
2426 */
2427 }
2428 } else {
2429 current->backing_dev_info = inode_to_bdi(inode);
2430 written = generic_perform_write(file, from, *ppos);
2431 if (likely(written >= 0))
2432 iocb->ki_pos = *ppos + written;
2433 current->backing_dev_info = NULL;
2434 }
2435
2436out_dio:
2437 /* buffered aio wouldn't have proper lock coverage today */ 2381 /* buffered aio wouldn't have proper lock coverage today */
2438 BUG_ON(ret == -EIOCBQUEUED && !(file->f_flags & O_DIRECT)); 2382 BUG_ON(written == -EIOCBQUEUED && !(iocb->ki_flags & IOCB_DIRECT));
2439 2383
2440 if (unlikely(written <= 0)) 2384 if (unlikely(written <= 0))
2441 goto no_sync; 2385 goto no_sync;
2442 2386
2443 if (((file->f_flags & O_DSYNC) && !direct_io) || IS_SYNC(inode) || 2387 if (((file->f_flags & O_DSYNC) && !direct_io) ||
2444 ((file->f_flags & O_DIRECT) && !direct_io)) { 2388 IS_SYNC(inode) || dropped_dio) {
2445 ret = filemap_fdatawrite_range(file->f_mapping, 2389 ret = filemap_fdatawrite_range(file->f_mapping,
2446 iocb->ki_pos - written, 2390 iocb->ki_pos - written,
2447 iocb->ki_pos - 1); 2391 iocb->ki_pos - 1);
@@ -2552,7 +2496,7 @@ static ssize_t ocfs2_file_read_iter(struct kiocb *iocb,
2552 * buffered reads protect themselves in ->readpage(). O_DIRECT reads 2496 * buffered reads protect themselves in ->readpage(). O_DIRECT reads
2553 * need locks to protect pending reads from racing with truncate. 2497 * need locks to protect pending reads from racing with truncate.
2554 */ 2498 */
2555 if (filp->f_flags & O_DIRECT) { 2499 if (iocb->ki_flags & IOCB_DIRECT) {
2556 have_alloc_sem = 1; 2500 have_alloc_sem = 1;
2557 ocfs2_iocb_set_sem_locked(iocb); 2501 ocfs2_iocb_set_sem_locked(iocb);
2558 2502
@@ -2586,7 +2530,7 @@ static ssize_t ocfs2_file_read_iter(struct kiocb *iocb,
2586 trace_generic_file_aio_read_ret(ret); 2530 trace_generic_file_aio_read_ret(ret);
2587 2531
2588 /* buffered aio wouldn't have proper lock coverage today */ 2532 /* buffered aio wouldn't have proper lock coverage today */
2589 BUG_ON(ret == -EIOCBQUEUED && !(filp->f_flags & O_DIRECT)); 2533 BUG_ON(ret == -EIOCBQUEUED && !(iocb->ki_flags & IOCB_DIRECT));
2590 2534
2591 /* see ocfs2_file_write_iter */ 2535 /* see ocfs2_file_write_iter */
2592 if (ret == -EIOCBQUEUED || !ocfs2_iocb_is_rw_locked(iocb)) { 2536 if (ret == -EIOCBQUEUED || !ocfs2_iocb_is_rw_locked(iocb)) {
diff --git a/fs/proc/fd.c b/fs/proc/fd.c
index 8e5ad83b629a..af84ad04df77 100644
--- a/fs/proc/fd.c
+++ b/fs/proc/fd.c
@@ -8,6 +8,7 @@
8#include <linux/security.h> 8#include <linux/security.h>
9#include <linux/file.h> 9#include <linux/file.h>
10#include <linux/seq_file.h> 10#include <linux/seq_file.h>
11#include <linux/fs.h>
11 12
12#include <linux/proc_fs.h> 13#include <linux/proc_fs.h>
13 14
@@ -48,17 +49,23 @@ static int seq_show(struct seq_file *m, void *v)
48 put_files_struct(files); 49 put_files_struct(files);
49 } 50 }
50 51
51 if (!ret) { 52 if (ret)
52 seq_printf(m, "pos:\t%lli\nflags:\t0%o\nmnt_id:\t%i\n", 53 return ret;
53 (long long)file->f_pos, f_flags,
54 real_mount(file->f_path.mnt)->mnt_id);
55 if (file->f_op->show_fdinfo)
56 file->f_op->show_fdinfo(m, file);
57 ret = seq_has_overflowed(m);
58 fput(file);
59 }
60 54
61 return ret; 55 seq_printf(m, "pos:\t%lli\nflags:\t0%o\nmnt_id:\t%i\n",
56 (long long)file->f_pos, f_flags,
57 real_mount(file->f_path.mnt)->mnt_id);
58
59 show_fd_locks(m, file, files);
60 if (seq_has_overflowed(m))
61 goto out;
62
63 if (file->f_op->show_fdinfo)
64 file->f_op->show_fdinfo(m, file);
65
66out:
67 fput(file);
68 return 0;
62} 69}
63 70
64static int seq_fdinfo_open(struct inode *inode, struct file *file) 71static int seq_fdinfo_open(struct inode *inode, struct file *file)
diff --git a/fs/quota/dquot.c b/fs/quota/dquot.c
index 0ccd4ba3a246..ecc25cf0ee6e 100644
--- a/fs/quota/dquot.c
+++ b/fs/quota/dquot.c
@@ -900,14 +900,17 @@ static inline struct dquot **i_dquot(struct inode *inode)
900 900
901static int dqinit_needed(struct inode *inode, int type) 901static int dqinit_needed(struct inode *inode, int type)
902{ 902{
903 struct dquot * const *dquots;
903 int cnt; 904 int cnt;
904 905
905 if (IS_NOQUOTA(inode)) 906 if (IS_NOQUOTA(inode))
906 return 0; 907 return 0;
908
909 dquots = i_dquot(inode);
907 if (type != -1) 910 if (type != -1)
908 return !i_dquot(inode)[type]; 911 return !dquots[type];
909 for (cnt = 0; cnt < MAXQUOTAS; cnt++) 912 for (cnt = 0; cnt < MAXQUOTAS; cnt++)
910 if (!i_dquot(inode)[cnt]) 913 if (!dquots[cnt])
911 return 1; 914 return 1;
912 return 0; 915 return 0;
913} 916}
@@ -970,12 +973,13 @@ static void add_dquot_ref(struct super_block *sb, int type)
970static void remove_inode_dquot_ref(struct inode *inode, int type, 973static void remove_inode_dquot_ref(struct inode *inode, int type,
971 struct list_head *tofree_head) 974 struct list_head *tofree_head)
972{ 975{
973 struct dquot *dquot = i_dquot(inode)[type]; 976 struct dquot **dquots = i_dquot(inode);
977 struct dquot *dquot = dquots[type];
974 978
975 i_dquot(inode)[type] = NULL;
976 if (!dquot) 979 if (!dquot)
977 return; 980 return;
978 981
982 dquots[type] = NULL;
979 if (list_empty(&dquot->dq_free)) { 983 if (list_empty(&dquot->dq_free)) {
980 /* 984 /*
981 * The inode still has reference to dquot so it can't be in the 985 * The inode still has reference to dquot so it can't be in the
@@ -1159,8 +1163,8 @@ static int need_print_warning(struct dquot_warn *warn)
1159 return uid_eq(current_fsuid(), warn->w_dq_id.uid); 1163 return uid_eq(current_fsuid(), warn->w_dq_id.uid);
1160 case GRPQUOTA: 1164 case GRPQUOTA:
1161 return in_group_p(warn->w_dq_id.gid); 1165 return in_group_p(warn->w_dq_id.gid);
1162 case PRJQUOTA: /* Never taken... Just make gcc happy */ 1166 case PRJQUOTA:
1163 return 0; 1167 return 1;
1164 } 1168 }
1165 return 0; 1169 return 0;
1166} 1170}
@@ -1389,16 +1393,21 @@ static int dquot_active(const struct inode *inode)
1389static void __dquot_initialize(struct inode *inode, int type) 1393static void __dquot_initialize(struct inode *inode, int type)
1390{ 1394{
1391 int cnt, init_needed = 0; 1395 int cnt, init_needed = 0;
1392 struct dquot *got[MAXQUOTAS]; 1396 struct dquot **dquots, *got[MAXQUOTAS];
1393 struct super_block *sb = inode->i_sb; 1397 struct super_block *sb = inode->i_sb;
1394 qsize_t rsv; 1398 qsize_t rsv;
1395 1399
1396 if (!dquot_active(inode)) 1400 if (!dquot_active(inode))
1397 return; 1401 return;
1398 1402
1403 dquots = i_dquot(inode);
1404
1399 /* First get references to structures we might need. */ 1405 /* First get references to structures we might need. */
1400 for (cnt = 0; cnt < MAXQUOTAS; cnt++) { 1406 for (cnt = 0; cnt < MAXQUOTAS; cnt++) {
1401 struct kqid qid; 1407 struct kqid qid;
1408 kprojid_t projid;
1409 int rc;
1410
1402 got[cnt] = NULL; 1411 got[cnt] = NULL;
1403 if (type != -1 && cnt != type) 1412 if (type != -1 && cnt != type)
1404 continue; 1413 continue;
@@ -1407,8 +1416,12 @@ static void __dquot_initialize(struct inode *inode, int type)
1407 * we check it without locking here to avoid unnecessary 1416 * we check it without locking here to avoid unnecessary
1408 * dqget()/dqput() calls. 1417 * dqget()/dqput() calls.
1409 */ 1418 */
1410 if (i_dquot(inode)[cnt]) 1419 if (dquots[cnt])
1420 continue;
1421
1422 if (!sb_has_quota_active(sb, cnt))
1411 continue; 1423 continue;
1424
1412 init_needed = 1; 1425 init_needed = 1;
1413 1426
1414 switch (cnt) { 1427 switch (cnt) {
@@ -1418,6 +1431,12 @@ static void __dquot_initialize(struct inode *inode, int type)
1418 case GRPQUOTA: 1431 case GRPQUOTA:
1419 qid = make_kqid_gid(inode->i_gid); 1432 qid = make_kqid_gid(inode->i_gid);
1420 break; 1433 break;
1434 case PRJQUOTA:
1435 rc = inode->i_sb->dq_op->get_projid(inode, &projid);
1436 if (rc)
1437 continue;
1438 qid = make_kqid_projid(projid);
1439 break;
1421 } 1440 }
1422 got[cnt] = dqget(sb, qid); 1441 got[cnt] = dqget(sb, qid);
1423 } 1442 }
@@ -1438,8 +1457,8 @@ static void __dquot_initialize(struct inode *inode, int type)
1438 /* We could race with quotaon or dqget() could have failed */ 1457 /* We could race with quotaon or dqget() could have failed */
1439 if (!got[cnt]) 1458 if (!got[cnt])
1440 continue; 1459 continue;
1441 if (!i_dquot(inode)[cnt]) { 1460 if (!dquots[cnt]) {
1442 i_dquot(inode)[cnt] = got[cnt]; 1461 dquots[cnt] = got[cnt];
1443 got[cnt] = NULL; 1462 got[cnt] = NULL;
1444 /* 1463 /*
1445 * Make quota reservation system happy if someone 1464 * Make quota reservation system happy if someone
@@ -1447,7 +1466,7 @@ static void __dquot_initialize(struct inode *inode, int type)
1447 */ 1466 */
1448 rsv = inode_get_rsv_space(inode); 1467 rsv = inode_get_rsv_space(inode);
1449 if (unlikely(rsv)) 1468 if (unlikely(rsv))
1450 dquot_resv_space(i_dquot(inode)[cnt], rsv); 1469 dquot_resv_space(dquots[cnt], rsv);
1451 } 1470 }
1452 } 1471 }
1453out_err: 1472out_err:
@@ -1473,12 +1492,13 @@ EXPORT_SYMBOL(dquot_initialize);
1473static void __dquot_drop(struct inode *inode) 1492static void __dquot_drop(struct inode *inode)
1474{ 1493{
1475 int cnt; 1494 int cnt;
1495 struct dquot **dquots = i_dquot(inode);
1476 struct dquot *put[MAXQUOTAS]; 1496 struct dquot *put[MAXQUOTAS];
1477 1497
1478 spin_lock(&dq_data_lock); 1498 spin_lock(&dq_data_lock);
1479 for (cnt = 0; cnt < MAXQUOTAS; cnt++) { 1499 for (cnt = 0; cnt < MAXQUOTAS; cnt++) {
1480 put[cnt] = i_dquot(inode)[cnt]; 1500 put[cnt] = dquots[cnt];
1481 i_dquot(inode)[cnt] = NULL; 1501 dquots[cnt] = NULL;
1482 } 1502 }
1483 spin_unlock(&dq_data_lock); 1503 spin_unlock(&dq_data_lock);
1484 dqput_all(put); 1504 dqput_all(put);
@@ -1486,6 +1506,7 @@ static void __dquot_drop(struct inode *inode)
1486 1506
1487void dquot_drop(struct inode *inode) 1507void dquot_drop(struct inode *inode)
1488{ 1508{
1509 struct dquot * const *dquots;
1489 int cnt; 1510 int cnt;
1490 1511
1491 if (IS_NOQUOTA(inode)) 1512 if (IS_NOQUOTA(inode))
@@ -1498,8 +1519,9 @@ void dquot_drop(struct inode *inode)
1498 * must assure that nobody can come after the DQUOT_DROP and 1519 * must assure that nobody can come after the DQUOT_DROP and
1499 * add quota pointers back anyway. 1520 * add quota pointers back anyway.
1500 */ 1521 */
1522 dquots = i_dquot(inode);
1501 for (cnt = 0; cnt < MAXQUOTAS; cnt++) { 1523 for (cnt = 0; cnt < MAXQUOTAS; cnt++) {
1502 if (i_dquot(inode)[cnt]) 1524 if (dquots[cnt])
1503 break; 1525 break;
1504 } 1526 }
1505 1527
@@ -1600,8 +1622,8 @@ int __dquot_alloc_space(struct inode *inode, qsize_t number, int flags)
1600{ 1622{
1601 int cnt, ret = 0, index; 1623 int cnt, ret = 0, index;
1602 struct dquot_warn warn[MAXQUOTAS]; 1624 struct dquot_warn warn[MAXQUOTAS];
1603 struct dquot **dquots = i_dquot(inode);
1604 int reserve = flags & DQUOT_SPACE_RESERVE; 1625 int reserve = flags & DQUOT_SPACE_RESERVE;
1626 struct dquot **dquots;
1605 1627
1606 if (!dquot_active(inode)) { 1628 if (!dquot_active(inode)) {
1607 inode_incr_space(inode, number, reserve); 1629 inode_incr_space(inode, number, reserve);
@@ -1611,6 +1633,7 @@ int __dquot_alloc_space(struct inode *inode, qsize_t number, int flags)
1611 for (cnt = 0; cnt < MAXQUOTAS; cnt++) 1633 for (cnt = 0; cnt < MAXQUOTAS; cnt++)
1612 warn[cnt].w_type = QUOTA_NL_NOWARN; 1634 warn[cnt].w_type = QUOTA_NL_NOWARN;
1613 1635
1636 dquots = i_dquot(inode);
1614 index = srcu_read_lock(&dquot_srcu); 1637 index = srcu_read_lock(&dquot_srcu);
1615 spin_lock(&dq_data_lock); 1638 spin_lock(&dq_data_lock);
1616 for (cnt = 0; cnt < MAXQUOTAS; cnt++) { 1639 for (cnt = 0; cnt < MAXQUOTAS; cnt++) {
@@ -1652,13 +1675,14 @@ int dquot_alloc_inode(struct inode *inode)
1652{ 1675{
1653 int cnt, ret = 0, index; 1676 int cnt, ret = 0, index;
1654 struct dquot_warn warn[MAXQUOTAS]; 1677 struct dquot_warn warn[MAXQUOTAS];
1655 struct dquot * const *dquots = i_dquot(inode); 1678 struct dquot * const *dquots;
1656 1679
1657 if (!dquot_active(inode)) 1680 if (!dquot_active(inode))
1658 return 0; 1681 return 0;
1659 for (cnt = 0; cnt < MAXQUOTAS; cnt++) 1682 for (cnt = 0; cnt < MAXQUOTAS; cnt++)
1660 warn[cnt].w_type = QUOTA_NL_NOWARN; 1683 warn[cnt].w_type = QUOTA_NL_NOWARN;
1661 1684
1685 dquots = i_dquot(inode);
1662 index = srcu_read_lock(&dquot_srcu); 1686 index = srcu_read_lock(&dquot_srcu);
1663 spin_lock(&dq_data_lock); 1687 spin_lock(&dq_data_lock);
1664 for (cnt = 0; cnt < MAXQUOTAS; cnt++) { 1688 for (cnt = 0; cnt < MAXQUOTAS; cnt++) {
@@ -1690,6 +1714,7 @@ EXPORT_SYMBOL(dquot_alloc_inode);
1690 */ 1714 */
1691int dquot_claim_space_nodirty(struct inode *inode, qsize_t number) 1715int dquot_claim_space_nodirty(struct inode *inode, qsize_t number)
1692{ 1716{
1717 struct dquot **dquots;
1693 int cnt, index; 1718 int cnt, index;
1694 1719
1695 if (!dquot_active(inode)) { 1720 if (!dquot_active(inode)) {
@@ -1697,18 +1722,18 @@ int dquot_claim_space_nodirty(struct inode *inode, qsize_t number)
1697 return 0; 1722 return 0;
1698 } 1723 }
1699 1724
1725 dquots = i_dquot(inode);
1700 index = srcu_read_lock(&dquot_srcu); 1726 index = srcu_read_lock(&dquot_srcu);
1701 spin_lock(&dq_data_lock); 1727 spin_lock(&dq_data_lock);
1702 /* Claim reserved quotas to allocated quotas */ 1728 /* Claim reserved quotas to allocated quotas */
1703 for (cnt = 0; cnt < MAXQUOTAS; cnt++) { 1729 for (cnt = 0; cnt < MAXQUOTAS; cnt++) {
1704 if (i_dquot(inode)[cnt]) 1730 if (dquots[cnt])
1705 dquot_claim_reserved_space(i_dquot(inode)[cnt], 1731 dquot_claim_reserved_space(dquots[cnt], number);
1706 number);
1707 } 1732 }
1708 /* Update inode bytes */ 1733 /* Update inode bytes */
1709 inode_claim_rsv_space(inode, number); 1734 inode_claim_rsv_space(inode, number);
1710 spin_unlock(&dq_data_lock); 1735 spin_unlock(&dq_data_lock);
1711 mark_all_dquot_dirty(i_dquot(inode)); 1736 mark_all_dquot_dirty(dquots);
1712 srcu_read_unlock(&dquot_srcu, index); 1737 srcu_read_unlock(&dquot_srcu, index);
1713 return 0; 1738 return 0;
1714} 1739}
@@ -1719,6 +1744,7 @@ EXPORT_SYMBOL(dquot_claim_space_nodirty);
1719 */ 1744 */
1720void dquot_reclaim_space_nodirty(struct inode *inode, qsize_t number) 1745void dquot_reclaim_space_nodirty(struct inode *inode, qsize_t number)
1721{ 1746{
1747 struct dquot **dquots;
1722 int cnt, index; 1748 int cnt, index;
1723 1749
1724 if (!dquot_active(inode)) { 1750 if (!dquot_active(inode)) {
@@ -1726,18 +1752,18 @@ void dquot_reclaim_space_nodirty(struct inode *inode, qsize_t number)
1726 return; 1752 return;
1727 } 1753 }
1728 1754
1755 dquots = i_dquot(inode);
1729 index = srcu_read_lock(&dquot_srcu); 1756 index = srcu_read_lock(&dquot_srcu);
1730 spin_lock(&dq_data_lock); 1757 spin_lock(&dq_data_lock);
1731 /* Claim reserved quotas to allocated quotas */ 1758 /* Claim reserved quotas to allocated quotas */
1732 for (cnt = 0; cnt < MAXQUOTAS; cnt++) { 1759 for (cnt = 0; cnt < MAXQUOTAS; cnt++) {
1733 if (i_dquot(inode)[cnt]) 1760 if (dquots[cnt])
1734 dquot_reclaim_reserved_space(i_dquot(inode)[cnt], 1761 dquot_reclaim_reserved_space(dquots[cnt], number);
1735 number);
1736 } 1762 }
1737 /* Update inode bytes */ 1763 /* Update inode bytes */
1738 inode_reclaim_rsv_space(inode, number); 1764 inode_reclaim_rsv_space(inode, number);
1739 spin_unlock(&dq_data_lock); 1765 spin_unlock(&dq_data_lock);
1740 mark_all_dquot_dirty(i_dquot(inode)); 1766 mark_all_dquot_dirty(dquots);
1741 srcu_read_unlock(&dquot_srcu, index); 1767 srcu_read_unlock(&dquot_srcu, index);
1742 return; 1768 return;
1743} 1769}
@@ -1750,7 +1776,7 @@ void __dquot_free_space(struct inode *inode, qsize_t number, int flags)
1750{ 1776{
1751 unsigned int cnt; 1777 unsigned int cnt;
1752 struct dquot_warn warn[MAXQUOTAS]; 1778 struct dquot_warn warn[MAXQUOTAS];
1753 struct dquot **dquots = i_dquot(inode); 1779 struct dquot **dquots;
1754 int reserve = flags & DQUOT_SPACE_RESERVE, index; 1780 int reserve = flags & DQUOT_SPACE_RESERVE, index;
1755 1781
1756 if (!dquot_active(inode)) { 1782 if (!dquot_active(inode)) {
@@ -1758,6 +1784,7 @@ void __dquot_free_space(struct inode *inode, qsize_t number, int flags)
1758 return; 1784 return;
1759 } 1785 }
1760 1786
1787 dquots = i_dquot(inode);
1761 index = srcu_read_lock(&dquot_srcu); 1788 index = srcu_read_lock(&dquot_srcu);
1762 spin_lock(&dq_data_lock); 1789 spin_lock(&dq_data_lock);
1763 for (cnt = 0; cnt < MAXQUOTAS; cnt++) { 1790 for (cnt = 0; cnt < MAXQUOTAS; cnt++) {
@@ -1793,12 +1820,13 @@ void dquot_free_inode(struct inode *inode)
1793{ 1820{
1794 unsigned int cnt; 1821 unsigned int cnt;
1795 struct dquot_warn warn[MAXQUOTAS]; 1822 struct dquot_warn warn[MAXQUOTAS];
1796 struct dquot * const *dquots = i_dquot(inode); 1823 struct dquot * const *dquots;
1797 int index; 1824 int index;
1798 1825
1799 if (!dquot_active(inode)) 1826 if (!dquot_active(inode))
1800 return; 1827 return;
1801 1828
1829 dquots = i_dquot(inode);
1802 index = srcu_read_lock(&dquot_srcu); 1830 index = srcu_read_lock(&dquot_srcu);
1803 spin_lock(&dq_data_lock); 1831 spin_lock(&dq_data_lock);
1804 for (cnt = 0; cnt < MAXQUOTAS; cnt++) { 1832 for (cnt = 0; cnt < MAXQUOTAS; cnt++) {
@@ -2161,7 +2189,8 @@ static int vfs_load_quota_inode(struct inode *inode, int type, int format_id,
2161 error = -EROFS; 2189 error = -EROFS;
2162 goto out_fmt; 2190 goto out_fmt;
2163 } 2191 }
2164 if (!sb->s_op->quota_write || !sb->s_op->quota_read) { 2192 if (!sb->s_op->quota_write || !sb->s_op->quota_read ||
2193 (type == PRJQUOTA && sb->dq_op->get_projid == NULL)) {
2165 error = -EINVAL; 2194 error = -EINVAL;
2166 goto out_fmt; 2195 goto out_fmt;
2167 } 2196 }
@@ -2614,55 +2643,73 @@ out:
2614EXPORT_SYMBOL(dquot_set_dqblk); 2643EXPORT_SYMBOL(dquot_set_dqblk);
2615 2644
2616/* Generic routine for getting common part of quota file information */ 2645/* Generic routine for getting common part of quota file information */
2617int dquot_get_dqinfo(struct super_block *sb, int type, struct if_dqinfo *ii) 2646int dquot_get_state(struct super_block *sb, struct qc_state *state)
2618{ 2647{
2619 struct mem_dqinfo *mi; 2648 struct mem_dqinfo *mi;
2649 struct qc_type_state *tstate;
2650 struct quota_info *dqopt = sb_dqopt(sb);
2651 int type;
2620 2652
2621 mutex_lock(&sb_dqopt(sb)->dqonoff_mutex); 2653 mutex_lock(&sb_dqopt(sb)->dqonoff_mutex);
2622 if (!sb_has_quota_active(sb, type)) { 2654 memset(state, 0, sizeof(*state));
2623 mutex_unlock(&sb_dqopt(sb)->dqonoff_mutex); 2655 for (type = 0; type < MAXQUOTAS; type++) {
2624 return -ESRCH; 2656 if (!sb_has_quota_active(sb, type))
2657 continue;
2658 tstate = state->s_state + type;
2659 mi = sb_dqopt(sb)->info + type;
2660 tstate->flags = QCI_ACCT_ENABLED;
2661 spin_lock(&dq_data_lock);
2662 if (mi->dqi_flags & DQF_SYS_FILE)
2663 tstate->flags |= QCI_SYSFILE;
2664 if (mi->dqi_flags & DQF_ROOT_SQUASH)
2665 tstate->flags |= QCI_ROOT_SQUASH;
2666 if (sb_has_quota_limits_enabled(sb, type))
2667 tstate->flags |= QCI_LIMITS_ENFORCED;
2668 tstate->spc_timelimit = mi->dqi_bgrace;
2669 tstate->ino_timelimit = mi->dqi_igrace;
2670 tstate->ino = dqopt->files[type]->i_ino;
2671 tstate->blocks = dqopt->files[type]->i_blocks;
2672 tstate->nextents = 1; /* We don't know... */
2673 spin_unlock(&dq_data_lock);
2625 } 2674 }
2626 mi = sb_dqopt(sb)->info + type;
2627 spin_lock(&dq_data_lock);
2628 ii->dqi_bgrace = mi->dqi_bgrace;
2629 ii->dqi_igrace = mi->dqi_igrace;
2630 ii->dqi_flags = mi->dqi_flags & DQF_GETINFO_MASK;
2631 ii->dqi_valid = IIF_ALL;
2632 spin_unlock(&dq_data_lock);
2633 mutex_unlock(&sb_dqopt(sb)->dqonoff_mutex); 2675 mutex_unlock(&sb_dqopt(sb)->dqonoff_mutex);
2634 return 0; 2676 return 0;
2635} 2677}
2636EXPORT_SYMBOL(dquot_get_dqinfo); 2678EXPORT_SYMBOL(dquot_get_state);
2637 2679
2638/* Generic routine for setting common part of quota file information */ 2680/* Generic routine for setting common part of quota file information */
2639int dquot_set_dqinfo(struct super_block *sb, int type, struct if_dqinfo *ii) 2681int dquot_set_dqinfo(struct super_block *sb, int type, struct qc_info *ii)
2640{ 2682{
2641 struct mem_dqinfo *mi; 2683 struct mem_dqinfo *mi;
2642 int err = 0; 2684 int err = 0;
2643 2685
2686 if ((ii->i_fieldmask & QC_WARNS_MASK) ||
2687 (ii->i_fieldmask & QC_RT_SPC_TIMER))
2688 return -EINVAL;
2644 mutex_lock(&sb_dqopt(sb)->dqonoff_mutex); 2689 mutex_lock(&sb_dqopt(sb)->dqonoff_mutex);
2645 if (!sb_has_quota_active(sb, type)) { 2690 if (!sb_has_quota_active(sb, type)) {
2646 err = -ESRCH; 2691 err = -ESRCH;
2647 goto out; 2692 goto out;
2648 } 2693 }
2649 mi = sb_dqopt(sb)->info + type; 2694 mi = sb_dqopt(sb)->info + type;
2650 if (ii->dqi_valid & IIF_FLAGS) { 2695 if (ii->i_fieldmask & QC_FLAGS) {
2651 if (ii->dqi_flags & ~DQF_SETINFO_MASK || 2696 if ((ii->i_flags & QCI_ROOT_SQUASH &&
2652 (ii->dqi_flags & DQF_ROOT_SQUASH &&
2653 mi->dqi_format->qf_fmt_id != QFMT_VFS_OLD)) { 2697 mi->dqi_format->qf_fmt_id != QFMT_VFS_OLD)) {
2654 err = -EINVAL; 2698 err = -EINVAL;
2655 goto out; 2699 goto out;
2656 } 2700 }
2657 } 2701 }
2658 spin_lock(&dq_data_lock); 2702 spin_lock(&dq_data_lock);
2659 if (ii->dqi_valid & IIF_BGRACE) 2703 if (ii->i_fieldmask & QC_SPC_TIMER)
2660 mi->dqi_bgrace = ii->dqi_bgrace; 2704 mi->dqi_bgrace = ii->i_spc_timelimit;
2661 if (ii->dqi_valid & IIF_IGRACE) 2705 if (ii->i_fieldmask & QC_INO_TIMER)
2662 mi->dqi_igrace = ii->dqi_igrace; 2706 mi->dqi_igrace = ii->i_ino_timelimit;
2663 if (ii->dqi_valid & IIF_FLAGS) 2707 if (ii->i_fieldmask & QC_FLAGS) {
2664 mi->dqi_flags = (mi->dqi_flags & ~DQF_SETINFO_MASK) | 2708 if (ii->i_flags & QCI_ROOT_SQUASH)
2665 (ii->dqi_flags & DQF_SETINFO_MASK); 2709 mi->dqi_flags |= DQF_ROOT_SQUASH;
2710 else
2711 mi->dqi_flags &= ~DQF_ROOT_SQUASH;
2712 }
2666 spin_unlock(&dq_data_lock); 2713 spin_unlock(&dq_data_lock);
2667 mark_info_dirty(sb, type); 2714 mark_info_dirty(sb, type);
2668 /* Force write to disk */ 2715 /* Force write to disk */
@@ -2677,7 +2724,7 @@ const struct quotactl_ops dquot_quotactl_ops = {
2677 .quota_on = dquot_quota_on, 2724 .quota_on = dquot_quota_on,
2678 .quota_off = dquot_quota_off, 2725 .quota_off = dquot_quota_off,
2679 .quota_sync = dquot_quota_sync, 2726 .quota_sync = dquot_quota_sync,
2680 .get_info = dquot_get_dqinfo, 2727 .get_state = dquot_get_state,
2681 .set_info = dquot_set_dqinfo, 2728 .set_info = dquot_set_dqinfo,
2682 .get_dqblk = dquot_get_dqblk, 2729 .get_dqblk = dquot_get_dqblk,
2683 .set_dqblk = dquot_set_dqblk 2730 .set_dqblk = dquot_set_dqblk
@@ -2688,7 +2735,7 @@ const struct quotactl_ops dquot_quotactl_sysfile_ops = {
2688 .quota_enable = dquot_quota_enable, 2735 .quota_enable = dquot_quota_enable,
2689 .quota_disable = dquot_quota_disable, 2736 .quota_disable = dquot_quota_disable,
2690 .quota_sync = dquot_quota_sync, 2737 .quota_sync = dquot_quota_sync,
2691 .get_info = dquot_get_dqinfo, 2738 .get_state = dquot_get_state,
2692 .set_info = dquot_set_dqinfo, 2739 .set_info = dquot_set_dqinfo,
2693 .get_dqblk = dquot_get_dqblk, 2740 .get_dqblk = dquot_get_dqblk,
2694 .set_dqblk = dquot_set_dqblk 2741 .set_dqblk = dquot_set_dqblk
diff --git a/fs/quota/quota.c b/fs/quota/quota.c
index d14a799c7785..86ded7375c21 100644
--- a/fs/quota/quota.c
+++ b/fs/quota/quota.c
@@ -118,13 +118,30 @@ static int quota_getfmt(struct super_block *sb, int type, void __user *addr)
118 118
119static int quota_getinfo(struct super_block *sb, int type, void __user *addr) 119static int quota_getinfo(struct super_block *sb, int type, void __user *addr)
120{ 120{
121 struct if_dqinfo info; 121 struct qc_state state;
122 struct qc_type_state *tstate;
123 struct if_dqinfo uinfo;
122 int ret; 124 int ret;
123 125
124 if (!sb->s_qcop->get_info) 126 /* This checks whether qc_state has enough entries... */
127 BUILD_BUG_ON(MAXQUOTAS > XQM_MAXQUOTAS);
128 if (!sb->s_qcop->get_state)
125 return -ENOSYS; 129 return -ENOSYS;
126 ret = sb->s_qcop->get_info(sb, type, &info); 130 ret = sb->s_qcop->get_state(sb, &state);
127 if (!ret && copy_to_user(addr, &info, sizeof(info))) 131 if (ret)
132 return ret;
133 tstate = state.s_state + type;
134 if (!(tstate->flags & QCI_ACCT_ENABLED))
135 return -ESRCH;
136 memset(&uinfo, 0, sizeof(uinfo));
137 uinfo.dqi_bgrace = tstate->spc_timelimit;
138 uinfo.dqi_igrace = tstate->ino_timelimit;
139 if (tstate->flags & QCI_SYSFILE)
140 uinfo.dqi_flags |= DQF_SYS_FILE;
141 if (tstate->flags & QCI_ROOT_SQUASH)
142 uinfo.dqi_flags |= DQF_ROOT_SQUASH;
143 uinfo.dqi_valid = IIF_ALL;
144 if (!ret && copy_to_user(addr, &uinfo, sizeof(uinfo)))
128 return -EFAULT; 145 return -EFAULT;
129 return ret; 146 return ret;
130} 147}
@@ -132,12 +149,31 @@ static int quota_getinfo(struct super_block *sb, int type, void __user *addr)
132static int quota_setinfo(struct super_block *sb, int type, void __user *addr) 149static int quota_setinfo(struct super_block *sb, int type, void __user *addr)
133{ 150{
134 struct if_dqinfo info; 151 struct if_dqinfo info;
152 struct qc_info qinfo;
135 153
136 if (copy_from_user(&info, addr, sizeof(info))) 154 if (copy_from_user(&info, addr, sizeof(info)))
137 return -EFAULT; 155 return -EFAULT;
138 if (!sb->s_qcop->set_info) 156 if (!sb->s_qcop->set_info)
139 return -ENOSYS; 157 return -ENOSYS;
140 return sb->s_qcop->set_info(sb, type, &info); 158 if (info.dqi_valid & ~(IIF_FLAGS | IIF_BGRACE | IIF_IGRACE))
159 return -EINVAL;
160 memset(&qinfo, 0, sizeof(qinfo));
161 if (info.dqi_valid & IIF_FLAGS) {
162 if (info.dqi_flags & ~DQF_SETINFO_MASK)
163 return -EINVAL;
164 if (info.dqi_flags & DQF_ROOT_SQUASH)
165 qinfo.i_flags |= QCI_ROOT_SQUASH;
166 qinfo.i_fieldmask |= QC_FLAGS;
167 }
168 if (info.dqi_valid & IIF_BGRACE) {
169 qinfo.i_spc_timelimit = info.dqi_bgrace;
170 qinfo.i_fieldmask |= QC_SPC_TIMER;
171 }
172 if (info.dqi_valid & IIF_IGRACE) {
173 qinfo.i_ino_timelimit = info.dqi_igrace;
174 qinfo.i_fieldmask |= QC_INO_TIMER;
175 }
176 return sb->s_qcop->set_info(sb, type, &qinfo);
141} 177}
142 178
143static inline qsize_t qbtos(qsize_t blocks) 179static inline qsize_t qbtos(qsize_t blocks)
@@ -252,25 +288,149 @@ static int quota_disable(struct super_block *sb, void __user *addr)
252 return sb->s_qcop->quota_disable(sb, flags); 288 return sb->s_qcop->quota_disable(sb, flags);
253} 289}
254 290
291static int quota_state_to_flags(struct qc_state *state)
292{
293 int flags = 0;
294
295 if (state->s_state[USRQUOTA].flags & QCI_ACCT_ENABLED)
296 flags |= FS_QUOTA_UDQ_ACCT;
297 if (state->s_state[USRQUOTA].flags & QCI_LIMITS_ENFORCED)
298 flags |= FS_QUOTA_UDQ_ENFD;
299 if (state->s_state[GRPQUOTA].flags & QCI_ACCT_ENABLED)
300 flags |= FS_QUOTA_GDQ_ACCT;
301 if (state->s_state[GRPQUOTA].flags & QCI_LIMITS_ENFORCED)
302 flags |= FS_QUOTA_GDQ_ENFD;
303 if (state->s_state[PRJQUOTA].flags & QCI_ACCT_ENABLED)
304 flags |= FS_QUOTA_PDQ_ACCT;
305 if (state->s_state[PRJQUOTA].flags & QCI_LIMITS_ENFORCED)
306 flags |= FS_QUOTA_PDQ_ENFD;
307 return flags;
308}
309
310static int quota_getstate(struct super_block *sb, struct fs_quota_stat *fqs)
311{
312 int type;
313 struct qc_state state;
314 int ret;
315
316 ret = sb->s_qcop->get_state(sb, &state);
317 if (ret < 0)
318 return ret;
319
320 memset(fqs, 0, sizeof(*fqs));
321 fqs->qs_version = FS_QSTAT_VERSION;
322 fqs->qs_flags = quota_state_to_flags(&state);
323 /* No quota enabled? */
324 if (!fqs->qs_flags)
325 return -ENOSYS;
326 fqs->qs_incoredqs = state.s_incoredqs;
327 /*
328 * GETXSTATE quotactl has space for just one set of time limits so
329 * report them for the first enabled quota type
330 */
331 for (type = 0; type < XQM_MAXQUOTAS; type++)
332 if (state.s_state[type].flags & QCI_ACCT_ENABLED)
333 break;
334 BUG_ON(type == XQM_MAXQUOTAS);
335 fqs->qs_btimelimit = state.s_state[type].spc_timelimit;
336 fqs->qs_itimelimit = state.s_state[type].ino_timelimit;
337 fqs->qs_rtbtimelimit = state.s_state[type].rt_spc_timelimit;
338 fqs->qs_bwarnlimit = state.s_state[type].spc_warnlimit;
339 fqs->qs_iwarnlimit = state.s_state[type].ino_warnlimit;
340 if (state.s_state[USRQUOTA].flags & QCI_ACCT_ENABLED) {
341 fqs->qs_uquota.qfs_ino = state.s_state[USRQUOTA].ino;
342 fqs->qs_uquota.qfs_nblks = state.s_state[USRQUOTA].blocks;
343 fqs->qs_uquota.qfs_nextents = state.s_state[USRQUOTA].nextents;
344 }
345 if (state.s_state[GRPQUOTA].flags & QCI_ACCT_ENABLED) {
346 fqs->qs_gquota.qfs_ino = state.s_state[GRPQUOTA].ino;
347 fqs->qs_gquota.qfs_nblks = state.s_state[GRPQUOTA].blocks;
348 fqs->qs_gquota.qfs_nextents = state.s_state[GRPQUOTA].nextents;
349 }
350 if (state.s_state[PRJQUOTA].flags & QCI_ACCT_ENABLED) {
351 /*
352 * Q_XGETQSTAT doesn't have room for both group and project
353 * quotas. So, allow the project quota values to be copied out
354 * only if there is no group quota information available.
355 */
356 if (!(state.s_state[GRPQUOTA].flags & QCI_ACCT_ENABLED)) {
357 fqs->qs_gquota.qfs_ino = state.s_state[PRJQUOTA].ino;
358 fqs->qs_gquota.qfs_nblks =
359 state.s_state[PRJQUOTA].blocks;
360 fqs->qs_gquota.qfs_nextents =
361 state.s_state[PRJQUOTA].nextents;
362 }
363 }
364 return 0;
365}
366
255static int quota_getxstate(struct super_block *sb, void __user *addr) 367static int quota_getxstate(struct super_block *sb, void __user *addr)
256{ 368{
257 struct fs_quota_stat fqs; 369 struct fs_quota_stat fqs;
258 int ret; 370 int ret;
259 371
260 if (!sb->s_qcop->get_xstate) 372 if (!sb->s_qcop->get_state)
261 return -ENOSYS; 373 return -ENOSYS;
262 ret = sb->s_qcop->get_xstate(sb, &fqs); 374 ret = quota_getstate(sb, &fqs);
263 if (!ret && copy_to_user(addr, &fqs, sizeof(fqs))) 375 if (!ret && copy_to_user(addr, &fqs, sizeof(fqs)))
264 return -EFAULT; 376 return -EFAULT;
265 return ret; 377 return ret;
266} 378}
267 379
380static int quota_getstatev(struct super_block *sb, struct fs_quota_statv *fqs)
381{
382 int type;
383 struct qc_state state;
384 int ret;
385
386 ret = sb->s_qcop->get_state(sb, &state);
387 if (ret < 0)
388 return ret;
389
390 memset(fqs, 0, sizeof(*fqs));
391 fqs->qs_version = FS_QSTAT_VERSION;
392 fqs->qs_flags = quota_state_to_flags(&state);
393 /* No quota enabled? */
394 if (!fqs->qs_flags)
395 return -ENOSYS;
396 fqs->qs_incoredqs = state.s_incoredqs;
397 /*
398 * GETXSTATV quotactl has space for just one set of time limits so
399 * report them for the first enabled quota type
400 */
401 for (type = 0; type < XQM_MAXQUOTAS; type++)
402 if (state.s_state[type].flags & QCI_ACCT_ENABLED)
403 break;
404 BUG_ON(type == XQM_MAXQUOTAS);
405 fqs->qs_btimelimit = state.s_state[type].spc_timelimit;
406 fqs->qs_itimelimit = state.s_state[type].ino_timelimit;
407 fqs->qs_rtbtimelimit = state.s_state[type].rt_spc_timelimit;
408 fqs->qs_bwarnlimit = state.s_state[type].spc_warnlimit;
409 fqs->qs_iwarnlimit = state.s_state[type].ino_warnlimit;
410 if (state.s_state[USRQUOTA].flags & QCI_ACCT_ENABLED) {
411 fqs->qs_uquota.qfs_ino = state.s_state[USRQUOTA].ino;
412 fqs->qs_uquota.qfs_nblks = state.s_state[USRQUOTA].blocks;
413 fqs->qs_uquota.qfs_nextents = state.s_state[USRQUOTA].nextents;
414 }
415 if (state.s_state[GRPQUOTA].flags & QCI_ACCT_ENABLED) {
416 fqs->qs_gquota.qfs_ino = state.s_state[GRPQUOTA].ino;
417 fqs->qs_gquota.qfs_nblks = state.s_state[GRPQUOTA].blocks;
418 fqs->qs_gquota.qfs_nextents = state.s_state[GRPQUOTA].nextents;
419 }
420 if (state.s_state[PRJQUOTA].flags & QCI_ACCT_ENABLED) {
421 fqs->qs_pquota.qfs_ino = state.s_state[PRJQUOTA].ino;
422 fqs->qs_pquota.qfs_nblks = state.s_state[PRJQUOTA].blocks;
423 fqs->qs_pquota.qfs_nextents = state.s_state[PRJQUOTA].nextents;
424 }
425 return 0;
426}
427
268static int quota_getxstatev(struct super_block *sb, void __user *addr) 428static int quota_getxstatev(struct super_block *sb, void __user *addr)
269{ 429{
270 struct fs_quota_statv fqs; 430 struct fs_quota_statv fqs;
271 int ret; 431 int ret;
272 432
273 if (!sb->s_qcop->get_xstatev) 433 if (!sb->s_qcop->get_state)
274 return -ENOSYS; 434 return -ENOSYS;
275 435
276 memset(&fqs, 0, sizeof(fqs)); 436 memset(&fqs, 0, sizeof(fqs));
@@ -284,7 +444,7 @@ static int quota_getxstatev(struct super_block *sb, void __user *addr)
284 default: 444 default:
285 return -EINVAL; 445 return -EINVAL;
286 } 446 }
287 ret = sb->s_qcop->get_xstatev(sb, &fqs); 447 ret = quota_getstatev(sb, &fqs);
288 if (!ret && copy_to_user(addr, &fqs, sizeof(fqs))) 448 if (!ret && copy_to_user(addr, &fqs, sizeof(fqs)))
289 return -EFAULT; 449 return -EFAULT;
290 return ret; 450 return ret;
@@ -357,6 +517,30 @@ static void copy_from_xfs_dqblk(struct qc_dqblk *dst, struct fs_disk_quota *src)
357 dst->d_fieldmask |= QC_RT_SPACE; 517 dst->d_fieldmask |= QC_RT_SPACE;
358} 518}
359 519
520static void copy_qcinfo_from_xfs_dqblk(struct qc_info *dst,
521 struct fs_disk_quota *src)
522{
523 memset(dst, 0, sizeof(*dst));
524 dst->i_spc_timelimit = src->d_btimer;
525 dst->i_ino_timelimit = src->d_itimer;
526 dst->i_rt_spc_timelimit = src->d_rtbtimer;
527 dst->i_ino_warnlimit = src->d_iwarns;
528 dst->i_spc_warnlimit = src->d_bwarns;
529 dst->i_rt_spc_warnlimit = src->d_rtbwarns;
530 if (src->d_fieldmask & FS_DQ_BWARNS)
531 dst->i_fieldmask |= QC_SPC_WARNS;
532 if (src->d_fieldmask & FS_DQ_IWARNS)
533 dst->i_fieldmask |= QC_INO_WARNS;
534 if (src->d_fieldmask & FS_DQ_RTBWARNS)
535 dst->i_fieldmask |= QC_RT_SPC_WARNS;
536 if (src->d_fieldmask & FS_DQ_BTIMER)
537 dst->i_fieldmask |= QC_SPC_TIMER;
538 if (src->d_fieldmask & FS_DQ_ITIMER)
539 dst->i_fieldmask |= QC_INO_TIMER;
540 if (src->d_fieldmask & FS_DQ_RTBTIMER)
541 dst->i_fieldmask |= QC_RT_SPC_TIMER;
542}
543
360static int quota_setxquota(struct super_block *sb, int type, qid_t id, 544static int quota_setxquota(struct super_block *sb, int type, qid_t id,
361 void __user *addr) 545 void __user *addr)
362{ 546{
@@ -371,6 +555,21 @@ static int quota_setxquota(struct super_block *sb, int type, qid_t id,
371 qid = make_kqid(current_user_ns(), type, id); 555 qid = make_kqid(current_user_ns(), type, id);
372 if (!qid_valid(qid)) 556 if (!qid_valid(qid))
373 return -EINVAL; 557 return -EINVAL;
558 /* Are we actually setting timer / warning limits for all users? */
559 if (from_kqid(&init_user_ns, qid) == 0 &&
560 fdq.d_fieldmask & (FS_DQ_WARNS_MASK | FS_DQ_TIMER_MASK)) {
561 struct qc_info qinfo;
562 int ret;
563
564 if (!sb->s_qcop->set_info)
565 return -EINVAL;
566 copy_qcinfo_from_xfs_dqblk(&qinfo, &fdq);
567 ret = sb->s_qcop->set_info(sb, type, &qinfo);
568 if (ret)
569 return ret;
570 /* These are already done */
571 fdq.d_fieldmask &= ~(FS_DQ_WARNS_MASK | FS_DQ_TIMER_MASK);
572 }
374 copy_from_xfs_dqblk(&qdq, &fdq); 573 copy_from_xfs_dqblk(&qdq, &fdq);
375 return sb->s_qcop->set_dqblk(sb, qid, &qdq); 574 return sb->s_qcop->set_dqblk(sb, qid, &qdq);
376} 575}
diff --git a/fs/quota/quota_tree.c b/fs/quota/quota_tree.c
index d65877fbe8f4..58efb83dec1c 100644
--- a/fs/quota/quota_tree.c
+++ b/fs/quota/quota_tree.c
@@ -349,6 +349,13 @@ static inline int dq_insert_tree(struct qtree_mem_dqinfo *info,
349 struct dquot *dquot) 349 struct dquot *dquot)
350{ 350{
351 int tmp = QT_TREEOFF; 351 int tmp = QT_TREEOFF;
352
353#ifdef __QUOTA_QT_PARANOIA
354 if (info->dqi_blocks <= QT_TREEOFF) {
355 quota_error(dquot->dq_sb, "Quota tree root isn't allocated!");
356 return -EIO;
357 }
358#endif
352 return do_insert_tree(info, dquot, &tmp, 0); 359 return do_insert_tree(info, dquot, &tmp, 0);
353} 360}
354 361
diff --git a/fs/quota/quota_v2.c b/fs/quota/quota_v2.c
index 9cb10d7197f7..2aa012a68e90 100644
--- a/fs/quota/quota_v2.c
+++ b/fs/quota/quota_v2.c
@@ -117,12 +117,16 @@ static int v2_read_file_info(struct super_block *sb, int type)
117 qinfo = info->dqi_priv; 117 qinfo = info->dqi_priv;
118 if (version == 0) { 118 if (version == 0) {
119 /* limits are stored as unsigned 32-bit data */ 119 /* limits are stored as unsigned 32-bit data */
120 info->dqi_max_spc_limit = 0xffffffffULL << QUOTABLOCK_BITS; 120 info->dqi_max_spc_limit = 0xffffffffLL << QUOTABLOCK_BITS;
121 info->dqi_max_ino_limit = 0xffffffff; 121 info->dqi_max_ino_limit = 0xffffffff;
122 } else { 122 } else {
123 /* used space is stored as unsigned 64-bit value in bytes */ 123 /*
124 info->dqi_max_spc_limit = 0xffffffffffffffffULL; /* 2^64-1 */ 124 * Used space is stored as unsigned 64-bit value in bytes but
125 info->dqi_max_ino_limit = 0xffffffffffffffffULL; 125 * quota core supports only signed 64-bit values so use that
126 * as a limit
127 */
128 info->dqi_max_spc_limit = 0x7fffffffffffffffLL; /* 2^63-1 */
129 info->dqi_max_ino_limit = 0x7fffffffffffffffLL;
126 } 130 }
127 info->dqi_bgrace = le32_to_cpu(dinfo.dqi_bgrace); 131 info->dqi_bgrace = le32_to_cpu(dinfo.dqi_bgrace);
128 info->dqi_igrace = le32_to_cpu(dinfo.dqi_igrace); 132 info->dqi_igrace = le32_to_cpu(dinfo.dqi_igrace);
diff --git a/fs/quota/quotaio_v2.h b/fs/quota/quotaio_v2.h
index f1966b42c2fd..4e95430093d9 100644
--- a/fs/quota/quotaio_v2.h
+++ b/fs/quota/quotaio_v2.h
@@ -13,12 +13,14 @@
13 */ 13 */
14#define V2_INITQMAGICS {\ 14#define V2_INITQMAGICS {\
15 0xd9c01f11, /* USRQUOTA */\ 15 0xd9c01f11, /* USRQUOTA */\
16 0xd9c01927 /* GRPQUOTA */\ 16 0xd9c01927, /* GRPQUOTA */\
17 0xd9c03f14, /* PRJQUOTA */\
17} 18}
18 19
19#define V2_INITQVERSIONS {\ 20#define V2_INITQVERSIONS {\
20 1, /* USRQUOTA */\ 21 1, /* USRQUOTA */\
21 1 /* GRPQUOTA */\ 22 1, /* GRPQUOTA */\
23 1, /* PRJQUOTA */\
22} 24}
23 25
24/* First generic header */ 26/* First generic header */
diff --git a/fs/read_write.c b/fs/read_write.c
index 45d583c33879..819ef3faf1bb 100644
--- a/fs/read_write.c
+++ b/fs/read_write.c
@@ -477,7 +477,8 @@ static ssize_t new_sync_write(struct file *filp, const char __user *buf, size_t
477 477
478 ret = filp->f_op->write_iter(&kiocb, &iter); 478 ret = filp->f_op->write_iter(&kiocb, &iter);
479 BUG_ON(ret == -EIOCBQUEUED); 479 BUG_ON(ret == -EIOCBQUEUED);
480 *ppos = kiocb.ki_pos; 480 if (ret > 0)
481 *ppos = kiocb.ki_pos;
481 return ret; 482 return ret;
482} 483}
483 484
diff --git a/fs/reiserfs/inode.c b/fs/reiserfs/inode.c
index 9312b7842e03..742242b60972 100644
--- a/fs/reiserfs/inode.c
+++ b/fs/reiserfs/inode.c
@@ -3278,22 +3278,22 @@ static int reiserfs_releasepage(struct page *page, gfp_t unused_gfp_flags)
3278 * We thank Mingming Cao for helping us understand in great detail what 3278 * We thank Mingming Cao for helping us understand in great detail what
3279 * to do in this section of the code. 3279 * to do in this section of the code.
3280 */ 3280 */
3281static ssize_t reiserfs_direct_IO(int rw, struct kiocb *iocb, 3281static ssize_t reiserfs_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
3282 struct iov_iter *iter, loff_t offset) 3282 loff_t offset)
3283{ 3283{
3284 struct file *file = iocb->ki_filp; 3284 struct file *file = iocb->ki_filp;
3285 struct inode *inode = file->f_mapping->host; 3285 struct inode *inode = file->f_mapping->host;
3286 size_t count = iov_iter_count(iter); 3286 size_t count = iov_iter_count(iter);
3287 ssize_t ret; 3287 ssize_t ret;
3288 3288
3289 ret = blockdev_direct_IO(rw, iocb, inode, iter, offset, 3289 ret = blockdev_direct_IO(iocb, inode, iter, offset,
3290 reiserfs_get_blocks_direct_io); 3290 reiserfs_get_blocks_direct_io);
3291 3291
3292 /* 3292 /*
3293 * In case of error extending write may have instantiated a few 3293 * In case of error extending write may have instantiated a few
3294 * blocks outside i_size. Trim these off again. 3294 * blocks outside i_size. Trim these off again.
3295 */ 3295 */
3296 if (unlikely((rw & WRITE) && ret < 0)) { 3296 if (unlikely(iov_iter_rw(iter) == WRITE && ret < 0)) {
3297 loff_t isize = i_size_read(inode); 3297 loff_t isize = i_size_read(inode);
3298 loff_t end = offset + count; 3298 loff_t end = offset + count;
3299 3299
diff --git a/fs/reiserfs/reiserfs.h b/fs/reiserfs/reiserfs.h
index bb79cddf0a1f..2adcde137c3f 100644
--- a/fs/reiserfs/reiserfs.h
+++ b/fs/reiserfs/reiserfs.h
@@ -910,7 +910,6 @@ do { \
910 if (!(cond)) \ 910 if (!(cond)) \
911 reiserfs_panic(NULL, "assertion failure", "(" #cond ") at " \ 911 reiserfs_panic(NULL, "assertion failure", "(" #cond ") at " \
912 __FILE__ ":%i:%s: " format "\n", \ 912 __FILE__ ":%i:%s: " format "\n", \
913 in_interrupt() ? -1 : task_pid_nr(current), \
914 __LINE__, __func__ , ##args); \ 913 __LINE__, __func__ , ##args); \
915} while (0) 914} while (0)
916 915
diff --git a/fs/reiserfs/super.c b/fs/reiserfs/super.c
index 71fbbe3e2dab..68b5f182984e 100644
--- a/fs/reiserfs/super.c
+++ b/fs/reiserfs/super.c
@@ -805,7 +805,7 @@ static const struct quotactl_ops reiserfs_qctl_operations = {
805 .quota_on = reiserfs_quota_on, 805 .quota_on = reiserfs_quota_on,
806 .quota_off = dquot_quota_off, 806 .quota_off = dquot_quota_off,
807 .quota_sync = dquot_quota_sync, 807 .quota_sync = dquot_quota_sync,
808 .get_info = dquot_get_dqinfo, 808 .get_state = dquot_get_state,
809 .set_info = dquot_set_dqinfo, 809 .set_info = dquot_set_dqinfo,
810 .get_dqblk = dquot_get_dqblk, 810 .get_dqblk = dquot_get_dqblk,
811 .set_dqblk = dquot_set_dqblk, 811 .set_dqblk = dquot_set_dqblk,
diff --git a/fs/udf/balloc.c b/fs/udf/balloc.c
index 1ba2baaf4367..6d6a96b4e73f 100644
--- a/fs/udf/balloc.c
+++ b/fs/udf/balloc.c
@@ -21,7 +21,6 @@
21 21
22#include "udfdecl.h" 22#include "udfdecl.h"
23 23
24#include <linux/buffer_head.h>
25#include <linux/bitops.h> 24#include <linux/bitops.h>
26 25
27#include "udf_i.h" 26#include "udf_i.h"
@@ -63,15 +62,14 @@ static int __load_block_bitmap(struct super_block *sb,
63 block_group, nr_groups); 62 block_group, nr_groups);
64 } 63 }
65 64
66 if (bitmap->s_block_bitmap[block_group]) { 65 if (bitmap->s_block_bitmap[block_group])
67 return block_group; 66 return block_group;
68 } else { 67
69 retval = read_block_bitmap(sb, bitmap, block_group, 68 retval = read_block_bitmap(sb, bitmap, block_group, block_group);
70 block_group); 69 if (retval < 0)
71 if (retval < 0) 70 return retval;
72 return retval; 71
73 return block_group; 72 return block_group;
74 }
75} 73}
76 74
77static inline int load_block_bitmap(struct super_block *sb, 75static inline int load_block_bitmap(struct super_block *sb,
@@ -358,7 +356,6 @@ static void udf_table_free_blocks(struct super_block *sb,
358 struct kernel_lb_addr eloc; 356 struct kernel_lb_addr eloc;
359 struct extent_position oepos, epos; 357 struct extent_position oepos, epos;
360 int8_t etype; 358 int8_t etype;
361 int i;
362 struct udf_inode_info *iinfo; 359 struct udf_inode_info *iinfo;
363 360
364 mutex_lock(&sbi->s_alloc_mutex); 361 mutex_lock(&sbi->s_alloc_mutex);
@@ -425,7 +422,6 @@ static void udf_table_free_blocks(struct super_block *sb,
425 } 422 }
426 423
427 if (epos.bh != oepos.bh) { 424 if (epos.bh != oepos.bh) {
428 i = -1;
429 oepos.block = epos.block; 425 oepos.block = epos.block;
430 brelse(oepos.bh); 426 brelse(oepos.bh);
431 get_bh(epos.bh); 427 get_bh(epos.bh);
@@ -762,7 +758,7 @@ inline int udf_prealloc_blocks(struct super_block *sb,
762 uint32_t block_count) 758 uint32_t block_count)
763{ 759{
764 struct udf_part_map *map = &UDF_SB(sb)->s_partmaps[partition]; 760 struct udf_part_map *map = &UDF_SB(sb)->s_partmaps[partition];
765 sector_t allocated; 761 int allocated;
766 762
767 if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_BITMAP) 763 if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_BITMAP)
768 allocated = udf_bitmap_prealloc_blocks(sb, 764 allocated = udf_bitmap_prealloc_blocks(sb,
diff --git a/fs/udf/dir.c b/fs/udf/dir.c
index 05e90edd1992..541a12b5792d 100644
--- a/fs/udf/dir.c
+++ b/fs/udf/dir.c
@@ -30,7 +30,6 @@
30#include <linux/errno.h> 30#include <linux/errno.h>
31#include <linux/mm.h> 31#include <linux/mm.h>
32#include <linux/slab.h> 32#include <linux/slab.h>
33#include <linux/buffer_head.h>
34 33
35#include "udf_i.h" 34#include "udf_i.h"
36#include "udf_sb.h" 35#include "udf_sb.h"
diff --git a/fs/udf/directory.c b/fs/udf/directory.c
index 3e44f575fb9c..c763fda257bf 100644
--- a/fs/udf/directory.c
+++ b/fs/udf/directory.c
@@ -16,7 +16,6 @@
16 16
17#include <linux/fs.h> 17#include <linux/fs.h>
18#include <linux/string.h> 18#include <linux/string.h>
19#include <linux/buffer_head.h>
20 19
21struct fileIdentDesc *udf_fileident_read(struct inode *dir, loff_t *nf_pos, 20struct fileIdentDesc *udf_fileident_read(struct inode *dir, loff_t *nf_pos,
22 struct udf_fileident_bh *fibh, 21 struct udf_fileident_bh *fibh,
diff --git a/fs/udf/file.c b/fs/udf/file.c
index 74050bff64f4..5dadad9960b9 100644
--- a/fs/udf/file.c
+++ b/fs/udf/file.c
@@ -33,7 +33,6 @@
33#include <linux/capability.h> 33#include <linux/capability.h>
34#include <linux/errno.h> 34#include <linux/errno.h>
35#include <linux/pagemap.h> 35#include <linux/pagemap.h>
36#include <linux/buffer_head.h>
37#include <linux/uio.h> 36#include <linux/uio.h>
38 37
39#include "udf_i.h" 38#include "udf_i.h"
@@ -100,8 +99,7 @@ static int udf_adinicb_write_begin(struct file *file,
100 return 0; 99 return 0;
101} 100}
102 101
103static ssize_t udf_adinicb_direct_IO(int rw, struct kiocb *iocb, 102static ssize_t udf_adinicb_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
104 struct iov_iter *iter,
105 loff_t offset) 103 loff_t offset)
106{ 104{
107 /* Fallback to buffered I/O. */ 105 /* Fallback to buffered I/O. */
@@ -121,21 +119,21 @@ static ssize_t udf_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
121 ssize_t retval; 119 ssize_t retval;
122 struct file *file = iocb->ki_filp; 120 struct file *file = iocb->ki_filp;
123 struct inode *inode = file_inode(file); 121 struct inode *inode = file_inode(file);
124 int err, pos;
125 size_t count = iov_iter_count(from);
126 struct udf_inode_info *iinfo = UDF_I(inode); 122 struct udf_inode_info *iinfo = UDF_I(inode);
123 int err;
127 124
128 mutex_lock(&inode->i_mutex); 125 mutex_lock(&inode->i_mutex);
126
127 retval = generic_write_checks(iocb, from);
128 if (retval <= 0)
129 goto out;
130
129 down_write(&iinfo->i_data_sem); 131 down_write(&iinfo->i_data_sem);
130 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB) { 132 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB) {
131 if (file->f_flags & O_APPEND) 133 loff_t end = iocb->ki_pos + iov_iter_count(from);
132 pos = inode->i_size;
133 else
134 pos = iocb->ki_pos;
135 134
136 if (inode->i_sb->s_blocksize < 135 if (inode->i_sb->s_blocksize <
137 (udf_file_entry_alloc_offset(inode) + 136 (udf_file_entry_alloc_offset(inode) + end)) {
138 pos + count)) {
139 err = udf_expand_file_adinicb(inode); 137 err = udf_expand_file_adinicb(inode);
140 if (err) { 138 if (err) {
141 mutex_unlock(&inode->i_mutex); 139 mutex_unlock(&inode->i_mutex);
@@ -143,16 +141,14 @@ static ssize_t udf_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
143 return err; 141 return err;
144 } 142 }
145 } else { 143 } else {
146 if (pos + count > inode->i_size) 144 iinfo->i_lenAlloc = max(end, inode->i_size);
147 iinfo->i_lenAlloc = pos + count;
148 else
149 iinfo->i_lenAlloc = inode->i_size;
150 up_write(&iinfo->i_data_sem); 145 up_write(&iinfo->i_data_sem);
151 } 146 }
152 } else 147 } else
153 up_write(&iinfo->i_data_sem); 148 up_write(&iinfo->i_data_sem);
154 149
155 retval = __generic_file_write_iter(iocb, from); 150 retval = __generic_file_write_iter(iocb, from);
151out:
156 mutex_unlock(&inode->i_mutex); 152 mutex_unlock(&inode->i_mutex);
157 153
158 if (retval > 0) { 154 if (retval > 0) {
diff --git a/fs/udf/inode.c b/fs/udf/inode.c
index 9c1fbd23913d..6afac3d561ac 100644
--- a/fs/udf/inode.c
+++ b/fs/udf/inode.c
@@ -33,7 +33,6 @@
33#include <linux/mm.h> 33#include <linux/mm.h>
34#include <linux/module.h> 34#include <linux/module.h>
35#include <linux/pagemap.h> 35#include <linux/pagemap.h>
36#include <linux/buffer_head.h>
37#include <linux/writeback.h> 36#include <linux/writeback.h>
38#include <linux/slab.h> 37#include <linux/slab.h>
39#include <linux/crc-itu-t.h> 38#include <linux/crc-itu-t.h>
@@ -215,8 +214,7 @@ static int udf_write_begin(struct file *file, struct address_space *mapping,
215 return ret; 214 return ret;
216} 215}
217 216
218static ssize_t udf_direct_IO(int rw, struct kiocb *iocb, 217static ssize_t udf_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
219 struct iov_iter *iter,
220 loff_t offset) 218 loff_t offset)
221{ 219{
222 struct file *file = iocb->ki_filp; 220 struct file *file = iocb->ki_filp;
@@ -225,8 +223,8 @@ static ssize_t udf_direct_IO(int rw, struct kiocb *iocb,
225 size_t count = iov_iter_count(iter); 223 size_t count = iov_iter_count(iter);
226 ssize_t ret; 224 ssize_t ret;
227 225
228 ret = blockdev_direct_IO(rw, iocb, inode, iter, offset, udf_get_block); 226 ret = blockdev_direct_IO(iocb, inode, iter, offset, udf_get_block);
229 if (unlikely(ret < 0 && (rw & WRITE))) 227 if (unlikely(ret < 0 && iov_iter_rw(iter) == WRITE))
230 udf_write_failed(mapping, offset + count); 228 udf_write_failed(mapping, offset + count);
231 return ret; 229 return ret;
232} 230}
@@ -1637,7 +1635,7 @@ static int udf_update_inode(struct inode *inode, int do_sync)
1637 udf_get_lb_pblock(inode->i_sb, &iinfo->i_location, 0)); 1635 udf_get_lb_pblock(inode->i_sb, &iinfo->i_location, 0));
1638 if (!bh) { 1636 if (!bh) {
1639 udf_debug("getblk failure\n"); 1637 udf_debug("getblk failure\n");
1640 return -ENOMEM; 1638 return -EIO;
1641 } 1639 }
1642 1640
1643 lock_buffer(bh); 1641 lock_buffer(bh);
diff --git a/fs/udf/misc.c b/fs/udf/misc.c
index c175b4dabc14..71d1c25f360d 100644
--- a/fs/udf/misc.c
+++ b/fs/udf/misc.c
@@ -23,7 +23,6 @@
23 23
24#include <linux/fs.h> 24#include <linux/fs.h>
25#include <linux/string.h> 25#include <linux/string.h>
26#include <linux/buffer_head.h>
27#include <linux/crc-itu-t.h> 26#include <linux/crc-itu-t.h>
28 27
29#include "udf_i.h" 28#include "udf_i.h"
diff --git a/fs/udf/namei.c b/fs/udf/namei.c
index 33b246b82c98..39661977c89c 100644
--- a/fs/udf/namei.c
+++ b/fs/udf/namei.c
@@ -27,7 +27,6 @@
27#include <linux/errno.h> 27#include <linux/errno.h>
28#include <linux/mm.h> 28#include <linux/mm.h>
29#include <linux/slab.h> 29#include <linux/slab.h>
30#include <linux/buffer_head.h>
31#include <linux/sched.h> 30#include <linux/sched.h>
32#include <linux/crc-itu-t.h> 31#include <linux/crc-itu-t.h>
33#include <linux/exportfs.h> 32#include <linux/exportfs.h>
@@ -569,8 +568,8 @@ static int udf_add_nondir(struct dentry *dentry, struct inode *inode)
569 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse = 568 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse =
570 cpu_to_le32(iinfo->i_unique & 0x00000000FFFFFFFFUL); 569 cpu_to_le32(iinfo->i_unique & 0x00000000FFFFFFFFUL);
571 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL); 570 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL);
572 if (UDF_I(dir)->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB) 571 dir->i_ctime = dir->i_mtime = current_fs_time(dir->i_sb);
573 mark_inode_dirty(dir); 572 mark_inode_dirty(dir);
574 if (fibh.sbh != fibh.ebh) 573 if (fibh.sbh != fibh.ebh)
575 brelse(fibh.ebh); 574 brelse(fibh.ebh);
576 brelse(fibh.sbh); 575 brelse(fibh.sbh);
@@ -683,6 +682,7 @@ static int udf_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode)
683 cfi.fileCharacteristics |= FID_FILE_CHAR_DIRECTORY; 682 cfi.fileCharacteristics |= FID_FILE_CHAR_DIRECTORY;
684 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL); 683 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL);
685 inc_nlink(dir); 684 inc_nlink(dir);
685 dir->i_ctime = dir->i_mtime = current_fs_time(dir->i_sb);
686 mark_inode_dirty(dir); 686 mark_inode_dirty(dir);
687 unlock_new_inode(inode); 687 unlock_new_inode(inode);
688 d_instantiate(dentry, inode); 688 d_instantiate(dentry, inode);
@@ -1024,6 +1024,8 @@ static int udf_link(struct dentry *old_dentry, struct inode *dir,
1024 inc_nlink(inode); 1024 inc_nlink(inode);
1025 inode->i_ctime = current_fs_time(inode->i_sb); 1025 inode->i_ctime = current_fs_time(inode->i_sb);
1026 mark_inode_dirty(inode); 1026 mark_inode_dirty(inode);
1027 dir->i_ctime = dir->i_mtime = current_fs_time(dir->i_sb);
1028 mark_inode_dirty(dir);
1027 ihold(inode); 1029 ihold(inode);
1028 d_instantiate(dentry, inode); 1030 d_instantiate(dentry, inode);
1029 1031
@@ -1127,7 +1129,9 @@ static int udf_rename(struct inode *old_dir, struct dentry *old_dentry,
1127 inode_dec_link_count(new_inode); 1129 inode_dec_link_count(new_inode);
1128 } 1130 }
1129 old_dir->i_ctime = old_dir->i_mtime = current_fs_time(old_dir->i_sb); 1131 old_dir->i_ctime = old_dir->i_mtime = current_fs_time(old_dir->i_sb);
1132 new_dir->i_ctime = new_dir->i_mtime = current_fs_time(new_dir->i_sb);
1130 mark_inode_dirty(old_dir); 1133 mark_inode_dirty(old_dir);
1134 mark_inode_dirty(new_dir);
1131 1135
1132 if (dir_fi) { 1136 if (dir_fi) {
1133 dir_fi->icb.extLocation = cpu_to_lelb(UDF_I(new_dir)->i_location); 1137 dir_fi->icb.extLocation = cpu_to_lelb(UDF_I(new_dir)->i_location);
diff --git a/fs/udf/partition.c b/fs/udf/partition.c
index d6caf01a2097..5f861ed287c3 100644
--- a/fs/udf/partition.c
+++ b/fs/udf/partition.c
@@ -24,7 +24,6 @@
24 24
25#include <linux/fs.h> 25#include <linux/fs.h>
26#include <linux/string.h> 26#include <linux/string.h>
27#include <linux/buffer_head.h>
28#include <linux/mutex.h> 27#include <linux/mutex.h>
29 28
30uint32_t udf_get_pblock(struct super_block *sb, uint32_t block, 29uint32_t udf_get_pblock(struct super_block *sb, uint32_t block,
diff --git a/fs/udf/super.c b/fs/udf/super.c
index f169411c4ea0..6299f341967b 100644
--- a/fs/udf/super.c
+++ b/fs/udf/super.c
@@ -48,7 +48,6 @@
48#include <linux/stat.h> 48#include <linux/stat.h>
49#include <linux/cdrom.h> 49#include <linux/cdrom.h>
50#include <linux/nls.h> 50#include <linux/nls.h>
51#include <linux/buffer_head.h>
52#include <linux/vfs.h> 51#include <linux/vfs.h>
53#include <linux/vmalloc.h> 52#include <linux/vmalloc.h>
54#include <linux/errno.h> 53#include <linux/errno.h>
diff --git a/fs/udf/symlink.c b/fs/udf/symlink.c
index ac10ca939f26..8dfbc4025e2f 100644
--- a/fs/udf/symlink.c
+++ b/fs/udf/symlink.c
@@ -27,7 +27,6 @@
27#include <linux/mm.h> 27#include <linux/mm.h>
28#include <linux/stat.h> 28#include <linux/stat.h>
29#include <linux/pagemap.h> 29#include <linux/pagemap.h>
30#include <linux/buffer_head.h>
31#include "udf_i.h" 30#include "udf_i.h"
32 31
33static int udf_pc_to_char(struct super_block *sb, unsigned char *from, 32static int udf_pc_to_char(struct super_block *sb, unsigned char *from,
diff --git a/fs/udf/truncate.c b/fs/udf/truncate.c
index 8a9657d7f7c6..42b8c57795cb 100644
--- a/fs/udf/truncate.c
+++ b/fs/udf/truncate.c
@@ -22,7 +22,6 @@
22#include "udfdecl.h" 22#include "udfdecl.h"
23#include <linux/fs.h> 23#include <linux/fs.h>
24#include <linux/mm.h> 24#include <linux/mm.h>
25#include <linux/buffer_head.h>
26 25
27#include "udf_i.h" 26#include "udf_i.h"
28#include "udf_sb.h" 27#include "udf_sb.h"
diff --git a/fs/xfs/xfs_aops.c b/fs/xfs/xfs_aops.c
index 4f8cdc59bc38..1d8eef9cf0f5 100644
--- a/fs/xfs/xfs_aops.c
+++ b/fs/xfs/xfs_aops.c
@@ -1495,7 +1495,6 @@ xfs_end_io_direct_write(
1495 1495
1496STATIC ssize_t 1496STATIC ssize_t
1497xfs_vm_direct_IO( 1497xfs_vm_direct_IO(
1498 int rw,
1499 struct kiocb *iocb, 1498 struct kiocb *iocb,
1500 struct iov_iter *iter, 1499 struct iov_iter *iter,
1501 loff_t offset) 1500 loff_t offset)
@@ -1503,15 +1502,14 @@ xfs_vm_direct_IO(
1503 struct inode *inode = iocb->ki_filp->f_mapping->host; 1502 struct inode *inode = iocb->ki_filp->f_mapping->host;
1504 struct block_device *bdev = xfs_find_bdev_for_inode(inode); 1503 struct block_device *bdev = xfs_find_bdev_for_inode(inode);
1505 1504
1506 if (rw & WRITE) { 1505 if (iov_iter_rw(iter) == WRITE) {
1507 return __blockdev_direct_IO(rw, iocb, inode, bdev, iter, 1506 return __blockdev_direct_IO(iocb, inode, bdev, iter, offset,
1508 offset, xfs_get_blocks_direct, 1507 xfs_get_blocks_direct,
1509 xfs_end_io_direct_write, NULL, 1508 xfs_end_io_direct_write, NULL,
1510 DIO_ASYNC_EXTEND); 1509 DIO_ASYNC_EXTEND);
1511 } 1510 }
1512 return __blockdev_direct_IO(rw, iocb, inode, bdev, iter, 1511 return __blockdev_direct_IO(iocb, inode, bdev, iter, offset,
1513 offset, xfs_get_blocks_direct, 1512 xfs_get_blocks_direct, NULL, NULL, 0);
1514 NULL, NULL, 0);
1515} 1513}
1516 1514
1517/* 1515/*
diff --git a/fs/xfs/xfs_file.c b/fs/xfs/xfs_file.c
index 44856c3b9617..1f12ad0a8585 100644
--- a/fs/xfs/xfs_file.c
+++ b/fs/xfs/xfs_file.c
@@ -279,7 +279,7 @@ xfs_file_read_iter(
279 279
280 XFS_STATS_INC(xs_read_calls); 280 XFS_STATS_INC(xs_read_calls);
281 281
282 if (unlikely(file->f_flags & O_DIRECT)) 282 if (unlikely(iocb->ki_flags & IOCB_DIRECT))
283 ioflags |= XFS_IO_ISDIRECT; 283 ioflags |= XFS_IO_ISDIRECT;
284 if (file->f_mode & FMODE_NOCMTIME) 284 if (file->f_mode & FMODE_NOCMTIME)
285 ioflags |= XFS_IO_INVIS; 285 ioflags |= XFS_IO_INVIS;
@@ -544,18 +544,19 @@ xfs_zero_eof(
544 */ 544 */
545STATIC ssize_t 545STATIC ssize_t
546xfs_file_aio_write_checks( 546xfs_file_aio_write_checks(
547 struct file *file, 547 struct kiocb *iocb,
548 loff_t *pos, 548 struct iov_iter *from,
549 size_t *count,
550 int *iolock) 549 int *iolock)
551{ 550{
551 struct file *file = iocb->ki_filp;
552 struct inode *inode = file->f_mapping->host; 552 struct inode *inode = file->f_mapping->host;
553 struct xfs_inode *ip = XFS_I(inode); 553 struct xfs_inode *ip = XFS_I(inode);
554 int error = 0; 554 ssize_t error = 0;
555 size_t count = iov_iter_count(from);
555 556
556restart: 557restart:
557 error = generic_write_checks(file, pos, count, S_ISBLK(inode->i_mode)); 558 error = generic_write_checks(iocb, from);
558 if (error) 559 if (error <= 0)
559 return error; 560 return error;
560 561
561 error = xfs_break_layouts(inode, iolock); 562 error = xfs_break_layouts(inode, iolock);
@@ -569,16 +570,17 @@ restart:
569 * iolock shared, we need to update it to exclusive which implies 570 * iolock shared, we need to update it to exclusive which implies
570 * having to redo all checks before. 571 * having to redo all checks before.
571 */ 572 */
572 if (*pos > i_size_read(inode)) { 573 if (iocb->ki_pos > i_size_read(inode)) {
573 bool zero = false; 574 bool zero = false;
574 575
575 if (*iolock == XFS_IOLOCK_SHARED) { 576 if (*iolock == XFS_IOLOCK_SHARED) {
576 xfs_rw_iunlock(ip, *iolock); 577 xfs_rw_iunlock(ip, *iolock);
577 *iolock = XFS_IOLOCK_EXCL; 578 *iolock = XFS_IOLOCK_EXCL;
578 xfs_rw_ilock(ip, *iolock); 579 xfs_rw_ilock(ip, *iolock);
580 iov_iter_reexpand(from, count);
579 goto restart; 581 goto restart;
580 } 582 }
581 error = xfs_zero_eof(ip, *pos, i_size_read(inode), &zero); 583 error = xfs_zero_eof(ip, iocb->ki_pos, i_size_read(inode), &zero);
582 if (error) 584 if (error)
583 return error; 585 return error;
584 } 586 }
@@ -678,10 +680,11 @@ xfs_file_dio_aio_write(
678 xfs_rw_ilock(ip, iolock); 680 xfs_rw_ilock(ip, iolock);
679 } 681 }
680 682
681 ret = xfs_file_aio_write_checks(file, &pos, &count, &iolock); 683 ret = xfs_file_aio_write_checks(iocb, from, &iolock);
682 if (ret) 684 if (ret)
683 goto out; 685 goto out;
684 iov_iter_truncate(from, count); 686 count = iov_iter_count(from);
687 pos = iocb->ki_pos;
685 688
686 if (mapping->nrpages) { 689 if (mapping->nrpages) {
687 ret = filemap_write_and_wait_range(VFS_I(ip)->i_mapping, 690 ret = filemap_write_and_wait_range(VFS_I(ip)->i_mapping,
@@ -734,24 +737,22 @@ xfs_file_buffered_aio_write(
734 ssize_t ret; 737 ssize_t ret;
735 int enospc = 0; 738 int enospc = 0;
736 int iolock = XFS_IOLOCK_EXCL; 739 int iolock = XFS_IOLOCK_EXCL;
737 loff_t pos = iocb->ki_pos;
738 size_t count = iov_iter_count(from);
739 740
740 xfs_rw_ilock(ip, iolock); 741 xfs_rw_ilock(ip, iolock);
741 742
742 ret = xfs_file_aio_write_checks(file, &pos, &count, &iolock); 743 ret = xfs_file_aio_write_checks(iocb, from, &iolock);
743 if (ret) 744 if (ret)
744 goto out; 745 goto out;
745 746
746 iov_iter_truncate(from, count);
747 /* We can write back this queue in page reclaim */ 747 /* We can write back this queue in page reclaim */
748 current->backing_dev_info = inode_to_bdi(inode); 748 current->backing_dev_info = inode_to_bdi(inode);
749 749
750write_retry: 750write_retry:
751 trace_xfs_file_buffered_write(ip, count, iocb->ki_pos, 0); 751 trace_xfs_file_buffered_write(ip, iov_iter_count(from),
752 ret = generic_perform_write(file, from, pos); 752 iocb->ki_pos, 0);
753 ret = generic_perform_write(file, from, iocb->ki_pos);
753 if (likely(ret >= 0)) 754 if (likely(ret >= 0))
754 iocb->ki_pos = pos + ret; 755 iocb->ki_pos += ret;
755 756
756 /* 757 /*
757 * If we hit a space limit, try to free up some lingering preallocated 758 * If we hit a space limit, try to free up some lingering preallocated
@@ -803,7 +804,7 @@ xfs_file_write_iter(
803 if (XFS_FORCED_SHUTDOWN(ip->i_mount)) 804 if (XFS_FORCED_SHUTDOWN(ip->i_mount))
804 return -EIO; 805 return -EIO;
805 806
806 if (unlikely(file->f_flags & O_DIRECT)) 807 if (unlikely(iocb->ki_flags & IOCB_DIRECT))
807 ret = xfs_file_dio_aio_write(iocb, from); 808 ret = xfs_file_dio_aio_write(iocb, from);
808 else 809 else
809 ret = xfs_file_buffered_aio_write(iocb, from); 810 ret = xfs_file_buffered_aio_write(iocb, from);
diff --git a/fs/xfs/xfs_qm.h b/fs/xfs/xfs_qm.h
index 0d4d3590cf85..996a04064894 100644
--- a/fs/xfs/xfs_qm.h
+++ b/fs/xfs/xfs_qm.h
@@ -168,10 +168,6 @@ extern int xfs_qm_scall_getquota(struct xfs_mount *, xfs_dqid_t,
168 uint, struct qc_dqblk *); 168 uint, struct qc_dqblk *);
169extern int xfs_qm_scall_setqlim(struct xfs_mount *, xfs_dqid_t, uint, 169extern int xfs_qm_scall_setqlim(struct xfs_mount *, xfs_dqid_t, uint,
170 struct qc_dqblk *); 170 struct qc_dqblk *);
171extern int xfs_qm_scall_getqstat(struct xfs_mount *,
172 struct fs_quota_stat *);
173extern int xfs_qm_scall_getqstatv(struct xfs_mount *,
174 struct fs_quota_statv *);
175extern int xfs_qm_scall_quotaon(struct xfs_mount *, uint); 171extern int xfs_qm_scall_quotaon(struct xfs_mount *, uint);
176extern int xfs_qm_scall_quotaoff(struct xfs_mount *, uint); 172extern int xfs_qm_scall_quotaoff(struct xfs_mount *, uint);
177 173
diff --git a/fs/xfs/xfs_qm_syscalls.c b/fs/xfs/xfs_qm_syscalls.c
index 9b965db45800..9a25c9275fb3 100644
--- a/fs/xfs/xfs_qm_syscalls.c
+++ b/fs/xfs/xfs_qm_syscalls.c
@@ -38,7 +38,6 @@
38STATIC int xfs_qm_log_quotaoff(xfs_mount_t *, xfs_qoff_logitem_t **, uint); 38STATIC int xfs_qm_log_quotaoff(xfs_mount_t *, xfs_qoff_logitem_t **, uint);
39STATIC int xfs_qm_log_quotaoff_end(xfs_mount_t *, xfs_qoff_logitem_t *, 39STATIC int xfs_qm_log_quotaoff_end(xfs_mount_t *, xfs_qoff_logitem_t *,
40 uint); 40 uint);
41STATIC uint xfs_qm_export_flags(uint);
42 41
43/* 42/*
44 * Turn off quota accounting and/or enforcement for all udquots and/or 43 * Turn off quota accounting and/or enforcement for all udquots and/or
@@ -389,159 +388,6 @@ xfs_qm_scall_quotaon(
389 return 0; 388 return 0;
390} 389}
391 390
392
393/*
394 * Return quota status information, such as uquota-off, enforcements, etc.
395 * for Q_XGETQSTAT command.
396 */
397int
398xfs_qm_scall_getqstat(
399 struct xfs_mount *mp,
400 struct fs_quota_stat *out)
401{
402 struct xfs_quotainfo *q = mp->m_quotainfo;
403 struct xfs_inode *uip = NULL;
404 struct xfs_inode *gip = NULL;
405 struct xfs_inode *pip = NULL;
406 bool tempuqip = false;
407 bool tempgqip = false;
408 bool temppqip = false;
409
410 memset(out, 0, sizeof(fs_quota_stat_t));
411
412 out->qs_version = FS_QSTAT_VERSION;
413 out->qs_flags = (__uint16_t) xfs_qm_export_flags(mp->m_qflags &
414 (XFS_ALL_QUOTA_ACCT|
415 XFS_ALL_QUOTA_ENFD));
416 uip = q->qi_uquotaip;
417 gip = q->qi_gquotaip;
418 pip = q->qi_pquotaip;
419 if (!uip && mp->m_sb.sb_uquotino != NULLFSINO) {
420 if (xfs_iget(mp, NULL, mp->m_sb.sb_uquotino,
421 0, 0, &uip) == 0)
422 tempuqip = true;
423 }
424 if (!gip && mp->m_sb.sb_gquotino != NULLFSINO) {
425 if (xfs_iget(mp, NULL, mp->m_sb.sb_gquotino,
426 0, 0, &gip) == 0)
427 tempgqip = true;
428 }
429 /*
430 * Q_XGETQSTAT doesn't have room for both group and project quotas.
431 * So, allow the project quota values to be copied out only if
432 * there is no group quota information available.
433 */
434 if (!gip) {
435 if (!pip && mp->m_sb.sb_pquotino != NULLFSINO) {
436 if (xfs_iget(mp, NULL, mp->m_sb.sb_pquotino,
437 0, 0, &pip) == 0)
438 temppqip = true;
439 }
440 } else
441 pip = NULL;
442 if (uip) {
443 out->qs_uquota.qfs_ino = mp->m_sb.sb_uquotino;
444 out->qs_uquota.qfs_nblks = uip->i_d.di_nblocks;
445 out->qs_uquota.qfs_nextents = uip->i_d.di_nextents;
446 if (tempuqip)
447 IRELE(uip);
448 }
449
450 if (gip) {
451 out->qs_gquota.qfs_ino = mp->m_sb.sb_gquotino;
452 out->qs_gquota.qfs_nblks = gip->i_d.di_nblocks;
453 out->qs_gquota.qfs_nextents = gip->i_d.di_nextents;
454 if (tempgqip)
455 IRELE(gip);
456 }
457 if (pip) {
458 out->qs_gquota.qfs_ino = mp->m_sb.sb_gquotino;
459 out->qs_gquota.qfs_nblks = pip->i_d.di_nblocks;
460 out->qs_gquota.qfs_nextents = pip->i_d.di_nextents;
461 if (temppqip)
462 IRELE(pip);
463 }
464 out->qs_incoredqs = q->qi_dquots;
465 out->qs_btimelimit = q->qi_btimelimit;
466 out->qs_itimelimit = q->qi_itimelimit;
467 out->qs_rtbtimelimit = q->qi_rtbtimelimit;
468 out->qs_bwarnlimit = q->qi_bwarnlimit;
469 out->qs_iwarnlimit = q->qi_iwarnlimit;
470
471 return 0;
472}
473
474/*
475 * Return quota status information, such as uquota-off, enforcements, etc.
476 * for Q_XGETQSTATV command, to support separate project quota field.
477 */
478int
479xfs_qm_scall_getqstatv(
480 struct xfs_mount *mp,
481 struct fs_quota_statv *out)
482{
483 struct xfs_quotainfo *q = mp->m_quotainfo;
484 struct xfs_inode *uip = NULL;
485 struct xfs_inode *gip = NULL;
486 struct xfs_inode *pip = NULL;
487 bool tempuqip = false;
488 bool tempgqip = false;
489 bool temppqip = false;
490
491 out->qs_flags = (__uint16_t) xfs_qm_export_flags(mp->m_qflags &
492 (XFS_ALL_QUOTA_ACCT|
493 XFS_ALL_QUOTA_ENFD));
494 out->qs_uquota.qfs_ino = mp->m_sb.sb_uquotino;
495 out->qs_gquota.qfs_ino = mp->m_sb.sb_gquotino;
496 out->qs_pquota.qfs_ino = mp->m_sb.sb_pquotino;
497
498 uip = q->qi_uquotaip;
499 gip = q->qi_gquotaip;
500 pip = q->qi_pquotaip;
501 if (!uip && mp->m_sb.sb_uquotino != NULLFSINO) {
502 if (xfs_iget(mp, NULL, mp->m_sb.sb_uquotino,
503 0, 0, &uip) == 0)
504 tempuqip = true;
505 }
506 if (!gip && mp->m_sb.sb_gquotino != NULLFSINO) {
507 if (xfs_iget(mp, NULL, mp->m_sb.sb_gquotino,
508 0, 0, &gip) == 0)
509 tempgqip = true;
510 }
511 if (!pip && mp->m_sb.sb_pquotino != NULLFSINO) {
512 if (xfs_iget(mp, NULL, mp->m_sb.sb_pquotino,
513 0, 0, &pip) == 0)
514 temppqip = true;
515 }
516 if (uip) {
517 out->qs_uquota.qfs_nblks = uip->i_d.di_nblocks;
518 out->qs_uquota.qfs_nextents = uip->i_d.di_nextents;
519 if (tempuqip)
520 IRELE(uip);
521 }
522
523 if (gip) {
524 out->qs_gquota.qfs_nblks = gip->i_d.di_nblocks;
525 out->qs_gquota.qfs_nextents = gip->i_d.di_nextents;
526 if (tempgqip)
527 IRELE(gip);
528 }
529 if (pip) {
530 out->qs_pquota.qfs_nblks = pip->i_d.di_nblocks;
531 out->qs_pquota.qfs_nextents = pip->i_d.di_nextents;
532 if (temppqip)
533 IRELE(pip);
534 }
535 out->qs_incoredqs = q->qi_dquots;
536 out->qs_btimelimit = q->qi_btimelimit;
537 out->qs_itimelimit = q->qi_itimelimit;
538 out->qs_rtbtimelimit = q->qi_rtbtimelimit;
539 out->qs_bwarnlimit = q->qi_bwarnlimit;
540 out->qs_iwarnlimit = q->qi_iwarnlimit;
541
542 return 0;
543}
544
545#define XFS_QC_MASK \ 391#define XFS_QC_MASK \
546 (QC_LIMIT_MASK | QC_TIMER_MASK | QC_WARNS_MASK) 392 (QC_LIMIT_MASK | QC_TIMER_MASK | QC_WARNS_MASK)
547 393
@@ -873,28 +719,6 @@ out_put:
873 return error; 719 return error;
874} 720}
875 721
876STATIC uint
877xfs_qm_export_flags(
878 uint flags)
879{
880 uint uflags;
881
882 uflags = 0;
883 if (flags & XFS_UQUOTA_ACCT)
884 uflags |= FS_QUOTA_UDQ_ACCT;
885 if (flags & XFS_GQUOTA_ACCT)
886 uflags |= FS_QUOTA_GDQ_ACCT;
887 if (flags & XFS_PQUOTA_ACCT)
888 uflags |= FS_QUOTA_PDQ_ACCT;
889 if (flags & XFS_UQUOTA_ENFD)
890 uflags |= FS_QUOTA_UDQ_ENFD;
891 if (flags & XFS_GQUOTA_ENFD)
892 uflags |= FS_QUOTA_GDQ_ENFD;
893 if (flags & XFS_PQUOTA_ENFD)
894 uflags |= FS_QUOTA_PDQ_ENFD;
895 return uflags;
896}
897
898 722
899STATIC int 723STATIC int
900xfs_dqrele_inode( 724xfs_dqrele_inode(
diff --git a/fs/xfs/xfs_quotaops.c b/fs/xfs/xfs_quotaops.c
index 6923905ab33d..7795e0d01382 100644
--- a/fs/xfs/xfs_quotaops.c
+++ b/fs/xfs/xfs_quotaops.c
@@ -23,10 +23,81 @@
23#include "xfs_inode.h" 23#include "xfs_inode.h"
24#include "xfs_quota.h" 24#include "xfs_quota.h"
25#include "xfs_trans.h" 25#include "xfs_trans.h"
26#include "xfs_trace.h"
27#include "xfs_icache.h"
26#include "xfs_qm.h" 28#include "xfs_qm.h"
27#include <linux/quota.h> 29#include <linux/quota.h>
28 30
29 31
32static void
33xfs_qm_fill_state(
34 struct qc_type_state *tstate,
35 struct xfs_mount *mp,
36 struct xfs_inode *ip,
37 xfs_ino_t ino)
38{
39 struct xfs_quotainfo *q = mp->m_quotainfo;
40 bool tempqip = false;
41
42 tstate->ino = ino;
43 if (!ip && ino == NULLFSINO)
44 return;
45 if (!ip) {
46 if (xfs_iget(mp, NULL, ino, 0, 0, &ip))
47 return;
48 tempqip = true;
49 }
50 tstate->flags |= QCI_SYSFILE;
51 tstate->blocks = ip->i_d.di_nblocks;
52 tstate->nextents = ip->i_d.di_nextents;
53 tstate->spc_timelimit = q->qi_btimelimit;
54 tstate->ino_timelimit = q->qi_itimelimit;
55 tstate->rt_spc_timelimit = q->qi_rtbtimelimit;
56 tstate->spc_warnlimit = q->qi_bwarnlimit;
57 tstate->ino_warnlimit = q->qi_iwarnlimit;
58 tstate->rt_spc_warnlimit = q->qi_rtbwarnlimit;
59 if (tempqip)
60 IRELE(ip);
61}
62
63/*
64 * Return quota status information, such as enforcements, quota file inode
65 * numbers etc.
66 */
67static int
68xfs_fs_get_quota_state(
69 struct super_block *sb,
70 struct qc_state *state)
71{
72 struct xfs_mount *mp = XFS_M(sb);
73 struct xfs_quotainfo *q = mp->m_quotainfo;
74
75 memset(state, 0, sizeof(*state));
76 if (!XFS_IS_QUOTA_RUNNING(mp))
77 return 0;
78 state->s_incoredqs = q->qi_dquots;
79 if (XFS_IS_UQUOTA_RUNNING(mp))
80 state->s_state[USRQUOTA].flags |= QCI_ACCT_ENABLED;
81 if (XFS_IS_UQUOTA_ENFORCED(mp))
82 state->s_state[USRQUOTA].flags |= QCI_LIMITS_ENFORCED;
83 if (XFS_IS_GQUOTA_RUNNING(mp))
84 state->s_state[GRPQUOTA].flags |= QCI_ACCT_ENABLED;
85 if (XFS_IS_GQUOTA_ENFORCED(mp))
86 state->s_state[GRPQUOTA].flags |= QCI_LIMITS_ENFORCED;
87 if (XFS_IS_PQUOTA_RUNNING(mp))
88 state->s_state[PRJQUOTA].flags |= QCI_ACCT_ENABLED;
89 if (XFS_IS_PQUOTA_ENFORCED(mp))
90 state->s_state[PRJQUOTA].flags |= QCI_LIMITS_ENFORCED;
91
92 xfs_qm_fill_state(&state->s_state[USRQUOTA], mp, q->qi_uquotaip,
93 mp->m_sb.sb_uquotino);
94 xfs_qm_fill_state(&state->s_state[GRPQUOTA], mp, q->qi_gquotaip,
95 mp->m_sb.sb_gquotino);
96 xfs_qm_fill_state(&state->s_state[PRJQUOTA], mp, q->qi_pquotaip,
97 mp->m_sb.sb_pquotino);
98 return 0;
99}
100
30STATIC int 101STATIC int
31xfs_quota_type(int type) 102xfs_quota_type(int type)
32{ 103{
@@ -40,28 +111,40 @@ xfs_quota_type(int type)
40 } 111 }
41} 112}
42 113
43STATIC int 114#define XFS_QC_SETINFO_MASK (QC_TIMER_MASK | QC_WARNS_MASK)
44xfs_fs_get_xstate( 115
116/*
117 * Adjust quota timers & warnings
118 */
119static int
120xfs_fs_set_info(
45 struct super_block *sb, 121 struct super_block *sb,
46 struct fs_quota_stat *fqs) 122 int type,
123 struct qc_info *info)
47{ 124{
48 struct xfs_mount *mp = XFS_M(sb); 125 struct xfs_mount *mp = XFS_M(sb);
126 struct qc_dqblk newlim;
49 127
128 if (sb->s_flags & MS_RDONLY)
129 return -EROFS;
50 if (!XFS_IS_QUOTA_RUNNING(mp)) 130 if (!XFS_IS_QUOTA_RUNNING(mp))
51 return -ENOSYS; 131 return -ENOSYS;
52 return xfs_qm_scall_getqstat(mp, fqs); 132 if (!XFS_IS_QUOTA_ON(mp))
53} 133 return -ESRCH;
134 if (info->i_fieldmask & ~XFS_QC_SETINFO_MASK)
135 return -EINVAL;
136 if ((info->i_fieldmask & XFS_QC_SETINFO_MASK) == 0)
137 return 0;
54 138
55STATIC int 139 newlim.d_fieldmask = info->i_fieldmask;
56xfs_fs_get_xstatev( 140 newlim.d_spc_timer = info->i_spc_timelimit;
57 struct super_block *sb, 141 newlim.d_ino_timer = info->i_ino_timelimit;
58 struct fs_quota_statv *fqs) 142 newlim.d_rt_spc_timer = info->i_rt_spc_timelimit;
59{ 143 newlim.d_ino_warns = info->i_ino_warnlimit;
60 struct xfs_mount *mp = XFS_M(sb); 144 newlim.d_spc_warns = info->i_spc_warnlimit;
145 newlim.d_rt_spc_warns = info->i_rt_spc_warnlimit;
61 146
62 if (!XFS_IS_QUOTA_RUNNING(mp)) 147 return xfs_qm_scall_setqlim(mp, 0, xfs_quota_type(type), &newlim);
63 return -ENOSYS;
64 return xfs_qm_scall_getqstatv(mp, fqs);
65} 148}
66 149
67static unsigned int 150static unsigned int
@@ -178,8 +261,8 @@ xfs_fs_set_dqblk(
178} 261}
179 262
180const struct quotactl_ops xfs_quotactl_operations = { 263const struct quotactl_ops xfs_quotactl_operations = {
181 .get_xstatev = xfs_fs_get_xstatev, 264 .get_state = xfs_fs_get_quota_state,
182 .get_xstate = xfs_fs_get_xstate, 265 .set_info = xfs_fs_set_info,
183 .quota_enable = xfs_quota_enable, 266 .quota_enable = xfs_quota_enable,
184 .quota_disable = xfs_quota_disable, 267 .quota_disable = xfs_quota_disable,
185 .rm_xquota = xfs_fs_rm_xquota, 268 .rm_xquota = xfs_fs_rm_xquota,
diff --git a/include/acpi/acpixf.h b/include/acpi/acpixf.h
index d56f5d722138..08ef57bc8d63 100644
--- a/include/acpi/acpixf.h
+++ b/include/acpi/acpixf.h
@@ -46,7 +46,7 @@
46 46
47/* Current ACPICA subsystem version in YYYYMMDD format */ 47/* Current ACPICA subsystem version in YYYYMMDD format */
48 48
49#define ACPI_CA_VERSION 0x20150204 49#define ACPI_CA_VERSION 0x20150410
50 50
51#include <acpi/acconfig.h> 51#include <acpi/acconfig.h>
52#include <acpi/actypes.h> 52#include <acpi/actypes.h>
@@ -431,13 +431,13 @@ ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init acpi_load_tables(void))
431ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init acpi_reallocate_root_table(void)) 431ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init acpi_reallocate_root_table(void))
432 432
433ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init 433ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init
434 acpi_find_root_pointer(acpi_size * rsdp_address)) 434 acpi_find_root_pointer(acpi_physical_address *
435 435 rsdp_address))
436ACPI_EXTERNAL_RETURN_STATUS(acpi_status 436ACPI_EXTERNAL_RETURN_STATUS(acpi_status
437 acpi_get_table_header(acpi_string signature, 437 acpi_get_table_header(acpi_string signature,
438 u32 instance, 438 u32 instance,
439 struct acpi_table_header 439 struct acpi_table_header
440 *out_table_header)) 440 *out_table_header))
441ACPI_EXTERNAL_RETURN_STATUS(acpi_status 441ACPI_EXTERNAL_RETURN_STATUS(acpi_status
442 acpi_get_table(acpi_string signature, u32 instance, 442 acpi_get_table(acpi_string signature, u32 instance,
443 struct acpi_table_header 443 struct acpi_table_header
diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
index f06d75e5fa54..cafdeb50fbdf 100644
--- a/include/acpi/actbl2.h
+++ b/include/acpi/actbl2.h
@@ -73,6 +73,7 @@
73#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 73#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
74#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 74#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
75#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 75#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
76#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
76#define ACPI_SIG_MTMR "MTMR" /* MID Timer table */ 77#define ACPI_SIG_MTMR "MTMR" /* MID Timer table */
77#define ACPI_SIG_SLIC "SLIC" /* Software Licensing Description Table */ 78#define ACPI_SIG_SLIC "SLIC" /* Software Licensing Description Table */
78#define ACPI_SIG_SPCR "SPCR" /* Serial Port Console Redirection table */ 79#define ACPI_SIG_SPCR "SPCR" /* Serial Port Console Redirection table */
@@ -845,7 +846,8 @@ struct acpi_lpit_header {
845 846
846enum acpi_lpit_type { 847enum acpi_lpit_type {
847 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 848 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
848 ACPI_LPIT_TYPE_SIMPLE_IO = 0x01 849 ACPI_LPIT_TYPE_SIMPLE_IO = 0x01,
850 ACPI_LPIT_TYPE_RESERVED = 0x02 /* 2 and above are reserved */
849}; 851};
850 852
851/* Masks for Flags field above */ 853/* Masks for Flags field above */
@@ -935,6 +937,21 @@ struct acpi_table_mchi {
935 937
936/******************************************************************************* 938/*******************************************************************************
937 * 939 *
940 * MSDM - Microsoft Data Management table
941 *
942 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
943 * November 29, 2011. Copyright 2011 Microsoft
944 *
945 ******************************************************************************/
946
947/* Basic MSDM table is only the common ACPI header */
948
949struct acpi_table_msdm {
950 struct acpi_table_header header; /* Common ACPI table header */
951};
952
953/*******************************************************************************
954 *
938 * MTMR - MID Timer Table 955 * MTMR - MID Timer Table
939 * Version 1 956 * Version 1
940 * 957 *
@@ -959,10 +976,9 @@ struct acpi_mtmr_entry {
959/******************************************************************************* 976/*******************************************************************************
960 * 977 *
961 * SLIC - Software Licensing Description Table 978 * SLIC - Software Licensing Description Table
962 * Version 1
963 * 979 *
964 * Conforms to "OEM Activation 2.0 for Windows Vista Operating Systems", 980 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
965 * Copyright 2006 981 * November 29, 2011. Copyright 2011 Microsoft
966 * 982 *
967 ******************************************************************************/ 983 ******************************************************************************/
968 984
@@ -972,52 +988,6 @@ struct acpi_table_slic {
972 struct acpi_table_header header; /* Common ACPI table header */ 988 struct acpi_table_header header; /* Common ACPI table header */
973}; 989};
974 990
975/* Common SLIC subtable header */
976
977struct acpi_slic_header {
978 u32 type;
979 u32 length;
980};
981
982/* Values for Type field above */
983
984enum acpi_slic_type {
985 ACPI_SLIC_TYPE_PUBLIC_KEY = 0,
986 ACPI_SLIC_TYPE_WINDOWS_MARKER = 1,
987 ACPI_SLIC_TYPE_RESERVED = 2 /* 2 and greater are reserved */
988};
989
990/*
991 * SLIC Subtables, correspond to Type in struct acpi_slic_header
992 */
993
994/* 0: Public Key Structure */
995
996struct acpi_slic_key {
997 struct acpi_slic_header header;
998 u8 key_type;
999 u8 version;
1000 u16 reserved;
1001 u32 algorithm;
1002 char magic[4];
1003 u32 bit_length;
1004 u32 exponent;
1005 u8 modulus[128];
1006};
1007
1008/* 1: Windows Marker Structure */
1009
1010struct acpi_slic_marker {
1011 struct acpi_slic_header header;
1012 u32 version;
1013 char oem_id[ACPI_OEM_ID_SIZE]; /* ASCII OEM identification */
1014 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE]; /* ASCII OEM table identification */
1015 char windows_flag[8];
1016 u32 slic_version;
1017 u8 reserved[16];
1018 u8 signature[128];
1019};
1020
1021/******************************************************************************* 991/*******************************************************************************
1022 * 992 *
1023 * SPCR - Serial Port Console Redirection table 993 * SPCR - Serial Port Console Redirection table
diff --git a/include/acpi/actypes.h b/include/acpi/actypes.h
index b034f1068dfe..f5ca0e989bba 100644
--- a/include/acpi/actypes.h
+++ b/include/acpi/actypes.h
@@ -199,9 +199,29 @@ typedef int s32;
199typedef s32 acpi_native_int; 199typedef s32 acpi_native_int;
200 200
201typedef u32 acpi_size; 201typedef u32 acpi_size;
202
203#ifdef ACPI_32BIT_PHYSICAL_ADDRESS
204
205/*
206 * OSPMs can define this to shrink the size of the structures for 32-bit
207 * none PAE environment. ASL compiler may always define this to generate
208 * 32-bit OSPM compliant tables.
209 */
202typedef u32 acpi_io_address; 210typedef u32 acpi_io_address;
203typedef u32 acpi_physical_address; 211typedef u32 acpi_physical_address;
204 212
213#else /* ACPI_32BIT_PHYSICAL_ADDRESS */
214
215/*
216 * It is reported that, after some calculations, the physical addresses can
217 * wrap over the 32-bit boundary on 32-bit PAE environment.
218 * https://bugzilla.kernel.org/show_bug.cgi?id=87971
219 */
220typedef u64 acpi_io_address;
221typedef u64 acpi_physical_address;
222
223#endif /* ACPI_32BIT_PHYSICAL_ADDRESS */
224
205#define ACPI_MAX_PTR ACPI_UINT32_MAX 225#define ACPI_MAX_PTR ACPI_UINT32_MAX
206#define ACPI_SIZE_MAX ACPI_UINT32_MAX 226#define ACPI_SIZE_MAX ACPI_UINT32_MAX
207 227
@@ -713,33 +733,32 @@ typedef u32 acpi_event_type;
713 * The encoding of acpi_event_status is illustrated below. 733 * The encoding of acpi_event_status is illustrated below.
714 * Note that a set bit (1) indicates the property is TRUE 734 * Note that a set bit (1) indicates the property is TRUE
715 * (e.g. if bit 0 is set then the event is enabled). 735 * (e.g. if bit 0 is set then the event is enabled).
716 * +-------------+-+-+-+-+ 736 * +-------------+-+-+-+-+-+
717 * | Bits 31:4 |3|2|1|0| 737 * | Bits 31:5 |4|3|2|1|0|
718 * +-------------+-+-+-+-+ 738 * +-------------+-+-+-+-+-+
719 * | | | | | 739 * | | | | | |
720 * | | | | +- Enabled? 740 * | | | | | +- Enabled?
721 * | | | +--- Enabled for wake? 741 * | | | | +--- Enabled for wake?
722 * | | +----- Set? 742 * | | | +----- Status bit set?
723 * | +------- Has a handler? 743 * | | +------- Enable bit set?
724 * +------------- <Reserved> 744 * | +--------- Has a handler?
745 * +--------------- <Reserved>
725 */ 746 */
726typedef u32 acpi_event_status; 747typedef u32 acpi_event_status;
727 748
728#define ACPI_EVENT_FLAG_DISABLED (acpi_event_status) 0x00 749#define ACPI_EVENT_FLAG_DISABLED (acpi_event_status) 0x00
729#define ACPI_EVENT_FLAG_ENABLED (acpi_event_status) 0x01 750#define ACPI_EVENT_FLAG_ENABLED (acpi_event_status) 0x01
730#define ACPI_EVENT_FLAG_WAKE_ENABLED (acpi_event_status) 0x02 751#define ACPI_EVENT_FLAG_WAKE_ENABLED (acpi_event_status) 0x02
731#define ACPI_EVENT_FLAG_SET (acpi_event_status) 0x04 752#define ACPI_EVENT_FLAG_STATUS_SET (acpi_event_status) 0x04
732#define ACPI_EVENT_FLAG_HAS_HANDLER (acpi_event_status) 0x08 753#define ACPI_EVENT_FLAG_ENABLE_SET (acpi_event_status) 0x08
754#define ACPI_EVENT_FLAG_HAS_HANDLER (acpi_event_status) 0x10
755#define ACPI_EVENT_FLAG_SET ACPI_EVENT_FLAG_STATUS_SET
733 756
734/* Actions for acpi_set_gpe, acpi_gpe_wakeup, acpi_hw_low_set_gpe */ 757/* Actions for acpi_set_gpe, acpi_gpe_wakeup, acpi_hw_low_set_gpe */
735 758
736#define ACPI_GPE_ENABLE 0 759#define ACPI_GPE_ENABLE 0
737#define ACPI_GPE_DISABLE 1 760#define ACPI_GPE_DISABLE 1
738#define ACPI_GPE_CONDITIONAL_ENABLE 2 761#define ACPI_GPE_CONDITIONAL_ENABLE 2
739#define ACPI_GPE_SAVE_MASK 4
740
741#define ACPI_GPE_ENABLE_SAVE (ACPI_GPE_ENABLE | ACPI_GPE_SAVE_MASK)
742#define ACPI_GPE_DISABLE_SAVE (ACPI_GPE_DISABLE | ACPI_GPE_SAVE_MASK)
743 762
744/* 763/*
745 * GPE info flags - Per GPE 764 * GPE info flags - Per GPE
@@ -1251,6 +1270,7 @@ struct acpi_memory_list {
1251#define ACPI_OSI_WIN_VISTA_SP2 0x0A 1270#define ACPI_OSI_WIN_VISTA_SP2 0x0A
1252#define ACPI_OSI_WIN_7 0x0B 1271#define ACPI_OSI_WIN_7 0x0B
1253#define ACPI_OSI_WIN_8 0x0C 1272#define ACPI_OSI_WIN_8 0x0C
1273#define ACPI_OSI_WIN_10 0x0D
1254 1274
1255/* Definitions of file IO */ 1275/* Definitions of file IO */
1256 1276
diff --git a/include/acpi/platform/acenv.h b/include/acpi/platform/acenv.h
index ad74dc51d5b7..ecdf9405dd3a 100644
--- a/include/acpi/platform/acenv.h
+++ b/include/acpi/platform/acenv.h
@@ -76,6 +76,7 @@
76#define ACPI_LARGE_NAMESPACE_NODE 76#define ACPI_LARGE_NAMESPACE_NODE
77#define ACPI_DATA_TABLE_DISASSEMBLY 77#define ACPI_DATA_TABLE_DISASSEMBLY
78#define ACPI_SINGLE_THREADED 78#define ACPI_SINGLE_THREADED
79#define ACPI_32BIT_PHYSICAL_ADDRESS
79#endif 80#endif
80 81
81/* acpi_exec configuration. Multithreaded with full AML debugger */ 82/* acpi_exec configuration. Multithreaded with full AML debugger */
diff --git a/include/asm-generic/dma-mapping-common.h b/include/asm-generic/dma-mapping-common.h
index 3378dcf4c31e..940d5ec122c9 100644
--- a/include/asm-generic/dma-mapping-common.h
+++ b/include/asm-generic/dma-mapping-common.h
@@ -39,6 +39,10 @@ static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
39 debug_dma_unmap_page(dev, addr, size, dir, true); 39 debug_dma_unmap_page(dev, addr, size, dir, true);
40} 40}
41 41
42/*
43 * dma_maps_sg_attrs returns 0 on error and > 0 on success.
44 * It should never return a value < 0.
45 */
42static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, 46static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
43 int nents, enum dma_data_direction dir, 47 int nents, enum dma_data_direction dir,
44 struct dma_attrs *attrs) 48 struct dma_attrs *attrs)
@@ -51,6 +55,7 @@ static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
51 kmemcheck_mark_initialized(sg_virt(s), s->length); 55 kmemcheck_mark_initialized(sg_virt(s), s->length);
52 BUG_ON(!valid_dma_direction(dir)); 56 BUG_ON(!valid_dma_direction(dir));
53 ents = ops->map_sg(dev, sg, nents, dir, attrs); 57 ents = ops->map_sg(dev, sg, nents, dir, attrs);
58 BUG_ON(ents < 0);
54 debug_dma_map_sg(dev, sg, nents, ents, dir); 59 debug_dma_map_sg(dev, sg, nents, ents, dir);
55 60
56 return ents; 61 return ents;
diff --git a/include/asm-generic/seccomp.h b/include/asm-generic/seccomp.h
index 9fa1f653ed3b..c9ccafa0d99a 100644
--- a/include/asm-generic/seccomp.h
+++ b/include/asm-generic/seccomp.h
@@ -17,7 +17,9 @@
17#define __NR_seccomp_read_32 __NR_read 17#define __NR_seccomp_read_32 __NR_read
18#define __NR_seccomp_write_32 __NR_write 18#define __NR_seccomp_write_32 __NR_write
19#define __NR_seccomp_exit_32 __NR_exit 19#define __NR_seccomp_exit_32 __NR_exit
20#ifndef __NR_seccomp_sigreturn_32
20#define __NR_seccomp_sigreturn_32 __NR_rt_sigreturn 21#define __NR_seccomp_sigreturn_32 __NR_rt_sigreturn
22#endif
21#endif /* CONFIG_COMPAT && ! already defined */ 23#endif /* CONFIG_COMPAT && ! already defined */
22 24
23#define __NR_seccomp_read __NR_read 25#define __NR_seccomp_read __NR_read
diff --git a/include/dt-bindings/clock/pistachio-clk.h b/include/dt-bindings/clock/pistachio-clk.h
new file mode 100644
index 000000000000..039f83facb68
--- /dev/null
+++ b/include/dt-bindings/clock/pistachio-clk.h
@@ -0,0 +1,183 @@
1/*
2 * Copyright (C) 2014 Google, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 */
8
9#ifndef _DT_BINDINGS_CLOCK_PISTACHIO_H
10#define _DT_BINDINGS_CLOCK_PISTACHIO_H
11
12/* PLLs */
13#define CLK_MIPS_PLL 0
14#define CLK_AUDIO_PLL 1
15#define CLK_RPU_V_PLL 2
16#define CLK_RPU_L_PLL 3
17#define CLK_SYS_PLL 4
18#define CLK_WIFI_PLL 5
19#define CLK_BT_PLL 6
20
21/* Fixed-factor clocks */
22#define CLK_WIFI_DIV4 16
23#define CLK_WIFI_DIV8 17
24
25/* Gate clocks */
26#define CLK_MIPS 32
27#define CLK_AUDIO_IN 33
28#define CLK_AUDIO 34
29#define CLK_I2S 35
30#define CLK_SPDIF 36
31#define CLK_AUDIO_DAC 37
32#define CLK_RPU_V 38
33#define CLK_RPU_L 39
34#define CLK_RPU_SLEEP 40
35#define CLK_WIFI_PLL_GATE 41
36#define CLK_RPU_CORE 42
37#define CLK_WIFI_ADC 43
38#define CLK_WIFI_DAC 44
39#define CLK_USB_PHY 45
40#define CLK_ENET_IN 46
41#define CLK_ENET 47
42#define CLK_UART0 48
43#define CLK_UART1 49
44#define CLK_PERIPH_SYS 50
45#define CLK_SPI0 51
46#define CLK_SPI1 52
47#define CLK_EVENT_TIMER 53
48#define CLK_AUX_ADC_INTERNAL 54
49#define CLK_AUX_ADC 55
50#define CLK_SD_HOST 56
51#define CLK_BT 57
52#define CLK_BT_DIV4 58
53#define CLK_BT_DIV8 59
54#define CLK_BT_1MHZ 60
55
56/* Divider clocks */
57#define CLK_MIPS_INTERNAL_DIV 64
58#define CLK_MIPS_DIV 65
59#define CLK_AUDIO_DIV 66
60#define CLK_I2S_DIV 67
61#define CLK_SPDIF_DIV 68
62#define CLK_AUDIO_DAC_DIV 69
63#define CLK_RPU_V_DIV 70
64#define CLK_RPU_L_DIV 71
65#define CLK_RPU_SLEEP_DIV 72
66#define CLK_RPU_CORE_DIV 73
67#define CLK_USB_PHY_DIV 74
68#define CLK_ENET_DIV 75
69#define CLK_UART0_INTERNAL_DIV 76
70#define CLK_UART0_DIV 77
71#define CLK_UART1_INTERNAL_DIV 78
72#define CLK_UART1_DIV 79
73#define CLK_SYS_INTERNAL_DIV 80
74#define CLK_SPI0_INTERNAL_DIV 81
75#define CLK_SPI0_DIV 82
76#define CLK_SPI1_INTERNAL_DIV 83
77#define CLK_SPI1_DIV 84
78#define CLK_EVENT_TIMER_INTERNAL_DIV 85
79#define CLK_EVENT_TIMER_DIV 86
80#define CLK_AUX_ADC_INTERNAL_DIV 87
81#define CLK_AUX_ADC_DIV 88
82#define CLK_SD_HOST_DIV 89
83#define CLK_BT_DIV 90
84#define CLK_BT_DIV4_DIV 91
85#define CLK_BT_DIV8_DIV 92
86#define CLK_BT_1MHZ_INTERNAL_DIV 93
87#define CLK_BT_1MHZ_DIV 94
88
89/* Mux clocks */
90#define CLK_AUDIO_REF_MUX 96
91#define CLK_MIPS_PLL_MUX 97
92#define CLK_AUDIO_PLL_MUX 98
93#define CLK_AUDIO_MUX 99
94#define CLK_RPU_V_PLL_MUX 100
95#define CLK_RPU_L_PLL_MUX 101
96#define CLK_RPU_L_MUX 102
97#define CLK_WIFI_PLL_MUX 103
98#define CLK_WIFI_DIV4_MUX 104
99#define CLK_WIFI_DIV8_MUX 105
100#define CLK_RPU_CORE_MUX 106
101#define CLK_SYS_PLL_MUX 107
102#define CLK_ENET_MUX 108
103#define CLK_EVENT_TIMER_MUX 109
104#define CLK_SD_HOST_MUX 110
105#define CLK_BT_PLL_MUX 111
106#define CLK_DEBUG_MUX 112
107
108#define CLK_NR_CLKS 113
109
110/* Peripheral gate clocks */
111#define PERIPH_CLK_SYS 0
112#define PERIPH_CLK_SYS_BUS 1
113#define PERIPH_CLK_DDR 2
114#define PERIPH_CLK_ROM 3
115#define PERIPH_CLK_COUNTER_FAST 4
116#define PERIPH_CLK_COUNTER_SLOW 5
117#define PERIPH_CLK_IR 6
118#define PERIPH_CLK_WD 7
119#define PERIPH_CLK_PDM 8
120#define PERIPH_CLK_PWM 9
121#define PERIPH_CLK_I2C0 10
122#define PERIPH_CLK_I2C1 11
123#define PERIPH_CLK_I2C2 12
124#define PERIPH_CLK_I2C3 13
125
126/* Peripheral divider clocks */
127#define PERIPH_CLK_ROM_DIV 32
128#define PERIPH_CLK_COUNTER_FAST_DIV 33
129#define PERIPH_CLK_COUNTER_SLOW_PRE_DIV 34
130#define PERIPH_CLK_COUNTER_SLOW_DIV 35
131#define PERIPH_CLK_IR_PRE_DIV 36
132#define PERIPH_CLK_IR_DIV 37
133#define PERIPH_CLK_WD_PRE_DIV 38
134#define PERIPH_CLK_WD_DIV 39
135#define PERIPH_CLK_PDM_PRE_DIV 40
136#define PERIPH_CLK_PDM_DIV 41
137#define PERIPH_CLK_PWM_PRE_DIV 42
138#define PERIPH_CLK_PWM_DIV 43
139#define PERIPH_CLK_I2C0_PRE_DIV 44
140#define PERIPH_CLK_I2C0_DIV 45
141#define PERIPH_CLK_I2C1_PRE_DIV 46
142#define PERIPH_CLK_I2C1_DIV 47
143#define PERIPH_CLK_I2C2_PRE_DIV 48
144#define PERIPH_CLK_I2C2_DIV 49
145#define PERIPH_CLK_I2C3_PRE_DIV 50
146#define PERIPH_CLK_I2C3_DIV 51
147
148#define PERIPH_CLK_NR_CLKS 52
149
150/* System gate clocks */
151#define SYS_CLK_I2C0 0
152#define SYS_CLK_I2C1 1
153#define SYS_CLK_I2C2 2
154#define SYS_CLK_I2C3 3
155#define SYS_CLK_I2S_IN 4
156#define SYS_CLK_PAUD_OUT 5
157#define SYS_CLK_SPDIF_OUT 6
158#define SYS_CLK_SPI0_MASTER 7
159#define SYS_CLK_SPI0_SLAVE 8
160#define SYS_CLK_PWM 9
161#define SYS_CLK_UART0 10
162#define SYS_CLK_UART1 11
163#define SYS_CLK_SPI1 12
164#define SYS_CLK_MDC 13
165#define SYS_CLK_SD_HOST 14
166#define SYS_CLK_ENET 15
167#define SYS_CLK_IR 16
168#define SYS_CLK_WD 17
169#define SYS_CLK_TIMER 18
170#define SYS_CLK_I2S_OUT 24
171#define SYS_CLK_SPDIF_IN 25
172#define SYS_CLK_EVENT_TIMER 26
173#define SYS_CLK_HASH 27
174
175#define SYS_CLK_NR_CLKS 28
176
177/* Gates for external input clocks */
178#define EXT_CLK_AUDIO_IN 0
179#define EXT_CLK_ENET_IN 1
180
181#define EXT_CLK_NR_CLKS 2
182
183#endif /* _DT_BINDINGS_CLOCK_PISTACHIO_H */
diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h b/include/linux/bcm47xx_nvram.h
index ee59ffe99922..b12b07e75929 100644
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h
+++ b/include/linux/bcm47xx_nvram.h
@@ -1,7 +1,4 @@
1/* 1/*
2 * Copyright (C) 2005, Broadcom Corporation
3 * Copyright (C) 2006, Felix Fietkau <nbd@openwrt.org>
4 *
5 * This program is free software; you can redistribute it and/or modify it 2 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the 3 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your 4 * Free Software Foundation; either version 2 of the License, or (at your
@@ -14,8 +11,24 @@
14#include <linux/types.h> 11#include <linux/types.h>
15#include <linux/kernel.h> 12#include <linux/kernel.h>
16 13
14#ifdef CONFIG_BCM47XX
17int bcm47xx_nvram_init_from_mem(u32 base, u32 lim); 15int bcm47xx_nvram_init_from_mem(u32 base, u32 lim);
18int bcm47xx_nvram_getenv(const char *name, char *val, size_t val_len); 16int bcm47xx_nvram_getenv(const char *name, char *val, size_t val_len);
19int bcm47xx_nvram_gpio_pin(const char *name); 17int bcm47xx_nvram_gpio_pin(const char *name);
18#else
19static inline int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
20{
21 return -ENOTSUPP;
22};
23static inline int bcm47xx_nvram_getenv(const char *name, char *val,
24 size_t val_len)
25{
26 return -ENOTSUPP;
27};
28static inline int bcm47xx_nvram_gpio_pin(const char *name)
29{
30 return -ENOTSUPP;
31};
32#endif
20 33
21#endif /* __BCM47XX_NVRAM_H */ 34#endif /* __BCM47XX_NVRAM_H */
diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
index be4fa5ddf36c..ea17cca9e685 100644
--- a/include/linux/bitmap.h
+++ b/include/linux/bitmap.h
@@ -283,16 +283,16 @@ static inline int bitmap_empty(const unsigned long *src, unsigned nbits)
283{ 283{
284 if (small_const_nbits(nbits)) 284 if (small_const_nbits(nbits))
285 return ! (*src & BITMAP_LAST_WORD_MASK(nbits)); 285 return ! (*src & BITMAP_LAST_WORD_MASK(nbits));
286 else 286
287 return __bitmap_empty(src, nbits); 287 return find_first_bit(src, nbits) == nbits;
288} 288}
289 289
290static inline int bitmap_full(const unsigned long *src, unsigned int nbits) 290static inline int bitmap_full(const unsigned long *src, unsigned int nbits)
291{ 291{
292 if (small_const_nbits(nbits)) 292 if (small_const_nbits(nbits))
293 return ! (~(*src) & BITMAP_LAST_WORD_MASK(nbits)); 293 return ! (~(*src) & BITMAP_LAST_WORD_MASK(nbits));
294 else 294
295 return __bitmap_full(src, nbits); 295 return find_first_zero_bit(src, nbits) == nbits;
296} 296}
297 297
298static inline int bitmap_weight(const unsigned long *src, unsigned int nbits) 298static inline int bitmap_weight(const unsigned long *src, unsigned int nbits)
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index 5d858e02997f..297f5bda4fdf 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -218,9 +218,9 @@ static inline unsigned long __ffs64(u64 word)
218/** 218/**
219 * find_last_bit - find the last set bit in a memory region 219 * find_last_bit - find the last set bit in a memory region
220 * @addr: The address to start the search at 220 * @addr: The address to start the search at
221 * @size: The maximum size to search 221 * @size: The number of bits to search
222 * 222 *
223 * Returns the bit number of the first set bit, or size. 223 * Returns the bit number of the last set bit, or size.
224 */ 224 */
225extern unsigned long find_last_bit(const unsigned long *addr, 225extern unsigned long find_last_bit(const unsigned long *addr,
226 unsigned long size); 226 unsigned long size);
diff --git a/include/linux/blk-mq.h b/include/linux/blk-mq.h
index 7aec86127335..2056a99b92f8 100644
--- a/include/linux/blk-mq.h
+++ b/include/linux/blk-mq.h
@@ -13,7 +13,7 @@ struct blk_mq_cpu_notifier {
13}; 13};
14 14
15struct blk_mq_ctxmap { 15struct blk_mq_ctxmap {
16 unsigned int map_size; 16 unsigned int size;
17 unsigned int bits_per_word; 17 unsigned int bits_per_word;
18 struct blk_align_bitmap *map; 18 struct blk_align_bitmap *map;
19}; 19};
@@ -164,6 +164,8 @@ enum {
164 << BLK_MQ_F_ALLOC_POLICY_START_BIT) 164 << BLK_MQ_F_ALLOC_POLICY_START_BIT)
165 165
166struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *); 166struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *);
167struct request_queue *blk_mq_init_allocated_queue(struct blk_mq_tag_set *set,
168 struct request_queue *q);
167void blk_mq_finish_init(struct request_queue *q); 169void blk_mq_finish_init(struct request_queue *q);
168int blk_mq_register_disk(struct gendisk *); 170int blk_mq_register_disk(struct gendisk *);
169void blk_mq_unregister_disk(struct gendisk *); 171void blk_mq_unregister_disk(struct gendisk *);
@@ -218,6 +220,7 @@ void blk_mq_start_hw_queue(struct blk_mq_hw_ctx *hctx);
218void blk_mq_stop_hw_queues(struct request_queue *q); 220void blk_mq_stop_hw_queues(struct request_queue *q);
219void blk_mq_start_hw_queues(struct request_queue *q); 221void blk_mq_start_hw_queues(struct request_queue *q);
220void blk_mq_start_stopped_hw_queues(struct request_queue *q, bool async); 222void blk_mq_start_stopped_hw_queues(struct request_queue *q, bool async);
223void blk_mq_run_hw_queues(struct request_queue *q, bool async);
221void blk_mq_delay_queue(struct blk_mq_hw_ctx *hctx, unsigned long msecs); 224void blk_mq_delay_queue(struct blk_mq_hw_ctx *hctx, unsigned long msecs);
222void blk_mq_tag_busy_iter(struct blk_mq_hw_ctx *hctx, busy_iter_fn *fn, 225void blk_mq_tag_busy_iter(struct blk_mq_hw_ctx *hctx, busy_iter_fn *fn,
223 void *priv); 226 void *priv);
@@ -227,7 +230,7 @@ void blk_mq_freeze_queue_start(struct request_queue *q);
227 230
228/* 231/*
229 * Driver command data is immediately after the request. So subtract request 232 * Driver command data is immediately after the request. So subtract request
230 * size to get back to the original request. 233 * size to get back to the original request, add request size to get the PDU.
231 */ 234 */
232static inline struct request *blk_mq_rq_from_pdu(void *pdu) 235static inline struct request *blk_mq_rq_from_pdu(void *pdu)
233{ 236{
@@ -235,7 +238,7 @@ static inline struct request *blk_mq_rq_from_pdu(void *pdu)
235} 238}
236static inline void *blk_mq_rq_to_pdu(struct request *rq) 239static inline void *blk_mq_rq_to_pdu(struct request *rq)
237{ 240{
238 return (void *) rq + sizeof(*rq); 241 return rq + 1;
239} 242}
240 243
241#define queue_for_each_hw_ctx(q, hctx, i) \ 244#define queue_for_each_hw_ctx(q, hctx, i) \
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index d8358799c594..df334cbacc6d 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -404,26 +404,11 @@ static inline bool d_mountpoint(const struct dentry *dentry)
404/* 404/*
405 * Directory cache entry type accessor functions. 405 * Directory cache entry type accessor functions.
406 */ 406 */
407static inline void __d_set_type(struct dentry *dentry, unsigned type)
408{
409 dentry->d_flags = (dentry->d_flags & ~DCACHE_ENTRY_TYPE) | type;
410}
411
412static inline void __d_clear_type(struct dentry *dentry)
413{
414 __d_set_type(dentry, DCACHE_MISS_TYPE);
415}
416
417static inline void d_set_type(struct dentry *dentry, unsigned type)
418{
419 spin_lock(&dentry->d_lock);
420 __d_set_type(dentry, type);
421 spin_unlock(&dentry->d_lock);
422}
423
424static inline unsigned __d_entry_type(const struct dentry *dentry) 407static inline unsigned __d_entry_type(const struct dentry *dentry)
425{ 408{
426 return dentry->d_flags & DCACHE_ENTRY_TYPE; 409 unsigned type = READ_ONCE(dentry->d_flags);
410 smp_rmb();
411 return type & DCACHE_ENTRY_TYPE;
427} 412}
428 413
429static inline bool d_is_miss(const struct dentry *dentry) 414static inline bool d_is_miss(const struct dentry *dentry)
@@ -482,6 +467,44 @@ static inline bool d_is_positive(const struct dentry *dentry)
482 return !d_is_negative(dentry); 467 return !d_is_negative(dentry);
483} 468}
484 469
470/**
471 * d_really_is_negative - Determine if a dentry is really negative (ignoring fallthroughs)
472 * @dentry: The dentry in question
473 *
474 * Returns true if the dentry represents either an absent name or a name that
475 * doesn't map to an inode (ie. ->d_inode is NULL). The dentry could represent
476 * a true miss, a whiteout that isn't represented by a 0,0 chardev or a
477 * fallthrough marker in an opaque directory.
478 *
479 * Note! (1) This should be used *only* by a filesystem to examine its own
480 * dentries. It should not be used to look at some other filesystem's
481 * dentries. (2) It should also be used in combination with d_inode() to get
482 * the inode. (3) The dentry may have something attached to ->d_lower and the
483 * type field of the flags may be set to something other than miss or whiteout.
484 */
485static inline bool d_really_is_negative(const struct dentry *dentry)
486{
487 return dentry->d_inode == NULL;
488}
489
490/**
491 * d_really_is_positive - Determine if a dentry is really positive (ignoring fallthroughs)
492 * @dentry: The dentry in question
493 *
494 * Returns true if the dentry represents a name that maps to an inode
495 * (ie. ->d_inode is not NULL). The dentry might still represent a whiteout if
496 * that is represented on medium as a 0,0 chardev.
497 *
498 * Note! (1) This should be used *only* by a filesystem to examine its own
499 * dentries. It should not be used to look at some other filesystem's
500 * dentries. (2) It should also be used in combination with d_inode() to get
501 * the inode.
502 */
503static inline bool d_really_is_positive(const struct dentry *dentry)
504{
505 return dentry->d_inode != NULL;
506}
507
485extern void d_set_fallthru(struct dentry *dentry); 508extern void d_set_fallthru(struct dentry *dentry);
486 509
487static inline bool d_is_fallthru(const struct dentry *dentry) 510static inline bool d_is_fallthru(const struct dentry *dentry)
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index c3007cb4bfa6..ac07ff090919 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -34,6 +34,10 @@ struct dma_map_ops {
34 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, 34 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
35 size_t size, enum dma_data_direction dir, 35 size_t size, enum dma_data_direction dir,
36 struct dma_attrs *attrs); 36 struct dma_attrs *attrs);
37 /*
38 * map_sg returns 0 on error and a value > 0 on success.
39 * It should never return a value < 0.
40 */
37 int (*map_sg)(struct device *dev, struct scatterlist *sg, 41 int (*map_sg)(struct device *dev, struct scatterlist *sg,
38 int nents, enum dma_data_direction dir, 42 int nents, enum dma_data_direction dir,
39 struct dma_attrs *attrs); 43 struct dma_attrs *attrs);
diff --git a/include/linux/fs.h b/include/linux/fs.h
index f4fc60727b8d..c7496f263860 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -315,6 +315,8 @@ struct address_space;
315struct writeback_control; 315struct writeback_control;
316 316
317#define IOCB_EVENTFD (1 << 0) 317#define IOCB_EVENTFD (1 << 0)
318#define IOCB_APPEND (1 << 1)
319#define IOCB_DIRECT (1 << 2)
318 320
319struct kiocb { 321struct kiocb {
320 struct file *ki_filp; 322 struct file *ki_filp;
@@ -329,10 +331,13 @@ static inline bool is_sync_kiocb(struct kiocb *kiocb)
329 return kiocb->ki_complete == NULL; 331 return kiocb->ki_complete == NULL;
330} 332}
331 333
334static inline int iocb_flags(struct file *file);
335
332static inline void init_sync_kiocb(struct kiocb *kiocb, struct file *filp) 336static inline void init_sync_kiocb(struct kiocb *kiocb, struct file *filp)
333{ 337{
334 *kiocb = (struct kiocb) { 338 *kiocb = (struct kiocb) {
335 .ki_filp = filp, 339 .ki_filp = filp,
340 .ki_flags = iocb_flags(filp),
336 }; 341 };
337} 342}
338 343
@@ -383,7 +388,7 @@ struct address_space_operations {
383 void (*invalidatepage) (struct page *, unsigned int, unsigned int); 388 void (*invalidatepage) (struct page *, unsigned int, unsigned int);
384 int (*releasepage) (struct page *, gfp_t); 389 int (*releasepage) (struct page *, gfp_t);
385 void (*freepage)(struct page *); 390 void (*freepage)(struct page *);
386 ssize_t (*direct_IO)(int, struct kiocb *, struct iov_iter *iter, loff_t offset); 391 ssize_t (*direct_IO)(struct kiocb *, struct iov_iter *iter, loff_t offset);
387 /* 392 /*
388 * migrate the contents of a page to the specified target. If 393 * migrate the contents of a page to the specified target. If
389 * migrate_mode is MIGRATE_ASYNC, it must not block. 394 * migrate_mode is MIGRATE_ASYNC, it must not block.
@@ -870,6 +875,7 @@ static inline struct file *get_file(struct file *f)
870 atomic_long_inc(&f->f_count); 875 atomic_long_inc(&f->f_count);
871 return f; 876 return f;
872} 877}
878#define get_file_rcu(x) atomic_long_inc_not_zero(&(x)->f_count)
873#define fput_atomic(x) atomic_long_add_unless(&(x)->f_count, -1, 1) 879#define fput_atomic(x) atomic_long_add_unless(&(x)->f_count, -1, 1)
874#define file_count(x) atomic_long_read(&(x)->f_count) 880#define file_count(x) atomic_long_read(&(x)->f_count)
875 881
@@ -1041,6 +1047,9 @@ extern void lease_get_mtime(struct inode *, struct timespec *time);
1041extern int generic_setlease(struct file *, long, struct file_lock **, void **priv); 1047extern int generic_setlease(struct file *, long, struct file_lock **, void **priv);
1042extern int vfs_setlease(struct file *, long, struct file_lock **, void **); 1048extern int vfs_setlease(struct file *, long, struct file_lock **, void **);
1043extern int lease_modify(struct file_lock *, int, struct list_head *); 1049extern int lease_modify(struct file_lock *, int, struct list_head *);
1050struct files_struct;
1051extern void show_fd_locks(struct seq_file *f,
1052 struct file *filp, struct files_struct *files);
1044#else /* !CONFIG_FILE_LOCKING */ 1053#else /* !CONFIG_FILE_LOCKING */
1045static inline int fcntl_getlk(struct file *file, unsigned int cmd, 1054static inline int fcntl_getlk(struct file *file, unsigned int cmd,
1046 struct flock __user *user) 1055 struct flock __user *user)
@@ -1177,6 +1186,10 @@ static inline int lease_modify(struct file_lock *fl, int arg,
1177{ 1186{
1178 return -EINVAL; 1187 return -EINVAL;
1179} 1188}
1189
1190struct files_struct;
1191static inline void show_fd_locks(struct seq_file *f,
1192 struct file *filp, struct files_struct *files) {}
1180#endif /* !CONFIG_FILE_LOCKING */ 1193#endif /* !CONFIG_FILE_LOCKING */
1181 1194
1182 1195
@@ -2566,7 +2579,7 @@ extern int sb_min_blocksize(struct super_block *, int);
2566 2579
2567extern int generic_file_mmap(struct file *, struct vm_area_struct *); 2580extern int generic_file_mmap(struct file *, struct vm_area_struct *);
2568extern int generic_file_readonly_mmap(struct file *, struct vm_area_struct *); 2581extern int generic_file_readonly_mmap(struct file *, struct vm_area_struct *);
2569int generic_write_checks(struct file *file, loff_t *pos, size_t *count, int isblk); 2582extern ssize_t generic_write_checks(struct kiocb *, struct iov_iter *);
2570extern ssize_t generic_file_read_iter(struct kiocb *, struct iov_iter *); 2583extern ssize_t generic_file_read_iter(struct kiocb *, struct iov_iter *);
2571extern ssize_t __generic_file_write_iter(struct kiocb *, struct iov_iter *); 2584extern ssize_t __generic_file_write_iter(struct kiocb *, struct iov_iter *);
2572extern ssize_t generic_file_write_iter(struct kiocb *, struct iov_iter *); 2585extern ssize_t generic_file_write_iter(struct kiocb *, struct iov_iter *);
@@ -2609,8 +2622,8 @@ extern loff_t fixed_size_llseek(struct file *file, loff_t offset,
2609extern int generic_file_open(struct inode * inode, struct file * filp); 2622extern int generic_file_open(struct inode * inode, struct file * filp);
2610extern int nonseekable_open(struct inode * inode, struct file * filp); 2623extern int nonseekable_open(struct inode * inode, struct file * filp);
2611 2624
2612ssize_t dax_do_io(int rw, struct kiocb *, struct inode *, struct iov_iter *, 2625ssize_t dax_do_io(struct kiocb *, struct inode *, struct iov_iter *, loff_t,
2613 loff_t, get_block_t, dio_iodone_t, int flags); 2626 get_block_t, dio_iodone_t, int flags);
2614int dax_clear_blocks(struct inode *, sector_t block, long size); 2627int dax_clear_blocks(struct inode *, sector_t block, long size);
2615int dax_zero_page_range(struct inode *, loff_t from, unsigned len, get_block_t); 2628int dax_zero_page_range(struct inode *, loff_t from, unsigned len, get_block_t);
2616int dax_truncate_page(struct inode *, loff_t from, get_block_t); 2629int dax_truncate_page(struct inode *, loff_t from, get_block_t);
@@ -2635,16 +2648,18 @@ enum {
2635 2648
2636void dio_end_io(struct bio *bio, int error); 2649void dio_end_io(struct bio *bio, int error);
2637 2650
2638ssize_t __blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode, 2651ssize_t __blockdev_direct_IO(struct kiocb *iocb, struct inode *inode,
2639 struct block_device *bdev, struct iov_iter *iter, loff_t offset, 2652 struct block_device *bdev, struct iov_iter *iter,
2640 get_block_t get_block, dio_iodone_t end_io, 2653 loff_t offset, get_block_t get_block,
2641 dio_submit_t submit_io, int flags); 2654 dio_iodone_t end_io, dio_submit_t submit_io,
2655 int flags);
2642 2656
2643static inline ssize_t blockdev_direct_IO(int rw, struct kiocb *iocb, 2657static inline ssize_t blockdev_direct_IO(struct kiocb *iocb,
2644 struct inode *inode, struct iov_iter *iter, loff_t offset, 2658 struct inode *inode,
2645 get_block_t get_block) 2659 struct iov_iter *iter, loff_t offset,
2660 get_block_t get_block)
2646{ 2661{
2647 return __blockdev_direct_IO(rw, iocb, inode, inode->i_sb->s_bdev, iter, 2662 return __blockdev_direct_IO(iocb, inode, inode->i_sb->s_bdev, iter,
2648 offset, get_block, NULL, NULL, 2663 offset, get_block, NULL, NULL,
2649 DIO_LOCKING | DIO_SKIP_HOLES); 2664 DIO_LOCKING | DIO_SKIP_HOLES);
2650} 2665}
@@ -2777,6 +2792,16 @@ static inline bool io_is_direct(struct file *filp)
2777 return (filp->f_flags & O_DIRECT) || IS_DAX(file_inode(filp)); 2792 return (filp->f_flags & O_DIRECT) || IS_DAX(file_inode(filp));
2778} 2793}
2779 2794
2795static inline int iocb_flags(struct file *file)
2796{
2797 int res = 0;
2798 if (file->f_flags & O_APPEND)
2799 res |= IOCB_APPEND;
2800 if (io_is_direct(file))
2801 res |= IOCB_DIRECT;
2802 return res;
2803}
2804
2780static inline ino_t parent_ino(struct dentry *dentry) 2805static inline ino_t parent_ino(struct dentry *dentry)
2781{ 2806{
2782 ino_t res; 2807 ino_t res;
diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h
index 3ea2e4754c40..9b1ad3734911 100644
--- a/include/linux/irqchip/mips-gic.h
+++ b/include/linux/irqchip/mips-gic.h
@@ -165,6 +165,8 @@
165#define GIC_VPE_PEND_SWINT0_MSK (MSK(1) << GIC_VPE_PEND_SWINT0_SHF) 165#define GIC_VPE_PEND_SWINT0_MSK (MSK(1) << GIC_VPE_PEND_SWINT0_SHF)
166#define GIC_VPE_PEND_SWINT1_SHF 5 166#define GIC_VPE_PEND_SWINT1_SHF 5
167#define GIC_VPE_PEND_SWINT1_MSK (MSK(1) << GIC_VPE_PEND_SWINT1_SHF) 167#define GIC_VPE_PEND_SWINT1_MSK (MSK(1) << GIC_VPE_PEND_SWINT1_SHF)
168#define GIC_VPE_PEND_FDC_SHF 6
169#define GIC_VPE_PEND_FDC_MSK (MSK(1) << GIC_VPE_PEND_FDC_SHF)
168 170
169/* GIC_VPE_RMASK Masks */ 171/* GIC_VPE_RMASK Masks */
170#define GIC_VPE_RMASK_WD_SHF 0 172#define GIC_VPE_RMASK_WD_SHF 0
@@ -179,6 +181,8 @@
179#define GIC_VPE_RMASK_SWINT0_MSK (MSK(1) << GIC_VPE_RMASK_SWINT0_SHF) 181#define GIC_VPE_RMASK_SWINT0_MSK (MSK(1) << GIC_VPE_RMASK_SWINT0_SHF)
180#define GIC_VPE_RMASK_SWINT1_SHF 5 182#define GIC_VPE_RMASK_SWINT1_SHF 5
181#define GIC_VPE_RMASK_SWINT1_MSK (MSK(1) << GIC_VPE_RMASK_SWINT1_SHF) 183#define GIC_VPE_RMASK_SWINT1_MSK (MSK(1) << GIC_VPE_RMASK_SWINT1_SHF)
184#define GIC_VPE_RMASK_FDC_SHF 6
185#define GIC_VPE_RMASK_FDC_MSK (MSK(1) << GIC_VPE_RMASK_FDC_SHF)
182 186
183/* GIC_VPE_SMASK Masks */ 187/* GIC_VPE_SMASK Masks */
184#define GIC_VPE_SMASK_WD_SHF 0 188#define GIC_VPE_SMASK_WD_SHF 0
@@ -193,6 +197,8 @@
193#define GIC_VPE_SMASK_SWINT0_MSK (MSK(1) << GIC_VPE_SMASK_SWINT0_SHF) 197#define GIC_VPE_SMASK_SWINT0_MSK (MSK(1) << GIC_VPE_SMASK_SWINT0_SHF)
194#define GIC_VPE_SMASK_SWINT1_SHF 5 198#define GIC_VPE_SMASK_SWINT1_SHF 5
195#define GIC_VPE_SMASK_SWINT1_MSK (MSK(1) << GIC_VPE_SMASK_SWINT1_SHF) 199#define GIC_VPE_SMASK_SWINT1_MSK (MSK(1) << GIC_VPE_SMASK_SWINT1_SHF)
200#define GIC_VPE_SMASK_FDC_SHF 6
201#define GIC_VPE_SMASK_FDC_MSK (MSK(1) << GIC_VPE_SMASK_FDC_SHF)
196 202
197/* GIC nomenclature for Core Interrupt Pins. */ 203/* GIC nomenclature for Core Interrupt Pins. */
198#define GIC_CPU_INT0 0 /* Core Interrupt 2 */ 204#define GIC_CPU_INT0 0 /* Core Interrupt 2 */
@@ -247,4 +253,5 @@ extern unsigned int plat_ipi_call_int_xlate(unsigned int);
247extern unsigned int plat_ipi_resched_int_xlate(unsigned int); 253extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
248extern int gic_get_c0_compare_int(void); 254extern int gic_get_c0_compare_int(void);
249extern int gic_get_c0_perfcount_int(void); 255extern int gic_get_c0_perfcount_int(void);
256extern int gic_get_c0_fdc_int(void);
250#endif /* __LINUX_IRQCHIP_MIPS_GIC_H */ 257#endif /* __LINUX_IRQCHIP_MIPS_GIC_H */
diff --git a/include/linux/kconfig.h b/include/linux/kconfig.h
index be342b94c640..63ca8dacec59 100644
--- a/include/linux/kconfig.h
+++ b/include/linux/kconfig.h
@@ -23,14 +23,6 @@
23#define ___config_enabled(__ignored, val, ...) val 23#define ___config_enabled(__ignored, val, ...) val
24 24
25/* 25/*
26 * IS_ENABLED(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y' or 'm',
27 * 0 otherwise.
28 *
29 */
30#define IS_ENABLED(option) \
31 (config_enabled(option) || config_enabled(option##_MODULE))
32
33/*
34 * IS_BUILTIN(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y', 0 26 * IS_BUILTIN(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y', 0
35 * otherwise. For boolean options, this is equivalent to 27 * otherwise. For boolean options, this is equivalent to
36 * IS_ENABLED(CONFIG_FOO). 28 * IS_ENABLED(CONFIG_FOO).
@@ -43,4 +35,11 @@
43 */ 35 */
44#define IS_MODULE(option) config_enabled(option##_MODULE) 36#define IS_MODULE(option) config_enabled(option##_MODULE)
45 37
38/*
39 * IS_ENABLED(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y' or 'm',
40 * 0 otherwise.
41 */
42#define IS_ENABLED(option) \
43 (IS_BUILTIN(option) || IS_MODULE(option))
44
46#endif /* __LINUX_KCONFIG_H */ 45#endif /* __LINUX_KCONFIG_H */
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index d6d630d31ef3..3a5b48e52a9e 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -103,6 +103,18 @@
103 (((__x) - ((__d) / 2)) / (__d)); \ 103 (((__x) - ((__d) / 2)) / (__d)); \
104} \ 104} \
105) 105)
106/*
107 * Same as above but for u64 dividends. divisor must be a 32-bit
108 * number.
109 */
110#define DIV_ROUND_CLOSEST_ULL(x, divisor)( \
111{ \
112 typeof(divisor) __d = divisor; \
113 unsigned long long _tmp = (x) + (__d) / 2; \
114 do_div(_tmp, __d); \
115 _tmp; \
116} \
117)
106 118
107/* 119/*
108 * Multiplies an integer by a fraction, while avoiding unnecessary 120 * Multiplies an integer by a fraction, while avoiding unnecessary
diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/rtc.h
index b6401e7661c7..29c30ac36020 100644
--- a/include/linux/mfd/samsung/rtc.h
+++ b/include/linux/mfd/samsung/rtc.h
@@ -105,6 +105,8 @@ enum s2mps_rtc_reg {
105#define S5M_RTC_UDR_MASK (1 << S5M_RTC_UDR_SHIFT) 105#define S5M_RTC_UDR_MASK (1 << S5M_RTC_UDR_SHIFT)
106#define S2MPS_RTC_WUDR_SHIFT 4 106#define S2MPS_RTC_WUDR_SHIFT 4
107#define S2MPS_RTC_WUDR_MASK (1 << S2MPS_RTC_WUDR_SHIFT) 107#define S2MPS_RTC_WUDR_MASK (1 << S2MPS_RTC_WUDR_SHIFT)
108#define S2MPS13_RTC_AUDR_SHIFT 1
109#define S2MPS13_RTC_AUDR_MASK (1 << S2MPS13_RTC_AUDR_SHIFT)
108#define S2MPS_RTC_RUDR_SHIFT 0 110#define S2MPS_RTC_RUDR_SHIFT 0
109#define S2MPS_RTC_RUDR_MASK (1 << S2MPS_RTC_RUDR_SHIFT) 111#define S2MPS_RTC_RUDR_MASK (1 << S2MPS_RTC_RUDR_SHIFT)
110#define RTC_TCON_SHIFT 1 112#define RTC_TCON_SHIFT 1
diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h
index 590630eb59ba..8d37e26a1007 100644
--- a/include/linux/mm_types.h
+++ b/include/linux/mm_types.h
@@ -429,7 +429,7 @@ struct mm_struct {
429#endif 429#endif
430 430
431 /* store ref to file /proc/<pid>/exe symlink points to */ 431 /* store ref to file /proc/<pid>/exe symlink points to */
432 struct file *exe_file; 432 struct file __rcu *exe_file;
433#ifdef CONFIG_MMU_NOTIFIER 433#ifdef CONFIG_MMU_NOTIFIER
434 struct mmu_notifier_mm *mmu_notifier_mm; 434 struct mmu_notifier_mm *mmu_notifier_mm;
435#endif 435#endif
diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h
index e530533b94be..3bfd56778c29 100644
--- a/include/linux/mod_devicetable.h
+++ b/include/linux/mod_devicetable.h
@@ -546,6 +546,14 @@ struct amba_id {
546 void *data; 546 void *data;
547}; 547};
548 548
549/**
550 * struct mips_cdmm_device_id - identifies devices in MIPS CDMM bus
551 * @type: Device type identifier.
552 */
553struct mips_cdmm_device_id {
554 __u8 type;
555};
556
549/* 557/*
550 * Match x86 CPUs for CPU specific drivers. 558 * Match x86 CPUs for CPU specific drivers.
551 * See documentation of "x86_match_cpu" for details. 559 * See documentation of "x86_match_cpu" for details.
diff --git a/include/linux/nbd.h b/include/linux/nbd.h
deleted file mode 100644
index f62f78aef4ac..000000000000
--- a/include/linux/nbd.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * 1999 Copyright (C) Pavel Machek, pavel@ucw.cz. This code is GPL.
3 * 1999/11/04 Copyright (C) 1999 VMware, Inc. (Regis "HPReg" Duchesne)
4 * Made nbd_end_request() use the io_request_lock
5 * 2001 Copyright (C) Steven Whitehouse
6 * New nbd_end_request() for compatibility with new linux block
7 * layer code.
8 * 2003/06/24 Louis D. Langholtz <ldl@aros.net>
9 * Removed unneeded blksize_bits field from nbd_device struct.
10 * Cleanup PARANOIA usage & code.
11 * 2004/02/19 Paul Clements
12 * Removed PARANOIA, plus various cleanup and comments
13 */
14#ifndef LINUX_NBD_H
15#define LINUX_NBD_H
16
17
18#include <linux/wait.h>
19#include <linux/mutex.h>
20#include <uapi/linux/nbd.h>
21
22struct request;
23
24struct nbd_device {
25 int flags;
26 int harderror; /* Code of hard error */
27 struct socket * sock; /* If == NULL, device is not ready, yet */
28 int magic;
29
30 spinlock_t queue_lock;
31 struct list_head queue_head; /* Requests waiting result */
32 struct request *active_req;
33 wait_queue_head_t active_wq;
34 struct list_head waiting_queue; /* Requests to be sent */
35 wait_queue_head_t waiting_wq;
36
37 struct mutex tx_lock;
38 struct gendisk *disk;
39 int blksize;
40 u64 bytesize;
41 pid_t pid; /* pid of nbd-client, if attached */
42 int xmit_timeout;
43 int disconnect; /* a disconnect has been requested by user */
44};
45
46#endif
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index b01ccf371fdc..410abd172feb 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -447,13 +447,12 @@ static inline struct rpc_cred *nfs_file_cred(struct file *file)
447/* 447/*
448 * linux/fs/nfs/direct.c 448 * linux/fs/nfs/direct.c
449 */ 449 */
450extern ssize_t nfs_direct_IO(int, struct kiocb *, struct iov_iter *, loff_t); 450extern ssize_t nfs_direct_IO(struct kiocb *, struct iov_iter *, loff_t);
451extern ssize_t nfs_file_direct_read(struct kiocb *iocb, 451extern ssize_t nfs_file_direct_read(struct kiocb *iocb,
452 struct iov_iter *iter, 452 struct iov_iter *iter,
453 loff_t pos); 453 loff_t pos);
454extern ssize_t nfs_file_direct_write(struct kiocb *iocb, 454extern ssize_t nfs_file_direct_write(struct kiocb *iocb,
455 struct iov_iter *iter, 455 struct iov_iter *iter);
456 loff_t pos);
457 456
458/* 457/*
459 * linux/fs/nfs/dir.c 458 * linux/fs/nfs/dir.c
diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index 0adad4a5419b..8dbd05e70f09 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -117,8 +117,9 @@ struct nvme_ns {
117 117
118 unsigned ns_id; 118 unsigned ns_id;
119 int lba_shift; 119 int lba_shift;
120 int ms; 120 u16 ms;
121 int pi_type; 121 bool ext;
122 u8 pi_type;
122 u64 mode_select_num_blocks; 123 u64 mode_select_num_blocks;
123 u32 mode_select_block_len; 124 u32 mode_select_block_len;
124}; 125};
diff --git a/include/linux/quota.h b/include/linux/quota.h
index d534e8ed308a..b2505acfd3c0 100644
--- a/include/linux/quota.h
+++ b/include/linux/quota.h
@@ -50,6 +50,7 @@
50 50
51#undef USRQUOTA 51#undef USRQUOTA
52#undef GRPQUOTA 52#undef GRPQUOTA
53#undef PRJQUOTA
53enum quota_type { 54enum quota_type {
54 USRQUOTA = 0, /* element used for user quotas */ 55 USRQUOTA = 0, /* element used for user quotas */
55 GRPQUOTA = 1, /* element used for group quotas */ 56 GRPQUOTA = 1, /* element used for group quotas */
@@ -319,6 +320,7 @@ struct dquot_operations {
319 /* get reserved quota for delayed alloc, value returned is managed by 320 /* get reserved quota for delayed alloc, value returned is managed by
320 * quota code only */ 321 * quota code only */
321 qsize_t *(*get_reserved_space) (struct inode *); 322 qsize_t *(*get_reserved_space) (struct inode *);
323 int (*get_projid) (struct inode *, kprojid_t *);/* Get project ID */
322}; 324};
323 325
324struct path; 326struct path;
@@ -344,7 +346,10 @@ struct qc_dqblk {
344 int d_rt_spc_warns; /* # warnings issued wrt RT space */ 346 int d_rt_spc_warns; /* # warnings issued wrt RT space */
345}; 347};
346 348
347/* Field specifiers for ->set_dqblk() in struct qc_dqblk */ 349/*
350 * Field specifiers for ->set_dqblk() in struct qc_dqblk and also for
351 * ->set_info() in struct qc_info
352 */
348#define QC_INO_SOFT (1<<0) 353#define QC_INO_SOFT (1<<0)
349#define QC_INO_HARD (1<<1) 354#define QC_INO_HARD (1<<1)
350#define QC_SPC_SOFT (1<<2) 355#define QC_SPC_SOFT (1<<2)
@@ -365,6 +370,51 @@ struct qc_dqblk {
365#define QC_INO_COUNT (1<<13) 370#define QC_INO_COUNT (1<<13)
366#define QC_RT_SPACE (1<<14) 371#define QC_RT_SPACE (1<<14)
367#define QC_ACCT_MASK (QC_SPACE | QC_INO_COUNT | QC_RT_SPACE) 372#define QC_ACCT_MASK (QC_SPACE | QC_INO_COUNT | QC_RT_SPACE)
373#define QC_FLAGS (1<<15)
374
375#define QCI_SYSFILE (1 << 0) /* Quota file is hidden from userspace */
376#define QCI_ROOT_SQUASH (1 << 1) /* Root squash turned on */
377#define QCI_ACCT_ENABLED (1 << 2) /* Quota accounting enabled */
378#define QCI_LIMITS_ENFORCED (1 << 3) /* Quota limits enforced */
379
380/* Structures for communicating via ->get_state */
381struct qc_type_state {
382 unsigned int flags; /* Flags QCI_* */
383 unsigned int spc_timelimit; /* Time after which space softlimit is
384 * enforced */
385 unsigned int ino_timelimit; /* Ditto for inode softlimit */
386 unsigned int rt_spc_timelimit; /* Ditto for real-time space */
387 unsigned int spc_warnlimit; /* Limit for number of space warnings */
388 unsigned int ino_warnlimit; /* Ditto for inodes */
389 unsigned int rt_spc_warnlimit; /* Ditto for real-time space */
390 unsigned long long ino; /* Inode number of quota file */
391 blkcnt_t blocks; /* Number of 512-byte blocks in the file */
392 blkcnt_t nextents; /* Number of extents in the file */
393};
394
395struct qc_state {
396 unsigned int s_incoredqs; /* Number of dquots in core */
397 /*
398 * Per quota type information. The array should really have
399 * max(MAXQUOTAS, XQM_MAXQUOTAS) entries. BUILD_BUG_ON in
400 * quota_getinfo() makes sure XQM_MAXQUOTAS is large enough. Once VFS
401 * supports project quotas, this can be changed to MAXQUOTAS
402 */
403 struct qc_type_state s_state[XQM_MAXQUOTAS];
404};
405
406/* Structure for communicating via ->set_info */
407struct qc_info {
408 int i_fieldmask; /* mask of fields to change in ->set_info() */
409 unsigned int i_flags; /* Flags QCI_* */
410 unsigned int i_spc_timelimit; /* Time after which space softlimit is
411 * enforced */
412 unsigned int i_ino_timelimit; /* Ditto for inode softlimit */
413 unsigned int i_rt_spc_timelimit;/* Ditto for real-time space */
414 unsigned int i_spc_warnlimit; /* Limit for number of space warnings */
415 unsigned int i_ino_warnlimit; /* Limit for number of inode warnings */
416 unsigned int i_rt_spc_warnlimit; /* Ditto for real-time space */
417};
368 418
369/* Operations handling requests from userspace */ 419/* Operations handling requests from userspace */
370struct quotactl_ops { 420struct quotactl_ops {
@@ -373,12 +423,10 @@ struct quotactl_ops {
373 int (*quota_enable)(struct super_block *, unsigned int); 423 int (*quota_enable)(struct super_block *, unsigned int);
374 int (*quota_disable)(struct super_block *, unsigned int); 424 int (*quota_disable)(struct super_block *, unsigned int);
375 int (*quota_sync)(struct super_block *, int); 425 int (*quota_sync)(struct super_block *, int);
376 int (*get_info)(struct super_block *, int, struct if_dqinfo *); 426 int (*set_info)(struct super_block *, int, struct qc_info *);
377 int (*set_info)(struct super_block *, int, struct if_dqinfo *);
378 int (*get_dqblk)(struct super_block *, struct kqid, struct qc_dqblk *); 427 int (*get_dqblk)(struct super_block *, struct kqid, struct qc_dqblk *);
379 int (*set_dqblk)(struct super_block *, struct kqid, struct qc_dqblk *); 428 int (*set_dqblk)(struct super_block *, struct kqid, struct qc_dqblk *);
380 int (*get_xstate)(struct super_block *, struct fs_quota_stat *); 429 int (*get_state)(struct super_block *, struct qc_state *);
381 int (*get_xstatev)(struct super_block *, struct fs_quota_statv *);
382 int (*rm_xquota)(struct super_block *, unsigned int); 430 int (*rm_xquota)(struct super_block *, unsigned int);
383}; 431};
384 432
@@ -389,7 +437,19 @@ struct quota_format_type {
389 struct quota_format_type *qf_next; 437 struct quota_format_type *qf_next;
390}; 438};
391 439
392/* Quota state flags - they actually come in two flavors - for users and groups */ 440/**
441 * Quota state flags - they actually come in two flavors - for users and groups.
442 *
443 * Actual typed flags layout:
444 * USRQUOTA GRPQUOTA
445 * DQUOT_USAGE_ENABLED 0x0001 0x0002
446 * DQUOT_LIMITS_ENABLED 0x0004 0x0008
447 * DQUOT_SUSPENDED 0x0010 0x0020
448 *
449 * Following bits are used for non-typed flags:
450 * DQUOT_QUOTA_SYS_FILE 0x0040
451 * DQUOT_NEGATIVE_USAGE 0x0080
452 */
393enum { 453enum {
394 _DQUOT_USAGE_ENABLED = 0, /* Track disk usage for users */ 454 _DQUOT_USAGE_ENABLED = 0, /* Track disk usage for users */
395 _DQUOT_LIMITS_ENABLED, /* Enforce quota limits for users */ 455 _DQUOT_LIMITS_ENABLED, /* Enforce quota limits for users */
@@ -398,9 +458,9 @@ enum {
398 * memory to turn them on */ 458 * memory to turn them on */
399 _DQUOT_STATE_FLAGS 459 _DQUOT_STATE_FLAGS
400}; 460};
401#define DQUOT_USAGE_ENABLED (1 << _DQUOT_USAGE_ENABLED) 461#define DQUOT_USAGE_ENABLED (1 << _DQUOT_USAGE_ENABLED * MAXQUOTAS)
402#define DQUOT_LIMITS_ENABLED (1 << _DQUOT_LIMITS_ENABLED) 462#define DQUOT_LIMITS_ENABLED (1 << _DQUOT_LIMITS_ENABLED * MAXQUOTAS)
403#define DQUOT_SUSPENDED (1 << _DQUOT_SUSPENDED) 463#define DQUOT_SUSPENDED (1 << _DQUOT_SUSPENDED * MAXQUOTAS)
404#define DQUOT_STATE_FLAGS (DQUOT_USAGE_ENABLED | DQUOT_LIMITS_ENABLED | \ 464#define DQUOT_STATE_FLAGS (DQUOT_USAGE_ENABLED | DQUOT_LIMITS_ENABLED | \
405 DQUOT_SUSPENDED) 465 DQUOT_SUSPENDED)
406/* Other quota flags */ 466/* Other quota flags */
@@ -414,15 +474,21 @@ enum {
414 */ 474 */
415#define DQUOT_NEGATIVE_USAGE (1 << (DQUOT_STATE_LAST + 1)) 475#define DQUOT_NEGATIVE_USAGE (1 << (DQUOT_STATE_LAST + 1))
416 /* Allow negative quota usage */ 476 /* Allow negative quota usage */
417
418static inline unsigned int dquot_state_flag(unsigned int flags, int type) 477static inline unsigned int dquot_state_flag(unsigned int flags, int type)
419{ 478{
420 return flags << _DQUOT_STATE_FLAGS * type; 479 return flags << type;
421} 480}
422 481
423static inline unsigned int dquot_generic_flag(unsigned int flags, int type) 482static inline unsigned int dquot_generic_flag(unsigned int flags, int type)
424{ 483{
425 return (flags >> _DQUOT_STATE_FLAGS * type) & DQUOT_STATE_FLAGS; 484 return (flags >> type) & DQUOT_STATE_FLAGS;
485}
486
487/* Bitmap of quota types where flag is set in flags */
488static __always_inline unsigned dquot_state_types(unsigned flags, unsigned flag)
489{
490 BUILD_BUG_ON_NOT_POWER_OF_2(flag);
491 return (flags / flag) & ((1 << MAXQUOTAS) - 1);
426} 492}
427 493
428#ifdef CONFIG_QUOTA_NETLINK_INTERFACE 494#ifdef CONFIG_QUOTA_NETLINK_INTERFACE
diff --git a/include/linux/quotaops.h b/include/linux/quotaops.h
index df73258cca47..77ca6601ff25 100644
--- a/include/linux/quotaops.h
+++ b/include/linux/quotaops.h
@@ -95,8 +95,8 @@ int dquot_quota_on_mount(struct super_block *sb, char *qf_name,
95int dquot_quota_off(struct super_block *sb, int type); 95int dquot_quota_off(struct super_block *sb, int type);
96int dquot_writeback_dquots(struct super_block *sb, int type); 96int dquot_writeback_dquots(struct super_block *sb, int type);
97int dquot_quota_sync(struct super_block *sb, int type); 97int dquot_quota_sync(struct super_block *sb, int type);
98int dquot_get_dqinfo(struct super_block *sb, int type, struct if_dqinfo *ii); 98int dquot_get_state(struct super_block *sb, struct qc_state *state);
99int dquot_set_dqinfo(struct super_block *sb, int type, struct if_dqinfo *ii); 99int dquot_set_dqinfo(struct super_block *sb, int type, struct qc_info *ii);
100int dquot_get_dqblk(struct super_block *sb, struct kqid id, 100int dquot_get_dqblk(struct super_block *sb, struct kqid id,
101 struct qc_dqblk *di); 101 struct qc_dqblk *di);
102int dquot_set_dqblk(struct super_block *sb, struct kqid id, 102int dquot_set_dqblk(struct super_block *sb, struct kqid id,
@@ -134,10 +134,7 @@ static inline bool sb_has_quota_suspended(struct super_block *sb, int type)
134 134
135static inline unsigned sb_any_quota_suspended(struct super_block *sb) 135static inline unsigned sb_any_quota_suspended(struct super_block *sb)
136{ 136{
137 unsigned type, tmsk = 0; 137 return dquot_state_types(sb_dqopt(sb)->flags, DQUOT_SUSPENDED);
138 for (type = 0; type < MAXQUOTAS; type++)
139 tmsk |= sb_has_quota_suspended(sb, type) << type;
140 return tmsk;
141} 138}
142 139
143/* Does kernel know about any quota information for given sb + type? */ 140/* Does kernel know about any quota information for given sb + type? */
@@ -149,10 +146,7 @@ static inline bool sb_has_quota_loaded(struct super_block *sb, int type)
149 146
150static inline unsigned sb_any_quota_loaded(struct super_block *sb) 147static inline unsigned sb_any_quota_loaded(struct super_block *sb)
151{ 148{
152 unsigned type, tmsk = 0; 149 return dquot_state_types(sb_dqopt(sb)->flags, DQUOT_USAGE_ENABLED);
153 for (type = 0; type < MAXQUOTAS; type++)
154 tmsk |= sb_has_quota_loaded(sb, type) << type;
155 return tmsk;
156} 150}
157 151
158static inline bool sb_has_quota_active(struct super_block *sb, int type) 152static inline bool sb_has_quota_active(struct super_block *sb, int type)
diff --git a/include/linux/string_helpers.h b/include/linux/string_helpers.h
index 0991913f4953..71f711db4500 100644
--- a/include/linux/string_helpers.h
+++ b/include/linux/string_helpers.h
@@ -10,7 +10,7 @@ enum string_size_units {
10 STRING_UNITS_2, /* use binary powers of 2^10 */ 10 STRING_UNITS_2, /* use binary powers of 2^10 */
11}; 11};
12 12
13void string_get_size(u64 size, enum string_size_units units, 13void string_get_size(u64 size, u64 blk_size, enum string_size_units units,
14 char *buf, int len); 14 char *buf, int len);
15 15
16#define UNESCAPE_SPACE 0x01 16#define UNESCAPE_SPACE 0x01
diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h
index b7361f831226..795d5fea5697 100644
--- a/include/linux/sysctl.h
+++ b/include/linux/sysctl.h
@@ -212,4 +212,7 @@ static inline void setup_sysctl_set(struct ctl_table_set *p,
212 212
213#endif /* CONFIG_SYSCTL */ 213#endif /* CONFIG_SYSCTL */
214 214
215int sysctl_max_threads(struct ctl_table *table, int write,
216 void __user *buffer, size_t *lenp, loff_t *ppos);
217
215#endif /* _LINUX_SYSCTL_H */ 218#endif /* _LINUX_SYSCTL_H */
diff --git a/include/linux/uio.h b/include/linux/uio.h
index 15f11fb9fff6..8b01e1c3c614 100644
--- a/include/linux/uio.h
+++ b/include/linux/uio.h
@@ -112,6 +112,14 @@ static inline bool iter_is_iovec(struct iov_iter *i)
112} 112}
113 113
114/* 114/*
115 * Get one of READ or WRITE out of iter->type without any other flags OR'd in
116 * with it.
117 *
118 * The ?: is just for type safety.
119 */
120#define iov_iter_rw(i) ((0 ? (struct iov_iter *)0 : (i))->type & RW_MASK)
121
122/*
115 * Cap the iov_iter by given limit; note that the second argument is 123 * Cap the iov_iter by given limit; note that the second argument is
116 * *not* the new size - it's upper limit for such. Passing it a value 124 * *not* the new size - it's upper limit for such. Passing it a value
117 * greater than the amount of data in iov_iter is fine - it'll just do 125 * greater than the amount of data in iov_iter is fine - it'll just do
diff --git a/include/linux/util_macros.h b/include/linux/util_macros.h
new file mode 100644
index 000000000000..d5f4fb69dba3
--- /dev/null
+++ b/include/linux/util_macros.h
@@ -0,0 +1,40 @@
1#ifndef _LINUX_HELPER_MACROS_H_
2#define _LINUX_HELPER_MACROS_H_
3
4#define __find_closest(x, a, as, op) \
5({ \
6 typeof(as) __fc_i, __fc_as = (as) - 1; \
7 typeof(x) __fc_x = (x); \
8 typeof(*a) *__fc_a = (a); \
9 for (__fc_i = 0; __fc_i < __fc_as; __fc_i++) { \
10 if (__fc_x op DIV_ROUND_CLOSEST(__fc_a[__fc_i] + \
11 __fc_a[__fc_i + 1], 2)) \
12 break; \
13 } \
14 (__fc_i); \
15})
16
17/**
18 * find_closest - locate the closest element in a sorted array
19 * @x: The reference value.
20 * @a: The array in which to look for the closest element. Must be sorted
21 * in ascending order.
22 * @as: Size of 'a'.
23 *
24 * Returns the index of the element closest to 'x'.
25 */
26#define find_closest(x, a, as) __find_closest(x, a, as, <=)
27
28/**
29 * find_closest_descending - locate the closest element in a sorted array
30 * @x: The reference value.
31 * @a: The array in which to look for the closest element. Must be sorted
32 * in descending order.
33 * @as: Size of 'a'.
34 *
35 * Similar to find_closest() but 'a' is expected to be sorted in descending
36 * order.
37 */
38#define find_closest_descending(x, a, as) __find_closest(x, a, as, >=)
39
40#endif
diff --git a/include/scsi/scsi_transport_fc.h b/include/scsi/scsi_transport_fc.h
index 007a0bc01b74..784bc2c0929f 100644
--- a/include/scsi/scsi_transport_fc.h
+++ b/include/scsi/scsi_transport_fc.h
@@ -135,6 +135,7 @@ enum fc_vport_state {
135#define FC_PORTSPEED_40GBIT 0x100 135#define FC_PORTSPEED_40GBIT 0x100
136#define FC_PORTSPEED_50GBIT 0x200 136#define FC_PORTSPEED_50GBIT 0x200
137#define FC_PORTSPEED_100GBIT 0x400 137#define FC_PORTSPEED_100GBIT 0x400
138#define FC_PORTSPEED_25GBIT 0x800
138#define FC_PORTSPEED_NOT_NEGOTIATED (1 << 15) /* Speed not established */ 139#define FC_PORTSPEED_NOT_NEGOTIATED (1 << 15) /* Speed not established */
139 140
140/* 141/*
diff --git a/include/uapi/asm-generic/errno.h b/include/uapi/asm-generic/errno.h
index 1e1ea6e6e7a5..88e0914cf2d9 100644
--- a/include/uapi/asm-generic/errno.h
+++ b/include/uapi/asm-generic/errno.h
@@ -6,7 +6,16 @@
6#define EDEADLK 35 /* Resource deadlock would occur */ 6#define EDEADLK 35 /* Resource deadlock would occur */
7#define ENAMETOOLONG 36 /* File name too long */ 7#define ENAMETOOLONG 36 /* File name too long */
8#define ENOLCK 37 /* No record locks available */ 8#define ENOLCK 37 /* No record locks available */
9#define ENOSYS 38 /* Function not implemented */ 9
10/*
11 * This error code is special: arch syscall entry code will return
12 * -ENOSYS if users try to call a syscall that doesn't exist. To keep
13 * failures of syscalls that really do exist distinguishable from
14 * failures due to attempts to use a nonexistent syscall, syscall
15 * implementations should refrain from returning -ENOSYS.
16 */
17#define ENOSYS 38 /* Invalid system call number */
18
10#define ENOTEMPTY 39 /* Directory not empty */ 19#define ENOTEMPTY 39 /* Directory not empty */
11#define ELOOP 40 /* Too many symbolic links encountered */ 20#define ELOOP 40 /* Too many symbolic links encountered */
12#define EWOULDBLOCK EAGAIN /* Operation would block */ 21#define EWOULDBLOCK EAGAIN /* Operation would block */
diff --git a/include/uapi/linux/quota.h b/include/uapi/linux/quota.h
index 1f49b8341c99..9c95b2c1c88a 100644
--- a/include/uapi/linux/quota.h
+++ b/include/uapi/linux/quota.h
@@ -36,11 +36,12 @@
36#include <linux/errno.h> 36#include <linux/errno.h>
37#include <linux/types.h> 37#include <linux/types.h>
38 38
39#define __DQUOT_VERSION__ "dquot_6.5.2" 39#define __DQUOT_VERSION__ "dquot_6.6.0"
40 40
41#define MAXQUOTAS 2 41#define MAXQUOTAS 3
42#define USRQUOTA 0 /* element used for user quotas */ 42#define USRQUOTA 0 /* element used for user quotas */
43#define GRPQUOTA 1 /* element used for group quotas */ 43#define GRPQUOTA 1 /* element used for group quotas */
44#define PRJQUOTA 2 /* element used for project quotas */
44 45
45/* 46/*
46 * Definitions for the default names of the quotas files. 47 * Definitions for the default names of the quotas files.
@@ -48,6 +49,7 @@
48#define INITQFNAMES { \ 49#define INITQFNAMES { \
49 "user", /* USRQUOTA */ \ 50 "user", /* USRQUOTA */ \
50 "group", /* GRPQUOTA */ \ 51 "group", /* GRPQUOTA */ \
52 "project", /* PRJQUOTA */ \
51 "undefined", \ 53 "undefined", \
52}; 54};
53 55
diff --git a/init/main.c b/init/main.c
index a7e969d12f51..2115055faeac 100644
--- a/init/main.c
+++ b/init/main.c
@@ -91,7 +91,7 @@
91static int kernel_init(void *); 91static int kernel_init(void *);
92 92
93extern void init_IRQ(void); 93extern void init_IRQ(void);
94extern void fork_init(unsigned long); 94extern void fork_init(void);
95extern void radix_tree_init(void); 95extern void radix_tree_init(void);
96#ifndef CONFIG_DEBUG_RODATA 96#ifndef CONFIG_DEBUG_RODATA
97static inline void mark_rodata_ro(void) { } 97static inline void mark_rodata_ro(void) { }
@@ -645,7 +645,7 @@ asmlinkage __visible void __init start_kernel(void)
645#endif 645#endif
646 thread_info_cache_init(); 646 thread_info_cache_init();
647 cred_init(); 647 cred_init();
648 fork_init(totalram_pages); 648 fork_init();
649 proc_caches_init(); 649 proc_caches_init();
650 buffer_init(); 650 buffer_init();
651 key_init(); 651 key_init();
diff --git a/kernel/fork.c b/kernel/fork.c
index f2c1e7352298..03c1eaaa6ef5 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -74,6 +74,7 @@
74#include <linux/uprobes.h> 74#include <linux/uprobes.h>
75#include <linux/aio.h> 75#include <linux/aio.h>
76#include <linux/compiler.h> 76#include <linux/compiler.h>
77#include <linux/sysctl.h>
77 78
78#include <asm/pgtable.h> 79#include <asm/pgtable.h>
79#include <asm/pgalloc.h> 80#include <asm/pgalloc.h>
@@ -88,6 +89,16 @@
88#include <trace/events/task.h> 89#include <trace/events/task.h>
89 90
90/* 91/*
92 * Minimum number of threads to boot the kernel
93 */
94#define MIN_THREADS 20
95
96/*
97 * Maximum number of threads
98 */
99#define MAX_THREADS FUTEX_TID_MASK
100
101/*
91 * Protected counters by write_lock_irq(&tasklist_lock) 102 * Protected counters by write_lock_irq(&tasklist_lock)
92 */ 103 */
93unsigned long total_forks; /* Handle normal Linux uptimes. */ 104unsigned long total_forks; /* Handle normal Linux uptimes. */
@@ -253,7 +264,30 @@ EXPORT_SYMBOL_GPL(__put_task_struct);
253 264
254void __init __weak arch_task_cache_init(void) { } 265void __init __weak arch_task_cache_init(void) { }
255 266
256void __init fork_init(unsigned long mempages) 267/*
268 * set_max_threads
269 */
270static void set_max_threads(unsigned int max_threads_suggested)
271{
272 u64 threads;
273
274 /*
275 * The number of threads shall be limited such that the thread
276 * structures may only consume a small part of the available memory.
277 */
278 if (fls64(totalram_pages) + fls64(PAGE_SIZE) > 64)
279 threads = MAX_THREADS;
280 else
281 threads = div64_u64((u64) totalram_pages * (u64) PAGE_SIZE,
282 (u64) THREAD_SIZE * 8UL);
283
284 if (threads > max_threads_suggested)
285 threads = max_threads_suggested;
286
287 max_threads = clamp_t(u64, threads, MIN_THREADS, MAX_THREADS);
288}
289
290void __init fork_init(void)
257{ 291{
258#ifndef CONFIG_ARCH_TASK_STRUCT_ALLOCATOR 292#ifndef CONFIG_ARCH_TASK_STRUCT_ALLOCATOR
259#ifndef ARCH_MIN_TASKALIGN 293#ifndef ARCH_MIN_TASKALIGN
@@ -268,18 +302,7 @@ void __init fork_init(unsigned long mempages)
268 /* do the arch specific task caches init */ 302 /* do the arch specific task caches init */
269 arch_task_cache_init(); 303 arch_task_cache_init();
270 304
271 /* 305 set_max_threads(MAX_THREADS);
272 * The default maximum number of threads is set to a safe
273 * value: the thread structures can take up at most half
274 * of memory.
275 */
276 max_threads = mempages / (8 * THREAD_SIZE / PAGE_SIZE);
277
278 /*
279 * we need to allow at least 20 threads to boot a system
280 */
281 if (max_threads < 20)
282 max_threads = 20;
283 306
284 init_task.signal->rlim[RLIMIT_NPROC].rlim_cur = max_threads/2; 307 init_task.signal->rlim[RLIMIT_NPROC].rlim_cur = max_threads/2;
285 init_task.signal->rlim[RLIMIT_NPROC].rlim_max = max_threads/2; 308 init_task.signal->rlim[RLIMIT_NPROC].rlim_max = max_threads/2;
@@ -380,6 +403,9 @@ static int dup_mmap(struct mm_struct *mm, struct mm_struct *oldmm)
380 */ 403 */
381 down_write_nested(&mm->mmap_sem, SINGLE_DEPTH_NESTING); 404 down_write_nested(&mm->mmap_sem, SINGLE_DEPTH_NESTING);
382 405
406 /* No ordering required: file already has been exposed. */
407 RCU_INIT_POINTER(mm->exe_file, get_mm_exe_file(oldmm));
408
383 mm->total_vm = oldmm->total_vm; 409 mm->total_vm = oldmm->total_vm;
384 mm->shared_vm = oldmm->shared_vm; 410 mm->shared_vm = oldmm->shared_vm;
385 mm->exec_vm = oldmm->exec_vm; 411 mm->exec_vm = oldmm->exec_vm;
@@ -505,7 +531,13 @@ static inline void mm_free_pgd(struct mm_struct *mm)
505 pgd_free(mm, mm->pgd); 531 pgd_free(mm, mm->pgd);
506} 532}
507#else 533#else
508#define dup_mmap(mm, oldmm) (0) 534static int dup_mmap(struct mm_struct *mm, struct mm_struct *oldmm)
535{
536 down_write(&oldmm->mmap_sem);
537 RCU_INIT_POINTER(mm->exe_file, get_mm_exe_file(oldmm));
538 up_write(&oldmm->mmap_sem);
539 return 0;
540}
509#define mm_alloc_pgd(mm) (0) 541#define mm_alloc_pgd(mm) (0)
510#define mm_free_pgd(mm) 542#define mm_free_pgd(mm)
511#endif /* CONFIG_MMU */ 543#endif /* CONFIG_MMU */
@@ -674,34 +706,53 @@ void mmput(struct mm_struct *mm)
674} 706}
675EXPORT_SYMBOL_GPL(mmput); 707EXPORT_SYMBOL_GPL(mmput);
676 708
709/**
710 * set_mm_exe_file - change a reference to the mm's executable file
711 *
712 * This changes mm's executable file (shown as symlink /proc/[pid]/exe).
713 *
714 * Main users are mmput() and sys_execve(). Callers prevent concurrent
715 * invocations: in mmput() nobody alive left, in execve task is single
716 * threaded. sys_prctl(PR_SET_MM_MAP/EXE_FILE) also needs to set the
717 * mm->exe_file, but does so without using set_mm_exe_file() in order
718 * to do avoid the need for any locks.
719 */
677void set_mm_exe_file(struct mm_struct *mm, struct file *new_exe_file) 720void set_mm_exe_file(struct mm_struct *mm, struct file *new_exe_file)
678{ 721{
722 struct file *old_exe_file;
723
724 /*
725 * It is safe to dereference the exe_file without RCU as
726 * this function is only called if nobody else can access
727 * this mm -- see comment above for justification.
728 */
729 old_exe_file = rcu_dereference_raw(mm->exe_file);
730
679 if (new_exe_file) 731 if (new_exe_file)
680 get_file(new_exe_file); 732 get_file(new_exe_file);
681 if (mm->exe_file) 733 rcu_assign_pointer(mm->exe_file, new_exe_file);
682 fput(mm->exe_file); 734 if (old_exe_file)
683 mm->exe_file = new_exe_file; 735 fput(old_exe_file);
684} 736}
685 737
738/**
739 * get_mm_exe_file - acquire a reference to the mm's executable file
740 *
741 * Returns %NULL if mm has no associated executable file.
742 * User must release file via fput().
743 */
686struct file *get_mm_exe_file(struct mm_struct *mm) 744struct file *get_mm_exe_file(struct mm_struct *mm)
687{ 745{
688 struct file *exe_file; 746 struct file *exe_file;
689 747
690 /* We need mmap_sem to protect against races with removal of exe_file */ 748 rcu_read_lock();
691 down_read(&mm->mmap_sem); 749 exe_file = rcu_dereference(mm->exe_file);
692 exe_file = mm->exe_file; 750 if (exe_file && !get_file_rcu(exe_file))
693 if (exe_file) 751 exe_file = NULL;
694 get_file(exe_file); 752 rcu_read_unlock();
695 up_read(&mm->mmap_sem);
696 return exe_file; 753 return exe_file;
697} 754}
698 755EXPORT_SYMBOL(get_mm_exe_file);
699static void dup_mm_exe_file(struct mm_struct *oldmm, struct mm_struct *newmm)
700{
701 /* It's safe to write the exe_file pointer without exe_file_lock because
702 * this is called during fork when the task is not yet in /proc */
703 newmm->exe_file = get_mm_exe_file(oldmm);
704}
705 756
706/** 757/**
707 * get_task_mm - acquire a reference to the task's mm 758 * get_task_mm - acquire a reference to the task's mm
@@ -864,8 +915,6 @@ static struct mm_struct *dup_mm(struct task_struct *tsk)
864 if (!mm_init(mm, tsk)) 915 if (!mm_init(mm, tsk))
865 goto fail_nomem; 916 goto fail_nomem;
866 917
867 dup_mm_exe_file(oldmm, mm);
868
869 err = dup_mmap(mm, oldmm); 918 err = dup_mmap(mm, oldmm);
870 if (err) 919 if (err)
871 goto free_pt; 920 goto free_pt;
@@ -1403,10 +1452,11 @@ static struct task_struct *copy_process(unsigned long clone_flags,
1403 goto bad_fork_cleanup_io; 1452 goto bad_fork_cleanup_io;
1404 1453
1405 if (pid != &init_struct_pid) { 1454 if (pid != &init_struct_pid) {
1406 retval = -ENOMEM;
1407 pid = alloc_pid(p->nsproxy->pid_ns_for_children); 1455 pid = alloc_pid(p->nsproxy->pid_ns_for_children);
1408 if (!pid) 1456 if (IS_ERR(pid)) {
1457 retval = PTR_ERR(pid);
1409 goto bad_fork_cleanup_io; 1458 goto bad_fork_cleanup_io;
1459 }
1410 } 1460 }
1411 1461
1412 p->set_child_tid = (clone_flags & CLONE_CHILD_SETTID) ? child_tidptr : NULL; 1462 p->set_child_tid = (clone_flags & CLONE_CHILD_SETTID) ? child_tidptr : NULL;
@@ -2000,3 +2050,26 @@ int unshare_files(struct files_struct **displaced)
2000 task_unlock(task); 2050 task_unlock(task);
2001 return 0; 2051 return 0;
2002} 2052}
2053
2054int sysctl_max_threads(struct ctl_table *table, int write,
2055 void __user *buffer, size_t *lenp, loff_t *ppos)
2056{
2057 struct ctl_table t;
2058 int ret;
2059 int threads = max_threads;
2060 int min = MIN_THREADS;
2061 int max = MAX_THREADS;
2062
2063 t = *table;
2064 t.data = &threads;
2065 t.extra1 = &min;
2066 t.extra2 = &max;
2067
2068 ret = proc_dointvec_minmax(&t, write, buffer, lenp, ppos);
2069 if (ret || !write)
2070 return ret;
2071
2072 set_max_threads(threads);
2073
2074 return 0;
2075}
diff --git a/kernel/gcov/base.c b/kernel/gcov/base.c
index b358a802fd18..a744098e4eb7 100644
--- a/kernel/gcov/base.c
+++ b/kernel/gcov/base.c
@@ -18,6 +18,7 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/mutex.h> 20#include <linux/mutex.h>
21#include <linux/sched.h>
21#include "gcov.h" 22#include "gcov.h"
22 23
23static int gcov_events_enabled; 24static int gcov_events_enabled;
@@ -107,8 +108,10 @@ void gcov_enable_events(void)
107 gcov_events_enabled = 1; 108 gcov_events_enabled = 1;
108 109
109 /* Perform event callback for previously registered entries. */ 110 /* Perform event callback for previously registered entries. */
110 while ((info = gcov_info_next(info))) 111 while ((info = gcov_info_next(info))) {
111 gcov_event(GCOV_ADD, info); 112 gcov_event(GCOV_ADD, info);
113 cond_resched();
114 }
112 115
113 mutex_unlock(&gcov_lock); 116 mutex_unlock(&gcov_lock);
114} 117}
diff --git a/kernel/pid.c b/kernel/pid.c
index cd36a5e0d173..4fd07d5b7baf 100644
--- a/kernel/pid.c
+++ b/kernel/pid.c
@@ -182,7 +182,7 @@ static int alloc_pidmap(struct pid_namespace *pid_ns)
182 spin_unlock_irq(&pidmap_lock); 182 spin_unlock_irq(&pidmap_lock);
183 kfree(page); 183 kfree(page);
184 if (unlikely(!map->page)) 184 if (unlikely(!map->page))
185 break; 185 return -ENOMEM;
186 } 186 }
187 if (likely(atomic_read(&map->nr_free))) { 187 if (likely(atomic_read(&map->nr_free))) {
188 for ( ; ; ) { 188 for ( ; ; ) {
@@ -210,7 +210,7 @@ static int alloc_pidmap(struct pid_namespace *pid_ns)
210 } 210 }
211 pid = mk_pid(pid_ns, map, offset); 211 pid = mk_pid(pid_ns, map, offset);
212 } 212 }
213 return -1; 213 return -EAGAIN;
214} 214}
215 215
216int next_pidmap(struct pid_namespace *pid_ns, unsigned int last) 216int next_pidmap(struct pid_namespace *pid_ns, unsigned int last)
@@ -301,17 +301,20 @@ struct pid *alloc_pid(struct pid_namespace *ns)
301 int i, nr; 301 int i, nr;
302 struct pid_namespace *tmp; 302 struct pid_namespace *tmp;
303 struct upid *upid; 303 struct upid *upid;
304 int retval = -ENOMEM;
304 305
305 pid = kmem_cache_alloc(ns->pid_cachep, GFP_KERNEL); 306 pid = kmem_cache_alloc(ns->pid_cachep, GFP_KERNEL);
306 if (!pid) 307 if (!pid)
307 goto out; 308 return ERR_PTR(retval);
308 309
309 tmp = ns; 310 tmp = ns;
310 pid->level = ns->level; 311 pid->level = ns->level;
311 for (i = ns->level; i >= 0; i--) { 312 for (i = ns->level; i >= 0; i--) {
312 nr = alloc_pidmap(tmp); 313 nr = alloc_pidmap(tmp);
313 if (nr < 0) 314 if (IS_ERR_VALUE(nr)) {
315 retval = nr;
314 goto out_free; 316 goto out_free;
317 }
315 318
316 pid->numbers[i].nr = nr; 319 pid->numbers[i].nr = nr;
317 pid->numbers[i].ns = tmp; 320 pid->numbers[i].ns = tmp;
@@ -339,7 +342,6 @@ struct pid *alloc_pid(struct pid_namespace *ns)
339 } 342 }
340 spin_unlock_irq(&pidmap_lock); 343 spin_unlock_irq(&pidmap_lock);
341 344
342out:
343 return pid; 345 return pid;
344 346
345out_unlock: 347out_unlock:
@@ -351,8 +353,7 @@ out_free:
351 free_pidmap(pid->numbers + i); 353 free_pidmap(pid->numbers + i);
352 354
353 kmem_cache_free(ns->pid_cachep, pid); 355 kmem_cache_free(ns->pid_cachep, pid);
354 pid = NULL; 356 return ERR_PTR(retval);
355 goto out;
356} 357}
357 358
358void disable_pid_allocation(struct pid_namespace *ns) 359void disable_pid_allocation(struct pid_namespace *ns)
diff --git a/kernel/ptrace.c b/kernel/ptrace.c
index 227fec36b12a..c8e0e050a36a 100644
--- a/kernel/ptrace.c
+++ b/kernel/ptrace.c
@@ -456,8 +456,6 @@ static bool __ptrace_detach(struct task_struct *tracer, struct task_struct *p)
456 456
457static int ptrace_detach(struct task_struct *child, unsigned int data) 457static int ptrace_detach(struct task_struct *child, unsigned int data)
458{ 458{
459 bool dead = false;
460
461 if (!valid_signal(data)) 459 if (!valid_signal(data))
462 return -EIO; 460 return -EIO;
463 461
@@ -467,18 +465,19 @@ static int ptrace_detach(struct task_struct *child, unsigned int data)
467 465
468 write_lock_irq(&tasklist_lock); 466 write_lock_irq(&tasklist_lock);
469 /* 467 /*
470 * This child can be already killed. Make sure de_thread() or 468 * We rely on ptrace_freeze_traced(). It can't be killed and
471 * our sub-thread doing do_wait() didn't do release_task() yet. 469 * untraced by another thread, it can't be a zombie.
472 */ 470 */
473 if (child->ptrace) { 471 WARN_ON(!child->ptrace || child->exit_state);
474 child->exit_code = data; 472 /*
475 dead = __ptrace_detach(current, child); 473 * tasklist_lock avoids the race with wait_task_stopped(), see
476 } 474 * the comment in ptrace_resume().
475 */
476 child->exit_code = data;
477 __ptrace_detach(current, child);
477 write_unlock_irq(&tasklist_lock); 478 write_unlock_irq(&tasklist_lock);
478 479
479 proc_ptrace_connector(child, PTRACE_DETACH); 480 proc_ptrace_connector(child, PTRACE_DETACH);
480 if (unlikely(dead))
481 release_task(child);
482 481
483 return 0; 482 return 0;
484} 483}
@@ -697,6 +696,8 @@ static int ptrace_peek_siginfo(struct task_struct *child,
697static int ptrace_resume(struct task_struct *child, long request, 696static int ptrace_resume(struct task_struct *child, long request,
698 unsigned long data) 697 unsigned long data)
699{ 698{
699 bool need_siglock;
700
700 if (!valid_signal(data)) 701 if (!valid_signal(data))
701 return -EIO; 702 return -EIO;
702 703
@@ -724,8 +725,26 @@ static int ptrace_resume(struct task_struct *child, long request,
724 user_disable_single_step(child); 725 user_disable_single_step(child);
725 } 726 }
726 727
728 /*
729 * Change ->exit_code and ->state under siglock to avoid the race
730 * with wait_task_stopped() in between; a non-zero ->exit_code will
731 * wrongly look like another report from tracee.
732 *
733 * Note that we need siglock even if ->exit_code == data and/or this
734 * status was not reported yet, the new status must not be cleared by
735 * wait_task_stopped() after resume.
736 *
737 * If data == 0 we do not care if wait_task_stopped() reports the old
738 * status and clears the code too; this can't race with the tracee, it
739 * takes siglock after resume.
740 */
741 need_siglock = data && !thread_group_empty(current);
742 if (need_siglock)
743 spin_lock_irq(&child->sighand->siglock);
727 child->exit_code = data; 744 child->exit_code = data;
728 wake_up_state(child, __TASK_TRACED); 745 wake_up_state(child, __TASK_TRACED);
746 if (need_siglock)
747 spin_unlock_irq(&child->sighand->siglock);
729 748
730 return 0; 749 return 0;
731} 750}
diff --git a/kernel/signal.c b/kernel/signal.c
index a390499943e4..d51c5ddd855c 100644
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -2992,11 +2992,9 @@ static int do_rt_sigqueueinfo(pid_t pid, int sig, siginfo_t *info)
2992 * Nor can they impersonate a kill()/tgkill(), which adds source info. 2992 * Nor can they impersonate a kill()/tgkill(), which adds source info.
2993 */ 2993 */
2994 if ((info->si_code >= 0 || info->si_code == SI_TKILL) && 2994 if ((info->si_code >= 0 || info->si_code == SI_TKILL) &&
2995 (task_pid_vnr(current) != pid)) { 2995 (task_pid_vnr(current) != pid))
2996 /* We used to allow any < 0 si_code */
2997 WARN_ON_ONCE(info->si_code < 0);
2998 return -EPERM; 2996 return -EPERM;
2999 } 2997
3000 info->si_signo = sig; 2998 info->si_signo = sig;
3001 2999
3002 /* POSIX.1b doesn't mention process groups. */ 3000 /* POSIX.1b doesn't mention process groups. */
@@ -3041,12 +3039,10 @@ static int do_rt_tgsigqueueinfo(pid_t tgid, pid_t pid, int sig, siginfo_t *info)
3041 /* Not even root can pretend to send signals from the kernel. 3039 /* Not even root can pretend to send signals from the kernel.
3042 * Nor can they impersonate a kill()/tgkill(), which adds source info. 3040 * Nor can they impersonate a kill()/tgkill(), which adds source info.
3043 */ 3041 */
3044 if (((info->si_code >= 0 || info->si_code == SI_TKILL)) && 3042 if ((info->si_code >= 0 || info->si_code == SI_TKILL) &&
3045 (task_pid_vnr(current) != pid)) { 3043 (task_pid_vnr(current) != pid))
3046 /* We used to allow any < 0 si_code */
3047 WARN_ON_ONCE(info->si_code < 0);
3048 return -EPERM; 3044 return -EPERM;
3049 } 3045
3050 info->si_signo = sig; 3046 info->si_signo = sig;
3051 3047
3052 return do_send_specific(tgid, pid, sig, info); 3048 return do_send_specific(tgid, pid, sig, info);
diff --git a/kernel/sys.c b/kernel/sys.c
index 3be344902316..a4e372b798a5 100644
--- a/kernel/sys.c
+++ b/kernel/sys.c
@@ -1649,14 +1649,13 @@ SYSCALL_DEFINE1(umask, int, mask)
1649 return mask; 1649 return mask;
1650} 1650}
1651 1651
1652static int prctl_set_mm_exe_file_locked(struct mm_struct *mm, unsigned int fd) 1652static int prctl_set_mm_exe_file(struct mm_struct *mm, unsigned int fd)
1653{ 1653{
1654 struct fd exe; 1654 struct fd exe;
1655 struct file *old_exe, *exe_file;
1655 struct inode *inode; 1656 struct inode *inode;
1656 int err; 1657 int err;
1657 1658
1658 VM_BUG_ON_MM(!rwsem_is_locked(&mm->mmap_sem), mm);
1659
1660 exe = fdget(fd); 1659 exe = fdget(fd);
1661 if (!exe.file) 1660 if (!exe.file)
1662 return -EBADF; 1661 return -EBADF;
@@ -1680,15 +1679,22 @@ static int prctl_set_mm_exe_file_locked(struct mm_struct *mm, unsigned int fd)
1680 /* 1679 /*
1681 * Forbid mm->exe_file change if old file still mapped. 1680 * Forbid mm->exe_file change if old file still mapped.
1682 */ 1681 */
1682 exe_file = get_mm_exe_file(mm);
1683 err = -EBUSY; 1683 err = -EBUSY;
1684 if (mm->exe_file) { 1684 if (exe_file) {
1685 struct vm_area_struct *vma; 1685 struct vm_area_struct *vma;
1686 1686
1687 for (vma = mm->mmap; vma; vma = vma->vm_next) 1687 down_read(&mm->mmap_sem);
1688 if (vma->vm_file && 1688 for (vma = mm->mmap; vma; vma = vma->vm_next) {
1689 path_equal(&vma->vm_file->f_path, 1689 if (!vma->vm_file)
1690 &mm->exe_file->f_path)) 1690 continue;
1691 goto exit; 1691 if (path_equal(&vma->vm_file->f_path,
1692 &exe_file->f_path))
1693 goto exit_err;
1694 }
1695
1696 up_read(&mm->mmap_sem);
1697 fput(exe_file);
1692 } 1698 }
1693 1699
1694 /* 1700 /*
@@ -1702,10 +1708,18 @@ static int prctl_set_mm_exe_file_locked(struct mm_struct *mm, unsigned int fd)
1702 goto exit; 1708 goto exit;
1703 1709
1704 err = 0; 1710 err = 0;
1705 set_mm_exe_file(mm, exe.file); /* this grabs a reference to exe.file */ 1711 /* set the new file, lockless */
1712 get_file(exe.file);
1713 old_exe = xchg(&mm->exe_file, exe.file);
1714 if (old_exe)
1715 fput(old_exe);
1706exit: 1716exit:
1707 fdput(exe); 1717 fdput(exe);
1708 return err; 1718 return err;
1719exit_err:
1720 up_read(&mm->mmap_sem);
1721 fput(exe_file);
1722 goto exit;
1709} 1723}
1710 1724
1711#ifdef CONFIG_CHECKPOINT_RESTORE 1725#ifdef CONFIG_CHECKPOINT_RESTORE
@@ -1840,10 +1854,9 @@ static int prctl_set_mm_map(int opt, const void __user *addr, unsigned long data
1840 user_auxv[AT_VECTOR_SIZE - 1] = AT_NULL; 1854 user_auxv[AT_VECTOR_SIZE - 1] = AT_NULL;
1841 } 1855 }
1842 1856
1843 down_write(&mm->mmap_sem);
1844 if (prctl_map.exe_fd != (u32)-1) 1857 if (prctl_map.exe_fd != (u32)-1)
1845 error = prctl_set_mm_exe_file_locked(mm, prctl_map.exe_fd); 1858 error = prctl_set_mm_exe_file(mm, prctl_map.exe_fd);
1846 downgrade_write(&mm->mmap_sem); 1859 down_read(&mm->mmap_sem);
1847 if (error) 1860 if (error)
1848 goto out; 1861 goto out;
1849 1862
@@ -1909,12 +1922,8 @@ static int prctl_set_mm(int opt, unsigned long addr,
1909 if (!capable(CAP_SYS_RESOURCE)) 1922 if (!capable(CAP_SYS_RESOURCE))
1910 return -EPERM; 1923 return -EPERM;
1911 1924
1912 if (opt == PR_SET_MM_EXE_FILE) { 1925 if (opt == PR_SET_MM_EXE_FILE)
1913 down_write(&mm->mmap_sem); 1926 return prctl_set_mm_exe_file(mm, (unsigned int)addr);
1914 error = prctl_set_mm_exe_file_locked(mm, (unsigned int)addr);
1915 up_write(&mm->mmap_sem);
1916 return error;
1917 }
1918 1927
1919 if (addr >= TASK_SIZE || addr < mmap_min_addr) 1928 if (addr >= TASK_SIZE || addr < mmap_min_addr)
1920 return -EINVAL; 1929 return -EINVAL;
diff --git a/kernel/sysctl.c b/kernel/sysctl.c
index 42b7fc2860c1..2082b1a88fb9 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ -93,11 +93,9 @@
93#include <linux/nmi.h> 93#include <linux/nmi.h>
94#endif 94#endif
95 95
96
97#if defined(CONFIG_SYSCTL) 96#if defined(CONFIG_SYSCTL)
98 97
99/* External variables not in a header file. */ 98/* External variables not in a header file. */
100extern int max_threads;
101extern int suid_dumpable; 99extern int suid_dumpable;
102#ifdef CONFIG_COREDUMP 100#ifdef CONFIG_COREDUMP
103extern int core_uses_pid; 101extern int core_uses_pid;
@@ -710,10 +708,10 @@ static struct ctl_table kern_table[] = {
710#endif 708#endif
711 { 709 {
712 .procname = "threads-max", 710 .procname = "threads-max",
713 .data = &max_threads, 711 .data = NULL,
714 .maxlen = sizeof(int), 712 .maxlen = sizeof(int),
715 .mode = 0644, 713 .mode = 0644,
716 .proc_handler = proc_dointvec, 714 .proc_handler = sysctl_max_threads,
717 }, 715 },
718 { 716 {
719 .procname = "random", 717 .procname = "random",
@@ -1983,7 +1981,15 @@ static int do_proc_dointvec_conv(bool *negp, unsigned long *lvalp,
1983 int write, void *data) 1981 int write, void *data)
1984{ 1982{
1985 if (write) { 1983 if (write) {
1986 *valp = *negp ? -*lvalp : *lvalp; 1984 if (*negp) {
1985 if (*lvalp > (unsigned long) INT_MAX + 1)
1986 return -EINVAL;
1987 *valp = -*lvalp;
1988 } else {
1989 if (*lvalp > (unsigned long) INT_MAX)
1990 return -EINVAL;
1991 *valp = *lvalp;
1992 }
1987 } else { 1993 } else {
1988 int val = *valp; 1994 int val = *valp;
1989 if (val < 0) { 1995 if (val < 0) {
diff --git a/lib/Kconfig b/lib/Kconfig
index 87da53bb1fef..f5440221d929 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -18,9 +18,8 @@ config HAVE_ARCH_BITREVERSE
18 default n 18 default n
19 depends on BITREVERSE 19 depends on BITREVERSE
20 help 20 help
21 This option provides an config for the architecture which have instruction 21 This option enables the use of hardware bit-reversal instructions on
22 can do bitreverse operation, we use the hardware instruction if the architecture 22 architectures which support such operations.
23 have this capability.
24 23
25config RATIONAL 24config RATIONAL
26 bool 25 bool
diff --git a/lib/Makefile b/lib/Makefile
index 60c22e65b793..6c37933336a0 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -25,7 +25,7 @@ obj-y += lockref.o
25obj-y += bcd.o div64.o sort.o parser.o halfmd4.o debug_locks.o random32.o \ 25obj-y += bcd.o div64.o sort.o parser.o halfmd4.o debug_locks.o random32.o \
26 bust_spinlocks.o kasprintf.o bitmap.o scatterlist.o \ 26 bust_spinlocks.o kasprintf.o bitmap.o scatterlist.o \
27 gcd.o lcm.o list_sort.o uuid.o flex_array.o iov_iter.o clz_ctz.o \ 27 gcd.o lcm.o list_sort.o uuid.o flex_array.o iov_iter.o clz_ctz.o \
28 bsearch.o find_last_bit.o find_next_bit.o llist.o memweight.o kfifo.o \ 28 bsearch.o find_bit.o llist.o memweight.o kfifo.o \
29 percpu-refcount.o percpu_ida.o rhashtable.o reciprocal_div.o 29 percpu-refcount.o percpu_ida.o rhashtable.o reciprocal_div.o
30obj-y += string_helpers.o 30obj-y += string_helpers.o
31obj-$(CONFIG_TEST_STRING_HELPERS) += test-string_helpers.o 31obj-$(CONFIG_TEST_STRING_HELPERS) += test-string_helpers.o
diff --git a/lib/bitmap.c b/lib/bitmap.c
index d456f4c15a9f..64c0926f5dd8 100644
--- a/lib/bitmap.c
+++ b/lib/bitmap.c
@@ -42,36 +42,6 @@
42 * for the best explanations of this ordering. 42 * for the best explanations of this ordering.
43 */ 43 */
44 44
45int __bitmap_empty(const unsigned long *bitmap, unsigned int bits)
46{
47 unsigned int k, lim = bits/BITS_PER_LONG;
48 for (k = 0; k < lim; ++k)
49 if (bitmap[k])
50 return 0;
51
52 if (bits % BITS_PER_LONG)
53 if (bitmap[k] & BITMAP_LAST_WORD_MASK(bits))
54 return 0;
55
56 return 1;
57}
58EXPORT_SYMBOL(__bitmap_empty);
59
60int __bitmap_full(const unsigned long *bitmap, unsigned int bits)
61{
62 unsigned int k, lim = bits/BITS_PER_LONG;
63 for (k = 0; k < lim; ++k)
64 if (~bitmap[k])
65 return 0;
66
67 if (bits % BITS_PER_LONG)
68 if (~bitmap[k] & BITMAP_LAST_WORD_MASK(bits))
69 return 0;
70
71 return 1;
72}
73EXPORT_SYMBOL(__bitmap_full);
74
75int __bitmap_equal(const unsigned long *bitmap1, 45int __bitmap_equal(const unsigned long *bitmap1,
76 const unsigned long *bitmap2, unsigned int bits) 46 const unsigned long *bitmap2, unsigned int bits)
77{ 47{
diff --git a/lib/cpumask.c b/lib/cpumask.c
index b6513a9f2892..5ab1553fd076 100644
--- a/lib/cpumask.c
+++ b/lib/cpumask.c
@@ -37,10 +37,11 @@ EXPORT_SYMBOL(__next_cpu_nr);
37int cpumask_next_and(int n, const struct cpumask *src1p, 37int cpumask_next_and(int n, const struct cpumask *src1p,
38 const struct cpumask *src2p) 38 const struct cpumask *src2p)
39{ 39{
40 while ((n = cpumask_next(n, src1p)) < nr_cpu_ids) 40 struct cpumask tmp;
41 if (cpumask_test_cpu(n, src2p)) 41
42 break; 42 if (cpumask_and(&tmp, src1p, src2p))
43 return n; 43 return cpumask_next(n, &tmp);
44 return nr_cpu_ids;
44} 45}
45EXPORT_SYMBOL(cpumask_next_and); 46EXPORT_SYMBOL(cpumask_next_and);
46 47
diff --git a/lib/dma-debug.c b/lib/dma-debug.c
index 9722bd2dbc9b..ae4b65e17e64 100644
--- a/lib/dma-debug.c
+++ b/lib/dma-debug.c
@@ -361,7 +361,7 @@ static struct dma_debug_entry *bucket_find_contain(struct hash_bucket **bucket,
361 unsigned int range = 0; 361 unsigned int range = 0;
362 362
363 while (range <= max_range) { 363 while (range <= max_range) {
364 entry = __hash_bucket_find(*bucket, &index, containing_match); 364 entry = __hash_bucket_find(*bucket, ref, containing_match);
365 365
366 if (entry) 366 if (entry)
367 return entry; 367 return entry;
diff --git a/lib/find_bit.c b/lib/find_bit.c
new file mode 100644
index 000000000000..18072ea9c20e
--- /dev/null
+++ b/lib/find_bit.c
@@ -0,0 +1,193 @@
1/* bit search implementation
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * Copyright (C) 2008 IBM Corporation
7 * 'find_last_bit' is written by Rusty Russell <rusty@rustcorp.com.au>
8 * (Inspired by David Howell's find_next_bit implementation)
9 *
10 * Rewritten by Yury Norov <yury.norov@gmail.com> to decrease
11 * size and improve performance, 2015.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
17 */
18
19#include <linux/bitops.h>
20#include <linux/bitmap.h>
21#include <linux/export.h>
22#include <linux/kernel.h>
23
24#if !defined(find_next_bit) || !defined(find_next_zero_bit)
25
26/*
27 * This is a common helper function for find_next_bit and
28 * find_next_zero_bit. The difference is the "invert" argument, which
29 * is XORed with each fetched word before searching it for one bits.
30 */
31static unsigned long _find_next_bit(const unsigned long *addr,
32 unsigned long nbits, unsigned long start, unsigned long invert)
33{
34 unsigned long tmp;
35
36 if (!nbits || start >= nbits)
37 return nbits;
38
39 tmp = addr[start / BITS_PER_LONG] ^ invert;
40
41 /* Handle 1st word. */
42 tmp &= BITMAP_FIRST_WORD_MASK(start);
43 start = round_down(start, BITS_PER_LONG);
44
45 while (!tmp) {
46 start += BITS_PER_LONG;
47 if (start >= nbits)
48 return nbits;
49
50 tmp = addr[start / BITS_PER_LONG] ^ invert;
51 }
52
53 return min(start + __ffs(tmp), nbits);
54}
55#endif
56
57#ifndef find_next_bit
58/*
59 * Find the next set bit in a memory region.
60 */
61unsigned long find_next_bit(const unsigned long *addr, unsigned long size,
62 unsigned long offset)
63{
64 return _find_next_bit(addr, size, offset, 0UL);
65}
66EXPORT_SYMBOL(find_next_bit);
67#endif
68
69#ifndef find_next_zero_bit
70unsigned long find_next_zero_bit(const unsigned long *addr, unsigned long size,
71 unsigned long offset)
72{
73 return _find_next_bit(addr, size, offset, ~0UL);
74}
75EXPORT_SYMBOL(find_next_zero_bit);
76#endif
77
78#ifndef find_first_bit
79/*
80 * Find the first set bit in a memory region.
81 */
82unsigned long find_first_bit(const unsigned long *addr, unsigned long size)
83{
84 unsigned long idx;
85
86 for (idx = 0; idx * BITS_PER_LONG < size; idx++) {
87 if (addr[idx])
88 return min(idx * BITS_PER_LONG + __ffs(addr[idx]), size);
89 }
90
91 return size;
92}
93EXPORT_SYMBOL(find_first_bit);
94#endif
95
96#ifndef find_first_zero_bit
97/*
98 * Find the first cleared bit in a memory region.
99 */
100unsigned long find_first_zero_bit(const unsigned long *addr, unsigned long size)
101{
102 unsigned long idx;
103
104 for (idx = 0; idx * BITS_PER_LONG < size; idx++) {
105 if (addr[idx] != ~0UL)
106 return min(idx * BITS_PER_LONG + ffz(addr[idx]), size);
107 }
108
109 return size;
110}
111EXPORT_SYMBOL(find_first_zero_bit);
112#endif
113
114#ifndef find_last_bit
115unsigned long find_last_bit(const unsigned long *addr, unsigned long size)
116{
117 if (size) {
118 unsigned long val = BITMAP_LAST_WORD_MASK(size);
119 unsigned long idx = (size-1) / BITS_PER_LONG;
120
121 do {
122 val &= addr[idx];
123 if (val)
124 return idx * BITS_PER_LONG + __fls(val);
125
126 val = ~0ul;
127 } while (idx--);
128 }
129 return size;
130}
131EXPORT_SYMBOL(find_last_bit);
132#endif
133
134#ifdef __BIG_ENDIAN
135
136/* include/linux/byteorder does not support "unsigned long" type */
137static inline unsigned long ext2_swab(const unsigned long y)
138{
139#if BITS_PER_LONG == 64
140 return (unsigned long) __swab64((u64) y);
141#elif BITS_PER_LONG == 32
142 return (unsigned long) __swab32((u32) y);
143#else
144#error BITS_PER_LONG not defined
145#endif
146}
147
148#if !defined(find_next_bit_le) || !defined(find_next_zero_bit_le)
149static unsigned long _find_next_bit_le(const unsigned long *addr,
150 unsigned long nbits, unsigned long start, unsigned long invert)
151{
152 unsigned long tmp;
153
154 if (!nbits || start >= nbits)
155 return nbits;
156
157 tmp = addr[start / BITS_PER_LONG] ^ invert;
158
159 /* Handle 1st word. */
160 tmp &= ext2_swab(BITMAP_FIRST_WORD_MASK(start));
161 start = round_down(start, BITS_PER_LONG);
162
163 while (!tmp) {
164 start += BITS_PER_LONG;
165 if (start >= nbits)
166 return nbits;
167
168 tmp = addr[start / BITS_PER_LONG] ^ invert;
169 }
170
171 return min(start + __ffs(ext2_swab(tmp)), nbits);
172}
173#endif
174
175#ifndef find_next_zero_bit_le
176unsigned long find_next_zero_bit_le(const void *addr, unsigned
177 long size, unsigned long offset)
178{
179 return _find_next_bit_le(addr, size, offset, ~0UL);
180}
181EXPORT_SYMBOL(find_next_zero_bit_le);
182#endif
183
184#ifndef find_next_bit_le
185unsigned long find_next_bit_le(const void *addr, unsigned
186 long size, unsigned long offset)
187{
188 return _find_next_bit_le(addr, size, offset, 0UL);
189}
190EXPORT_SYMBOL(find_next_bit_le);
191#endif
192
193#endif /* __BIG_ENDIAN */
diff --git a/lib/find_last_bit.c b/lib/find_last_bit.c
index 91ca09fbf6f9..3e3be40c6a6e 100644
--- a/lib/find_last_bit.c
+++ b/lib/find_last_bit.c
@@ -4,6 +4,9 @@
4 * Written by Rusty Russell <rusty@rustcorp.com.au> 4 * Written by Rusty Russell <rusty@rustcorp.com.au>
5 * (Inspired by David Howell's find_next_bit implementation) 5 * (Inspired by David Howell's find_next_bit implementation)
6 * 6 *
7 * Rewritten by Yury Norov <yury.norov@gmail.com> to decrease
8 * size and improve performance, 2015.
9 *
7 * This program is free software; you can redistribute it and/or 10 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License 11 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 12 * as published by the Free Software Foundation; either version
@@ -11,37 +14,26 @@
11 */ 14 */
12 15
13#include <linux/bitops.h> 16#include <linux/bitops.h>
17#include <linux/bitmap.h>
14#include <linux/export.h> 18#include <linux/export.h>
15#include <asm/types.h> 19#include <linux/kernel.h>
16#include <asm/byteorder.h>
17 20
18#ifndef find_last_bit 21#ifndef find_last_bit
19 22
20unsigned long find_last_bit(const unsigned long *addr, unsigned long size) 23unsigned long find_last_bit(const unsigned long *addr, unsigned long size)
21{ 24{
22 unsigned long words; 25 if (size) {
23 unsigned long tmp; 26 unsigned long val = BITMAP_LAST_WORD_MASK(size);
24 27 unsigned long idx = (size-1) / BITS_PER_LONG;
25 /* Start at final word. */
26 words = size / BITS_PER_LONG;
27 28
28 /* Partial final word? */ 29 do {
29 if (size & (BITS_PER_LONG-1)) { 30 val &= addr[idx];
30 tmp = (addr[words] & (~0UL >> (BITS_PER_LONG 31 if (val)
31 - (size & (BITS_PER_LONG-1))))); 32 return idx * BITS_PER_LONG + __fls(val);
32 if (tmp)
33 goto found;
34 }
35 33
36 while (words) { 34 val = ~0ul;
37 tmp = addr[--words]; 35 } while (idx--);
38 if (tmp) {
39found:
40 return words * BITS_PER_LONG + __fls(tmp);
41 }
42 } 36 }
43
44 /* Not found */
45 return size; 37 return size;
46} 38}
47EXPORT_SYMBOL(find_last_bit); 39EXPORT_SYMBOL(find_last_bit);
diff --git a/lib/find_next_bit.c b/lib/find_next_bit.c
deleted file mode 100644
index 0cbfc0b4398f..000000000000
--- a/lib/find_next_bit.c
+++ /dev/null
@@ -1,285 +0,0 @@
1/* find_next_bit.c: fallback find next bit implementation
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/bitops.h>
13#include <linux/export.h>
14#include <asm/types.h>
15#include <asm/byteorder.h>
16
17#define BITOP_WORD(nr) ((nr) / BITS_PER_LONG)
18
19#ifndef find_next_bit
20/*
21 * Find the next set bit in a memory region.
22 */
23unsigned long find_next_bit(const unsigned long *addr, unsigned long size,
24 unsigned long offset)
25{
26 const unsigned long *p = addr + BITOP_WORD(offset);
27 unsigned long result = offset & ~(BITS_PER_LONG-1);
28 unsigned long tmp;
29
30 if (offset >= size)
31 return size;
32 size -= result;
33 offset %= BITS_PER_LONG;
34 if (offset) {
35 tmp = *(p++);
36 tmp &= (~0UL << offset);
37 if (size < BITS_PER_LONG)
38 goto found_first;
39 if (tmp)
40 goto found_middle;
41 size -= BITS_PER_LONG;
42 result += BITS_PER_LONG;
43 }
44 while (size & ~(BITS_PER_LONG-1)) {
45 if ((tmp = *(p++)))
46 goto found_middle;
47 result += BITS_PER_LONG;
48 size -= BITS_PER_LONG;
49 }
50 if (!size)
51 return result;
52 tmp = *p;
53
54found_first:
55 tmp &= (~0UL >> (BITS_PER_LONG - size));
56 if (tmp == 0UL) /* Are any bits set? */
57 return result + size; /* Nope. */
58found_middle:
59 return result + __ffs(tmp);
60}
61EXPORT_SYMBOL(find_next_bit);
62#endif
63
64#ifndef find_next_zero_bit
65/*
66 * This implementation of find_{first,next}_zero_bit was stolen from
67 * Linus' asm-alpha/bitops.h.
68 */
69unsigned long find_next_zero_bit(const unsigned long *addr, unsigned long size,
70 unsigned long offset)
71{
72 const unsigned long *p = addr + BITOP_WORD(offset);
73 unsigned long result = offset & ~(BITS_PER_LONG-1);
74 unsigned long tmp;
75
76 if (offset >= size)
77 return size;
78 size -= result;
79 offset %= BITS_PER_LONG;
80 if (offset) {
81 tmp = *(p++);
82 tmp |= ~0UL >> (BITS_PER_LONG - offset);
83 if (size < BITS_PER_LONG)
84 goto found_first;
85 if (~tmp)
86 goto found_middle;
87 size -= BITS_PER_LONG;
88 result += BITS_PER_LONG;
89 }
90 while (size & ~(BITS_PER_LONG-1)) {
91 if (~(tmp = *(p++)))
92 goto found_middle;
93 result += BITS_PER_LONG;
94 size -= BITS_PER_LONG;
95 }
96 if (!size)
97 return result;
98 tmp = *p;
99
100found_first:
101 tmp |= ~0UL << size;
102 if (tmp == ~0UL) /* Are any bits zero? */
103 return result + size; /* Nope. */
104found_middle:
105 return result + ffz(tmp);
106}
107EXPORT_SYMBOL(find_next_zero_bit);
108#endif
109
110#ifndef find_first_bit
111/*
112 * Find the first set bit in a memory region.
113 */
114unsigned long find_first_bit(const unsigned long *addr, unsigned long size)
115{
116 const unsigned long *p = addr;
117 unsigned long result = 0;
118 unsigned long tmp;
119
120 while (size & ~(BITS_PER_LONG-1)) {
121 if ((tmp = *(p++)))
122 goto found;
123 result += BITS_PER_LONG;
124 size -= BITS_PER_LONG;
125 }
126 if (!size)
127 return result;
128
129 tmp = (*p) & (~0UL >> (BITS_PER_LONG - size));
130 if (tmp == 0UL) /* Are any bits set? */
131 return result + size; /* Nope. */
132found:
133 return result + __ffs(tmp);
134}
135EXPORT_SYMBOL(find_first_bit);
136#endif
137
138#ifndef find_first_zero_bit
139/*
140 * Find the first cleared bit in a memory region.
141 */
142unsigned long find_first_zero_bit(const unsigned long *addr, unsigned long size)
143{
144 const unsigned long *p = addr;
145 unsigned long result = 0;
146 unsigned long tmp;
147
148 while (size & ~(BITS_PER_LONG-1)) {
149 if (~(tmp = *(p++)))
150 goto found;
151 result += BITS_PER_LONG;
152 size -= BITS_PER_LONG;
153 }
154 if (!size)
155 return result;
156
157 tmp = (*p) | (~0UL << size);
158 if (tmp == ~0UL) /* Are any bits zero? */
159 return result + size; /* Nope. */
160found:
161 return result + ffz(tmp);
162}
163EXPORT_SYMBOL(find_first_zero_bit);
164#endif
165
166#ifdef __BIG_ENDIAN
167
168/* include/linux/byteorder does not support "unsigned long" type */
169static inline unsigned long ext2_swabp(const unsigned long * x)
170{
171#if BITS_PER_LONG == 64
172 return (unsigned long) __swab64p((u64 *) x);
173#elif BITS_PER_LONG == 32
174 return (unsigned long) __swab32p((u32 *) x);
175#else
176#error BITS_PER_LONG not defined
177#endif
178}
179
180/* include/linux/byteorder doesn't support "unsigned long" type */
181static inline unsigned long ext2_swab(const unsigned long y)
182{
183#if BITS_PER_LONG == 64
184 return (unsigned long) __swab64((u64) y);
185#elif BITS_PER_LONG == 32
186 return (unsigned long) __swab32((u32) y);
187#else
188#error BITS_PER_LONG not defined
189#endif
190}
191
192#ifndef find_next_zero_bit_le
193unsigned long find_next_zero_bit_le(const void *addr, unsigned
194 long size, unsigned long offset)
195{
196 const unsigned long *p = addr;
197 unsigned long result = offset & ~(BITS_PER_LONG - 1);
198 unsigned long tmp;
199
200 if (offset >= size)
201 return size;
202 p += BITOP_WORD(offset);
203 size -= result;
204 offset &= (BITS_PER_LONG - 1UL);
205 if (offset) {
206 tmp = ext2_swabp(p++);
207 tmp |= (~0UL >> (BITS_PER_LONG - offset));
208 if (size < BITS_PER_LONG)
209 goto found_first;
210 if (~tmp)
211 goto found_middle;
212 size -= BITS_PER_LONG;
213 result += BITS_PER_LONG;
214 }
215
216 while (size & ~(BITS_PER_LONG - 1)) {
217 if (~(tmp = *(p++)))
218 goto found_middle_swap;
219 result += BITS_PER_LONG;
220 size -= BITS_PER_LONG;
221 }
222 if (!size)
223 return result;
224 tmp = ext2_swabp(p);
225found_first:
226 tmp |= ~0UL << size;
227 if (tmp == ~0UL) /* Are any bits zero? */
228 return result + size; /* Nope. Skip ffz */
229found_middle:
230 return result + ffz(tmp);
231
232found_middle_swap:
233 return result + ffz(ext2_swab(tmp));
234}
235EXPORT_SYMBOL(find_next_zero_bit_le);
236#endif
237
238#ifndef find_next_bit_le
239unsigned long find_next_bit_le(const void *addr, unsigned
240 long size, unsigned long offset)
241{
242 const unsigned long *p = addr;
243 unsigned long result = offset & ~(BITS_PER_LONG - 1);
244 unsigned long tmp;
245
246 if (offset >= size)
247 return size;
248 p += BITOP_WORD(offset);
249 size -= result;
250 offset &= (BITS_PER_LONG - 1UL);
251 if (offset) {
252 tmp = ext2_swabp(p++);
253 tmp &= (~0UL << offset);
254 if (size < BITS_PER_LONG)
255 goto found_first;
256 if (tmp)
257 goto found_middle;
258 size -= BITS_PER_LONG;
259 result += BITS_PER_LONG;
260 }
261
262 while (size & ~(BITS_PER_LONG - 1)) {
263 tmp = *(p++);
264 if (tmp)
265 goto found_middle_swap;
266 result += BITS_PER_LONG;
267 size -= BITS_PER_LONG;
268 }
269 if (!size)
270 return result;
271 tmp = ext2_swabp(p);
272found_first:
273 tmp &= (~0UL >> (BITS_PER_LONG - size));
274 if (tmp == 0UL) /* Are any bits set? */
275 return result + size; /* Nope. */
276found_middle:
277 return result + __ffs(tmp);
278
279found_middle_swap:
280 return result + __ffs(ext2_swab(tmp));
281}
282EXPORT_SYMBOL(find_next_bit_le);
283#endif
284
285#endif /* __BIG_ENDIAN */
diff --git a/lib/string_helpers.c b/lib/string_helpers.c
index 1826c7407258..c98ae818eb4e 100644
--- a/lib/string_helpers.c
+++ b/lib/string_helpers.c
@@ -4,6 +4,7 @@
4 * Copyright 31 August 2008 James Bottomley 4 * Copyright 31 August 2008 James Bottomley
5 * Copyright (C) 2013, Intel Corporation 5 * Copyright (C) 2013, Intel Corporation
6 */ 6 */
7#include <linux/bug.h>
7#include <linux/kernel.h> 8#include <linux/kernel.h>
8#include <linux/math64.h> 9#include <linux/math64.h>
9#include <linux/export.h> 10#include <linux/export.h>
@@ -14,7 +15,8 @@
14 15
15/** 16/**
16 * string_get_size - get the size in the specified units 17 * string_get_size - get the size in the specified units
17 * @size: The size to be converted 18 * @size: The size to be converted in blocks
19 * @blk_size: Size of the block (use 1 for size in bytes)
18 * @units: units to use (powers of 1000 or 1024) 20 * @units: units to use (powers of 1000 or 1024)
19 * @buf: buffer to format to 21 * @buf: buffer to format to
20 * @len: length of buffer 22 * @len: length of buffer
@@ -24,14 +26,14 @@
24 * at least 9 bytes and will always be zero terminated. 26 * at least 9 bytes and will always be zero terminated.
25 * 27 *
26 */ 28 */
27void string_get_size(u64 size, const enum string_size_units units, 29void string_get_size(u64 size, u64 blk_size, const enum string_size_units units,
28 char *buf, int len) 30 char *buf, int len)
29{ 31{
30 static const char *const units_10[] = { 32 static const char *const units_10[] = {
31 "B", "kB", "MB", "GB", "TB", "PB", "EB" 33 "B", "kB", "MB", "GB", "TB", "PB", "EB", "ZB", "YB"
32 }; 34 };
33 static const char *const units_2[] = { 35 static const char *const units_2[] = {
34 "B", "KiB", "MiB", "GiB", "TiB", "PiB", "EiB" 36 "B", "KiB", "MiB", "GiB", "TiB", "PiB", "EiB", "ZiB", "YiB"
35 }; 37 };
36 static const char *const *const units_str[] = { 38 static const char *const *const units_str[] = {
37 [STRING_UNITS_10] = units_10, 39 [STRING_UNITS_10] = units_10,
@@ -42,31 +44,57 @@ void string_get_size(u64 size, const enum string_size_units units,
42 [STRING_UNITS_2] = 1024, 44 [STRING_UNITS_2] = 1024,
43 }; 45 };
44 int i, j; 46 int i, j;
45 u32 remainder = 0, sf_cap; 47 u32 remainder = 0, sf_cap, exp;
46 char tmp[8]; 48 char tmp[8];
49 const char *unit;
47 50
48 tmp[0] = '\0'; 51 tmp[0] = '\0';
49 i = 0; 52 i = 0;
50 if (size >= divisor[units]) { 53 if (!size)
51 while (size >= divisor[units]) { 54 goto out;
52 remainder = do_div(size, divisor[units]);
53 i++;
54 }
55 55
56 sf_cap = size; 56 while (blk_size >= divisor[units]) {
57 for (j = 0; sf_cap*10 < 1000; j++) 57 remainder = do_div(blk_size, divisor[units]);
58 sf_cap *= 10; 58 i++;
59 }
59 60
60 if (j) { 61 exp = divisor[units] / (u32)blk_size;
61 remainder *= 1000; 62 if (size >= exp) {
62 remainder /= divisor[units]; 63 remainder = do_div(size, divisor[units]);
63 snprintf(tmp, sizeof(tmp), ".%03u", remainder); 64 remainder *= blk_size;
64 tmp[j+1] = '\0'; 65 i++;
65 } 66 } else {
67 remainder *= size;
68 }
69
70 size *= blk_size;
71 size += remainder / divisor[units];
72 remainder %= divisor[units];
73
74 while (size >= divisor[units]) {
75 remainder = do_div(size, divisor[units]);
76 i++;
66 } 77 }
67 78
79 sf_cap = size;
80 for (j = 0; sf_cap*10 < 1000; j++)
81 sf_cap *= 10;
82
83 if (j) {
84 remainder *= 1000;
85 remainder /= divisor[units];
86 snprintf(tmp, sizeof(tmp), ".%03u", remainder);
87 tmp[j+1] = '\0';
88 }
89
90 out:
91 if (i >= ARRAY_SIZE(units_2))
92 unit = "UNK";
93 else
94 unit = units_str[units][i];
95
68 snprintf(buf, len, "%u%s %s", (u32)size, 96 snprintf(buf, len, "%u%s %s", (u32)size,
69 tmp, units_str[units][i]); 97 tmp, unit);
70} 98}
71EXPORT_SYMBOL(string_get_size); 99EXPORT_SYMBOL(string_get_size);
72 100
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 3a1e0843f9a2..da39c608a28c 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -33,6 +33,7 @@
33 33
34#include <asm/page.h> /* for PAGE_SIZE */ 34#include <asm/page.h> /* for PAGE_SIZE */
35#include <asm/sections.h> /* for dereference_function_descriptor() */ 35#include <asm/sections.h> /* for dereference_function_descriptor() */
36#include <asm/byteorder.h> /* cpu_to_le16 */
36 37
37#include <linux/string_helpers.h> 38#include <linux/string_helpers.h>
38#include "kstrtox.h" 39#include "kstrtox.h"
@@ -122,142 +123,145 @@ int skip_atoi(const char **s)
122 return i; 123 return i;
123} 124}
124 125
125/* Decimal conversion is by far the most typical, and is used 126/*
126 * for /proc and /sys data. This directly impacts e.g. top performance 127 * Decimal conversion is by far the most typical, and is used for
127 * with many processes running. We optimize it for speed 128 * /proc and /sys data. This directly impacts e.g. top performance
128 * using ideas described at <http://www.cs.uiowa.edu/~jones/bcd/divide.html> 129 * with many processes running. We optimize it for speed by emitting
129 * (with permission from the author, Douglas W. Jones). 130 * two characters at a time, using a 200 byte lookup table. This
131 * roughly halves the number of multiplications compared to computing
132 * the digits one at a time. Implementation strongly inspired by the
133 * previous version, which in turn used ideas described at
134 * <http://www.cs.uiowa.edu/~jones/bcd/divide.html> (with permission
135 * from the author, Douglas W. Jones).
136 *
137 * It turns out there is precisely one 26 bit fixed-point
138 * approximation a of 64/100 for which x/100 == (x * (u64)a) >> 32
139 * holds for all x in [0, 10^8-1], namely a = 0x28f5c29. The actual
140 * range happens to be somewhat larger (x <= 1073741898), but that's
141 * irrelevant for our purpose.
142 *
143 * For dividing a number in the range [10^4, 10^6-1] by 100, we still
144 * need a 32x32->64 bit multiply, so we simply use the same constant.
145 *
146 * For dividing a number in the range [100, 10^4-1] by 100, there are
147 * several options. The simplest is (x * 0x147b) >> 19, which is valid
148 * for all x <= 43698.
130 */ 149 */
131 150
132#if BITS_PER_LONG != 32 || BITS_PER_LONG_LONG != 64 151static const u16 decpair[100] = {
133/* Formats correctly any integer in [0, 999999999] */ 152#define _(x) (__force u16) cpu_to_le16(((x % 10) | ((x / 10) << 8)) + 0x3030)
153 _( 0), _( 1), _( 2), _( 3), _( 4), _( 5), _( 6), _( 7), _( 8), _( 9),
154 _(10), _(11), _(12), _(13), _(14), _(15), _(16), _(17), _(18), _(19),
155 _(20), _(21), _(22), _(23), _(24), _(25), _(26), _(27), _(28), _(29),
156 _(30), _(31), _(32), _(33), _(34), _(35), _(36), _(37), _(38), _(39),
157 _(40), _(41), _(42), _(43), _(44), _(45), _(46), _(47), _(48), _(49),
158 _(50), _(51), _(52), _(53), _(54), _(55), _(56), _(57), _(58), _(59),
159 _(60), _(61), _(62), _(63), _(64), _(65), _(66), _(67), _(68), _(69),
160 _(70), _(71), _(72), _(73), _(74), _(75), _(76), _(77), _(78), _(79),
161 _(80), _(81), _(82), _(83), _(84), _(85), _(86), _(87), _(88), _(89),
162 _(90), _(91), _(92), _(93), _(94), _(95), _(96), _(97), _(98), _(99),
163#undef _
164};
165
166/*
167 * This will print a single '0' even if r == 0, since we would
168 * immediately jump to out_r where two 0s would be written but only
169 * one of them accounted for in buf. This is needed by ip4_string
170 * below. All other callers pass a non-zero value of r.
171*/
134static noinline_for_stack 172static noinline_for_stack
135char *put_dec_full9(char *buf, unsigned q) 173char *put_dec_trunc8(char *buf, unsigned r)
136{ 174{
137 unsigned r; 175 unsigned q;
138 176
139 /* 177 /* 1 <= r < 10^8 */
140 * Possible ways to approx. divide by 10 178 if (r < 100)
141 * (x * 0x1999999a) >> 32 x < 1073741829 (multiply must be 64-bit) 179 goto out_r;
142 * (x * 0xcccd) >> 19 x < 81920 (x < 262149 when 64-bit mul) 180
143 * (x * 0x6667) >> 18 x < 43699 181 /* 100 <= r < 10^8 */
144 * (x * 0x3334) >> 17 x < 16389 182 q = (r * (u64)0x28f5c29) >> 32;
145 * (x * 0x199a) >> 16 x < 16389 183 *((u16 *)buf) = decpair[r - 100*q];
146 * (x * 0x0ccd) >> 15 x < 16389 184 buf += 2;
147 * (x * 0x0667) >> 14 x < 2739 185
148 * (x * 0x0334) >> 13 x < 1029 186 /* 1 <= q < 10^6 */
149 * (x * 0x019a) >> 12 x < 1029 187 if (q < 100)
150 * (x * 0x00cd) >> 11 x < 1029 shorter code than * 0x67 (on i386) 188 goto out_q;
151 * (x * 0x0067) >> 10 x < 179 189
152 * (x * 0x0034) >> 9 x < 69 same 190 /* 100 <= q < 10^6 */
153 * (x * 0x001a) >> 8 x < 69 same 191 r = (q * (u64)0x28f5c29) >> 32;
154 * (x * 0x000d) >> 7 x < 69 same, shortest code (on i386) 192 *((u16 *)buf) = decpair[q - 100*r];
155 * (x * 0x0007) >> 6 x < 19 193 buf += 2;
156 * See <http://www.cs.uiowa.edu/~jones/bcd/divide.html> 194
157 */ 195 /* 1 <= r < 10^4 */
158 r = (q * (uint64_t)0x1999999a) >> 32; 196 if (r < 100)
159 *buf++ = (q - 10 * r) + '0'; /* 1 */ 197 goto out_r;
160 q = (r * (uint64_t)0x1999999a) >> 32; 198
161 *buf++ = (r - 10 * q) + '0'; /* 2 */ 199 /* 100 <= r < 10^4 */
162 r = (q * (uint64_t)0x1999999a) >> 32; 200 q = (r * 0x147b) >> 19;
163 *buf++ = (q - 10 * r) + '0'; /* 3 */ 201 *((u16 *)buf) = decpair[r - 100*q];
164 q = (r * (uint64_t)0x1999999a) >> 32; 202 buf += 2;
165 *buf++ = (r - 10 * q) + '0'; /* 4 */ 203out_q:
166 r = (q * (uint64_t)0x1999999a) >> 32; 204 /* 1 <= q < 100 */
167 *buf++ = (q - 10 * r) + '0'; /* 5 */ 205 r = q;
168 /* Now value is under 10000, can avoid 64-bit multiply */ 206out_r:
169 q = (r * 0x199a) >> 16; 207 /* 1 <= r < 100 */
170 *buf++ = (r - 10 * q) + '0'; /* 6 */ 208 *((u16 *)buf) = decpair[r];
171 r = (q * 0xcd) >> 11; 209 buf += r < 10 ? 1 : 2;
172 *buf++ = (q - 10 * r) + '0'; /* 7 */
173 q = (r * 0xcd) >> 11;
174 *buf++ = (r - 10 * q) + '0'; /* 8 */
175 *buf++ = q + '0'; /* 9 */
176 return buf; 210 return buf;
177} 211}
178#endif
179 212
180/* Similar to above but do not pad with zeros. 213#if BITS_PER_LONG == 64 && BITS_PER_LONG_LONG == 64
181 * Code can be easily arranged to print 9 digits too, but our callers
182 * always call put_dec_full9() instead when the number has 9 decimal digits.
183 */
184static noinline_for_stack 214static noinline_for_stack
185char *put_dec_trunc8(char *buf, unsigned r) 215char *put_dec_full8(char *buf, unsigned r)
186{ 216{
187 unsigned q; 217 unsigned q;
188 218
189 /* Copy of previous function's body with added early returns */ 219 /* 0 <= r < 10^8 */
190 while (r >= 10000) { 220 q = (r * (u64)0x28f5c29) >> 32;
191 q = r + '0'; 221 *((u16 *)buf) = decpair[r - 100*q];
192 r = (r * (uint64_t)0x1999999a) >> 32; 222 buf += 2;
193 *buf++ = q - 10*r;
194 }
195 223
196 q = (r * 0x199a) >> 16; /* r <= 9999 */ 224 /* 0 <= q < 10^6 */
197 *buf++ = (r - 10 * q) + '0'; 225 r = (q * (u64)0x28f5c29) >> 32;
198 if (q == 0) 226 *((u16 *)buf) = decpair[q - 100*r];
199 return buf; 227 buf += 2;
200 r = (q * 0xcd) >> 11; /* q <= 999 */
201 *buf++ = (q - 10 * r) + '0';
202 if (r == 0)
203 return buf;
204 q = (r * 0xcd) >> 11; /* r <= 99 */
205 *buf++ = (r - 10 * q) + '0';
206 if (q == 0)
207 return buf;
208 *buf++ = q + '0'; /* q <= 9 */
209 return buf;
210}
211 228
212/* There are two algorithms to print larger numbers. 229 /* 0 <= r < 10^4 */
213 * One is generic: divide by 1000000000 and repeatedly print 230 q = (r * 0x147b) >> 19;
214 * groups of (up to) 9 digits. It's conceptually simple, 231 *((u16 *)buf) = decpair[r - 100*q];
215 * but requires a (unsigned long long) / 1000000000 division. 232 buf += 2;
216 *
217 * Second algorithm splits 64-bit unsigned long long into 16-bit chunks,
218 * manipulates them cleverly and generates groups of 4 decimal digits.
219 * It so happens that it does NOT require long long division.
220 *
221 * If long is > 32 bits, division of 64-bit values is relatively easy,
222 * and we will use the first algorithm.
223 * If long long is > 64 bits (strange architecture with VERY large long long),
224 * second algorithm can't be used, and we again use the first one.
225 *
226 * Else (if long is 32 bits and long long is 64 bits) we use second one.
227 */
228 233
229#if BITS_PER_LONG != 32 || BITS_PER_LONG_LONG != 64 234 /* 0 <= q < 100 */
230 235 *((u16 *)buf) = decpair[q];
231/* First algorithm: generic */ 236 buf += 2;
237 return buf;
238}
232 239
233static 240static noinline_for_stack
234char *put_dec(char *buf, unsigned long long n) 241char *put_dec(char *buf, unsigned long long n)
235{ 242{
236 if (n >= 100*1000*1000) { 243 if (n >= 100*1000*1000)
237 while (n >= 1000*1000*1000) 244 buf = put_dec_full8(buf, do_div(n, 100*1000*1000));
238 buf = put_dec_full9(buf, do_div(n, 1000*1000*1000)); 245 /* 1 <= n <= 1.6e11 */
239 if (n >= 100*1000*1000) 246 if (n >= 100*1000*1000)
240 return put_dec_full9(buf, n); 247 buf = put_dec_full8(buf, do_div(n, 100*1000*1000));
241 } 248 /* 1 <= n < 1e8 */
242 return put_dec_trunc8(buf, n); 249 return put_dec_trunc8(buf, n);
243} 250}
244 251
245#else 252#elif BITS_PER_LONG == 32 && BITS_PER_LONG_LONG == 64
246 253
247/* Second algorithm: valid only for 64-bit long longs */ 254static void
248 255put_dec_full4(char *buf, unsigned r)
249/* See comment in put_dec_full9 for choice of constants */
250static noinline_for_stack
251void put_dec_full4(char *buf, unsigned q)
252{ 256{
253 unsigned r; 257 unsigned q;
254 r = (q * 0xccd) >> 15; 258
255 buf[0] = (q - 10 * r) + '0'; 259 /* 0 <= r < 10^4 */
256 q = (r * 0xcd) >> 11; 260 q = (r * 0x147b) >> 19;
257 buf[1] = (r - 10 * q) + '0'; 261 *((u16 *)buf) = decpair[r - 100*q];
258 r = (q * 0xcd) >> 11; 262 buf += 2;
259 buf[2] = (q - 10 * r) + '0'; 263 /* 0 <= q < 100 */
260 buf[3] = r + '0'; 264 *((u16 *)buf) = decpair[q];
261} 265}
262 266
263/* 267/*
@@ -265,9 +269,9 @@ void put_dec_full4(char *buf, unsigned q)
265 * The approximation x/10000 == (x * 0x346DC5D7) >> 43 269 * The approximation x/10000 == (x * 0x346DC5D7) >> 43
266 * holds for all x < 1,128,869,999. The largest value this 270 * holds for all x < 1,128,869,999. The largest value this
267 * helper will ever be asked to convert is 1,125,520,955. 271 * helper will ever be asked to convert is 1,125,520,955.
268 * (d1 in the put_dec code, assuming n is all-ones). 272 * (second call in the put_dec code, assuming n is all-ones).
269 */ 273 */
270static 274static noinline_for_stack
271unsigned put_dec_helper4(char *buf, unsigned x) 275unsigned put_dec_helper4(char *buf, unsigned x)
272{ 276{
273 uint32_t q = (x * (uint64_t)0x346DC5D7) >> 43; 277 uint32_t q = (x * (uint64_t)0x346DC5D7) >> 43;
@@ -294,6 +298,8 @@ char *put_dec(char *buf, unsigned long long n)
294 d2 = (h ) & 0xffff; 298 d2 = (h ) & 0xffff;
295 d3 = (h >> 16); /* implicit "& 0xffff" */ 299 d3 = (h >> 16); /* implicit "& 0xffff" */
296 300
301 /* n = 2^48 d3 + 2^32 d2 + 2^16 d1 + d0
302 = 281_4749_7671_0656 d3 + 42_9496_7296 d2 + 6_5536 d1 + d0 */
297 q = 656 * d3 + 7296 * d2 + 5536 * d1 + ((uint32_t)n & 0xffff); 303 q = 656 * d3 + 7296 * d2 + 5536 * d1 + ((uint32_t)n & 0xffff);
298 q = put_dec_helper4(buf, q); 304 q = put_dec_helper4(buf, q);
299 305
@@ -323,7 +329,8 @@ char *put_dec(char *buf, unsigned long long n)
323 */ 329 */
324int num_to_str(char *buf, int size, unsigned long long num) 330int num_to_str(char *buf, int size, unsigned long long num)
325{ 331{
326 char tmp[sizeof(num) * 3]; 332 /* put_dec requires 2-byte alignment of the buffer. */
333 char tmp[sizeof(num) * 3] __aligned(2);
327 int idx, len; 334 int idx, len;
328 335
329 /* put_dec() may work incorrectly for num = 0 (generate "", not "0") */ 336 /* put_dec() may work incorrectly for num = 0 (generate "", not "0") */
@@ -384,7 +391,8 @@ static noinline_for_stack
384char *number(char *buf, char *end, unsigned long long num, 391char *number(char *buf, char *end, unsigned long long num,
385 struct printf_spec spec) 392 struct printf_spec spec)
386{ 393{
387 char tmp[3 * sizeof(num)]; 394 /* put_dec requires 2-byte alignment of the buffer. */
395 char tmp[3 * sizeof(num)] __aligned(2);
388 char sign; 396 char sign;
389 char locase; 397 char locase;
390 int need_pfx = ((spec.flags & SPECIAL) && spec.base != 10); 398 int need_pfx = ((spec.flags & SPECIAL) && spec.base != 10);
@@ -944,7 +952,7 @@ char *ip4_string(char *p, const u8 *addr, const char *fmt)
944 break; 952 break;
945 } 953 }
946 for (i = 0; i < 4; i++) { 954 for (i = 0; i < 4; i++) {
947 char temp[3]; /* hold each IP quad in reverse order */ 955 char temp[4] __aligned(2); /* hold each IP quad in reverse order */
948 int digits = put_dec_trunc8(temp, addr[index]) - temp; 956 int digits = put_dec_trunc8(temp, addr[index]) - temp;
949 if (leading_zeros) { 957 if (leading_zeros) {
950 if (digits < 3) 958 if (digits < 3)
diff --git a/mm/filemap.c b/mm/filemap.c
index 12548d03c11d..6bf5e42d560a 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -1693,7 +1693,7 @@ generic_file_read_iter(struct kiocb *iocb, struct iov_iter *iter)
1693 loff_t *ppos = &iocb->ki_pos; 1693 loff_t *ppos = &iocb->ki_pos;
1694 loff_t pos = *ppos; 1694 loff_t pos = *ppos;
1695 1695
1696 if (io_is_direct(file)) { 1696 if (iocb->ki_flags & IOCB_DIRECT) {
1697 struct address_space *mapping = file->f_mapping; 1697 struct address_space *mapping = file->f_mapping;
1698 struct inode *inode = mapping->host; 1698 struct inode *inode = mapping->host;
1699 size_t count = iov_iter_count(iter); 1699 size_t count = iov_iter_count(iter);
@@ -1706,7 +1706,7 @@ generic_file_read_iter(struct kiocb *iocb, struct iov_iter *iter)
1706 pos + count - 1); 1706 pos + count - 1);
1707 if (!retval) { 1707 if (!retval) {
1708 struct iov_iter data = *iter; 1708 struct iov_iter data = *iter;
1709 retval = mapping->a_ops->direct_IO(READ, iocb, &data, pos); 1709 retval = mapping->a_ops->direct_IO(iocb, &data, pos);
1710 } 1710 }
1711 1711
1712 if (retval > 0) { 1712 if (retval > 0) {
@@ -2259,41 +2259,38 @@ EXPORT_SYMBOL(read_cache_page_gfp);
2259 * Returns appropriate error code that caller should return or 2259 * Returns appropriate error code that caller should return or
2260 * zero in case that write should be allowed. 2260 * zero in case that write should be allowed.
2261 */ 2261 */
2262inline int generic_write_checks(struct file *file, loff_t *pos, size_t *count, int isblk) 2262inline ssize_t generic_write_checks(struct kiocb *iocb, struct iov_iter *from)
2263{ 2263{
2264 struct file *file = iocb->ki_filp;
2264 struct inode *inode = file->f_mapping->host; 2265 struct inode *inode = file->f_mapping->host;
2265 unsigned long limit = rlimit(RLIMIT_FSIZE); 2266 unsigned long limit = rlimit(RLIMIT_FSIZE);
2267 loff_t pos;
2266 2268
2267 if (unlikely(*pos < 0)) 2269 if (!iov_iter_count(from))
2268 return -EINVAL; 2270 return 0;
2269 2271
2270 if (!isblk) { 2272 /* FIXME: this is for backwards compatibility with 2.4 */
2271 /* FIXME: this is for backwards compatibility with 2.4 */ 2273 if (iocb->ki_flags & IOCB_APPEND)
2272 if (file->f_flags & O_APPEND) 2274 iocb->ki_pos = i_size_read(inode);
2273 *pos = i_size_read(inode);
2274 2275
2275 if (limit != RLIM_INFINITY) { 2276 pos = iocb->ki_pos;
2276 if (*pos >= limit) { 2277
2277 send_sig(SIGXFSZ, current, 0); 2278 if (limit != RLIM_INFINITY) {
2278 return -EFBIG; 2279 if (iocb->ki_pos >= limit) {
2279 } 2280 send_sig(SIGXFSZ, current, 0);
2280 if (*count > limit - (typeof(limit))*pos) { 2281 return -EFBIG;
2281 *count = limit - (typeof(limit))*pos;
2282 }
2283 } 2282 }
2283 iov_iter_truncate(from, limit - (unsigned long)pos);
2284 } 2284 }
2285 2285
2286 /* 2286 /*
2287 * LFS rule 2287 * LFS rule
2288 */ 2288 */
2289 if (unlikely(*pos + *count > MAX_NON_LFS && 2289 if (unlikely(pos + iov_iter_count(from) > MAX_NON_LFS &&
2290 !(file->f_flags & O_LARGEFILE))) { 2290 !(file->f_flags & O_LARGEFILE))) {
2291 if (*pos >= MAX_NON_LFS) { 2291 if (pos >= MAX_NON_LFS)
2292 return -EFBIG; 2292 return -EFBIG;
2293 } 2293 iov_iter_truncate(from, MAX_NON_LFS - (unsigned long)pos);
2294 if (*count > MAX_NON_LFS - (unsigned long)*pos) {
2295 *count = MAX_NON_LFS - (unsigned long)*pos;
2296 }
2297 } 2294 }
2298 2295
2299 /* 2296 /*
@@ -2303,34 +2300,11 @@ inline int generic_write_checks(struct file *file, loff_t *pos, size_t *count, i
2303 * exceeded without writing data we send a signal and return EFBIG. 2300 * exceeded without writing data we send a signal and return EFBIG.
2304 * Linus frestrict idea will clean these up nicely.. 2301 * Linus frestrict idea will clean these up nicely..
2305 */ 2302 */
2306 if (likely(!isblk)) { 2303 if (unlikely(pos >= inode->i_sb->s_maxbytes))
2307 if (unlikely(*pos >= inode->i_sb->s_maxbytes)) { 2304 return -EFBIG;
2308 if (*count || *pos > inode->i_sb->s_maxbytes) {
2309 return -EFBIG;
2310 }
2311 /* zero-length writes at ->s_maxbytes are OK */
2312 }
2313 2305
2314 if (unlikely(*pos + *count > inode->i_sb->s_maxbytes)) 2306 iov_iter_truncate(from, inode->i_sb->s_maxbytes - pos);
2315 *count = inode->i_sb->s_maxbytes - *pos; 2307 return iov_iter_count(from);
2316 } else {
2317#ifdef CONFIG_BLOCK
2318 loff_t isize;
2319 if (bdev_read_only(I_BDEV(inode)))
2320 return -EPERM;
2321 isize = i_size_read(inode);
2322 if (*pos >= isize) {
2323 if (*count || *pos > isize)
2324 return -ENOSPC;
2325 }
2326
2327 if (*pos + *count > isize)
2328 *count = isize - *pos;
2329#else
2330 return -EPERM;
2331#endif
2332 }
2333 return 0;
2334} 2308}
2335EXPORT_SYMBOL(generic_write_checks); 2309EXPORT_SYMBOL(generic_write_checks);
2336 2310
@@ -2394,7 +2368,7 @@ generic_file_direct_write(struct kiocb *iocb, struct iov_iter *from, loff_t pos)
2394 } 2368 }
2395 2369
2396 data = *from; 2370 data = *from;
2397 written = mapping->a_ops->direct_IO(WRITE, iocb, &data, pos); 2371 written = mapping->a_ops->direct_IO(iocb, &data, pos);
2398 2372
2399 /* 2373 /*
2400 * Finally, try again to invalidate clean pages which might have been 2374 * Finally, try again to invalidate clean pages which might have been
@@ -2556,23 +2530,12 @@ ssize_t __generic_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
2556 struct file *file = iocb->ki_filp; 2530 struct file *file = iocb->ki_filp;
2557 struct address_space * mapping = file->f_mapping; 2531 struct address_space * mapping = file->f_mapping;
2558 struct inode *inode = mapping->host; 2532 struct inode *inode = mapping->host;
2559 loff_t pos = iocb->ki_pos;
2560 ssize_t written = 0; 2533 ssize_t written = 0;
2561 ssize_t err; 2534 ssize_t err;
2562 ssize_t status; 2535 ssize_t status;
2563 size_t count = iov_iter_count(from);
2564 2536
2565 /* We can write back this queue in page reclaim */ 2537 /* We can write back this queue in page reclaim */
2566 current->backing_dev_info = inode_to_bdi(inode); 2538 current->backing_dev_info = inode_to_bdi(inode);
2567 err = generic_write_checks(file, &pos, &count, S_ISBLK(inode->i_mode));
2568 if (err)
2569 goto out;
2570
2571 if (count == 0)
2572 goto out;
2573
2574 iov_iter_truncate(from, count);
2575
2576 err = file_remove_suid(file); 2539 err = file_remove_suid(file);
2577 if (err) 2540 if (err)
2578 goto out; 2541 goto out;
@@ -2581,10 +2544,10 @@ ssize_t __generic_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
2581 if (err) 2544 if (err)
2582 goto out; 2545 goto out;
2583 2546
2584 if (io_is_direct(file)) { 2547 if (iocb->ki_flags & IOCB_DIRECT) {
2585 loff_t endbyte; 2548 loff_t pos, endbyte;
2586 2549
2587 written = generic_file_direct_write(iocb, from, pos); 2550 written = generic_file_direct_write(iocb, from, iocb->ki_pos);
2588 /* 2551 /*
2589 * If the write stopped short of completing, fall back to 2552 * If the write stopped short of completing, fall back to
2590 * buffered writes. Some filesystems do this for writes to 2553 * buffered writes. Some filesystems do this for writes to
@@ -2592,13 +2555,10 @@ ssize_t __generic_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
2592 * not succeed (even if it did, DAX does not handle dirty 2555 * not succeed (even if it did, DAX does not handle dirty
2593 * page-cache pages correctly). 2556 * page-cache pages correctly).
2594 */ 2557 */
2595 if (written < 0 || written == count || IS_DAX(inode)) 2558 if (written < 0 || !iov_iter_count(from) || IS_DAX(inode))
2596 goto out; 2559 goto out;
2597 2560
2598 pos += written; 2561 status = generic_perform_write(file, from, pos = iocb->ki_pos);
2599 count -= written;
2600
2601 status = generic_perform_write(file, from, pos);
2602 /* 2562 /*
2603 * If generic_perform_write() returned a synchronous error 2563 * If generic_perform_write() returned a synchronous error
2604 * then we want to return the number of bytes which were 2564 * then we want to return the number of bytes which were
@@ -2610,15 +2570,15 @@ ssize_t __generic_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
2610 err = status; 2570 err = status;
2611 goto out; 2571 goto out;
2612 } 2572 }
2613 iocb->ki_pos = pos + status;
2614 /* 2573 /*
2615 * We need to ensure that the page cache pages are written to 2574 * We need to ensure that the page cache pages are written to
2616 * disk and invalidated to preserve the expected O_DIRECT 2575 * disk and invalidated to preserve the expected O_DIRECT
2617 * semantics. 2576 * semantics.
2618 */ 2577 */
2619 endbyte = pos + status - 1; 2578 endbyte = pos + status - 1;
2620 err = filemap_write_and_wait_range(file->f_mapping, pos, endbyte); 2579 err = filemap_write_and_wait_range(mapping, pos, endbyte);
2621 if (err == 0) { 2580 if (err == 0) {
2581 iocb->ki_pos = endbyte + 1;
2622 written += status; 2582 written += status;
2623 invalidate_mapping_pages(mapping, 2583 invalidate_mapping_pages(mapping,
2624 pos >> PAGE_CACHE_SHIFT, 2584 pos >> PAGE_CACHE_SHIFT,
@@ -2630,9 +2590,9 @@ ssize_t __generic_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
2630 */ 2590 */
2631 } 2591 }
2632 } else { 2592 } else {
2633 written = generic_perform_write(file, from, pos); 2593 written = generic_perform_write(file, from, iocb->ki_pos);
2634 if (likely(written >= 0)) 2594 if (likely(written > 0))
2635 iocb->ki_pos = pos + written; 2595 iocb->ki_pos += written;
2636 } 2596 }
2637out: 2597out:
2638 current->backing_dev_info = NULL; 2598 current->backing_dev_info = NULL;
@@ -2656,7 +2616,9 @@ ssize_t generic_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
2656 ssize_t ret; 2616 ssize_t ret;
2657 2617
2658 mutex_lock(&inode->i_mutex); 2618 mutex_lock(&inode->i_mutex);
2659 ret = __generic_file_write_iter(iocb, from); 2619 ret = generic_write_checks(iocb, from);
2620 if (ret > 0)
2621 ret = __generic_file_write_iter(iocb, from);
2660 mutex_unlock(&inode->i_mutex); 2622 mutex_unlock(&inode->i_mutex);
2661 2623
2662 if (ret > 0) { 2624 if (ret > 0) {
diff --git a/mm/page_io.c b/mm/page_io.c
index a96c8562d835..6424869e275e 100644
--- a/mm/page_io.c
+++ b/mm/page_io.c
@@ -277,9 +277,7 @@ int __swap_writepage(struct page *page, struct writeback_control *wbc,
277 277
278 set_page_writeback(page); 278 set_page_writeback(page);
279 unlock_page(page); 279 unlock_page(page);
280 ret = mapping->a_ops->direct_IO(ITER_BVEC | WRITE, 280 ret = mapping->a_ops->direct_IO(&kiocb, &from, kiocb.ki_pos);
281 &kiocb, &from,
282 kiocb.ki_pos);
283 if (ret == PAGE_SIZE) { 281 if (ret == PAGE_SIZE) {
284 count_vm_event(PSWPOUT); 282 count_vm_event(PSWPOUT);
285 ret = 0; 283 ret = 0;
diff --git a/scripts/Makefile.kasan b/scripts/Makefile.kasan
index 631619b2b118..3f874d24234f 100644
--- a/scripts/Makefile.kasan
+++ b/scripts/Makefile.kasan
@@ -13,12 +13,16 @@ CFLAGS_KASAN := $(call cc-option, -fsanitize=kernel-address \
13 --param asan-instrumentation-with-call-threshold=$(call_threshold)) 13 --param asan-instrumentation-with-call-threshold=$(call_threshold))
14 14
15ifeq ($(call cc-option, $(CFLAGS_KASAN_MINIMAL) -Werror),) 15ifeq ($(call cc-option, $(CFLAGS_KASAN_MINIMAL) -Werror),)
16 ifneq ($(CONFIG_COMPILE_TEST),y)
16 $(warning Cannot use CONFIG_KASAN: \ 17 $(warning Cannot use CONFIG_KASAN: \
17 -fsanitize=kernel-address is not supported by compiler) 18 -fsanitize=kernel-address is not supported by compiler)
19 endif
18else 20else
19 ifeq ($(CFLAGS_KASAN),) 21 ifeq ($(CFLAGS_KASAN),)
20 $(warning CONFIG_KASAN: compiler does not support all options.\ 22 ifneq ($(CONFIG_COMPILE_TEST),y)
21 Trying minimal configuration) 23 $(warning CONFIG_KASAN: compiler does not support all options.\
24 Trying minimal configuration)
25 endif
22 CFLAGS_KASAN := $(CFLAGS_KASAN_MINIMAL) 26 CFLAGS_KASAN := $(CFLAGS_KASAN_MINIMAL)
23 endif 27 endif
24endif 28endif
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index d12435992dea..89b1df4e72ab 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -47,6 +47,8 @@ my $ignore_perl_version = 0;
47my $minimum_perl_version = 5.10.0; 47my $minimum_perl_version = 5.10.0;
48my $min_conf_desc_length = 4; 48my $min_conf_desc_length = 4;
49my $spelling_file = "$D/spelling.txt"; 49my $spelling_file = "$D/spelling.txt";
50my $codespell = 0;
51my $codespellfile = "/usr/local/share/codespell/dictionary.txt";
50 52
51sub help { 53sub help {
52 my ($exitcode) = @_; 54 my ($exitcode) = @_;
@@ -88,6 +90,9 @@ Options:
88 file. It's your fault if there's no backup or git 90 file. It's your fault if there's no backup or git
89 --ignore-perl-version override checking of perl version. expect 91 --ignore-perl-version override checking of perl version. expect
90 runtime errors. 92 runtime errors.
93 --codespell Use the codespell dictionary for spelling/typos
94 (default:/usr/local/share/codespell/dictionary.txt)
95 --codespellfile Use this codespell dictionary
91 -h, --help, --version display this help and exit 96 -h, --help, --version display this help and exit
92 97
93When FILE is - read standard input. 98When FILE is - read standard input.
@@ -146,6 +151,8 @@ GetOptions(
146 'ignore-perl-version!' => \$ignore_perl_version, 151 'ignore-perl-version!' => \$ignore_perl_version,
147 'debug=s' => \%debug, 152 'debug=s' => \%debug,
148 'test-only=s' => \$tst_only, 153 'test-only=s' => \$tst_only,
154 'codespell!' => \$codespell,
155 'codespellfile=s' => \$codespellfile,
149 'h|help' => \$help, 156 'h|help' => \$help,
150 'version' => \$help 157 'version' => \$help
151) or help(1); 158) or help(1);
@@ -316,6 +323,7 @@ our $Operators = qr{
316 323
317our $c90_Keywords = qr{do|for|while|if|else|return|goto|continue|switch|default|case|break}x; 324our $c90_Keywords = qr{do|for|while|if|else|return|goto|continue|switch|default|case|break}x;
318 325
326our $BasicType;
319our $NonptrType; 327our $NonptrType;
320our $NonptrTypeMisordered; 328our $NonptrTypeMisordered;
321our $NonptrTypeWithAttr; 329our $NonptrTypeWithAttr;
@@ -436,6 +444,14 @@ foreach my $entry (@mode_permission_funcs) {
436 $mode_perms_search .= $entry->[0]; 444 $mode_perms_search .= $entry->[0];
437} 445}
438 446
447our $mode_perms_world_writable = qr{
448 S_IWUGO |
449 S_IWOTH |
450 S_IRWXUGO |
451 S_IALLUGO |
452 0[0-7][0-7][2367]
453}x;
454
439our $allowed_asm_includes = qr{(?x: 455our $allowed_asm_includes = qr{(?x:
440 irq| 456 irq|
441 memory| 457 memory|
@@ -449,7 +465,6 @@ my $misspellings;
449my %spelling_fix; 465my %spelling_fix;
450 466
451if (open(my $spelling, '<', $spelling_file)) { 467if (open(my $spelling, '<', $spelling_file)) {
452 my @spelling_list;
453 while (<$spelling>) { 468 while (<$spelling>) {
454 my $line = $_; 469 my $line = $_;
455 470
@@ -461,21 +476,50 @@ if (open(my $spelling, '<', $spelling_file)) {
461 476
462 my ($suspect, $fix) = split(/\|\|/, $line); 477 my ($suspect, $fix) = split(/\|\|/, $line);
463 478
464 push(@spelling_list, $suspect);
465 $spelling_fix{$suspect} = $fix; 479 $spelling_fix{$suspect} = $fix;
466 } 480 }
467 close($spelling); 481 close($spelling);
468 $misspellings = join("|", @spelling_list);
469} else { 482} else {
470 warn "No typos will be found - file '$spelling_file': $!\n"; 483 warn "No typos will be found - file '$spelling_file': $!\n";
471} 484}
472 485
486if ($codespell) {
487 if (open(my $spelling, '<', $codespellfile)) {
488 while (<$spelling>) {
489 my $line = $_;
490
491 $line =~ s/\s*\n?$//g;
492 $line =~ s/^\s*//g;
493
494 next if ($line =~ m/^\s*#/);
495 next if ($line =~ m/^\s*$/);
496 next if ($line =~ m/, disabled/i);
497
498 $line =~ s/,.*$//;
499
500 my ($suspect, $fix) = split(/->/, $line);
501
502 $spelling_fix{$suspect} = $fix;
503 }
504 close($spelling);
505 } else {
506 warn "No codespell typos will be found - file '$codespellfile': $!\n";
507 }
508}
509
510$misspellings = join("|", sort keys %spelling_fix) if keys %spelling_fix;
511
473sub build_types { 512sub build_types {
474 my $mods = "(?x: \n" . join("|\n ", @modifierList) . "\n)"; 513 my $mods = "(?x: \n" . join("|\n ", @modifierList) . "\n)";
475 my $all = "(?x: \n" . join("|\n ", @typeList) . "\n)"; 514 my $all = "(?x: \n" . join("|\n ", @typeList) . "\n)";
476 my $Misordered = "(?x: \n" . join("|\n ", @typeListMisordered) . "\n)"; 515 my $Misordered = "(?x: \n" . join("|\n ", @typeListMisordered) . "\n)";
477 my $allWithAttr = "(?x: \n" . join("|\n ", @typeListWithAttr) . "\n)"; 516 my $allWithAttr = "(?x: \n" . join("|\n ", @typeListWithAttr) . "\n)";
478 $Modifier = qr{(?:$Attribute|$Sparse|$mods)}; 517 $Modifier = qr{(?:$Attribute|$Sparse|$mods)};
518 $BasicType = qr{
519 (?:$typeOtherOSTypedefs\b)|
520 (?:$typeTypedefs\b)|
521 (?:${all}\b)
522 }x;
479 $NonptrType = qr{ 523 $NonptrType = qr{
480 (?:$Modifier\s+|const\s+)* 524 (?:$Modifier\s+|const\s+)*
481 (?: 525 (?:
@@ -1646,7 +1690,7 @@ sub fix_inserted_deleted_lines {
1646 foreach my $old_line (@{$linesRef}) { 1690 foreach my $old_line (@{$linesRef}) {
1647 my $save_line = 1; 1691 my $save_line = 1;
1648 my $line = $old_line; #don't modify the array 1692 my $line = $old_line; #don't modify the array
1649 if ($line =~ /^(?:\+\+\+\|\-\-\-)\s+\S+/) { #new filename 1693 if ($line =~ /^(?:\+\+\+|\-\-\-)\s+\S+/) { #new filename
1650 $delta_offset = 0; 1694 $delta_offset = 0;
1651 } elsif ($line =~ /^\@\@ -\d+,\d+ \+\d+,\d+ \@\@/) { #new hunk 1695 } elsif ($line =~ /^\@\@ -\d+,\d+ \+\d+,\d+ \@\@/) { #new hunk
1652 $range_last_linenr = $new_linenr; 1696 $range_last_linenr = $new_linenr;
@@ -1854,6 +1898,7 @@ sub process {
1854 1898
1855 my $in_header_lines = $file ? 0 : 1; 1899 my $in_header_lines = $file ? 0 : 1;
1856 my $in_commit_log = 0; #Scanning lines before patch 1900 my $in_commit_log = 0; #Scanning lines before patch
1901 my $commit_log_long_line = 0;
1857 my $reported_maintainer_file = 0; 1902 my $reported_maintainer_file = 0;
1858 my $non_utf8_charset = 0; 1903 my $non_utf8_charset = 0;
1859 1904
@@ -2189,6 +2234,14 @@ sub process {
2189 "Remove Gerrit Change-Id's before submitting upstream.\n" . $herecurr); 2234 "Remove Gerrit Change-Id's before submitting upstream.\n" . $herecurr);
2190 } 2235 }
2191 2236
2237# Check for line lengths > 75 in commit log, warn once
2238 if ($in_commit_log && !$commit_log_long_line &&
2239 length($line) > 75) {
2240 WARN("COMMIT_LOG_LONG_LINE",
2241 "Possible unwrapped commit description (prefer a maximum 75 chars per line)\n" . $herecurr);
2242 $commit_log_long_line = 1;
2243 }
2244
2192# Check for git id commit length and improperly formed commit descriptions 2245# Check for git id commit length and improperly formed commit descriptions
2193 if ($in_commit_log && $line =~ /\b(c)ommit\s+([0-9a-f]{5,})/i) { 2246 if ($in_commit_log && $line =~ /\b(c)ommit\s+([0-9a-f]{5,})/i) {
2194 my $init_char = $1; 2247 my $init_char = $1;
@@ -2303,8 +2356,9 @@ sub process {
2303 } 2356 }
2304 2357
2305# Check for various typo / spelling mistakes 2358# Check for various typo / spelling mistakes
2306 if (defined($misspellings) && ($in_commit_log || $line =~ /^\+/)) { 2359 if (defined($misspellings) &&
2307 while ($rawline =~ /(?:^|[^a-z@])($misspellings)(?:$|[^a-z@])/gi) { 2360 ($in_commit_log || $line =~ /^(?:\+|Subject:)/i)) {
2361 while ($rawline =~ /(?:^|[^a-z@])($misspellings)(?:\b|$|[^a-z@])/gi) {
2308 my $typo = $1; 2362 my $typo = $1;
2309 my $typo_fix = $spelling_fix{lc($typo)}; 2363 my $typo_fix = $spelling_fix{lc($typo)};
2310 $typo_fix = ucfirst($typo_fix) if ($typo =~ /^[A-Z]/); 2364 $typo_fix = ucfirst($typo_fix) if ($typo =~ /^[A-Z]/);
@@ -2459,8 +2513,9 @@ sub process {
2459#line length limit 2513#line length limit
2460 if ($line =~ /^\+/ && $prevrawline !~ /\/\*\*/ && 2514 if ($line =~ /^\+/ && $prevrawline !~ /\/\*\*/ &&
2461 $rawline !~ /^.\s*\*\s*\@$Ident\s/ && 2515 $rawline !~ /^.\s*\*\s*\@$Ident\s/ &&
2462 !($line =~ /^\+\s*$logFunctions\s*\(\s*(?:(KERN_\S+\s*|[^"]*))?"[X\t]*"\s*(?:|,|\)\s*;)\s*$/ || 2516 !($line =~ /^\+\s*$logFunctions\s*\(\s*(?:(KERN_\S+\s*|[^"]*))?$String\s*(?:|,|\)\s*;)\s*$/ ||
2463 $line =~ /^\+\s*"[^"]*"\s*(?:\s*|,|\)\s*;)\s*$/) && 2517 $line =~ /^\+\s*$String\s*(?:\s*|,|\)\s*;)\s*$/ ||
2518 $line =~ /^\+\s*#\s*define\s+\w+\s+$String$/) &&
2464 $length > $max_line_length) 2519 $length > $max_line_length)
2465 { 2520 {
2466 WARN("LONG_LINE", 2521 WARN("LONG_LINE",
@@ -2552,8 +2607,15 @@ sub process {
2552 } 2607 }
2553 } 2608 }
2554 2609
2555 if ($line =~ /^\+.*(\w+\s*)?\(\s*$Type\s*\)[ \t]+(?!$Assignment|$Arithmetic|[,;:\?\(\{\}\[\<\>]|&&|\|\||\\$)/ && 2610# check for space after cast like "(int) foo" or "(struct foo) bar"
2556 (!defined($1) || $1 !~ /sizeof\s*/)) { 2611# avoid checking a few false positives:
2612# "sizeof(<type>)" or "__alignof__(<type>)"
2613# function pointer declarations like "(*foo)(int) = bar;"
2614# structure definitions like "(struct foo) { 0 };"
2615# multiline macros that define functions
2616# known attributes or the __attribute__ keyword
2617 if ($line =~ /^\+(.*)\(\s*$Type\s*\)([ \t]++)((?![={]|\\$|$Attribute|__attribute__))/ &&
2618 (!defined($1) || $1 !~ /\b(?:sizeof|__alignof__)\s*$/)) {
2557 if (CHK("SPACING", 2619 if (CHK("SPACING",
2558 "No space is necessary after a cast\n" . $herecurr) && 2620 "No space is necessary after a cast\n" . $herecurr) &&
2559 $fix) { 2621 $fix) {
@@ -3146,6 +3208,18 @@ sub process {
3146 $herecurr); 3208 $herecurr);
3147 } 3209 }
3148 3210
3211# check for const <foo> const where <foo> is not a pointer or array type
3212 if ($sline =~ /\bconst\s+($BasicType)\s+const\b/) {
3213 my $found = $1;
3214 if ($sline =~ /\bconst\s+\Q$found\E\s+const\b\s*\*/) {
3215 WARN("CONST_CONST",
3216 "'const $found const *' should probably be 'const $found * const'\n" . $herecurr);
3217 } elsif ($sline !~ /\bconst\s+\Q$found\E\s+const\s+\w+\s*\[/) {
3218 WARN("CONST_CONST",
3219 "'const $found const' should probably be 'const $found'\n" . $herecurr);
3220 }
3221 }
3222
3149# check for non-global char *foo[] = {"bar", ...} declarations. 3223# check for non-global char *foo[] = {"bar", ...} declarations.
3150 if ($line =~ /^.\s+(?:static\s+|const\s+)?char\s+\*\s*\w+\s*\[\s*\]\s*=\s*\{/) { 3224 if ($line =~ /^.\s+(?:static\s+|const\s+)?char\s+\*\s*\w+\s*\[\s*\]\s*=\s*\{/) {
3151 WARN("STATIC_CONST_CHAR_ARRAY", 3225 WARN("STATIC_CONST_CHAR_ARRAY",
@@ -3153,6 +3227,19 @@ sub process {
3153 $herecurr); 3227 $herecurr);
3154 } 3228 }
3155 3229
3230# check for sizeof(foo)/sizeof(foo[0]) that could be ARRAY_SIZE(foo)
3231 if ($line =~ m@\bsizeof\s*\(\s*($Lval)\s*\)@) {
3232 my $array = $1;
3233 if ($line =~ m@\b(sizeof\s*\(\s*\Q$array\E\s*\)\s*/\s*sizeof\s*\(\s*\Q$array\E\s*\[\s*0\s*\]\s*\))@) {
3234 my $array_div = $1;
3235 if (WARN("ARRAY_SIZE",
3236 "Prefer ARRAY_SIZE($array)\n" . $herecurr) &&
3237 $fix) {
3238 $fixed[$fixlinenr] =~ s/\Q$array_div\E/ARRAY_SIZE($array)/;
3239 }
3240 }
3241 }
3242
3156# check for function declarations without arguments like "int foo()" 3243# check for function declarations without arguments like "int foo()"
3157 if ($line =~ /(\b$Type\s+$Ident)\s*\(\s*\)/) { 3244 if ($line =~ /(\b$Type\s+$Ident)\s*\(\s*\)/) {
3158 if (ERROR("FUNCTION_WITHOUT_ARGS", 3245 if (ERROR("FUNCTION_WITHOUT_ARGS",
@@ -3309,6 +3396,14 @@ sub process {
3309 "Prefer dev_$level(... to dev_printk(KERN_$orig, ...\n" . $herecurr); 3396 "Prefer dev_$level(... to dev_printk(KERN_$orig, ...\n" . $herecurr);
3310 } 3397 }
3311 3398
3399# ENOSYS means "bad syscall nr" and nothing else. This will have a small
3400# number of false positives, but assembly files are not checked, so at
3401# least the arch entry code will not trigger this warning.
3402 if ($line =~ /\bENOSYS\b/) {
3403 WARN("ENOSYS",
3404 "ENOSYS means 'invalid syscall nr' and nothing else\n" . $herecurr);
3405 }
3406
3312# function brace can't be on same line, except for #defines of do while, 3407# function brace can't be on same line, except for #defines of do while,
3313# or if closed on same line 3408# or if closed on same line
3314 if (($line=~/$Type\s*$Ident\(.*\).*\s*{/) and 3409 if (($line=~/$Type\s*$Ident\(.*\).*\s*{/) and
@@ -3565,7 +3660,7 @@ sub process {
3565 3660
3566 # Ignore operators passed as parameters. 3661 # Ignore operators passed as parameters.
3567 if ($op_type ne 'V' && 3662 if ($op_type ne 'V' &&
3568 $ca =~ /\s$/ && $cc =~ /^\s*,/) { 3663 $ca =~ /\s$/ && $cc =~ /^\s*[,\)]/) {
3569 3664
3570# # Ignore comments 3665# # Ignore comments
3571# } elsif ($op =~ /^$;+$/) { 3666# } elsif ($op =~ /^$;+$/) {
@@ -3750,6 +3845,14 @@ sub process {
3750 $ok = 1; 3845 $ok = 1;
3751 } 3846 }
3752 3847
3848 # for asm volatile statements
3849 # ignore a colon with another
3850 # colon immediately before or after
3851 if (($op eq ':') &&
3852 ($ca =~ /:$/ || $cc =~ /^:/)) {
3853 $ok = 1;
3854 }
3855
3753 # messages are ERROR, but ?: are CHK 3856 # messages are ERROR, but ?: are CHK
3754 if ($ok == 0) { 3857 if ($ok == 0) {
3755 my $msg_type = \&ERROR; 3858 my $msg_type = \&ERROR;
@@ -3963,12 +4066,12 @@ sub process {
3963 } 4066 }
3964 } 4067 }
3965 4068
3966# Return of what appears to be an errno should normally be -'ve 4069# Return of what appears to be an errno should normally be negative
3967 if ($line =~ /^.\s*return\s*(E[A-Z]*)\s*;/) { 4070 if ($sline =~ /\breturn(?:\s*\(+\s*|\s+)(E[A-Z]+)(?:\s*\)+\s*|\s*)[;:,]/) {
3968 my $name = $1; 4071 my $name = $1;
3969 if ($name ne 'EOF' && $name ne 'ERROR') { 4072 if ($name ne 'EOF' && $name ne 'ERROR') {
3970 WARN("USE_NEGATIVE_ERRNO", 4073 WARN("USE_NEGATIVE_ERRNO",
3971 "return of an errno should typically be -ve (return -$1)\n" . $herecurr); 4074 "return of an errno should typically be negative (ie: return -$1)\n" . $herecurr);
3972 } 4075 }
3973 } 4076 }
3974 4077
@@ -4178,7 +4281,8 @@ sub process {
4178 } 4281 }
4179 } 4282 }
4180 4283
4181#warn if <asm/foo.h> is #included and <linux/foo.h> is available (uses RAW line) 4284# warn if <asm/foo.h> is #included and <linux/foo.h> is available and includes
4285# itself <asm/foo.h> (uses RAW line)
4182 if ($tree && $rawline =~ m{^.\s*\#\s*include\s*\<asm\/(.*)\.h\>}) { 4286 if ($tree && $rawline =~ m{^.\s*\#\s*include\s*\<asm\/(.*)\.h\>}) {
4183 my $file = "$1.h"; 4287 my $file = "$1.h";
4184 my $checkfile = "include/linux/$file"; 4288 my $checkfile = "include/linux/$file";
@@ -4186,12 +4290,15 @@ sub process {
4186 $realfile ne $checkfile && 4290 $realfile ne $checkfile &&
4187 $1 !~ /$allowed_asm_includes/) 4291 $1 !~ /$allowed_asm_includes/)
4188 { 4292 {
4189 if ($realfile =~ m{^arch/}) { 4293 my $asminclude = `grep -Ec "#include\\s+<asm/$file>" $root/$checkfile`;
4190 CHK("ARCH_INCLUDE_LINUX", 4294 if ($asminclude > 0) {
4191 "Consider using #include <linux/$file> instead of <asm/$file>\n" . $herecurr); 4295 if ($realfile =~ m{^arch/}) {
4192 } else { 4296 CHK("ARCH_INCLUDE_LINUX",
4193 WARN("INCLUDE_LINUX", 4297 "Consider using #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
4194 "Use #include <linux/$file> instead of <asm/$file>\n" . $herecurr); 4298 } else {
4299 WARN("INCLUDE_LINUX",
4300 "Use #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
4301 }
4195 } 4302 }
4196 } 4303 }
4197 } 4304 }
@@ -4700,6 +4807,16 @@ sub process {
4700 } 4807 }
4701 } 4808 }
4702 4809
4810# check for __read_mostly with const non-pointer (should just be const)
4811 if ($line =~ /\b__read_mostly\b/ &&
4812 $line =~ /($Type)\s*$Ident/ && $1 !~ /\*\s*$/ && $1 =~ /\bconst\b/) {
4813 if (ERROR("CONST_READ_MOSTLY",
4814 "Invalid use of __read_mostly with const type\n" . $herecurr) &&
4815 $fix) {
4816 $fixed[$fixlinenr] =~ s/\s+__read_mostly\b//;
4817 }
4818 }
4819
4703# don't use __constant_<foo> functions outside of include/uapi/ 4820# don't use __constant_<foo> functions outside of include/uapi/
4704 if ($realfile !~ m@^include/uapi/@ && 4821 if ($realfile !~ m@^include/uapi/@ &&
4705 $line =~ /(__constant_(?:htons|ntohs|[bl]e(?:16|32|64)_to_cpu|cpu_to_[bl]e(?:16|32|64)))\s*\(/) { 4822 $line =~ /(__constant_(?:htons|ntohs|[bl]e(?:16|32|64)_to_cpu|cpu_to_[bl]e(?:16|32|64)))\s*\(/) {
@@ -5261,6 +5378,7 @@ sub process {
5261 stacktrace_ops| 5378 stacktrace_ops|
5262 sysfs_ops| 5379 sysfs_ops|
5263 tty_operations| 5380 tty_operations|
5381 uart_ops|
5264 usb_mon_operations| 5382 usb_mon_operations|
5265 wd_ops}x; 5383 wd_ops}x;
5266 if ($line !~ /\bconst\b/ && 5384 if ($line !~ /\bconst\b/ &&
@@ -5318,8 +5436,8 @@ sub process {
5318 } 5436 }
5319 } 5437 }
5320 5438
5321 if ($line =~ /debugfs_create_file.*S_IWUGO/ || 5439 if ($line =~ /debugfs_create_\w+.*\b$mode_perms_world_writable\b/ ||
5322 $line =~ /DEVICE_ATTR.*S_IWUGO/ ) { 5440 $line =~ /DEVICE_ATTR.*\b$mode_perms_world_writable\b/) {
5323 WARN("EXPORTED_WORLD_WRITABLE", 5441 WARN("EXPORTED_WORLD_WRITABLE",
5324 "Exporting world writable files is usually an error. Consider more restrictive permissions.\n" . $herecurr); 5442 "Exporting world writable files is usually an error. Consider more restrictive permissions.\n" . $herecurr);
5325 } 5443 }
diff --git a/scripts/mod/devicetable-offsets.c b/scripts/mod/devicetable-offsets.c
index f282516acc7b..fce36d0f6898 100644
--- a/scripts/mod/devicetable-offsets.c
+++ b/scripts/mod/devicetable-offsets.c
@@ -168,6 +168,9 @@ int main(void)
168 DEVID_FIELD(amba_id, id); 168 DEVID_FIELD(amba_id, id);
169 DEVID_FIELD(amba_id, mask); 169 DEVID_FIELD(amba_id, mask);
170 170
171 DEVID(mips_cdmm_device_id);
172 DEVID_FIELD(mips_cdmm_device_id, type);
173
171 DEVID(x86_cpu_id); 174 DEVID(x86_cpu_id);
172 DEVID_FIELD(x86_cpu_id, feature); 175 DEVID_FIELD(x86_cpu_id, feature);
173 DEVID_FIELD(x86_cpu_id, family); 176 DEVID_FIELD(x86_cpu_id, family);
diff --git a/scripts/mod/file2alias.c b/scripts/mod/file2alias.c
index e614ef689eee..78691d51a479 100644
--- a/scripts/mod/file2alias.c
+++ b/scripts/mod/file2alias.c
@@ -1109,6 +1109,22 @@ static int do_amba_entry(const char *filename,
1109} 1109}
1110ADD_TO_DEVTABLE("amba", amba_id, do_amba_entry); 1110ADD_TO_DEVTABLE("amba", amba_id, do_amba_entry);
1111 1111
1112/*
1113 * looks like: "mipscdmm:tN"
1114 *
1115 * N is exactly 2 digits, where each is an upper-case hex digit, or
1116 * a ? or [] pattern matching exactly one digit.
1117 */
1118static int do_mips_cdmm_entry(const char *filename,
1119 void *symval, char *alias)
1120{
1121 DEF_FIELD(symval, mips_cdmm_device_id, type);
1122
1123 sprintf(alias, "mipscdmm:t%02X*", type);
1124 return 1;
1125}
1126ADD_TO_DEVTABLE("mipscdmm", mips_cdmm_device_id, do_mips_cdmm_entry);
1127
1112/* LOOKS like cpu:type:x86,venVVVVfamFFFFmodMMMM:feature:*,FEAT,* 1128/* LOOKS like cpu:type:x86,venVVVVfamFFFFmodMMMM:feature:*,FEAT,*
1113 * All fields are numbers. It would be nicer to use strings for vendor 1129 * All fields are numbers. It would be nicer to use strings for vendor
1114 * and feature, but getting those out of the build system here is too 1130 * and feature, but getting those out of the build system here is too
diff --git a/scripts/spelling.txt b/scripts/spelling.txt
index fc7fd52b5e03..bb8e4d0a1911 100644
--- a/scripts/spelling.txt
+++ b/scripts/spelling.txt
@@ -825,6 +825,7 @@ retreived||retrieved
825retreive||retrieve 825retreive||retrieve
826retrive||retrieve 826retrive||retrieve
827retuned||returned 827retuned||returned
828reudce||reduce
828reuest||request 829reuest||request
829reuqest||request 830reuqest||request
830reutnred||returned 831reutnred||returned
diff --git a/security/tomoyo/util.c b/security/tomoyo/util.c
index 2952ba576fb9..b974a6997d7f 100644
--- a/security/tomoyo/util.c
+++ b/security/tomoyo/util.c
@@ -948,15 +948,18 @@ bool tomoyo_path_matches_pattern(const struct tomoyo_path_info *filename,
948 */ 948 */
949const char *tomoyo_get_exe(void) 949const char *tomoyo_get_exe(void)
950{ 950{
951 struct file *exe_file;
952 const char *cp;
951 struct mm_struct *mm = current->mm; 953 struct mm_struct *mm = current->mm;
952 const char *cp = NULL;
953 954
954 if (!mm) 955 if (!mm)
955 return NULL; 956 return NULL;
956 down_read(&mm->mmap_sem); 957 exe_file = get_mm_exe_file(mm);
957 if (mm->exe_file) 958 if (!exe_file)
958 cp = tomoyo_realpath_from_path(&mm->exe_file->f_path); 959 return NULL;
959 up_read(&mm->mmap_sem); 960
961 cp = tomoyo_realpath_from_path(&exe_file->f_path);
962 fput(exe_file);
960 return cp; 963 return cp;
961} 964}
962 965
diff --git a/sound/soc/codecs/pcm512x.c b/sound/soc/codecs/pcm512x.c
index 5a30fdd0da00..e12764d15431 100644
--- a/sound/soc/codecs/pcm512x.c
+++ b/sound/soc/codecs/pcm512x.c
@@ -18,6 +18,7 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/kernel.h>
21#include <linux/pm_runtime.h> 22#include <linux/pm_runtime.h>
22#include <linux/regmap.h> 23#include <linux/regmap.h>
23#include <linux/regulator/consumer.h> 24#include <linux/regulator/consumer.h>
@@ -31,8 +32,6 @@
31 32
32#define DIV_ROUND_DOWN_ULL(ll, d) \ 33#define DIV_ROUND_DOWN_ULL(ll, d) \
33 ({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; }) 34 ({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; })
34#define DIV_ROUND_CLOSEST_ULL(ll, d) \
35 ({ unsigned long long _tmp = (ll)+(d)/2; do_div(_tmp, d); _tmp; })
36 35
37#define PCM512x_NUM_SUPPLIES 3 36#define PCM512x_NUM_SUPPLIES 3
38static const char * const pcm512x_supply_names[PCM512x_NUM_SUPPLIES] = { 37static const char * const pcm512x_supply_names[PCM512x_NUM_SUPPLIES] = {
diff --git a/tools/power/acpi/os_specific/service_layers/oslinuxtbl.c b/tools/power/acpi/os_specific/service_layers/oslinuxtbl.c
index 92f1fd700344..db15c9d2049e 100644
--- a/tools/power/acpi/os_specific/service_layers/oslinuxtbl.c
+++ b/tools/power/acpi/os_specific/service_layers/oslinuxtbl.c
@@ -1156,7 +1156,7 @@ osl_table_name_from_file(char *filename, char *signature, u32 *instance)
1156 /* Extract instance number */ 1156 /* Extract instance number */
1157 1157
1158 if (isdigit((int)filename[ACPI_NAME_SIZE])) { 1158 if (isdigit((int)filename[ACPI_NAME_SIZE])) {
1159 sscanf(&filename[ACPI_NAME_SIZE], "%d", instance); 1159 sscanf(&filename[ACPI_NAME_SIZE], "%u", instance);
1160 } else if (strlen(filename) != ACPI_NAME_SIZE) { 1160 } else if (strlen(filename) != ACPI_NAME_SIZE) {
1161 return (AE_BAD_SIGNATURE); 1161 return (AE_BAD_SIGNATURE);
1162 } else { 1162 } else {
diff --git a/tools/power/acpi/os_specific/service_layers/osunixmap.c b/tools/power/acpi/os_specific/service_layers/osunixmap.c
index 3853a7350440..0b1fa290245a 100644
--- a/tools/power/acpi/os_specific/service_layers/osunixmap.c
+++ b/tools/power/acpi/os_specific/service_layers/osunixmap.c
@@ -146,6 +146,6 @@ void acpi_os_unmap_memory(void *where, acpi_size length)
146 acpi_size page_size; 146 acpi_size page_size;
147 147
148 page_size = acpi_os_get_page_size(); 148 page_size = acpi_os_get_page_size();
149 offset = (acpi_physical_address) where % page_size; 149 offset = ACPI_TO_INTEGER(where) % page_size;
150 munmap((u8 *)where - offset, (length + offset)); 150 munmap((u8 *)where - offset, (length + offset));
151} 151}