diff options
| -rw-r--r-- | drivers/platform/x86/mlx-platform.c | 30 |
1 files changed, 27 insertions, 3 deletions
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c index 91bdbc2b854f..57b1268a3b9c 100644 --- a/drivers/platform/x86/mlx-platform.c +++ b/drivers/platform/x86/mlx-platform.c | |||
| @@ -44,6 +44,8 @@ | |||
| 44 | #define MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET 0x3b | 44 | #define MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET 0x3b |
| 45 | #define MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET 0x40 | 45 | #define MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET 0x40 |
| 46 | #define MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET 0x41 | 46 | #define MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET 0x41 |
| 47 | #define MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET 0x42 | ||
| 48 | #define MLXPLAT_CPLD_LPC_REG_AGGRCO_MASK_OFFSET 0x43 | ||
| 47 | #define MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET 0x50 | 49 | #define MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET 0x50 |
| 48 | #define MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET 0x51 | 50 | #define MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET 0x51 |
| 49 | #define MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET 0x52 | 51 | #define MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET 0x52 |
| @@ -105,7 +107,9 @@ | |||
| 105 | MLXPLAT_CPLD_AGGR_FAN_MASK_DEF) | 107 | MLXPLAT_CPLD_AGGR_FAN_MASK_DEF) |
| 106 | #define MLXPLAT_CPLD_AGGR_ASIC_MASK_NG 0x01 | 108 | #define MLXPLAT_CPLD_AGGR_ASIC_MASK_NG 0x01 |
| 107 | #define MLXPLAT_CPLD_AGGR_MASK_NG_DEF 0x04 | 109 | #define MLXPLAT_CPLD_AGGR_MASK_NG_DEF 0x04 |
| 110 | #define MLXPLAT_CPLD_AGGR_MASK_COMEX BIT(0) | ||
| 108 | #define MLXPLAT_CPLD_LOW_AGGR_MASK_LOW 0xc1 | 111 | #define MLXPLAT_CPLD_LOW_AGGR_MASK_LOW 0xc1 |
| 112 | #define MLXPLAT_CPLD_LOW_AGGR_MASK_I2C BIT(6) | ||
| 109 | #define MLXPLAT_CPLD_PSU_MASK GENMASK(1, 0) | 113 | #define MLXPLAT_CPLD_PSU_MASK GENMASK(1, 0) |
| 110 | #define MLXPLAT_CPLD_PWR_MASK GENMASK(1, 0) | 114 | #define MLXPLAT_CPLD_PWR_MASK GENMASK(1, 0) |
| 111 | #define MLXPLAT_CPLD_FAN_MASK GENMASK(3, 0) | 115 | #define MLXPLAT_CPLD_FAN_MASK GENMASK(3, 0) |
| @@ -183,6 +187,14 @@ static const struct resource mlxplat_lpc_resources[] = { | |||
| 183 | IORESOURCE_IO), | 187 | IORESOURCE_IO), |
| 184 | }; | 188 | }; |
| 185 | 189 | ||
| 190 | /* Platform next generation systems i2c data */ | ||
| 191 | static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_i2c_ng_data = { | ||
| 192 | .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, | ||
| 193 | .mask = MLXPLAT_CPLD_AGGR_MASK_COMEX, | ||
| 194 | .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET, | ||
| 195 | .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_I2C, | ||
| 196 | }; | ||
| 197 | |||
| 186 | /* Platform default channels */ | 198 | /* Platform default channels */ |
| 187 | static const int mlxplat_default_channels[][MLXPLAT_CPLD_GRP_CHNL_NUM] = { | 199 | static const int mlxplat_default_channels[][MLXPLAT_CPLD_GRP_CHNL_NUM] = { |
| 188 | { | 200 | { |
| @@ -706,7 +718,7 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_ng_data = { | |||
| 706 | .items = mlxplat_mlxcpld_default_ng_items, | 718 | .items = mlxplat_mlxcpld_default_ng_items, |
| 707 | .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_items), | 719 | .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_items), |
| 708 | .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, | 720 | .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, |
| 709 | .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, | 721 | .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, |
| 710 | .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, | 722 | .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, |
| 711 | .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, | 723 | .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, |
| 712 | }; | 724 | }; |
| @@ -1533,6 +1545,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) | |||
| 1533 | case MLXPLAT_CPLD_LPC_REG_WP2_OFFSET: | 1545 | case MLXPLAT_CPLD_LPC_REG_WP2_OFFSET: |
| 1534 | case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: | 1546 | case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: |
| 1535 | case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET: | 1547 | case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET: |
| 1548 | case MLXPLAT_CPLD_LPC_REG_AGGRCO_MASK_OFFSET: | ||
| 1536 | case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: | 1549 | case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: |
| 1537 | case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: | 1550 | case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: |
| 1538 | case MLXPLAT_CPLD_LPC_REG_PSU_EVENT_OFFSET: | 1551 | case MLXPLAT_CPLD_LPC_REG_PSU_EVENT_OFFSET: |
| @@ -1580,6 +1593,8 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) | |||
| 1580 | case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: | 1593 | case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: |
| 1581 | case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET: | 1594 | case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET: |
| 1582 | case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET: | 1595 | case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET: |
| 1596 | case MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET: | ||
| 1597 | case MLXPLAT_CPLD_LPC_REG_AGGRCO_MASK_OFFSET: | ||
| 1583 | case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET: | 1598 | case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET: |
| 1584 | case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: | 1599 | case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: |
| 1585 | case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: | 1600 | case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: |
| @@ -1647,6 +1662,8 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) | |||
| 1647 | case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: | 1662 | case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: |
| 1648 | case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET: | 1663 | case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET: |
| 1649 | case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET: | 1664 | case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET: |
| 1665 | case MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET: | ||
| 1666 | case MLXPLAT_CPLD_LPC_REG_AGGRCO_MASK_OFFSET: | ||
| 1650 | case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET: | 1667 | case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET: |
| 1651 | case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: | 1668 | case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: |
| 1652 | case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: | 1669 | case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: |
| @@ -1736,6 +1753,7 @@ static struct resource mlxplat_mlxcpld_resources[] = { | |||
| 1736 | }; | 1753 | }; |
| 1737 | 1754 | ||
| 1738 | static struct platform_device *mlxplat_dev; | 1755 | static struct platform_device *mlxplat_dev; |
| 1756 | static struct mlxreg_core_hotplug_platform_data *mlxplat_i2c; | ||
| 1739 | static struct mlxreg_core_hotplug_platform_data *mlxplat_hotplug; | 1757 | static struct mlxreg_core_hotplug_platform_data *mlxplat_hotplug; |
| 1740 | static struct mlxreg_core_platform_data *mlxplat_led; | 1758 | static struct mlxreg_core_platform_data *mlxplat_led; |
| 1741 | static struct mlxreg_core_platform_data *mlxplat_regs_io; | 1759 | static struct mlxreg_core_platform_data *mlxplat_regs_io; |
| @@ -1837,6 +1855,7 @@ static int __init mlxplat_dmi_qmb7xx_matched(const struct dmi_system_id *dmi) | |||
| 1837 | mlxplat_fan = &mlxplat_default_fan_data; | 1855 | mlxplat_fan = &mlxplat_default_fan_data; |
| 1838 | for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type2); i++) | 1856 | for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type2); i++) |
| 1839 | mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i]; | 1857 | mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i]; |
| 1858 | mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; | ||
| 1840 | 1859 | ||
| 1841 | return 1; | 1860 | return 1; |
| 1842 | }; | 1861 | }; |
| @@ -2044,8 +2063,13 @@ static int __init mlxplat_init(void) | |||
| 2044 | goto fail_alloc; | 2063 | goto fail_alloc; |
| 2045 | 2064 | ||
| 2046 | nr = (nr == MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM) ? -1 : nr; | 2065 | nr = (nr == MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM) ? -1 : nr; |
| 2047 | priv->pdev_i2c = platform_device_register_simple("i2c_mlxcpld", nr, | 2066 | if (mlxplat_i2c) |
| 2048 | NULL, 0); | 2067 | mlxplat_i2c->regmap = priv->regmap; |
| 2068 | priv->pdev_i2c = platform_device_register_resndata( | ||
| 2069 | &mlxplat_dev->dev, "i2c_mlxcpld", | ||
| 2070 | nr, mlxplat_mlxcpld_resources, | ||
| 2071 | ARRAY_SIZE(mlxplat_mlxcpld_resources), | ||
| 2072 | mlxplat_i2c, sizeof(*mlxplat_i2c)); | ||
| 2049 | if (IS_ERR(priv->pdev_i2c)) { | 2073 | if (IS_ERR(priv->pdev_i2c)) { |
| 2050 | err = PTR_ERR(priv->pdev_i2c); | 2074 | err = PTR_ERR(priv->pdev_i2c); |
| 2051 | goto fail_alloc; | 2075 | goto fail_alloc; |
