4 files changed, 214 insertions, 0 deletions

diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index d2e0f9847539..7c317579cde9 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -111,4 +111,16 @@ config MACH_MX51_EFIKAMX
           Include support for Genesi Efika MX nettop. This includes specific
           configurations for the board and its peripherals.
 
+config MACH_MX50_RDP
+        bool "Support MX50 reference design platform"
+        depends on BROKEN
+        select SOC_IMX50
+        select IMX_HAVE_PLATFORM_IMX_I2C
+        select IMX_HAVE_PLATFORM_IMX_UART
+        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+        select IMX_HAVE_PLATFORM_SPI_IMX
+        help
+          Include support for MX50 reference design platform (RDP) board. This
+          includes specific configurations for the board and its peripherals.
+
 endif
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index e059c3090931..d99d7ab3b39b 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
 obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o
 obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd-baseboard.o
 obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o
+obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o
diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c
new file mode 100644
index 000000000000..fd32e4c450e8
--- /dev/null
+++ b/arch/arm/mach-mx5/board-mx50_rdp.c
@@ -0,0 +1,197 @@
+/*
+ * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/fsl_devices.h>
+
+#include <mach/common.h>
+#include <mach/hardware.h>
+#include <mach/iomux-mx50.h>
+
+#include <asm/irq.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+
+#include "devices-mx50.h"
+
+static iomux_v3_cfg_t mx50_rdp_pads[] __initdata = {
+        /* SD1 */
+        MX50_PAD_ECSPI2_SS0__GPIO_4_19,
+        MX50_PAD_EIM_CRE__GPIO_1_27,
+        MX50_PAD_SD1_CMD__SD1_CMD,
+
+        MX50_PAD_SD1_CLK__SD1_CLK,
+        MX50_PAD_SD1_D0__SD1_D0,
+        MX50_PAD_SD1_D1__SD1_D1,
+        MX50_PAD_SD1_D2__SD1_D2,
+        MX50_PAD_SD1_D3__SD1_D3,
+
+        /* SD2 */
+        MX50_PAD_SD2_CD__GPIO_5_17,
+        MX50_PAD_SD2_WP__GPIO_5_16,
+        MX50_PAD_SD2_CMD__SD2_CMD,
+        MX50_PAD_SD2_CLK__SD2_CLK,
+        MX50_PAD_SD2_D0__SD2_D0,
+        MX50_PAD_SD2_D1__SD2_D1,
+        MX50_PAD_SD2_D2__SD2_D2,
+        MX50_PAD_SD2_D3__SD2_D3,
+        MX50_PAD_SD2_D4__SD2_D4,
+        MX50_PAD_SD2_D5__SD2_D5,
+        MX50_PAD_SD2_D6__SD2_D6,
+        MX50_PAD_SD2_D7__SD2_D7,
+
+        /* SD3 */
+        MX50_PAD_SD3_CMD__SD3_CMD,
+        MX50_PAD_SD3_CLK__SD3_CLK,
+        MX50_PAD_SD3_D0__SD3_D0,
+        MX50_PAD_SD3_D1__SD3_D1,
+        MX50_PAD_SD3_D2__SD3_D2,
+        MX50_PAD_SD3_D3__SD3_D3,
+        MX50_PAD_SD3_D4__SD3_D4,
+        MX50_PAD_SD3_D5__SD3_D5,
+        MX50_PAD_SD3_D6__SD3_D6,
+        MX50_PAD_SD3_D7__SD3_D7,
+
+        /* PWR_INT */
+        MX50_PAD_ECSPI2_MISO__GPIO_4_18,
+
+        /* UART pad setting */
+        MX50_PAD_UART1_TXD__UART1_TXD,
+        MX50_PAD_UART1_RXD__UART1_RXD,
+        MX50_PAD_UART1_RTS__UART1_RTS,
+        MX50_PAD_UART2_TXD__UART2_TXD,
+        MX50_PAD_UART2_RXD__UART2_RXD,
+        MX50_PAD_UART2_CTS__UART2_CTS,
+        MX50_PAD_UART2_RTS__UART2_RTS,
+
+        MX50_PAD_I2C1_SCL__I2C1_SCL,
+        MX50_PAD_I2C1_SDA__I2C1_SDA,
+        MX50_PAD_I2C2_SCL__I2C2_SCL,
+        MX50_PAD_I2C2_SDA__I2C2_SDA,
+
+        MX50_PAD_EPITO__USBH1_PWR,
+        /* Need to comment below line if
+         * one needs to debug owire.
+         */
+        MX50_PAD_OWIRE__USBH1_OC,
+        /* using gpio to control otg pwr */
+        MX50_PAD_PWM2__GPIO_6_25,
+        MX50_PAD_I2C3_SCL__USBOTG_OC,
+
+        MX50_PAD_SSI_RXC__FEC_MDIO,
+        MX50_PAD_SSI_RXC__FEC_MDIO,
+        MX50_PAD_DISP_D0__FEC_TXCLK,
+        MX50_PAD_DISP_D1__FEC_RX_ER,
+        MX50_PAD_DISP_D2__FEC_RX_DV,
+        MX50_PAD_DISP_D3__FEC_RXD1,
+        MX50_PAD_DISP_D4__FEC_RXD0,
+        MX50_PAD_DISP_D5__FEC_TX_EN,
+        MX50_PAD_DISP_D6__FEC_TXD1,
+        MX50_PAD_DISP_D7__FEC_TXD0,
+        MX50_PAD_SSI_RXFS__FEC_MDC,
+        MX50_PAD_I2C3_SDA__GPIO_6_23,
+        MX50_PAD_ECSPI1_SCLK__GPIO_4_12,
+
+        MX50_PAD_CSPI_SS0__CSPI_SS0,
+        MX50_PAD_ECSPI1_MOSI__CSPI_SS1,
+        MX50_PAD_CSPI_MOSI__CSPI_MOSI,
+        MX50_PAD_CSPI_MISO__CSPI_MISO,
+
+        /* SGTL500_OSC_EN */
+        MX50_PAD_UART1_CTS__GPIO_6_8,
+
+        /* SGTL_AMP_SHDN */
+        MX50_PAD_UART3_RXD__GPIO_6_15,
+
+        /* Keypad */
+        MX50_PAD_KEY_COL0__KEY_COL0,
+        MX50_PAD_KEY_ROW0__KEY_ROW0,
+        MX50_PAD_KEY_COL1__KEY_COL1,
+        MX50_PAD_KEY_ROW1__KEY_ROW1,
+        MX50_PAD_KEY_COL2__KEY_COL2,
+        MX50_PAD_KEY_ROW2__KEY_ROW2,
+        MX50_PAD_KEY_COL3__KEY_COL3,
+        MX50_PAD_KEY_ROW3__KEY_ROW3,
+        MX50_PAD_EIM_DA0__KEY_COL4,
+        MX50_PAD_EIM_DA1__KEY_ROW4,
+        MX50_PAD_EIM_DA2__KEY_COL5,
+        MX50_PAD_EIM_DA3__KEY_ROW5,
+        MX50_PAD_EIM_DA4__KEY_COL6,
+        MX50_PAD_EIM_DA5__KEY_ROW6,
+        MX50_PAD_EIM_DA6__KEY_COL7,
+        MX50_PAD_EIM_DA7__KEY_ROW7,
+        /*EIM pads */
+        MX50_PAD_EIM_DA8__GPIO_1_8,
+        MX50_PAD_EIM_DA9__GPIO_1_9,
+        MX50_PAD_EIM_DA10__GPIO_1_10,
+        MX50_PAD_EIM_DA11__GPIO_1_11,
+        MX50_PAD_EIM_DA12__GPIO_1_12,
+        MX50_PAD_EIM_DA13__GPIO_1_13,
+        MX50_PAD_EIM_DA14__GPIO_1_14,
+        MX50_PAD_EIM_DA15__GPIO_1_15,
+        MX50_PAD_EIM_CS2__GPIO_1_16,
+        MX50_PAD_EIM_CS1__GPIO_1_17,
+        MX50_PAD_EIM_CS0__GPIO_1_18,
+        MX50_PAD_EIM_EB0__GPIO_1_19,
+        MX50_PAD_EIM_EB1__GPIO_1_20,
+        MX50_PAD_EIM_WAIT__GPIO_1_21,
+        MX50_PAD_EIM_BCLK__GPIO_1_22,
+        MX50_PAD_EIM_RDY__GPIO_1_23,
+        MX50_PAD_EIM_OE__GPIO_1_24,
+};
+
+/* Serial ports */
+static const struct imxuart_platform_data uart_pdata __initconst = {
+        .flags = IMXUART_HAVE_RTSCTS,
+};
+
+/*
+ * Board specific initialization.
+ */
+static void __init mx50_rdp_board_init(void)
+{
+        mxc_iomux_v3_setup_multiple_pads(mx50_rdp_pads,
+                                        ARRAY_SIZE(mx50_rdp_pads));
+
+        imx50_add_imx_uart(0, &uart_pdata);
+        imx50_add_imx_uart(1, &uart_pdata);
+}
+
+static void __init mx50_rdp_timer_init(void)
+{
+        mx50_clocks_init(32768, 24000000, 22579200);
+}
+
+static struct sys_timer mx50_rdp_timer = {
+        .init   = mx50_rdp_timer_init,
+};
+
+MACHINE_START(MX50_RDP, "Freescale MX50 Reference Design Platform")
+        .map_io = mx50_map_io,
+        .init_irq = mx50_init_irq,
+        .init_machine = mx50_rdp_board_init,
+        .timer = &mx50_rdp_timer,
+MACHINE_END
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 9dd9c2085aad..5ccf3ef41d69 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -63,6 +63,7 @@ static inline void flush(void)
 #define MX3X_UART1_BASE_ADDR    0x43F90000
 #define MX3X_UART2_BASE_ADDR    0x43F94000
 #define MX51_UART1_BASE_ADDR    0x73fbc000
+#define MX50_UART1_BASE_ADDR    0x53fbc000
 
 static __inline__ void __arch_decomp_setup(unsigned long arch_id)
 {
@@ -102,6 +103,9 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
         case MACH_TYPE_EUKREA_CPUIMX51SD:
                 uart_base = MX51_UART1_BASE_ADDR;
                 break;
+        case MACH_TYPE_MX50_RDP:
+                uart_base = MX50_UART1_BASE_ADDR;
+                break;
         default:
                 break;
         }