3 files changed, 18 insertions, 15 deletions

diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
index dd319e59246b..90b7c501c95b 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
@@ -839,6 +839,7 @@ static int uncore_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id
         box->phys_id = phys_id;
         box->pci_dev = pdev;
         box->pmu = pmu;
+        uncore_box_init(box);
         pci_set_drvdata(pdev, box);
 
         raw_spin_lock(&uncore_box_lock);
@@ -1002,8 +1003,10 @@ static int uncore_cpu_starting(int cpu)
                         pmu = &type->pmus[j];
                         box = *per_cpu_ptr(pmu->box, cpu);
                         /* called by uncore_cpu_init? */
-                        if (box && box->phys_id >= 0)
+                        if (box && box->phys_id >= 0) {
+                                uncore_box_init(box);
                                 continue;
+                        }
 
                         for_each_online_cpu(k) {
                                 exist = *per_cpu_ptr(pmu->box, k);
@@ -1019,8 +1022,10 @@ static int uncore_cpu_starting(int cpu)
                                 }
                         }
 
-                        if (box)
+                        if (box) {
                                 box->phys_id = phys_id;
+                                uncore_box_init(box);
+                        }
                 }
         }
         return 0;
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.h b/arch/x86/kernel/cpu/perf_event_intel_uncore.h
index f789ec9a0133..ceac8f5dc018 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.h
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.h
@@ -258,14 +258,6 @@ static inline int uncore_num_counters(struct intel_uncore_box *box)
         return box->pmu->type->num_counters;
 }
 
-static inline void uncore_box_init(struct intel_uncore_box *box)
-{
-        if (!test_and_set_bit(UNCORE_BOX_FLAG_INITIATED, &box->flags)) {
-                if (box->pmu->type->ops->init_box)
-                        box->pmu->type->ops->init_box(box);
-        }
-}
-
 static inline void uncore_disable_box(struct intel_uncore_box *box)
 {
         if (box->pmu->type->ops->disable_box)
@@ -274,8 +266,6 @@ static inline void uncore_disable_box(struct intel_uncore_box *box)
 
 static inline void uncore_enable_box(struct intel_uncore_box *box)
 {
-        uncore_box_init(box);
-
         if (box->pmu->type->ops->enable_box)
                 box->pmu->type->ops->enable_box(box);
 }
@@ -298,6 +288,14 @@ static inline u64 uncore_read_counter(struct intel_uncore_box *box,
         return box->pmu->type->ops->read_counter(box, event);
 }
 
+static inline void uncore_box_init(struct intel_uncore_box *box)
+{
+        if (!test_and_set_bit(UNCORE_BOX_FLAG_INITIATED, &box->flags)) {
+                if (box->pmu->type->ops->init_box)
+                        box->pmu->type->ops->init_box(box);
+        }
+}
+
 static inline bool uncore_box_is_fake(struct intel_uncore_box *box)
 {
         return (box->phys_id < 0);
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c b/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c
index 12d9548457e7..6d6e85dd5849 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c
@@ -164,8 +164,8 @@
                                 ((1ULL << (n)) - 1)))
 
 /* Haswell-EP Ubox */
-#define HSWEP_U_MSR_PMON_CTR0                   0x705
-#define HSWEP_U_MSR_PMON_CTL0                   0x709
+#define HSWEP_U_MSR_PMON_CTR0                   0x709
+#define HSWEP_U_MSR_PMON_CTL0                   0x705
 #define HSWEP_U_MSR_PMON_FILTER                 0x707
 
 #define HSWEP_U_MSR_PMON_UCLK_FIXED_CTL         0x703
@@ -1914,7 +1914,7 @@ static struct intel_uncore_type hswep_uncore_cbox = {
         .name                   = "cbox",
         .num_counters           = 4,
         .num_boxes              = 18,
-        .perf_ctr_bits          = 44,
+        .perf_ctr_bits          = 48,
         .event_ctl              = HSWEP_C0_MSR_PMON_CTL0,
         .perf_ctr               = HSWEP_C0_MSR_PMON_CTR0,
         .event_mask             = SNBEP_CBO_MSR_PMON_RAW_EVENT_MASK,