diff options
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c | 137 |
1 files changed, 33 insertions, 104 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c index d5a9c0792de0..da74f95fb86b 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c | |||
| @@ -157,8 +157,7 @@ static int rv_construct_boot_state(struct pp_hwmgr *hwmgr) | |||
| 157 | return 0; | 157 | return 0; |
| 158 | } | 158 | } |
| 159 | 159 | ||
| 160 | static int rv_tf_set_clock_limit(struct pp_hwmgr *hwmgr, void *input, | 160 | static int rv_set_clock_limit(struct pp_hwmgr *hwmgr, const void *input) |
| 161 | void *output, void *storage, int result) | ||
| 162 | { | 161 | { |
| 163 | struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend); | 162 | struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend); |
| 164 | struct PP_Clocks clocks = {0}; | 163 | struct PP_Clocks clocks = {0}; |
| @@ -234,19 +233,12 @@ static int rv_set_active_display_count(struct pp_hwmgr *hwmgr, uint32_t count) | |||
| 234 | return 0; | 233 | return 0; |
| 235 | } | 234 | } |
| 236 | 235 | ||
| 237 | static const struct phm_master_table_item rv_set_power_state_list[] = { | 236 | static int rv_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input) |
| 238 | { NULL, rv_tf_set_clock_limit }, | 237 | { |
| 239 | { } | 238 | return rv_set_clock_limit(hwmgr, input); |
| 240 | }; | 239 | } |
| 241 | |||
| 242 | static const struct phm_master_table_header rv_set_power_state_master = { | ||
| 243 | 0, | ||
| 244 | PHM_MasterTableFlag_None, | ||
| 245 | rv_set_power_state_list | ||
| 246 | }; | ||
| 247 | 240 | ||
| 248 | static int rv_tf_init_power_gate_state(struct pp_hwmgr *hwmgr, void *input, | 241 | static int rv_init_power_gate_state(struct pp_hwmgr *hwmgr) |
| 249 | void *output, void *storage, int result) | ||
| 250 | { | 242 | { |
| 251 | struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend); | 243 | struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend); |
| 252 | 244 | ||
| @@ -257,20 +249,13 @@ static int rv_tf_init_power_gate_state(struct pp_hwmgr *hwmgr, void *input, | |||
| 257 | return 0; | 249 | return 0; |
| 258 | } | 250 | } |
| 259 | 251 | ||
| 260 | static const struct phm_master_table_item rv_setup_asic_list[] = { | ||
| 261 | { .tableFunction = rv_tf_init_power_gate_state }, | ||
| 262 | { } | ||
| 263 | }; | ||
| 264 | 252 | ||
| 265 | static const struct phm_master_table_header rv_setup_asic_master = { | 253 | static int rv_setup_asic_task(struct pp_hwmgr *hwmgr) |
| 266 | 0, | 254 | { |
| 267 | PHM_MasterTableFlag_None, | 255 | return rv_init_power_gate_state(hwmgr); |
| 268 | rv_setup_asic_list | 256 | } |
| 269 | }; | ||
| 270 | 257 | ||
| 271 | static int rv_tf_reset_cc6_data(struct pp_hwmgr *hwmgr, | 258 | static int rv_reset_cc6_data(struct pp_hwmgr *hwmgr) |
| 272 | void *input, void *output, | ||
| 273 | void *storage, int result) | ||
| 274 | { | 259 | { |
| 275 | struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend); | 260 | struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend); |
| 276 | 261 | ||
| @@ -282,21 +267,12 @@ static int rv_tf_reset_cc6_data(struct pp_hwmgr *hwmgr, | |||
| 282 | return 0; | 267 | return 0; |
| 283 | } | 268 | } |
| 284 | 269 | ||
| 285 | static const struct phm_master_table_item rv_power_down_asic_list[] = { | 270 | static int rv_power_off_asic(struct pp_hwmgr *hwmgr) |
| 286 | { .tableFunction = rv_tf_reset_cc6_data }, | 271 | { |
| 287 | { } | 272 | return rv_reset_cc6_data(hwmgr); |
| 288 | }; | 273 | } |
| 289 | |||
| 290 | static const struct phm_master_table_header rv_power_down_asic_master = { | ||
| 291 | 0, | ||
| 292 | PHM_MasterTableFlag_None, | ||
| 293 | rv_power_down_asic_list | ||
| 294 | }; | ||
| 295 | |||
| 296 | 274 | ||
| 297 | static int rv_tf_disable_gfx_off(struct pp_hwmgr *hwmgr, | 275 | static int rv_disable_gfx_off(struct pp_hwmgr *hwmgr) |
| 298 | void *input, void *output, | ||
| 299 | void *storage, int result) | ||
| 300 | { | 276 | { |
| 301 | struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend); | 277 | struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend); |
| 302 | 278 | ||
| @@ -307,21 +283,12 @@ static int rv_tf_disable_gfx_off(struct pp_hwmgr *hwmgr, | |||
| 307 | return 0; | 283 | return 0; |
| 308 | } | 284 | } |
| 309 | 285 | ||
| 310 | static const struct phm_master_table_item rv_disable_dpm_list[] = { | 286 | static int rv_disable_dpm_tasks(struct pp_hwmgr *hwmgr) |
| 311 | {NULL, rv_tf_disable_gfx_off}, | 287 | { |
| 312 | { }, | 288 | return rv_disable_gfx_off(hwmgr); |
| 313 | }; | 289 | } |
| 314 | |||
| 315 | |||
| 316 | static const struct phm_master_table_header rv_disable_dpm_master = { | ||
| 317 | 0, | ||
| 318 | PHM_MasterTableFlag_None, | ||
| 319 | rv_disable_dpm_list | ||
| 320 | }; | ||
| 321 | 290 | ||
| 322 | static int rv_tf_enable_gfx_off(struct pp_hwmgr *hwmgr, | 291 | static int rv_enable_gfx_off(struct pp_hwmgr *hwmgr) |
| 323 | void *input, void *output, | ||
| 324 | void *storage, int result) | ||
| 325 | { | 292 | { |
| 326 | struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend); | 293 | struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend); |
| 327 | 294 | ||
| @@ -332,16 +299,10 @@ static int rv_tf_enable_gfx_off(struct pp_hwmgr *hwmgr, | |||
| 332 | return 0; | 299 | return 0; |
| 333 | } | 300 | } |
| 334 | 301 | ||
| 335 | static const struct phm_master_table_item rv_enable_dpm_list[] = { | 302 | static int rv_enable_dpm_tasks(struct pp_hwmgr *hwmgr) |
| 336 | {NULL, rv_tf_enable_gfx_off}, | 303 | { |
| 337 | { }, | 304 | return rv_enable_gfx_off(hwmgr); |
| 338 | }; | 305 | } |
| 339 | |||
| 340 | static const struct phm_master_table_header rv_enable_dpm_master = { | ||
| 341 | 0, | ||
| 342 | PHM_MasterTableFlag_None, | ||
| 343 | rv_enable_dpm_list | ||
| 344 | }; | ||
| 345 | 306 | ||
| 346 | static int rv_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, | 307 | static int rv_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, |
| 347 | struct pp_power_state *prequest_ps, | 308 | struct pp_power_state *prequest_ps, |
| @@ -474,6 +435,9 @@ static int rv_hwmgr_backend_init(struct pp_hwmgr *hwmgr) | |||
| 474 | 435 | ||
| 475 | hwmgr->backend = data; | 436 | hwmgr->backend = data; |
| 476 | 437 | ||
| 438 | phm_cap_set(hwmgr->platform_descriptor.platformCaps, | ||
| 439 | PHM_PlatformCaps_TablelessHardwareInterface); | ||
| 440 | |||
| 477 | result = rv_initialize_dpm_defaults(hwmgr); | 441 | result = rv_initialize_dpm_defaults(hwmgr); |
| 478 | if (result != 0) { | 442 | if (result != 0) { |
| 479 | pr_err("rv_initialize_dpm_defaults failed\n"); | 443 | pr_err("rv_initialize_dpm_defaults failed\n"); |
| @@ -490,40 +454,6 @@ static int rv_hwmgr_backend_init(struct pp_hwmgr *hwmgr) | |||
| 490 | 454 | ||
| 491 | rv_construct_boot_state(hwmgr); | 455 | rv_construct_boot_state(hwmgr); |
| 492 | 456 | ||
| 493 | result = phm_construct_table(hwmgr, &rv_setup_asic_master, | ||
| 494 | &(hwmgr->setup_asic)); | ||
| 495 | if (result != 0) { | ||
| 496 | pr_err("Fail to construct setup ASIC\n"); | ||
| 497 | return result; | ||
| 498 | } | ||
| 499 | |||
| 500 | result = phm_construct_table(hwmgr, &rv_power_down_asic_master, | ||
| 501 | &(hwmgr->power_down_asic)); | ||
| 502 | if (result != 0) { | ||
| 503 | pr_err("Fail to construct power down ASIC\n"); | ||
| 504 | return result; | ||
| 505 | } | ||
| 506 | |||
| 507 | result = phm_construct_table(hwmgr, &rv_set_power_state_master, | ||
| 508 | &(hwmgr->set_power_state)); | ||
| 509 | if (result != 0) { | ||
| 510 | pr_err("Fail to construct set_power_state\n"); | ||
| 511 | return result; | ||
| 512 | } | ||
| 513 | |||
| 514 | result = phm_construct_table(hwmgr, &rv_disable_dpm_master, | ||
| 515 | &(hwmgr->disable_dynamic_state_management)); | ||
| 516 | if (result != 0) { | ||
| 517 | pr_err("Fail to disable_dynamic_state\n"); | ||
| 518 | return result; | ||
| 519 | } | ||
| 520 | result = phm_construct_table(hwmgr, &rv_enable_dpm_master, | ||
| 521 | &(hwmgr->enable_dynamic_state_management)); | ||
| 522 | if (result != 0) { | ||
| 523 | pr_err("Fail to enable_dynamic_state\n"); | ||
| 524 | return result; | ||
| 525 | } | ||
| 526 | |||
| 527 | hwmgr->platform_descriptor.hardwareActivityPerformanceLevels = | 457 | hwmgr->platform_descriptor.hardwareActivityPerformanceLevels = |
| 528 | RAVEN_MAX_HARDWARE_POWERLEVELS; | 458 | RAVEN_MAX_HARDWARE_POWERLEVELS; |
| 529 | 459 | ||
| @@ -546,12 +476,6 @@ static int rv_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) | |||
| 546 | struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend); | 476 | struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend); |
| 547 | struct rv_clock_voltage_information *pinfo = &(rv_data->clock_vol_info); | 477 | struct rv_clock_voltage_information *pinfo = &(rv_data->clock_vol_info); |
| 548 | 478 | ||
| 549 | phm_destroy_table(hwmgr, &(hwmgr->set_power_state)); | ||
| 550 | phm_destroy_table(hwmgr, &(hwmgr->enable_dynamic_state_management)); | ||
| 551 | phm_destroy_table(hwmgr, &(hwmgr->disable_dynamic_state_management)); | ||
| 552 | phm_destroy_table(hwmgr, &(hwmgr->power_down_asic)); | ||
| 553 | phm_destroy_table(hwmgr, &(hwmgr->setup_asic)); | ||
| 554 | |||
| 555 | kfree(pinfo->vdd_dep_on_dcefclk); | 479 | kfree(pinfo->vdd_dep_on_dcefclk); |
| 556 | pinfo->vdd_dep_on_dcefclk = NULL; | 480 | pinfo->vdd_dep_on_dcefclk = NULL; |
| 557 | kfree(pinfo->vdd_dep_on_socclk); | 481 | kfree(pinfo->vdd_dep_on_socclk); |
| @@ -946,6 +870,11 @@ static const struct pp_hwmgr_func rv_hwmgr_funcs = { | |||
| 946 | .read_sensor = rv_read_sensor, | 870 | .read_sensor = rv_read_sensor, |
| 947 | .set_active_display_count = rv_set_active_display_count, | 871 | .set_active_display_count = rv_set_active_display_count, |
| 948 | .set_deep_sleep_dcefclk = rv_set_deep_sleep_dcefclk, | 872 | .set_deep_sleep_dcefclk = rv_set_deep_sleep_dcefclk, |
| 873 | .dynamic_state_management_enable = rv_enable_dpm_tasks, | ||
| 874 | .power_off_asic = rv_power_off_asic, | ||
| 875 | .asic_setup = rv_setup_asic_task, | ||
| 876 | .power_state_set = rv_set_power_state_tasks, | ||
| 877 | .dynamic_state_management_disable = rv_disable_dpm_tasks, | ||
| 949 | }; | 878 | }; |
| 950 | 879 | ||
| 951 | int rv_init_function_pointers(struct pp_hwmgr *hwmgr) | 880 | int rv_init_function_pointers(struct pp_hwmgr *hwmgr) |
