diff options
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 12 | ||||
| -rw-r--r-- | drivers/gpu/drm/etnaviv/etnaviv_dump.c | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/imx/ipuv3-plane.c | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/imx/ipuv3-plane.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/qxl/qxl_prime.c | 1 |
6 files changed, 24 insertions, 11 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index 3b7370d914a5..72837b8c7031 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | |||
| @@ -624,9 +624,8 @@ static bool gmc_v9_0_keep_stolen_memory(struct amdgpu_device *adev) | |||
| 624 | */ | 624 | */ |
| 625 | switch (adev->asic_type) { | 625 | switch (adev->asic_type) { |
| 626 | case CHIP_VEGA10: | 626 | case CHIP_VEGA10: |
| 627 | return true; | ||
| 628 | case CHIP_RAVEN: | 627 | case CHIP_RAVEN: |
| 629 | return (adev->pdev->device == 0x15d8); | 628 | return true; |
| 630 | case CHIP_VEGA12: | 629 | case CHIP_VEGA12: |
| 631 | case CHIP_VEGA20: | 630 | case CHIP_VEGA20: |
| 632 | default: | 631 | default: |
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 995f9df66142..bcb1a93c0b4c 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | #include "dm_services_types.h" | 29 | #include "dm_services_types.h" |
| 30 | #include "dc.h" | 30 | #include "dc.h" |
| 31 | #include "dc/inc/core_types.h" | 31 | #include "dc/inc/core_types.h" |
| 32 | #include "dal_asic_id.h" | ||
| 32 | 33 | ||
| 33 | #include "vid.h" | 34 | #include "vid.h" |
| 34 | #include "amdgpu.h" | 35 | #include "amdgpu.h" |
| @@ -640,7 +641,7 @@ static void amdgpu_dm_fini(struct amdgpu_device *adev) | |||
| 640 | 641 | ||
| 641 | static int load_dmcu_fw(struct amdgpu_device *adev) | 642 | static int load_dmcu_fw(struct amdgpu_device *adev) |
| 642 | { | 643 | { |
| 643 | const char *fw_name_dmcu; | 644 | const char *fw_name_dmcu = NULL; |
| 644 | int r; | 645 | int r; |
| 645 | const struct dmcu_firmware_header_v1_0 *hdr; | 646 | const struct dmcu_firmware_header_v1_0 *hdr; |
| 646 | 647 | ||
| @@ -663,7 +664,14 @@ static int load_dmcu_fw(struct amdgpu_device *adev) | |||
| 663 | case CHIP_VEGA20: | 664 | case CHIP_VEGA20: |
| 664 | return 0; | 665 | return 0; |
| 665 | case CHIP_RAVEN: | 666 | case CHIP_RAVEN: |
| 666 | fw_name_dmcu = FIRMWARE_RAVEN_DMCU; | 667 | #if defined(CONFIG_DRM_AMD_DC_DCN1_01) |
| 668 | if (ASICREV_IS_PICASSO(adev->external_rev_id)) | ||
| 669 | fw_name_dmcu = FIRMWARE_RAVEN_DMCU; | ||
| 670 | else if (ASICREV_IS_RAVEN2(adev->external_rev_id)) | ||
| 671 | fw_name_dmcu = FIRMWARE_RAVEN_DMCU; | ||
| 672 | else | ||
| 673 | #endif | ||
| 674 | return 0; | ||
| 667 | break; | 675 | break; |
| 668 | default: | 676 | default: |
| 669 | DRM_ERROR("Unsupported ASIC type: 0x%X\n", adev->asic_type); | 677 | DRM_ERROR("Unsupported ASIC type: 0x%X\n", adev->asic_type); |
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_dump.c b/drivers/gpu/drm/etnaviv/etnaviv_dump.c index 33854c94cb85..515515ef24f9 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_dump.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_dump.c | |||
| @@ -125,6 +125,8 @@ void etnaviv_core_dump(struct etnaviv_gpu *gpu) | |||
| 125 | return; | 125 | return; |
| 126 | etnaviv_dump_core = false; | 126 | etnaviv_dump_core = false; |
| 127 | 127 | ||
| 128 | mutex_lock(&gpu->mmu->lock); | ||
| 129 | |||
| 128 | mmu_size = etnaviv_iommu_dump_size(gpu->mmu); | 130 | mmu_size = etnaviv_iommu_dump_size(gpu->mmu); |
| 129 | 131 | ||
| 130 | /* We always dump registers, mmu, ring and end marker */ | 132 | /* We always dump registers, mmu, ring and end marker */ |
| @@ -167,6 +169,7 @@ void etnaviv_core_dump(struct etnaviv_gpu *gpu) | |||
| 167 | iter.start = __vmalloc(file_size, GFP_KERNEL | __GFP_NOWARN | __GFP_NORETRY, | 169 | iter.start = __vmalloc(file_size, GFP_KERNEL | __GFP_NOWARN | __GFP_NORETRY, |
| 168 | PAGE_KERNEL); | 170 | PAGE_KERNEL); |
| 169 | if (!iter.start) { | 171 | if (!iter.start) { |
| 172 | mutex_unlock(&gpu->mmu->lock); | ||
| 170 | dev_warn(gpu->dev, "failed to allocate devcoredump file\n"); | 173 | dev_warn(gpu->dev, "failed to allocate devcoredump file\n"); |
| 171 | return; | 174 | return; |
| 172 | } | 175 | } |
| @@ -234,6 +237,8 @@ void etnaviv_core_dump(struct etnaviv_gpu *gpu) | |||
| 234 | obj->base.size); | 237 | obj->base.size); |
| 235 | } | 238 | } |
| 236 | 239 | ||
| 240 | mutex_unlock(&gpu->mmu->lock); | ||
| 241 | |||
| 237 | etnaviv_core_dump_header(&iter, ETDUMP_BUF_END, iter.data); | 242 | etnaviv_core_dump_header(&iter, ETDUMP_BUF_END, iter.data); |
| 238 | 243 | ||
| 239 | dev_coredumpv(gpu->dev, iter.start, iter.data - iter.start, GFP_KERNEL); | 244 | dev_coredumpv(gpu->dev, iter.start, iter.data - iter.start, GFP_KERNEL); |
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index d7a727a6e3d7..91edfe2498a6 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c | |||
| @@ -605,7 +605,6 @@ static void ipu_plane_atomic_update(struct drm_plane *plane, | |||
| 605 | active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch); | 605 | active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch); |
| 606 | ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba); | 606 | ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba); |
| 607 | ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active); | 607 | ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active); |
| 608 | ipu_plane->next_buf = !active; | ||
| 609 | if (ipu_plane_separate_alpha(ipu_plane)) { | 608 | if (ipu_plane_separate_alpha(ipu_plane)) { |
| 610 | active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch); | 609 | active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch); |
| 611 | ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active, | 610 | ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active, |
| @@ -710,7 +709,6 @@ static void ipu_plane_atomic_update(struct drm_plane *plane, | |||
| 710 | ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba); | 709 | ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba); |
| 711 | ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts); | 710 | ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts); |
| 712 | ipu_plane_enable(ipu_plane); | 711 | ipu_plane_enable(ipu_plane); |
| 713 | ipu_plane->next_buf = -1; | ||
| 714 | } | 712 | } |
| 715 | 713 | ||
| 716 | static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = { | 714 | static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = { |
| @@ -732,10 +730,15 @@ bool ipu_plane_atomic_update_pending(struct drm_plane *plane) | |||
| 732 | 730 | ||
| 733 | if (ipu_state->use_pre) | 731 | if (ipu_state->use_pre) |
| 734 | return ipu_prg_channel_configure_pending(ipu_plane->ipu_ch); | 732 | return ipu_prg_channel_configure_pending(ipu_plane->ipu_ch); |
| 735 | else if (ipu_plane->next_buf >= 0) | ||
| 736 | return ipu_idmac_get_current_buffer(ipu_plane->ipu_ch) != | ||
| 737 | ipu_plane->next_buf; | ||
| 738 | 733 | ||
| 734 | /* | ||
| 735 | * Pretend no update is pending in the non-PRE/PRG case. For this to | ||
| 736 | * happen, an atomic update would have to be deferred until after the | ||
| 737 | * start of the next frame and simultaneously interrupt latency would | ||
| 738 | * have to be high enough to let the atomic update finish and issue an | ||
| 739 | * event before the previous end of frame interrupt handler can be | ||
| 740 | * executed. | ||
| 741 | */ | ||
| 739 | return false; | 742 | return false; |
| 740 | } | 743 | } |
| 741 | int ipu_planes_assign_pre(struct drm_device *dev, | 744 | int ipu_planes_assign_pre(struct drm_device *dev, |
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.h b/drivers/gpu/drm/imx/ipuv3-plane.h index 15e85e15d35c..ffacbcdd2f98 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.h +++ b/drivers/gpu/drm/imx/ipuv3-plane.h | |||
| @@ -27,7 +27,6 @@ struct ipu_plane { | |||
| 27 | int dp_flow; | 27 | int dp_flow; |
| 28 | 28 | ||
| 29 | bool disabling; | 29 | bool disabling; |
| 30 | int next_buf; | ||
| 31 | }; | 30 | }; |
| 32 | 31 | ||
| 33 | struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu, | 32 | struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu, |
diff --git a/drivers/gpu/drm/qxl/qxl_prime.c b/drivers/gpu/drm/qxl/qxl_prime.c index 114653b471c6..7d3816fca5a8 100644 --- a/drivers/gpu/drm/qxl/qxl_prime.c +++ b/drivers/gpu/drm/qxl/qxl_prime.c | |||
| @@ -77,6 +77,5 @@ void qxl_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr) | |||
| 77 | int qxl_gem_prime_mmap(struct drm_gem_object *obj, | 77 | int qxl_gem_prime_mmap(struct drm_gem_object *obj, |
| 78 | struct vm_area_struct *area) | 78 | struct vm_area_struct *area) |
| 79 | { | 79 | { |
| 80 | WARN_ONCE(1, "not implemented"); | ||
| 81 | return -ENOSYS; | 80 | return -ENOSYS; |
| 82 | } | 81 | } |
