diff options
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_hdmi.c | 28 |
2 files changed, 30 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index fab94be89dfa..88a2c0792f26 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -4151,6 +4151,8 @@ | |||
4151 | _TRANSCODER(trans, HSW_VIDEO_DIP_CTL_A, HSW_VIDEO_DIP_CTL_B) | 4151 | _TRANSCODER(trans, HSW_VIDEO_DIP_CTL_A, HSW_VIDEO_DIP_CTL_B) |
4152 | #define HSW_TVIDEO_DIP_AVI_DATA(trans) \ | 4152 | #define HSW_TVIDEO_DIP_AVI_DATA(trans) \ |
4153 | _TRANSCODER(trans, HSW_VIDEO_DIP_AVI_DATA_A, HSW_VIDEO_DIP_AVI_DATA_B) | 4153 | _TRANSCODER(trans, HSW_VIDEO_DIP_AVI_DATA_A, HSW_VIDEO_DIP_AVI_DATA_B) |
4154 | #define HSW_TVIDEO_DIP_VS_DATA(trans) \ | ||
4155 | _TRANSCODER(trans, HSW_VIDEO_DIP_VS_DATA_A, HSW_VIDEO_DIP_VS_DATA_B) | ||
4154 | #define HSW_TVIDEO_DIP_SPD_DATA(trans) \ | 4156 | #define HSW_TVIDEO_DIP_SPD_DATA(trans) \ |
4155 | _TRANSCODER(trans, HSW_VIDEO_DIP_SPD_DATA_A, HSW_VIDEO_DIP_SPD_DATA_B) | 4157 | _TRANSCODER(trans, HSW_VIDEO_DIP_SPD_DATA_A, HSW_VIDEO_DIP_SPD_DATA_B) |
4156 | #define HSW_TVIDEO_DIP_GCP(trans) \ | 4158 | #define HSW_TVIDEO_DIP_GCP(trans) \ |
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index dd4fa35e0a85..f27b91eeeb64 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c | |||
@@ -74,6 +74,8 @@ static u32 g4x_infoframe_index(enum hdmi_infoframe_type type) | |||
74 | return VIDEO_DIP_SELECT_AVI; | 74 | return VIDEO_DIP_SELECT_AVI; |
75 | case HDMI_INFOFRAME_TYPE_SPD: | 75 | case HDMI_INFOFRAME_TYPE_SPD: |
76 | return VIDEO_DIP_SELECT_SPD; | 76 | return VIDEO_DIP_SELECT_SPD; |
77 | case HDMI_INFOFRAME_TYPE_VENDOR: | ||
78 | return VIDEO_DIP_SELECT_VENDOR; | ||
77 | default: | 79 | default: |
78 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", type); | 80 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", type); |
79 | return 0; | 81 | return 0; |
@@ -87,6 +89,8 @@ static u32 g4x_infoframe_enable(enum hdmi_infoframe_type type) | |||
87 | return VIDEO_DIP_ENABLE_AVI; | 89 | return VIDEO_DIP_ENABLE_AVI; |
88 | case HDMI_INFOFRAME_TYPE_SPD: | 90 | case HDMI_INFOFRAME_TYPE_SPD: |
89 | return VIDEO_DIP_ENABLE_SPD; | 91 | return VIDEO_DIP_ENABLE_SPD; |
92 | case HDMI_INFOFRAME_TYPE_VENDOR: | ||
93 | return VIDEO_DIP_ENABLE_VENDOR; | ||
90 | default: | 94 | default: |
91 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", type); | 95 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", type); |
92 | return 0; | 96 | return 0; |
@@ -100,6 +104,8 @@ static u32 hsw_infoframe_enable(enum hdmi_infoframe_type type) | |||
100 | return VIDEO_DIP_ENABLE_AVI_HSW; | 104 | return VIDEO_DIP_ENABLE_AVI_HSW; |
101 | case HDMI_INFOFRAME_TYPE_SPD: | 105 | case HDMI_INFOFRAME_TYPE_SPD: |
102 | return VIDEO_DIP_ENABLE_SPD_HSW; | 106 | return VIDEO_DIP_ENABLE_SPD_HSW; |
107 | case HDMI_INFOFRAME_TYPE_VENDOR: | ||
108 | return VIDEO_DIP_ENABLE_VS_HSW; | ||
103 | default: | 109 | default: |
104 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", type); | 110 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", type); |
105 | return 0; | 111 | return 0; |
@@ -114,6 +120,8 @@ static u32 hsw_infoframe_data_reg(enum hdmi_infoframe_type type, | |||
114 | return HSW_TVIDEO_DIP_AVI_DATA(cpu_transcoder); | 120 | return HSW_TVIDEO_DIP_AVI_DATA(cpu_transcoder); |
115 | case HDMI_INFOFRAME_TYPE_SPD: | 121 | case HDMI_INFOFRAME_TYPE_SPD: |
116 | return HSW_TVIDEO_DIP_SPD_DATA(cpu_transcoder); | 122 | return HSW_TVIDEO_DIP_SPD_DATA(cpu_transcoder); |
123 | case HDMI_INFOFRAME_TYPE_VENDOR: | ||
124 | return HSW_TVIDEO_DIP_VS_DATA(cpu_transcoder); | ||
117 | default: | 125 | default: |
118 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", type); | 126 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", type); |
119 | return 0; | 127 | return 0; |
@@ -392,6 +400,21 @@ static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder) | |||
392 | intel_write_infoframe(encoder, &frame); | 400 | intel_write_infoframe(encoder, &frame); |
393 | } | 401 | } |
394 | 402 | ||
403 | static void | ||
404 | intel_hdmi_set_hdmi_infoframe(struct drm_encoder *encoder, | ||
405 | struct drm_display_mode *adjusted_mode) | ||
406 | { | ||
407 | union hdmi_infoframe frame; | ||
408 | int ret; | ||
409 | |||
410 | ret = drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi, | ||
411 | adjusted_mode); | ||
412 | if (ret < 0) | ||
413 | return; | ||
414 | |||
415 | intel_write_infoframe(encoder, &frame); | ||
416 | } | ||
417 | |||
395 | static void g4x_set_infoframes(struct drm_encoder *encoder, | 418 | static void g4x_set_infoframes(struct drm_encoder *encoder, |
396 | struct drm_display_mode *adjusted_mode) | 419 | struct drm_display_mode *adjusted_mode) |
397 | { | 420 | { |
@@ -454,6 +477,7 @@ static void g4x_set_infoframes(struct drm_encoder *encoder, | |||
454 | 477 | ||
455 | intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); | 478 | intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); |
456 | intel_hdmi_set_spd_infoframe(encoder); | 479 | intel_hdmi_set_spd_infoframe(encoder); |
480 | intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); | ||
457 | } | 481 | } |
458 | 482 | ||
459 | static void ibx_set_infoframes(struct drm_encoder *encoder, | 483 | static void ibx_set_infoframes(struct drm_encoder *encoder, |
@@ -515,6 +539,7 @@ static void ibx_set_infoframes(struct drm_encoder *encoder, | |||
515 | 539 | ||
516 | intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); | 540 | intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); |
517 | intel_hdmi_set_spd_infoframe(encoder); | 541 | intel_hdmi_set_spd_infoframe(encoder); |
542 | intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); | ||
518 | } | 543 | } |
519 | 544 | ||
520 | static void cpt_set_infoframes(struct drm_encoder *encoder, | 545 | static void cpt_set_infoframes(struct drm_encoder *encoder, |
@@ -550,6 +575,7 @@ static void cpt_set_infoframes(struct drm_encoder *encoder, | |||
550 | 575 | ||
551 | intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); | 576 | intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); |
552 | intel_hdmi_set_spd_infoframe(encoder); | 577 | intel_hdmi_set_spd_infoframe(encoder); |
578 | intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); | ||
553 | } | 579 | } |
554 | 580 | ||
555 | static void vlv_set_infoframes(struct drm_encoder *encoder, | 581 | static void vlv_set_infoframes(struct drm_encoder *encoder, |
@@ -584,6 +610,7 @@ static void vlv_set_infoframes(struct drm_encoder *encoder, | |||
584 | 610 | ||
585 | intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); | 611 | intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); |
586 | intel_hdmi_set_spd_infoframe(encoder); | 612 | intel_hdmi_set_spd_infoframe(encoder); |
613 | intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); | ||
587 | } | 614 | } |
588 | 615 | ||
589 | static void hsw_set_infoframes(struct drm_encoder *encoder, | 616 | static void hsw_set_infoframes(struct drm_encoder *encoder, |
@@ -611,6 +638,7 @@ static void hsw_set_infoframes(struct drm_encoder *encoder, | |||
611 | 638 | ||
612 | intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); | 639 | intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); |
613 | intel_hdmi_set_spd_infoframe(encoder); | 640 | intel_hdmi_set_spd_infoframe(encoder); |
641 | intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); | ||
614 | } | 642 | } |
615 | 643 | ||
616 | static void intel_hdmi_mode_set(struct intel_encoder *encoder) | 644 | static void intel_hdmi_mode_set(struct intel_encoder *encoder) |