diff options
32 files changed, 252 insertions, 186 deletions
diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S index 7fa3bb0d2397..a08783823b32 100644 --- a/arch/arm/kernel/iwmmxt.S +++ b/arch/arm/kernel/iwmmxt.S | |||
| @@ -195,10 +195,10 @@ ENTRY(iwmmxt_task_disable) | |||
| 195 | 195 | ||
| 196 | @ enable access to CP0 and CP1 | 196 | @ enable access to CP0 and CP1 |
| 197 | XSC(mrc p15, 0, r4, c15, c1, 0) | 197 | XSC(mrc p15, 0, r4, c15, c1, 0) |
| 198 | XSC(orr r4, r4, #0xf) | 198 | XSC(orr r4, r4, #0x3) |
| 199 | XSC(mcr p15, 0, r4, c15, c1, 0) | 199 | XSC(mcr p15, 0, r4, c15, c1, 0) |
| 200 | PJ4(mrc p15, 0, r4, c1, c0, 2) | 200 | PJ4(mrc p15, 0, r4, c1, c0, 2) |
| 201 | PJ4(orr r4, r4, #0x3) | 201 | PJ4(orr r4, r4, #0xf) |
| 202 | PJ4(mcr p15, 0, r4, c1, c0, 2) | 202 | PJ4(mcr p15, 0, r4, c1, c0, 2) |
| 203 | 203 | ||
| 204 | mov r0, #0 @ nothing to load | 204 | mov r0, #0 @ nothing to load |
| @@ -313,7 +313,7 @@ ENTRY(iwmmxt_task_switch) | |||
| 313 | teq r2, r3 @ next task owns it? | 313 | teq r2, r3 @ next task owns it? |
| 314 | movne pc, lr @ no: leave Concan disabled | 314 | movne pc, lr @ no: leave Concan disabled |
| 315 | 315 | ||
| 316 | 1: @ flip Conan access | 316 | 1: @ flip Concan access |
| 317 | XSC(eor r1, r1, #0x3) | 317 | XSC(eor r1, r1, #0x3) |
| 318 | XSC(mcr p15, 0, r1, c15, c1, 0) | 318 | XSC(mcr p15, 0, r1, c15, c1, 0) |
| 319 | PJ4(eor r1, r1, #0xf) | 319 | PJ4(eor r1, r1, #0xf) |
diff --git a/arch/arm/mach-imx/clock-imx25.c b/arch/arm/mach-imx/clock-imx25.c index 0fc7ba56d616..e63e23504fe5 100644 --- a/arch/arm/mach-imx/clock-imx25.c +++ b/arch/arm/mach-imx/clock-imx25.c | |||
| @@ -331,6 +331,9 @@ int __init mx25_clocks_init(void) | |||
| 331 | __raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7) | (1 << 0), | 331 | __raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7) | (1 << 0), |
| 332 | CRM_BASE + 0x64); | 332 | CRM_BASE + 0x64); |
| 333 | 333 | ||
| 334 | /* Clock source for gpt is ahb_div */ | ||
| 335 | __raw_writel(__raw_readl(CRM_BASE+0x64) & ~(1 << 5), CRM_BASE + 0x64); | ||
| 336 | |||
| 334 | mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); | 337 | mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); |
| 335 | 338 | ||
| 336 | return 0; | 339 | return 0; |
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 6707de0ab716..6778f8193bc6 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c | |||
| @@ -30,6 +30,7 @@ | |||
| 30 | #include <linux/input.h> | 30 | #include <linux/input.h> |
| 31 | #include <linux/gpio.h> | 31 | #include <linux/gpio.h> |
| 32 | #include <linux/delay.h> | 32 | #include <linux/delay.h> |
| 33 | #include <sound/tlv320aic32x4.h> | ||
| 33 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
| 34 | #include <asm/mach/arch.h> | 35 | #include <asm/mach/arch.h> |
| 35 | #include <asm/mach/time.h> | 36 | #include <asm/mach/time.h> |
| @@ -196,6 +197,17 @@ static struct pca953x_platform_data visstrim_m10_pca9555_pdata = { | |||
| 196 | .invert = 0, | 197 | .invert = 0, |
| 197 | }; | 198 | }; |
| 198 | 199 | ||
| 200 | static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = { | ||
| 201 | .power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN | | ||
| 202 | AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE | | ||
| 203 | AIC32X4_PWR_AIC32X4_LDO_ENABLE | | ||
| 204 | AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 | | ||
| 205 | AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED, | ||
| 206 | .micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K | | ||
| 207 | AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K, | ||
| 208 | .swapdacs = false, | ||
| 209 | }; | ||
| 210 | |||
| 199 | static struct i2c_board_info visstrim_m10_i2c_devices[] = { | 211 | static struct i2c_board_info visstrim_m10_i2c_devices[] = { |
| 200 | { | 212 | { |
| 201 | I2C_BOARD_INFO("pca9555", 0x20), | 213 | I2C_BOARD_INFO("pca9555", 0x20), |
| @@ -203,6 +215,7 @@ static struct i2c_board_info visstrim_m10_i2c_devices[] = { | |||
| 203 | }, | 215 | }, |
| 204 | { | 216 | { |
| 205 | I2C_BOARD_INFO("tlv320aic32x4", 0x18), | 217 | I2C_BOARD_INFO("tlv320aic32x4", 0x18), |
| 218 | .platform_data = &visstrim_m10_aic32x4_pdata, | ||
| 206 | } | 219 | } |
| 207 | }; | 220 | }; |
| 208 | 221 | ||
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c index 0ce49478a479..29ca8907a780 100644 --- a/arch/arm/mach-imx/mach-mx31ads.c +++ b/arch/arm/mach-imx/mach-mx31ads.c | |||
| @@ -468,7 +468,7 @@ static struct i2c_board_info __initdata mx31ads_i2c1_devices[] = { | |||
| 468 | #endif | 468 | #endif |
| 469 | }; | 469 | }; |
| 470 | 470 | ||
| 471 | static void mxc_init_i2c(void) | 471 | static void __init mxc_init_i2c(void) |
| 472 | { | 472 | { |
| 473 | i2c_register_board_info(1, mx31ads_i2c1_devices, | 473 | i2c_register_board_info(1, mx31ads_i2c1_devices, |
| 474 | ARRAY_SIZE(mx31ads_i2c1_devices)); | 474 | ARRAY_SIZE(mx31ads_i2c1_devices)); |
| @@ -486,7 +486,7 @@ static unsigned int ssi_pins[] = { | |||
| 486 | MX31_PIN_STXD5__STXD5, | 486 | MX31_PIN_STXD5__STXD5, |
| 487 | }; | 487 | }; |
| 488 | 488 | ||
| 489 | static void mxc_init_audio(void) | 489 | static void __init mxc_init_audio(void) |
| 490 | { | 490 | { |
| 491 | imx31_add_imx_ssi(0, NULL); | 491 | imx31_add_imx_ssi(0, NULL); |
| 492 | mxc_iomux_setup_multiple_pins(ssi_pins, ARRAY_SIZE(ssi_pins), "ssi"); | 492 | mxc_iomux_setup_multiple_pins(ssi_pins, ARRAY_SIZE(ssi_pins), "ssi"); |
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c index 750368ddf0f9..126913ad106a 100644 --- a/arch/arm/mach-imx/mach-mx31lilly.c +++ b/arch/arm/mach-imx/mach-mx31lilly.c | |||
| @@ -192,7 +192,7 @@ static struct mxc_usbh_platform_data usbh2_pdata __initdata = { | |||
| 192 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | 192 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, |
| 193 | }; | 193 | }; |
| 194 | 194 | ||
| 195 | static void lilly1131_usb_init(void) | 195 | static void __init lilly1131_usb_init(void) |
| 196 | { | 196 | { |
| 197 | imx31_add_mxc_ehci_hs(1, &usbh1_pdata); | 197 | imx31_add_mxc_ehci_hs(1, &usbh1_pdata); |
| 198 | 198 | ||
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c index c070c24255f4..98e25d9aaab6 100644 --- a/arch/arm/mach-mmp/gplugd.c +++ b/arch/arm/mach-mmp/gplugd.c | |||
| @@ -16,16 +16,18 @@ | |||
| 16 | #include <mach/gpio.h> | 16 | #include <mach/gpio.h> |
| 17 | #include <mach/pxa168.h> | 17 | #include <mach/pxa168.h> |
| 18 | #include <mach/mfp-pxa168.h> | 18 | #include <mach/mfp-pxa168.h> |
| 19 | #include <mach/mfp-gplugd.h> | ||
| 20 | 19 | ||
| 21 | #include "common.h" | 20 | #include "common.h" |
| 22 | 21 | ||
| 23 | static unsigned long gplugd_pin_config[] __initdata = { | 22 | static unsigned long gplugd_pin_config[] __initdata = { |
| 24 | /* UART3 */ | 23 | /* UART3 */ |
| 25 | GPIO8_UART3_SOUT, | 24 | GPIO8_UART3_TXD, |
| 26 | GPIO9_UART3_SIN, | 25 | GPIO9_UART3_RXD, |
| 27 | GPI1O_UART3_CTS, | 26 | GPIO1O_UART3_CTS, |
| 28 | GPI11_UART3_RTS, | 27 | GPIO11_UART3_RTS, |
| 28 | |||
| 29 | /* USB OTG PEN */ | ||
| 30 | GPIO18_GPIO, | ||
| 29 | 31 | ||
| 30 | /* MMC2 */ | 32 | /* MMC2 */ |
| 31 | GPIO28_MMC2_CMD, | 33 | GPIO28_MMC2_CMD, |
| @@ -109,6 +111,12 @@ static unsigned long gplugd_pin_config[] __initdata = { | |||
| 109 | GPIO105_CI2C_SDA, | 111 | GPIO105_CI2C_SDA, |
| 110 | GPIO106_CI2C_SCL, | 112 | GPIO106_CI2C_SCL, |
| 111 | 113 | ||
| 114 | /* SPI NOR Flash on SSP2 */ | ||
| 115 | GPIO107_SSP2_RXD, | ||
| 116 | GPIO108_SSP2_TXD, | ||
| 117 | GPIO110_GPIO, /* SPI_CSn */ | ||
| 118 | GPIO111_SSP2_CLK, | ||
| 119 | |||
| 112 | /* Select JTAG */ | 120 | /* Select JTAG */ |
| 113 | GPIO109_GPIO, | 121 | GPIO109_GPIO, |
| 114 | 122 | ||
| @@ -154,7 +162,7 @@ static void __init select_disp_freq(void) | |||
| 154 | "frequency\n"); | 162 | "frequency\n"); |
| 155 | } else { | 163 | } else { |
| 156 | gpio_direction_output(35, 1); | 164 | gpio_direction_output(35, 1); |
| 157 | gpio_free(104); | 165 | gpio_free(35); |
| 158 | } | 166 | } |
| 159 | 167 | ||
| 160 | if (unlikely(gpio_request(85, "DISP_FREQ_SEL_2"))) { | 168 | if (unlikely(gpio_request(85, "DISP_FREQ_SEL_2"))) { |
| @@ -162,7 +170,7 @@ static void __init select_disp_freq(void) | |||
| 162 | "frequency\n"); | 170 | "frequency\n"); |
| 163 | } else { | 171 | } else { |
| 164 | gpio_direction_output(85, 0); | 172 | gpio_direction_output(85, 0); |
| 165 | gpio_free(104); | 173 | gpio_free(85); |
| 166 | } | 174 | } |
| 167 | } | 175 | } |
| 168 | 176 | ||
diff --git a/arch/arm/mach-mmp/include/mach/mfp-gplugd.h b/arch/arm/mach-mmp/include/mach/mfp-gplugd.h deleted file mode 100644 index b8cf38d85600..000000000000 --- a/arch/arm/mach-mmp/include/mach/mfp-gplugd.h +++ /dev/null | |||
| @@ -1,52 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-mmp/include/mach/mfp-gplugd.h | ||
| 3 | * | ||
| 4 | * MFP definitions used in gplugD | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __MACH_MFP_GPLUGD_H | ||
| 12 | #define __MACH_MFP_GPLUGD_H | ||
| 13 | |||
| 14 | #include <plat/mfp.h> | ||
| 15 | #include <mach/mfp.h> | ||
| 16 | |||
| 17 | /* UART3 */ | ||
| 18 | #define GPIO8_UART3_SOUT MFP_CFG(GPIO8, AF2) | ||
| 19 | #define GPIO9_UART3_SIN MFP_CFG(GPIO9, AF2) | ||
| 20 | #define GPI1O_UART3_CTS MFP_CFG(GPIO10, AF2) | ||
| 21 | #define GPI11_UART3_RTS MFP_CFG(GPIO11, AF2) | ||
| 22 | |||
| 23 | /* MMC2 */ | ||
| 24 | #define GPIO28_MMC2_CMD MFP_CFG_DRV(GPIO28, AF6, FAST) | ||
| 25 | #define GPIO29_MMC2_CLK MFP_CFG_DRV(GPIO29, AF6, FAST) | ||
| 26 | #define GPIO30_MMC2_DAT0 MFP_CFG_DRV(GPIO30, AF6, FAST) | ||
| 27 | #define GPIO31_MMC2_DAT1 MFP_CFG_DRV(GPIO31, AF6, FAST) | ||
| 28 | #define GPIO32_MMC2_DAT2 MFP_CFG_DRV(GPIO32, AF6, FAST) | ||
| 29 | #define GPIO33_MMC2_DAT3 MFP_CFG_DRV(GPIO33, AF6, FAST) | ||
| 30 | |||
| 31 | /* I2S */ | ||
| 32 | #undef GPIO114_I2S_FRM | ||
| 33 | #undef GPIO115_I2S_BCLK | ||
| 34 | |||
| 35 | #define GPIO114_I2S_FRM MFP_CFG_DRV(GPIO114, AF1, FAST) | ||
| 36 | #define GPIO115_I2S_BCLK MFP_CFG_DRV(GPIO115, AF1, FAST) | ||
| 37 | #define GPIO116_I2S_TXD MFP_CFG_DRV(GPIO116, AF1, FAST) | ||
| 38 | |||
| 39 | /* MMC4 */ | ||
| 40 | #define GPIO125_MMC4_DAT3 MFP_CFG_DRV(GPIO125, AF7, FAST) | ||
| 41 | #define GPIO126_MMC4_DAT2 MFP_CFG_DRV(GPIO126, AF7, FAST) | ||
| 42 | #define GPIO127_MMC4_DAT1 MFP_CFG_DRV(GPIO127, AF7, FAST) | ||
| 43 | #define GPIO0_2_MMC4_DAT0 MFP_CFG_DRV(GPIO0_2, AF7, FAST) | ||
| 44 | #define GPIO1_2_MMC4_CMD MFP_CFG_DRV(GPIO1_2, AF7, FAST) | ||
| 45 | #define GPIO2_2_MMC4_CLK MFP_CFG_DRV(GPIO2_2, AF7, FAST) | ||
| 46 | |||
| 47 | /* OTG GPIO */ | ||
| 48 | #define GPIO_USB_OTG_PEN 18 | ||
| 49 | #define GPIO_USB_OIDIR 20 | ||
| 50 | |||
| 51 | /* Other GPIOs are 35, 84, 85 */ | ||
| 52 | #endif /* __MACH_MFP_GPLUGD_H */ | ||
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h index 8c782328b21c..92aaa3c19d61 100644 --- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h +++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h | |||
| @@ -203,6 +203,10 @@ | |||
| 203 | #define GPIO33_CF_nCD2 MFP_CFG(GPIO33, AF3) | 203 | #define GPIO33_CF_nCD2 MFP_CFG(GPIO33, AF3) |
| 204 | 204 | ||
| 205 | /* UART */ | 205 | /* UART */ |
| 206 | #define GPIO8_UART3_TXD MFP_CFG(GPIO8, AF2) | ||
| 207 | #define GPIO9_UART3_RXD MFP_CFG(GPIO9, AF2) | ||
| 208 | #define GPIO1O_UART3_CTS MFP_CFG(GPIO10, AF2) | ||
| 209 | #define GPIO11_UART3_RTS MFP_CFG(GPIO11, AF2) | ||
| 206 | #define GPIO88_UART2_TXD MFP_CFG(GPIO88, AF2) | 210 | #define GPIO88_UART2_TXD MFP_CFG(GPIO88, AF2) |
| 207 | #define GPIO89_UART2_RXD MFP_CFG(GPIO89, AF2) | 211 | #define GPIO89_UART2_RXD MFP_CFG(GPIO89, AF2) |
| 208 | #define GPIO107_UART1_TXD MFP_CFG_DRV(GPIO107, AF1, FAST) | 212 | #define GPIO107_UART1_TXD MFP_CFG_DRV(GPIO107, AF1, FAST) |
| @@ -232,6 +236,22 @@ | |||
| 232 | #define GPIO53_MMC1_CD MFP_CFG(GPIO53, AF1) | 236 | #define GPIO53_MMC1_CD MFP_CFG(GPIO53, AF1) |
| 233 | #define GPIO46_MMC1_WP MFP_CFG(GPIO46, AF1) | 237 | #define GPIO46_MMC1_WP MFP_CFG(GPIO46, AF1) |
| 234 | 238 | ||
| 239 | /* MMC2 */ | ||
| 240 | #define GPIO28_MMC2_CMD MFP_CFG_DRV(GPIO28, AF6, FAST) | ||
| 241 | #define GPIO29_MMC2_CLK MFP_CFG_DRV(GPIO29, AF6, FAST) | ||
| 242 | #define GPIO30_MMC2_DAT0 MFP_CFG_DRV(GPIO30, AF6, FAST) | ||
| 243 | #define GPIO31_MMC2_DAT1 MFP_CFG_DRV(GPIO31, AF6, FAST) | ||
| 244 | #define GPIO32_MMC2_DAT2 MFP_CFG_DRV(GPIO32, AF6, FAST) | ||
| 245 | #define GPIO33_MMC2_DAT3 MFP_CFG_DRV(GPIO33, AF6, FAST) | ||
| 246 | |||
| 247 | /* MMC4 */ | ||
| 248 | #define GPIO125_MMC4_DAT3 MFP_CFG_DRV(GPIO125, AF7, FAST) | ||
| 249 | #define GPIO126_MMC4_DAT2 MFP_CFG_DRV(GPIO126, AF7, FAST) | ||
| 250 | #define GPIO127_MMC4_DAT1 MFP_CFG_DRV(GPIO127, AF7, FAST) | ||
| 251 | #define GPIO0_2_MMC4_DAT0 MFP_CFG_DRV(GPIO0_2, AF7, FAST) | ||
| 252 | #define GPIO1_2_MMC4_CMD MFP_CFG_DRV(GPIO1_2, AF7, FAST) | ||
| 253 | #define GPIO2_2_MMC4_CLK MFP_CFG_DRV(GPIO2_2, AF7, FAST) | ||
| 254 | |||
| 235 | /* LCD */ | 255 | /* LCD */ |
| 236 | #define GPIO84_LCD_CS MFP_CFG(GPIO84, AF1) | 256 | #define GPIO84_LCD_CS MFP_CFG(GPIO84, AF1) |
| 237 | #define GPIO60_LCD_DD0 MFP_CFG(GPIO60, AF1) | 257 | #define GPIO60_LCD_DD0 MFP_CFG(GPIO60, AF1) |
| @@ -269,11 +289,12 @@ | |||
| 269 | #define GPIO106_CI2C_SCL MFP_CFG(GPIO106, AF1) | 289 | #define GPIO106_CI2C_SCL MFP_CFG(GPIO106, AF1) |
| 270 | 290 | ||
| 271 | /* I2S */ | 291 | /* I2S */ |
| 272 | #define GPIO113_I2S_MCLK MFP_CFG(GPIO113,AF6) | 292 | #define GPIO113_I2S_MCLK MFP_CFG(GPIO113, AF6) |
| 273 | #define GPIO114_I2S_FRM MFP_CFG(GPIO114,AF1) | 293 | #define GPIO114_I2S_FRM MFP_CFG(GPIO114, AF1) |
| 274 | #define GPIO115_I2S_BCLK MFP_CFG(GPIO115,AF1) | 294 | #define GPIO115_I2S_BCLK MFP_CFG(GPIO115, AF1) |
| 275 | #define GPIO116_I2S_RXD MFP_CFG(GPIO116,AF2) | 295 | #define GPIO116_I2S_RXD MFP_CFG(GPIO116, AF2) |
| 276 | #define GPIO117_I2S_TXD MFP_CFG(GPIO117,AF2) | 296 | #define GPIO116_I2S_TXD MFP_CFG(GPIO116, AF1) |
| 297 | #define GPIO117_I2S_TXD MFP_CFG(GPIO117, AF2) | ||
| 277 | 298 | ||
| 278 | /* PWM */ | 299 | /* PWM */ |
| 279 | #define GPIO96_PWM3_OUT MFP_CFG(GPIO96, AF1) | 300 | #define GPIO96_PWM3_OUT MFP_CFG(GPIO96, AF1) |
| @@ -324,4 +345,10 @@ | |||
| 324 | #define GPIO101_MII_MDIO MFP_CFG(GPIO101, AF5) | 345 | #define GPIO101_MII_MDIO MFP_CFG(GPIO101, AF5) |
| 325 | #define GPIO103_RX_DV MFP_CFG(GPIO103, AF5) | 346 | #define GPIO103_RX_DV MFP_CFG(GPIO103, AF5) |
| 326 | 347 | ||
| 348 | /* SSP2 */ | ||
| 349 | #define GPIO107_SSP2_RXD MFP_CFG(GPIO107, AF4) | ||
| 350 | #define GPIO108_SSP2_TXD MFP_CFG(GPIO108, AF4) | ||
| 351 | #define GPIO111_SSP2_CLK MFP_CFG(GPIO111, AF4) | ||
| 352 | #define GPIO112_SSP2_FRM MFP_CFG(GPIO112, AF4) | ||
| 353 | |||
| 327 | #endif /* __ASM_MACH_MFP_PXA168_H */ | 354 | #endif /* __ASM_MACH_MFP_PXA168_H */ |
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index 99833b9485cf..4e91ee6e27c8 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c | |||
| @@ -51,12 +51,12 @@ static inline uint32_t timer_read(void) | |||
| 51 | { | 51 | { |
| 52 | int delay = 100; | 52 | int delay = 100; |
| 53 | 53 | ||
| 54 | __raw_writel(1, TIMERS_VIRT_BASE + TMR_CVWR(0)); | 54 | __raw_writel(1, TIMERS_VIRT_BASE + TMR_CVWR(1)); |
| 55 | 55 | ||
| 56 | while (delay--) | 56 | while (delay--) |
| 57 | cpu_relax(); | 57 | cpu_relax(); |
| 58 | 58 | ||
| 59 | return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(0)); | 59 | return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(1)); |
| 60 | } | 60 | } |
| 61 | 61 | ||
| 62 | unsigned long long notrace sched_clock(void) | 62 | unsigned long long notrace sched_clock(void) |
| @@ -75,28 +75,51 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id) | |||
| 75 | { | 75 | { |
| 76 | struct clock_event_device *c = dev_id; | 76 | struct clock_event_device *c = dev_id; |
| 77 | 77 | ||
| 78 | /* disable and clear pending interrupt status */ | 78 | /* |
| 79 | __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(0)); | 79 | * Clear pending interrupt status. |
| 80 | __raw_writel(0x1, TIMERS_VIRT_BASE + TMR_ICR(0)); | 80 | */ |
| 81 | __raw_writel(0x01, TIMERS_VIRT_BASE + TMR_ICR(0)); | ||
| 82 | |||
| 83 | /* | ||
| 84 | * Disable timer 0. | ||
| 85 | */ | ||
| 86 | __raw_writel(0x02, TIMERS_VIRT_BASE + TMR_CER); | ||
| 87 | |||
| 81 | c->event_handler(c); | 88 | c->event_handler(c); |
| 89 | |||
| 82 | return IRQ_HANDLED; | 90 | return IRQ_HANDLED; |
| 83 | } | 91 | } |
| 84 | 92 | ||
| 85 | static int timer_set_next_event(unsigned long delta, | 93 | static int timer_set_next_event(unsigned long delta, |
| 86 | struct clock_event_device *dev) | 94 | struct clock_event_device *dev) |
| 87 | { | 95 | { |
| 88 | unsigned long flags, next; | 96 | unsigned long flags; |
| 89 | 97 | ||
| 90 | local_irq_save(flags); | 98 | local_irq_save(flags); |
| 91 | 99 | ||
| 92 | /* clear pending interrupt status and enable */ | 100 | /* |
| 101 | * Disable timer 0. | ||
| 102 | */ | ||
| 103 | __raw_writel(0x02, TIMERS_VIRT_BASE + TMR_CER); | ||
| 104 | |||
| 105 | /* | ||
| 106 | * Clear and enable timer match 0 interrupt. | ||
| 107 | */ | ||
| 93 | __raw_writel(0x01, TIMERS_VIRT_BASE + TMR_ICR(0)); | 108 | __raw_writel(0x01, TIMERS_VIRT_BASE + TMR_ICR(0)); |
| 94 | __raw_writel(0x01, TIMERS_VIRT_BASE + TMR_IER(0)); | 109 | __raw_writel(0x01, TIMERS_VIRT_BASE + TMR_IER(0)); |
| 95 | 110 | ||
| 96 | next = timer_read() + delta; | 111 | /* |
| 97 | __raw_writel(next, TIMERS_VIRT_BASE + TMR_TN_MM(0, 0)); | 112 | * Setup new clockevent timer value. |
| 113 | */ | ||
| 114 | __raw_writel(delta - 1, TIMERS_VIRT_BASE + TMR_TN_MM(0, 0)); | ||
| 115 | |||
| 116 | /* | ||
| 117 | * Enable timer 0. | ||
| 118 | */ | ||
| 119 | __raw_writel(0x03, TIMERS_VIRT_BASE + TMR_CER); | ||
| 98 | 120 | ||
| 99 | local_irq_restore(flags); | 121 | local_irq_restore(flags); |
| 122 | |||
| 100 | return 0; | 123 | return 0; |
| 101 | } | 124 | } |
| 102 | 125 | ||
| @@ -145,23 +168,26 @@ static struct clocksource cksrc = { | |||
| 145 | static void __init timer_config(void) | 168 | static void __init timer_config(void) |
| 146 | { | 169 | { |
| 147 | uint32_t ccr = __raw_readl(TIMERS_VIRT_BASE + TMR_CCR); | 170 | uint32_t ccr = __raw_readl(TIMERS_VIRT_BASE + TMR_CCR); |
| 148 | uint32_t cer = __raw_readl(TIMERS_VIRT_BASE + TMR_CER); | ||
| 149 | uint32_t cmr = __raw_readl(TIMERS_VIRT_BASE + TMR_CMR); | ||
| 150 | 171 | ||
| 151 | __raw_writel(cer & ~0x1, TIMERS_VIRT_BASE + TMR_CER); /* disable */ | 172 | __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_CER); /* disable */ |
| 152 | 173 | ||
| 153 | ccr &= (cpu_is_mmp2()) ? TMR_CCR_CS_0(0) : TMR_CCR_CS_0(3); | 174 | ccr &= (cpu_is_mmp2()) ? (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) : |
| 175 | (TMR_CCR_CS_0(3) | TMR_CCR_CS_1(3)); | ||
| 154 | __raw_writel(ccr, TIMERS_VIRT_BASE + TMR_CCR); | 176 | __raw_writel(ccr, TIMERS_VIRT_BASE + TMR_CCR); |
| 155 | 177 | ||
| 156 | /* free-running mode */ | 178 | /* set timer 0 to periodic mode, and timer 1 to free-running mode */ |
| 157 | __raw_writel(cmr | 0x01, TIMERS_VIRT_BASE + TMR_CMR); | 179 | __raw_writel(0x2, TIMERS_VIRT_BASE + TMR_CMR); |
| 158 | 180 | ||
| 159 | __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_PLCR(0)); /* free-running */ | 181 | __raw_writel(0x1, TIMERS_VIRT_BASE + TMR_PLCR(0)); /* periodic */ |
| 160 | __raw_writel(0x7, TIMERS_VIRT_BASE + TMR_ICR(0)); /* clear status */ | 182 | __raw_writel(0x7, TIMERS_VIRT_BASE + TMR_ICR(0)); /* clear status */ |
| 161 | __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(0)); | 183 | __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(0)); |
| 162 | 184 | ||
| 163 | /* enable timer counter */ | 185 | __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_PLCR(1)); /* free-running */ |
| 164 | __raw_writel(cer | 0x01, TIMERS_VIRT_BASE + TMR_CER); | 186 | __raw_writel(0x7, TIMERS_VIRT_BASE + TMR_ICR(1)); /* clear status */ |
| 187 | __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(1)); | ||
| 188 | |||
| 189 | /* enable timer 1 counter */ | ||
| 190 | __raw_writel(0x2, TIMERS_VIRT_BASE + TMR_CER); | ||
| 165 | } | 191 | } |
| 166 | 192 | ||
| 167 | static struct irqaction timer_irq = { | 193 | static struct irqaction timer_irq = { |
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c index 7c893fa70266..68934ea8725a 100644 --- a/arch/arm/mach-mx5/board-cpuimx51.c +++ b/arch/arm/mach-mx5/board-cpuimx51.c | |||
| @@ -81,7 +81,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
| 81 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, | 81 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, |
| 82 | }, { | 82 | }, { |
| 83 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000), | 83 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000), |
| 84 | .irq = irq_to_gpio(CPUIMX51_QUARTD_GPIO), | 84 | .irq = gpio_to_irq(CPUIMX51_QUARTD_GPIO), |
| 85 | .irqflags = IRQF_TRIGGER_HIGH, | 85 | .irqflags = IRQF_TRIGGER_HIGH, |
| 86 | .uartclk = CPUIMX51_QUART_XTAL, | 86 | .uartclk = CPUIMX51_QUART_XTAL, |
| 87 | .regshift = CPUIMX51_QUART_REGSHIFT, | 87 | .regshift = CPUIMX51_QUART_REGSHIFT, |
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index e400b09109ce..11b0ff67f89d 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c | |||
| @@ -369,7 +369,7 @@ static void __init mx51_babbage_init(void) | |||
| 369 | ARRAY_SIZE(mx51babbage_pads)); | 369 | ARRAY_SIZE(mx51babbage_pads)); |
| 370 | 370 | ||
| 371 | imx51_add_imx_uart(0, &uart_pdata); | 371 | imx51_add_imx_uart(0, &uart_pdata); |
| 372 | imx51_add_imx_uart(1, &uart_pdata); | 372 | imx51_add_imx_uart(1, NULL); |
| 373 | imx51_add_imx_uart(2, &uart_pdata); | 373 | imx51_add_imx_uart(2, &uart_pdata); |
| 374 | 374 | ||
| 375 | babbage_fec_reset(); | 375 | babbage_fec_reset(); |
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c index f70700dc0ec1..551daf85ff8c 100644 --- a/arch/arm/mach-mx5/board-mx51_efikamx.c +++ b/arch/arm/mach-mx5/board-mx51_efikamx.c | |||
| @@ -108,9 +108,9 @@ static void __init mx51_efikamx_board_id(void) | |||
| 108 | gpio_request(EFIKAMX_PCBID2, "pcbid2"); | 108 | gpio_request(EFIKAMX_PCBID2, "pcbid2"); |
| 109 | gpio_direction_input(EFIKAMX_PCBID2); | 109 | gpio_direction_input(EFIKAMX_PCBID2); |
| 110 | 110 | ||
| 111 | id = gpio_get_value(EFIKAMX_PCBID0); | 111 | id = gpio_get_value(EFIKAMX_PCBID0) ? 1 : 0; |
| 112 | id |= gpio_get_value(EFIKAMX_PCBID1) << 1; | 112 | id |= (gpio_get_value(EFIKAMX_PCBID1) ? 1 : 0) << 1; |
| 113 | id |= gpio_get_value(EFIKAMX_PCBID2) << 2; | 113 | id |= (gpio_get_value(EFIKAMX_PCBID2) ? 1 : 0) << 2; |
| 114 | 114 | ||
| 115 | switch (id) { | 115 | switch (id) { |
| 116 | case 7: | 116 | case 7: |
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c index 2e4d9d32a87c..8a9bca22beb5 100644 --- a/arch/arm/mach-mx5/board-mx51_efikasb.c +++ b/arch/arm/mach-mx5/board-mx51_efikasb.c | |||
| @@ -156,23 +156,24 @@ static struct gpio_keys_button mx51_efikasb_keys[] = { | |||
| 156 | { | 156 | { |
| 157 | .code = KEY_POWER, | 157 | .code = KEY_POWER, |
| 158 | .gpio = EFIKASB_PWRKEY, | 158 | .gpio = EFIKASB_PWRKEY, |
| 159 | .type = EV_PWR, | 159 | .type = EV_KEY, |
| 160 | .desc = "Power Button", | 160 | .desc = "Power Button", |
| 161 | .wakeup = 1, | 161 | .wakeup = 1, |
| 162 | .debounce_interval = 10, /* ms */ | 162 | .active_low = 1, |
| 163 | }, | 163 | }, |
| 164 | { | 164 | { |
| 165 | .code = SW_LID, | 165 | .code = SW_LID, |
| 166 | .gpio = EFIKASB_LID, | 166 | .gpio = EFIKASB_LID, |
| 167 | .type = EV_SW, | 167 | .type = EV_SW, |
| 168 | .desc = "Lid Switch", | 168 | .desc = "Lid Switch", |
| 169 | .active_low = 1, | ||
| 169 | }, | 170 | }, |
| 170 | { | 171 | { |
| 171 | /* SW_RFKILLALL vs KEY_RFKILL ? */ | 172 | .code = KEY_RFKILL, |
| 172 | .code = SW_RFKILL_ALL, | ||
| 173 | .gpio = EFIKASB_RFKILL, | 173 | .gpio = EFIKASB_RFKILL, |
| 174 | .type = EV_SW, | 174 | .type = EV_KEY, |
| 175 | .desc = "rfkill", | 175 | .desc = "rfkill", |
| 176 | .active_low = 1, | ||
| 176 | }, | 177 | }, |
| 177 | }; | 178 | }; |
| 178 | 179 | ||
| @@ -224,8 +225,8 @@ static void __init mx51_efikasb_board_id(void) | |||
| 224 | gpio_request(EFIKASB_PCBID1, "pcb id1"); | 225 | gpio_request(EFIKASB_PCBID1, "pcb id1"); |
| 225 | gpio_direction_input(EFIKASB_PCBID1); | 226 | gpio_direction_input(EFIKASB_PCBID1); |
| 226 | 227 | ||
| 227 | id = gpio_get_value(EFIKASB_PCBID0); | 228 | id = gpio_get_value(EFIKASB_PCBID0) ? 1 : 0; |
| 228 | id |= gpio_get_value(EFIKASB_PCBID1) << 1; | 229 | id |= (gpio_get_value(EFIKASB_PCBID1) ? 1 : 0) << 1; |
| 229 | 230 | ||
| 230 | switch (id) { | 231 | switch (id) { |
| 231 | default: | 232 | default: |
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 7f20308c4dbd..f7bf996f463b 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c | |||
| @@ -271,7 +271,11 @@ static int _clk_pll_enable(struct clk *clk) | |||
| 271 | int i = 0; | 271 | int i = 0; |
| 272 | 272 | ||
| 273 | pllbase = _get_pll_base(clk); | 273 | pllbase = _get_pll_base(clk); |
| 274 | reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN; | 274 | reg = __raw_readl(pllbase + MXC_PLL_DP_CTL); |
| 275 | if (reg & MXC_PLL_DP_CTL_UPEN) | ||
| 276 | return 0; | ||
| 277 | |||
| 278 | reg |= MXC_PLL_DP_CTL_UPEN; | ||
| 275 | __raw_writel(reg, pllbase + MXC_PLL_DP_CTL); | 279 | __raw_writel(reg, pllbase + MXC_PLL_DP_CTL); |
| 276 | 280 | ||
| 277 | /* Wait for lock */ | 281 | /* Wait for lock */ |
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c index 4435e03cea5d..c9209454807a 100644 --- a/arch/arm/mach-mx5/mx51_efika.c +++ b/arch/arm/mach-mx5/mx51_efika.c | |||
| @@ -186,7 +186,7 @@ static int initialize_usbh1_port(struct platform_device *pdev) | |||
| 186 | 186 | ||
| 187 | mdelay(10); | 187 | mdelay(10); |
| 188 | 188 | ||
| 189 | return mx51_initialize_usb_hw(0, MXC_EHCI_ITC_NO_THRESHOLD); | 189 | return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD); |
| 190 | } | 190 | } |
| 191 | 191 | ||
| 192 | static struct mxc_usbh_platform_data usbh1_config = { | 192 | static struct mxc_usbh_platform_data usbh1_config = { |
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 4ae6257b39a4..57b66d590c52 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
| @@ -7,7 +7,6 @@ config ARCH_OMAP2PLUS_TYPICAL | |||
| 7 | default y | 7 | default y |
| 8 | select AEABI | 8 | select AEABI |
| 9 | select REGULATOR | 9 | select REGULATOR |
| 10 | select PM | ||
| 11 | select PM_RUNTIME | 10 | select PM_RUNTIME |
| 12 | select VFP | 11 | select VFP |
| 13 | select NEON if ARCH_OMAP3 || ARCH_OMAP4 | 12 | select NEON if ARCH_OMAP3 || ARCH_OMAP4 |
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c index 5f2b55ff04ff..933e9353cb37 100644 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ b/arch/arm/mach-omap2/board-am3517crane.c | |||
| @@ -45,8 +45,6 @@ static struct omap_board_config_kernel am3517_crane_config[] __initdata = { | |||
| 45 | static struct omap_board_mux board_mux[] __initdata = { | 45 | static struct omap_board_mux board_mux[] __initdata = { |
| 46 | { .reg_offset = OMAP_MUX_TERMINATOR }, | 46 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
| 47 | }; | 47 | }; |
| 48 | #else | ||
| 49 | #define board_mux NULL | ||
| 50 | #endif | 48 | #endif |
| 51 | 49 | ||
| 52 | static void __init am3517_crane_init_early(void) | 50 | static void __init am3517_crane_init_early(void) |
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 32f5f895568a..3ae16b4e3f52 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c | |||
| @@ -491,23 +491,22 @@ static void __init beagle_opp_init(void) | |||
| 491 | 491 | ||
| 492 | /* Custom OPP enabled for all xM versions */ | 492 | /* Custom OPP enabled for all xM versions */ |
| 493 | if (cpu_is_omap3630()) { | 493 | if (cpu_is_omap3630()) { |
| 494 | struct omap_hwmod *mh = omap_hwmod_lookup("mpu"); | 494 | struct device *mpu_dev, *iva_dev; |
| 495 | struct omap_hwmod *dh = omap_hwmod_lookup("iva"); | ||
| 496 | struct device *dev; | ||
| 497 | 495 | ||
| 498 | if (!mh || !dh) { | 496 | mpu_dev = omap2_get_mpuss_device(); |
| 497 | iva_dev = omap2_get_iva_device(); | ||
| 498 | |||
| 499 | if (!mpu_dev || !iva_dev) { | ||
| 499 | pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", | 500 | pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", |
| 500 | __func__, mh, dh); | 501 | __func__, mpu_dev, iva_dev); |
| 501 | return; | 502 | return; |
| 502 | } | 503 | } |
| 503 | /* Enable MPU 1GHz and lower opps */ | 504 | /* Enable MPU 1GHz and lower opps */ |
| 504 | dev = &mh->od->pdev.dev; | 505 | r = opp_enable(mpu_dev, 800000000); |
| 505 | r = opp_enable(dev, 800000000); | ||
| 506 | /* TODO: MPU 1GHz needs SR and ABB */ | 506 | /* TODO: MPU 1GHz needs SR and ABB */ |
| 507 | 507 | ||
| 508 | /* Enable IVA 800MHz and lower opps */ | 508 | /* Enable IVA 800MHz and lower opps */ |
| 509 | dev = &dh->od->pdev.dev; | 509 | r |= opp_enable(iva_dev, 660000000); |
| 510 | r |= opp_enable(dev, 660000000); | ||
| 511 | /* TODO: DSP 800MHz needs SR and ABB */ | 510 | /* TODO: DSP 800MHz needs SR and ABB */ |
| 512 | if (r) { | 511 | if (r) { |
| 513 | pr_err("%s: failed to enable higher opp %d\n", | 512 | pr_err("%s: failed to enable higher opp %d\n", |
| @@ -516,10 +515,8 @@ static void __init beagle_opp_init(void) | |||
| 516 | * Cleanup - disable the higher freqs - we dont care | 515 | * Cleanup - disable the higher freqs - we dont care |
| 517 | * about the results | 516 | * about the results |
| 518 | */ | 517 | */ |
| 519 | dev = &mh->od->pdev.dev; | 518 | opp_disable(mpu_dev, 800000000); |
| 520 | opp_disable(dev, 800000000); | 519 | opp_disable(iva_dev, 660000000); |
| 521 | dev = &dh->od->pdev.dev; | ||
| 522 | opp_disable(dev, 660000000); | ||
| 523 | } | 520 | } |
| 524 | } | 521 | } |
| 525 | return; | 522 | return; |
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h index f2ea6453ade0..a018a7327879 100644 --- a/arch/arm/mach-omap2/cminst44xx.h +++ b/arch/arm/mach-omap2/cminst44xx.h | |||
| @@ -18,13 +18,36 @@ extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); | |||
| 18 | extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); | 18 | extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); |
| 19 | 19 | ||
| 20 | extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); | 20 | extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); |
| 21 | extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); | 21 | |
| 22 | # ifdef CONFIG_ARCH_OMAP4 | ||
| 23 | extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, | ||
| 24 | u16 clkctrl_offs); | ||
| 22 | 25 | ||
| 23 | extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, | 26 | extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, |
| 24 | u16 clkctrl_offs); | 27 | u16 clkctrl_offs); |
| 25 | extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, | 28 | extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, |
| 26 | u16 clkctrl_offs); | 29 | u16 clkctrl_offs); |
| 27 | 30 | ||
| 31 | # else | ||
| 32 | |||
| 33 | static inline int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, | ||
| 34 | u16 clkctrl_offs) | ||
| 35 | { | ||
| 36 | return 0; | ||
| 37 | } | ||
| 38 | |||
| 39 | static inline void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, | ||
| 40 | s16 cdoffs, u16 clkctrl_offs) | ||
| 41 | { | ||
| 42 | } | ||
| 43 | |||
| 44 | static inline void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, | ||
| 45 | u16 clkctrl_offs) | ||
| 46 | { | ||
| 47 | } | ||
| 48 | |||
| 49 | # endif | ||
| 50 | |||
| 28 | /* | 51 | /* |
| 29 | * In an ideal world, we would not export these low-level functions, | 52 | * In an ideal world, we would not export these low-level functions, |
| 30 | * but this will probably take some time to fix properly | 53 | * but this will probably take some time to fix properly |
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index c7fb22abc219..655e9480eb98 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
| @@ -821,11 +821,10 @@ static void __init omap_mux_set_cmdline_signals(void) | |||
| 821 | if (!omap_mux_options) | 821 | if (!omap_mux_options) |
| 822 | return; | 822 | return; |
| 823 | 823 | ||
| 824 | options = kmalloc(strlen(omap_mux_options) + 1, GFP_KERNEL); | 824 | options = kstrdup(omap_mux_options, GFP_KERNEL); |
| 825 | if (!options) | 825 | if (!options) |
| 826 | return; | 826 | return; |
| 827 | 827 | ||
| 828 | strcpy(options, omap_mux_options); | ||
| 829 | next_opt = options; | 828 | next_opt = options; |
| 830 | 829 | ||
| 831 | while ((token = strsep(&next_opt, ",")) != NULL) { | 830 | while ((token = strsep(&next_opt, ",")) != NULL) { |
| @@ -855,24 +854,19 @@ static int __init omap_mux_copy_names(struct omap_mux *src, | |||
| 855 | 854 | ||
| 856 | for (i = 0; i < OMAP_MUX_NR_MODES; i++) { | 855 | for (i = 0; i < OMAP_MUX_NR_MODES; i++) { |
| 857 | if (src->muxnames[i]) { | 856 | if (src->muxnames[i]) { |
| 858 | dst->muxnames[i] = | 857 | dst->muxnames[i] = kstrdup(src->muxnames[i], |
| 859 | kmalloc(strlen(src->muxnames[i]) + 1, | 858 | GFP_KERNEL); |
| 860 | GFP_KERNEL); | ||
| 861 | if (!dst->muxnames[i]) | 859 | if (!dst->muxnames[i]) |
| 862 | goto free; | 860 | goto free; |
| 863 | strcpy(dst->muxnames[i], src->muxnames[i]); | ||
| 864 | } | 861 | } |
| 865 | } | 862 | } |
| 866 | 863 | ||
| 867 | #ifdef CONFIG_DEBUG_FS | 864 | #ifdef CONFIG_DEBUG_FS |
| 868 | for (i = 0; i < OMAP_MUX_NR_SIDES; i++) { | 865 | for (i = 0; i < OMAP_MUX_NR_SIDES; i++) { |
| 869 | if (src->balls[i]) { | 866 | if (src->balls[i]) { |
| 870 | dst->balls[i] = | 867 | dst->balls[i] = kstrdup(src->balls[i], GFP_KERNEL); |
| 871 | kmalloc(strlen(src->balls[i]) + 1, | ||
| 872 | GFP_KERNEL); | ||
| 873 | if (!dst->balls[i]) | 868 | if (!dst->balls[i]) |
| 874 | goto free; | 869 | goto free; |
| 875 | strcpy(dst->balls[i], src->balls[i]); | ||
| 876 | } | 870 | } |
| 877 | } | 871 | } |
| 878 | #endif | 872 | #endif |
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 2ce2fb7664bc..34c01a7de810 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c | |||
| @@ -621,7 +621,7 @@ void sr_disable(struct voltagedomain *voltdm) | |||
| 621 | sr_v2_disable(sr); | 621 | sr_v2_disable(sr); |
| 622 | } | 622 | } |
| 623 | 623 | ||
| 624 | pm_runtime_put_sync(&sr->pdev->dev); | 624 | pm_runtime_put_sync_suspend(&sr->pdev->dev); |
| 625 | } | 625 | } |
| 626 | 626 | ||
| 627 | /** | 627 | /** |
| @@ -860,6 +860,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
| 860 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | 860 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 861 | 861 | ||
| 862 | pm_runtime_enable(&pdev->dev); | 862 | pm_runtime_enable(&pdev->dev); |
| 863 | pm_runtime_irq_safe(&pdev->dev); | ||
| 863 | 864 | ||
| 864 | sr_info->pdev = pdev; | 865 | sr_info->pdev = pdev; |
| 865 | sr_info->srid = pdev->id; | 866 | sr_info->srid = pdev->id; |
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index e9640728239b..cf1de7d2630d 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c | |||
| @@ -293,7 +293,8 @@ static void __init omap2_gp_clocksource_init(int gptimer_id, | |||
| 293 | pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", | 293 | pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", |
| 294 | gptimer_id, clksrc.rate); | 294 | gptimer_id, clksrc.rate); |
| 295 | 295 | ||
| 296 | __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1); | 296 | __omap_dm_timer_load_start(clksrc.io_base, |
| 297 | OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1); | ||
| 297 | init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); | 298 | init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); |
| 298 | 299 | ||
| 299 | if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) | 300 | if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) |
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c index 2543342dbccb..daa056ed8738 100644 --- a/arch/arm/mach-omap2/twl-common.c +++ b/arch/arm/mach-omap2/twl-common.c | |||
| @@ -48,14 +48,7 @@ void __init omap_pmic_init(int bus, u32 clkrate, | |||
| 48 | omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); | 48 | omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); |
| 49 | } | 49 | } |
| 50 | 50 | ||
| 51 | static struct twl4030_usb_data omap4_usb_pdata = { | 51 | #if defined(CONFIG_ARCH_OMAP3) |
| 52 | .phy_init = omap4430_phy_init, | ||
| 53 | .phy_exit = omap4430_phy_exit, | ||
| 54 | .phy_power = omap4430_phy_power, | ||
| 55 | .phy_set_clock = omap4430_phy_set_clk, | ||
| 56 | .phy_suspend = omap4430_phy_suspend, | ||
| 57 | }; | ||
| 58 | |||
| 59 | static struct twl4030_usb_data omap3_usb_pdata = { | 52 | static struct twl4030_usb_data omap3_usb_pdata = { |
| 60 | .usb_mode = T2_USB_MODE_ULPI, | 53 | .usb_mode = T2_USB_MODE_ULPI, |
| 61 | }; | 54 | }; |
| @@ -122,6 +115,45 @@ static struct regulator_init_data omap3_vpll2_idata = { | |||
| 122 | .consumer_supplies = omap3_vpll2_supplies, | 115 | .consumer_supplies = omap3_vpll2_supplies, |
| 123 | }; | 116 | }; |
| 124 | 117 | ||
| 118 | void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, | ||
| 119 | u32 pdata_flags, u32 regulators_flags) | ||
| 120 | { | ||
| 121 | if (!pmic_data->irq_base) | ||
| 122 | pmic_data->irq_base = TWL4030_IRQ_BASE; | ||
| 123 | if (!pmic_data->irq_end) | ||
| 124 | pmic_data->irq_end = TWL4030_IRQ_END; | ||
| 125 | |||
| 126 | /* Common platform data configurations */ | ||
| 127 | if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) | ||
| 128 | pmic_data->usb = &omap3_usb_pdata; | ||
| 129 | |||
| 130 | if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) | ||
| 131 | pmic_data->bci = &omap3_bci_pdata; | ||
| 132 | |||
| 133 | if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc) | ||
| 134 | pmic_data->madc = &omap3_madc_pdata; | ||
| 135 | |||
| 136 | if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio) | ||
| 137 | pmic_data->audio = &omap3_audio_pdata; | ||
| 138 | |||
| 139 | /* Common regulator configurations */ | ||
| 140 | if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) | ||
| 141 | pmic_data->vdac = &omap3_vdac_idata; | ||
| 142 | |||
| 143 | if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2) | ||
| 144 | pmic_data->vpll2 = &omap3_vpll2_idata; | ||
| 145 | } | ||
| 146 | #endif /* CONFIG_ARCH_OMAP3 */ | ||
| 147 | |||
| 148 | #if defined(CONFIG_ARCH_OMAP4) | ||
| 149 | static struct twl4030_usb_data omap4_usb_pdata = { | ||
| 150 | .phy_init = omap4430_phy_init, | ||
| 151 | .phy_exit = omap4430_phy_exit, | ||
| 152 | .phy_power = omap4430_phy_power, | ||
| 153 | .phy_set_clock = omap4430_phy_set_clk, | ||
| 154 | .phy_suspend = omap4430_phy_suspend, | ||
| 155 | }; | ||
| 156 | |||
| 125 | static struct regulator_init_data omap4_vdac_idata = { | 157 | static struct regulator_init_data omap4_vdac_idata = { |
| 126 | .constraints = { | 158 | .constraints = { |
| 127 | .min_uV = 1800000, | 159 | .min_uV = 1800000, |
| @@ -273,32 +305,4 @@ void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, | |||
| 273 | !pmic_data->clk32kg) | 305 | !pmic_data->clk32kg) |
| 274 | pmic_data->clk32kg = &omap4_clk32kg_idata; | 306 | pmic_data->clk32kg = &omap4_clk32kg_idata; |
| 275 | } | 307 | } |
| 276 | 308 | #endif /* CONFIG_ARCH_OMAP4 */ | |
| 277 | void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, | ||
| 278 | u32 pdata_flags, u32 regulators_flags) | ||
| 279 | { | ||
| 280 | if (!pmic_data->irq_base) | ||
| 281 | pmic_data->irq_base = TWL4030_IRQ_BASE; | ||
| 282 | if (!pmic_data->irq_end) | ||
| 283 | pmic_data->irq_end = TWL4030_IRQ_END; | ||
| 284 | |||
| 285 | /* Common platform data configurations */ | ||
| 286 | if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) | ||
| 287 | pmic_data->usb = &omap3_usb_pdata; | ||
| 288 | |||
| 289 | if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) | ||
| 290 | pmic_data->bci = &omap3_bci_pdata; | ||
| 291 | |||
| 292 | if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc) | ||
| 293 | pmic_data->madc = &omap3_madc_pdata; | ||
| 294 | |||
| 295 | if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio) | ||
| 296 | pmic_data->audio = &omap3_audio_pdata; | ||
| 297 | |||
| 298 | /* Common regulator configurations */ | ||
| 299 | if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) | ||
| 300 | pmic_data->vdac = &omap3_vdac_idata; | ||
| 301 | |||
| 302 | if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2) | ||
| 303 | pmic_data->vpll2 = &omap3_vpll2_idata; | ||
| 304 | } | ||
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c index 964c6c3cd7a6..dd39fee59549 100644 --- a/arch/arm/mach-sa1100/pci-nanoengine.c +++ b/arch/arm/mach-sa1100/pci-nanoengine.c | |||
| @@ -28,6 +28,7 @@ | |||
| 28 | #include <asm/mach-types.h> | 28 | #include <asm/mach-types.h> |
| 29 | 29 | ||
| 30 | #include <mach/nanoengine.h> | 30 | #include <mach/nanoengine.h> |
| 31 | #include <mach/hardware.h> | ||
| 31 | 32 | ||
| 32 | static DEFINE_SPINLOCK(nano_lock); | 33 | static DEFINE_SPINLOCK(nano_lock); |
| 33 | 34 | ||
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index 91fc7cdb5dc9..e4dde91f0231 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S | |||
| @@ -44,6 +44,14 @@ | |||
| 44 | #define UART_PADDR MX51_UART1_BASE_ADDR | 44 | #define UART_PADDR MX51_UART1_BASE_ADDR |
| 45 | #endif | 45 | #endif |
| 46 | 46 | ||
| 47 | /* iMX50/53 have same addresses, but not iMX51 */ | ||
| 48 | #if defined(CONFIG_SOC_IMX50) || defined(CONFIG_SOC_IMX53) | ||
| 49 | #ifdef UART_PADDR | ||
| 50 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" | ||
| 51 | #endif | ||
| 52 | #define UART_PADDR MX53_UART1_BASE_ADDR | ||
| 53 | #endif | ||
| 54 | |||
| 47 | #define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) | 55 | #define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) |
| 48 | 56 | ||
| 49 | .macro addruart, rp, rv | 57 | .macro addruart, rp, rv |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h index 9440b9e00e89..5408fd1fc736 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx53.h | |||
| @@ -30,6 +30,9 @@ | |||
| 30 | #define MX53_SDHC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \ | 30 | #define MX53_SDHC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \ |
| 31 | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_HIGH | \ | 31 | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_HIGH | \ |
| 32 | PAD_CTL_SRE_FAST) | 32 | PAD_CTL_SRE_FAST) |
| 33 | #define PAD_CTRL_I2C (PAD_CTL_SRE_FAST | PAD_CTL_ODE | PAD_CTL_PKE | \ | ||
| 34 | PAD_CTL_PUE | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP \ | ||
| 35 | | PAD_CTL_HYS) | ||
| 33 | 36 | ||
| 34 | #define _MX53_PAD_GPIO_19__KPP_COL_5 IOMUX_PAD(0x348, 0x20, 0, 0x840, 0, 0) | 37 | #define _MX53_PAD_GPIO_19__KPP_COL_5 IOMUX_PAD(0x348, 0x20, 0, 0x840, 0, 0) |
| 35 | #define _MX53_PAD_GPIO_19__GPIO4_5 IOMUX_PAD(0x348, 0x20, 1, 0x0, 0, 0) | 38 | #define _MX53_PAD_GPIO_19__GPIO4_5 IOMUX_PAD(0x348, 0x20, 1, 0x0, 0, 0) |
| @@ -1256,7 +1259,7 @@ | |||
| 1256 | #define MX53_PAD_KEY_COL3__GPIO4_12 (_MX53_PAD_KEY_COL3__GPIO4_12 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1259 | #define MX53_PAD_KEY_COL3__GPIO4_12 (_MX53_PAD_KEY_COL3__GPIO4_12 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1257 | #define MX53_PAD_KEY_COL3__USBOH3_H2_DP (_MX53_PAD_KEY_COL3__USBOH3_H2_DP | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1260 | #define MX53_PAD_KEY_COL3__USBOH3_H2_DP (_MX53_PAD_KEY_COL3__USBOH3_H2_DP | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1258 | #define MX53_PAD_KEY_COL3__SPDIF_IN1 (_MX53_PAD_KEY_COL3__SPDIF_IN1 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1261 | #define MX53_PAD_KEY_COL3__SPDIF_IN1 (_MX53_PAD_KEY_COL3__SPDIF_IN1 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1259 | #define MX53_PAD_KEY_COL3__I2C2_SCL (_MX53_PAD_KEY_COL3__I2C2_SCL | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1262 | #define MX53_PAD_KEY_COL3__I2C2_SCL (_MX53_PAD_KEY_COL3__I2C2_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 1260 | #define MX53_PAD_KEY_COL3__ECSPI1_SS3 (_MX53_PAD_KEY_COL3__ECSPI1_SS3 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1263 | #define MX53_PAD_KEY_COL3__ECSPI1_SS3 (_MX53_PAD_KEY_COL3__ECSPI1_SS3 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1261 | #define MX53_PAD_KEY_COL3__FEC_CRS (_MX53_PAD_KEY_COL3__FEC_CRS | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1264 | #define MX53_PAD_KEY_COL3__FEC_CRS (_MX53_PAD_KEY_COL3__FEC_CRS | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1262 | #define MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK (_MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1265 | #define MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK (_MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| @@ -1264,7 +1267,7 @@ | |||
| 1264 | #define MX53_PAD_KEY_ROW3__GPIO4_13 (_MX53_PAD_KEY_ROW3__GPIO4_13 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1267 | #define MX53_PAD_KEY_ROW3__GPIO4_13 (_MX53_PAD_KEY_ROW3__GPIO4_13 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1265 | #define MX53_PAD_KEY_ROW3__USBOH3_H2_DM (_MX53_PAD_KEY_ROW3__USBOH3_H2_DM | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1268 | #define MX53_PAD_KEY_ROW3__USBOH3_H2_DM (_MX53_PAD_KEY_ROW3__USBOH3_H2_DM | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1266 | #define MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK (_MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1269 | #define MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK (_MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1267 | #define MX53_PAD_KEY_ROW3__I2C2_SDA (_MX53_PAD_KEY_ROW3__I2C2_SDA | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1270 | #define MX53_PAD_KEY_ROW3__I2C2_SDA (_MX53_PAD_KEY_ROW3__I2C2_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 1268 | #define MX53_PAD_KEY_ROW3__OSC32K_32K_OUT (_MX53_PAD_KEY_ROW3__OSC32K_32K_OUT | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1271 | #define MX53_PAD_KEY_ROW3__OSC32K_32K_OUT (_MX53_PAD_KEY_ROW3__OSC32K_32K_OUT | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1269 | #define MX53_PAD_KEY_ROW3__CCM_PLL4_BYP (_MX53_PAD_KEY_ROW3__CCM_PLL4_BYP | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1272 | #define MX53_PAD_KEY_ROW3__CCM_PLL4_BYP (_MX53_PAD_KEY_ROW3__CCM_PLL4_BYP | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1270 | #define MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0 (_MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1273 | #define MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0 (_MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| @@ -1536,7 +1539,7 @@ | |||
| 1536 | #define MX53_PAD_CSI0_DAT8__KPP_COL_7 (_MX53_PAD_CSI0_DAT8__KPP_COL_7 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1539 | #define MX53_PAD_CSI0_DAT8__KPP_COL_7 (_MX53_PAD_CSI0_DAT8__KPP_COL_7 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1537 | #define MX53_PAD_CSI0_DAT8__ECSPI2_SCLK (_MX53_PAD_CSI0_DAT8__ECSPI2_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1540 | #define MX53_PAD_CSI0_DAT8__ECSPI2_SCLK (_MX53_PAD_CSI0_DAT8__ECSPI2_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1538 | #define MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC (_MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1541 | #define MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC (_MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1539 | #define MX53_PAD_CSI0_DAT8__I2C1_SDA (_MX53_PAD_CSI0_DAT8__I2C1_SDA | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1542 | #define MX53_PAD_CSI0_DAT8__I2C1_SDA (_MX53_PAD_CSI0_DAT8__I2C1_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 1540 | #define MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37 (_MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1543 | #define MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37 (_MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1541 | #define MX53_PAD_CSI0_DAT8__TPIU_TRACE_5 (_MX53_PAD_CSI0_DAT8__TPIU_TRACE_5 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1544 | #define MX53_PAD_CSI0_DAT8__TPIU_TRACE_5 (_MX53_PAD_CSI0_DAT8__TPIU_TRACE_5 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1542 | #define MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9 (_MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1545 | #define MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9 (_MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| @@ -1544,7 +1547,7 @@ | |||
| 1544 | #define MX53_PAD_CSI0_DAT9__KPP_ROW_7 (_MX53_PAD_CSI0_DAT9__KPP_ROW_7 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1547 | #define MX53_PAD_CSI0_DAT9__KPP_ROW_7 (_MX53_PAD_CSI0_DAT9__KPP_ROW_7 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1545 | #define MX53_PAD_CSI0_DAT9__ECSPI2_MOSI (_MX53_PAD_CSI0_DAT9__ECSPI2_MOSI | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1548 | #define MX53_PAD_CSI0_DAT9__ECSPI2_MOSI (_MX53_PAD_CSI0_DAT9__ECSPI2_MOSI | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1546 | #define MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR (_MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1549 | #define MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR (_MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1547 | #define MX53_PAD_CSI0_DAT9__I2C1_SCL (_MX53_PAD_CSI0_DAT9__I2C1_SCL | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1550 | #define MX53_PAD_CSI0_DAT9__I2C1_SCL (_MX53_PAD_CSI0_DAT9__I2C1_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 1548 | #define MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38 (_MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1551 | #define MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38 (_MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1549 | #define MX53_PAD_CSI0_DAT9__TPIU_TRACE_6 (_MX53_PAD_CSI0_DAT9__TPIU_TRACE_6 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1552 | #define MX53_PAD_CSI0_DAT9__TPIU_TRACE_6 (_MX53_PAD_CSI0_DAT9__TPIU_TRACE_6 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1550 | #define MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10 (_MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1553 | #define MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10 (_MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| @@ -1631,25 +1634,25 @@ | |||
| 1631 | #define MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK (_MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1634 | #define MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK (_MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1632 | #define MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS (_MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1635 | #define MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS (_MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1633 | #define MX53_PAD_EIM_EB2__ECSPI1_SS0 (_MX53_PAD_EIM_EB2__ECSPI1_SS0 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1636 | #define MX53_PAD_EIM_EB2__ECSPI1_SS0 (_MX53_PAD_EIM_EB2__ECSPI1_SS0 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1634 | #define MX53_PAD_EIM_EB2__I2C2_SCL (_MX53_PAD_EIM_EB2__I2C2_SCL | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1637 | #define MX53_PAD_EIM_EB2__I2C2_SCL (_MX53_PAD_EIM_EB2__I2C2_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 1635 | #define MX53_PAD_EIM_D16__EMI_WEIM_D_16 (_MX53_PAD_EIM_D16__EMI_WEIM_D_16 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1638 | #define MX53_PAD_EIM_D16__EMI_WEIM_D_16 (_MX53_PAD_EIM_D16__EMI_WEIM_D_16 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1636 | #define MX53_PAD_EIM_D16__GPIO3_16 (_MX53_PAD_EIM_D16__GPIO3_16 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1639 | #define MX53_PAD_EIM_D16__GPIO3_16 (_MX53_PAD_EIM_D16__GPIO3_16 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1637 | #define MX53_PAD_EIM_D16__IPU_DI0_PIN5 (_MX53_PAD_EIM_D16__IPU_DI0_PIN5 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1640 | #define MX53_PAD_EIM_D16__IPU_DI0_PIN5 (_MX53_PAD_EIM_D16__IPU_DI0_PIN5 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1638 | #define MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK (_MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1641 | #define MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK (_MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1639 | #define MX53_PAD_EIM_D16__ECSPI1_SCLK (_MX53_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1642 | #define MX53_PAD_EIM_D16__ECSPI1_SCLK (_MX53_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1640 | #define MX53_PAD_EIM_D16__I2C2_SDA (_MX53_PAD_EIM_D16__I2C2_SDA | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1643 | #define MX53_PAD_EIM_D16__I2C2_SDA (_MX53_PAD_EIM_D16__I2C2_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 1641 | #define MX53_PAD_EIM_D17__EMI_WEIM_D_17 (_MX53_PAD_EIM_D17__EMI_WEIM_D_17 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1644 | #define MX53_PAD_EIM_D17__EMI_WEIM_D_17 (_MX53_PAD_EIM_D17__EMI_WEIM_D_17 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1642 | #define MX53_PAD_EIM_D17__GPIO3_17 (_MX53_PAD_EIM_D17__GPIO3_17 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1645 | #define MX53_PAD_EIM_D17__GPIO3_17 (_MX53_PAD_EIM_D17__GPIO3_17 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1643 | #define MX53_PAD_EIM_D17__IPU_DI0_PIN6 (_MX53_PAD_EIM_D17__IPU_DI0_PIN6 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1646 | #define MX53_PAD_EIM_D17__IPU_DI0_PIN6 (_MX53_PAD_EIM_D17__IPU_DI0_PIN6 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1644 | #define MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN (_MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1647 | #define MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN (_MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1645 | #define MX53_PAD_EIM_D17__ECSPI1_MISO (_MX53_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1648 | #define MX53_PAD_EIM_D17__ECSPI1_MISO (_MX53_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1646 | #define MX53_PAD_EIM_D17__I2C3_SCL (_MX53_PAD_EIM_D17__I2C3_SCL | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1649 | #define MX53_PAD_EIM_D17__I2C3_SCL (_MX53_PAD_EIM_D17__I2C3_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 1647 | #define MX53_PAD_EIM_D18__EMI_WEIM_D_18 (_MX53_PAD_EIM_D18__EMI_WEIM_D_18 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1650 | #define MX53_PAD_EIM_D18__EMI_WEIM_D_18 (_MX53_PAD_EIM_D18__EMI_WEIM_D_18 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1648 | #define MX53_PAD_EIM_D18__GPIO3_18 (_MX53_PAD_EIM_D18__GPIO3_18 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1651 | #define MX53_PAD_EIM_D18__GPIO3_18 (_MX53_PAD_EIM_D18__GPIO3_18 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1649 | #define MX53_PAD_EIM_D18__IPU_DI0_PIN7 (_MX53_PAD_EIM_D18__IPU_DI0_PIN7 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1652 | #define MX53_PAD_EIM_D18__IPU_DI0_PIN7 (_MX53_PAD_EIM_D18__IPU_DI0_PIN7 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1650 | #define MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO (_MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1653 | #define MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO (_MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1651 | #define MX53_PAD_EIM_D18__ECSPI1_MOSI (_MX53_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1654 | #define MX53_PAD_EIM_D18__ECSPI1_MOSI (_MX53_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1652 | #define MX53_PAD_EIM_D18__I2C3_SDA (_MX53_PAD_EIM_D18__I2C3_SDA | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1655 | #define MX53_PAD_EIM_D18__I2C3_SDA (_MX53_PAD_EIM_D18__I2C3_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 1653 | #define MX53_PAD_EIM_D18__IPU_DI1_D0_CS (_MX53_PAD_EIM_D18__IPU_DI1_D0_CS | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1656 | #define MX53_PAD_EIM_D18__IPU_DI1_D0_CS (_MX53_PAD_EIM_D18__IPU_DI1_D0_CS | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1654 | #define MX53_PAD_EIM_D19__EMI_WEIM_D_19 (_MX53_PAD_EIM_D19__EMI_WEIM_D_19 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1657 | #define MX53_PAD_EIM_D19__EMI_WEIM_D_19 (_MX53_PAD_EIM_D19__EMI_WEIM_D_19 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1655 | #define MX53_PAD_EIM_D19__GPIO3_19 (_MX53_PAD_EIM_D19__GPIO3_19 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1658 | #define MX53_PAD_EIM_D19__GPIO3_19 (_MX53_PAD_EIM_D19__GPIO3_19 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| @@ -1672,7 +1675,7 @@ | |||
| 1672 | #define MX53_PAD_EIM_D21__IPU_DI0_PIN17 (_MX53_PAD_EIM_D21__IPU_DI0_PIN17 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1675 | #define MX53_PAD_EIM_D21__IPU_DI0_PIN17 (_MX53_PAD_EIM_D21__IPU_DI0_PIN17 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1673 | #define MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK (_MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1676 | #define MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK (_MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1674 | #define MX53_PAD_EIM_D21__CSPI_SCLK (_MX53_PAD_EIM_D21__CSPI_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1677 | #define MX53_PAD_EIM_D21__CSPI_SCLK (_MX53_PAD_EIM_D21__CSPI_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1675 | #define MX53_PAD_EIM_D21__I2C1_SCL (_MX53_PAD_EIM_D21__I2C1_SCL | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1678 | #define MX53_PAD_EIM_D21__I2C1_SCL (_MX53_PAD_EIM_D21__I2C1_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 1676 | #define MX53_PAD_EIM_D21__USBOH3_USBOTG_OC (_MX53_PAD_EIM_D21__USBOH3_USBOTG_OC | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1679 | #define MX53_PAD_EIM_D21__USBOH3_USBOTG_OC (_MX53_PAD_EIM_D21__USBOH3_USBOTG_OC | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1677 | #define MX53_PAD_EIM_D22__EMI_WEIM_D_22 (_MX53_PAD_EIM_D22__EMI_WEIM_D_22 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1680 | #define MX53_PAD_EIM_D22__EMI_WEIM_D_22 (_MX53_PAD_EIM_D22__EMI_WEIM_D_22 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1678 | #define MX53_PAD_EIM_D22__GPIO3_22 (_MX53_PAD_EIM_D22__GPIO3_22 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1681 | #define MX53_PAD_EIM_D22__GPIO3_22 (_MX53_PAD_EIM_D22__GPIO3_22 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| @@ -1732,7 +1735,7 @@ | |||
| 1732 | #define MX53_PAD_EIM_D28__UART2_CTS (_MX53_PAD_EIM_D28__UART2_CTS | MUX_PAD_CTRL(MX53_UART_PAD_CTRL)) | 1735 | #define MX53_PAD_EIM_D28__UART2_CTS (_MX53_PAD_EIM_D28__UART2_CTS | MUX_PAD_CTRL(MX53_UART_PAD_CTRL)) |
| 1733 | #define MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO (_MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1736 | #define MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO (_MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1734 | #define MX53_PAD_EIM_D28__CSPI_MOSI (_MX53_PAD_EIM_D28__CSPI_MOSI | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1737 | #define MX53_PAD_EIM_D28__CSPI_MOSI (_MX53_PAD_EIM_D28__CSPI_MOSI | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1735 | #define MX53_PAD_EIM_D28__I2C1_SDA (_MX53_PAD_EIM_D28__I2C1_SDA | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1738 | #define MX53_PAD_EIM_D28__I2C1_SDA (_MX53_PAD_EIM_D28__I2C1_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 1736 | #define MX53_PAD_EIM_D28__IPU_EXT_TRIG (_MX53_PAD_EIM_D28__IPU_EXT_TRIG | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1739 | #define MX53_PAD_EIM_D28__IPU_EXT_TRIG (_MX53_PAD_EIM_D28__IPU_EXT_TRIG | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1737 | #define MX53_PAD_EIM_D28__IPU_DI0_PIN13 (_MX53_PAD_EIM_D28__IPU_DI0_PIN13 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1740 | #define MX53_PAD_EIM_D28__IPU_DI0_PIN13 (_MX53_PAD_EIM_D28__IPU_DI0_PIN13 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 1738 | #define MX53_PAD_EIM_D29__EMI_WEIM_D_29 (_MX53_PAD_EIM_D29__EMI_WEIM_D_29 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 1741 | #define MX53_PAD_EIM_D29__EMI_WEIM_D_29 (_MX53_PAD_EIM_D29__EMI_WEIM_D_29 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| @@ -2297,7 +2300,7 @@ | |||
| 2297 | #define MX53_PAD_GPIO_9__SCC_FAIL_STATE (_MX53_PAD_GPIO_9__SCC_FAIL_STATE | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2300 | #define MX53_PAD_GPIO_9__SCC_FAIL_STATE (_MX53_PAD_GPIO_9__SCC_FAIL_STATE | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2298 | #define MX53_PAD_GPIO_3__ESAI1_HCKR (_MX53_PAD_GPIO_3__ESAI1_HCKR | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2301 | #define MX53_PAD_GPIO_3__ESAI1_HCKR (_MX53_PAD_GPIO_3__ESAI1_HCKR | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2299 | #define MX53_PAD_GPIO_3__GPIO1_3 (_MX53_PAD_GPIO_3__GPIO1_3 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2302 | #define MX53_PAD_GPIO_3__GPIO1_3 (_MX53_PAD_GPIO_3__GPIO1_3 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2300 | #define MX53_PAD_GPIO_3__I2C3_SCL (_MX53_PAD_GPIO_3__I2C3_SCL | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2303 | #define MX53_PAD_GPIO_3__I2C3_SCL (_MX53_PAD_GPIO_3__I2C3_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 2301 | #define MX53_PAD_GPIO_3__DPLLIP1_TOG_EN (_MX53_PAD_GPIO_3__DPLLIP1_TOG_EN | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2304 | #define MX53_PAD_GPIO_3__DPLLIP1_TOG_EN (_MX53_PAD_GPIO_3__DPLLIP1_TOG_EN | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2302 | #define MX53_PAD_GPIO_3__CCM_CLKO2 (_MX53_PAD_GPIO_3__CCM_CLKO2 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2305 | #define MX53_PAD_GPIO_3__CCM_CLKO2 (_MX53_PAD_GPIO_3__CCM_CLKO2 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2303 | #define MX53_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0 (_MX53_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2306 | #define MX53_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0 (_MX53_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| @@ -2305,7 +2308,7 @@ | |||
| 2305 | #define MX53_PAD_GPIO_3__MLB_MLBCLK (_MX53_PAD_GPIO_3__MLB_MLBCLK | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2308 | #define MX53_PAD_GPIO_3__MLB_MLBCLK (_MX53_PAD_GPIO_3__MLB_MLBCLK | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2306 | #define MX53_PAD_GPIO_6__ESAI1_SCKT (_MX53_PAD_GPIO_6__ESAI1_SCKT | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2309 | #define MX53_PAD_GPIO_6__ESAI1_SCKT (_MX53_PAD_GPIO_6__ESAI1_SCKT | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2307 | #define MX53_PAD_GPIO_6__GPIO1_6 (_MX53_PAD_GPIO_6__GPIO1_6 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2310 | #define MX53_PAD_GPIO_6__GPIO1_6 (_MX53_PAD_GPIO_6__GPIO1_6 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2308 | #define MX53_PAD_GPIO_6__I2C3_SDA (_MX53_PAD_GPIO_6__I2C3_SDA | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2311 | #define MX53_PAD_GPIO_6__I2C3_SDA (_MX53_PAD_GPIO_6__I2C3_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 2309 | #define MX53_PAD_GPIO_6__CCM_CCM_OUT_0 (_MX53_PAD_GPIO_6__CCM_CCM_OUT_0 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2312 | #define MX53_PAD_GPIO_6__CCM_CCM_OUT_0 (_MX53_PAD_GPIO_6__CCM_CCM_OUT_0 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2310 | #define MX53_PAD_GPIO_6__CSU_CSU_INT_DEB (_MX53_PAD_GPIO_6__CSU_CSU_INT_DEB | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2313 | #define MX53_PAD_GPIO_6__CSU_CSU_INT_DEB (_MX53_PAD_GPIO_6__CSU_CSU_INT_DEB | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2311 | #define MX53_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1 (_MX53_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2314 | #define MX53_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1 (_MX53_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| @@ -2333,7 +2336,7 @@ | |||
| 2333 | #define MX53_PAD_GPIO_5__CCM_CLKO (_MX53_PAD_GPIO_5__CCM_CLKO | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2336 | #define MX53_PAD_GPIO_5__CCM_CLKO (_MX53_PAD_GPIO_5__CCM_CLKO | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2334 | #define MX53_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2 (_MX53_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2337 | #define MX53_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2 (_MX53_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2335 | #define MX53_PAD_GPIO_5__OBSERVE_MUX_OBSRV_INT_OUT4 (_MX53_PAD_GPIO_5__OBSERVE_MUX_OBSRV_INT_OUT4 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2338 | #define MX53_PAD_GPIO_5__OBSERVE_MUX_OBSRV_INT_OUT4 (_MX53_PAD_GPIO_5__OBSERVE_MUX_OBSRV_INT_OUT4 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2336 | #define MX53_PAD_GPIO_5__I2C3_SCL (_MX53_PAD_GPIO_5__I2C3_SCL | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2339 | #define MX53_PAD_GPIO_5__I2C3_SCL (_MX53_PAD_GPIO_5__I2C3_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 2337 | #define MX53_PAD_GPIO_5__CCM_PLL1_BYP (_MX53_PAD_GPIO_5__CCM_PLL1_BYP | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2340 | #define MX53_PAD_GPIO_5__CCM_PLL1_BYP (_MX53_PAD_GPIO_5__CCM_PLL1_BYP | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2338 | #define MX53_PAD_GPIO_7__ESAI1_TX4_RX1 (_MX53_PAD_GPIO_7__ESAI1_TX4_RX1 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2341 | #define MX53_PAD_GPIO_7__ESAI1_TX4_RX1 (_MX53_PAD_GPIO_7__ESAI1_TX4_RX1 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2339 | #define MX53_PAD_GPIO_7__GPIO1_7 (_MX53_PAD_GPIO_7__GPIO1_7 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2342 | #define MX53_PAD_GPIO_7__GPIO1_7 (_MX53_PAD_GPIO_7__GPIO1_7 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| @@ -2356,7 +2359,7 @@ | |||
| 2356 | #define MX53_PAD_GPIO_16__TZIC_PWRFAIL_INT (_MX53_PAD_GPIO_16__TZIC_PWRFAIL_INT | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2359 | #define MX53_PAD_GPIO_16__TZIC_PWRFAIL_INT (_MX53_PAD_GPIO_16__TZIC_PWRFAIL_INT | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2357 | #define MX53_PAD_GPIO_16__RTC_CE_RTC_EXT_TRIG1 (_MX53_PAD_GPIO_16__RTC_CE_RTC_EXT_TRIG1 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2360 | #define MX53_PAD_GPIO_16__RTC_CE_RTC_EXT_TRIG1 (_MX53_PAD_GPIO_16__RTC_CE_RTC_EXT_TRIG1 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2358 | #define MX53_PAD_GPIO_16__SPDIF_IN1 (_MX53_PAD_GPIO_16__SPDIF_IN1 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2361 | #define MX53_PAD_GPIO_16__SPDIF_IN1 (_MX53_PAD_GPIO_16__SPDIF_IN1 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2359 | #define MX53_PAD_GPIO_16__I2C3_SDA (_MX53_PAD_GPIO_16__I2C3_SDA | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2362 | #define MX53_PAD_GPIO_16__I2C3_SDA (_MX53_PAD_GPIO_16__I2C3_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C)) |
| 2360 | #define MX53_PAD_GPIO_16__SJC_DE_B (_MX53_PAD_GPIO_16__SJC_DE_B | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2363 | #define MX53_PAD_GPIO_16__SJC_DE_B (_MX53_PAD_GPIO_16__SJC_DE_B | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2361 | #define MX53_PAD_GPIO_17__ESAI1_TX0 (_MX53_PAD_GPIO_17__ESAI1_TX0 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2364 | #define MX53_PAD_GPIO_17__ESAI1_TX0 (_MX53_PAD_GPIO_17__ESAI1_TX0 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
| 2362 | #define MX53_PAD_GPIO_17__GPIO7_12 (_MX53_PAD_GPIO_17__GPIO7_12 | MUX_PAD_CTRL(NO_PAD_CTRL)) | 2365 | #define MX53_PAD_GPIO_17__GPIO7_12 (_MX53_PAD_GPIO_17__GPIO7_12 | MUX_PAD_CTRL(NO_PAD_CTRL)) |
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 6e6735f04ee3..bb8f4a6b3e37 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig | |||
| @@ -13,6 +13,7 @@ config ARCH_OMAP1 | |||
| 13 | bool "TI OMAP1" | 13 | bool "TI OMAP1" |
| 14 | select CLKDEV_LOOKUP | 14 | select CLKDEV_LOOKUP |
| 15 | select CLKSRC_MMIO | 15 | select CLKSRC_MMIO |
| 16 | select GENERIC_IRQ_CHIP | ||
| 16 | help | 17 | help |
| 17 | "Systems based on omap7xx, omap15xx or omap16xx" | 18 | "Systems based on omap7xx, omap15xx or omap16xx" |
| 18 | 19 | ||
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h index d1c916fcf770..dc562a5c0a8a 100644 --- a/arch/arm/plat-omap/include/plat/dma.h +++ b/arch/arm/plat-omap/include/plat/dma.h | |||
| @@ -195,6 +195,11 @@ | |||
| 195 | 195 | ||
| 196 | #define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */ | 196 | #define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */ |
| 197 | #define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */ | 197 | #define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */ |
| 198 | |||
| 199 | /* Only for AM35xx */ | ||
| 200 | #define AM35XX_DMA_UART4_TX 54 | ||
| 201 | #define AM35XX_DMA_UART4_RX 55 | ||
| 202 | |||
| 198 | /*----------------------------------------------------------------------------*/ | 203 | /*----------------------------------------------------------------------------*/ |
| 199 | 204 | ||
| 200 | #define OMAP1_DMA_TOUT_IRQ (1 << 0) | 205 | #define OMAP1_DMA_TOUT_IRQ (1 << 0) |
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index 926d25c780f3..30e10719b774 100644 --- a/arch/arm/plat-omap/include/plat/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h | |||
| @@ -357,6 +357,7 @@ | |||
| 357 | #define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69 | 357 | #define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69 |
| 358 | #define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70 | 358 | #define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70 |
| 359 | #define INT_35XX_USBOTG_IRQ 71 | 359 | #define INT_35XX_USBOTG_IRQ 71 |
| 360 | #define INT_35XX_UART4 84 | ||
| 360 | #define INT_35XX_CCDC_VD0_IRQ 88 | 361 | #define INT_35XX_CCDC_VD0_IRQ 88 |
| 361 | #define INT_35XX_CCDC_VD1_IRQ 92 | 362 | #define INT_35XX_CCDC_VD1_IRQ 92 |
| 362 | #define INT_35XX_CCDC_VD2_IRQ 93 | 363 | #define INT_35XX_CCDC_VD2_IRQ 93 |
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h index 2723f9166ea2..de3b10c18127 100644 --- a/arch/arm/plat-omap/include/plat/serial.h +++ b/arch/arm/plat-omap/include/plat/serial.h | |||
| @@ -56,6 +56,9 @@ | |||
| 56 | #define TI816X_UART2_BASE 0x48022000 | 56 | #define TI816X_UART2_BASE 0x48022000 |
| 57 | #define TI816X_UART3_BASE 0x48024000 | 57 | #define TI816X_UART3_BASE 0x48024000 |
| 58 | 58 | ||
| 59 | /* AM3505/3517 UART4 */ | ||
| 60 | #define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */ | ||
| 61 | |||
| 59 | /* External port on Zoom2/3 */ | 62 | /* External port on Zoom2/3 */ |
| 60 | #define ZOOM_UART_BASE 0x10000000 | 63 | #define ZOOM_UART_BASE 0x10000000 |
| 61 | #define ZOOM_UART_VIRT 0xfa400000 | 64 | #define ZOOM_UART_VIRT 0xfa400000 |
diff --git a/arch/arm/plat-omap/iovmm.c b/arch/arm/plat-omap/iovmm.c index c60737c49a32..79e7fedb8602 100644 --- a/arch/arm/plat-omap/iovmm.c +++ b/arch/arm/plat-omap/iovmm.c | |||
| @@ -423,9 +423,6 @@ static void sgtable_fill_kmalloc(struct sg_table *sgt, u32 pa, u32 da, | |||
| 423 | { | 423 | { |
| 424 | unsigned int i; | 424 | unsigned int i; |
| 425 | struct scatterlist *sg; | 425 | struct scatterlist *sg; |
| 426 | void *va; | ||
| 427 | |||
| 428 | va = phys_to_virt(pa); | ||
| 429 | 426 | ||
| 430 | for_each_sg(sgt->sgl, sg, sgt->nents, i) { | 427 | for_each_sg(sgt->sgl, sg, sgt->nents, i) { |
| 431 | unsigned bytes; | 428 | unsigned bytes; |
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 3b3776d0a1a7..fff68d0d521b 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types | |||
| @@ -910,7 +910,7 @@ omapl138_case_a3 MACH_OMAPL138_CASE_A3 OMAPL138_CASE_A3 3280 | |||
| 910 | uemd MACH_UEMD UEMD 3281 | 910 | uemd MACH_UEMD UEMD 3281 |
| 911 | ccwmx51mut MACH_CCWMX51MUT CCWMX51MUT 3282 | 911 | ccwmx51mut MACH_CCWMX51MUT CCWMX51MUT 3282 |
| 912 | rockhopper MACH_ROCKHOPPER ROCKHOPPER 3283 | 912 | rockhopper MACH_ROCKHOPPER ROCKHOPPER 3283 |
| 913 | nookcolor MACH_NOOKCOLOR NOOKCOLOR 3284 | 913 | encore MACH_ENCORE ENCORE 3284 |
| 914 | hkdkc100 MACH_HKDKC100 HKDKC100 3285 | 914 | hkdkc100 MACH_HKDKC100 HKDKC100 3285 |
| 915 | ts42xx MACH_TS42XX TS42XX 3286 | 915 | ts42xx MACH_TS42XX TS42XX 3286 |
| 916 | aebl MACH_AEBL AEBL 3287 | 916 | aebl MACH_AEBL AEBL 3287 |
