diff options
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 7 |
4 files changed, 20 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c index 0cdeb6a2e4a0..5dffa27afa45 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | |||
@@ -1207,8 +1207,11 @@ static void dce_v10_0_program_watermarks(struct amdgpu_device *adev, | |||
1207 | u32 tmp, wm_mask, lb_vblank_lead_lines = 0; | 1207 | u32 tmp, wm_mask, lb_vblank_lead_lines = 0; |
1208 | 1208 | ||
1209 | if (amdgpu_crtc->base.enabled && num_heads && mode) { | 1209 | if (amdgpu_crtc->base.enabled && num_heads && mode) { |
1210 | active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; | 1210 | active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000, |
1211 | line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); | 1211 | (u32)mode->clock); |
1212 | line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000, | ||
1213 | (u32)mode->clock); | ||
1214 | line_time = min(line_time, (u32)65535); | ||
1212 | 1215 | ||
1213 | /* watermark for high clocks */ | 1216 | /* watermark for high clocks */ |
1214 | if (adev->pm.dpm_enabled) { | 1217 | if (adev->pm.dpm_enabled) { |
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c index 773654a19749..47bbc87f96d2 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | |||
@@ -1176,8 +1176,11 @@ static void dce_v11_0_program_watermarks(struct amdgpu_device *adev, | |||
1176 | u32 tmp, wm_mask, lb_vblank_lead_lines = 0; | 1176 | u32 tmp, wm_mask, lb_vblank_lead_lines = 0; |
1177 | 1177 | ||
1178 | if (amdgpu_crtc->base.enabled && num_heads && mode) { | 1178 | if (amdgpu_crtc->base.enabled && num_heads && mode) { |
1179 | active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; | 1179 | active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000, |
1180 | line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); | 1180 | (u32)mode->clock); |
1181 | line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000, | ||
1182 | (u32)mode->clock); | ||
1183 | line_time = min(line_time, (u32)65535); | ||
1181 | 1184 | ||
1182 | /* watermark for high clocks */ | 1185 | /* watermark for high clocks */ |
1183 | if (adev->pm.dpm_enabled) { | 1186 | if (adev->pm.dpm_enabled) { |
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c index 1f3552967ba3..d8c9a959493e 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | |||
@@ -983,8 +983,11 @@ static void dce_v6_0_program_watermarks(struct amdgpu_device *adev, | |||
983 | fixed20_12 a, b, c; | 983 | fixed20_12 a, b, c; |
984 | 984 | ||
985 | if (amdgpu_crtc->base.enabled && num_heads && mode) { | 985 | if (amdgpu_crtc->base.enabled && num_heads && mode) { |
986 | active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; | 986 | active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000, |
987 | line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); | 987 | (u32)mode->clock); |
988 | line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000, | ||
989 | (u32)mode->clock); | ||
990 | line_time = min(line_time, (u32)65535); | ||
988 | priority_a_cnt = 0; | 991 | priority_a_cnt = 0; |
989 | priority_b_cnt = 0; | 992 | priority_b_cnt = 0; |
990 | 993 | ||
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c index 3c558c170e5e..db30c6ba563a 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | |||
@@ -1091,8 +1091,11 @@ static void dce_v8_0_program_watermarks(struct amdgpu_device *adev, | |||
1091 | u32 tmp, wm_mask, lb_vblank_lead_lines = 0; | 1091 | u32 tmp, wm_mask, lb_vblank_lead_lines = 0; |
1092 | 1092 | ||
1093 | if (amdgpu_crtc->base.enabled && num_heads && mode) { | 1093 | if (amdgpu_crtc->base.enabled && num_heads && mode) { |
1094 | active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; | 1094 | active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000, |
1095 | line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); | 1095 | (u32)mode->clock); |
1096 | line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000, | ||
1097 | (u32)mode->clock); | ||
1098 | line_time = min(line_time, (u32)65535); | ||
1096 | 1099 | ||
1097 | /* watermark for high clocks */ | 1100 | /* watermark for high clocks */ |
1098 | if (adev->pm.dpm_enabled) { | 1101 | if (adev->pm.dpm_enabled) { |