aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--drivers/nvme/host/pci.c24
1 files changed, 22 insertions, 2 deletions
diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index 73fddf2c99f9..48d3ed3d48d1 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -35,7 +35,6 @@
35 35
36#include "nvme.h" 36#include "nvme.h"
37 37
38#define NVME_Q_DEPTH 1024
39#define SQ_SIZE(depth) (depth * sizeof(struct nvme_command)) 38#define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
40#define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion)) 39#define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
41 40
@@ -57,6 +56,16 @@ module_param(max_host_mem_size_mb, uint, 0444);
57MODULE_PARM_DESC(max_host_mem_size_mb, 56MODULE_PARM_DESC(max_host_mem_size_mb,
58 "Maximum Host Memory Buffer (HMB) size per controller (in MiB)"); 57 "Maximum Host Memory Buffer (HMB) size per controller (in MiB)");
59 58
59static int io_queue_depth_set(const char *val, const struct kernel_param *kp);
60static const struct kernel_param_ops io_queue_depth_ops = {
61 .set = io_queue_depth_set,
62 .get = param_get_int,
63};
64
65static int io_queue_depth = 1024;
66module_param_cb(io_queue_depth, &io_queue_depth_ops, &io_queue_depth, 0644);
67MODULE_PARM_DESC(io_queue_depth, "set io queue depth, should >= 2");
68
60struct nvme_dev; 69struct nvme_dev;
61struct nvme_queue; 70struct nvme_queue;
62 71
@@ -104,6 +113,17 @@ struct nvme_dev {
104 void **host_mem_desc_bufs; 113 void **host_mem_desc_bufs;
105}; 114};
106 115
116static int io_queue_depth_set(const char *val, const struct kernel_param *kp)
117{
118 int n = 0, ret;
119
120 ret = kstrtoint(val, 10, &n);
121 if (ret != 0 || n < 2)
122 return -EINVAL;
123
124 return param_set_int(val, kp);
125}
126
107static inline unsigned int sq_idx(unsigned int qid, u32 stride) 127static inline unsigned int sq_idx(unsigned int qid, u32 stride)
108{ 128{
109 return qid * 2 * stride; 129 return qid * 2 * stride;
@@ -1893,7 +1913,7 @@ static int nvme_pci_enable(struct nvme_dev *dev)
1893 dev->ctrl.cap = lo_hi_readq(dev->bar + NVME_REG_CAP); 1913 dev->ctrl.cap = lo_hi_readq(dev->bar + NVME_REG_CAP);
1894 1914
1895 dev->q_depth = min_t(int, NVME_CAP_MQES(dev->ctrl.cap) + 1, 1915 dev->q_depth = min_t(int, NVME_CAP_MQES(dev->ctrl.cap) + 1,
1896 NVME_Q_DEPTH); 1916 io_queue_depth);
1897 dev->db_stride = 1 << NVME_CAP_STRIDE(dev->ctrl.cap); 1917 dev->db_stride = 1 << NVME_CAP_STRIDE(dev->ctrl.cap);
1898 dev->dbs = dev->bar + 4096; 1918 dev->dbs = dev->bar + 4096;
1899 1919