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-rw-r--r--MAINTAINERS3
-rw-r--r--arch/arm/boot/dts/armada-385-linksys.dtsi4
-rw-r--r--arch/arm/boot/dts/sun4i-a10.dtsi21
-rw-r--r--arch/arm/boot/dts/sun5i-a10s.dtsi11
-rw-r--r--arch/arm/boot/dts/sun5i-r8-chip.dts2
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi13
-rw-r--r--arch/arm/boot/dts/tegra30-beaver.dts3
-rw-r--r--arch/arm/mach-mvebu/Makefile10
-rw-r--r--arch/arm/mach-mvebu/coherency.c23
-rw-r--r--arch/m68k/coldfire/head.S2
-rw-r--r--arch/m68k/coldfire/m5272.c2
-rw-r--r--arch/m68k/coldfire/pci.c2
-rw-r--r--arch/m68k/configs/amiga_defconfig4
-rw-r--r--arch/m68k/configs/apollo_defconfig4
-rw-r--r--arch/m68k/configs/atari_defconfig4
-rw-r--r--arch/m68k/configs/bvme6000_defconfig4
-rw-r--r--arch/m68k/configs/hp300_defconfig4
-rw-r--r--arch/m68k/configs/mac_defconfig4
-rw-r--r--arch/m68k/configs/multi_defconfig4
-rw-r--r--arch/m68k/configs/mvme147_defconfig4
-rw-r--r--arch/m68k/configs/mvme16x_defconfig4
-rw-r--r--arch/m68k/configs/q40_defconfig4
-rw-r--r--arch/m68k/configs/sun3_defconfig4
-rw-r--r--arch/m68k/configs/sun3x_defconfig4
-rw-r--r--arch/m68k/ifpsp060/src/fpsp.S8
-rw-r--r--arch/m68k/ifpsp060/src/pfpsp.S4
-rw-r--r--arch/m68k/include/asm/dma.h2
-rw-r--r--arch/m68k/include/asm/m525xsim.h4
-rw-r--r--arch/m68k/include/asm/mcfmmu.h2
-rw-r--r--arch/m68k/include/asm/q40_master.h2
-rw-r--r--arch/m68k/mac/iop.c2
-rw-r--r--arch/m68k/math-emu/fp_decode.h2
-rw-r--r--crypto/asymmetric_keys/mscode_parser.c7
-rw-r--r--crypto/asymmetric_keys/pkcs7_verify.c2
-rw-r--r--crypto/asymmetric_keys/restrict.c2
-rw-r--r--crypto/rsa-pkcs1pad.c4
-rw-r--r--drivers/acpi/nfit.c11
-rw-r--r--drivers/acpi/utils.c6
-rw-r--r--drivers/ata/libata-core.c6
-rw-r--r--drivers/clk/at91/clk-programmable.c2
-rw-r--r--drivers/clk/sunxi/clk-sun4i-display.c5
-rw-r--r--drivers/clk/sunxi/clk-sun4i-tcon-ch1.c4
-rw-r--r--drivers/crypto/qat/qat_common/Makefile1
-rw-r--r--drivers/gpio/Kconfig7
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c4
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h12
-rw-r--r--drivers/gpu/drm/i915/i915_gem_stolen.c6
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c4
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h21
-rw-r--r--drivers/gpu/drm/i915/intel_csr.c30
-rw-r--r--drivers/gpu/drm/i915/intel_display.c6
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c2
-rw-r--r--drivers/gpu/drm/i915/intel_lrc.c59
-rw-r--r--drivers/gpu/drm/i915/intel_panel.c3
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c64
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c153
-rw-r--r--drivers/input/rmi4/rmi_f12.c9
-rw-r--r--drivers/input/touchscreen/tsc2004.c7
-rw-r--r--drivers/input/touchscreen/tsc2005.c7
-rw-r--r--drivers/input/touchscreen/tsc200x-core.c15
-rw-r--r--drivers/input/touchscreen/tsc200x-core.h2
-rw-r--r--drivers/mmc/card/block.c16
-rw-r--r--drivers/mmc/host/pxamci.c16
-rw-r--r--drivers/nvme/host/core.c74
-rw-r--r--drivers/tty/vt/keyboard.c30
-rw-r--r--sound/core/control.c2
-rw-r--r--sound/core/pcm.c14
-rw-r--r--sound/pci/hda/hda_intel.c6
-rw-r--r--sound/pci/hda/patch_realtek.c15
-rw-r--r--sound/usb/card.c2
70 files changed, 579 insertions, 227 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 1d748377595f..4a728291f568 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1694,8 +1694,6 @@ S: Maintained
1694F: drivers/edac/altera_edac. 1694F: drivers/edac/altera_edac.
1695 1695
1696ARM/STI ARCHITECTURE 1696ARM/STI ARCHITECTURE
1697M: Srinivas Kandagatla <srinivas.kandagatla@gmail.com>
1698M: Maxime Coquelin <maxime.coquelin@st.com>
1699M: Patrice Chotard <patrice.chotard@st.com> 1697M: Patrice Chotard <patrice.chotard@st.com>
1700L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1698L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1701L: kernel@stlinux.com 1699L: kernel@stlinux.com
@@ -1728,6 +1726,7 @@ F: drivers/ata/ahci_st.c
1728 1726
1729ARM/STM32 ARCHITECTURE 1727ARM/STM32 ARCHITECTURE
1730M: Maxime Coquelin <mcoquelin.stm32@gmail.com> 1728M: Maxime Coquelin <mcoquelin.stm32@gmail.com>
1729M: Alexandre Torgue <alexandre.torgue@st.com>
1731L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1730L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1732S: Maintained 1731S: Maintained
1733T: git git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32.git 1732T: git git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32.git
diff --git a/arch/arm/boot/dts/armada-385-linksys.dtsi b/arch/arm/boot/dts/armada-385-linksys.dtsi
index 8450944b28e6..22f7a13e20b4 100644
--- a/arch/arm/boot/dts/armada-385-linksys.dtsi
+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi
@@ -58,8 +58,8 @@
58 soc { 58 soc {
59 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 59 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
60 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 60 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
61 MBUS_ID(0x09, 0x09) 0 0xf1100000 0x10000 61 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
62 MBUS_ID(0x09, 0x05) 0 0xf1110000 0x10000>; 62 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
63 63
64 internal-regs { 64 internal-regs {
65 65
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index a03e56fb5dbc..ca58eb279d55 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -65,8 +65,9 @@
65 compatible = "allwinner,simple-framebuffer", 65 compatible = "allwinner,simple-framebuffer",
66 "simple-framebuffer"; 66 "simple-framebuffer";
67 allwinner,pipeline = "de_be0-lcd0-hdmi"; 67 allwinner,pipeline = "de_be0-lcd0-hdmi";
68 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, 68 clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
69 <&ahb_gates 44>, <&dram_gates 26>; 69 <&ahb_gates 43>, <&ahb_gates 44>,
70 <&dram_gates 26>;
70 status = "disabled"; 71 status = "disabled";
71 }; 72 };
72 73
@@ -74,8 +75,9 @@
74 compatible = "allwinner,simple-framebuffer", 75 compatible = "allwinner,simple-framebuffer",
75 "simple-framebuffer"; 76 "simple-framebuffer";
76 allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi"; 77 allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
77 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, 78 clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
78 <&ahb_gates 44>, <&ahb_gates 46>, 79 <&ahb_gates 43>, <&ahb_gates 44>,
80 <&ahb_gates 46>,
79 <&dram_gates 25>, <&dram_gates 26>; 81 <&dram_gates 25>, <&dram_gates 26>;
80 status = "disabled"; 82 status = "disabled";
81 }; 83 };
@@ -84,9 +86,9 @@
84 compatible = "allwinner,simple-framebuffer", 86 compatible = "allwinner,simple-framebuffer",
85 "simple-framebuffer"; 87 "simple-framebuffer";
86 allwinner,pipeline = "de_fe0-de_be0-lcd0"; 88 allwinner,pipeline = "de_fe0-de_be0-lcd0";
87 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>, 89 clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
88 <&ahb_gates 46>, <&dram_gates 25>, 90 <&ahb_gates 44>, <&ahb_gates 46>,
89 <&dram_gates 26>; 91 <&dram_gates 25>, <&dram_gates 26>;
90 status = "disabled"; 92 status = "disabled";
91 }; 93 };
92 94
@@ -94,8 +96,9 @@
94 compatible = "allwinner,simple-framebuffer", 96 compatible = "allwinner,simple-framebuffer",
95 "simple-framebuffer"; 97 "simple-framebuffer";
96 allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0"; 98 allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0";
97 clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, 99 clocks = <&pll3>, <&pll5 1>, <&ahb_gates 34>,
98 <&ahb_gates 44>, <&ahb_gates 46>, 100 <&ahb_gates 36>, <&ahb_gates 44>,
101 <&ahb_gates 46>,
99 <&dram_gates 5>, <&dram_gates 25>, <&dram_gates 26>; 102 <&dram_gates 5>, <&dram_gates 25>, <&dram_gates 26>;
100 status = "disabled"; 103 status = "disabled";
101 }; 104 };
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index bddd0de88af6..367f33012493 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -65,8 +65,8 @@
65 compatible = "allwinner,simple-framebuffer", 65 compatible = "allwinner,simple-framebuffer",
66 "simple-framebuffer"; 66 "simple-framebuffer";
67 allwinner,pipeline = "de_be0-lcd0-hdmi"; 67 allwinner,pipeline = "de_be0-lcd0-hdmi";
68 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, 68 clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
69 <&ahb_gates 44>; 69 <&ahb_gates 43>, <&ahb_gates 44>;
70 status = "disabled"; 70 status = "disabled";
71 }; 71 };
72 72
@@ -74,7 +74,8 @@
74 compatible = "allwinner,simple-framebuffer", 74 compatible = "allwinner,simple-framebuffer",
75 "simple-framebuffer"; 75 "simple-framebuffer";
76 allwinner,pipeline = "de_be0-lcd0"; 76 allwinner,pipeline = "de_be0-lcd0";
77 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>; 77 clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
78 <&ahb_gates 44>;
78 status = "disabled"; 79 status = "disabled";
79 }; 80 };
80 81
@@ -82,8 +83,8 @@
82 compatible = "allwinner,simple-framebuffer", 83 compatible = "allwinner,simple-framebuffer",
83 "simple-framebuffer"; 84 "simple-framebuffer";
84 allwinner,pipeline = "de_be0-lcd0-tve0"; 85 allwinner,pipeline = "de_be0-lcd0-tve0";
85 clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, 86 clocks = <&pll3>, <&pll5 1>, <&ahb_gates 34>,
86 <&ahb_gates 44>; 87 <&ahb_gates 36>, <&ahb_gates 44>;
87 status = "disabled"; 88 status = "disabled";
88 }; 89 };
89 }; 90 };
diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts
index a8d8b4582397..f694482bdeb6 100644
--- a/arch/arm/boot/dts/sun5i-r8-chip.dts
+++ b/arch/arm/boot/dts/sun5i-r8-chip.dts
@@ -52,7 +52,7 @@
52 52
53/ { 53/ {
54 model = "NextThing C.H.I.P."; 54 model = "NextThing C.H.I.P.";
55 compatible = "nextthing,chip", "allwinner,sun5i-r8"; 55 compatible = "nextthing,chip", "allwinner,sun5i-r8", "allwinner,sun5i-a13";
56 56
57 aliases { 57 aliases {
58 i2c0 = &i2c0; 58 i2c0 = &i2c0;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index febdf4c72fb0..2c34bbbb9570 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -67,8 +67,9 @@
67 compatible = "allwinner,simple-framebuffer", 67 compatible = "allwinner,simple-framebuffer",
68 "simple-framebuffer"; 68 "simple-framebuffer";
69 allwinner,pipeline = "de_be0-lcd0-hdmi"; 69 allwinner,pipeline = "de_be0-lcd0-hdmi";
70 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, 70 clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
71 <&ahb_gates 44>, <&dram_gates 26>; 71 <&ahb_gates 43>, <&ahb_gates 44>,
72 <&dram_gates 26>;
72 status = "disabled"; 73 status = "disabled";
73 }; 74 };
74 75
@@ -76,8 +77,8 @@
76 compatible = "allwinner,simple-framebuffer", 77 compatible = "allwinner,simple-framebuffer",
77 "simple-framebuffer"; 78 "simple-framebuffer";
78 allwinner,pipeline = "de_be0-lcd0"; 79 allwinner,pipeline = "de_be0-lcd0";
79 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>, 80 clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
80 <&dram_gates 26>; 81 <&ahb_gates 44>, <&dram_gates 26>;
81 status = "disabled"; 82 status = "disabled";
82 }; 83 };
83 84
@@ -85,7 +86,7 @@
85 compatible = "allwinner,simple-framebuffer", 86 compatible = "allwinner,simple-framebuffer",
86 "simple-framebuffer"; 87 "simple-framebuffer";
87 allwinner,pipeline = "de_be0-lcd0-tve0"; 88 allwinner,pipeline = "de_be0-lcd0-tve0";
88 clocks = <&pll5 1>, 89 clocks = <&pll3>, <&pll5 1>,
89 <&ahb_gates 34>, <&ahb_gates 36>, <&ahb_gates 44>, 90 <&ahb_gates 34>, <&ahb_gates 36>, <&ahb_gates 44>,
90 <&dram_gates 5>, <&dram_gates 26>; 91 <&dram_gates 5>, <&dram_gates 26>;
91 status = "disabled"; 92 status = "disabled";
@@ -231,6 +232,7 @@
231 pll3x2: pll3x2_clk { 232 pll3x2: pll3x2_clk {
232 #clock-cells = <0>; 233 #clock-cells = <0>;
233 compatible = "fixed-factor-clock"; 234 compatible = "fixed-factor-clock";
235 clocks = <&pll3>;
234 clock-div = <1>; 236 clock-div = <1>;
235 clock-mult = <2>; 237 clock-mult = <2>;
236 clock-output-names = "pll3-2x"; 238 clock-output-names = "pll3-2x";
@@ -272,6 +274,7 @@
272 pll7x2: pll7x2_clk { 274 pll7x2: pll7x2_clk {
273 #clock-cells = <0>; 275 #clock-cells = <0>;
274 compatible = "fixed-factor-clock"; 276 compatible = "fixed-factor-clock";
277 clocks = <&pll7>;
275 clock-div = <1>; 278 clock-div = <1>;
276 clock-mult = <2>; 279 clock-mult = <2>;
277 clock-output-names = "pll7-2x"; 280 clock-output-names = "pll7-2x";
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 1eca3b28ac64..b6da15d823a6 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -1843,7 +1843,7 @@
1843 1843
1844 ldo5_reg: ldo5 { 1844 ldo5_reg: ldo5 {
1845 regulator-name = "vddio_sdmmc,avdd_vdac"; 1845 regulator-name = "vddio_sdmmc,avdd_vdac";
1846 regulator-min-microvolt = <3300000>; 1846 regulator-min-microvolt = <1800000>;
1847 regulator-max-microvolt = <3300000>; 1847 regulator-max-microvolt = <3300000>;
1848 regulator-always-on; 1848 regulator-always-on;
1849 }; 1849 };
@@ -1914,6 +1914,7 @@
1914 1914
1915 sdhci@78000000 { 1915 sdhci@78000000 {
1916 status = "okay"; 1916 status = "okay";
1917 vqmmc-supply = <&ldo5_reg>;
1917 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; 1918 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1918 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>; 1919 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
1919 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>; 1920 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index ecf9e0c3b107..e53c6cfcab51 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -7,9 +7,15 @@ CFLAGS_pmsu.o := -march=armv7-a
7obj-$(CONFIG_MACH_MVEBU_ANY) += system-controller.o mvebu-soc-id.o 7obj-$(CONFIG_MACH_MVEBU_ANY) += system-controller.o mvebu-soc-id.o
8 8
9ifeq ($(CONFIG_MACH_MVEBU_V7),y) 9ifeq ($(CONFIG_MACH_MVEBU_V7),y)
10obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o pmsu_ll.o pm.o pm-board.o 10obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o pmsu_ll.o
11
12obj-$(CONFIG_PM) += pm.o pm-board.o
11obj-$(CONFIG_SMP) += platsmp.o headsmp.o platsmp-a9.o headsmp-a9.o 13obj-$(CONFIG_SMP) += platsmp.o headsmp.o platsmp-a9.o headsmp-a9.o
12endif 14endif
13 15
14obj-$(CONFIG_MACH_DOVE) += dove.o 16obj-$(CONFIG_MACH_DOVE) += dove.o
15obj-$(CONFIG_MACH_KIRKWOOD) += kirkwood.o kirkwood-pm.o 17
18ifeq ($(CONFIG_MACH_KIRKWOOD),y)
19obj-y += kirkwood.o
20obj-$(CONFIG_PM) += kirkwood-pm.o
21endif
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index 7e989d61159c..e80f0dde2189 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -162,22 +162,16 @@ exit:
162} 162}
163 163
164/* 164/*
165 * This ioremap hook is used on Armada 375/38x to ensure that PCIe 165 * This ioremap hook is used on Armada 375/38x to ensure that all MMIO
166 * memory areas are mapped as MT_UNCACHED instead of MT_DEVICE. This 166 * areas are mapped as MT_UNCACHED instead of MT_DEVICE. This is
167 * is needed as a workaround for a deadlock issue between the PCIe 167 * needed for the HW I/O coherency mechanism to work properly without
168 * interface and the cache controller. 168 * deadlock.
169 */ 169 */
170static void __iomem * 170static void __iomem *
171armada_pcie_wa_ioremap_caller(phys_addr_t phys_addr, size_t size, 171armada_wa_ioremap_caller(phys_addr_t phys_addr, size_t size,
172 unsigned int mtype, void *caller) 172 unsigned int mtype, void *caller)
173{ 173{
174 struct resource pcie_mem; 174 mtype = MT_UNCACHED;
175
176 mvebu_mbus_get_pcie_mem_aperture(&pcie_mem);
177
178 if (pcie_mem.start <= phys_addr && (phys_addr + size) <= pcie_mem.end)
179 mtype = MT_UNCACHED;
180
181 return __arm_ioremap_caller(phys_addr, size, mtype, caller); 175 return __arm_ioremap_caller(phys_addr, size, mtype, caller);
182} 176}
183 177
@@ -186,7 +180,8 @@ static void __init armada_375_380_coherency_init(struct device_node *np)
186 struct device_node *cache_dn; 180 struct device_node *cache_dn;
187 181
188 coherency_cpu_base = of_iomap(np, 0); 182 coherency_cpu_base = of_iomap(np, 0);
189 arch_ioremap_caller = armada_pcie_wa_ioremap_caller; 183 arch_ioremap_caller = armada_wa_ioremap_caller;
184 pci_ioremap_set_mem_type(MT_UNCACHED);
190 185
191 /* 186 /*
192 * We should switch the PL310 to I/O coherency mode only if 187 * We should switch the PL310 to I/O coherency mode only if
diff --git a/arch/m68k/coldfire/head.S b/arch/m68k/coldfire/head.S
index fa31be297b85..73d92ea0ce65 100644
--- a/arch/m68k/coldfire/head.S
+++ b/arch/m68k/coldfire/head.S
@@ -288,7 +288,7 @@ _clear_bss:
288#endif 288#endif
289 289
290 /* 290 /*
291 * Assember start up done, start code proper. 291 * Assembler start up done, start code proper.
292 */ 292 */
293 jsr start_kernel /* start Linux kernel */ 293 jsr start_kernel /* start Linux kernel */
294 294
diff --git a/arch/m68k/coldfire/m5272.c b/arch/m68k/coldfire/m5272.c
index c525e4c08f84..9abb1a441da0 100644
--- a/arch/m68k/coldfire/m5272.c
+++ b/arch/m68k/coldfire/m5272.c
@@ -111,7 +111,7 @@ void __init config_BSP(char *commandp, int size)
111/***************************************************************************/ 111/***************************************************************************/
112 112
113/* 113/*
114 * Some 5272 based boards have the FEC ethernet diectly connected to 114 * Some 5272 based boards have the FEC ethernet directly connected to
115 * an ethernet switch. In this case we need to use the fixed phy type, 115 * an ethernet switch. In this case we need to use the fixed phy type,
116 * and we need to declare it early in boot. 116 * and we need to declare it early in boot.
117 */ 117 */
diff --git a/arch/m68k/coldfire/pci.c b/arch/m68k/coldfire/pci.c
index 821de928dc3f..6a640be48568 100644
--- a/arch/m68k/coldfire/pci.c
+++ b/arch/m68k/coldfire/pci.c
@@ -42,7 +42,7 @@ static unsigned long iospace;
42 42
43/* 43/*
44 * We need to be carefull probing on bus 0 (directly connected to host 44 * We need to be carefull probing on bus 0 (directly connected to host
45 * bridge). We should only acccess the well defined possible devices in 45 * bridge). We should only access the well defined possible devices in
46 * use, ignore aliases and the like. 46 * use, ignore aliases and the like.
47 */ 47 */
48static unsigned char mcf_host_slot2sid[32] = { 48static unsigned char mcf_host_slot2sid[32] = {
diff --git a/arch/m68k/configs/amiga_defconfig b/arch/m68k/configs/amiga_defconfig
index 3ee6976f6088..8f5b6f7dd136 100644
--- a/arch/m68k/configs/amiga_defconfig
+++ b/arch/m68k/configs/amiga_defconfig
@@ -9,6 +9,7 @@ CONFIG_LOG_BUF_SHIFT=16
9# CONFIG_PID_NS is not set 9# CONFIG_PID_NS is not set
10# CONFIG_NET_NS is not set 10# CONFIG_NET_NS is not set
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12CONFIG_CC_OPTIMIZE_FOR_SIZE=y
12CONFIG_USERFAULTFD=y 13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
@@ -359,6 +360,7 @@ CONFIG_MACVTAP=m
359CONFIG_IPVLAN=m 360CONFIG_IPVLAN=m
360CONFIG_VXLAN=m 361CONFIG_VXLAN=m
361CONFIG_GENEVE=m 362CONFIG_GENEVE=m
363CONFIG_GTP=m
362CONFIG_MACSEC=m 364CONFIG_MACSEC=m
363CONFIG_NETCONSOLE=m 365CONFIG_NETCONSOLE=m
364CONFIG_NETCONSOLE_DYNAMIC=y 366CONFIG_NETCONSOLE_DYNAMIC=y
@@ -553,7 +555,9 @@ CONFIG_TEST_STRING_HELPERS=m
553CONFIG_TEST_KSTRTOX=m 555CONFIG_TEST_KSTRTOX=m
554CONFIG_TEST_PRINTF=m 556CONFIG_TEST_PRINTF=m
555CONFIG_TEST_BITMAP=m 557CONFIG_TEST_BITMAP=m
558CONFIG_TEST_UUID=m
556CONFIG_TEST_RHASHTABLE=m 559CONFIG_TEST_RHASHTABLE=m
560CONFIG_TEST_HASH=m
557CONFIG_TEST_LKM=m 561CONFIG_TEST_LKM=m
558CONFIG_TEST_USER_COPY=m 562CONFIG_TEST_USER_COPY=m
559CONFIG_TEST_BPF=m 563CONFIG_TEST_BPF=m
diff --git a/arch/m68k/configs/apollo_defconfig b/arch/m68k/configs/apollo_defconfig
index e96787ffcbce..31bded9c83d4 100644
--- a/arch/m68k/configs/apollo_defconfig
+++ b/arch/m68k/configs/apollo_defconfig
@@ -9,6 +9,7 @@ CONFIG_LOG_BUF_SHIFT=16
9# CONFIG_PID_NS is not set 9# CONFIG_PID_NS is not set
10# CONFIG_NET_NS is not set 10# CONFIG_NET_NS is not set
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12CONFIG_CC_OPTIMIZE_FOR_SIZE=y
12CONFIG_USERFAULTFD=y 13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
@@ -341,6 +342,7 @@ CONFIG_MACVTAP=m
341CONFIG_IPVLAN=m 342CONFIG_IPVLAN=m
342CONFIG_VXLAN=m 343CONFIG_VXLAN=m
343CONFIG_GENEVE=m 344CONFIG_GENEVE=m
345CONFIG_GTP=m
344CONFIG_MACSEC=m 346CONFIG_MACSEC=m
345CONFIG_NETCONSOLE=m 347CONFIG_NETCONSOLE=m
346CONFIG_NETCONSOLE_DYNAMIC=y 348CONFIG_NETCONSOLE_DYNAMIC=y
@@ -512,7 +514,9 @@ CONFIG_TEST_STRING_HELPERS=m
512CONFIG_TEST_KSTRTOX=m 514CONFIG_TEST_KSTRTOX=m
513CONFIG_TEST_PRINTF=m 515CONFIG_TEST_PRINTF=m
514CONFIG_TEST_BITMAP=m 516CONFIG_TEST_BITMAP=m
517CONFIG_TEST_UUID=m
515CONFIG_TEST_RHASHTABLE=m 518CONFIG_TEST_RHASHTABLE=m
519CONFIG_TEST_HASH=m
516CONFIG_TEST_LKM=m 520CONFIG_TEST_LKM=m
517CONFIG_TEST_USER_COPY=m 521CONFIG_TEST_USER_COPY=m
518CONFIG_TEST_BPF=m 522CONFIG_TEST_BPF=m
diff --git a/arch/m68k/configs/atari_defconfig b/arch/m68k/configs/atari_defconfig
index 083fe6beac14..0d7739e04ae2 100644
--- a/arch/m68k/configs/atari_defconfig
+++ b/arch/m68k/configs/atari_defconfig
@@ -9,6 +9,7 @@ CONFIG_LOG_BUF_SHIFT=16
9# CONFIG_PID_NS is not set 9# CONFIG_PID_NS is not set
10# CONFIG_NET_NS is not set 10# CONFIG_NET_NS is not set
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12CONFIG_CC_OPTIMIZE_FOR_SIZE=y
12CONFIG_USERFAULTFD=y 13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
@@ -350,6 +351,7 @@ CONFIG_MACVTAP=m
350CONFIG_IPVLAN=m 351CONFIG_IPVLAN=m
351CONFIG_VXLAN=m 352CONFIG_VXLAN=m
352CONFIG_GENEVE=m 353CONFIG_GENEVE=m
354CONFIG_GTP=m
353CONFIG_MACSEC=m 355CONFIG_MACSEC=m
354CONFIG_NETCONSOLE=m 356CONFIG_NETCONSOLE=m
355CONFIG_NETCONSOLE_DYNAMIC=y 357CONFIG_NETCONSOLE_DYNAMIC=y
@@ -533,7 +535,9 @@ CONFIG_TEST_STRING_HELPERS=m
533CONFIG_TEST_KSTRTOX=m 535CONFIG_TEST_KSTRTOX=m
534CONFIG_TEST_PRINTF=m 536CONFIG_TEST_PRINTF=m
535CONFIG_TEST_BITMAP=m 537CONFIG_TEST_BITMAP=m
538CONFIG_TEST_UUID=m
536CONFIG_TEST_RHASHTABLE=m 539CONFIG_TEST_RHASHTABLE=m
540CONFIG_TEST_HASH=m
537CONFIG_TEST_LKM=m 541CONFIG_TEST_LKM=m
538CONFIG_TEST_USER_COPY=m 542CONFIG_TEST_USER_COPY=m
539CONFIG_TEST_BPF=m 543CONFIG_TEST_BPF=m
diff --git a/arch/m68k/configs/bvme6000_defconfig b/arch/m68k/configs/bvme6000_defconfig
index 475130c06dcb..2cbb5c465fec 100644
--- a/arch/m68k/configs/bvme6000_defconfig
+++ b/arch/m68k/configs/bvme6000_defconfig
@@ -9,6 +9,7 @@ CONFIG_LOG_BUF_SHIFT=16
9# CONFIG_PID_NS is not set 9# CONFIG_PID_NS is not set
10# CONFIG_NET_NS is not set 10# CONFIG_NET_NS is not set
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12CONFIG_CC_OPTIMIZE_FOR_SIZE=y
12CONFIG_USERFAULTFD=y 13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
@@ -340,6 +341,7 @@ CONFIG_MACVTAP=m
340CONFIG_IPVLAN=m 341CONFIG_IPVLAN=m
341CONFIG_VXLAN=m 342CONFIG_VXLAN=m
342CONFIG_GENEVE=m 343CONFIG_GENEVE=m
344CONFIG_GTP=m
343CONFIG_MACSEC=m 345CONFIG_MACSEC=m
344CONFIG_NETCONSOLE=m 346CONFIG_NETCONSOLE=m
345CONFIG_NETCONSOLE_DYNAMIC=y 347CONFIG_NETCONSOLE_DYNAMIC=y
@@ -504,7 +506,9 @@ CONFIG_TEST_STRING_HELPERS=m
504CONFIG_TEST_KSTRTOX=m 506CONFIG_TEST_KSTRTOX=m
505CONFIG_TEST_PRINTF=m 507CONFIG_TEST_PRINTF=m
506CONFIG_TEST_BITMAP=m 508CONFIG_TEST_BITMAP=m
509CONFIG_TEST_UUID=m
507CONFIG_TEST_RHASHTABLE=m 510CONFIG_TEST_RHASHTABLE=m
511CONFIG_TEST_HASH=m
508CONFIG_TEST_LKM=m 512CONFIG_TEST_LKM=m
509CONFIG_TEST_USER_COPY=m 513CONFIG_TEST_USER_COPY=m
510CONFIG_TEST_BPF=m 514CONFIG_TEST_BPF=m
diff --git a/arch/m68k/configs/hp300_defconfig b/arch/m68k/configs/hp300_defconfig
index 4339658c200f..96102a42c156 100644
--- a/arch/m68k/configs/hp300_defconfig
+++ b/arch/m68k/configs/hp300_defconfig
@@ -9,6 +9,7 @@ CONFIG_LOG_BUF_SHIFT=16
9# CONFIG_PID_NS is not set 9# CONFIG_PID_NS is not set
10# CONFIG_NET_NS is not set 10# CONFIG_NET_NS is not set
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12CONFIG_CC_OPTIMIZE_FOR_SIZE=y
12CONFIG_USERFAULTFD=y 13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
@@ -341,6 +342,7 @@ CONFIG_MACVTAP=m
341CONFIG_IPVLAN=m 342CONFIG_IPVLAN=m
342CONFIG_VXLAN=m 343CONFIG_VXLAN=m
343CONFIG_GENEVE=m 344CONFIG_GENEVE=m
345CONFIG_GTP=m
344CONFIG_MACSEC=m 346CONFIG_MACSEC=m
345CONFIG_NETCONSOLE=m 347CONFIG_NETCONSOLE=m
346CONFIG_NETCONSOLE_DYNAMIC=y 348CONFIG_NETCONSOLE_DYNAMIC=y
@@ -514,7 +516,9 @@ CONFIG_TEST_STRING_HELPERS=m
514CONFIG_TEST_KSTRTOX=m 516CONFIG_TEST_KSTRTOX=m
515CONFIG_TEST_PRINTF=m 517CONFIG_TEST_PRINTF=m
516CONFIG_TEST_BITMAP=m 518CONFIG_TEST_BITMAP=m
519CONFIG_TEST_UUID=m
517CONFIG_TEST_RHASHTABLE=m 520CONFIG_TEST_RHASHTABLE=m
521CONFIG_TEST_HASH=m
518CONFIG_TEST_LKM=m 522CONFIG_TEST_LKM=m
519CONFIG_TEST_USER_COPY=m 523CONFIG_TEST_USER_COPY=m
520CONFIG_TEST_BPF=m 524CONFIG_TEST_BPF=m
diff --git a/arch/m68k/configs/mac_defconfig b/arch/m68k/configs/mac_defconfig
index 831cc8c3a2e2..97d88f7dc5a7 100644
--- a/arch/m68k/configs/mac_defconfig
+++ b/arch/m68k/configs/mac_defconfig
@@ -9,6 +9,7 @@ CONFIG_LOG_BUF_SHIFT=16
9# CONFIG_PID_NS is not set 9# CONFIG_PID_NS is not set
10# CONFIG_NET_NS is not set 10# CONFIG_NET_NS is not set
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12CONFIG_CC_OPTIMIZE_FOR_SIZE=y
12CONFIG_USERFAULTFD=y 13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
@@ -357,6 +358,7 @@ CONFIG_MACVTAP=m
357CONFIG_IPVLAN=m 358CONFIG_IPVLAN=m
358CONFIG_VXLAN=m 359CONFIG_VXLAN=m
359CONFIG_GENEVE=m 360CONFIG_GENEVE=m
361CONFIG_GTP=m
360CONFIG_MACSEC=m 362CONFIG_MACSEC=m
361CONFIG_NETCONSOLE=m 363CONFIG_NETCONSOLE=m
362CONFIG_NETCONSOLE_DYNAMIC=y 364CONFIG_NETCONSOLE_DYNAMIC=y
@@ -536,7 +538,9 @@ CONFIG_TEST_STRING_HELPERS=m
536CONFIG_TEST_KSTRTOX=m 538CONFIG_TEST_KSTRTOX=m
537CONFIG_TEST_PRINTF=m 539CONFIG_TEST_PRINTF=m
538CONFIG_TEST_BITMAP=m 540CONFIG_TEST_BITMAP=m
541CONFIG_TEST_UUID=m
539CONFIG_TEST_RHASHTABLE=m 542CONFIG_TEST_RHASHTABLE=m
543CONFIG_TEST_HASH=m
540CONFIG_TEST_LKM=m 544CONFIG_TEST_LKM=m
541CONFIG_TEST_USER_COPY=m 545CONFIG_TEST_USER_COPY=m
542CONFIG_TEST_BPF=m 546CONFIG_TEST_BPF=m
diff --git a/arch/m68k/configs/multi_defconfig b/arch/m68k/configs/multi_defconfig
index 6377afeb522b..be25ef208f0f 100644
--- a/arch/m68k/configs/multi_defconfig
+++ b/arch/m68k/configs/multi_defconfig
@@ -9,6 +9,7 @@ CONFIG_LOG_BUF_SHIFT=16
9# CONFIG_PID_NS is not set 9# CONFIG_PID_NS is not set
10# CONFIG_NET_NS is not set 10# CONFIG_NET_NS is not set
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12CONFIG_CC_OPTIMIZE_FOR_SIZE=y
12CONFIG_USERFAULTFD=y 13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
@@ -390,6 +391,7 @@ CONFIG_MACVTAP=m
390CONFIG_IPVLAN=m 391CONFIG_IPVLAN=m
391CONFIG_VXLAN=m 392CONFIG_VXLAN=m
392CONFIG_GENEVE=m 393CONFIG_GENEVE=m
394CONFIG_GTP=m
393CONFIG_MACSEC=m 395CONFIG_MACSEC=m
394CONFIG_NETCONSOLE=m 396CONFIG_NETCONSOLE=m
395CONFIG_NETCONSOLE_DYNAMIC=y 397CONFIG_NETCONSOLE_DYNAMIC=y
@@ -616,7 +618,9 @@ CONFIG_TEST_STRING_HELPERS=m
616CONFIG_TEST_KSTRTOX=m 618CONFIG_TEST_KSTRTOX=m
617CONFIG_TEST_PRINTF=m 619CONFIG_TEST_PRINTF=m
618CONFIG_TEST_BITMAP=m 620CONFIG_TEST_BITMAP=m
621CONFIG_TEST_UUID=m
619CONFIG_TEST_RHASHTABLE=m 622CONFIG_TEST_RHASHTABLE=m
623CONFIG_TEST_HASH=m
620CONFIG_TEST_LKM=m 624CONFIG_TEST_LKM=m
621CONFIG_TEST_USER_COPY=m 625CONFIG_TEST_USER_COPY=m
622CONFIG_TEST_BPF=m 626CONFIG_TEST_BPF=m
diff --git a/arch/m68k/configs/mvme147_defconfig b/arch/m68k/configs/mvme147_defconfig
index 4304b3d56262..a008344360c9 100644
--- a/arch/m68k/configs/mvme147_defconfig
+++ b/arch/m68k/configs/mvme147_defconfig
@@ -9,6 +9,7 @@ CONFIG_LOG_BUF_SHIFT=16
9# CONFIG_PID_NS is not set 9# CONFIG_PID_NS is not set
10# CONFIG_NET_NS is not set 10# CONFIG_NET_NS is not set
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12CONFIG_CC_OPTIMIZE_FOR_SIZE=y
12CONFIG_USERFAULTFD=y 13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
@@ -339,6 +340,7 @@ CONFIG_MACVTAP=m
339CONFIG_IPVLAN=m 340CONFIG_IPVLAN=m
340CONFIG_VXLAN=m 341CONFIG_VXLAN=m
341CONFIG_GENEVE=m 342CONFIG_GENEVE=m
343CONFIG_GTP=m
342CONFIG_MACSEC=m 344CONFIG_MACSEC=m
343CONFIG_NETCONSOLE=m 345CONFIG_NETCONSOLE=m
344CONFIG_NETCONSOLE_DYNAMIC=y 346CONFIG_NETCONSOLE_DYNAMIC=y
@@ -504,7 +506,9 @@ CONFIG_TEST_STRING_HELPERS=m
504CONFIG_TEST_KSTRTOX=m 506CONFIG_TEST_KSTRTOX=m
505CONFIG_TEST_PRINTF=m 507CONFIG_TEST_PRINTF=m
506CONFIG_TEST_BITMAP=m 508CONFIG_TEST_BITMAP=m
509CONFIG_TEST_UUID=m
507CONFIG_TEST_RHASHTABLE=m 510CONFIG_TEST_RHASHTABLE=m
511CONFIG_TEST_HASH=m
508CONFIG_TEST_LKM=m 512CONFIG_TEST_LKM=m
509CONFIG_TEST_USER_COPY=m 513CONFIG_TEST_USER_COPY=m
510CONFIG_TEST_BPF=m 514CONFIG_TEST_BPF=m
diff --git a/arch/m68k/configs/mvme16x_defconfig b/arch/m68k/configs/mvme16x_defconfig
index 074bda4094ff..6735a25f36d4 100644
--- a/arch/m68k/configs/mvme16x_defconfig
+++ b/arch/m68k/configs/mvme16x_defconfig
@@ -9,6 +9,7 @@ CONFIG_LOG_BUF_SHIFT=16
9# CONFIG_PID_NS is not set 9# CONFIG_PID_NS is not set
10# CONFIG_NET_NS is not set 10# CONFIG_NET_NS is not set
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12CONFIG_CC_OPTIMIZE_FOR_SIZE=y
12CONFIG_USERFAULTFD=y 13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
@@ -340,6 +341,7 @@ CONFIG_MACVTAP=m
340CONFIG_IPVLAN=m 341CONFIG_IPVLAN=m
341CONFIG_VXLAN=m 342CONFIG_VXLAN=m
342CONFIG_GENEVE=m 343CONFIG_GENEVE=m
344CONFIG_GTP=m
343CONFIG_MACSEC=m 345CONFIG_MACSEC=m
344CONFIG_NETCONSOLE=m 346CONFIG_NETCONSOLE=m
345CONFIG_NETCONSOLE_DYNAMIC=y 347CONFIG_NETCONSOLE_DYNAMIC=y
@@ -504,7 +506,9 @@ CONFIG_TEST_STRING_HELPERS=m
504CONFIG_TEST_KSTRTOX=m 506CONFIG_TEST_KSTRTOX=m
505CONFIG_TEST_PRINTF=m 507CONFIG_TEST_PRINTF=m
506CONFIG_TEST_BITMAP=m 508CONFIG_TEST_BITMAP=m
509CONFIG_TEST_UUID=m
507CONFIG_TEST_RHASHTABLE=m 510CONFIG_TEST_RHASHTABLE=m
511CONFIG_TEST_HASH=m
508CONFIG_TEST_LKM=m 512CONFIG_TEST_LKM=m
509CONFIG_TEST_USER_COPY=m 513CONFIG_TEST_USER_COPY=m
510CONFIG_TEST_BPF=m 514CONFIG_TEST_BPF=m
diff --git a/arch/m68k/configs/q40_defconfig b/arch/m68k/configs/q40_defconfig
index 07b9fa8d7f2e..780c6e9f6cf9 100644
--- a/arch/m68k/configs/q40_defconfig
+++ b/arch/m68k/configs/q40_defconfig
@@ -9,6 +9,7 @@ CONFIG_LOG_BUF_SHIFT=16
9# CONFIG_PID_NS is not set 9# CONFIG_PID_NS is not set
10# CONFIG_NET_NS is not set 10# CONFIG_NET_NS is not set
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12CONFIG_CC_OPTIMIZE_FOR_SIZE=y
12CONFIG_USERFAULTFD=y 13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
@@ -346,6 +347,7 @@ CONFIG_MACVTAP=m
346CONFIG_IPVLAN=m 347CONFIG_IPVLAN=m
347CONFIG_VXLAN=m 348CONFIG_VXLAN=m
348CONFIG_GENEVE=m 349CONFIG_GENEVE=m
350CONFIG_GTP=m
349CONFIG_MACSEC=m 351CONFIG_MACSEC=m
350CONFIG_NETCONSOLE=m 352CONFIG_NETCONSOLE=m
351CONFIG_NETCONSOLE_DYNAMIC=y 353CONFIG_NETCONSOLE_DYNAMIC=y
@@ -527,7 +529,9 @@ CONFIG_TEST_STRING_HELPERS=m
527CONFIG_TEST_KSTRTOX=m 529CONFIG_TEST_KSTRTOX=m
528CONFIG_TEST_PRINTF=m 530CONFIG_TEST_PRINTF=m
529CONFIG_TEST_BITMAP=m 531CONFIG_TEST_BITMAP=m
532CONFIG_TEST_UUID=m
530CONFIG_TEST_RHASHTABLE=m 533CONFIG_TEST_RHASHTABLE=m
534CONFIG_TEST_HASH=m
531CONFIG_TEST_LKM=m 535CONFIG_TEST_LKM=m
532CONFIG_TEST_USER_COPY=m 536CONFIG_TEST_USER_COPY=m
533CONFIG_TEST_BPF=m 537CONFIG_TEST_BPF=m
diff --git a/arch/m68k/configs/sun3_defconfig b/arch/m68k/configs/sun3_defconfig
index 36e6fae02d45..44693cf361e5 100644
--- a/arch/m68k/configs/sun3_defconfig
+++ b/arch/m68k/configs/sun3_defconfig
@@ -9,6 +9,7 @@ CONFIG_LOG_BUF_SHIFT=16
9# CONFIG_PID_NS is not set 9# CONFIG_PID_NS is not set
10# CONFIG_NET_NS is not set 10# CONFIG_NET_NS is not set
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12CONFIG_CC_OPTIMIZE_FOR_SIZE=y
12CONFIG_USERFAULTFD=y 13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
@@ -337,6 +338,7 @@ CONFIG_MACVTAP=m
337CONFIG_IPVLAN=m 338CONFIG_IPVLAN=m
338CONFIG_VXLAN=m 339CONFIG_VXLAN=m
339CONFIG_GENEVE=m 340CONFIG_GENEVE=m
341CONFIG_GTP=m
340CONFIG_MACSEC=m 342CONFIG_MACSEC=m
341CONFIG_NETCONSOLE=m 343CONFIG_NETCONSOLE=m
342CONFIG_NETCONSOLE_DYNAMIC=y 344CONFIG_NETCONSOLE_DYNAMIC=y
@@ -506,7 +508,9 @@ CONFIG_TEST_STRING_HELPERS=m
506CONFIG_TEST_KSTRTOX=m 508CONFIG_TEST_KSTRTOX=m
507CONFIG_TEST_PRINTF=m 509CONFIG_TEST_PRINTF=m
508CONFIG_TEST_BITMAP=m 510CONFIG_TEST_BITMAP=m
511CONFIG_TEST_UUID=m
509CONFIG_TEST_RHASHTABLE=m 512CONFIG_TEST_RHASHTABLE=m
513CONFIG_TEST_HASH=m
510CONFIG_TEST_LKM=m 514CONFIG_TEST_LKM=m
511CONFIG_TEST_USER_COPY=m 515CONFIG_TEST_USER_COPY=m
512CONFIG_TEST_BPF=m 516CONFIG_TEST_BPF=m
diff --git a/arch/m68k/configs/sun3x_defconfig b/arch/m68k/configs/sun3x_defconfig
index 903acf929511..ef0071d61158 100644
--- a/arch/m68k/configs/sun3x_defconfig
+++ b/arch/m68k/configs/sun3x_defconfig
@@ -9,6 +9,7 @@ CONFIG_LOG_BUF_SHIFT=16
9# CONFIG_PID_NS is not set 9# CONFIG_PID_NS is not set
10# CONFIG_NET_NS is not set 10# CONFIG_NET_NS is not set
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12CONFIG_CC_OPTIMIZE_FOR_SIZE=y
12CONFIG_USERFAULTFD=y 13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
@@ -337,6 +338,7 @@ CONFIG_MACVTAP=m
337CONFIG_IPVLAN=m 338CONFIG_IPVLAN=m
338CONFIG_VXLAN=m 339CONFIG_VXLAN=m
339CONFIG_GENEVE=m 340CONFIG_GENEVE=m
341CONFIG_GTP=m
340CONFIG_MACSEC=m 342CONFIG_MACSEC=m
341CONFIG_NETCONSOLE=m 343CONFIG_NETCONSOLE=m
342CONFIG_NETCONSOLE_DYNAMIC=y 344CONFIG_NETCONSOLE_DYNAMIC=y
@@ -506,7 +508,9 @@ CONFIG_TEST_STRING_HELPERS=m
506CONFIG_TEST_KSTRTOX=m 508CONFIG_TEST_KSTRTOX=m
507CONFIG_TEST_PRINTF=m 509CONFIG_TEST_PRINTF=m
508CONFIG_TEST_BITMAP=m 510CONFIG_TEST_BITMAP=m
511CONFIG_TEST_UUID=m
509CONFIG_TEST_RHASHTABLE=m 512CONFIG_TEST_RHASHTABLE=m
513CONFIG_TEST_HASH=m
510CONFIG_TEST_LKM=m 514CONFIG_TEST_LKM=m
511CONFIG_TEST_USER_COPY=m 515CONFIG_TEST_USER_COPY=m
512CONFIG_TEST_BPF=m 516CONFIG_TEST_BPF=m
diff --git a/arch/m68k/ifpsp060/src/fpsp.S b/arch/m68k/ifpsp060/src/fpsp.S
index 78cb60f5bb4d..9bbffebe3eb5 100644
--- a/arch/m68k/ifpsp060/src/fpsp.S
+++ b/arch/m68k/ifpsp060/src/fpsp.S
@@ -10191,7 +10191,7 @@ xdnrm_con:
10191xdnrm_sd: 10191xdnrm_sd:
10192 mov.l %a1,-(%sp) 10192 mov.l %a1,-(%sp)
10193 tst.b LOCAL_EX(%a0) # is denorm pos or neg? 10193 tst.b LOCAL_EX(%a0) # is denorm pos or neg?
10194 smi.b %d1 # set d0 accodingly 10194 smi.b %d1 # set d0 accordingly
10195 bsr.l unf_sub 10195 bsr.l unf_sub
10196 mov.l (%sp)+,%a1 10196 mov.l (%sp)+,%a1
10197xdnrm_exit: 10197xdnrm_exit:
@@ -10990,7 +10990,7 @@ src_qnan_m:
10990# routines where an instruction is selected by an index into 10990# routines where an instruction is selected by an index into
10991# a large jump table corresponding to a given instruction which 10991# a large jump table corresponding to a given instruction which
10992# has been decoded. Flow continues here where we now decode 10992# has been decoded. Flow continues here where we now decode
10993# further accoding to the source operand type. 10993# further according to the source operand type.
10994# 10994#
10995 10995
10996 global fsinh 10996 global fsinh
@@ -23196,14 +23196,14 @@ m_sign:
23196# 23196#
23197# 1. Branch on the sign of the adjusted exponent. 23197# 1. Branch on the sign of the adjusted exponent.
23198# 2p.(positive exp) 23198# 2p.(positive exp)
23199# 2. Check M16 and the digits in lwords 2 and 3 in decending order. 23199# 2. Check M16 and the digits in lwords 2 and 3 in descending order.
23200# 3. Add one for each zero encountered until a non-zero digit. 23200# 3. Add one for each zero encountered until a non-zero digit.
23201# 4. Subtract the count from the exp. 23201# 4. Subtract the count from the exp.
23202# 5. Check if the exp has crossed zero in #3 above; make the exp abs 23202# 5. Check if the exp has crossed zero in #3 above; make the exp abs
23203# and set SE. 23203# and set SE.
23204# 6. Multiply the mantissa by 10**count. 23204# 6. Multiply the mantissa by 10**count.
23205# 2n.(negative exp) 23205# 2n.(negative exp)
23206# 2. Check the digits in lwords 3 and 2 in decending order. 23206# 2. Check the digits in lwords 3 and 2 in descending order.
23207# 3. Add one for each zero encountered until a non-zero digit. 23207# 3. Add one for each zero encountered until a non-zero digit.
23208# 4. Add the count to the exp. 23208# 4. Add the count to the exp.
23209# 5. Check if the exp has crossed zero in #3 above; clear SE. 23209# 5. Check if the exp has crossed zero in #3 above; clear SE.
diff --git a/arch/m68k/ifpsp060/src/pfpsp.S b/arch/m68k/ifpsp060/src/pfpsp.S
index 4aedef973cf6..3535e6c87eec 100644
--- a/arch/m68k/ifpsp060/src/pfpsp.S
+++ b/arch/m68k/ifpsp060/src/pfpsp.S
@@ -13156,14 +13156,14 @@ m_sign:
13156# 13156#
13157# 1. Branch on the sign of the adjusted exponent. 13157# 1. Branch on the sign of the adjusted exponent.
13158# 2p.(positive exp) 13158# 2p.(positive exp)
13159# 2. Check M16 and the digits in lwords 2 and 3 in decending order. 13159# 2. Check M16 and the digits in lwords 2 and 3 in descending order.
13160# 3. Add one for each zero encountered until a non-zero digit. 13160# 3. Add one for each zero encountered until a non-zero digit.
13161# 4. Subtract the count from the exp. 13161# 4. Subtract the count from the exp.
13162# 5. Check if the exp has crossed zero in #3 above; make the exp abs 13162# 5. Check if the exp has crossed zero in #3 above; make the exp abs
13163# and set SE. 13163# and set SE.
13164# 6. Multiply the mantissa by 10**count. 13164# 6. Multiply the mantissa by 10**count.
13165# 2n.(negative exp) 13165# 2n.(negative exp)
13166# 2. Check the digits in lwords 3 and 2 in decending order. 13166# 2. Check the digits in lwords 3 and 2 in descending order.
13167# 3. Add one for each zero encountered until a non-zero digit. 13167# 3. Add one for each zero encountered until a non-zero digit.
13168# 4. Add the count to the exp. 13168# 4. Add the count to the exp.
13169# 5. Check if the exp has crossed zero in #3 above; clear SE. 13169# 5. Check if the exp has crossed zero in #3 above; clear SE.
diff --git a/arch/m68k/include/asm/dma.h b/arch/m68k/include/asm/dma.h
index 429fe26e320c..208b4daa14b3 100644
--- a/arch/m68k/include/asm/dma.h
+++ b/arch/m68k/include/asm/dma.h
@@ -18,7 +18,7 @@
18 * AUG/22/2000 : added support for 32-bit Dual-Address-Mode (K) 2000 18 * AUG/22/2000 : added support for 32-bit Dual-Address-Mode (K) 2000
19 * Oliver Kamphenkel (O.Kamphenkel@tu-bs.de) 19 * Oliver Kamphenkel (O.Kamphenkel@tu-bs.de)
20 * 20 *
21 * AUG/25/2000 : addad support for 8, 16 and 32-bit Single-Address-Mode (K)2000 21 * AUG/25/2000 : added support for 8, 16 and 32-bit Single-Address-Mode (K)2000
22 * Oliver Kamphenkel (O.Kamphenkel@tu-bs.de) 22 * Oliver Kamphenkel (O.Kamphenkel@tu-bs.de)
23 * 23 *
24 * APR/18/2002 : added proper support for MCF5272 DMA controller. 24 * APR/18/2002 : added proper support for MCF5272 DMA controller.
diff --git a/arch/m68k/include/asm/m525xsim.h b/arch/m68k/include/asm/m525xsim.h
index f186459072e9..699f20c8a0fe 100644
--- a/arch/m68k/include/asm/m525xsim.h
+++ b/arch/m68k/include/asm/m525xsim.h
@@ -123,10 +123,10 @@
123/* 123/*
124 * I2C module. 124 * I2C module.
125 */ 125 */
126#define MCFI2C_BASE0 (MCF_MBAR + 0x280) /* Base addreess I2C0 */ 126#define MCFI2C_BASE0 (MCF_MBAR + 0x280) /* Base address I2C0 */
127#define MCFI2C_SIZE0 0x20 /* Register set size */ 127#define MCFI2C_SIZE0 0x20 /* Register set size */
128 128
129#define MCFI2C_BASE1 (MCF_MBAR2 + 0x440) /* Base addreess I2C1 */ 129#define MCFI2C_BASE1 (MCF_MBAR2 + 0x440) /* Base address I2C1 */
130#define MCFI2C_SIZE1 0x20 /* Register set size */ 130#define MCFI2C_SIZE1 0x20 /* Register set size */
131 131
132/* 132/*
diff --git a/arch/m68k/include/asm/mcfmmu.h b/arch/m68k/include/asm/mcfmmu.h
index 26cc3d5a63f8..8824236e303f 100644
--- a/arch/m68k/include/asm/mcfmmu.h
+++ b/arch/m68k/include/asm/mcfmmu.h
@@ -38,7 +38,7 @@
38/* 38/*
39 * MMU Operation register. 39 * MMU Operation register.
40 */ 40 */
41#define MMUOR_UAA 0x00000001 /* Update allocatiom address */ 41#define MMUOR_UAA 0x00000001 /* Update allocation address */
42#define MMUOR_ACC 0x00000002 /* TLB access */ 42#define MMUOR_ACC 0x00000002 /* TLB access */
43#define MMUOR_RD 0x00000004 /* TLB access read */ 43#define MMUOR_RD 0x00000004 /* TLB access read */
44#define MMUOR_WR 0x00000000 /* TLB access write */ 44#define MMUOR_WR 0x00000000 /* TLB access write */
diff --git a/arch/m68k/include/asm/q40_master.h b/arch/m68k/include/asm/q40_master.h
index fc5b36278d04..c48d21b68f04 100644
--- a/arch/m68k/include/asm/q40_master.h
+++ b/arch/m68k/include/asm/q40_master.h
@@ -1,6 +1,6 @@
1/* 1/*
2 * Q40 master Chip Control 2 * Q40 master Chip Control
3 * RTC stuff merged for compactnes.. 3 * RTC stuff merged for compactness.
4*/ 4*/
5 5
6#ifndef _Q40_MASTER_H 6#ifndef _Q40_MASTER_H
diff --git a/arch/m68k/mac/iop.c b/arch/m68k/mac/iop.c
index 4d2adfb32a2a..7990b6f50105 100644
--- a/arch/m68k/mac/iop.c
+++ b/arch/m68k/mac/iop.c
@@ -60,7 +60,7 @@
60 * 60 *
61 * The host talks to the IOPs using a rather simple message-passing scheme via 61 * The host talks to the IOPs using a rather simple message-passing scheme via
62 * a shared memory area in the IOP RAM. Each IOP has seven "channels"; each 62 * a shared memory area in the IOP RAM. Each IOP has seven "channels"; each
63 * channel is conneced to a specific software driver on the IOP. For example 63 * channel is connected to a specific software driver on the IOP. For example
64 * on the SCC IOP there is one channel for each serial port. Each channel has 64 * on the SCC IOP there is one channel for each serial port. Each channel has
65 * an incoming and and outgoing message queue with a depth of one. 65 * an incoming and and outgoing message queue with a depth of one.
66 * 66 *
diff --git a/arch/m68k/math-emu/fp_decode.h b/arch/m68k/math-emu/fp_decode.h
index 759679d9ab96..6d1e760e2a0e 100644
--- a/arch/m68k/math-emu/fp_decode.h
+++ b/arch/m68k/math-emu/fp_decode.h
@@ -130,7 +130,7 @@ do_fscc=0
130 bfextu %d2{#13,#3},%d0 130 bfextu %d2{#13,#3},%d0
131.endm 131.endm
132 132
133| decode the 8bit diplacement from the brief extension word 133| decode the 8bit displacement from the brief extension word
134.macro fp_decode_disp8 134.macro fp_decode_disp8
135 move.b %d2,%d0 135 move.b %d2,%d0
136 ext.w %d0 136 ext.w %d0
diff --git a/crypto/asymmetric_keys/mscode_parser.c b/crypto/asymmetric_keys/mscode_parser.c
index 6a76d5c70ef6..9492e1c22d38 100644
--- a/crypto/asymmetric_keys/mscode_parser.c
+++ b/crypto/asymmetric_keys/mscode_parser.c
@@ -124,5 +124,10 @@ int mscode_note_digest(void *context, size_t hdrlen,
124 struct pefile_context *ctx = context; 124 struct pefile_context *ctx = context;
125 125
126 ctx->digest = kmemdup(value, vlen, GFP_KERNEL); 126 ctx->digest = kmemdup(value, vlen, GFP_KERNEL);
127 return ctx->digest ? 0 : -ENOMEM; 127 if (!ctx->digest)
128 return -ENOMEM;
129
130 ctx->digest_len = vlen;
131
132 return 0;
128} 133}
diff --git a/crypto/asymmetric_keys/pkcs7_verify.c b/crypto/asymmetric_keys/pkcs7_verify.c
index 44b746e9df1b..2ffd69769466 100644
--- a/crypto/asymmetric_keys/pkcs7_verify.c
+++ b/crypto/asymmetric_keys/pkcs7_verify.c
@@ -227,7 +227,7 @@ static int pkcs7_verify_sig_chain(struct pkcs7_message *pkcs7,
227 if (asymmetric_key_id_same(p->id, auth)) 227 if (asymmetric_key_id_same(p->id, auth))
228 goto found_issuer_check_skid; 228 goto found_issuer_check_skid;
229 } 229 }
230 } else { 230 } else if (sig->auth_ids[1]) {
231 auth = sig->auth_ids[1]; 231 auth = sig->auth_ids[1];
232 pr_debug("- want %*phN\n", auth->len, auth->data); 232 pr_debug("- want %*phN\n", auth->len, auth->data);
233 for (p = pkcs7->certs; p; p = p->next) { 233 for (p = pkcs7->certs; p; p = p->next) {
diff --git a/crypto/asymmetric_keys/restrict.c b/crypto/asymmetric_keys/restrict.c
index ac4bddf669de..19d1afb9890f 100644
--- a/crypto/asymmetric_keys/restrict.c
+++ b/crypto/asymmetric_keys/restrict.c
@@ -87,7 +87,7 @@ int restrict_link_by_signature(struct key *trust_keyring,
87 87
88 sig = payload->data[asym_auth]; 88 sig = payload->data[asym_auth];
89 if (!sig->auth_ids[0] && !sig->auth_ids[1]) 89 if (!sig->auth_ids[0] && !sig->auth_ids[1])
90 return 0; 90 return -ENOKEY;
91 91
92 if (ca_keyid && !asymmetric_key_id_partial(sig->auth_ids[1], ca_keyid)) 92 if (ca_keyid && !asymmetric_key_id_partial(sig->auth_ids[1], ca_keyid))
93 return -EPERM; 93 return -EPERM;
diff --git a/crypto/rsa-pkcs1pad.c b/crypto/rsa-pkcs1pad.c
index ead8dc0d084e..8ba426635b1b 100644
--- a/crypto/rsa-pkcs1pad.c
+++ b/crypto/rsa-pkcs1pad.c
@@ -102,10 +102,10 @@ struct pkcs1pad_inst_ctx {
102}; 102};
103 103
104struct pkcs1pad_request { 104struct pkcs1pad_request {
105 struct akcipher_request child_req;
106
107 struct scatterlist in_sg[3], out_sg[2]; 105 struct scatterlist in_sg[3], out_sg[2];
108 uint8_t *in_buf, *out_buf; 106 uint8_t *in_buf, *out_buf;
107
108 struct akcipher_request child_req;
109}; 109};
110 110
111static int pkcs1pad_set_pub_key(struct crypto_akcipher *tfm, const void *key, 111static int pkcs1pad_set_pub_key(struct crypto_akcipher *tfm, const void *key,
diff --git a/drivers/acpi/nfit.c b/drivers/acpi/nfit.c
index ac6ddcc080d4..1f0e06065ae6 100644
--- a/drivers/acpi/nfit.c
+++ b/drivers/acpi/nfit.c
@@ -1131,11 +1131,11 @@ static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
1131 1131
1132 /* 1132 /*
1133 * Until standardization materializes we need to consider up to 3 1133 * Until standardization materializes we need to consider up to 3
1134 * different command sets. Note, that checking for zero functions 1134 * different command sets. Note, that checking for function0 (bit0)
1135 * tells us if any commands might be reachable through this uuid. 1135 * tells us if any commands are reachable through this uuid.
1136 */ 1136 */
1137 for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_HPE2; i++) 1137 for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_HPE2; i++)
1138 if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 0)) 1138 if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1))
1139 break; 1139 break;
1140 1140
1141 /* limit the supported commands to those that are publicly documented */ 1141 /* limit the supported commands to those that are publicly documented */
@@ -1151,9 +1151,10 @@ static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
1151 if (disable_vendor_specific) 1151 if (disable_vendor_specific)
1152 dsm_mask &= ~(1 << 8); 1152 dsm_mask &= ~(1 << 8);
1153 } else { 1153 } else {
1154 dev_err(dev, "unknown dimm command family\n"); 1154 dev_dbg(dev, "unknown dimm command family\n");
1155 nfit_mem->family = -1; 1155 nfit_mem->family = -1;
1156 return force_enable_dimms ? 0 : -ENODEV; 1156 /* DSMs are optional, continue loading the driver... */
1157 return 0;
1157 } 1158 }
1158 1159
1159 uuid = to_nfit_uuid(nfit_mem->family); 1160 uuid = to_nfit_uuid(nfit_mem->family);
diff --git a/drivers/acpi/utils.c b/drivers/acpi/utils.c
index b4de130f2d57..22c09952e177 100644
--- a/drivers/acpi/utils.c
+++ b/drivers/acpi/utils.c
@@ -680,6 +680,9 @@ bool acpi_check_dsm(acpi_handle handle, const u8 *uuid, u64 rev, u64 funcs)
680 u64 mask = 0; 680 u64 mask = 0;
681 union acpi_object *obj; 681 union acpi_object *obj;
682 682
683 if (funcs == 0)
684 return false;
685
683 obj = acpi_evaluate_dsm(handle, uuid, rev, 0, NULL); 686 obj = acpi_evaluate_dsm(handle, uuid, rev, 0, NULL);
684 if (!obj) 687 if (!obj)
685 return false; 688 return false;
@@ -692,9 +695,6 @@ bool acpi_check_dsm(acpi_handle handle, const u8 *uuid, u64 rev, u64 funcs)
692 mask |= (((u64)obj->buffer.pointer[i]) << (i * 8)); 695 mask |= (((u64)obj->buffer.pointer[i]) << (i * 8));
693 ACPI_FREE(obj); 696 ACPI_FREE(obj);
694 697
695 if (funcs == 0)
696 return true;
697
698 /* 698 /*
699 * Bit 0 indicates whether there's support for any functions other than 699 * Bit 0 indicates whether there's support for any functions other than
700 * function 0 for the specified UUID and revision. 700 * function 0 for the specified UUID and revision.
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 6be7770f68e9..31c183aed368 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -4314,6 +4314,12 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
4314 */ 4314 */
4315 { "ST380013AS", "3.20", ATA_HORKAGE_MAX_SEC_1024 }, 4315 { "ST380013AS", "3.20", ATA_HORKAGE_MAX_SEC_1024 },
4316 4316
4317 /*
4318 * Device times out with higher max sects.
4319 * https://bugzilla.kernel.org/show_bug.cgi?id=121671
4320 */
4321 { "LITEON CX1-JB256-HP", NULL, ATA_HORKAGE_MAX_SEC_1024 },
4322
4317 /* Devices we expect to fail diagnostics */ 4323 /* Devices we expect to fail diagnostics */
4318 4324
4319 /* Devices where NCQ should be avoided */ 4325 /* Devices where NCQ should be avoided */
diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c
index 10f846cc8db1..25d5906640c3 100644
--- a/drivers/clk/at91/clk-programmable.c
+++ b/drivers/clk/at91/clk-programmable.c
@@ -99,7 +99,7 @@ static int clk_programmable_set_parent(struct clk_hw *hw, u8 index)
99 struct clk_programmable *prog = to_clk_programmable(hw); 99 struct clk_programmable *prog = to_clk_programmable(hw);
100 const struct clk_programmable_layout *layout = prog->layout; 100 const struct clk_programmable_layout *layout = prog->layout;
101 unsigned int mask = layout->css_mask; 101 unsigned int mask = layout->css_mask;
102 unsigned int pckr = 0; 102 unsigned int pckr = index;
103 103
104 if (layout->have_slck_mck) 104 if (layout->have_slck_mck)
105 mask |= AT91_PMC_CSSMCK_MCK; 105 mask |= AT91_PMC_CSSMCK_MCK;
diff --git a/drivers/clk/sunxi/clk-sun4i-display.c b/drivers/clk/sunxi/clk-sun4i-display.c
index 445a7498d6df..9780fac6d029 100644
--- a/drivers/clk/sunxi/clk-sun4i-display.c
+++ b/drivers/clk/sunxi/clk-sun4i-display.c
@@ -33,6 +33,8 @@ struct sun4i_a10_display_clk_data {
33 33
34 u8 width_div; 34 u8 width_div;
35 u8 width_mux; 35 u8 width_mux;
36
37 u32 flags;
36}; 38};
37 39
38struct reset_data { 40struct reset_data {
@@ -166,7 +168,7 @@ static void __init sun4i_a10_display_init(struct device_node *node,
166 data->has_div ? &div->hw : NULL, 168 data->has_div ? &div->hw : NULL,
167 data->has_div ? &clk_divider_ops : NULL, 169 data->has_div ? &clk_divider_ops : NULL,
168 &gate->hw, &clk_gate_ops, 170 &gate->hw, &clk_gate_ops,
169 0); 171 data->flags);
170 if (IS_ERR(clk)) { 172 if (IS_ERR(clk)) {
171 pr_err("%s: Couldn't register the clock\n", clk_name); 173 pr_err("%s: Couldn't register the clock\n", clk_name);
172 goto free_div; 174 goto free_div;
@@ -232,6 +234,7 @@ static const struct sun4i_a10_display_clk_data sun4i_a10_tcon_ch0_data __initcon
232 .offset_rst = 29, 234 .offset_rst = 29,
233 .offset_mux = 24, 235 .offset_mux = 24,
234 .width_mux = 2, 236 .width_mux = 2,
237 .flags = CLK_SET_RATE_PARENT,
235}; 238};
236 239
237static void __init sun4i_a10_tcon_ch0_setup(struct device_node *node) 240static void __init sun4i_a10_tcon_ch0_setup(struct device_node *node)
diff --git a/drivers/clk/sunxi/clk-sun4i-tcon-ch1.c b/drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
index 98a4582de56a..b6d29d1bedca 100644
--- a/drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
+++ b/drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
@@ -79,15 +79,11 @@ static int tcon_ch1_is_enabled(struct clk_hw *hw)
79static u8 tcon_ch1_get_parent(struct clk_hw *hw) 79static u8 tcon_ch1_get_parent(struct clk_hw *hw)
80{ 80{
81 struct tcon_ch1_clk *tclk = hw_to_tclk(hw); 81 struct tcon_ch1_clk *tclk = hw_to_tclk(hw);
82 int num_parents = clk_hw_get_num_parents(hw);
83 u32 reg; 82 u32 reg;
84 83
85 reg = readl(tclk->reg) >> TCON_CH1_SCLK2_MUX_SHIFT; 84 reg = readl(tclk->reg) >> TCON_CH1_SCLK2_MUX_SHIFT;
86 reg &= reg >> TCON_CH1_SCLK2_MUX_MASK; 85 reg &= reg >> TCON_CH1_SCLK2_MUX_MASK;
87 86
88 if (reg >= num_parents)
89 return -EINVAL;
90
91 return reg; 87 return reg;
92} 88}
93 89
diff --git a/drivers/crypto/qat/qat_common/Makefile b/drivers/crypto/qat/qat_common/Makefile
index 6d74b91f2152..5fc3dbb9ada0 100644
--- a/drivers/crypto/qat/qat_common/Makefile
+++ b/drivers/crypto/qat/qat_common/Makefile
@@ -2,6 +2,7 @@ $(obj)/qat_rsapubkey-asn1.o: $(obj)/qat_rsapubkey-asn1.c \
2 $(obj)/qat_rsapubkey-asn1.h 2 $(obj)/qat_rsapubkey-asn1.h
3$(obj)/qat_rsaprivkey-asn1.o: $(obj)/qat_rsaprivkey-asn1.c \ 3$(obj)/qat_rsaprivkey-asn1.o: $(obj)/qat_rsaprivkey-asn1.c \
4 $(obj)/qat_rsaprivkey-asn1.h 4 $(obj)/qat_rsaprivkey-asn1.h
5$(obj)/qat_asym_algs.o: $(obj)/qat_rsapubkey-asn1.h $(obj)/qat_rsaprivkey-asn1.h
5 6
6clean-files += qat_rsapubkey-asn1.c qat_rsapubkey-asn1.h 7clean-files += qat_rsapubkey-asn1.c qat_rsapubkey-asn1.h
7clean-files += qat_rsaprivkey-asn1.c qat_rsaprivkey-asn1.h 8clean-files += qat_rsaprivkey-asn1.c qat_rsaprivkey-asn1.h
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 536112fd2466..d7860614f87f 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -402,9 +402,12 @@ config GPIO_TB10X
402 select OF_GPIO 402 select OF_GPIO
403 403
404config GPIO_TEGRA 404config GPIO_TEGRA
405 bool 405 bool "NVIDIA Tegra GPIO support"
406 default y 406 default ARCH_TEGRA
407 depends on ARCH_TEGRA || COMPILE_TEST 407 depends on ARCH_TEGRA || COMPILE_TEST
408 depends on OF
409 help
410 Say yes here to support GPIO pins on NVIDIA Tegra SoCs.
408 411
409config GPIO_TS4800 412config GPIO_TS4800
410 tristate "TS-4800 DIO blocks and compatibles" 413 tristate "TS-4800 DIO blocks and compatibles"
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f313b4d8344f..85c4debf47e0 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -512,6 +512,10 @@ void intel_detect_pch(struct drm_device *dev)
512 DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n"); 512 DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
513 WARN_ON(!IS_SKYLAKE(dev) && 513 WARN_ON(!IS_SKYLAKE(dev) &&
514 !IS_KABYLAKE(dev)); 514 !IS_KABYLAKE(dev));
515 } else if (id == INTEL_PCH_KBP_DEVICE_ID_TYPE) {
516 dev_priv->pch_type = PCH_KBP;
517 DRM_DEBUG_KMS("Found KabyPoint PCH\n");
518 WARN_ON(!IS_KABYLAKE(dev));
515 } else if ((id == INTEL_PCH_P2X_DEVICE_ID_TYPE) || 519 } else if ((id == INTEL_PCH_P2X_DEVICE_ID_TYPE) ||
516 (id == INTEL_PCH_P3X_DEVICE_ID_TYPE) || 520 (id == INTEL_PCH_P3X_DEVICE_ID_TYPE) ||
517 ((id == INTEL_PCH_QEMU_DEVICE_ID_TYPE) && 521 ((id == INTEL_PCH_QEMU_DEVICE_ID_TYPE) &&
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7c334e902266..bc3f2e6842e7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -990,6 +990,7 @@ enum intel_pch {
990 PCH_CPT, /* Cougarpoint PCH */ 990 PCH_CPT, /* Cougarpoint PCH */
991 PCH_LPT, /* Lynxpoint PCH */ 991 PCH_LPT, /* Lynxpoint PCH */
992 PCH_SPT, /* Sunrisepoint PCH */ 992 PCH_SPT, /* Sunrisepoint PCH */
993 PCH_KBP, /* Kabypoint PCH */
993 PCH_NOP, 994 PCH_NOP,
994}; 995};
995 996
@@ -2600,6 +2601,15 @@ struct drm_i915_cmd_table {
2600 2601
2601#define IS_BXT_REVID(p, since, until) (IS_BROXTON(p) && IS_REVID(p, since, until)) 2602#define IS_BXT_REVID(p, since, until) (IS_BROXTON(p) && IS_REVID(p, since, until))
2602 2603
2604#define KBL_REVID_A0 0x0
2605#define KBL_REVID_B0 0x1
2606#define KBL_REVID_C0 0x2
2607#define KBL_REVID_D0 0x3
2608#define KBL_REVID_E0 0x4
2609
2610#define IS_KBL_REVID(p, since, until) \
2611 (IS_KABYLAKE(p) && IS_REVID(p, since, until))
2612
2603/* 2613/*
2604 * The genX designation typically refers to the render engine, so render 2614 * The genX designation typically refers to the render engine, so render
2605 * capability related checks should use IS_GEN, while display and other checks 2615 * capability related checks should use IS_GEN, while display and other checks
@@ -2708,11 +2718,13 @@ struct drm_i915_cmd_table {
2708#define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE 0x9c00 2718#define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE 0x9c00
2709#define INTEL_PCH_SPT_DEVICE_ID_TYPE 0xA100 2719#define INTEL_PCH_SPT_DEVICE_ID_TYPE 0xA100
2710#define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE 0x9D00 2720#define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE 0x9D00
2721#define INTEL_PCH_KBP_DEVICE_ID_TYPE 0xA200
2711#define INTEL_PCH_P2X_DEVICE_ID_TYPE 0x7100 2722#define INTEL_PCH_P2X_DEVICE_ID_TYPE 0x7100
2712#define INTEL_PCH_P3X_DEVICE_ID_TYPE 0x7000 2723#define INTEL_PCH_P3X_DEVICE_ID_TYPE 0x7000
2713#define INTEL_PCH_QEMU_DEVICE_ID_TYPE 0x2900 /* qemu q35 has 2918 */ 2724#define INTEL_PCH_QEMU_DEVICE_ID_TYPE 0x2900 /* qemu q35 has 2918 */
2714 2725
2715#define INTEL_PCH_TYPE(dev) (__I915__(dev)->pch_type) 2726#define INTEL_PCH_TYPE(dev) (__I915__(dev)->pch_type)
2727#define HAS_PCH_KBP(dev) (INTEL_PCH_TYPE(dev) == PCH_KBP)
2716#define HAS_PCH_SPT(dev) (INTEL_PCH_TYPE(dev) == PCH_SPT) 2728#define HAS_PCH_SPT(dev) (INTEL_PCH_TYPE(dev) == PCH_SPT)
2717#define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT) 2729#define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT)
2718#define HAS_PCH_LPT_LP(dev) (__I915__(dev)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) 2730#define HAS_PCH_LPT_LP(dev) (__I915__(dev)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE)
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
index b7ce963fb8f8..44004e3f09e4 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -55,8 +55,10 @@ int i915_gem_stolen_insert_node_in_range(struct drm_i915_private *dev_priv,
55 return -ENODEV; 55 return -ENODEV;
56 56
57 /* See the comment at the drm_mm_init() call for more about this check. 57 /* See the comment at the drm_mm_init() call for more about this check.
58 * WaSkipStolenMemoryFirstPage:bdw,chv (incomplete) */ 58 * WaSkipStolenMemoryFirstPage:bdw,chv,kbl (incomplete)
59 if (INTEL_INFO(dev_priv)->gen == 8 && start < 4096) 59 */
60 if (start < 4096 && (IS_GEN8(dev_priv) ||
61 IS_KBL_REVID(dev_priv, 0, KBL_REVID_A0)))
60 start = 4096; 62 start = 4096;
61 63
62 mutex_lock(&dev_priv->mm.stolen_lock); 64 mutex_lock(&dev_priv->mm.stolen_lock);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 2f6fd33c07ba..aab47f7bb61b 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2471,7 +2471,7 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
2471 I915_WRITE(SDEIIR, iir); 2471 I915_WRITE(SDEIIR, iir);
2472 ret = IRQ_HANDLED; 2472 ret = IRQ_HANDLED;
2473 2473
2474 if (HAS_PCH_SPT(dev_priv)) 2474 if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv))
2475 spt_irq_handler(dev, iir); 2475 spt_irq_handler(dev, iir);
2476 else 2476 else
2477 cpt_irq_handler(dev, iir); 2477 cpt_irq_handler(dev, iir);
@@ -4661,7 +4661,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
4661 dev->driver->disable_vblank = gen8_disable_vblank; 4661 dev->driver->disable_vblank = gen8_disable_vblank;
4662 if (IS_BROXTON(dev)) 4662 if (IS_BROXTON(dev))
4663 dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup; 4663 dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;
4664 else if (HAS_PCH_SPT(dev)) 4664 else if (HAS_PCH_SPT(dev) || HAS_PCH_KBP(dev))
4665 dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup; 4665 dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
4666 else 4666 else
4667 dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup; 4667 dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b407411e31ba..3fcf7dd5b6ca 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -220,6 +220,9 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
220#define ECOCHK_PPGTT_WT_HSW (0x2<<3) 220#define ECOCHK_PPGTT_WT_HSW (0x2<<3)
221#define ECOCHK_PPGTT_WB_HSW (0x3<<3) 221#define ECOCHK_PPGTT_WB_HSW (0x3<<3)
222 222
223#define GEN8_CONFIG0 _MMIO(0xD00)
224#define GEN9_DEFAULT_FIXES (1 << 3 | 1 << 2 | 1 << 1)
225
223#define GAC_ECO_BITS _MMIO(0x14090) 226#define GAC_ECO_BITS _MMIO(0x14090)
224#define ECOBITS_SNB_BIT (1<<13) 227#define ECOBITS_SNB_BIT (1<<13)
225#define ECOBITS_PPGTT_CACHE64B (3<<8) 228#define ECOBITS_PPGTT_CACHE64B (3<<8)
@@ -1669,6 +1672,9 @@ enum skl_disp_power_wells {
1669 1672
1670#define GEN7_TLB_RD_ADDR _MMIO(0x4700) 1673#define GEN7_TLB_RD_ADDR _MMIO(0x4700)
1671 1674
1675#define GAMT_CHKN_BIT_REG _MMIO(0x4ab8)
1676#define GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING (1<<28)
1677
1672#if 0 1678#if 0
1673#define PRB0_TAIL _MMIO(0x2030) 1679#define PRB0_TAIL _MMIO(0x2030)
1674#define PRB0_HEAD _MMIO(0x2034) 1680#define PRB0_HEAD _MMIO(0x2034)
@@ -1804,6 +1810,10 @@ enum skl_disp_power_wells {
1804#define GEN9_IZ_HASHING_MASK(slice) (0x3 << ((slice) * 2)) 1810#define GEN9_IZ_HASHING_MASK(slice) (0x3 << ((slice) * 2))
1805#define GEN9_IZ_HASHING(slice, val) ((val) << ((slice) * 2)) 1811#define GEN9_IZ_HASHING(slice, val) ((val) << ((slice) * 2))
1806 1812
1813/* chicken reg for WaConextSwitchWithConcurrentTLBInvalidate */
1814#define GEN9_CSFE_CHICKEN1_RCS _MMIO(0x20D4)
1815#define GEN9_PREEMPT_GPGPU_SYNC_SWITCH_DISABLE (1 << 2)
1816
1807/* WaClearTdlStateAckDirtyBits */ 1817/* WaClearTdlStateAckDirtyBits */
1808#define GEN8_STATE_ACK _MMIO(0x20F0) 1818#define GEN8_STATE_ACK _MMIO(0x20F0)
1809#define GEN9_STATE_ACK_SLICE1 _MMIO(0x20F8) 1819#define GEN9_STATE_ACK_SLICE1 _MMIO(0x20F8)
@@ -2200,6 +2210,8 @@ enum skl_disp_power_wells {
2200#define ILK_DPFC_STATUS _MMIO(0x43210) 2210#define ILK_DPFC_STATUS _MMIO(0x43210)
2201#define ILK_DPFC_FENCE_YOFF _MMIO(0x43218) 2211#define ILK_DPFC_FENCE_YOFF _MMIO(0x43218)
2202#define ILK_DPFC_CHICKEN _MMIO(0x43224) 2212#define ILK_DPFC_CHICKEN _MMIO(0x43224)
2213#define ILK_DPFC_DISABLE_DUMMY0 (1<<8)
2214#define ILK_DPFC_NUKE_ON_ANY_MODIFICATION (1<<23)
2203#define ILK_FBC_RT_BASE _MMIO(0x2128) 2215#define ILK_FBC_RT_BASE _MMIO(0x2128)
2204#define ILK_FBC_RT_VALID (1<<0) 2216#define ILK_FBC_RT_VALID (1<<0)
2205#define SNB_FBC_FRONT_BUFFER (1<<1) 2217#define SNB_FBC_FRONT_BUFFER (1<<1)
@@ -6031,6 +6043,7 @@ enum skl_disp_power_wells {
6031#define CHICKEN_PAR1_1 _MMIO(0x42080) 6043#define CHICKEN_PAR1_1 _MMIO(0x42080)
6032#define DPA_MASK_VBLANK_SRD (1 << 15) 6044#define DPA_MASK_VBLANK_SRD (1 << 15)
6033#define FORCE_ARB_IDLE_PLANES (1 << 14) 6045#define FORCE_ARB_IDLE_PLANES (1 << 14)
6046#define SKL_EDP_PSR_FIX_RDWRAP (1 << 3)
6034 6047
6035#define _CHICKEN_PIPESL_1_A 0x420b0 6048#define _CHICKEN_PIPESL_1_A 0x420b0
6036#define _CHICKEN_PIPESL_1_B 0x420b4 6049#define _CHICKEN_PIPESL_1_B 0x420b4
@@ -6039,6 +6052,7 @@ enum skl_disp_power_wells {
6039#define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B) 6052#define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
6040 6053
6041#define DISP_ARB_CTL _MMIO(0x45000) 6054#define DISP_ARB_CTL _MMIO(0x45000)
6055#define DISP_FBC_MEMORY_WAKE (1<<31)
6042#define DISP_TILE_SURFACE_SWIZZLING (1<<13) 6056#define DISP_TILE_SURFACE_SWIZZLING (1<<13)
6043#define DISP_FBC_WM_DIS (1<<15) 6057#define DISP_FBC_WM_DIS (1<<15)
6044#define DISP_ARB_CTL2 _MMIO(0x45004) 6058#define DISP_ARB_CTL2 _MMIO(0x45004)
@@ -6052,6 +6066,9 @@ enum skl_disp_power_wells {
6052#define HSW_NDE_RSTWRN_OPT _MMIO(0x46408) 6066#define HSW_NDE_RSTWRN_OPT _MMIO(0x46408)
6053#define RESET_PCH_HANDSHAKE_ENABLE (1<<4) 6067#define RESET_PCH_HANDSHAKE_ENABLE (1<<4)
6054 6068
6069#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430)
6070#define MASK_WAKEMEM (1<<13)
6071
6055#define SKL_DFSM _MMIO(0x51000) 6072#define SKL_DFSM _MMIO(0x51000)
6056#define SKL_DFSM_CDCLK_LIMIT_MASK (3 << 23) 6073#define SKL_DFSM_CDCLK_LIMIT_MASK (3 << 23)
6057#define SKL_DFSM_CDCLK_LIMIT_675 (0 << 23) 6074#define SKL_DFSM_CDCLK_LIMIT_675 (0 << 23)
@@ -6069,6 +6086,7 @@ enum skl_disp_power_wells {
6069#define GEN9_TSG_BARRIER_ACK_DISABLE (1<<8) 6086#define GEN9_TSG_BARRIER_ACK_DISABLE (1<<8)
6070 6087
6071#define GEN9_CS_DEBUG_MODE1 _MMIO(0x20ec) 6088#define GEN9_CS_DEBUG_MODE1 _MMIO(0x20ec)
6089#define GEN9_CTX_PREEMPT_REG _MMIO(0x2248)
6072#define GEN8_CS_CHICKEN1 _MMIO(0x2580) 6090#define GEN8_CS_CHICKEN1 _MMIO(0x2580)
6073 6091
6074/* GEN7 chicken */ 6092/* GEN7 chicken */
@@ -6076,6 +6094,7 @@ enum skl_disp_power_wells {
6076# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26)) 6094# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26))
6077# define GEN9_RHWO_OPTIMIZATION_DISABLE (1<<14) 6095# define GEN9_RHWO_OPTIMIZATION_DISABLE (1<<14)
6078#define COMMON_SLICE_CHICKEN2 _MMIO(0x7014) 6096#define COMMON_SLICE_CHICKEN2 _MMIO(0x7014)
6097# define GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION (1<<8)
6079# define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE (1<<0) 6098# define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE (1<<0)
6080 6099
6081#define HIZ_CHICKEN _MMIO(0x7018) 6100#define HIZ_CHICKEN _MMIO(0x7018)
@@ -6921,6 +6940,7 @@ enum skl_disp_power_wells {
6921#define EDRAM_SETS_IDX(cap) (((cap) >> 8) & 0x3) 6940#define EDRAM_SETS_IDX(cap) (((cap) >> 8) & 0x3)
6922 6941
6923#define GEN6_UCGCTL1 _MMIO(0x9400) 6942#define GEN6_UCGCTL1 _MMIO(0x9400)
6943# define GEN6_GAMUNIT_CLOCK_GATE_DISABLE (1 << 22)
6924# define GEN6_EU_TCUNIT_CLOCK_GATE_DISABLE (1 << 16) 6944# define GEN6_EU_TCUNIT_CLOCK_GATE_DISABLE (1 << 16)
6925# define GEN6_BLBUNIT_CLOCK_GATE_DISABLE (1 << 5) 6945# define GEN6_BLBUNIT_CLOCK_GATE_DISABLE (1 << 5)
6926# define GEN6_CSUNIT_CLOCK_GATE_DISABLE (1 << 7) 6946# define GEN6_CSUNIT_CLOCK_GATE_DISABLE (1 << 7)
@@ -6937,6 +6957,7 @@ enum skl_disp_power_wells {
6937 6957
6938#define GEN7_UCGCTL4 _MMIO(0x940c) 6958#define GEN7_UCGCTL4 _MMIO(0x940c)
6939#define GEN7_L3BANK2X_CLOCK_GATE_DISABLE (1<<25) 6959#define GEN7_L3BANK2X_CLOCK_GATE_DISABLE (1<<25)
6960#define GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE (1<<14)
6940 6961
6941#define GEN6_RCGCTL1 _MMIO(0x9410) 6962#define GEN6_RCGCTL1 _MMIO(0x9410)
6942#define GEN6_RCGCTL2 _MMIO(0x9414) 6963#define GEN6_RCGCTL2 _MMIO(0x9414)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index a34c23eceba0..2b3b428d9cd2 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -41,16 +41,22 @@
41 * be moved to FW_FAILED. 41 * be moved to FW_FAILED.
42 */ 42 */
43 43
44#define I915_CSR_KBL "i915/kbl_dmc_ver1.bin"
45MODULE_FIRMWARE(I915_CSR_KBL);
46#define KBL_CSR_VERSION_REQUIRED CSR_VERSION(1, 1)
47
44#define I915_CSR_SKL "i915/skl_dmc_ver1.bin" 48#define I915_CSR_SKL "i915/skl_dmc_ver1.bin"
49MODULE_FIRMWARE(I915_CSR_SKL);
50#define SKL_CSR_VERSION_REQUIRED CSR_VERSION(1, 23)
51
45#define I915_CSR_BXT "i915/bxt_dmc_ver1.bin" 52#define I915_CSR_BXT "i915/bxt_dmc_ver1.bin"
53MODULE_FIRMWARE(I915_CSR_BXT);
54#define BXT_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
46 55
47#define FIRMWARE_URL "https://01.org/linuxgraphics/intel-linux-graphics-firmwares" 56#define FIRMWARE_URL "https://01.org/linuxgraphics/intel-linux-graphics-firmwares"
48 57
49MODULE_FIRMWARE(I915_CSR_SKL);
50MODULE_FIRMWARE(I915_CSR_BXT);
51 58
52#define SKL_CSR_VERSION_REQUIRED CSR_VERSION(1, 23) 59
53#define BXT_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
54 60
55#define CSR_MAX_FW_SIZE 0x2FFF 61#define CSR_MAX_FW_SIZE 0x2FFF
56#define CSR_DEFAULT_FW_OFFSET 0xFFFFFFFF 62#define CSR_DEFAULT_FW_OFFSET 0xFFFFFFFF
@@ -169,12 +175,10 @@ struct stepping_info {
169 char substepping; 175 char substepping;
170}; 176};
171 177
172/*
173 * Kabylake derivated from Skylake H0, so SKL H0
174 * is the right firmware for KBL A0 (revid 0).
175 */
176static const struct stepping_info kbl_stepping_info[] = { 178static const struct stepping_info kbl_stepping_info[] = {
177 {'H', '0'}, {'I', '0'} 179 {'A', '0'}, {'B', '0'}, {'C', '0'},
180 {'D', '0'}, {'E', '0'}, {'F', '0'},
181 {'G', '0'}, {'H', '0'}, {'I', '0'},
178}; 182};
179 183
180static const struct stepping_info skl_stepping_info[] = { 184static const struct stepping_info skl_stepping_info[] = {
@@ -298,7 +302,9 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
298 302
299 csr->version = css_header->version; 303 csr->version = css_header->version;
300 304
301 if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) { 305 if (IS_KABYLAKE(dev_priv)) {
306 required_min_version = KBL_CSR_VERSION_REQUIRED;
307 } else if (IS_SKYLAKE(dev_priv)) {
302 required_min_version = SKL_CSR_VERSION_REQUIRED; 308 required_min_version = SKL_CSR_VERSION_REQUIRED;
303 } else if (IS_BROXTON(dev_priv)) { 309 } else if (IS_BROXTON(dev_priv)) {
304 required_min_version = BXT_CSR_VERSION_REQUIRED; 310 required_min_version = BXT_CSR_VERSION_REQUIRED;
@@ -446,7 +452,9 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
446 if (!HAS_CSR(dev_priv)) 452 if (!HAS_CSR(dev_priv))
447 return; 453 return;
448 454
449 if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) 455 if (IS_KABYLAKE(dev_priv))
456 csr->fw_path = I915_CSR_KBL;
457 else if (IS_SKYLAKE(dev_priv))
450 csr->fw_path = I915_CSR_SKL; 458 csr->fw_path = I915_CSR_SKL;
451 else if (IS_BROXTON(dev_priv)) 459 else if (IS_BROXTON(dev_priv))
452 csr->fw_path = I915_CSR_BXT; 460 csr->fw_path = I915_CSR_BXT;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 04452cf3eae8..3074c56a643d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11997,6 +11997,12 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
11997 ret = intel_color_check(crtc, crtc_state); 11997 ret = intel_color_check(crtc, crtc_state);
11998 if (ret) 11998 if (ret)
11999 return ret; 11999 return ret;
12000
12001 /*
12002 * Changing color management on Intel hardware is
12003 * handled as part of planes update.
12004 */
12005 crtc_state->planes_changed = true;
12000 } 12006 }
12001 12007
12002 ret = 0; 12008 ret = 0;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 40745e38d438..891107f92d9f 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4645,7 +4645,7 @@ intel_dp_detect(struct drm_connector *connector, bool force)
4645 4645
4646 intel_dp->detect_done = false; 4646 intel_dp->detect_done = false;
4647 4647
4648 if (intel_connector->detect_edid) 4648 if (is_edp(intel_dp) || intel_connector->detect_edid)
4649 return connector_status_connected; 4649 return connector_status_connected;
4650 else 4650 else
4651 return connector_status_disconnected; 4651 return connector_status_disconnected;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 42eac37de047..7f2d8415ed8b 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1103,15 +1103,17 @@ static inline int gen8_emit_flush_coherentl3_wa(struct intel_engine_cs *engine,
1103 uint32_t *const batch, 1103 uint32_t *const batch,
1104 uint32_t index) 1104 uint32_t index)
1105{ 1105{
1106 struct drm_i915_private *dev_priv = engine->dev->dev_private;
1106 uint32_t l3sqc4_flush = (0x40400000 | GEN8_LQSC_FLUSH_COHERENT_LINES); 1107 uint32_t l3sqc4_flush = (0x40400000 | GEN8_LQSC_FLUSH_COHERENT_LINES);
1107 1108
1108 /* 1109 /*
1109 * WaDisableLSQCROPERFforOCL:skl 1110 * WaDisableLSQCROPERFforOCL:skl,kbl
1110 * This WA is implemented in skl_init_clock_gating() but since 1111 * This WA is implemented in skl_init_clock_gating() but since
1111 * this batch updates GEN8_L3SQCREG4 with default value we need to 1112 * this batch updates GEN8_L3SQCREG4 with default value we need to
1112 * set this bit here to retain the WA during flush. 1113 * set this bit here to retain the WA during flush.
1113 */ 1114 */
1114 if (IS_SKL_REVID(engine->dev, 0, SKL_REVID_E0)) 1115 if (IS_SKL_REVID(dev_priv, 0, SKL_REVID_E0) ||
1116 IS_KBL_REVID(dev_priv, 0, KBL_REVID_E0))
1115 l3sqc4_flush |= GEN8_LQSC_RO_PERF_DIS; 1117 l3sqc4_flush |= GEN8_LQSC_RO_PERF_DIS;
1116 1118
1117 wa_ctx_emit(batch, index, (MI_STORE_REGISTER_MEM_GEN8 | 1119 wa_ctx_emit(batch, index, (MI_STORE_REGISTER_MEM_GEN8 |
@@ -1273,6 +1275,7 @@ static int gen9_init_indirectctx_bb(struct intel_engine_cs *engine,
1273{ 1275{
1274 int ret; 1276 int ret;
1275 struct drm_device *dev = engine->dev; 1277 struct drm_device *dev = engine->dev;
1278 struct drm_i915_private *dev_priv = dev->dev_private;
1276 uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS); 1279 uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS);
1277 1280
1278 /* WaDisableCtxRestoreArbitration:skl,bxt */ 1281 /* WaDisableCtxRestoreArbitration:skl,bxt */
@@ -1286,6 +1289,22 @@ static int gen9_init_indirectctx_bb(struct intel_engine_cs *engine,
1286 return ret; 1289 return ret;
1287 index = ret; 1290 index = ret;
1288 1291
1292 /* WaClearSlmSpaceAtContextSwitch:kbl */
1293 /* Actual scratch location is at 128 bytes offset */
1294 if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_A0)) {
1295 uint32_t scratch_addr
1296 = engine->scratch.gtt_offset + 2*CACHELINE_BYTES;
1297
1298 wa_ctx_emit(batch, index, GFX_OP_PIPE_CONTROL(6));
1299 wa_ctx_emit(batch, index, (PIPE_CONTROL_FLUSH_L3 |
1300 PIPE_CONTROL_GLOBAL_GTT_IVB |
1301 PIPE_CONTROL_CS_STALL |
1302 PIPE_CONTROL_QW_WRITE));
1303 wa_ctx_emit(batch, index, scratch_addr);
1304 wa_ctx_emit(batch, index, 0);
1305 wa_ctx_emit(batch, index, 0);
1306 wa_ctx_emit(batch, index, 0);
1307 }
1289 /* Pad to end of cacheline */ 1308 /* Pad to end of cacheline */
1290 while (index % CACHELINE_DWORDS) 1309 while (index % CACHELINE_DWORDS)
1291 wa_ctx_emit(batch, index, MI_NOOP); 1310 wa_ctx_emit(batch, index, MI_NOOP);
@@ -1687,9 +1706,10 @@ static int gen8_emit_flush_render(struct drm_i915_gem_request *request,
1687 struct intel_ringbuffer *ringbuf = request->ringbuf; 1706 struct intel_ringbuffer *ringbuf = request->ringbuf;
1688 struct intel_engine_cs *engine = ringbuf->engine; 1707 struct intel_engine_cs *engine = ringbuf->engine;
1689 u32 scratch_addr = engine->scratch.gtt_offset + 2 * CACHELINE_BYTES; 1708 u32 scratch_addr = engine->scratch.gtt_offset + 2 * CACHELINE_BYTES;
1690 bool vf_flush_wa = false; 1709 bool vf_flush_wa = false, dc_flush_wa = false;
1691 u32 flags = 0; 1710 u32 flags = 0;
1692 int ret; 1711 int ret;
1712 int len;
1693 1713
1694 flags |= PIPE_CONTROL_CS_STALL; 1714 flags |= PIPE_CONTROL_CS_STALL;
1695 1715
@@ -1716,9 +1736,21 @@ static int gen8_emit_flush_render(struct drm_i915_gem_request *request,
1716 */ 1736 */
1717 if (IS_GEN9(engine->dev)) 1737 if (IS_GEN9(engine->dev))
1718 vf_flush_wa = true; 1738 vf_flush_wa = true;
1739
1740 /* WaForGAMHang:kbl */
1741 if (IS_KBL_REVID(request->i915, 0, KBL_REVID_B0))
1742 dc_flush_wa = true;
1719 } 1743 }
1720 1744
1721 ret = intel_ring_begin(request, vf_flush_wa ? 12 : 6); 1745 len = 6;
1746
1747 if (vf_flush_wa)
1748 len += 6;
1749
1750 if (dc_flush_wa)
1751 len += 12;
1752
1753 ret = intel_ring_begin(request, len);
1722 if (ret) 1754 if (ret)
1723 return ret; 1755 return ret;
1724 1756
@@ -1731,12 +1763,31 @@ static int gen8_emit_flush_render(struct drm_i915_gem_request *request,
1731 intel_logical_ring_emit(ringbuf, 0); 1763 intel_logical_ring_emit(ringbuf, 0);
1732 } 1764 }
1733 1765
1766 if (dc_flush_wa) {
1767 intel_logical_ring_emit(ringbuf, GFX_OP_PIPE_CONTROL(6));
1768 intel_logical_ring_emit(ringbuf, PIPE_CONTROL_DC_FLUSH_ENABLE);
1769 intel_logical_ring_emit(ringbuf, 0);
1770 intel_logical_ring_emit(ringbuf, 0);
1771 intel_logical_ring_emit(ringbuf, 0);
1772 intel_logical_ring_emit(ringbuf, 0);
1773 }
1774
1734 intel_logical_ring_emit(ringbuf, GFX_OP_PIPE_CONTROL(6)); 1775 intel_logical_ring_emit(ringbuf, GFX_OP_PIPE_CONTROL(6));
1735 intel_logical_ring_emit(ringbuf, flags); 1776 intel_logical_ring_emit(ringbuf, flags);
1736 intel_logical_ring_emit(ringbuf, scratch_addr); 1777 intel_logical_ring_emit(ringbuf, scratch_addr);
1737 intel_logical_ring_emit(ringbuf, 0); 1778 intel_logical_ring_emit(ringbuf, 0);
1738 intel_logical_ring_emit(ringbuf, 0); 1779 intel_logical_ring_emit(ringbuf, 0);
1739 intel_logical_ring_emit(ringbuf, 0); 1780 intel_logical_ring_emit(ringbuf, 0);
1781
1782 if (dc_flush_wa) {
1783 intel_logical_ring_emit(ringbuf, GFX_OP_PIPE_CONTROL(6));
1784 intel_logical_ring_emit(ringbuf, PIPE_CONTROL_CS_STALL);
1785 intel_logical_ring_emit(ringbuf, 0);
1786 intel_logical_ring_emit(ringbuf, 0);
1787 intel_logical_ring_emit(ringbuf, 0);
1788 intel_logical_ring_emit(ringbuf, 0);
1789 }
1790
1740 intel_logical_ring_advance(ringbuf); 1791 intel_logical_ring_advance(ringbuf);
1741 1792
1742 return 0; 1793 return 0;
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 8357d571553a..aba94099886b 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1731,7 +1731,8 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
1731 panel->backlight.set = bxt_set_backlight; 1731 panel->backlight.set = bxt_set_backlight;
1732 panel->backlight.get = bxt_get_backlight; 1732 panel->backlight.get = bxt_get_backlight;
1733 panel->backlight.hz_to_pwm = bxt_hz_to_pwm; 1733 panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
1734 } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv)) { 1734 } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
1735 HAS_PCH_KBP(dev_priv)) {
1735 panel->backlight.setup = lpt_setup_backlight; 1736 panel->backlight.setup = lpt_setup_backlight;
1736 panel->backlight.enable = lpt_enable_backlight; 1737 panel->backlight.enable = lpt_enable_backlight;
1737 panel->backlight.disable = lpt_disable_backlight; 1738 panel->backlight.disable = lpt_disable_backlight;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a7ef45da0a9e..2863b92c9da6 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -54,10 +54,38 @@
54#define INTEL_RC6p_ENABLE (1<<1) 54#define INTEL_RC6p_ENABLE (1<<1)
55#define INTEL_RC6pp_ENABLE (1<<2) 55#define INTEL_RC6pp_ENABLE (1<<2)
56 56
57static void gen9_init_clock_gating(struct drm_device *dev)
58{
59 struct drm_i915_private *dev_priv = dev->dev_private;
60
61 /* See Bspec note for PSR2_CTL bit 31, Wa#828:skl,bxt,kbl */
62 I915_WRITE(CHICKEN_PAR1_1,
63 I915_READ(CHICKEN_PAR1_1) | SKL_EDP_PSR_FIX_RDWRAP);
64
65 I915_WRITE(GEN8_CONFIG0,
66 I915_READ(GEN8_CONFIG0) | GEN9_DEFAULT_FIXES);
67
68 /* WaEnableChickenDCPR:skl,bxt,kbl */
69 I915_WRITE(GEN8_CHICKEN_DCPR_1,
70 I915_READ(GEN8_CHICKEN_DCPR_1) | MASK_WAKEMEM);
71
72 /* WaFbcTurnOffFbcWatermark:skl,bxt,kbl */
73 /* WaFbcWakeMemOn:skl,bxt,kbl */
74 I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
75 DISP_FBC_WM_DIS |
76 DISP_FBC_MEMORY_WAKE);
77
78 /* WaFbcHighMemBwCorruptionAvoidance:skl,bxt,kbl */
79 I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
80 ILK_DPFC_DISABLE_DUMMY0);
81}
82
57static void bxt_init_clock_gating(struct drm_device *dev) 83static void bxt_init_clock_gating(struct drm_device *dev)
58{ 84{
59 struct drm_i915_private *dev_priv = dev->dev_private; 85 struct drm_i915_private *dev_priv = dev->dev_private;
60 86
87 gen9_init_clock_gating(dev);
88
61 /* WaDisableSDEUnitClockGating:bxt */ 89 /* WaDisableSDEUnitClockGating:bxt */
62 I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | 90 I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
63 GEN8_SDEUNIT_CLOCK_GATE_DISABLE); 91 GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
@@ -6698,6 +6726,38 @@ static void lpt_suspend_hw(struct drm_device *dev)
6698 } 6726 }
6699} 6727}
6700 6728
6729static void kabylake_init_clock_gating(struct drm_device *dev)
6730{
6731 struct drm_i915_private *dev_priv = dev->dev_private;
6732
6733 gen9_init_clock_gating(dev);
6734
6735 /* WaDisableSDEUnitClockGating:kbl */
6736 if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))
6737 I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
6738 GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
6739
6740 /* WaDisableGamClockGating:kbl */
6741 if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))
6742 I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) |
6743 GEN6_GAMUNIT_CLOCK_GATE_DISABLE);
6744
6745 /* WaFbcNukeOnHostModify:kbl */
6746 I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
6747 ILK_DPFC_NUKE_ON_ANY_MODIFICATION);
6748}
6749
6750static void skylake_init_clock_gating(struct drm_device *dev)
6751{
6752 struct drm_i915_private *dev_priv = dev->dev_private;
6753
6754 gen9_init_clock_gating(dev);
6755
6756 /* WaFbcNukeOnHostModify:skl */
6757 I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
6758 ILK_DPFC_NUKE_ON_ANY_MODIFICATION);
6759}
6760
6701static void broadwell_init_clock_gating(struct drm_device *dev) 6761static void broadwell_init_clock_gating(struct drm_device *dev)
6702{ 6762{
6703 struct drm_i915_private *dev_priv = dev->dev_private; 6763 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -7163,9 +7223,9 @@ static void nop_init_clock_gating(struct drm_device *dev)
7163void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv) 7223void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
7164{ 7224{
7165 if (IS_SKYLAKE(dev_priv)) 7225 if (IS_SKYLAKE(dev_priv))
7166 dev_priv->display.init_clock_gating = nop_init_clock_gating; 7226 dev_priv->display.init_clock_gating = skylake_init_clock_gating;
7167 else if (IS_KABYLAKE(dev_priv)) 7227 else if (IS_KABYLAKE(dev_priv))
7168 dev_priv->display.init_clock_gating = nop_init_clock_gating; 7228 dev_priv->display.init_clock_gating = kabylake_init_clock_gating;
7169 else if (IS_BROXTON(dev_priv)) 7229 else if (IS_BROXTON(dev_priv))
7170 dev_priv->display.init_clock_gating = bxt_init_clock_gating; 7230 dev_priv->display.init_clock_gating = bxt_init_clock_gating;
7171 else if (IS_BROADWELL(dev_priv)) 7231 else if (IS_BROADWELL(dev_priv))
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 04402bb9d26b..68c5af079ef8 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -913,24 +913,26 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
913{ 913{
914 struct drm_device *dev = engine->dev; 914 struct drm_device *dev = engine->dev;
915 struct drm_i915_private *dev_priv = dev->dev_private; 915 struct drm_i915_private *dev_priv = dev->dev_private;
916 uint32_t tmp;
917 int ret; 916 int ret;
918 917
919 /* WaEnableLbsSlaRetryTimerDecrement:skl */ 918 /* WaConextSwitchWithConcurrentTLBInvalidate:skl,bxt,kbl */
919 I915_WRITE(GEN9_CSFE_CHICKEN1_RCS, _MASKED_BIT_ENABLE(GEN9_PREEMPT_GPGPU_SYNC_SWITCH_DISABLE));
920
921 /* WaEnableLbsSlaRetryTimerDecrement:skl,bxt,kbl */
920 I915_WRITE(BDW_SCRATCH1, I915_READ(BDW_SCRATCH1) | 922 I915_WRITE(BDW_SCRATCH1, I915_READ(BDW_SCRATCH1) |
921 GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE); 923 GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE);
922 924
923 /* WaDisableKillLogic:bxt,skl */ 925 /* WaDisableKillLogic:bxt,skl,kbl */
924 I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | 926 I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
925 ECOCHK_DIS_TLB); 927 ECOCHK_DIS_TLB);
926 928
927 /* WaClearFlowControlGpgpuContextSave:skl,bxt */ 929 /* WaClearFlowControlGpgpuContextSave:skl,bxt,kbl */
928 /* WaDisablePartialInstShootdown:skl,bxt */ 930 /* WaDisablePartialInstShootdown:skl,bxt,kbl */
929 WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, 931 WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
930 FLOW_CONTROL_ENABLE | 932 FLOW_CONTROL_ENABLE |
931 PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE); 933 PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE);
932 934
933 /* Syncing dependencies between camera and graphics:skl,bxt */ 935 /* Syncing dependencies between camera and graphics:skl,bxt,kbl */
934 WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3, 936 WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
935 GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC); 937 GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC);
936 938
@@ -952,18 +954,18 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
952 */ 954 */
953 } 955 }
954 956
955 /* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt */ 957 /* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt,kbl */
956 /* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt */ 958 /* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt,kbl */
957 WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7, 959 WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
958 GEN9_ENABLE_YV12_BUGFIX | 960 GEN9_ENABLE_YV12_BUGFIX |
959 GEN9_ENABLE_GPGPU_PREEMPTION); 961 GEN9_ENABLE_GPGPU_PREEMPTION);
960 962
961 /* Wa4x4STCOptimizationDisable:skl,bxt */ 963 /* Wa4x4STCOptimizationDisable:skl,bxt,kbl */
962 /* WaDisablePartialResolveInVc:skl,bxt */ 964 /* WaDisablePartialResolveInVc:skl,bxt,kbl */
963 WA_SET_BIT_MASKED(CACHE_MODE_1, (GEN8_4x4_STC_OPTIMIZATION_DISABLE | 965 WA_SET_BIT_MASKED(CACHE_MODE_1, (GEN8_4x4_STC_OPTIMIZATION_DISABLE |
964 GEN9_PARTIAL_RESOLVE_IN_VC_DISABLE)); 966 GEN9_PARTIAL_RESOLVE_IN_VC_DISABLE));
965 967
966 /* WaCcsTlbPrefetchDisable:skl,bxt */ 968 /* WaCcsTlbPrefetchDisable:skl,bxt,kbl */
967 WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5, 969 WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5,
968 GEN9_CCS_TLB_PREFETCH_ENABLE); 970 GEN9_CCS_TLB_PREFETCH_ENABLE);
969 971
@@ -973,31 +975,57 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
973 WA_SET_BIT_MASKED(SLICE_ECO_CHICKEN0, 975 WA_SET_BIT_MASKED(SLICE_ECO_CHICKEN0,
974 PIXEL_MASK_CAMMING_DISABLE); 976 PIXEL_MASK_CAMMING_DISABLE);
975 977
976 /* WaForceContextSaveRestoreNonCoherent:skl,bxt */ 978 /* WaForceContextSaveRestoreNonCoherent:skl,bxt,kbl */
977 tmp = HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT; 979 WA_SET_BIT_MASKED(HDC_CHICKEN0,
978 if (IS_SKL_REVID(dev, SKL_REVID_F0, REVID_FOREVER) || 980 HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT |
979 IS_BXT_REVID(dev, BXT_REVID_B0, REVID_FOREVER)) 981 HDC_FORCE_CSR_NON_COHERENT_OVR_DISABLE);
980 tmp |= HDC_FORCE_CSR_NON_COHERENT_OVR_DISABLE; 982
981 WA_SET_BIT_MASKED(HDC_CHICKEN0, tmp); 983 /* WaForceEnableNonCoherent and WaDisableHDCInvalidation are
984 * both tied to WaForceContextSaveRestoreNonCoherent
985 * in some hsds for skl. We keep the tie for all gen9. The
986 * documentation is a bit hazy and so we want to get common behaviour,
987 * even though there is no clear evidence we would need both on kbl/bxt.
988 * This area has been source of system hangs so we play it safe
989 * and mimic the skl regardless of what bspec says.
990 *
991 * Use Force Non-Coherent whenever executing a 3D context. This
992 * is a workaround for a possible hang in the unlikely event
993 * a TLB invalidation occurs during a PSD flush.
994 */
982 995
983 /* WaDisableSamplerPowerBypassForSOPingPong:skl,bxt */ 996 /* WaForceEnableNonCoherent:skl,bxt,kbl */
984 if (IS_SKYLAKE(dev) || IS_BXT_REVID(dev, 0, BXT_REVID_B0)) 997 WA_SET_BIT_MASKED(HDC_CHICKEN0,
998 HDC_FORCE_NON_COHERENT);
999
1000 /* WaDisableHDCInvalidation:skl,bxt,kbl */
1001 I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
1002 BDW_DISABLE_HDC_INVALIDATION);
1003
1004 /* WaDisableSamplerPowerBypassForSOPingPong:skl,bxt,kbl */
1005 if (IS_SKYLAKE(dev_priv) ||
1006 IS_KABYLAKE(dev_priv) ||
1007 IS_BXT_REVID(dev_priv, 0, BXT_REVID_B0))
985 WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3, 1008 WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
986 GEN8_SAMPLER_POWER_BYPASS_DIS); 1009 GEN8_SAMPLER_POWER_BYPASS_DIS);
987 1010
988 /* WaDisableSTUnitPowerOptimization:skl,bxt */ 1011 /* WaDisableSTUnitPowerOptimization:skl,bxt,kbl */
989 WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE); 1012 WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE);
990 1013
991 /* WaOCLCoherentLineFlush:skl,bxt */ 1014 /* WaOCLCoherentLineFlush:skl,bxt,kbl */
992 I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) | 1015 I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) |
993 GEN8_LQSC_FLUSH_COHERENT_LINES)); 1016 GEN8_LQSC_FLUSH_COHERENT_LINES));
994 1017
995 /* WaEnablePreemptionGranularityControlByUMD:skl,bxt */ 1018 /* WaVFEStateAfterPipeControlwithMediaStateClear:skl,bxt */
1019 ret = wa_ring_whitelist_reg(engine, GEN9_CTX_PREEMPT_REG);
1020 if (ret)
1021 return ret;
1022
1023 /* WaEnablePreemptionGranularityControlByUMD:skl,bxt,kbl */
996 ret= wa_ring_whitelist_reg(engine, GEN8_CS_CHICKEN1); 1024 ret= wa_ring_whitelist_reg(engine, GEN8_CS_CHICKEN1);
997 if (ret) 1025 if (ret)
998 return ret; 1026 return ret;
999 1027
1000 /* WaAllowUMDToModifyHDCChicken1:skl,bxt */ 1028 /* WaAllowUMDToModifyHDCChicken1:skl,bxt,kbl */
1001 ret = wa_ring_whitelist_reg(engine, GEN8_HDC_CHICKEN1); 1029 ret = wa_ring_whitelist_reg(engine, GEN8_HDC_CHICKEN1);
1002 if (ret) 1030 if (ret)
1003 return ret; 1031 return ret;
@@ -1092,22 +1120,6 @@ static int skl_init_workarounds(struct intel_engine_cs *engine)
1092 WA_SET_BIT_MASKED(HIZ_CHICKEN, 1120 WA_SET_BIT_MASKED(HIZ_CHICKEN,
1093 BDW_HIZ_POWER_COMPILER_CLOCK_GATING_DISABLE); 1121 BDW_HIZ_POWER_COMPILER_CLOCK_GATING_DISABLE);
1094 1122
1095 /* This is tied to WaForceContextSaveRestoreNonCoherent */
1096 if (IS_SKL_REVID(dev, 0, REVID_FOREVER)) {
1097 /*
1098 *Use Force Non-Coherent whenever executing a 3D context. This
1099 * is a workaround for a possible hang in the unlikely event
1100 * a TLB invalidation occurs during a PSD flush.
1101 */
1102 /* WaForceEnableNonCoherent:skl */
1103 WA_SET_BIT_MASKED(HDC_CHICKEN0,
1104 HDC_FORCE_NON_COHERENT);
1105
1106 /* WaDisableHDCInvalidation:skl */
1107 I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
1108 BDW_DISABLE_HDC_INVALIDATION);
1109 }
1110
1111 /* WaBarrierPerformanceFixDisable:skl */ 1123 /* WaBarrierPerformanceFixDisable:skl */
1112 if (IS_SKL_REVID(dev, SKL_REVID_C0, SKL_REVID_D0)) 1124 if (IS_SKL_REVID(dev, SKL_REVID_C0, SKL_REVID_D0))
1113 WA_SET_BIT_MASKED(HDC_CHICKEN0, 1125 WA_SET_BIT_MASKED(HDC_CHICKEN0,
@@ -1120,6 +1132,9 @@ static int skl_init_workarounds(struct intel_engine_cs *engine)
1120 GEN7_HALF_SLICE_CHICKEN1, 1132 GEN7_HALF_SLICE_CHICKEN1,
1121 GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE); 1133 GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
1122 1134
1135 /* WaDisableGafsUnitClkGating:skl */
1136 WA_SET_BIT(GEN7_UCGCTL4, GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
1137
1123 /* WaDisableLSQCROPERFforOCL:skl */ 1138 /* WaDisableLSQCROPERFforOCL:skl */
1124 ret = wa_ring_whitelist_reg(engine, GEN8_L3SQCREG4); 1139 ret = wa_ring_whitelist_reg(engine, GEN8_L3SQCREG4);
1125 if (ret) 1140 if (ret)
@@ -1174,6 +1189,63 @@ static int bxt_init_workarounds(struct intel_engine_cs *engine)
1174 return ret; 1189 return ret;
1175 } 1190 }
1176 1191
1192 /* WaInsertDummyPushConstPs:bxt */
1193 if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_B0))
1194 WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
1195 GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
1196
1197 return 0;
1198}
1199
1200static int kbl_init_workarounds(struct intel_engine_cs *engine)
1201{
1202 struct drm_i915_private *dev_priv = engine->dev->dev_private;
1203 int ret;
1204
1205 ret = gen9_init_workarounds(engine);
1206 if (ret)
1207 return ret;
1208
1209 /* WaEnableGapsTsvCreditFix:kbl */
1210 I915_WRITE(GEN8_GARBCNTL, (I915_READ(GEN8_GARBCNTL) |
1211 GEN9_GAPS_TSV_CREDIT_DISABLE));
1212
1213 /* WaDisableDynamicCreditSharing:kbl */
1214 if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))
1215 WA_SET_BIT(GAMT_CHKN_BIT_REG,
1216 GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
1217
1218 /* WaDisableFenceDestinationToSLM:kbl (pre-prod) */
1219 if (IS_KBL_REVID(dev_priv, KBL_REVID_A0, KBL_REVID_A0))
1220 WA_SET_BIT_MASKED(HDC_CHICKEN0,
1221 HDC_FENCE_DEST_SLM_DISABLE);
1222
1223 /* GEN8_L3SQCREG4 has a dependency with WA batch so any new changes
1224 * involving this register should also be added to WA batch as required.
1225 */
1226 if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_E0))
1227 /* WaDisableLSQCROPERFforOCL:kbl */
1228 I915_WRITE(GEN8_L3SQCREG4, I915_READ(GEN8_L3SQCREG4) |
1229 GEN8_LQSC_RO_PERF_DIS);
1230
1231 /* WaInsertDummyPushConstPs:kbl */
1232 if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))
1233 WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
1234 GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
1235
1236 /* WaDisableGafsUnitClkGating:kbl */
1237 WA_SET_BIT(GEN7_UCGCTL4, GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
1238
1239 /* WaDisableSbeCacheDispatchPortSharing:kbl */
1240 WA_SET_BIT_MASKED(
1241 GEN7_HALF_SLICE_CHICKEN1,
1242 GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
1243
1244 /* WaDisableLSQCROPERFforOCL:kbl */
1245 ret = wa_ring_whitelist_reg(engine, GEN8_L3SQCREG4);
1246 if (ret)
1247 return ret;
1248
1177 return 0; 1249 return 0;
1178} 1250}
1179 1251
@@ -1199,6 +1271,9 @@ int init_workarounds_ring(struct intel_engine_cs *engine)
1199 if (IS_BROXTON(dev)) 1271 if (IS_BROXTON(dev))
1200 return bxt_init_workarounds(engine); 1272 return bxt_init_workarounds(engine);
1201 1273
1274 if (IS_KABYLAKE(dev_priv))
1275 return kbl_init_workarounds(engine);
1276
1202 return 0; 1277 return 0;
1203} 1278}
1204 1279
diff --git a/drivers/input/rmi4/rmi_f12.c b/drivers/input/rmi4/rmi_f12.c
index 8dd3fb5e1f94..88e91559c84e 100644
--- a/drivers/input/rmi4/rmi_f12.c
+++ b/drivers/input/rmi4/rmi_f12.c
@@ -66,7 +66,7 @@ static int rmi_f12_read_sensor_tuning(struct f12_data *f12)
66 struct rmi_device *rmi_dev = fn->rmi_dev; 66 struct rmi_device *rmi_dev = fn->rmi_dev;
67 int ret; 67 int ret;
68 int offset; 68 int offset;
69 u8 buf[14]; 69 u8 buf[15];
70 int pitch_x = 0; 70 int pitch_x = 0;
71 int pitch_y = 0; 71 int pitch_y = 0;
72 int clip_x_low = 0; 72 int clip_x_low = 0;
@@ -86,9 +86,10 @@ static int rmi_f12_read_sensor_tuning(struct f12_data *f12)
86 86
87 offset = rmi_register_desc_calc_reg_offset(&f12->control_reg_desc, 8); 87 offset = rmi_register_desc_calc_reg_offset(&f12->control_reg_desc, 8);
88 88
89 if (item->reg_size > 14) { 89 if (item->reg_size > sizeof(buf)) {
90 dev_err(&fn->dev, "F12 control8 should be 14 bytes, not: %ld\n", 90 dev_err(&fn->dev,
91 item->reg_size); 91 "F12 control8 should be no bigger than %zd bytes, not: %ld\n",
92 sizeof(buf), item->reg_size);
92 return -ENODEV; 93 return -ENODEV;
93 } 94 }
94 95
diff --git a/drivers/input/touchscreen/tsc2004.c b/drivers/input/touchscreen/tsc2004.c
index 7295c198aa08..6fe55d598fac 100644
--- a/drivers/input/touchscreen/tsc2004.c
+++ b/drivers/input/touchscreen/tsc2004.c
@@ -22,6 +22,11 @@
22#include <linux/regmap.h> 22#include <linux/regmap.h>
23#include "tsc200x-core.h" 23#include "tsc200x-core.h"
24 24
25static const struct input_id tsc2004_input_id = {
26 .bustype = BUS_I2C,
27 .product = 2004,
28};
29
25static int tsc2004_cmd(struct device *dev, u8 cmd) 30static int tsc2004_cmd(struct device *dev, u8 cmd)
26{ 31{
27 u8 tx = TSC200X_CMD | TSC200X_CMD_12BIT | cmd; 32 u8 tx = TSC200X_CMD | TSC200X_CMD_12BIT | cmd;
@@ -42,7 +47,7 @@ static int tsc2004_probe(struct i2c_client *i2c,
42 const struct i2c_device_id *id) 47 const struct i2c_device_id *id)
43 48
44{ 49{
45 return tsc200x_probe(&i2c->dev, i2c->irq, BUS_I2C, 50 return tsc200x_probe(&i2c->dev, i2c->irq, &tsc2004_input_id,
46 devm_regmap_init_i2c(i2c, &tsc200x_regmap_config), 51 devm_regmap_init_i2c(i2c, &tsc200x_regmap_config),
47 tsc2004_cmd); 52 tsc2004_cmd);
48} 53}
diff --git a/drivers/input/touchscreen/tsc2005.c b/drivers/input/touchscreen/tsc2005.c
index b9f593dfd2ef..f2c5f0e47f77 100644
--- a/drivers/input/touchscreen/tsc2005.c
+++ b/drivers/input/touchscreen/tsc2005.c
@@ -24,6 +24,11 @@
24#include <linux/regmap.h> 24#include <linux/regmap.h>
25#include "tsc200x-core.h" 25#include "tsc200x-core.h"
26 26
27static const struct input_id tsc2005_input_id = {
28 .bustype = BUS_SPI,
29 .product = 2005,
30};
31
27static int tsc2005_cmd(struct device *dev, u8 cmd) 32static int tsc2005_cmd(struct device *dev, u8 cmd)
28{ 33{
29 u8 tx = TSC200X_CMD | TSC200X_CMD_12BIT | cmd; 34 u8 tx = TSC200X_CMD | TSC200X_CMD_12BIT | cmd;
@@ -62,7 +67,7 @@ static int tsc2005_probe(struct spi_device *spi)
62 if (error) 67 if (error)
63 return error; 68 return error;
64 69
65 return tsc200x_probe(&spi->dev, spi->irq, BUS_SPI, 70 return tsc200x_probe(&spi->dev, spi->irq, &tsc2005_input_id,
66 devm_regmap_init_spi(spi, &tsc200x_regmap_config), 71 devm_regmap_init_spi(spi, &tsc200x_regmap_config),
67 tsc2005_cmd); 72 tsc2005_cmd);
68} 73}
diff --git a/drivers/input/touchscreen/tsc200x-core.c b/drivers/input/touchscreen/tsc200x-core.c
index 15240c1ee850..dfa7f1c4f545 100644
--- a/drivers/input/touchscreen/tsc200x-core.c
+++ b/drivers/input/touchscreen/tsc200x-core.c
@@ -450,7 +450,7 @@ static void tsc200x_close(struct input_dev *input)
450 mutex_unlock(&ts->mutex); 450 mutex_unlock(&ts->mutex);
451} 451}
452 452
453int tsc200x_probe(struct device *dev, int irq, __u16 bustype, 453int tsc200x_probe(struct device *dev, int irq, const struct input_id *tsc_id,
454 struct regmap *regmap, 454 struct regmap *regmap,
455 int (*tsc200x_cmd)(struct device *dev, u8 cmd)) 455 int (*tsc200x_cmd)(struct device *dev, u8 cmd))
456{ 456{
@@ -547,9 +547,18 @@ int tsc200x_probe(struct device *dev, int irq, __u16 bustype,
547 snprintf(ts->phys, sizeof(ts->phys), 547 snprintf(ts->phys, sizeof(ts->phys),
548 "%s/input-ts", dev_name(dev)); 548 "%s/input-ts", dev_name(dev));
549 549
550 input_dev->name = "TSC200X touchscreen"; 550 if (tsc_id->product == 2004) {
551 input_dev->name = "TSC200X touchscreen";
552 } else {
553 input_dev->name = devm_kasprintf(dev, GFP_KERNEL,
554 "TSC%04d touchscreen",
555 tsc_id->product);
556 if (!input_dev->name)
557 return -ENOMEM;
558 }
559
551 input_dev->phys = ts->phys; 560 input_dev->phys = ts->phys;
552 input_dev->id.bustype = bustype; 561 input_dev->id = *tsc_id;
553 input_dev->dev.parent = dev; 562 input_dev->dev.parent = dev;
554 input_dev->evbit[0] = BIT(EV_ABS) | BIT(EV_KEY); 563 input_dev->evbit[0] = BIT(EV_ABS) | BIT(EV_KEY);
555 input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); 564 input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
diff --git a/drivers/input/touchscreen/tsc200x-core.h b/drivers/input/touchscreen/tsc200x-core.h
index 7a482d102614..49a63a3c6840 100644
--- a/drivers/input/touchscreen/tsc200x-core.h
+++ b/drivers/input/touchscreen/tsc200x-core.h
@@ -70,7 +70,7 @@
70extern const struct regmap_config tsc200x_regmap_config; 70extern const struct regmap_config tsc200x_regmap_config;
71extern const struct dev_pm_ops tsc200x_pm_ops; 71extern const struct dev_pm_ops tsc200x_pm_ops;
72 72
73int tsc200x_probe(struct device *dev, int irq, __u16 bustype, 73int tsc200x_probe(struct device *dev, int irq, const struct input_id *tsc_id,
74 struct regmap *regmap, 74 struct regmap *regmap,
75 int (*tsc200x_cmd)(struct device *dev, u8 cmd)); 75 int (*tsc200x_cmd)(struct device *dev, u8 cmd));
76int tsc200x_remove(struct device *dev); 76int tsc200x_remove(struct device *dev);
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index e62fde3ac431..c5472e3c9231 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -355,8 +355,10 @@ static struct mmc_blk_ioc_data *mmc_blk_ioctl_copy_from_user(
355 goto idata_err; 355 goto idata_err;
356 } 356 }
357 357
358 if (!idata->buf_bytes) 358 if (!idata->buf_bytes) {
359 idata->buf = NULL;
359 return idata; 360 return idata;
361 }
360 362
361 idata->buf = kmalloc(idata->buf_bytes, GFP_KERNEL); 363 idata->buf = kmalloc(idata->buf_bytes, GFP_KERNEL);
362 if (!idata->buf) { 364 if (!idata->buf) {
@@ -1786,8 +1788,8 @@ static void mmc_blk_packed_hdr_wrq_prep(struct mmc_queue_req *mqrq,
1786 1788
1787 packed_cmd_hdr = packed->cmd_hdr; 1789 packed_cmd_hdr = packed->cmd_hdr;
1788 memset(packed_cmd_hdr, 0, sizeof(packed->cmd_hdr)); 1790 memset(packed_cmd_hdr, 0, sizeof(packed->cmd_hdr));
1789 packed_cmd_hdr[0] = (packed->nr_entries << 16) | 1791 packed_cmd_hdr[0] = cpu_to_le32((packed->nr_entries << 16) |
1790 (PACKED_CMD_WR << 8) | PACKED_CMD_VER; 1792 (PACKED_CMD_WR << 8) | PACKED_CMD_VER);
1791 hdr_blocks = mmc_large_sector(card) ? 8 : 1; 1793 hdr_blocks = mmc_large_sector(card) ? 8 : 1;
1792 1794
1793 /* 1795 /*
@@ -1801,14 +1803,14 @@ static void mmc_blk_packed_hdr_wrq_prep(struct mmc_queue_req *mqrq,
1801 ((brq->data.blocks * brq->data.blksz) >= 1803 ((brq->data.blocks * brq->data.blksz) >=
1802 card->ext_csd.data_tag_unit_size); 1804 card->ext_csd.data_tag_unit_size);
1803 /* Argument of CMD23 */ 1805 /* Argument of CMD23 */
1804 packed_cmd_hdr[(i * 2)] = 1806 packed_cmd_hdr[(i * 2)] = cpu_to_le32(
1805 (do_rel_wr ? MMC_CMD23_ARG_REL_WR : 0) | 1807 (do_rel_wr ? MMC_CMD23_ARG_REL_WR : 0) |
1806 (do_data_tag ? MMC_CMD23_ARG_TAG_REQ : 0) | 1808 (do_data_tag ? MMC_CMD23_ARG_TAG_REQ : 0) |
1807 blk_rq_sectors(prq); 1809 blk_rq_sectors(prq));
1808 /* Argument of CMD18 or CMD25 */ 1810 /* Argument of CMD18 or CMD25 */
1809 packed_cmd_hdr[((i * 2)) + 1] = 1811 packed_cmd_hdr[((i * 2)) + 1] = cpu_to_le32(
1810 mmc_card_blockaddr(card) ? 1812 mmc_card_blockaddr(card) ?
1811 blk_rq_pos(prq) : blk_rq_pos(prq) << 9; 1813 blk_rq_pos(prq) : blk_rq_pos(prq) << 9);
1812 packed->blocks += blk_rq_sectors(prq); 1814 packed->blocks += blk_rq_sectors(prq);
1813 i++; 1815 i++;
1814 } 1816 }
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index 86fac3e86833..c763b404510f 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -789,14 +789,16 @@ static int pxamci_probe(struct platform_device *pdev)
789 gpio_direction_output(gpio_power, 789 gpio_direction_output(gpio_power,
790 host->pdata->gpio_power_invert); 790 host->pdata->gpio_power_invert);
791 } 791 }
792 if (gpio_is_valid(gpio_ro)) 792 if (gpio_is_valid(gpio_ro)) {
793 ret = mmc_gpio_request_ro(mmc, gpio_ro); 793 ret = mmc_gpio_request_ro(mmc, gpio_ro);
794 if (ret) { 794 if (ret) {
795 dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n", gpio_ro); 795 dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n",
796 goto out; 796 gpio_ro);
797 } else { 797 goto out;
798 mmc->caps2 |= host->pdata->gpio_card_ro_invert ? 798 } else {
799 0 : MMC_CAP2_RO_ACTIVE_HIGH; 799 mmc->caps2 |= host->pdata->gpio_card_ro_invert ?
800 0 : MMC_CAP2_RO_ACTIVE_HIGH;
801 }
800 } 802 }
801 803
802 if (gpio_is_valid(gpio_cd)) 804 if (gpio_is_valid(gpio_cd))
diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
index 1a51584a382b..d5fb55c0a9d9 100644
--- a/drivers/nvme/host/core.c
+++ b/drivers/nvme/host/core.c
@@ -1394,19 +1394,22 @@ static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
1394 return nsa->ns_id - nsb->ns_id; 1394 return nsa->ns_id - nsb->ns_id;
1395} 1395}
1396 1396
1397static struct nvme_ns *nvme_find_ns(struct nvme_ctrl *ctrl, unsigned nsid) 1397static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1398{ 1398{
1399 struct nvme_ns *ns; 1399 struct nvme_ns *ns, *ret = NULL;
1400
1401 lockdep_assert_held(&ctrl->namespaces_mutex);
1402 1400
1401 mutex_lock(&ctrl->namespaces_mutex);
1403 list_for_each_entry(ns, &ctrl->namespaces, list) { 1402 list_for_each_entry(ns, &ctrl->namespaces, list) {
1404 if (ns->ns_id == nsid) 1403 if (ns->ns_id == nsid) {
1405 return ns; 1404 kref_get(&ns->kref);
1405 ret = ns;
1406 break;
1407 }
1406 if (ns->ns_id > nsid) 1408 if (ns->ns_id > nsid)
1407 break; 1409 break;
1408 } 1410 }
1409 return NULL; 1411 mutex_unlock(&ctrl->namespaces_mutex);
1412 return ret;
1410} 1413}
1411 1414
1412static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid) 1415static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
@@ -1415,8 +1418,6 @@ static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1415 struct gendisk *disk; 1418 struct gendisk *disk;
1416 int node = dev_to_node(ctrl->dev); 1419 int node = dev_to_node(ctrl->dev);
1417 1420
1418 lockdep_assert_held(&ctrl->namespaces_mutex);
1419
1420 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 1421 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
1421 if (!ns) 1422 if (!ns)
1422 return; 1423 return;
@@ -1457,7 +1458,10 @@ static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1457 if (nvme_revalidate_disk(ns->disk)) 1458 if (nvme_revalidate_disk(ns->disk))
1458 goto out_free_disk; 1459 goto out_free_disk;
1459 1460
1460 list_add_tail_rcu(&ns->list, &ctrl->namespaces); 1461 mutex_lock(&ctrl->namespaces_mutex);
1462 list_add_tail(&ns->list, &ctrl->namespaces);
1463 mutex_unlock(&ctrl->namespaces_mutex);
1464
1461 kref_get(&ctrl->kref); 1465 kref_get(&ctrl->kref);
1462 if (ns->type == NVME_NS_LIGHTNVM) 1466 if (ns->type == NVME_NS_LIGHTNVM)
1463 return; 1467 return;
@@ -1480,8 +1484,6 @@ static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1480 1484
1481static void nvme_ns_remove(struct nvme_ns *ns) 1485static void nvme_ns_remove(struct nvme_ns *ns)
1482{ 1486{
1483 lockdep_assert_held(&ns->ctrl->namespaces_mutex);
1484
1485 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 1487 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
1486 return; 1488 return;
1487 1489
@@ -1494,8 +1496,11 @@ static void nvme_ns_remove(struct nvme_ns *ns)
1494 blk_mq_abort_requeue_list(ns->queue); 1496 blk_mq_abort_requeue_list(ns->queue);
1495 blk_cleanup_queue(ns->queue); 1497 blk_cleanup_queue(ns->queue);
1496 } 1498 }
1499
1500 mutex_lock(&ns->ctrl->namespaces_mutex);
1497 list_del_init(&ns->list); 1501 list_del_init(&ns->list);
1498 synchronize_rcu(); 1502 mutex_unlock(&ns->ctrl->namespaces_mutex);
1503
1499 nvme_put_ns(ns); 1504 nvme_put_ns(ns);
1500} 1505}
1501 1506
@@ -1503,10 +1508,11 @@ static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1503{ 1508{
1504 struct nvme_ns *ns; 1509 struct nvme_ns *ns;
1505 1510
1506 ns = nvme_find_ns(ctrl, nsid); 1511 ns = nvme_find_get_ns(ctrl, nsid);
1507 if (ns) { 1512 if (ns) {
1508 if (revalidate_disk(ns->disk)) 1513 if (revalidate_disk(ns->disk))
1509 nvme_ns_remove(ns); 1514 nvme_ns_remove(ns);
1515 nvme_put_ns(ns);
1510 } else 1516 } else
1511 nvme_alloc_ns(ctrl, nsid); 1517 nvme_alloc_ns(ctrl, nsid);
1512} 1518}
@@ -1535,9 +1541,11 @@ static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
1535 nvme_validate_ns(ctrl, nsid); 1541 nvme_validate_ns(ctrl, nsid);
1536 1542
1537 while (++prev < nsid) { 1543 while (++prev < nsid) {
1538 ns = nvme_find_ns(ctrl, prev); 1544 ns = nvme_find_get_ns(ctrl, prev);
1539 if (ns) 1545 if (ns) {
1540 nvme_ns_remove(ns); 1546 nvme_ns_remove(ns);
1547 nvme_put_ns(ns);
1548 }
1541 } 1549 }
1542 } 1550 }
1543 nn -= j; 1551 nn -= j;
@@ -1552,8 +1560,6 @@ static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
1552 struct nvme_ns *ns, *next; 1560 struct nvme_ns *ns, *next;
1553 unsigned i; 1561 unsigned i;
1554 1562
1555 lockdep_assert_held(&ctrl->namespaces_mutex);
1556
1557 for (i = 1; i <= nn; i++) 1563 for (i = 1; i <= nn; i++)
1558 nvme_validate_ns(ctrl, i); 1564 nvme_validate_ns(ctrl, i);
1559 1565
@@ -1576,7 +1582,6 @@ static void nvme_scan_work(struct work_struct *work)
1576 if (nvme_identify_ctrl(ctrl, &id)) 1582 if (nvme_identify_ctrl(ctrl, &id))
1577 return; 1583 return;
1578 1584
1579 mutex_lock(&ctrl->namespaces_mutex);
1580 nn = le32_to_cpu(id->nn); 1585 nn = le32_to_cpu(id->nn);
1581 if (ctrl->vs >= NVME_VS(1, 1) && 1586 if (ctrl->vs >= NVME_VS(1, 1) &&
1582 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) { 1587 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
@@ -1585,6 +1590,7 @@ static void nvme_scan_work(struct work_struct *work)
1585 } 1590 }
1586 nvme_scan_ns_sequential(ctrl, nn); 1591 nvme_scan_ns_sequential(ctrl, nn);
1587 done: 1592 done:
1593 mutex_lock(&ctrl->namespaces_mutex);
1588 list_sort(NULL, &ctrl->namespaces, ns_cmp); 1594 list_sort(NULL, &ctrl->namespaces, ns_cmp);
1589 mutex_unlock(&ctrl->namespaces_mutex); 1595 mutex_unlock(&ctrl->namespaces_mutex);
1590 kfree(id); 1596 kfree(id);
@@ -1604,6 +1610,11 @@ void nvme_queue_scan(struct nvme_ctrl *ctrl)
1604} 1610}
1605EXPORT_SYMBOL_GPL(nvme_queue_scan); 1611EXPORT_SYMBOL_GPL(nvme_queue_scan);
1606 1612
1613/*
1614 * This function iterates the namespace list unlocked to allow recovery from
1615 * controller failure. It is up to the caller to ensure the namespace list is
1616 * not modified by scan work while this function is executing.
1617 */
1607void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 1618void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
1608{ 1619{
1609 struct nvme_ns *ns, *next; 1620 struct nvme_ns *ns, *next;
@@ -1617,10 +1628,8 @@ void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
1617 if (ctrl->state == NVME_CTRL_DEAD) 1628 if (ctrl->state == NVME_CTRL_DEAD)
1618 nvme_kill_queues(ctrl); 1629 nvme_kill_queues(ctrl);
1619 1630
1620 mutex_lock(&ctrl->namespaces_mutex);
1621 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) 1631 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
1622 nvme_ns_remove(ns); 1632 nvme_ns_remove(ns);
1623 mutex_unlock(&ctrl->namespaces_mutex);
1624} 1633}
1625EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 1634EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
1626 1635
@@ -1791,11 +1800,8 @@ void nvme_kill_queues(struct nvme_ctrl *ctrl)
1791{ 1800{
1792 struct nvme_ns *ns; 1801 struct nvme_ns *ns;
1793 1802
1794 rcu_read_lock(); 1803 mutex_lock(&ctrl->namespaces_mutex);
1795 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) { 1804 list_for_each_entry(ns, &ctrl->namespaces, list) {
1796 if (!kref_get_unless_zero(&ns->kref))
1797 continue;
1798
1799 /* 1805 /*
1800 * Revalidating a dead namespace sets capacity to 0. This will 1806 * Revalidating a dead namespace sets capacity to 0. This will
1801 * end buffered writers dirtying pages that can't be synced. 1807 * end buffered writers dirtying pages that can't be synced.
@@ -1806,10 +1812,8 @@ void nvme_kill_queues(struct nvme_ctrl *ctrl)
1806 blk_set_queue_dying(ns->queue); 1812 blk_set_queue_dying(ns->queue);
1807 blk_mq_abort_requeue_list(ns->queue); 1813 blk_mq_abort_requeue_list(ns->queue);
1808 blk_mq_start_stopped_hw_queues(ns->queue, true); 1814 blk_mq_start_stopped_hw_queues(ns->queue, true);
1809
1810 nvme_put_ns(ns);
1811 } 1815 }
1812 rcu_read_unlock(); 1816 mutex_unlock(&ctrl->namespaces_mutex);
1813} 1817}
1814EXPORT_SYMBOL_GPL(nvme_kill_queues); 1818EXPORT_SYMBOL_GPL(nvme_kill_queues);
1815 1819
@@ -1817,8 +1821,8 @@ void nvme_stop_queues(struct nvme_ctrl *ctrl)
1817{ 1821{
1818 struct nvme_ns *ns; 1822 struct nvme_ns *ns;
1819 1823
1820 rcu_read_lock(); 1824 mutex_lock(&ctrl->namespaces_mutex);
1821 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) { 1825 list_for_each_entry(ns, &ctrl->namespaces, list) {
1822 spin_lock_irq(ns->queue->queue_lock); 1826 spin_lock_irq(ns->queue->queue_lock);
1823 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue); 1827 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
1824 spin_unlock_irq(ns->queue->queue_lock); 1828 spin_unlock_irq(ns->queue->queue_lock);
@@ -1826,7 +1830,7 @@ void nvme_stop_queues(struct nvme_ctrl *ctrl)
1826 blk_mq_cancel_requeue_work(ns->queue); 1830 blk_mq_cancel_requeue_work(ns->queue);
1827 blk_mq_stop_hw_queues(ns->queue); 1831 blk_mq_stop_hw_queues(ns->queue);
1828 } 1832 }
1829 rcu_read_unlock(); 1833 mutex_unlock(&ctrl->namespaces_mutex);
1830} 1834}
1831EXPORT_SYMBOL_GPL(nvme_stop_queues); 1835EXPORT_SYMBOL_GPL(nvme_stop_queues);
1832 1836
@@ -1834,13 +1838,13 @@ void nvme_start_queues(struct nvme_ctrl *ctrl)
1834{ 1838{
1835 struct nvme_ns *ns; 1839 struct nvme_ns *ns;
1836 1840
1837 rcu_read_lock(); 1841 mutex_lock(&ctrl->namespaces_mutex);
1838 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) { 1842 list_for_each_entry(ns, &ctrl->namespaces, list) {
1839 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue); 1843 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
1840 blk_mq_start_stopped_hw_queues(ns->queue, true); 1844 blk_mq_start_stopped_hw_queues(ns->queue, true);
1841 blk_mq_kick_requeue_list(ns->queue); 1845 blk_mq_kick_requeue_list(ns->queue);
1842 } 1846 }
1843 rcu_read_unlock(); 1847 mutex_unlock(&ctrl->namespaces_mutex);
1844} 1848}
1845EXPORT_SYMBOL_GPL(nvme_start_queues); 1849EXPORT_SYMBOL_GPL(nvme_start_queues);
1846 1850
diff --git a/drivers/tty/vt/keyboard.c b/drivers/tty/vt/keyboard.c
index f973bfce5d08..1e93a37e27f0 100644
--- a/drivers/tty/vt/keyboard.c
+++ b/drivers/tty/vt/keyboard.c
@@ -366,34 +366,22 @@ static void to_utf8(struct vc_data *vc, uint c)
366 366
367static void do_compute_shiftstate(void) 367static void do_compute_shiftstate(void)
368{ 368{
369 unsigned int i, j, k, sym, val; 369 unsigned int k, sym, val;
370 370
371 shift_state = 0; 371 shift_state = 0;
372 memset(shift_down, 0, sizeof(shift_down)); 372 memset(shift_down, 0, sizeof(shift_down));
373 373
374 for (i = 0; i < ARRAY_SIZE(key_down); i++) { 374 for_each_set_bit(k, key_down, min(NR_KEYS, KEY_CNT)) {
375 375 sym = U(key_maps[0][k]);
376 if (!key_down[i]) 376 if (KTYP(sym) != KT_SHIFT && KTYP(sym) != KT_SLOCK)
377 continue; 377 continue;
378 378
379 k = i * BITS_PER_LONG; 379 val = KVAL(sym);
380 380 if (val == KVAL(K_CAPSSHIFT))
381 for (j = 0; j < BITS_PER_LONG; j++, k++) { 381 val = KVAL(K_SHIFT);
382
383 if (!test_bit(k, key_down))
384 continue;
385 382
386 sym = U(key_maps[0][k]); 383 shift_down[val]++;
387 if (KTYP(sym) != KT_SHIFT && KTYP(sym) != KT_SLOCK) 384 shift_state |= BIT(val);
388 continue;
389
390 val = KVAL(sym);
391 if (val == KVAL(K_CAPSSHIFT))
392 val = KVAL(K_SHIFT);
393
394 shift_down[val]++;
395 shift_state |= (1 << val);
396 }
397 } 385 }
398} 386}
399 387
diff --git a/sound/core/control.c b/sound/core/control.c
index a85d45595d02..b4fe9b002512 100644
--- a/sound/core/control.c
+++ b/sound/core/control.c
@@ -160,6 +160,8 @@ void snd_ctl_notify(struct snd_card *card, unsigned int mask,
160 160
161 if (snd_BUG_ON(!card || !id)) 161 if (snd_BUG_ON(!card || !id))
162 return; 162 return;
163 if (card->shutdown)
164 return;
163 read_lock(&card->ctl_files_rwlock); 165 read_lock(&card->ctl_files_rwlock);
164#if IS_ENABLED(CONFIG_SND_MIXER_OSS) 166#if IS_ENABLED(CONFIG_SND_MIXER_OSS)
165 card->mixer_oss_change_count++; 167 card->mixer_oss_change_count++;
diff --git a/sound/core/pcm.c b/sound/core/pcm.c
index 308c9ecf73db..8e980aa678d0 100644
--- a/sound/core/pcm.c
+++ b/sound/core/pcm.c
@@ -849,6 +849,14 @@ int snd_pcm_new_internal(struct snd_card *card, const char *id, int device,
849} 849}
850EXPORT_SYMBOL(snd_pcm_new_internal); 850EXPORT_SYMBOL(snd_pcm_new_internal);
851 851
852static void free_chmap(struct snd_pcm_str *pstr)
853{
854 if (pstr->chmap_kctl) {
855 snd_ctl_remove(pstr->pcm->card, pstr->chmap_kctl);
856 pstr->chmap_kctl = NULL;
857 }
858}
859
852static void snd_pcm_free_stream(struct snd_pcm_str * pstr) 860static void snd_pcm_free_stream(struct snd_pcm_str * pstr)
853{ 861{
854 struct snd_pcm_substream *substream, *substream_next; 862 struct snd_pcm_substream *substream, *substream_next;
@@ -871,6 +879,7 @@ static void snd_pcm_free_stream(struct snd_pcm_str * pstr)
871 kfree(setup); 879 kfree(setup);
872 } 880 }
873#endif 881#endif
882 free_chmap(pstr);
874 if (pstr->substream_count) 883 if (pstr->substream_count)
875 put_device(&pstr->dev); 884 put_device(&pstr->dev);
876} 885}
@@ -1135,10 +1144,7 @@ static int snd_pcm_dev_disconnect(struct snd_device *device)
1135 for (cidx = 0; cidx < 2; cidx++) { 1144 for (cidx = 0; cidx < 2; cidx++) {
1136 if (!pcm->internal) 1145 if (!pcm->internal)
1137 snd_unregister_device(&pcm->streams[cidx].dev); 1146 snd_unregister_device(&pcm->streams[cidx].dev);
1138 if (pcm->streams[cidx].chmap_kctl) { 1147 free_chmap(&pcm->streams[cidx]);
1139 snd_ctl_remove(pcm->card, pcm->streams[cidx].chmap_kctl);
1140 pcm->streams[cidx].chmap_kctl = NULL;
1141 }
1142 } 1148 }
1143 mutex_unlock(&pcm->open_mutex); 1149 mutex_unlock(&pcm->open_mutex);
1144 mutex_unlock(&register_mutex); 1150 mutex_unlock(&register_mutex);
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index e320c44714b1..6f8ea13323c1 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1218,8 +1218,10 @@ static int azx_free(struct azx *chip)
1218 if (use_vga_switcheroo(hda)) { 1218 if (use_vga_switcheroo(hda)) {
1219 if (chip->disabled && hda->probe_continued) 1219 if (chip->disabled && hda->probe_continued)
1220 snd_hda_unlock_devices(&chip->bus); 1220 snd_hda_unlock_devices(&chip->bus);
1221 if (hda->vga_switcheroo_registered) 1221 if (hda->vga_switcheroo_registered) {
1222 vga_switcheroo_unregister_client(chip->pci); 1222 vga_switcheroo_unregister_client(chip->pci);
1223 vga_switcheroo_fini_domain_pm_ops(chip->card->dev);
1224 }
1223 } 1225 }
1224 1226
1225 if (bus->chip_init) { 1227 if (bus->chip_init) {
@@ -2267,6 +2269,8 @@ static const struct pci_device_id azx_ids[] = {
2267 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS }, 2269 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2268 { PCI_DEVICE(0x1002, 0x157a), 2270 { PCI_DEVICE(0x1002, 0x157a),
2269 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS }, 2271 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2272 { PCI_DEVICE(0x1002, 0x15b3),
2273 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2270 { PCI_DEVICE(0x1002, 0x793b), 2274 { PCI_DEVICE(0x1002, 0x793b),
2271 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI }, 2275 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2272 { PCI_DEVICE(0x1002, 0x7919), 2276 { PCI_DEVICE(0x1002, 0x7919),
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index 5fac786e4982..abcb5a6a1cd9 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -5738,7 +5738,6 @@ static const struct hda_model_fixup alc269_fixup_models[] = {
5738 {} 5738 {}
5739}; 5739};
5740#define ALC225_STANDARD_PINS \ 5740#define ALC225_STANDARD_PINS \
5741 {0x12, 0xb7a60130}, \
5742 {0x21, 0x04211020} 5741 {0x21, 0x04211020}
5743 5742
5744#define ALC256_STANDARD_PINS \ 5743#define ALC256_STANDARD_PINS \
@@ -5763,10 +5762,24 @@ static const struct hda_model_fixup alc269_fixup_models[] = {
5763static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = { 5762static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = {
5764 SND_HDA_PIN_QUIRK(0x10ec0225, 0x1028, "Dell", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE, 5763 SND_HDA_PIN_QUIRK(0x10ec0225, 0x1028, "Dell", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE,
5765 ALC225_STANDARD_PINS, 5764 ALC225_STANDARD_PINS,
5765 {0x12, 0xb7a60130},
5766 {0x14, 0x901701a0}), 5766 {0x14, 0x901701a0}),
5767 SND_HDA_PIN_QUIRK(0x10ec0225, 0x1028, "Dell", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE, 5767 SND_HDA_PIN_QUIRK(0x10ec0225, 0x1028, "Dell", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE,
5768 ALC225_STANDARD_PINS, 5768 ALC225_STANDARD_PINS,
5769 {0x12, 0xb7a60130},
5769 {0x14, 0x901701b0}), 5770 {0x14, 0x901701b0}),
5771 SND_HDA_PIN_QUIRK(0x10ec0225, 0x1028, "Dell", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE,
5772 ALC225_STANDARD_PINS,
5773 {0x12, 0xb7a60150},
5774 {0x14, 0x901701a0}),
5775 SND_HDA_PIN_QUIRK(0x10ec0225, 0x1028, "Dell", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE,
5776 ALC225_STANDARD_PINS,
5777 {0x12, 0xb7a60150},
5778 {0x14, 0x901701b0}),
5779 SND_HDA_PIN_QUIRK(0x10ec0225, 0x1028, "Dell", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE,
5780 ALC225_STANDARD_PINS,
5781 {0x12, 0xb7a60130},
5782 {0x1b, 0x90170110}),
5770 SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE, 5783 SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE,
5771 {0x14, 0x90170110}, 5784 {0x14, 0x90170110},
5772 {0x21, 0x02211020}), 5785 {0x21, 0x02211020}),
diff --git a/sound/usb/card.c b/sound/usb/card.c
index 69860da473ea..9e5276d6dda0 100644
--- a/sound/usb/card.c
+++ b/sound/usb/card.c
@@ -556,7 +556,6 @@ static int usb_audio_probe(struct usb_interface *intf,
556 goto __error; 556 goto __error;
557 } 557 }
558 chip = usb_chip[i]; 558 chip = usb_chip[i];
559 dev_set_drvdata(&dev->dev, chip);
560 atomic_inc(&chip->active); /* avoid autopm */ 559 atomic_inc(&chip->active); /* avoid autopm */
561 break; 560 break;
562 } 561 }
@@ -582,6 +581,7 @@ static int usb_audio_probe(struct usb_interface *intf,
582 goto __error; 581 goto __error;
583 } 582 }
584 } 583 }
584 dev_set_drvdata(&dev->dev, chip);
585 585
586 /* 586 /*
587 * For devices with more than one control interface, we assume the 587 * For devices with more than one control interface, we assume the
generated by cgit v1.2.2 (git 2.25.0) at 2025-06-11 21:54:57 -0400