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-rw-r--r--drivers/clk/qcom/gcc-msm8996.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
index 90ac99389075..9f35b3fe1d97 100644
--- a/drivers/clk/qcom/gcc-msm8996.c
+++ b/drivers/clk/qcom/gcc-msm8996.c
@@ -1418,6 +1418,7 @@ static struct clk_branch gcc_usb3_phy_aux_clk = {
1418 1418
1419static struct clk_branch gcc_usb3_phy_pipe_clk = { 1419static struct clk_branch gcc_usb3_phy_pipe_clk = {
1420 .halt_reg = 0x50004, 1420 .halt_reg = 0x50004,
1421 .halt_check = BRANCH_HALT_SKIP,
1421 .clkr = { 1422 .clkr = {
1422 .enable_reg = 0x50004, 1423 .enable_reg = 0x50004,
1423 .enable_mask = BIT(0), 1424 .enable_mask = BIT(0),
@@ -2472,6 +2473,7 @@ static struct clk_branch gcc_pcie_0_aux_clk = {
2472 2473
2473static struct clk_branch gcc_pcie_0_pipe_clk = { 2474static struct clk_branch gcc_pcie_0_pipe_clk = {
2474 .halt_reg = 0x6b018, 2475 .halt_reg = 0x6b018,
2476 .halt_check = BRANCH_HALT_SKIP,
2475 .clkr = { 2477 .clkr = {
2476 .enable_reg = 0x6b018, 2478 .enable_reg = 0x6b018,
2477 .enable_mask = BIT(0), 2479 .enable_mask = BIT(0),
@@ -2547,6 +2549,7 @@ static struct clk_branch gcc_pcie_1_aux_clk = {
2547 2549
2548static struct clk_branch gcc_pcie_1_pipe_clk = { 2550static struct clk_branch gcc_pcie_1_pipe_clk = {
2549 .halt_reg = 0x6d018, 2551 .halt_reg = 0x6d018,
2552 .halt_check = BRANCH_HALT_SKIP,
2550 .clkr = { 2553 .clkr = {
2551 .enable_reg = 0x6d018, 2554 .enable_reg = 0x6d018,
2552 .enable_mask = BIT(0), 2555 .enable_mask = BIT(0),
@@ -2622,6 +2625,7 @@ static struct clk_branch gcc_pcie_2_aux_clk = {
2622 2625
2623static struct clk_branch gcc_pcie_2_pipe_clk = { 2626static struct clk_branch gcc_pcie_2_pipe_clk = {
2624 .halt_reg = 0x6e018, 2627 .halt_reg = 0x6e018,
2628 .halt_check = BRANCH_HALT_SKIP,
2625 .clkr = { 2629 .clkr = {
2626 .enable_reg = 0x6e018, 2630 .enable_reg = 0x6e018,
2627 .enable_mask = BIT(0), 2631 .enable_mask = BIT(0),
@@ -2792,6 +2796,7 @@ static struct clk_branch gcc_ufs_tx_symbol_0_clk = {
2792 2796
2793static struct clk_branch gcc_ufs_rx_symbol_0_clk = { 2797static struct clk_branch gcc_ufs_rx_symbol_0_clk = {
2794 .halt_reg = 0x7501c, 2798 .halt_reg = 0x7501c,
2799 .halt_check = BRANCH_HALT_SKIP,
2795 .clkr = { 2800 .clkr = {
2796 .enable_reg = 0x7501c, 2801 .enable_reg = 0x7501c,
2797 .enable_mask = BIT(0), 2802 .enable_mask = BIT(0),
@@ -2807,6 +2812,7 @@ static struct clk_branch gcc_ufs_rx_symbol_0_clk = {
2807 2812
2808static struct clk_branch gcc_ufs_rx_symbol_1_clk = { 2813static struct clk_branch gcc_ufs_rx_symbol_1_clk = {
2809 .halt_reg = 0x75020, 2814 .halt_reg = 0x75020,
2815 .halt_check = BRANCH_HALT_SKIP,
2810 .clkr = { 2816 .clkr = {
2811 .enable_reg = 0x75020, 2817 .enable_reg = 0x75020,
2812 .enable_mask = BIT(0), 2818 .enable_mask = BIT(0),