diff options
4 files changed, 70 insertions, 96 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c index 8ad4e6960efd..4714b5b59825 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c | |||
| @@ -39,6 +39,50 @@ uint16_t convert_to_vddc(uint8_t vid) | |||
| 39 | return (uint16_t) ((6200 - (vid * 25)) / VOLTAGE_SCALE); | 39 | return (uint16_t) ((6200 - (vid * 25)) / VOLTAGE_SCALE); |
| 40 | } | 40 | } |
| 41 | 41 | ||
| 42 | int phm_copy_clock_limits_array( | ||
| 43 | struct pp_hwmgr *hwmgr, | ||
| 44 | uint32_t **pptable_info_array, | ||
| 45 | const uint32_t *pptable_array, | ||
| 46 | uint32_t power_saving_clock_count) | ||
| 47 | { | ||
| 48 | uint32_t array_size, i; | ||
| 49 | uint32_t *table; | ||
| 50 | |||
| 51 | array_size = sizeof(uint32_t) * power_saving_clock_count; | ||
| 52 | table = kzalloc(array_size, GFP_KERNEL); | ||
| 53 | if (NULL == table) | ||
| 54 | return -ENOMEM; | ||
| 55 | |||
| 56 | for (i = 0; i < power_saving_clock_count; i++) | ||
| 57 | table[i] = le32_to_cpu(pptable_array[i]); | ||
| 58 | |||
| 59 | *pptable_info_array = table; | ||
| 60 | |||
| 61 | return 0; | ||
| 62 | } | ||
| 63 | |||
| 64 | int phm_copy_overdrive_settings_limits_array( | ||
| 65 | struct pp_hwmgr *hwmgr, | ||
| 66 | uint32_t **pptable_info_array, | ||
| 67 | const uint32_t *pptable_array, | ||
| 68 | uint32_t od_setting_count) | ||
| 69 | { | ||
| 70 | uint32_t array_size, i; | ||
| 71 | uint32_t *table; | ||
| 72 | |||
| 73 | array_size = sizeof(uint32_t) * od_setting_count; | ||
| 74 | table = kzalloc(array_size, GFP_KERNEL); | ||
| 75 | if (NULL == table) | ||
| 76 | return -ENOMEM; | ||
| 77 | |||
| 78 | for (i = 0; i < od_setting_count; i++) | ||
| 79 | table[i] = le32_to_cpu(pptable_array[i]); | ||
| 80 | |||
| 81 | *pptable_info_array = table; | ||
| 82 | |||
| 83 | return 0; | ||
| 84 | } | ||
| 85 | |||
| 42 | uint32_t phm_set_field_to_u32(u32 offset, u32 original_data, u32 field, u32 size) | 86 | uint32_t phm_set_field_to_u32(u32 offset, u32 original_data, u32 field, u32 size) |
| 43 | { | 87 | { |
| 44 | u32 mask = 0; | 88 | u32 mask = 0; |
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h index 5454289d5226..ad33983a8064 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h | |||
| @@ -47,6 +47,18 @@ struct watermarks { | |||
| 47 | uint32_t padding[7]; | 47 | uint32_t padding[7]; |
| 48 | }; | 48 | }; |
| 49 | 49 | ||
| 50 | int phm_copy_clock_limits_array( | ||
| 51 | struct pp_hwmgr *hwmgr, | ||
| 52 | uint32_t **pptable_info_array, | ||
| 53 | const uint32_t *pptable_array, | ||
| 54 | uint32_t power_saving_clock_count); | ||
| 55 | |||
| 56 | int phm_copy_overdrive_settings_limits_array( | ||
| 57 | struct pp_hwmgr *hwmgr, | ||
| 58 | uint32_t **pptable_info_array, | ||
| 59 | const uint32_t *pptable_array, | ||
| 60 | uint32_t od_setting_count); | ||
| 61 | |||
| 50 | extern int phm_wait_for_register_unequal(struct pp_hwmgr *hwmgr, | 62 | extern int phm_wait_for_register_unequal(struct pp_hwmgr *hwmgr, |
| 51 | uint32_t index, | 63 | uint32_t index, |
| 52 | uint32_t value, uint32_t mask); | 64 | uint32_t value, uint32_t mask); |
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c index 3203cd2d2029..9817f7a5ed29 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c | |||
| @@ -99,50 +99,6 @@ static int set_platform_caps(struct pp_hwmgr *hwmgr, uint32_t powerplay_caps) | |||
| 99 | return 0; | 99 | return 0; |
| 100 | } | 100 | } |
| 101 | 101 | ||
| 102 | static int copy_clock_limits_array( | ||
| 103 | struct pp_hwmgr *hwmgr, | ||
| 104 | uint32_t **pptable_info_array, | ||
| 105 | const uint32_t *pptable_array) | ||
| 106 | { | ||
| 107 | uint32_t array_size, i; | ||
| 108 | uint32_t *table; | ||
| 109 | |||
| 110 | array_size = sizeof(uint32_t) * ATOM_VEGA12_PPCLOCK_COUNT; | ||
| 111 | |||
| 112 | table = kzalloc(array_size, GFP_KERNEL); | ||
| 113 | if (NULL == table) | ||
| 114 | return -ENOMEM; | ||
| 115 | |||
| 116 | for (i = 0; i < ATOM_VEGA12_PPCLOCK_COUNT; i++) | ||
| 117 | table[i] = le32_to_cpu(pptable_array[i]); | ||
| 118 | |||
| 119 | *pptable_info_array = table; | ||
| 120 | |||
| 121 | return 0; | ||
| 122 | } | ||
| 123 | |||
| 124 | static int copy_overdrive_settings_limits_array( | ||
| 125 | struct pp_hwmgr *hwmgr, | ||
| 126 | uint32_t **pptable_info_array, | ||
| 127 | const uint32_t *pptable_array) | ||
| 128 | { | ||
| 129 | uint32_t array_size, i; | ||
| 130 | uint32_t *table; | ||
| 131 | |||
| 132 | array_size = sizeof(uint32_t) * ATOM_VEGA12_ODSETTING_COUNT; | ||
| 133 | |||
| 134 | table = kzalloc(array_size, GFP_KERNEL); | ||
| 135 | if (NULL == table) | ||
| 136 | return -ENOMEM; | ||
| 137 | |||
| 138 | for (i = 0; i < ATOM_VEGA12_ODSETTING_COUNT; i++) | ||
| 139 | table[i] = le32_to_cpu(pptable_array[i]); | ||
| 140 | |||
| 141 | *pptable_info_array = table; | ||
| 142 | |||
| 143 | return 0; | ||
| 144 | } | ||
| 145 | |||
| 146 | static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable) | 102 | static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable) |
| 147 | { | 103 | { |
| 148 | struct pp_atomfwctrl_smc_dpm_parameters smc_dpm_table; | 104 | struct pp_atomfwctrl_smc_dpm_parameters smc_dpm_table; |
| @@ -258,8 +214,14 @@ static int init_powerplay_table_information( | |||
| 258 | hwmgr->platform_descriptor.overdriveLimit.memoryClock = | 214 | hwmgr->platform_descriptor.overdriveLimit.memoryClock = |
| 259 | le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_UCLKFMAX]); | 215 | le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_UCLKFMAX]); |
| 260 | 216 | ||
| 261 | copy_overdrive_settings_limits_array(hwmgr, &pptable_information->od_settings_max, powerplay_table->ODSettingsMax); | 217 | phm_copy_overdrive_settings_limits_array(hwmgr, |
| 262 | copy_overdrive_settings_limits_array(hwmgr, &pptable_information->od_settings_min, powerplay_table->ODSettingsMin); | 218 | &pptable_information->od_settings_max, |
| 219 | powerplay_table->ODSettingsMax, | ||
| 220 | ATOM_VEGA12_ODSETTING_COUNT); | ||
| 221 | phm_copy_overdrive_settings_limits_array(hwmgr, | ||
| 222 | &pptable_information->od_settings_min, | ||
| 223 | powerplay_table->ODSettingsMin, | ||
| 224 | ATOM_VEGA12_ODSETTING_COUNT); | ||
| 263 | 225 | ||
| 264 | /* hwmgr->platformDescriptor.minOverdriveVDDC = 0; | 226 | /* hwmgr->platformDescriptor.minOverdriveVDDC = 0; |
| 265 | hwmgr->platformDescriptor.maxOverdriveVDDC = 0; | 227 | hwmgr->platformDescriptor.maxOverdriveVDDC = 0; |
| @@ -287,8 +249,8 @@ static int init_powerplay_table_information( | |||
| 287 | PHM_PlatformCaps_PowerControl); | 249 | PHM_PlatformCaps_PowerControl); |
| 288 | } | 250 | } |
| 289 | 251 | ||
| 290 | copy_clock_limits_array(hwmgr, &pptable_information->power_saving_clock_max, powerplay_table->PowerSavingClockMax); | 252 | phm_copy_clock_limits_array(hwmgr, &pptable_information->power_saving_clock_max, powerplay_table->PowerSavingClockMax, ATOM_VEGA12_PPCLOCK_COUNT); |
| 291 | copy_clock_limits_array(hwmgr, &pptable_information->power_saving_clock_min, powerplay_table->PowerSavingClockMin); | 253 | phm_copy_clock_limits_array(hwmgr, &pptable_information->power_saving_clock_min, powerplay_table->PowerSavingClockMin, ATOM_VEGA12_PPCLOCK_COUNT); |
| 292 | 254 | ||
| 293 | pptable_information->smc_pptable = (PPTable_t *)kmalloc(sizeof(PPTable_t), GFP_KERNEL); | 255 | pptable_information->smc_pptable = (PPTable_t *)kmalloc(sizeof(PPTable_t), GFP_KERNEL); |
| 294 | if (pptable_information->smc_pptable == NULL) | 256 | if (pptable_information->smc_pptable == NULL) |
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c index 956aa6aff28d..32fe38452094 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c | |||
| @@ -661,50 +661,6 @@ static int set_platform_caps(struct pp_hwmgr *hwmgr, uint32_t powerplay_caps) | |||
| 661 | return 0; | 661 | return 0; |
| 662 | } | 662 | } |
| 663 | 663 | ||
| 664 | static int copy_clock_limits_array( | ||
| 665 | struct pp_hwmgr *hwmgr, | ||
| 666 | uint32_t **pptable_info_array, | ||
| 667 | const uint32_t *pptable_array, | ||
| 668 | uint32_t power_saving_clock_count) | ||
| 669 | { | ||
| 670 | uint32_t array_size, i; | ||
| 671 | uint32_t *table; | ||
| 672 | |||
| 673 | array_size = sizeof(uint32_t) * power_saving_clock_count; | ||
| 674 | table = kzalloc(array_size, GFP_KERNEL); | ||
| 675 | if (NULL == table) | ||
| 676 | return -ENOMEM; | ||
| 677 | |||
| 678 | for (i = 0; i < power_saving_clock_count; i++) | ||
| 679 | table[i] = le32_to_cpu(pptable_array[i]); | ||
| 680 | |||
| 681 | *pptable_info_array = table; | ||
| 682 | |||
| 683 | return 0; | ||
| 684 | } | ||
| 685 | |||
| 686 | static int copy_overdrive_settings_limits_array( | ||
| 687 | struct pp_hwmgr *hwmgr, | ||
| 688 | uint32_t **pptable_info_array, | ||
| 689 | const uint32_t *pptable_array, | ||
| 690 | uint32_t od_setting_count) | ||
| 691 | { | ||
| 692 | uint32_t array_size, i; | ||
| 693 | uint32_t *table; | ||
| 694 | |||
| 695 | array_size = sizeof(uint32_t) * od_setting_count; | ||
| 696 | table = kzalloc(array_size, GFP_KERNEL); | ||
| 697 | if (NULL == table) | ||
| 698 | return -ENOMEM; | ||
| 699 | |||
| 700 | for (i = 0; i < od_setting_count; i++) | ||
| 701 | table[i] = le32_to_cpu(pptable_array[i]); | ||
| 702 | |||
| 703 | *pptable_info_array = table; | ||
| 704 | |||
| 705 | return 0; | ||
| 706 | } | ||
| 707 | |||
| 708 | static int copy_overdrive_feature_capabilities_array( | 664 | static int copy_overdrive_feature_capabilities_array( |
| 709 | struct pp_hwmgr *hwmgr, | 665 | struct pp_hwmgr *hwmgr, |
| 710 | uint8_t **pptable_info_array, | 666 | uint8_t **pptable_info_array, |
| @@ -859,11 +815,11 @@ static int init_powerplay_table_information( | |||
| 859 | &pptable_information->od_feature_capabilities, | 815 | &pptable_information->od_feature_capabilities, |
| 860 | powerplay_table->OverDrive8Table.ODFeatureCapabilities, | 816 | powerplay_table->OverDrive8Table.ODFeatureCapabilities, |
| 861 | od_feature_count); | 817 | od_feature_count); |
| 862 | copy_overdrive_settings_limits_array(hwmgr, | 818 | phm_copy_overdrive_settings_limits_array(hwmgr, |
| 863 | &pptable_information->od_settings_max, | 819 | &pptable_information->od_settings_max, |
| 864 | powerplay_table->OverDrive8Table.ODSettingsMax, | 820 | powerplay_table->OverDrive8Table.ODSettingsMax, |
| 865 | od_setting_count); | 821 | od_setting_count); |
| 866 | copy_overdrive_settings_limits_array(hwmgr, | 822 | phm_copy_overdrive_settings_limits_array(hwmgr, |
| 867 | &pptable_information->od_settings_min, | 823 | &pptable_information->od_settings_min, |
| 868 | powerplay_table->OverDrive8Table.ODSettingsMin, | 824 | powerplay_table->OverDrive8Table.ODSettingsMin, |
| 869 | od_setting_count); | 825 | od_setting_count); |
| @@ -890,11 +846,11 @@ static int init_powerplay_table_information( | |||
| 890 | ATOM_VEGA20_PPCLOCK_COUNT) ? | 846 | ATOM_VEGA20_PPCLOCK_COUNT) ? |
| 891 | ATOM_VEGA20_PPCLOCK_COUNT : | 847 | ATOM_VEGA20_PPCLOCK_COUNT : |
| 892 | le32_to_cpu(powerplay_table->PowerSavingClockTable.PowerSavingClockCount); | 848 | le32_to_cpu(powerplay_table->PowerSavingClockTable.PowerSavingClockCount); |
| 893 | copy_clock_limits_array(hwmgr, | 849 | phm_copy_clock_limits_array(hwmgr, |
| 894 | &pptable_information->power_saving_clock_max, | 850 | &pptable_information->power_saving_clock_max, |
| 895 | powerplay_table->PowerSavingClockTable.PowerSavingClockMax, | 851 | powerplay_table->PowerSavingClockTable.PowerSavingClockMax, |
| 896 | power_saving_clock_count); | 852 | power_saving_clock_count); |
| 897 | copy_clock_limits_array(hwmgr, | 853 | phm_copy_clock_limits_array(hwmgr, |
| 898 | &pptable_information->power_saving_clock_min, | 854 | &pptable_information->power_saving_clock_min, |
| 899 | powerplay_table->PowerSavingClockTable.PowerSavingClockMin, | 855 | powerplay_table->PowerSavingClockTable.PowerSavingClockMin, |
| 900 | power_saving_clock_count); | 856 | power_saving_clock_count); |
