diff options
| -rw-r--r-- | drivers/pci/dwc/pcie-designware-ep.c | 12 | ||||
| -rw-r--r-- | drivers/pci/dwc/pcie-designware.h | 1 |
2 files changed, 4 insertions, 9 deletions
diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c index d5eb143040e3..0989946df32c 100644 --- a/drivers/pci/dwc/pcie-designware-ep.c +++ b/drivers/pci/dwc/pcie-designware-ep.c | |||
| @@ -195,20 +195,14 @@ static int dw_pcie_ep_map_addr(struct pci_epc *epc, phys_addr_t addr, | |||
| 195 | static int dw_pcie_ep_get_msi(struct pci_epc *epc) | 195 | static int dw_pcie_ep_get_msi(struct pci_epc *epc) |
| 196 | { | 196 | { |
| 197 | int val; | 197 | int val; |
| 198 | u32 lower_addr; | ||
| 199 | u32 upper_addr; | ||
| 200 | struct dw_pcie_ep *ep = epc_get_drvdata(epc); | 198 | struct dw_pcie_ep *ep = epc_get_drvdata(epc); |
| 201 | struct dw_pcie *pci = to_dw_pcie_from_ep(ep); | 199 | struct dw_pcie *pci = to_dw_pcie_from_ep(ep); |
| 202 | 200 | ||
| 203 | val = dw_pcie_readb_dbi(pci, MSI_MESSAGE_CONTROL); | 201 | val = dw_pcie_readw_dbi(pci, MSI_MESSAGE_CONTROL); |
| 204 | val = (val & MSI_CAP_MME_MASK) >> MSI_CAP_MME_SHIFT; | 202 | if (!(val & MSI_CAP_MSI_EN_MASK)) |
| 205 | |||
| 206 | lower_addr = dw_pcie_readl_dbi(pci, MSI_MESSAGE_ADDR_L32); | ||
| 207 | upper_addr = dw_pcie_readl_dbi(pci, MSI_MESSAGE_ADDR_U32); | ||
| 208 | |||
| 209 | if (!(lower_addr || upper_addr)) | ||
| 210 | return -EINVAL; | 203 | return -EINVAL; |
| 211 | 204 | ||
| 205 | val = (val & MSI_CAP_MME_MASK) >> MSI_CAP_MME_SHIFT; | ||
| 212 | return val; | 206 | return val; |
| 213 | } | 207 | } |
| 214 | 208 | ||
diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-designware.h index e6fd0b024b21..8700ba12c130 100644 --- a/drivers/pci/dwc/pcie-designware.h +++ b/drivers/pci/dwc/pcie-designware.h | |||
| @@ -101,6 +101,7 @@ | |||
| 101 | #define MSI_MESSAGE_CONTROL 0x52 | 101 | #define MSI_MESSAGE_CONTROL 0x52 |
| 102 | #define MSI_CAP_MMC_SHIFT 1 | 102 | #define MSI_CAP_MMC_SHIFT 1 |
| 103 | #define MSI_CAP_MME_SHIFT 4 | 103 | #define MSI_CAP_MME_SHIFT 4 |
| 104 | #define MSI_CAP_MSI_EN_MASK 0x1 | ||
| 104 | #define MSI_CAP_MME_MASK (7 << MSI_CAP_MME_SHIFT) | 105 | #define MSI_CAP_MME_MASK (7 << MSI_CAP_MME_SHIFT) |
| 105 | #define MSI_MESSAGE_ADDR_L32 0x54 | 106 | #define MSI_MESSAGE_ADDR_L32 0x54 |
| 106 | #define MSI_MESSAGE_ADDR_U32 0x58 | 107 | #define MSI_MESSAGE_ADDR_U32 0x58 |
