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-rw-r--r--drivers/staging/rtl8192u/r8192U.h39
1 files changed, 26 insertions, 13 deletions
diff --git a/drivers/staging/rtl8192u/r8192U.h b/drivers/staging/rtl8192u/r8192U.h
index 0b7b04ea0910..a7ba8f37384e 100644
--- a/drivers/staging/rtl8192u/r8192U.h
+++ b/drivers/staging/rtl8192u/r8192U.h
@@ -626,7 +626,8 @@ typedef struct Stats {
626 long signal_quality; 626 long signal_quality;
627 long last_signal_strength_inpercent; 627 long last_signal_strength_inpercent;
628 /* Correct smoothed ss in dbm, only used in driver 628 /* Correct smoothed ss in dbm, only used in driver
629 * to report real power now */ 629 * to report real power now
630 */
630 long recv_signal_power; 631 long recv_signal_power;
631 u8 rx_rssi_percentage[4]; 632 u8 rx_rssi_percentage[4];
632 u8 rx_evm_percentage[2]; 633 u8 rx_evm_percentage[2];
@@ -672,32 +673,40 @@ typedef struct _BB_REGISTER_DEFINITION {
672 /* Tx gain stage: 0x80c~0x80f [4 bytes] */ 673 /* Tx gain stage: 0x80c~0x80f [4 bytes] */
673 u32 rfTxGainStage; 674 u32 rfTxGainStage;
674 /* wire parameter control1: 0x820~0x823, 0x828~0x82b, 675 /* wire parameter control1: 0x820~0x823, 0x828~0x82b,
675 * 0x830~0x833, 0x838~0x83b [16 bytes] */ 676 * 0x830~0x833, 0x838~0x83b [16 bytes]
677 */
676 u32 rfHSSIPara1; 678 u32 rfHSSIPara1;
677 /* wire parameter control2: 0x824~0x827, 0x82c~0x82f, 679 /* wire parameter control2: 0x824~0x827, 0x82c~0x82f,
678 * 0x834~0x837, 0x83c~0x83f [16 bytes] */ 680 * 0x834~0x837, 0x83c~0x83f [16 bytes]
681 */
679 u32 rfHSSIPara2; 682 u32 rfHSSIPara2;
680 /* Tx Rx antenna control: 0x858~0x85f [16 bytes] */ 683 /* Tx Rx antenna control: 0x858~0x85f [16 bytes] */
681 u32 rfSwitchControl; 684 u32 rfSwitchControl;
682 /* AGC parameter control1: 0xc50~0xc53, 0xc58~0xc5b, 685 /* AGC parameter control1: 0xc50~0xc53, 0xc58~0xc5b,
683 * 0xc60~0xc63, 0xc68~0xc6b [16 bytes] */ 686 * 0xc60~0xc63, 0xc68~0xc6b [16 bytes]
687 */
684 u32 rfAGCControl1; 688 u32 rfAGCControl1;
685 /* AGC parameter control2: 0xc54~0xc57, 0xc5c~0xc5f, 689 /* AGC parameter control2: 0xc54~0xc57, 0xc5c~0xc5f,
686 * 0xc64~0xc67, 0xc6c~0xc6f [16 bytes] */ 690 * 0xc64~0xc67, 0xc6c~0xc6f [16 bytes]
691 */
687 u32 rfAGCControl2; 692 u32 rfAGCControl2;
688 /* OFDM Rx IQ imbalance matrix: 0xc14~0xc17, 0xc1c~0xc1f, 693 /* OFDM Rx IQ imbalance matrix: 0xc14~0xc17, 0xc1c~0xc1f,
689 * 0xc24~0xc27, 0xc2c~0xc2f [16 bytes] */ 694 * 0xc24~0xc27, 0xc2c~0xc2f [16 bytes]
695 */
690 u32 rfRxIQImbalance; 696 u32 rfRxIQImbalance;
691 /* Rx IQ DC offset and Rx digital filter, Rx DC notch filter: 697 /* Rx IQ DC offset and Rx digital filter, Rx DC notch filter:
692 * 0xc10~0xc13, 0xc18~0xc1b, 698 * 0xc10~0xc13, 0xc18~0xc1b,
693 * 0xc20~0xc23, 0xc28~0xc2b [16 bytes] */ 699 * 0xc20~0xc23, 0xc28~0xc2b [16 bytes]
700 */
694 u32 rfRxAFE; 701 u32 rfRxAFE;
695 /* OFDM Tx IQ imbalance matrix: 0xc80~0xc83, 0xc88~0xc8b, 702 /* OFDM Tx IQ imbalance matrix: 0xc80~0xc83, 0xc88~0xc8b,
696 * 0xc90~0xc93, 0xc98~0xc9b [16 bytes] */ 703 * 0xc90~0xc93, 0xc98~0xc9b [16 bytes]
704 */
697 u32 rfTxIQImbalance; 705 u32 rfTxIQImbalance;
698 /* Tx IQ DC Offset and Tx DFIR type: 706 /* Tx IQ DC Offset and Tx DFIR type:
699 * 0xc84~0xc87, 0xc8c~0xc8f, 707 * 0xc84~0xc87, 0xc8c~0xc8f,
700 * 0xc94~0xc97, 0xc9c~0xc9f [16 bytes] */ 708 * 0xc94~0xc97, 0xc9c~0xc9f [16 bytes]
709 */
701 u32 rfTxAFE; 710 u32 rfTxAFE;
702 /* LSSI RF readback data: 0x8a0~0x8af [16 bytes] */ 711 /* LSSI RF readback data: 0x8a0~0x8af [16 bytes] */
703 u32 rfLSSIReadBack; 712 u32 rfLSSIReadBack;
@@ -776,7 +785,8 @@ typedef struct _phy_ofdm_rx_status_report_819xusb {
776typedef struct _phy_cck_rx_status_report_819xusb { 785typedef struct _phy_cck_rx_status_report_819xusb {
777 /* For CCK rate descriptor. This is an unsigned 8:1 variable. 786 /* For CCK rate descriptor. This is an unsigned 8:1 variable.
778 * LSB bit presend 0.5. And MSB 7 bts presend a signed value. 787 * LSB bit presend 0.5. And MSB 7 bts presend a signed value.
779 * Range from -64~+63.5. */ 788 * Range from -64~+63.5.
789 */
780 u8 adc_pwdb_X[4]; 790 u8 adc_pwdb_X[4];
781 u8 sq_rpt; 791 u8 sq_rpt;
782 u8 cck_agc_rpt; 792 u8 cck_agc_rpt;
@@ -991,7 +1001,8 @@ typedef struct r8192_priv {
991 /* Control channel sub-carrier */ 1001 /* Control channel sub-carrier */
992 u8 nCur40MhzPrimeSC; 1002 u8 nCur40MhzPrimeSC;
993 /* Test for shorten RF configuration time. 1003 /* Test for shorten RF configuration time.
994 * We save RF reg0 in this variable to reduce RF reading. */ 1004 * We save RF reg0 in this variable to reduce RF reading.
1005 */
995 u32 RfReg0Value[4]; 1006 u32 RfReg0Value[4];
996 u8 NumTotalRFPath; 1007 u8 NumTotalRFPath;
997 bool brfpath_rxenable[4]; 1008 bool brfpath_rxenable[4];
@@ -1009,11 +1020,13 @@ typedef struct r8192_priv {
1009 1020
1010 bool bstore_last_dtpflag; 1021 bool bstore_last_dtpflag;
1011 /* Define to discriminate on High power State or 1022 /* Define to discriminate on High power State or
1012 * on sitesurvey to change Tx gain index */ 1023 * on sitesurvey to change Tx gain index
1024 */
1013 bool bstart_txctrl_bydtp; 1025 bool bstart_txctrl_bydtp;
1014 rate_adaptive rate_adaptive; 1026 rate_adaptive rate_adaptive;
1015 /* TX power tracking 1027 /* TX power tracking
1016 * OPEN/CLOSE TX POWER TRACKING */ 1028 * OPEN/CLOSE TX POWER TRACKING
1029 */
1017 txbbgain_struct txbbgain_table[TxBBGainTableLength]; 1030 txbbgain_struct txbbgain_table[TxBBGainTableLength];
1018 u8 txpower_count; /* For 6 sec do tracking again */ 1031 u8 txpower_count; /* For 6 sec do tracking again */
1019 bool btxpower_trackingInit; 1032 bool btxpower_trackingInit;