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-rw-r--r--drivers/mfd/cros_ec_spi.c24
1 files changed, 16 insertions, 8 deletions
diff --git a/drivers/mfd/cros_ec_spi.c b/drivers/mfd/cros_ec_spi.c
index 4f863c346547..0b8d32829166 100644
--- a/drivers/mfd/cros_ec_spi.c
+++ b/drivers/mfd/cros_ec_spi.c
@@ -39,14 +39,22 @@
39#define EC_MSG_PREAMBLE_COUNT 32 39#define EC_MSG_PREAMBLE_COUNT 32
40 40
41/* 41/*
42 * We must get a response from the EC in 5ms. This is a very long 42 * Allow for a long time for the EC to respond. We support i2c
43 * time, but the flash write command can take 2-3ms. The EC command 43 * tunneling and support fairly long messages for the tunnel (249
44 * processing is currently not very fast (about 500us). We could 44 * bytes long at the moment). If we're talking to a 100 kHz device
45 * look at speeding this up and making the flash write command a 45 * on the other end and need to transfer ~256 bytes, then we need:
46 * 'slow' command, requiring a GET_STATUS wait loop, like flash 46 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
47 * erase. 47 *
48 */ 48 * We'll wait 4 times that to handle clock stretching and other
49#define EC_MSG_DEADLINE_MS 5 49 * paranoia.
50 *
51 * It's pretty unlikely that we'll really see a 249 byte tunnel in
52 * anything other than testing. If this was more common we might
53 * consider having slow commands like this require a GET_STATUS
54 * wait loop. The 'flash write' command would be another candidate
55 * for this, clocking in at 2-3ms.
56 */
57#define EC_MSG_DEADLINE_MS 100
50 58
51/* 59/*
52 * Time between raising the SPI chip select (for the end of a 60 * Time between raising the SPI chip select (for the end of a