diff options
| -rw-r--r-- | drivers/ata/libahci.c | 18 | ||||
| -rw-r--r-- | drivers/ata/libata-core.c | 21 | ||||
| -rw-r--r-- | drivers/ata/libata-eh.c | 2 | ||||
| -rw-r--r-- | drivers/ata/libata-sff.c | 12 | ||||
| -rw-r--r-- | drivers/ata/pata_bf54x.c | 4 | ||||
| -rw-r--r-- | drivers/ata/pata_samsung_cf.c | 2 | ||||
| -rw-r--r-- | drivers/ata/pata_scc.c | 4 | ||||
| -rw-r--r-- | drivers/ata/sata_fsl.c | 19 | ||||
| -rw-r--r-- | drivers/ata/sata_inic162x.c | 2 | ||||
| -rw-r--r-- | drivers/ata/sata_sil24.c | 14 | ||||
| -rw-r--r-- | drivers/ata/sata_via.c | 2 | ||||
| -rw-r--r-- | include/linux/libata.h | 5 |
12 files changed, 57 insertions, 48 deletions
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c index 437f92597788..524dbe8be163 100644 --- a/drivers/ata/libahci.c +++ b/drivers/ata/libahci.c | |||
| @@ -567,7 +567,7 @@ int ahci_stop_engine(struct ata_port *ap) | |||
| 567 | writel(tmp, port_mmio + PORT_CMD); | 567 | writel(tmp, port_mmio + PORT_CMD); |
| 568 | 568 | ||
| 569 | /* wait for engine to stop. This could be as long as 500 msec */ | 569 | /* wait for engine to stop. This could be as long as 500 msec */ |
| 570 | tmp = ata_wait_register(port_mmio + PORT_CMD, | 570 | tmp = ata_wait_register(ap, port_mmio + PORT_CMD, |
| 571 | PORT_CMD_LIST_ON, PORT_CMD_LIST_ON, 1, 500); | 571 | PORT_CMD_LIST_ON, PORT_CMD_LIST_ON, 1, 500); |
| 572 | if (tmp & PORT_CMD_LIST_ON) | 572 | if (tmp & PORT_CMD_LIST_ON) |
| 573 | return -EIO; | 573 | return -EIO; |
| @@ -614,7 +614,7 @@ static int ahci_stop_fis_rx(struct ata_port *ap) | |||
| 614 | writel(tmp, port_mmio + PORT_CMD); | 614 | writel(tmp, port_mmio + PORT_CMD); |
| 615 | 615 | ||
| 616 | /* wait for completion, spec says 500ms, give it 1000 */ | 616 | /* wait for completion, spec says 500ms, give it 1000 */ |
| 617 | tmp = ata_wait_register(port_mmio + PORT_CMD, PORT_CMD_FIS_ON, | 617 | tmp = ata_wait_register(ap, port_mmio + PORT_CMD, PORT_CMD_FIS_ON, |
| 618 | PORT_CMD_FIS_ON, 10, 1000); | 618 | PORT_CMD_FIS_ON, 10, 1000); |
| 619 | if (tmp & PORT_CMD_FIS_ON) | 619 | if (tmp & PORT_CMD_FIS_ON) |
| 620 | return -EBUSY; | 620 | return -EBUSY; |
| @@ -671,7 +671,7 @@ static int ahci_set_lpm(struct ata_link *link, enum ata_lpm_policy policy, | |||
| 671 | readl(port_mmio + PORT_CMD); | 671 | readl(port_mmio + PORT_CMD); |
| 672 | 672 | ||
| 673 | /* wait 10ms to be sure we've come out of LPM state */ | 673 | /* wait 10ms to be sure we've come out of LPM state */ |
| 674 | msleep(10); | 674 | ata_msleep(ap, 10); |
| 675 | } else { | 675 | } else { |
| 676 | cmd |= PORT_CMD_ALPE; | 676 | cmd |= PORT_CMD_ALPE; |
| 677 | if (policy == ATA_LPM_MIN_POWER) | 677 | if (policy == ATA_LPM_MIN_POWER) |
| @@ -740,7 +740,7 @@ static void ahci_start_port(struct ata_port *ap) | |||
| 740 | emp->led_state, | 740 | emp->led_state, |
| 741 | 4); | 741 | 4); |
| 742 | if (rc == -EBUSY) | 742 | if (rc == -EBUSY) |
| 743 | msleep(1); | 743 | ata_msleep(ap, 1); |
| 744 | else | 744 | else |
| 745 | break; | 745 | break; |
| 746 | } | 746 | } |
| @@ -799,7 +799,7 @@ int ahci_reset_controller(struct ata_host *host) | |||
| 799 | * reset must complete within 1 second, or | 799 | * reset must complete within 1 second, or |
| 800 | * the hardware should be considered fried. | 800 | * the hardware should be considered fried. |
| 801 | */ | 801 | */ |
| 802 | tmp = ata_wait_register(mmio + HOST_CTL, HOST_RESET, | 802 | tmp = ata_wait_register(NULL, mmio + HOST_CTL, HOST_RESET, |
| 803 | HOST_RESET, 10, 1000); | 803 | HOST_RESET, 10, 1000); |
| 804 | 804 | ||
| 805 | if (tmp & HOST_RESET) { | 805 | if (tmp & HOST_RESET) { |
| @@ -1179,7 +1179,7 @@ int ahci_kick_engine(struct ata_port *ap) | |||
| 1179 | writel(tmp, port_mmio + PORT_CMD); | 1179 | writel(tmp, port_mmio + PORT_CMD); |
| 1180 | 1180 | ||
| 1181 | rc = 0; | 1181 | rc = 0; |
| 1182 | tmp = ata_wait_register(port_mmio + PORT_CMD, | 1182 | tmp = ata_wait_register(ap, port_mmio + PORT_CMD, |
| 1183 | PORT_CMD_CLO, PORT_CMD_CLO, 1, 500); | 1183 | PORT_CMD_CLO, PORT_CMD_CLO, 1, 500); |
| 1184 | if (tmp & PORT_CMD_CLO) | 1184 | if (tmp & PORT_CMD_CLO) |
| 1185 | rc = -EIO; | 1185 | rc = -EIO; |
| @@ -1209,8 +1209,8 @@ static int ahci_exec_polled_cmd(struct ata_port *ap, int pmp, | |||
| 1209 | writel(1, port_mmio + PORT_CMD_ISSUE); | 1209 | writel(1, port_mmio + PORT_CMD_ISSUE); |
| 1210 | 1210 | ||
| 1211 | if (timeout_msec) { | 1211 | if (timeout_msec) { |
| 1212 | tmp = ata_wait_register(port_mmio + PORT_CMD_ISSUE, 0x1, 0x1, | 1212 | tmp = ata_wait_register(ap, port_mmio + PORT_CMD_ISSUE, |
| 1213 | 1, timeout_msec); | 1213 | 0x1, 0x1, 1, timeout_msec); |
| 1214 | if (tmp & 0x1) { | 1214 | if (tmp & 0x1) { |
| 1215 | ahci_kick_engine(ap); | 1215 | ahci_kick_engine(ap); |
| 1216 | return -EBUSY; | 1216 | return -EBUSY; |
| @@ -1257,7 +1257,7 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class, | |||
| 1257 | } | 1257 | } |
| 1258 | 1258 | ||
| 1259 | /* spec says at least 5us, but be generous and sleep for 1ms */ | 1259 | /* spec says at least 5us, but be generous and sleep for 1ms */ |
| 1260 | msleep(1); | 1260 | ata_msleep(ap, 1); |
| 1261 | 1261 | ||
| 1262 | /* issue the second D2H Register FIS */ | 1262 | /* issue the second D2H Register FIS */ |
| 1263 | tf.ctl &= ~ATA_SRST; | 1263 | tf.ctl &= ~ATA_SRST; |
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 7c5538b9fa3b..42d9ce29f50d 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c | |||
| @@ -3404,7 +3404,7 @@ int ata_wait_ready(struct ata_link *link, unsigned long deadline, | |||
| 3404 | warned = 1; | 3404 | warned = 1; |
| 3405 | } | 3405 | } |
| 3406 | 3406 | ||
| 3407 | msleep(50); | 3407 | ata_msleep(link->ap, 50); |
| 3408 | } | 3408 | } |
| 3409 | } | 3409 | } |
| 3410 | 3410 | ||
| @@ -3425,7 +3425,7 @@ int ata_wait_ready(struct ata_link *link, unsigned long deadline, | |||
| 3425 | int ata_wait_after_reset(struct ata_link *link, unsigned long deadline, | 3425 | int ata_wait_after_reset(struct ata_link *link, unsigned long deadline, |
| 3426 | int (*check_ready)(struct ata_link *link)) | 3426 | int (*check_ready)(struct ata_link *link)) |
| 3427 | { | 3427 | { |
| 3428 | msleep(ATA_WAIT_AFTER_RESET); | 3428 | ata_msleep(link->ap, ATA_WAIT_AFTER_RESET); |
| 3429 | 3429 | ||
| 3430 | return ata_wait_ready(link, deadline, check_ready); | 3430 | return ata_wait_ready(link, deadline, check_ready); |
| 3431 | } | 3431 | } |
| @@ -3473,7 +3473,7 @@ int sata_link_debounce(struct ata_link *link, const unsigned long *params, | |||
| 3473 | last_jiffies = jiffies; | 3473 | last_jiffies = jiffies; |
| 3474 | 3474 | ||
| 3475 | while (1) { | 3475 | while (1) { |
| 3476 | msleep(interval); | 3476 | ata_msleep(link->ap, interval); |
| 3477 | if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) | 3477 | if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) |
| 3478 | return rc; | 3478 | return rc; |
| 3479 | cur &= 0xf; | 3479 | cur &= 0xf; |
| @@ -3538,7 +3538,7 @@ int sata_link_resume(struct ata_link *link, const unsigned long *params, | |||
| 3538 | * immediately after resuming. Delay 200ms before | 3538 | * immediately after resuming. Delay 200ms before |
| 3539 | * debouncing. | 3539 | * debouncing. |
| 3540 | */ | 3540 | */ |
| 3541 | msleep(200); | 3541 | ata_msleep(link->ap, 200); |
| 3542 | 3542 | ||
| 3543 | /* is SControl restored correctly? */ | 3543 | /* is SControl restored correctly? */ |
| 3544 | if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) | 3544 | if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) |
| @@ -3742,7 +3742,7 @@ int sata_link_hardreset(struct ata_link *link, const unsigned long *timing, | |||
| 3742 | /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 | 3742 | /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 |
| 3743 | * 10.4.2 says at least 1 ms. | 3743 | * 10.4.2 says at least 1 ms. |
| 3744 | */ | 3744 | */ |
| 3745 | msleep(1); | 3745 | ata_msleep(link->ap, 1); |
| 3746 | 3746 | ||
| 3747 | /* bring link back */ | 3747 | /* bring link back */ |
| 3748 | rc = sata_link_resume(link, timing, deadline); | 3748 | rc = sata_link_resume(link, timing, deadline); |
| @@ -6483,8 +6483,14 @@ int ata_ratelimit(void) | |||
| 6483 | return __ratelimit(&ratelimit); | 6483 | return __ratelimit(&ratelimit); |
| 6484 | } | 6484 | } |
| 6485 | 6485 | ||
| 6486 | void ata_msleep(struct ata_port *ap, unsigned int msecs) | ||
| 6487 | { | ||
| 6488 | msleep(msecs); | ||
| 6489 | } | ||
| 6490 | |||
| 6486 | /** | 6491 | /** |
| 6487 | * ata_wait_register - wait until register value changes | 6492 | * ata_wait_register - wait until register value changes |
| 6493 | * @ap: ATA port to wait register for, can be NULL | ||
| 6488 | * @reg: IO-mapped register | 6494 | * @reg: IO-mapped register |
| 6489 | * @mask: Mask to apply to read register value | 6495 | * @mask: Mask to apply to read register value |
| 6490 | * @val: Wait condition | 6496 | * @val: Wait condition |
| @@ -6506,7 +6512,7 @@ int ata_ratelimit(void) | |||
| 6506 | * RETURNS: | 6512 | * RETURNS: |
| 6507 | * The final register value. | 6513 | * The final register value. |
| 6508 | */ | 6514 | */ |
| 6509 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | 6515 | u32 ata_wait_register(struct ata_port *ap, void __iomem *reg, u32 mask, u32 val, |
| 6510 | unsigned long interval, unsigned long timeout) | 6516 | unsigned long interval, unsigned long timeout) |
| 6511 | { | 6517 | { |
| 6512 | unsigned long deadline; | 6518 | unsigned long deadline; |
| @@ -6521,7 +6527,7 @@ u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | |||
| 6521 | deadline = ata_deadline(jiffies, timeout); | 6527 | deadline = ata_deadline(jiffies, timeout); |
| 6522 | 6528 | ||
| 6523 | while ((tmp & mask) == val && time_before(jiffies, deadline)) { | 6529 | while ((tmp & mask) == val && time_before(jiffies, deadline)) { |
| 6524 | msleep(interval); | 6530 | ata_msleep(ap, interval); |
| 6525 | tmp = ioread32(reg); | 6531 | tmp = ioread32(reg); |
| 6526 | } | 6532 | } |
| 6527 | 6533 | ||
| @@ -6605,6 +6611,7 @@ EXPORT_SYMBOL_GPL(ata_std_postreset); | |||
| 6605 | EXPORT_SYMBOL_GPL(ata_dev_classify); | 6611 | EXPORT_SYMBOL_GPL(ata_dev_classify); |
| 6606 | EXPORT_SYMBOL_GPL(ata_dev_pair); | 6612 | EXPORT_SYMBOL_GPL(ata_dev_pair); |
| 6607 | EXPORT_SYMBOL_GPL(ata_ratelimit); | 6613 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
| 6614 | EXPORT_SYMBOL_GPL(ata_msleep); | ||
| 6608 | EXPORT_SYMBOL_GPL(ata_wait_register); | 6615 | EXPORT_SYMBOL_GPL(ata_wait_register); |
| 6609 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | 6616 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); |
| 6610 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); | 6617 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); |
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c index 06a4db1ec10e..6780f4d16e81 100644 --- a/drivers/ata/libata-eh.c +++ b/drivers/ata/libata-eh.c | |||
| @@ -779,7 +779,7 @@ void ata_port_wait_eh(struct ata_port *ap) | |||
| 779 | 779 | ||
| 780 | /* make sure SCSI EH is complete */ | 780 | /* make sure SCSI EH is complete */ |
| 781 | if (scsi_host_in_recovery(ap->scsi_host)) { | 781 | if (scsi_host_in_recovery(ap->scsi_host)) { |
| 782 | msleep(10); | 782 | ata_msleep(ap, 10); |
| 783 | goto retry; | 783 | goto retry; |
| 784 | } | 784 | } |
| 785 | } | 785 | } |
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c index 193f242eec05..14d18bf81255 100644 --- a/drivers/ata/libata-sff.c +++ b/drivers/ata/libata-sff.c | |||
| @@ -222,7 +222,7 @@ int ata_sff_busy_sleep(struct ata_port *ap, | |||
| 222 | timeout = ata_deadline(timer_start, tmout_pat); | 222 | timeout = ata_deadline(timer_start, tmout_pat); |
| 223 | while (status != 0xff && (status & ATA_BUSY) && | 223 | while (status != 0xff && (status & ATA_BUSY) && |
| 224 | time_before(jiffies, timeout)) { | 224 | time_before(jiffies, timeout)) { |
| 225 | msleep(50); | 225 | ata_msleep(ap, 50); |
| 226 | status = ata_sff_busy_wait(ap, ATA_BUSY, 3); | 226 | status = ata_sff_busy_wait(ap, ATA_BUSY, 3); |
| 227 | } | 227 | } |
| 228 | 228 | ||
| @@ -234,7 +234,7 @@ int ata_sff_busy_sleep(struct ata_port *ap, | |||
| 234 | timeout = ata_deadline(timer_start, tmout); | 234 | timeout = ata_deadline(timer_start, tmout); |
| 235 | while (status != 0xff && (status & ATA_BUSY) && | 235 | while (status != 0xff && (status & ATA_BUSY) && |
| 236 | time_before(jiffies, timeout)) { | 236 | time_before(jiffies, timeout)) { |
| 237 | msleep(50); | 237 | ata_msleep(ap, 50); |
| 238 | status = ap->ops->sff_check_status(ap); | 238 | status = ap->ops->sff_check_status(ap); |
| 239 | } | 239 | } |
| 240 | 240 | ||
| @@ -360,7 +360,7 @@ static void ata_dev_select(struct ata_port *ap, unsigned int device, | |||
| 360 | 360 | ||
| 361 | if (wait) { | 361 | if (wait) { |
| 362 | if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI) | 362 | if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI) |
| 363 | msleep(150); | 363 | ata_msleep(ap, 150); |
| 364 | ata_wait_idle(ap); | 364 | ata_wait_idle(ap); |
| 365 | } | 365 | } |
| 366 | } | 366 | } |
| @@ -1356,7 +1356,7 @@ fsm_start: | |||
| 1356 | */ | 1356 | */ |
| 1357 | status = ata_sff_busy_wait(ap, ATA_BUSY, 5); | 1357 | status = ata_sff_busy_wait(ap, ATA_BUSY, 5); |
| 1358 | if (status & ATA_BUSY) { | 1358 | if (status & ATA_BUSY) { |
| 1359 | msleep(2); | 1359 | ata_msleep(ap, 2); |
| 1360 | status = ata_sff_busy_wait(ap, ATA_BUSY, 10); | 1360 | status = ata_sff_busy_wait(ap, ATA_BUSY, 10); |
| 1361 | if (status & ATA_BUSY) { | 1361 | if (status & ATA_BUSY) { |
| 1362 | ata_sff_queue_pio_task(link, ATA_SHORT_PAUSE); | 1362 | ata_sff_queue_pio_task(link, ATA_SHORT_PAUSE); |
| @@ -1937,7 +1937,7 @@ int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask, | |||
| 1937 | unsigned int dev1 = devmask & (1 << 1); | 1937 | unsigned int dev1 = devmask & (1 << 1); |
| 1938 | int rc, ret = 0; | 1938 | int rc, ret = 0; |
| 1939 | 1939 | ||
| 1940 | msleep(ATA_WAIT_AFTER_RESET); | 1940 | ata_msleep(ap, ATA_WAIT_AFTER_RESET); |
| 1941 | 1941 | ||
| 1942 | /* always check readiness of the master device */ | 1942 | /* always check readiness of the master device */ |
| 1943 | rc = ata_sff_wait_ready(link, deadline); | 1943 | rc = ata_sff_wait_ready(link, deadline); |
| @@ -1966,7 +1966,7 @@ int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask, | |||
| 1966 | lbal = ioread8(ioaddr->lbal_addr); | 1966 | lbal = ioread8(ioaddr->lbal_addr); |
| 1967 | if ((nsect == 1) && (lbal == 1)) | 1967 | if ((nsect == 1) && (lbal == 1)) |
| 1968 | break; | 1968 | break; |
| 1969 | msleep(50); /* give drive a breather */ | 1969 | ata_msleep(ap, 50); /* give drive a breather */ |
| 1970 | } | 1970 | } |
| 1971 | 1971 | ||
| 1972 | rc = ata_sff_wait_ready(link, deadline); | 1972 | rc = ata_sff_wait_ready(link, deadline); |
diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c index 9cae65de750e..e1423cd2531f 100644 --- a/drivers/ata/pata_bf54x.c +++ b/drivers/ata/pata_bf54x.c | |||
| @@ -1046,7 +1046,7 @@ static void bfin_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |||
| 1046 | dev1 = 0; | 1046 | dev1 = 0; |
| 1047 | break; | 1047 | break; |
| 1048 | } | 1048 | } |
| 1049 | msleep(50); /* give drive a breather */ | 1049 | ata_msleep(ap, 50); /* give drive a breather */ |
| 1050 | } | 1050 | } |
| 1051 | if (dev1) | 1051 | if (dev1) |
| 1052 | ata_sff_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | 1052 | ata_sff_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); |
| @@ -1087,7 +1087,7 @@ static unsigned int bfin_bus_softreset(struct ata_port *ap, | |||
| 1087 | * | 1087 | * |
| 1088 | * Old drivers/ide uses the 2mS rule and then waits for ready | 1088 | * Old drivers/ide uses the 2mS rule and then waits for ready |
| 1089 | */ | 1089 | */ |
| 1090 | msleep(150); | 1090 | ata_msleep(ap, 150); |
| 1091 | 1091 | ||
| 1092 | /* Before we perform post reset processing we want to see if | 1092 | /* Before we perform post reset processing we want to see if |
| 1093 | * the bus shows 0xFF because the odd clown forgets the D7 | 1093 | * the bus shows 0xFF because the odd clown forgets the D7 |
diff --git a/drivers/ata/pata_samsung_cf.c b/drivers/ata/pata_samsung_cf.c index 6f9cfb24b751..8a51d673e5b2 100644 --- a/drivers/ata/pata_samsung_cf.c +++ b/drivers/ata/pata_samsung_cf.c | |||
| @@ -322,7 +322,7 @@ static int pata_s3c_wait_after_reset(struct ata_link *link, | |||
| 322 | { | 322 | { |
| 323 | int rc; | 323 | int rc; |
| 324 | 324 | ||
| 325 | msleep(ATA_WAIT_AFTER_RESET); | 325 | ata_msleep(link->ap, ATA_WAIT_AFTER_RESET); |
| 326 | 326 | ||
| 327 | /* always check readiness of the master device */ | 327 | /* always check readiness of the master device */ |
| 328 | rc = ata_sff_wait_ready(link, deadline); | 328 | rc = ata_sff_wait_ready(link, deadline); |
diff --git a/drivers/ata/pata_scc.c b/drivers/ata/pata_scc.c index fe36966f7e34..093715c3273a 100644 --- a/drivers/ata/pata_scc.c +++ b/drivers/ata/pata_scc.c | |||
| @@ -530,7 +530,7 @@ static int scc_wait_after_reset(struct ata_link *link, unsigned int devmask, | |||
| 530 | * | 530 | * |
| 531 | * Old drivers/ide uses the 2mS rule and then waits for ready. | 531 | * Old drivers/ide uses the 2mS rule and then waits for ready. |
| 532 | */ | 532 | */ |
| 533 | msleep(150); | 533 | ata_msleep(ap, 150); |
| 534 | 534 | ||
| 535 | /* always check readiness of the master device */ | 535 | /* always check readiness of the master device */ |
| 536 | rc = ata_sff_wait_ready(link, deadline); | 536 | rc = ata_sff_wait_ready(link, deadline); |
| @@ -559,7 +559,7 @@ static int scc_wait_after_reset(struct ata_link *link, unsigned int devmask, | |||
| 559 | lbal = in_be32(ioaddr->lbal_addr); | 559 | lbal = in_be32(ioaddr->lbal_addr); |
| 560 | if ((nsect == 1) && (lbal == 1)) | 560 | if ((nsect == 1) && (lbal == 1)) |
| 561 | break; | 561 | break; |
| 562 | msleep(50); /* give drive a breather */ | 562 | ata_msleep(ap, 50); /* give drive a breather */ |
| 563 | } | 563 | } |
| 564 | 564 | ||
| 565 | rc = ata_sff_wait_ready(link, deadline); | 565 | rc = ata_sff_wait_ready(link, deadline); |
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c index 1440dc0af242..b0214d00d50b 100644 --- a/drivers/ata/sata_fsl.c +++ b/drivers/ata/sata_fsl.c | |||
| @@ -678,7 +678,7 @@ static void sata_fsl_port_stop(struct ata_port *ap) | |||
| 678 | iowrite32(temp, hcr_base + HCONTROL); | 678 | iowrite32(temp, hcr_base + HCONTROL); |
| 679 | 679 | ||
| 680 | /* Poll for controller to go offline - should happen immediately */ | 680 | /* Poll for controller to go offline - should happen immediately */ |
| 681 | ata_wait_register(hcr_base + HSTATUS, ONLINE, ONLINE, 1, 1); | 681 | ata_wait_register(ap, hcr_base + HSTATUS, ONLINE, ONLINE, 1, 1); |
| 682 | 682 | ||
| 683 | ap->private_data = NULL; | 683 | ap->private_data = NULL; |
| 684 | dma_free_coherent(dev, SATA_FSL_PORT_PRIV_DMA_SZ, | 684 | dma_free_coherent(dev, SATA_FSL_PORT_PRIV_DMA_SZ, |
| @@ -729,7 +729,8 @@ try_offline_again: | |||
| 729 | iowrite32(temp, hcr_base + HCONTROL); | 729 | iowrite32(temp, hcr_base + HCONTROL); |
| 730 | 730 | ||
| 731 | /* Poll for controller to go offline */ | 731 | /* Poll for controller to go offline */ |
| 732 | temp = ata_wait_register(hcr_base + HSTATUS, ONLINE, ONLINE, 1, 500); | 732 | temp = ata_wait_register(ap, hcr_base + HSTATUS, ONLINE, ONLINE, |
| 733 | 1, 500); | ||
| 733 | 734 | ||
| 734 | if (temp & ONLINE) { | 735 | if (temp & ONLINE) { |
| 735 | ata_port_printk(ap, KERN_ERR, | 736 | ata_port_printk(ap, KERN_ERR, |
| @@ -752,7 +753,7 @@ try_offline_again: | |||
| 752 | /* | 753 | /* |
| 753 | * PHY reset should remain asserted for atleast 1ms | 754 | * PHY reset should remain asserted for atleast 1ms |
| 754 | */ | 755 | */ |
| 755 | msleep(1); | 756 | ata_msleep(ap, 1); |
| 756 | 757 | ||
| 757 | /* | 758 | /* |
| 758 | * Now, bring the host controller online again, this can take time | 759 | * Now, bring the host controller online again, this can take time |
| @@ -766,7 +767,7 @@ try_offline_again: | |||
| 766 | temp |= HCONTROL_PMP_ATTACHED; | 767 | temp |= HCONTROL_PMP_ATTACHED; |
| 767 | iowrite32(temp, hcr_base + HCONTROL); | 768 | iowrite32(temp, hcr_base + HCONTROL); |
| 768 | 769 | ||
| 769 | temp = ata_wait_register(hcr_base + HSTATUS, ONLINE, 0, 1, 500); | 770 | temp = ata_wait_register(ap, hcr_base + HSTATUS, ONLINE, 0, 1, 500); |
| 770 | 771 | ||
| 771 | if (!(temp & ONLINE)) { | 772 | if (!(temp & ONLINE)) { |
| 772 | ata_port_printk(ap, KERN_ERR, | 773 | ata_port_printk(ap, KERN_ERR, |
| @@ -784,7 +785,7 @@ try_offline_again: | |||
| 784 | * presence | 785 | * presence |
| 785 | */ | 786 | */ |
| 786 | 787 | ||
| 787 | temp = ata_wait_register(hcr_base + HSTATUS, 0xFF, 0, 1, 500); | 788 | temp = ata_wait_register(ap, hcr_base + HSTATUS, 0xFF, 0, 1, 500); |
| 788 | if ((!(temp & 0x10)) || ata_link_offline(link)) { | 789 | if ((!(temp & 0x10)) || ata_link_offline(link)) { |
| 789 | ata_port_printk(ap, KERN_WARNING, | 790 | ata_port_printk(ap, KERN_WARNING, |
| 790 | "No Device OR PHYRDY change,Hstatus = 0x%x\n", | 791 | "No Device OR PHYRDY change,Hstatus = 0x%x\n", |
| @@ -797,7 +798,7 @@ try_offline_again: | |||
| 797 | * Wait for the first D2H from device,i.e,signature update notification | 798 | * Wait for the first D2H from device,i.e,signature update notification |
| 798 | */ | 799 | */ |
| 799 | start_jiffies = jiffies; | 800 | start_jiffies = jiffies; |
| 800 | temp = ata_wait_register(hcr_base + HSTATUS, 0xFF, 0x10, | 801 | temp = ata_wait_register(ap, hcr_base + HSTATUS, 0xFF, 0x10, |
| 801 | 500, jiffies_to_msecs(deadline - start_jiffies)); | 802 | 500, jiffies_to_msecs(deadline - start_jiffies)); |
| 802 | 803 | ||
| 803 | if ((temp & 0xFF) != 0x18) { | 804 | if ((temp & 0xFF) != 0x18) { |
| @@ -880,7 +881,7 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class, | |||
| 880 | iowrite32(pmp, CQPMP + hcr_base); | 881 | iowrite32(pmp, CQPMP + hcr_base); |
| 881 | iowrite32(1, CQ + hcr_base); | 882 | iowrite32(1, CQ + hcr_base); |
| 882 | 883 | ||
| 883 | temp = ata_wait_register(CQ + hcr_base, 0x1, 0x1, 1, 5000); | 884 | temp = ata_wait_register(ap, CQ + hcr_base, 0x1, 0x1, 1, 5000); |
| 884 | if (temp & 0x1) { | 885 | if (temp & 0x1) { |
| 885 | ata_port_printk(ap, KERN_WARNING, "ATA_SRST issue failed\n"); | 886 | ata_port_printk(ap, KERN_WARNING, "ATA_SRST issue failed\n"); |
| 886 | 887 | ||
| @@ -896,7 +897,7 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class, | |||
| 896 | goto err; | 897 | goto err; |
| 897 | } | 898 | } |
| 898 | 899 | ||
| 899 | msleep(1); | 900 | ata_msleep(ap, 1); |
| 900 | 901 | ||
| 901 | /* | 902 | /* |
| 902 | * SATA device enters reset state after receving a Control register | 903 | * SATA device enters reset state after receving a Control register |
| @@ -915,7 +916,7 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class, | |||
| 915 | if (pmp != SATA_PMP_CTRL_PORT) | 916 | if (pmp != SATA_PMP_CTRL_PORT) |
| 916 | iowrite32(pmp, CQPMP + hcr_base); | 917 | iowrite32(pmp, CQPMP + hcr_base); |
| 917 | iowrite32(1, CQ + hcr_base); | 918 | iowrite32(1, CQ + hcr_base); |
| 918 | msleep(150); /* ?? */ | 919 | ata_msleep(ap, 150); /* ?? */ |
| 919 | 920 | ||
| 920 | /* | 921 | /* |
| 921 | * The above command would have signalled an interrupt on command | 922 | * The above command would have signalled an interrupt on command |
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c index a36149ebf4a2..83a44471b189 100644 --- a/drivers/ata/sata_inic162x.c +++ b/drivers/ata/sata_inic162x.c | |||
| @@ -614,7 +614,7 @@ static int inic_hardreset(struct ata_link *link, unsigned int *class, | |||
| 614 | 614 | ||
| 615 | writew(IDMA_CTL_RST_ATA, idma_ctl); | 615 | writew(IDMA_CTL_RST_ATA, idma_ctl); |
| 616 | readw(idma_ctl); /* flush */ | 616 | readw(idma_ctl); /* flush */ |
| 617 | msleep(1); | 617 | ata_msleep(ap, 1); |
| 618 | writew(0, idma_ctl); | 618 | writew(0, idma_ctl); |
| 619 | 619 | ||
| 620 | rc = sata_link_resume(link, timing, deadline); | 620 | rc = sata_link_resume(link, timing, deadline); |
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c index be7726d7686d..af41c6fd1254 100644 --- a/drivers/ata/sata_sil24.c +++ b/drivers/ata/sata_sil24.c | |||
| @@ -589,9 +589,9 @@ static int sil24_init_port(struct ata_port *ap) | |||
| 589 | sil24_clear_pmp(ap); | 589 | sil24_clear_pmp(ap); |
| 590 | 590 | ||
| 591 | writel(PORT_CS_INIT, port + PORT_CTRL_STAT); | 591 | writel(PORT_CS_INIT, port + PORT_CTRL_STAT); |
| 592 | ata_wait_register(port + PORT_CTRL_STAT, | 592 | ata_wait_register(ap, port + PORT_CTRL_STAT, |
| 593 | PORT_CS_INIT, PORT_CS_INIT, 10, 100); | 593 | PORT_CS_INIT, PORT_CS_INIT, 10, 100); |
| 594 | tmp = ata_wait_register(port + PORT_CTRL_STAT, | 594 | tmp = ata_wait_register(ap, port + PORT_CTRL_STAT, |
| 595 | PORT_CS_RDY, 0, 10, 100); | 595 | PORT_CS_RDY, 0, 10, 100); |
| 596 | 596 | ||
| 597 | if ((tmp & (PORT_CS_INIT | PORT_CS_RDY)) != PORT_CS_RDY) { | 597 | if ((tmp & (PORT_CS_INIT | PORT_CS_RDY)) != PORT_CS_RDY) { |
| @@ -631,7 +631,7 @@ static int sil24_exec_polled_cmd(struct ata_port *ap, int pmp, | |||
| 631 | writel((u64)paddr >> 32, port + PORT_CMD_ACTIVATE + 4); | 631 | writel((u64)paddr >> 32, port + PORT_CMD_ACTIVATE + 4); |
| 632 | 632 | ||
| 633 | irq_mask = (PORT_IRQ_COMPLETE | PORT_IRQ_ERROR) << PORT_IRQ_RAW_SHIFT; | 633 | irq_mask = (PORT_IRQ_COMPLETE | PORT_IRQ_ERROR) << PORT_IRQ_RAW_SHIFT; |
| 634 | irq_stat = ata_wait_register(port + PORT_IRQ_STAT, irq_mask, 0x0, | 634 | irq_stat = ata_wait_register(ap, port + PORT_IRQ_STAT, irq_mask, 0x0, |
| 635 | 10, timeout_msec); | 635 | 10, timeout_msec); |
| 636 | 636 | ||
| 637 | writel(irq_mask, port + PORT_IRQ_STAT); /* clear IRQs */ | 637 | writel(irq_mask, port + PORT_IRQ_STAT); /* clear IRQs */ |
| @@ -719,9 +719,9 @@ static int sil24_hardreset(struct ata_link *link, unsigned int *class, | |||
| 719 | "state, performing PORT_RST\n"); | 719 | "state, performing PORT_RST\n"); |
| 720 | 720 | ||
| 721 | writel(PORT_CS_PORT_RST, port + PORT_CTRL_STAT); | 721 | writel(PORT_CS_PORT_RST, port + PORT_CTRL_STAT); |
| 722 | msleep(10); | 722 | ata_msleep(ap, 10); |
| 723 | writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR); | 723 | writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR); |
| 724 | ata_wait_register(port + PORT_CTRL_STAT, PORT_CS_RDY, 0, | 724 | ata_wait_register(ap, port + PORT_CTRL_STAT, PORT_CS_RDY, 0, |
| 725 | 10, 5000); | 725 | 10, 5000); |
| 726 | 726 | ||
| 727 | /* restore port configuration */ | 727 | /* restore port configuration */ |
| @@ -740,7 +740,7 @@ static int sil24_hardreset(struct ata_link *link, unsigned int *class, | |||
| 740 | tout_msec = 5000; | 740 | tout_msec = 5000; |
| 741 | 741 | ||
| 742 | writel(PORT_CS_DEV_RST, port + PORT_CTRL_STAT); | 742 | writel(PORT_CS_DEV_RST, port + PORT_CTRL_STAT); |
| 743 | tmp = ata_wait_register(port + PORT_CTRL_STAT, | 743 | tmp = ata_wait_register(ap, port + PORT_CTRL_STAT, |
| 744 | PORT_CS_DEV_RST, PORT_CS_DEV_RST, 10, | 744 | PORT_CS_DEV_RST, PORT_CS_DEV_RST, 10, |
| 745 | tout_msec); | 745 | tout_msec); |
| 746 | 746 | ||
| @@ -1253,7 +1253,7 @@ static void sil24_init_controller(struct ata_host *host) | |||
| 1253 | tmp = readl(port + PORT_CTRL_STAT); | 1253 | tmp = readl(port + PORT_CTRL_STAT); |
| 1254 | if (tmp & PORT_CS_PORT_RST) { | 1254 | if (tmp & PORT_CS_PORT_RST) { |
| 1255 | writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR); | 1255 | writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR); |
| 1256 | tmp = ata_wait_register(port + PORT_CTRL_STAT, | 1256 | tmp = ata_wait_register(NULL, port + PORT_CTRL_STAT, |
| 1257 | PORT_CS_PORT_RST, | 1257 | PORT_CS_PORT_RST, |
| 1258 | PORT_CS_PORT_RST, 10, 100); | 1258 | PORT_CS_PORT_RST, 10, 100); |
| 1259 | if (tmp & PORT_CS_PORT_RST) | 1259 | if (tmp & PORT_CS_PORT_RST) |
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c index 4730c42a5ee5..c21589986c69 100644 --- a/drivers/ata/sata_via.c +++ b/drivers/ata/sata_via.c | |||
| @@ -349,7 +349,7 @@ static int vt6420_prereset(struct ata_link *link, unsigned long deadline) | |||
| 349 | 349 | ||
| 350 | /* wait for phy to become ready, if necessary */ | 350 | /* wait for phy to become ready, if necessary */ |
| 351 | do { | 351 | do { |
| 352 | msleep(200); | 352 | ata_msleep(link->ap, 200); |
| 353 | svia_scr_read(link, SCR_STATUS, &sstatus); | 353 | svia_scr_read(link, SCR_STATUS, &sstatus); |
| 354 | if ((sstatus & 0xf) != 1) | 354 | if ((sstatus & 0xf) != 1) |
| 355 | break; | 355 | break; |
diff --git a/include/linux/libata.h b/include/linux/libata.h index bc4ee218b185..2fbd22bd68ce 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h | |||
| @@ -1004,8 +1004,9 @@ extern int ata_host_suspend(struct ata_host *host, pm_message_t mesg); | |||
| 1004 | extern void ata_host_resume(struct ata_host *host); | 1004 | extern void ata_host_resume(struct ata_host *host); |
| 1005 | #endif | 1005 | #endif |
| 1006 | extern int ata_ratelimit(void); | 1006 | extern int ata_ratelimit(void); |
| 1007 | extern u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | 1007 | extern void ata_msleep(struct ata_port *ap, unsigned int msecs); |
| 1008 | unsigned long interval, unsigned long timeout); | 1008 | extern u32 ata_wait_register(struct ata_port *ap, void __iomem *reg, u32 mask, |
| 1009 | u32 val, unsigned long interval, unsigned long timeout); | ||
| 1009 | extern int atapi_cmd_type(u8 opcode); | 1010 | extern int atapi_cmd_type(u8 opcode); |
| 1010 | extern void ata_tf_to_fis(const struct ata_taskfile *tf, | 1011 | extern void ata_tf_to_fis(const struct ata_taskfile *tf, |
| 1011 | u8 pmp, int is_cmd, u8 *fis); | 1012 | u8 pmp, int is_cmd, u8 *fis); |
