diff options
-rw-r--r-- | drivers/net/dsa/mv88e6xxx/chip.c | 26 | ||||
-rw-r--r-- | drivers/net/dsa/mv88e6xxx/chip.h | 1 | ||||
-rw-r--r-- | drivers/net/dsa/mv88e6xxx/global2.c | 2 |
3 files changed, 28 insertions, 1 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 3d2091099f7f..5b4374f21d76 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c | |||
@@ -3370,6 +3370,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3370 | .num_internal_phys = 5, | 3370 | .num_internal_phys = 5, |
3371 | .max_vid = 4095, | 3371 | .max_vid = 4095, |
3372 | .port_base_addr = 0x10, | 3372 | .port_base_addr = 0x10, |
3373 | .phy_base_addr = 0x0, | ||
3373 | .global1_addr = 0x1b, | 3374 | .global1_addr = 0x1b, |
3374 | .global2_addr = 0x1c, | 3375 | .global2_addr = 0x1c, |
3375 | .age_time_coeff = 15000, | 3376 | .age_time_coeff = 15000, |
@@ -3391,6 +3392,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3391 | .num_internal_phys = 0, | 3392 | .num_internal_phys = 0, |
3392 | .max_vid = 4095, | 3393 | .max_vid = 4095, |
3393 | .port_base_addr = 0x10, | 3394 | .port_base_addr = 0x10, |
3395 | .phy_base_addr = 0x0, | ||
3394 | .global1_addr = 0x1b, | 3396 | .global1_addr = 0x1b, |
3395 | .global2_addr = 0x1c, | 3397 | .global2_addr = 0x1c, |
3396 | .age_time_coeff = 15000, | 3398 | .age_time_coeff = 15000, |
@@ -3410,6 +3412,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3410 | .num_internal_phys = 8, | 3412 | .num_internal_phys = 8, |
3411 | .max_vid = 4095, | 3413 | .max_vid = 4095, |
3412 | .port_base_addr = 0x10, | 3414 | .port_base_addr = 0x10, |
3415 | .phy_base_addr = 0x0, | ||
3413 | .global1_addr = 0x1b, | 3416 | .global1_addr = 0x1b, |
3414 | .global2_addr = 0x1c, | 3417 | .global2_addr = 0x1c, |
3415 | .age_time_coeff = 15000, | 3418 | .age_time_coeff = 15000, |
@@ -3431,6 +3434,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3431 | .num_internal_phys = 5, | 3434 | .num_internal_phys = 5, |
3432 | .max_vid = 4095, | 3435 | .max_vid = 4095, |
3433 | .port_base_addr = 0x10, | 3436 | .port_base_addr = 0x10, |
3437 | .phy_base_addr = 0x0, | ||
3434 | .global1_addr = 0x1b, | 3438 | .global1_addr = 0x1b, |
3435 | .global2_addr = 0x1c, | 3439 | .global2_addr = 0x1c, |
3436 | .age_time_coeff = 15000, | 3440 | .age_time_coeff = 15000, |
@@ -3452,6 +3456,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3452 | .num_internal_phys = 0, | 3456 | .num_internal_phys = 0, |
3453 | .max_vid = 4095, | 3457 | .max_vid = 4095, |
3454 | .port_base_addr = 0x10, | 3458 | .port_base_addr = 0x10, |
3459 | .phy_base_addr = 0x0, | ||
3455 | .global1_addr = 0x1b, | 3460 | .global1_addr = 0x1b, |
3456 | .global2_addr = 0x1c, | 3461 | .global2_addr = 0x1c, |
3457 | .age_time_coeff = 15000, | 3462 | .age_time_coeff = 15000, |
@@ -3472,6 +3477,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3472 | .num_gpio = 11, | 3477 | .num_gpio = 11, |
3473 | .max_vid = 4095, | 3478 | .max_vid = 4095, |
3474 | .port_base_addr = 0x10, | 3479 | .port_base_addr = 0x10, |
3480 | .phy_base_addr = 0x10, | ||
3475 | .global1_addr = 0x1b, | 3481 | .global1_addr = 0x1b, |
3476 | .global2_addr = 0x1c, | 3482 | .global2_addr = 0x1c, |
3477 | .age_time_coeff = 3750, | 3483 | .age_time_coeff = 3750, |
@@ -3493,6 +3499,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3493 | .num_internal_phys = 5, | 3499 | .num_internal_phys = 5, |
3494 | .max_vid = 4095, | 3500 | .max_vid = 4095, |
3495 | .port_base_addr = 0x10, | 3501 | .port_base_addr = 0x10, |
3502 | .phy_base_addr = 0x0, | ||
3496 | .global1_addr = 0x1b, | 3503 | .global1_addr = 0x1b, |
3497 | .global2_addr = 0x1c, | 3504 | .global2_addr = 0x1c, |
3498 | .age_time_coeff = 15000, | 3505 | .age_time_coeff = 15000, |
@@ -3514,6 +3521,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3514 | .num_internal_phys = 0, | 3521 | .num_internal_phys = 0, |
3515 | .max_vid = 4095, | 3522 | .max_vid = 4095, |
3516 | .port_base_addr = 0x10, | 3523 | .port_base_addr = 0x10, |
3524 | .phy_base_addr = 0x0, | ||
3517 | .global1_addr = 0x1b, | 3525 | .global1_addr = 0x1b, |
3518 | .global2_addr = 0x1c, | 3526 | .global2_addr = 0x1c, |
3519 | .age_time_coeff = 15000, | 3527 | .age_time_coeff = 15000, |
@@ -3535,6 +3543,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3535 | .num_internal_phys = 5, | 3543 | .num_internal_phys = 5, |
3536 | .max_vid = 4095, | 3544 | .max_vid = 4095, |
3537 | .port_base_addr = 0x10, | 3545 | .port_base_addr = 0x10, |
3546 | .phy_base_addr = 0x0, | ||
3538 | .global1_addr = 0x1b, | 3547 | .global1_addr = 0x1b, |
3539 | .global2_addr = 0x1c, | 3548 | .global2_addr = 0x1c, |
3540 | .age_time_coeff = 15000, | 3549 | .age_time_coeff = 15000, |
@@ -3557,6 +3566,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3557 | .num_gpio = 15, | 3566 | .num_gpio = 15, |
3558 | .max_vid = 4095, | 3567 | .max_vid = 4095, |
3559 | .port_base_addr = 0x10, | 3568 | .port_base_addr = 0x10, |
3569 | .phy_base_addr = 0x0, | ||
3560 | .global1_addr = 0x1b, | 3570 | .global1_addr = 0x1b, |
3561 | .global2_addr = 0x1c, | 3571 | .global2_addr = 0x1c, |
3562 | .age_time_coeff = 15000, | 3572 | .age_time_coeff = 15000, |
@@ -3578,6 +3588,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3578 | .num_internal_phys = 5, | 3588 | .num_internal_phys = 5, |
3579 | .max_vid = 4095, | 3589 | .max_vid = 4095, |
3580 | .port_base_addr = 0x10, | 3590 | .port_base_addr = 0x10, |
3591 | .phy_base_addr = 0x0, | ||
3581 | .global1_addr = 0x1b, | 3592 | .global1_addr = 0x1b, |
3582 | .global2_addr = 0x1c, | 3593 | .global2_addr = 0x1c, |
3583 | .age_time_coeff = 15000, | 3594 | .age_time_coeff = 15000, |
@@ -3600,6 +3611,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3600 | .num_gpio = 15, | 3611 | .num_gpio = 15, |
3601 | .max_vid = 4095, | 3612 | .max_vid = 4095, |
3602 | .port_base_addr = 0x10, | 3613 | .port_base_addr = 0x10, |
3614 | .phy_base_addr = 0x0, | ||
3603 | .global1_addr = 0x1b, | 3615 | .global1_addr = 0x1b, |
3604 | .global2_addr = 0x1c, | 3616 | .global2_addr = 0x1c, |
3605 | .age_time_coeff = 15000, | 3617 | .age_time_coeff = 15000, |
@@ -3621,6 +3633,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3621 | .num_internal_phys = 0, | 3633 | .num_internal_phys = 0, |
3622 | .max_vid = 4095, | 3634 | .max_vid = 4095, |
3623 | .port_base_addr = 0x10, | 3635 | .port_base_addr = 0x10, |
3636 | .phy_base_addr = 0x0, | ||
3624 | .global1_addr = 0x1b, | 3637 | .global1_addr = 0x1b, |
3625 | .global2_addr = 0x1c, | 3638 | .global2_addr = 0x1c, |
3626 | .age_time_coeff = 15000, | 3639 | .age_time_coeff = 15000, |
@@ -3641,6 +3654,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3641 | .num_gpio = 16, | 3654 | .num_gpio = 16, |
3642 | .max_vid = 8191, | 3655 | .max_vid = 8191, |
3643 | .port_base_addr = 0x0, | 3656 | .port_base_addr = 0x0, |
3657 | .phy_base_addr = 0x0, | ||
3644 | .global1_addr = 0x1b, | 3658 | .global1_addr = 0x1b, |
3645 | .global2_addr = 0x1c, | 3659 | .global2_addr = 0x1c, |
3646 | .tag_protocol = DSA_TAG_PROTO_DSA, | 3660 | .tag_protocol = DSA_TAG_PROTO_DSA, |
@@ -3663,6 +3677,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3663 | .num_gpio = 16, | 3677 | .num_gpio = 16, |
3664 | .max_vid = 8191, | 3678 | .max_vid = 8191, |
3665 | .port_base_addr = 0x0, | 3679 | .port_base_addr = 0x0, |
3680 | .phy_base_addr = 0x0, | ||
3666 | .global1_addr = 0x1b, | 3681 | .global1_addr = 0x1b, |
3667 | .global2_addr = 0x1c, | 3682 | .global2_addr = 0x1c, |
3668 | .age_time_coeff = 3750, | 3683 | .age_time_coeff = 3750, |
@@ -3684,6 +3699,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3684 | .num_internal_phys = 11, | 3699 | .num_internal_phys = 11, |
3685 | .max_vid = 8191, | 3700 | .max_vid = 8191, |
3686 | .port_base_addr = 0x0, | 3701 | .port_base_addr = 0x0, |
3702 | .phy_base_addr = 0x0, | ||
3687 | .global1_addr = 0x1b, | 3703 | .global1_addr = 0x1b, |
3688 | .global2_addr = 0x1c, | 3704 | .global2_addr = 0x1c, |
3689 | .age_time_coeff = 3750, | 3705 | .age_time_coeff = 3750, |
@@ -3707,6 +3723,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3707 | .num_gpio = 15, | 3723 | .num_gpio = 15, |
3708 | .max_vid = 4095, | 3724 | .max_vid = 4095, |
3709 | .port_base_addr = 0x10, | 3725 | .port_base_addr = 0x10, |
3726 | .phy_base_addr = 0x0, | ||
3710 | .global1_addr = 0x1b, | 3727 | .global1_addr = 0x1b, |
3711 | .global2_addr = 0x1c, | 3728 | .global2_addr = 0x1c, |
3712 | .age_time_coeff = 15000, | 3729 | .age_time_coeff = 15000, |
@@ -3730,6 +3747,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3730 | .num_gpio = 16, | 3747 | .num_gpio = 16, |
3731 | .max_vid = 8191, | 3748 | .max_vid = 8191, |
3732 | .port_base_addr = 0x0, | 3749 | .port_base_addr = 0x0, |
3750 | .phy_base_addr = 0x0, | ||
3733 | .global1_addr = 0x1b, | 3751 | .global1_addr = 0x1b, |
3734 | .global2_addr = 0x1c, | 3752 | .global2_addr = 0x1c, |
3735 | .age_time_coeff = 3750, | 3753 | .age_time_coeff = 3750, |
@@ -3753,6 +3771,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3753 | .num_gpio = 15, | 3771 | .num_gpio = 15, |
3754 | .max_vid = 4095, | 3772 | .max_vid = 4095, |
3755 | .port_base_addr = 0x10, | 3773 | .port_base_addr = 0x10, |
3774 | .phy_base_addr = 0x0, | ||
3756 | .global1_addr = 0x1b, | 3775 | .global1_addr = 0x1b, |
3757 | .global2_addr = 0x1c, | 3776 | .global2_addr = 0x1c, |
3758 | .age_time_coeff = 15000, | 3777 | .age_time_coeff = 15000, |
@@ -3776,6 +3795,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3776 | .num_gpio = 15, | 3795 | .num_gpio = 15, |
3777 | .max_vid = 4095, | 3796 | .max_vid = 4095, |
3778 | .port_base_addr = 0x10, | 3797 | .port_base_addr = 0x10, |
3798 | .phy_base_addr = 0x0, | ||
3779 | .global1_addr = 0x1b, | 3799 | .global1_addr = 0x1b, |
3780 | .global2_addr = 0x1c, | 3800 | .global2_addr = 0x1c, |
3781 | .age_time_coeff = 15000, | 3801 | .age_time_coeff = 15000, |
@@ -3798,6 +3818,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3798 | .num_gpio = 11, | 3818 | .num_gpio = 11, |
3799 | .max_vid = 4095, | 3819 | .max_vid = 4095, |
3800 | .port_base_addr = 0x10, | 3820 | .port_base_addr = 0x10, |
3821 | .phy_base_addr = 0x10, | ||
3801 | .global1_addr = 0x1b, | 3822 | .global1_addr = 0x1b, |
3802 | .global2_addr = 0x1c, | 3823 | .global2_addr = 0x1c, |
3803 | .age_time_coeff = 3750, | 3824 | .age_time_coeff = 3750, |
@@ -3820,6 +3841,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3820 | .num_internal_phys = 5, | 3841 | .num_internal_phys = 5, |
3821 | .max_vid = 4095, | 3842 | .max_vid = 4095, |
3822 | .port_base_addr = 0x10, | 3843 | .port_base_addr = 0x10, |
3844 | .phy_base_addr = 0x0, | ||
3823 | .global1_addr = 0x1b, | 3845 | .global1_addr = 0x1b, |
3824 | .global2_addr = 0x1c, | 3846 | .global2_addr = 0x1c, |
3825 | .age_time_coeff = 15000, | 3847 | .age_time_coeff = 15000, |
@@ -3841,6 +3863,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3841 | .num_internal_phys = 5, | 3863 | .num_internal_phys = 5, |
3842 | .max_vid = 4095, | 3864 | .max_vid = 4095, |
3843 | .port_base_addr = 0x10, | 3865 | .port_base_addr = 0x10, |
3866 | .phy_base_addr = 0x0, | ||
3844 | .global1_addr = 0x1b, | 3867 | .global1_addr = 0x1b, |
3845 | .global2_addr = 0x1c, | 3868 | .global2_addr = 0x1c, |
3846 | .age_time_coeff = 15000, | 3869 | .age_time_coeff = 15000, |
@@ -3863,6 +3886,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3863 | .num_gpio = 15, | 3886 | .num_gpio = 15, |
3864 | .max_vid = 4095, | 3887 | .max_vid = 4095, |
3865 | .port_base_addr = 0x10, | 3888 | .port_base_addr = 0x10, |
3889 | .phy_base_addr = 0x0, | ||
3866 | .global1_addr = 0x1b, | 3890 | .global1_addr = 0x1b, |
3867 | .global2_addr = 0x1c, | 3891 | .global2_addr = 0x1c, |
3868 | .age_time_coeff = 15000, | 3892 | .age_time_coeff = 15000, |
@@ -3885,6 +3909,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3885 | .num_gpio = 16, | 3909 | .num_gpio = 16, |
3886 | .max_vid = 8191, | 3910 | .max_vid = 8191, |
3887 | .port_base_addr = 0x0, | 3911 | .port_base_addr = 0x0, |
3912 | .phy_base_addr = 0x0, | ||
3888 | .global1_addr = 0x1b, | 3913 | .global1_addr = 0x1b, |
3889 | .global2_addr = 0x1c, | 3914 | .global2_addr = 0x1c, |
3890 | .age_time_coeff = 3750, | 3915 | .age_time_coeff = 3750, |
@@ -3907,6 +3932,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { | |||
3907 | .num_gpio = 16, | 3932 | .num_gpio = 16, |
3908 | .max_vid = 8191, | 3933 | .max_vid = 8191, |
3909 | .port_base_addr = 0x0, | 3934 | .port_base_addr = 0x0, |
3935 | .phy_base_addr = 0x0, | ||
3910 | .global1_addr = 0x1b, | 3936 | .global1_addr = 0x1b, |
3911 | .global2_addr = 0x1c, | 3937 | .global2_addr = 0x1c, |
3912 | .age_time_coeff = 3750, | 3938 | .age_time_coeff = 3750, |
diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index 80490f66bc06..12b7f4649b25 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h | |||
@@ -114,6 +114,7 @@ struct mv88e6xxx_info { | |||
114 | unsigned int num_gpio; | 114 | unsigned int num_gpio; |
115 | unsigned int max_vid; | 115 | unsigned int max_vid; |
116 | unsigned int port_base_addr; | 116 | unsigned int port_base_addr; |
117 | unsigned int phy_base_addr; | ||
117 | unsigned int global1_addr; | 118 | unsigned int global1_addr; |
118 | unsigned int global2_addr; | 119 | unsigned int global2_addr; |
119 | unsigned int age_time_coeff; | 120 | unsigned int age_time_coeff; |
diff --git a/drivers/net/dsa/mv88e6xxx/global2.c b/drivers/net/dsa/mv88e6xxx/global2.c index 0ce627fded48..8d22d66d84b7 100644 --- a/drivers/net/dsa/mv88e6xxx/global2.c +++ b/drivers/net/dsa/mv88e6xxx/global2.c | |||
@@ -1118,7 +1118,7 @@ int mv88e6xxx_g2_irq_mdio_setup(struct mv88e6xxx_chip *chip, | |||
1118 | err = irq; | 1118 | err = irq; |
1119 | goto out; | 1119 | goto out; |
1120 | } | 1120 | } |
1121 | bus->irq[chip->info->port_base_addr + phy] = irq; | 1121 | bus->irq[chip->info->phy_base_addr + phy] = irq; |
1122 | } | 1122 | } |
1123 | return 0; | 1123 | return 0; |
1124 | out: | 1124 | out: |