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-rw-r--r--Documentation/devicetree/bindings/dma/atmel-dma.txt2
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/dma.txt138
-rw-r--r--Documentation/dmatest.txt72
-rw-r--r--Documentation/power/runtime_pm.txt14
-rw-r--r--arch/arm/common/edma.c4
-rw-r--r--arch/arm/include/asm/hardware/iop3xx-adma.h30
-rw-r--r--arch/arm/include/asm/hardware/iop_adma.h4
-rw-r--r--arch/arm/mach-iop13xx/include/mach/adma.h26
-rw-r--r--arch/ia64/hp/common/sba_iommu.c2
-rw-r--r--arch/ia64/include/asm/pci.h2
-rw-r--r--arch/ia64/kernel/perfmon.c8
-rw-r--r--arch/ia64/pci/pci.c6
-rw-r--r--arch/ia64/sn/kernel/io_acpi_init.c4
-rw-r--r--arch/powerpc/boot/dts/fsl/b4si-post.dtsi4
-rw-r--r--arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi82
-rw-r--r--arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi82
-rw-r--r--arch/powerpc/boot/dts/fsl/t4240si-post.dtsi4
-rw-r--r--arch/x86/include/asm/pci.h2
-rw-r--r--arch/x86/include/uapi/asm/msr-index.h2
-rw-r--r--arch/x86/mm/pgtable.c2
-rw-r--r--arch/x86/pci/acpi.c4
-rw-r--r--block/blk-mq.c14
-rw-r--r--crypto/async_tx/async_memcpy.c37
-rw-r--r--crypto/async_tx/async_pq.c174
-rw-r--r--crypto/async_tx/async_raid6_recov.c61
-rw-r--r--crypto/async_tx/async_tx.c4
-rw-r--r--crypto/async_tx/async_xor.c123
-rw-r--r--crypto/async_tx/raid6test.c10
-rw-r--r--drivers/acpi/Kconfig11
-rw-r--r--drivers/acpi/ac.c15
-rw-r--r--drivers/acpi/acpi_lpss.c9
-rw-r--r--drivers/acpi/acpi_platform.c2
-rw-r--r--drivers/acpi/blacklist.c35
-rw-r--r--drivers/acpi/device_pm.c14
-rw-r--r--drivers/acpi/ec.c3
-rw-r--r--drivers/acpi/glue.c53
-rw-r--r--drivers/acpi/pci_root.c1
-rw-r--r--drivers/acpi/scan.c14
-rw-r--r--drivers/acpi/video.c87
-rw-r--r--drivers/ata/libata-acpi.c4
-rw-r--r--drivers/ata/pata_arasan_cf.c3
-rw-r--r--drivers/base/platform.c4
-rw-r--r--drivers/base/power/main.c3
-rw-r--r--drivers/block/virtio_blk.c5
-rw-r--r--drivers/cpufreq/cpufreq_conservative.c3
-rw-r--r--drivers/cpufreq/cpufreq_governor.c4
-rw-r--r--drivers/cpufreq/omap-cpufreq.c1
-rw-r--r--drivers/dma/Kconfig9
-rw-r--r--drivers/dma/amba-pl08x.c39
-rw-r--r--drivers/dma/at_hdmac.c28
-rw-r--r--drivers/dma/coh901318.c4
-rw-r--r--drivers/dma/cppi41.c178
-rw-r--r--drivers/dma/dma-jz4740.c2
-rw-r--r--drivers/dma/dmaengine.c264
-rw-r--r--drivers/dma/dmatest.c917
-rw-r--r--drivers/dma/dw/core.c29
-rw-r--r--drivers/dma/edma.c369
-rw-r--r--drivers/dma/ep93xx_dma.c30
-rw-r--r--drivers/dma/fsldma.c26
-rw-r--r--drivers/dma/fsldma.h2
-rw-r--r--drivers/dma/imx-dma.c42
-rw-r--r--drivers/dma/imx-sdma.c10
-rw-r--r--drivers/dma/intel_mid_dma.c4
-rw-r--r--drivers/dma/ioat/dma.c53
-rw-r--r--drivers/dma/ioat/dma.h14
-rw-r--r--drivers/dma/ioat/dma_v2.c2
-rw-r--r--drivers/dma/ioat/dma_v2.h1
-rw-r--r--drivers/dma/ioat/dma_v3.c323
-rw-r--r--drivers/dma/ioat/pci.c20
-rw-r--r--drivers/dma/iop-adma.c113
-rw-r--r--drivers/dma/ipu/ipu_idmac.c6
-rw-r--r--drivers/dma/k3dma.c4
-rw-r--r--drivers/dma/mmp_pdma.c7
-rw-r--r--drivers/dma/mmp_tdma.c40
-rw-r--r--drivers/dma/mv_xor.c58
-rw-r--r--drivers/dma/mv_xor.h25
-rw-r--r--drivers/dma/mxs-dma.c178
-rw-r--r--drivers/dma/omap-dma.c2
-rw-r--r--drivers/dma/pl330.c32
-rw-r--r--drivers/dma/ppc4xx/adma.c272
-rw-r--r--drivers/dma/sa11x0-dma.c2
-rw-r--r--drivers/dma/sh/shdma-base.c2
-rw-r--r--drivers/dma/sh/shdmac.c4
-rw-r--r--drivers/dma/ste_dma40.c7
-rw-r--r--drivers/dma/tegra20-apb-dma.c6
-rw-r--r--drivers/dma/timb_dma.c37
-rw-r--r--drivers/dma/txx9dmac.c29
-rw-r--r--drivers/gpio/gpiolib.c1
-rw-r--r--drivers/gpu/drm/i915/intel_acpi.c2
-rw-r--r--drivers/gpu/drm/i915/intel_opregion.c2
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/mxm/base.c2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_acpi.c6
-rw-r--r--drivers/gpu/drm/radeon/radeon_acpi.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_atpx_handler.c7
-rw-r--r--drivers/gpu/drm/radeon/radeon_bios.c2
-rw-r--r--drivers/hid/i2c-hid/i2c-hid.c2
-rw-r--r--drivers/i2c/i2c-core.c25
-rw-r--r--drivers/ide/ide-acpi.c5
-rw-r--r--drivers/idle/intel_idle.c24
-rw-r--r--drivers/md/md.c133
-rw-r--r--drivers/md/raid1.c162
-rw-r--r--drivers/md/raid1.h15
-rw-r--r--drivers/md/raid10.c6
-rw-r--r--drivers/md/raid5.c420
-rw-r--r--drivers/md/raid5.h16
-rw-r--r--drivers/media/platform/m2m-deinterlace.c3
-rw-r--r--drivers/media/platform/timblogiw.c2
-rw-r--r--drivers/misc/carma/carma-fpga.c3
-rw-r--r--drivers/mmc/core/sdio_bus.c3
-rw-r--r--drivers/mtd/nand/atmel_nand.c3
-rw-r--r--drivers/mtd/nand/fsmc_nand.c2
-rw-r--r--drivers/net/ethernet/micrel/ks8842.c6
-rw-r--r--drivers/ntb/ntb_transport.c86
-rw-r--r--drivers/pci/hotplug/acpi_pcihp.c2
-rw-r--r--drivers/pci/hotplug/acpiphp.h1
-rw-r--r--drivers/pci/hotplug/pciehp_acpi.c4
-rw-r--r--drivers/pci/hotplug/sgi_hotplug.c8
-rw-r--r--drivers/pci/ioapic.c2
-rw-r--r--drivers/pci/pci-acpi.c6
-rw-r--r--drivers/pci/pci-label.c6
-rw-r--r--drivers/platform/x86/apple-gmux.c2
-rw-r--r--drivers/pnp/pnpacpi/core.c10
-rw-r--r--drivers/spi/spi-dw-mid.c4
-rw-r--r--drivers/spi/spi.c19
-rw-r--r--drivers/tty/serial/sh-sci.c2
-rw-r--r--drivers/usb/core/hub.c2
-rw-r--r--drivers/usb/core/usb-acpi.c4
-rw-r--r--drivers/xen/pci.c6
-rw-r--r--fs/9p/vfs_dentry.c19
-rw-r--r--fs/bio.c2
-rw-r--r--fs/configfs/dir.c12
-rw-r--r--fs/coredump.c6
-rw-r--r--fs/dcache.c84
-rw-r--r--fs/efivarfs/super.c11
-rw-r--r--fs/gfs2/lock_dlm.c8
-rw-r--r--fs/gfs2/quota.c23
-rw-r--r--fs/gfs2/rgrp.c4
-rw-r--r--fs/hostfs/hostfs_kern.c11
-rw-r--r--fs/libfs.c12
-rw-r--r--fs/proc/generic.c18
-rw-r--r--fs/proc/namespaces.c8
-rw-r--r--fs/squashfs/Kconfig72
-rw-r--r--fs/squashfs/Makefile5
-rw-r--r--fs/squashfs/block.c36
-rw-r--r--fs/squashfs/cache.c28
-rw-r--r--fs/squashfs/decompressor.c59
-rw-r--r--fs/squashfs/decompressor.h24
-rw-r--r--fs/squashfs/decompressor_multi.c198
-rw-r--r--fs/squashfs/decompressor_multi_percpu.c97
-rw-r--r--fs/squashfs/decompressor_single.c85
-rw-r--r--fs/squashfs/file.c142
-rw-r--r--fs/squashfs/file_cache.c38
-rw-r--r--fs/squashfs/file_direct.c173
-rw-r--r--fs/squashfs/lzo_wrapper.c47
-rw-r--r--fs/squashfs/page_actor.c100
-rw-r--r--fs/squashfs/page_actor.h81
-rw-r--r--fs/squashfs/squashfs.h20
-rw-r--r--fs/squashfs/squashfs_fs_sb.h4
-rw-r--r--fs/squashfs/super.c10
-rw-r--r--fs/squashfs/xz_wrapper.c105
-rw-r--r--fs/squashfs/zlib_wrapper.c64
-rw-r--r--include/acpi/acpi_bus.h2
-rw-r--r--include/linux/acpi.h23
-rw-r--r--include/linux/blkdev.h3
-rw-r--r--include/linux/device.h12
-rw-r--r--include/linux/dmaengine.h76
-rw-r--r--include/linux/fs.h2
-rw-r--r--include/linux/mm.h9
-rw-r--r--include/linux/pci-acpi.h4
-rw-r--r--include/linux/platform_data/edma.h8
-rw-r--r--include/linux/seqlock.h29
-rw-r--r--include/linux/wait.h25
-rw-r--r--include/uapi/linux/raid/md_p.h1
-rw-r--r--init/main.c2
-rw-r--r--kernel/cgroup.c7
-rw-r--r--kernel/power/snapshot.c3
-rw-r--r--kernel/power/user.c1
-rw-r--r--mm/memory.c7
-rw-r--r--net/ipv4/tcp.c4
-rw-r--r--net/sunrpc/rpc_pipe.c11
-rw-r--r--sound/soc/davinci/davinci-pcm.c2
-rw-r--r--tools/power/x86/turbostat/turbostat.c197
182 files changed, 4195 insertions, 3241 deletions
diff --git a/Documentation/devicetree/bindings/dma/atmel-dma.txt b/Documentation/devicetree/bindings/dma/atmel-dma.txt
index e1f343c7a34b..f69bcf5a6343 100644
--- a/Documentation/devicetree/bindings/dma/atmel-dma.txt
+++ b/Documentation/devicetree/bindings/dma/atmel-dma.txt
@@ -28,7 +28,7 @@ The three cells in order are:
28dependent: 28dependent:
29 - bit 7-0: peripheral identifier for the hardware handshaking interface. The 29 - bit 7-0: peripheral identifier for the hardware handshaking interface. The
30 identifier can be different for tx and rx. 30 identifier can be different for tx and rx.
31 - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP. 31 - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP.
32 32
33Example: 33Example:
34 34
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
index 2a4b4bce6110..7fc1b010fa75 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
@@ -1,33 +1,30 @@
1* Freescale 83xx DMA Controller 1* Freescale DMA Controllers
2 2
3Freescale PowerPC 83xx have on chip general purpose DMA controllers. 3** Freescale Elo DMA Controller
4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
5 series chips such as mpc8315, mpc8349, mpc8379 etc.
4 6
5Required properties: 7Required properties:
6 8
7- compatible : compatible list, contains 2 entries, first is 9- compatible : must include "fsl,elo-dma"
8 "fsl,CHIP-dma", where CHIP is the processor 10- reg : DMA General Status Register, i.e. DGSR which contains
9 (mpc8349, mpc8360, etc.) and the second is 11 status for all the 4 DMA channels
10 "fsl,elo-dma" 12- ranges : describes the mapping between the address space of the
11- reg : <registers mapping for DMA general status reg> 13 DMA channels and the address space of the DMA controller
12- ranges : Should be defined as specified in 1) to describe the
13 DMA controller channels.
14- cell-index : controller index. 0 for controller @ 0x8100 14- cell-index : controller index. 0 for controller @ 0x8100
15- interrupts : <interrupt mapping for DMA IRQ> 15- interrupts : interrupt specifier for DMA IRQ
16- interrupt-parent : optional, if needed for interrupt mapping 16- interrupt-parent : optional, if needed for interrupt mapping
17 17
18
19- DMA channel nodes: 18- DMA channel nodes:
20 - compatible : compatible list, contains 2 entries, first is 19 - compatible : must include "fsl,elo-dma-channel"
21 "fsl,CHIP-dma-channel", where CHIP is the processor 20 However, see note below.
22 (mpc8349, mpc8350, etc.) and the second is 21 - reg : DMA channel specific registers
23 "fsl,elo-dma-channel". However, see note below. 22 - cell-index : DMA channel index starts at 0.
24 - reg : <registers mapping for channel>
25 - cell-index : dma channel index starts at 0.
26 23
27Optional properties: 24Optional properties:
28 - interrupts : <interrupt mapping for DMA channel IRQ> 25 - interrupts : interrupt specifier for DMA channel IRQ
29 (on 83xx this is expected to be identical to 26 (on 83xx this is expected to be identical to
30 the interrupts property of the parent node) 27 the interrupts property of the parent node)
31 - interrupt-parent : optional, if needed for interrupt mapping 28 - interrupt-parent : optional, if needed for interrupt mapping
32 29
33Example: 30Example:
@@ -70,30 +67,27 @@ Example:
70 }; 67 };
71 }; 68 };
72 69
73* Freescale 85xx/86xx DMA Controller 70** Freescale EloPlus DMA Controller
74 71 This is a 4-channel DMA controller with extended addresses and chaining,
75Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers. 72 mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
73 mpc8540, mpc8641 p4080, bsc9131 etc.
76 74
77Required properties: 75Required properties:
78 76
79- compatible : compatible list, contains 2 entries, first is 77- compatible : must include "fsl,eloplus-dma"
80 "fsl,CHIP-dma", where CHIP is the processor 78- reg : DMA General Status Register, i.e. DGSR which contains
81 (mpc8540, mpc8540, etc.) and the second is 79 status for all the 4 DMA channels
82 "fsl,eloplus-dma"
83- reg : <registers mapping for DMA general status reg>
84- cell-index : controller index. 0 for controller @ 0x21000, 80- cell-index : controller index. 0 for controller @ 0x21000,
85 1 for controller @ 0xc000 81 1 for controller @ 0xc000
86- ranges : Should be defined as specified in 1) to describe the 82- ranges : describes the mapping between the address space of the
87 DMA controller channels. 83 DMA channels and the address space of the DMA controller
88 84
89- DMA channel nodes: 85- DMA channel nodes:
90 - compatible : compatible list, contains 2 entries, first is 86 - compatible : must include "fsl,eloplus-dma-channel"
91 "fsl,CHIP-dma-channel", where CHIP is the processor 87 However, see note below.
92 (mpc8540, mpc8560, etc.) and the second is 88 - cell-index : DMA channel index starts at 0.
93 "fsl,eloplus-dma-channel". However, see note below. 89 - reg : DMA channel specific registers
94 - cell-index : dma channel index starts at 0. 90 - interrupts : interrupt specifier for DMA channel IRQ
95 - reg : <registers mapping for channel>
96 - interrupts : <interrupt mapping for DMA channel IRQ>
97 - interrupt-parent : optional, if needed for interrupt mapping 91 - interrupt-parent : optional, if needed for interrupt mapping
98 92
99Example: 93Example:
@@ -134,6 +128,76 @@ Example:
134 }; 128 };
135 }; 129 };
136 130
131** Freescale Elo3 DMA Controller
132 DMA controller which has same function as EloPlus except that Elo3 has 8
133 channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
134 series chips, such as t1040, t4240, b4860.
135
136Required properties:
137
138- compatible : must include "fsl,elo3-dma"
139- reg : contains two entries for DMA General Status Registers,
140 i.e. DGSR0 which includes status for channel 1~4, and
141 DGSR1 for channel 5~8
142- ranges : describes the mapping between the address space of the
143 DMA channels and the address space of the DMA controller
144
145- DMA channel nodes:
146 - compatible : must include "fsl,eloplus-dma-channel"
147 - reg : DMA channel specific registers
148 - interrupts : interrupt specifier for DMA channel IRQ
149 - interrupt-parent : optional, if needed for interrupt mapping
150
151Example:
152dma@100300 {
153 #address-cells = <1>;
154 #size-cells = <1>;
155 compatible = "fsl,elo3-dma";
156 reg = <0x100300 0x4>,
157 <0x100600 0x4>;
158 ranges = <0x0 0x100100 0x500>;
159 dma-channel@0 {
160 compatible = "fsl,eloplus-dma-channel";
161 reg = <0x0 0x80>;
162 interrupts = <28 2 0 0>;
163 };
164 dma-channel@80 {
165 compatible = "fsl,eloplus-dma-channel";
166 reg = <0x80 0x80>;
167 interrupts = <29 2 0 0>;
168 };
169 dma-channel@100 {
170 compatible = "fsl,eloplus-dma-channel";
171 reg = <0x100 0x80>;
172 interrupts = <30 2 0 0>;
173 };
174 dma-channel@180 {
175 compatible = "fsl,eloplus-dma-channel";
176 reg = <0x180 0x80>;
177 interrupts = <31 2 0 0>;
178 };
179 dma-channel@300 {
180 compatible = "fsl,eloplus-dma-channel";
181 reg = <0x300 0x80>;
182 interrupts = <76 2 0 0>;
183 };
184 dma-channel@380 {
185 compatible = "fsl,eloplus-dma-channel";
186 reg = <0x380 0x80>;
187 interrupts = <77 2 0 0>;
188 };
189 dma-channel@400 {
190 compatible = "fsl,eloplus-dma-channel";
191 reg = <0x400 0x80>;
192 interrupts = <78 2 0 0>;
193 };
194 dma-channel@480 {
195 compatible = "fsl,eloplus-dma-channel";
196 reg = <0x480 0x80>;
197 interrupts = <79 2 0 0>;
198 };
199};
200
137Note on DMA channel compatible properties: The compatible property must say 201Note on DMA channel compatible properties: The compatible property must say
138"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA 202"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
139driver (fsldma). Any DMA channel used by fsldma cannot be used by another 203driver (fsldma). Any DMA channel used by fsldma cannot be used by another
diff --git a/Documentation/dmatest.txt b/Documentation/dmatest.txt
index a2b5663eae26..dd77a81bdb80 100644
--- a/Documentation/dmatest.txt
+++ b/Documentation/dmatest.txt
@@ -15,39 +15,48 @@ be built as module or inside kernel. Let's consider those cases.
15 15
16 Part 2 - When dmatest is built as a module... 16 Part 2 - When dmatest is built as a module...
17 17
18After mounting debugfs and loading the module, the /sys/kernel/debug/dmatest
19folder with nodes will be created. There are two important files located. First
20is the 'run' node that controls run and stop phases of the test, and the second
21one, 'results', is used to get the test case results.
22
23Note that in this case test will not run on load automatically.
24
25Example of usage: 18Example of usage:
19 % modprobe dmatest channel=dma0chan0 timeout=2000 iterations=1 run=1
20
21...or:
22 % modprobe dmatest
26 % echo dma0chan0 > /sys/module/dmatest/parameters/channel 23 % echo dma0chan0 > /sys/module/dmatest/parameters/channel
27 % echo 2000 > /sys/module/dmatest/parameters/timeout 24 % echo 2000 > /sys/module/dmatest/parameters/timeout
28 % echo 1 > /sys/module/dmatest/parameters/iterations 25 % echo 1 > /sys/module/dmatest/parameters/iterations
29 % echo 1 > /sys/kernel/debug/dmatest/run 26 % echo 1 > /sys/module/dmatest/parameters/run
27
28...or on the kernel command line:
29
30 dmatest.channel=dma0chan0 dmatest.timeout=2000 dmatest.iterations=1 dmatest.run=1
30 31
31Hint: available channel list could be extracted by running the following 32Hint: available channel list could be extracted by running the following
32command: 33command:
33 % ls -1 /sys/class/dma/ 34 % ls -1 /sys/class/dma/
34 35
35After a while you will start to get messages about current status or error like 36Once started a message like "dmatest: Started 1 threads using dma0chan0" is
36in the original code. 37emitted. After that only test failure messages are reported until the test
38stops.
37 39
38Note that running a new test will not stop any in progress test. 40Note that running a new test will not stop any in progress test.
39 41
40The following command should return actual state of the test. 42The following command returns the state of the test.
41 % cat /sys/kernel/debug/dmatest/run 43 % cat /sys/module/dmatest/parameters/run
42 44
43To wait for test done the user may perform a busy loop that checks the state. 45To wait for test completion userpace can poll 'run' until it is false, or use
44 46the wait parameter. Specifying 'wait=1' when loading the module causes module
45 % while [ $(cat /sys/kernel/debug/dmatest/run) = "Y" ] 47initialization to pause until a test run has completed, while reading
46 > do 48/sys/module/dmatest/parameters/wait waits for any running test to complete
47 > echo -n "." 49before returning. For example, the following scripts wait for 42 tests
48 > sleep 1 50to complete before exiting. Note that if 'iterations' is set to 'infinite' then
49 > done 51waiting is disabled.
50 > echo 52
53Example:
54 % modprobe dmatest run=1 iterations=42 wait=1
55 % modprobe -r dmatest
56...or:
57 % modprobe dmatest run=1 iterations=42
58 % cat /sys/module/dmatest/parameters/wait
59 % modprobe -r dmatest
51 60
52 Part 3 - When built-in in the kernel... 61 Part 3 - When built-in in the kernel...
53 62
@@ -62,21 +71,22 @@ case. You always could check them at run-time by running
62 71
63 Part 4 - Gathering the test results 72 Part 4 - Gathering the test results
64 73
65The module provides a storage for the test results in the memory. The gathered 74Test results are printed to the kernel log buffer with the format:
66data could be used after test is done.
67 75
68The special file 'results' in the debugfs represents gathered data of the in 76"dmatest: result <channel>: <test id>: '<error msg>' with src_off=<val> dst_off=<val> len=<val> (<err code>)"
69progress test. The messages collected are printed to the kernel log as well.
70 77
71Example of output: 78Example of output:
72 % cat /sys/kernel/debug/dmatest/results 79 % dmesg | tail -n 1
73 dma0chan0-copy0: #1: No errors with src_off=0x7bf dst_off=0x8ad len=0x3fea (0) 80 dmatest: result dma0chan0-copy0: #1: No errors with src_off=0x7bf dst_off=0x8ad len=0x3fea (0)
74 81
75The message format is unified across the different types of errors. A number in 82The message format is unified across the different types of errors. A number in
76the parens represents additional information, e.g. error code, error counter, 83the parens represents additional information, e.g. error code, error counter,
77or status. 84or status. A test thread also emits a summary line at completion listing the
85number of tests executed, number that failed, and a result code.
78 86
79Comparison between buffers is stored to the dedicated structure. 87Example:
88 % dmesg | tail -n 1
89 dmatest: dma0chan0-copy0: summary 1 test, 0 failures 1000 iops 100000 KB/s (0)
80 90
81Note that the verify result is now accessible only via file 'results' in the 91The details of a data miscompare error are also emitted, but do not follow the
82debugfs. 92above format.
diff --git a/Documentation/power/runtime_pm.txt b/Documentation/power/runtime_pm.txt
index 0f54333b0ff2..b6ce00b2be9a 100644
--- a/Documentation/power/runtime_pm.txt
+++ b/Documentation/power/runtime_pm.txt
@@ -547,13 +547,11 @@ helper functions described in Section 4. In that case, pm_runtime_resume()
547should be used. Of course, for this purpose the device's runtime PM has to be 547should be used. Of course, for this purpose the device's runtime PM has to be
548enabled earlier by calling pm_runtime_enable(). 548enabled earlier by calling pm_runtime_enable().
549 549
550If the device bus type's or driver's ->probe() callback runs 550It may be desirable to suspend the device once ->probe() has finished.
551pm_runtime_suspend() or pm_runtime_idle() or their asynchronous counterparts, 551Therefore the driver core uses the asyncronous pm_request_idle() to submit a
552they will fail returning -EAGAIN, because the device's usage counter is 552request to execute the subsystem-level idle callback for the device at that
553incremented by the driver core before executing ->probe(). Still, it may be 553time. A driver that makes use of the runtime autosuspend feature, may want to
554desirable to suspend the device as soon as ->probe() has finished, so the driver 554update the last busy mark before returning from ->probe().
555core uses pm_runtime_put_sync() to invoke the subsystem-level idle callback for
556the device at that time.
557 555
558Moreover, the driver core prevents runtime PM callbacks from racing with the bus 556Moreover, the driver core prevents runtime PM callbacks from racing with the bus
559notifier callback in __device_release_driver(), which is necessary, because the 557notifier callback in __device_release_driver(), which is necessary, because the
@@ -656,7 +654,7 @@ out the following operations:
656 __pm_runtime_disable() with 'false' as the second argument for every device 654 __pm_runtime_disable() with 'false' as the second argument for every device
657 right before executing the subsystem-level .suspend_late() callback for it. 655 right before executing the subsystem-level .suspend_late() callback for it.
658 656
659 * During system resume it calls pm_runtime_enable() and pm_runtime_put_sync() 657 * During system resume it calls pm_runtime_enable() and pm_runtime_put()
660 for every device right after executing the subsystem-level .resume_early() 658 for every device right after executing the subsystem-level .resume_early()
661 callback and right after executing the subsystem-level .resume() callback 659 callback and right after executing the subsystem-level .resume() callback
662 for it, respectively. 660 for it, respectively.
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 8e1a0245907f..41bca32409fc 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -404,7 +404,7 @@ static irqreturn_t dma_irq_handler(int irq, void *data)
404 BIT(slot)); 404 BIT(slot));
405 if (edma_cc[ctlr]->intr_data[channel].callback) 405 if (edma_cc[ctlr]->intr_data[channel].callback)
406 edma_cc[ctlr]->intr_data[channel].callback( 406 edma_cc[ctlr]->intr_data[channel].callback(
407 channel, DMA_COMPLETE, 407 channel, EDMA_DMA_COMPLETE,
408 edma_cc[ctlr]->intr_data[channel].data); 408 edma_cc[ctlr]->intr_data[channel].data);
409 } 409 }
410 } while (sh_ipr); 410 } while (sh_ipr);
@@ -459,7 +459,7 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
459 callback) { 459 callback) {
460 edma_cc[ctlr]->intr_data[k]. 460 edma_cc[ctlr]->intr_data[k].
461 callback(k, 461 callback(k,
462 DMA_CC_ERROR, 462 EDMA_DMA_CC_ERROR,
463 edma_cc[ctlr]->intr_data 463 edma_cc[ctlr]->intr_data
464 [k].data); 464 [k].data);
465 } 465 }
diff --git a/arch/arm/include/asm/hardware/iop3xx-adma.h b/arch/arm/include/asm/hardware/iop3xx-adma.h
index 9b28f1243bdc..240b29ef17db 100644
--- a/arch/arm/include/asm/hardware/iop3xx-adma.h
+++ b/arch/arm/include/asm/hardware/iop3xx-adma.h
@@ -393,36 +393,6 @@ static inline int iop_chan_zero_sum_slot_count(size_t len, int src_cnt,
393 return slot_cnt; 393 return slot_cnt;
394} 394}
395 395
396static inline int iop_desc_is_pq(struct iop_adma_desc_slot *desc)
397{
398 return 0;
399}
400
401static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc,
402 struct iop_adma_chan *chan)
403{
404 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
405
406 switch (chan->device->id) {
407 case DMA0_ID:
408 case DMA1_ID:
409 return hw_desc.dma->dest_addr;
410 case AAU_ID:
411 return hw_desc.aau->dest_addr;
412 default:
413 BUG();
414 }
415 return 0;
416}
417
418
419static inline u32 iop_desc_get_qdest_addr(struct iop_adma_desc_slot *desc,
420 struct iop_adma_chan *chan)
421{
422 BUG();
423 return 0;
424}
425
426static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc, 396static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc,
427 struct iop_adma_chan *chan) 397 struct iop_adma_chan *chan)
428{ 398{
diff --git a/arch/arm/include/asm/hardware/iop_adma.h b/arch/arm/include/asm/hardware/iop_adma.h
index 122f86d8c991..250760e08103 100644
--- a/arch/arm/include/asm/hardware/iop_adma.h
+++ b/arch/arm/include/asm/hardware/iop_adma.h
@@ -82,8 +82,6 @@ struct iop_adma_chan {
82 * @slot_cnt: total slots used in an transaction (group of operations) 82 * @slot_cnt: total slots used in an transaction (group of operations)
83 * @slots_per_op: number of slots per operation 83 * @slots_per_op: number of slots per operation
84 * @idx: pool index 84 * @idx: pool index
85 * @unmap_src_cnt: number of xor sources
86 * @unmap_len: transaction bytecount
87 * @tx_list: list of descriptors that are associated with one operation 85 * @tx_list: list of descriptors that are associated with one operation
88 * @async_tx: support for the async_tx api 86 * @async_tx: support for the async_tx api
89 * @group_list: list of slots that make up a multi-descriptor transaction 87 * @group_list: list of slots that make up a multi-descriptor transaction
@@ -99,8 +97,6 @@ struct iop_adma_desc_slot {
99 u16 slot_cnt; 97 u16 slot_cnt;
100 u16 slots_per_op; 98 u16 slots_per_op;
101 u16 idx; 99 u16 idx;
102 u16 unmap_src_cnt;
103 size_t unmap_len;
104 struct list_head tx_list; 100 struct list_head tx_list;
105 struct dma_async_tx_descriptor async_tx; 101 struct dma_async_tx_descriptor async_tx;
106 union { 102 union {
diff --git a/arch/arm/mach-iop13xx/include/mach/adma.h b/arch/arm/mach-iop13xx/include/mach/adma.h
index 6d3782d85a9f..a86fd0ed7757 100644
--- a/arch/arm/mach-iop13xx/include/mach/adma.h
+++ b/arch/arm/mach-iop13xx/include/mach/adma.h
@@ -218,20 +218,6 @@ iop_chan_xor_slot_count(size_t len, int src_cnt, int *slots_per_op)
218#define iop_chan_pq_slot_count iop_chan_xor_slot_count 218#define iop_chan_pq_slot_count iop_chan_xor_slot_count
219#define iop_chan_pq_zero_sum_slot_count iop_chan_xor_slot_count 219#define iop_chan_pq_zero_sum_slot_count iop_chan_xor_slot_count
220 220
221static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc,
222 struct iop_adma_chan *chan)
223{
224 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
225 return hw_desc->dest_addr;
226}
227
228static inline u32 iop_desc_get_qdest_addr(struct iop_adma_desc_slot *desc,
229 struct iop_adma_chan *chan)
230{
231 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
232 return hw_desc->q_dest_addr;
233}
234
235static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc, 221static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc,
236 struct iop_adma_chan *chan) 222 struct iop_adma_chan *chan)
237{ 223{
@@ -350,18 +336,6 @@ iop_desc_init_pq(struct iop_adma_desc_slot *desc, int src_cnt,
350 hw_desc->desc_ctrl = u_desc_ctrl.value; 336 hw_desc->desc_ctrl = u_desc_ctrl.value;
351} 337}
352 338
353static inline int iop_desc_is_pq(struct iop_adma_desc_slot *desc)
354{
355 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
356 union {
357 u32 value;
358 struct iop13xx_adma_desc_ctrl field;
359 } u_desc_ctrl;
360
361 u_desc_ctrl.value = hw_desc->desc_ctrl;
362 return u_desc_ctrl.field.pq_xfer_en;
363}
364
365static inline void 339static inline void
366iop_desc_init_pq_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, 340iop_desc_init_pq_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt,
367 unsigned long flags) 341 unsigned long flags)
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
index d43daf192b21..4c530a82fc46 100644
--- a/arch/ia64/hp/common/sba_iommu.c
+++ b/arch/ia64/hp/common/sba_iommu.c
@@ -1992,7 +1992,7 @@ sba_connect_bus(struct pci_bus *bus)
1992 if (PCI_CONTROLLER(bus)->iommu) 1992 if (PCI_CONTROLLER(bus)->iommu)
1993 return; 1993 return;
1994 1994
1995 handle = PCI_CONTROLLER(bus)->acpi_handle; 1995 handle = acpi_device_handle(PCI_CONTROLLER(bus)->companion);
1996 if (!handle) 1996 if (!handle)
1997 return; 1997 return;
1998 1998
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 80775f55f03f..71fbaaa495cc 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -95,7 +95,7 @@ struct iospace_resource {
95}; 95};
96 96
97struct pci_controller { 97struct pci_controller {
98 void *acpi_handle; 98 struct acpi_device *companion;
99 void *iommu; 99 void *iommu;
100 int segment; 100 int segment;
101 int node; /* nearest node with memory or -1 for global allocation */ 101 int node; /* nearest node with memory or -1 for global allocation */
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 5a9ff1c3c3e9..cb592773c78b 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -2166,12 +2166,6 @@ static const struct file_operations pfm_file_ops = {
2166 .flush = pfm_flush 2166 .flush = pfm_flush
2167}; 2167};
2168 2168
2169static int
2170pfmfs_delete_dentry(const struct dentry *dentry)
2171{
2172 return 1;
2173}
2174
2175static char *pfmfs_dname(struct dentry *dentry, char *buffer, int buflen) 2169static char *pfmfs_dname(struct dentry *dentry, char *buffer, int buflen)
2176{ 2170{
2177 return dynamic_dname(dentry, buffer, buflen, "pfm:[%lu]", 2171 return dynamic_dname(dentry, buffer, buflen, "pfm:[%lu]",
@@ -2179,7 +2173,7 @@ static char *pfmfs_dname(struct dentry *dentry, char *buffer, int buflen)
2179} 2173}
2180 2174
2181static const struct dentry_operations pfmfs_dentry_operations = { 2175static const struct dentry_operations pfmfs_dentry_operations = {
2182 .d_delete = pfmfs_delete_dentry, 2176 .d_delete = always_delete_dentry,
2183 .d_dname = pfmfs_dname, 2177 .d_dname = pfmfs_dname,
2184}; 2178};
2185 2179
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 2326790b7d8b..9e4938d8ca4d 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -436,9 +436,9 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
436 if (!controller) 436 if (!controller)
437 return NULL; 437 return NULL;
438 438
439 controller->acpi_handle = device->handle; 439 controller->companion = device;
440 440
441 pxm = acpi_get_pxm(controller->acpi_handle); 441 pxm = acpi_get_pxm(device->handle);
442#ifdef CONFIG_NUMA 442#ifdef CONFIG_NUMA
443 if (pxm >= 0) 443 if (pxm >= 0)
444 controller->node = pxm_to_node(pxm); 444 controller->node = pxm_to_node(pxm);
@@ -489,7 +489,7 @@ int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
489{ 489{
490 struct pci_controller *controller = bridge->bus->sysdata; 490 struct pci_controller *controller = bridge->bus->sysdata;
491 491
492 ACPI_HANDLE_SET(&bridge->dev, controller->acpi_handle); 492 ACPI_COMPANION_SET(&bridge->dev, controller->companion);
493 return 0; 493 return 0;
494} 494}
495 495
diff --git a/arch/ia64/sn/kernel/io_acpi_init.c b/arch/ia64/sn/kernel/io_acpi_init.c
index b1725398b5af..0640739cc20c 100644
--- a/arch/ia64/sn/kernel/io_acpi_init.c
+++ b/arch/ia64/sn/kernel/io_acpi_init.c
@@ -132,7 +132,7 @@ sn_get_bussoft_ptr(struct pci_bus *bus)
132 struct acpi_resource_vendor_typed *vendor; 132 struct acpi_resource_vendor_typed *vendor;
133 133
134 134
135 handle = PCI_CONTROLLER(bus)->acpi_handle; 135 handle = acpi_device_handle(PCI_CONTROLLER(bus)->companion);
136 status = acpi_get_vendor_resource(handle, METHOD_NAME__CRS, 136 status = acpi_get_vendor_resource(handle, METHOD_NAME__CRS,
137 &sn_uuid, &buffer); 137 &sn_uuid, &buffer);
138 if (ACPI_FAILURE(status)) { 138 if (ACPI_FAILURE(status)) {
@@ -360,7 +360,7 @@ sn_acpi_get_pcidev_info(struct pci_dev *dev, struct pcidev_info **pcidev_info,
360 acpi_status status; 360 acpi_status status;
361 struct acpi_buffer name_buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 361 struct acpi_buffer name_buffer = { ACPI_ALLOCATE_BUFFER, NULL };
362 362
363 rootbus_handle = PCI_CONTROLLER(dev)->acpi_handle; 363 rootbus_handle = acpi_device_handle(PCI_CONTROLLER(dev)->companion);
364 status = acpi_evaluate_integer(rootbus_handle, METHOD_NAME__SEG, NULL, 364 status = acpi_evaluate_integer(rootbus_handle, METHOD_NAME__SEG, NULL,
365 &segment); 365 &segment);
366 if (ACPI_SUCCESS(status)) { 366 if (ACPI_SUCCESS(status)) {
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 4c617bf8cdb2..4f6e48277c46 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -223,13 +223,13 @@
223 reg = <0xe2000 0x1000>; 223 reg = <0xe2000 0x1000>;
224 }; 224 };
225 225
226/include/ "qoriq-dma-0.dtsi" 226/include/ "elo3-dma-0.dtsi"
227 dma@100300 { 227 dma@100300 {
228 fsl,iommu-parent = <&pamu0>; 228 fsl,iommu-parent = <&pamu0>;
229 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */ 229 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
230 }; 230 };
231 231
232/include/ "qoriq-dma-1.dtsi" 232/include/ "elo3-dma-1.dtsi"
233 dma@101300 { 233 dma@101300 {
234 fsl,iommu-parent = <&pamu0>; 234 fsl,iommu-parent = <&pamu0>;
235 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */ 235 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
new file mode 100644
index 000000000000..3c210e0d5201
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
@@ -0,0 +1,82 @@
1/*
2 * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x100000 ]
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35dma0: dma@100300 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,elo3-dma";
39 reg = <0x100300 0x4>,
40 <0x100600 0x4>;
41 ranges = <0x0 0x100100 0x500>;
42 dma-channel@0 {
43 compatible = "fsl,eloplus-dma-channel";
44 reg = <0x0 0x80>;
45 interrupts = <28 2 0 0>;
46 };
47 dma-channel@80 {
48 compatible = "fsl,eloplus-dma-channel";
49 reg = <0x80 0x80>;
50 interrupts = <29 2 0 0>;
51 };
52 dma-channel@100 {
53 compatible = "fsl,eloplus-dma-channel";
54 reg = <0x100 0x80>;
55 interrupts = <30 2 0 0>;
56 };
57 dma-channel@180 {
58 compatible = "fsl,eloplus-dma-channel";
59 reg = <0x180 0x80>;
60 interrupts = <31 2 0 0>;
61 };
62 dma-channel@300 {
63 compatible = "fsl,eloplus-dma-channel";
64 reg = <0x300 0x80>;
65 interrupts = <76 2 0 0>;
66 };
67 dma-channel@380 {
68 compatible = "fsl,eloplus-dma-channel";
69 reg = <0x380 0x80>;
70 interrupts = <77 2 0 0>;
71 };
72 dma-channel@400 {
73 compatible = "fsl,eloplus-dma-channel";
74 reg = <0x400 0x80>;
75 interrupts = <78 2 0 0>;
76 };
77 dma-channel@480 {
78 compatible = "fsl,eloplus-dma-channel";
79 reg = <0x480 0x80>;
80 interrupts = <79 2 0 0>;
81 };
82};
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
new file mode 100644
index 000000000000..cccf3bb38224
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
@@ -0,0 +1,82 @@
1/*
2 * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x101000 ]
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35dma1: dma@101300 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,elo3-dma";
39 reg = <0x101300 0x4>,
40 <0x101600 0x4>;
41 ranges = <0x0 0x101100 0x500>;
42 dma-channel@0 {
43 compatible = "fsl,eloplus-dma-channel";
44 reg = <0x0 0x80>;
45 interrupts = <32 2 0 0>;
46 };
47 dma-channel@80 {
48 compatible = "fsl,eloplus-dma-channel";
49 reg = <0x80 0x80>;
50 interrupts = <33 2 0 0>;
51 };
52 dma-channel@100 {
53 compatible = "fsl,eloplus-dma-channel";
54 reg = <0x100 0x80>;
55 interrupts = <34 2 0 0>;
56 };
57 dma-channel@180 {
58 compatible = "fsl,eloplus-dma-channel";
59 reg = <0x180 0x80>;
60 interrupts = <35 2 0 0>;
61 };
62 dma-channel@300 {
63 compatible = "fsl,eloplus-dma-channel";
64 reg = <0x300 0x80>;
65 interrupts = <80 2 0 0>;
66 };
67 dma-channel@380 {
68 compatible = "fsl,eloplus-dma-channel";
69 reg = <0x380 0x80>;
70 interrupts = <81 2 0 0>;
71 };
72 dma-channel@400 {
73 compatible = "fsl,eloplus-dma-channel";
74 reg = <0x400 0x80>;
75 interrupts = <82 2 0 0>;
76 };
77 dma-channel@480 {
78 compatible = "fsl,eloplus-dma-channel";
79 reg = <0x480 0x80>;
80 interrupts = <83 2 0 0>;
81 };
82};
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index 510afa362de1..4143a9733cd0 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -387,8 +387,8 @@
387 reg = <0xea000 0x4000>; 387 reg = <0xea000 0x4000>;
388 }; 388 };
389 389
390/include/ "qoriq-dma-0.dtsi" 390/include/ "elo3-dma-0.dtsi"
391/include/ "qoriq-dma-1.dtsi" 391/include/ "elo3-dma-1.dtsi"
392 392
393/include/ "qoriq-espi-0.dtsi" 393/include/ "qoriq-espi-0.dtsi"
394 spi@110000 { 394 spi@110000 {
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 7d7443283a9d..947b5c417e83 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -15,7 +15,7 @@ struct pci_sysdata {
15 int domain; /* PCI domain */ 15 int domain; /* PCI domain */
16 int node; /* NUMA node */ 16 int node; /* NUMA node */
17#ifdef CONFIG_ACPI 17#ifdef CONFIG_ACPI
18 void *acpi; /* ACPI-specific data */ 18 struct acpi_device *companion; /* ACPI companion device */
19#endif 19#endif
20#ifdef CONFIG_X86_64 20#ifdef CONFIG_X86_64
21 void *iommu; /* IOMMU private data */ 21 void *iommu; /* IOMMU private data */
diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h
index b93e09a0fa21..37813b5ddc37 100644
--- a/arch/x86/include/uapi/asm/msr-index.h
+++ b/arch/x86/include/uapi/asm/msr-index.h
@@ -147,6 +147,8 @@
147#define MSR_PP1_ENERGY_STATUS 0x00000641 147#define MSR_PP1_ENERGY_STATUS 0x00000641
148#define MSR_PP1_POLICY 0x00000642 148#define MSR_PP1_POLICY 0x00000642
149 149
150#define MSR_CORE_C1_RES 0x00000660
151
150#define MSR_AMD64_MC0_MASK 0xc0010044 152#define MSR_AMD64_MC0_MASK 0xc0010044
151 153
152#define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x)) 154#define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x))
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index a7cccb6d7fec..36aa999b2631 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -209,7 +209,7 @@ static int preallocate_pmds(pmd_t *pmds[])
209 if (!pmd) 209 if (!pmd)
210 failed = true; 210 failed = true;
211 if (pmd && !pgtable_pmd_page_ctor(virt_to_page(pmd))) { 211 if (pmd && !pgtable_pmd_page_ctor(virt_to_page(pmd))) {
212 free_page((unsigned long)pmds[i]); 212 free_page((unsigned long)pmd);
213 pmd = NULL; 213 pmd = NULL;
214 failed = true; 214 failed = true;
215 } 215 }
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 7fb24e53d4c8..4f25ec077552 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -518,7 +518,7 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
518 sd = &info->sd; 518 sd = &info->sd;
519 sd->domain = domain; 519 sd->domain = domain;
520 sd->node = node; 520 sd->node = node;
521 sd->acpi = device->handle; 521 sd->companion = device;
522 /* 522 /*
523 * Maybe the desired pci bus has been already scanned. In such case 523 * Maybe the desired pci bus has been already scanned. In such case
524 * it is unnecessary to scan the pci bus with the given domain,busnum. 524 * it is unnecessary to scan the pci bus with the given domain,busnum.
@@ -589,7 +589,7 @@ int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
589{ 589{
590 struct pci_sysdata *sd = bridge->bus->sysdata; 590 struct pci_sysdata *sd = bridge->bus->sysdata;
591 591
592 ACPI_HANDLE_SET(&bridge->dev, sd->acpi); 592 ACPI_COMPANION_SET(&bridge->dev, sd->companion);
593 return 0; 593 return 0;
594} 594}
595 595
diff --git a/block/blk-mq.c b/block/blk-mq.c
index 862f458d4760..cdc629cf075b 100644
--- a/block/blk-mq.c
+++ b/block/blk-mq.c
@@ -171,9 +171,12 @@ bool blk_mq_can_queue(struct blk_mq_hw_ctx *hctx)
171} 171}
172EXPORT_SYMBOL(blk_mq_can_queue); 172EXPORT_SYMBOL(blk_mq_can_queue);
173 173
174static void blk_mq_rq_ctx_init(struct blk_mq_ctx *ctx, struct request *rq, 174static void blk_mq_rq_ctx_init(struct request_queue *q, struct blk_mq_ctx *ctx,
175 unsigned int rw_flags) 175 struct request *rq, unsigned int rw_flags)
176{ 176{
177 if (blk_queue_io_stat(q))
178 rw_flags |= REQ_IO_STAT;
179
177 rq->mq_ctx = ctx; 180 rq->mq_ctx = ctx;
178 rq->cmd_flags = rw_flags; 181 rq->cmd_flags = rw_flags;
179 ctx->rq_dispatched[rw_is_sync(rw_flags)]++; 182 ctx->rq_dispatched[rw_is_sync(rw_flags)]++;
@@ -197,7 +200,7 @@ static struct request *blk_mq_alloc_request_pinned(struct request_queue *q,
197 200
198 rq = __blk_mq_alloc_request(hctx, gfp & ~__GFP_WAIT, reserved); 201 rq = __blk_mq_alloc_request(hctx, gfp & ~__GFP_WAIT, reserved);
199 if (rq) { 202 if (rq) {
200 blk_mq_rq_ctx_init(ctx, rq, rw); 203 blk_mq_rq_ctx_init(q, ctx, rq, rw);
201 break; 204 break;
202 } else if (!(gfp & __GFP_WAIT)) 205 } else if (!(gfp & __GFP_WAIT))
203 break; 206 break;
@@ -718,6 +721,8 @@ static void __blk_mq_insert_request(struct blk_mq_hw_ctx *hctx,
718{ 721{
719 struct blk_mq_ctx *ctx = rq->mq_ctx; 722 struct blk_mq_ctx *ctx = rq->mq_ctx;
720 723
724 trace_block_rq_insert(hctx->queue, rq);
725
721 list_add_tail(&rq->queuelist, &ctx->rq_list); 726 list_add_tail(&rq->queuelist, &ctx->rq_list);
722 blk_mq_hctx_mark_pending(hctx, ctx); 727 blk_mq_hctx_mark_pending(hctx, ctx);
723 728
@@ -921,7 +926,7 @@ static void blk_mq_make_request(struct request_queue *q, struct bio *bio)
921 trace_block_getrq(q, bio, rw); 926 trace_block_getrq(q, bio, rw);
922 rq = __blk_mq_alloc_request(hctx, GFP_ATOMIC, false); 927 rq = __blk_mq_alloc_request(hctx, GFP_ATOMIC, false);
923 if (likely(rq)) 928 if (likely(rq))
924 blk_mq_rq_ctx_init(ctx, rq, rw); 929 blk_mq_rq_ctx_init(q, ctx, rq, rw);
925 else { 930 else {
926 blk_mq_put_ctx(ctx); 931 blk_mq_put_ctx(ctx);
927 trace_block_sleeprq(q, bio, rw); 932 trace_block_sleeprq(q, bio, rw);
@@ -1377,6 +1382,7 @@ struct request_queue *blk_mq_init_queue(struct blk_mq_reg *reg,
1377 q->queue_hw_ctx = hctxs; 1382 q->queue_hw_ctx = hctxs;
1378 1383
1379 q->mq_ops = reg->ops; 1384 q->mq_ops = reg->ops;
1385 q->queue_flags |= QUEUE_FLAG_MQ_DEFAULT;
1380 1386
1381 blk_queue_make_request(q, blk_mq_make_request); 1387 blk_queue_make_request(q, blk_mq_make_request);
1382 blk_queue_rq_timed_out(q, reg->ops->timeout); 1388 blk_queue_rq_timed_out(q, reg->ops->timeout);
diff --git a/crypto/async_tx/async_memcpy.c b/crypto/async_tx/async_memcpy.c
index 9e62feffb374..f8c0b8dbeb75 100644
--- a/crypto/async_tx/async_memcpy.c
+++ b/crypto/async_tx/async_memcpy.c
@@ -50,33 +50,36 @@ async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
50 &dest, 1, &src, 1, len); 50 &dest, 1, &src, 1, len);
51 struct dma_device *device = chan ? chan->device : NULL; 51 struct dma_device *device = chan ? chan->device : NULL;
52 struct dma_async_tx_descriptor *tx = NULL; 52 struct dma_async_tx_descriptor *tx = NULL;
53 struct dmaengine_unmap_data *unmap = NULL;
53 54
54 if (device && is_dma_copy_aligned(device, src_offset, dest_offset, len)) { 55 if (device)
55 dma_addr_t dma_dest, dma_src; 56 unmap = dmaengine_get_unmap_data(device->dev, 2, GFP_NOIO);
57
58 if (unmap && is_dma_copy_aligned(device, src_offset, dest_offset, len)) {
56 unsigned long dma_prep_flags = 0; 59 unsigned long dma_prep_flags = 0;
57 60
58 if (submit->cb_fn) 61 if (submit->cb_fn)
59 dma_prep_flags |= DMA_PREP_INTERRUPT; 62 dma_prep_flags |= DMA_PREP_INTERRUPT;
60 if (submit->flags & ASYNC_TX_FENCE) 63 if (submit->flags & ASYNC_TX_FENCE)
61 dma_prep_flags |= DMA_PREP_FENCE; 64 dma_prep_flags |= DMA_PREP_FENCE;
62 dma_dest = dma_map_page(device->dev, dest, dest_offset, len, 65
63 DMA_FROM_DEVICE); 66 unmap->to_cnt = 1;
64 67 unmap->addr[0] = dma_map_page(device->dev, src, src_offset, len,
65 dma_src = dma_map_page(device->dev, src, src_offset, len, 68 DMA_TO_DEVICE);
66 DMA_TO_DEVICE); 69 unmap->from_cnt = 1;
67 70 unmap->addr[1] = dma_map_page(device->dev, dest, dest_offset, len,
68 tx = device->device_prep_dma_memcpy(chan, dma_dest, dma_src, 71 DMA_FROM_DEVICE);
69 len, dma_prep_flags); 72 unmap->len = len;
70 if (!tx) { 73
71 dma_unmap_page(device->dev, dma_dest, len, 74 tx = device->device_prep_dma_memcpy(chan, unmap->addr[1],
72 DMA_FROM_DEVICE); 75 unmap->addr[0], len,
73 dma_unmap_page(device->dev, dma_src, len, 76 dma_prep_flags);
74 DMA_TO_DEVICE);
75 }
76 } 77 }
77 78
78 if (tx) { 79 if (tx) {
79 pr_debug("%s: (async) len: %zu\n", __func__, len); 80 pr_debug("%s: (async) len: %zu\n", __func__, len);
81
82 dma_set_unmap(tx, unmap);
80 async_tx_submit(chan, tx, submit); 83 async_tx_submit(chan, tx, submit);
81 } else { 84 } else {
82 void *dest_buf, *src_buf; 85 void *dest_buf, *src_buf;
@@ -96,6 +99,8 @@ async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
96 async_tx_sync_epilog(submit); 99 async_tx_sync_epilog(submit);
97 } 100 }
98 101
102 dmaengine_unmap_put(unmap);
103
99 return tx; 104 return tx;
100} 105}
101EXPORT_SYMBOL_GPL(async_memcpy); 106EXPORT_SYMBOL_GPL(async_memcpy);
diff --git a/crypto/async_tx/async_pq.c b/crypto/async_tx/async_pq.c
index 91d5d385899e..d05327caf69d 100644
--- a/crypto/async_tx/async_pq.c
+++ b/crypto/async_tx/async_pq.c
@@ -46,49 +46,24 @@ static struct page *pq_scribble_page;
46 * do_async_gen_syndrome - asynchronously calculate P and/or Q 46 * do_async_gen_syndrome - asynchronously calculate P and/or Q
47 */ 47 */
48static __async_inline struct dma_async_tx_descriptor * 48static __async_inline struct dma_async_tx_descriptor *
49do_async_gen_syndrome(struct dma_chan *chan, struct page **blocks, 49do_async_gen_syndrome(struct dma_chan *chan,
50 const unsigned char *scfs, unsigned int offset, int disks, 50 const unsigned char *scfs, int disks,
51 size_t len, dma_addr_t *dma_src, 51 struct dmaengine_unmap_data *unmap,
52 enum dma_ctrl_flags dma_flags,
52 struct async_submit_ctl *submit) 53 struct async_submit_ctl *submit)
53{ 54{
54 struct dma_async_tx_descriptor *tx = NULL; 55 struct dma_async_tx_descriptor *tx = NULL;
55 struct dma_device *dma = chan->device; 56 struct dma_device *dma = chan->device;
56 enum dma_ctrl_flags dma_flags = 0;
57 enum async_tx_flags flags_orig = submit->flags; 57 enum async_tx_flags flags_orig = submit->flags;
58 dma_async_tx_callback cb_fn_orig = submit->cb_fn; 58 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
59 dma_async_tx_callback cb_param_orig = submit->cb_param; 59 dma_async_tx_callback cb_param_orig = submit->cb_param;
60 int src_cnt = disks - 2; 60 int src_cnt = disks - 2;
61 unsigned char coefs[src_cnt];
62 unsigned short pq_src_cnt; 61 unsigned short pq_src_cnt;
63 dma_addr_t dma_dest[2]; 62 dma_addr_t dma_dest[2];
64 int src_off = 0; 63 int src_off = 0;
65 int idx;
66 int i;
67 64
68 /* DMAs use destinations as sources, so use BIDIRECTIONAL mapping */ 65 if (submit->flags & ASYNC_TX_FENCE)
69 if (P(blocks, disks)) 66 dma_flags |= DMA_PREP_FENCE;
70 dma_dest[0] = dma_map_page(dma->dev, P(blocks, disks), offset,
71 len, DMA_BIDIRECTIONAL);
72 else
73 dma_flags |= DMA_PREP_PQ_DISABLE_P;
74 if (Q(blocks, disks))
75 dma_dest[1] = dma_map_page(dma->dev, Q(blocks, disks), offset,
76 len, DMA_BIDIRECTIONAL);
77 else
78 dma_flags |= DMA_PREP_PQ_DISABLE_Q;
79
80 /* convert source addresses being careful to collapse 'empty'
81 * sources and update the coefficients accordingly
82 */
83 for (i = 0, idx = 0; i < src_cnt; i++) {
84 if (blocks[i] == NULL)
85 continue;
86 dma_src[idx] = dma_map_page(dma->dev, blocks[i], offset, len,
87 DMA_TO_DEVICE);
88 coefs[idx] = scfs[i];
89 idx++;
90 }
91 src_cnt = idx;
92 67
93 while (src_cnt > 0) { 68 while (src_cnt > 0) {
94 submit->flags = flags_orig; 69 submit->flags = flags_orig;
@@ -100,28 +75,25 @@ do_async_gen_syndrome(struct dma_chan *chan, struct page **blocks,
100 if (src_cnt > pq_src_cnt) { 75 if (src_cnt > pq_src_cnt) {
101 submit->flags &= ~ASYNC_TX_ACK; 76 submit->flags &= ~ASYNC_TX_ACK;
102 submit->flags |= ASYNC_TX_FENCE; 77 submit->flags |= ASYNC_TX_FENCE;
103 dma_flags |= DMA_COMPL_SKIP_DEST_UNMAP;
104 submit->cb_fn = NULL; 78 submit->cb_fn = NULL;
105 submit->cb_param = NULL; 79 submit->cb_param = NULL;
106 } else { 80 } else {
107 dma_flags &= ~DMA_COMPL_SKIP_DEST_UNMAP;
108 submit->cb_fn = cb_fn_orig; 81 submit->cb_fn = cb_fn_orig;
109 submit->cb_param = cb_param_orig; 82 submit->cb_param = cb_param_orig;
110 if (cb_fn_orig) 83 if (cb_fn_orig)
111 dma_flags |= DMA_PREP_INTERRUPT; 84 dma_flags |= DMA_PREP_INTERRUPT;
112 } 85 }
113 if (submit->flags & ASYNC_TX_FENCE)
114 dma_flags |= DMA_PREP_FENCE;
115 86
116 /* Since we have clobbered the src_list we are committed 87 /* Drivers force forward progress in case they can not provide
117 * to doing this asynchronously. Drivers force forward 88 * a descriptor
118 * progress in case they can not provide a descriptor
119 */ 89 */
120 for (;;) { 90 for (;;) {
91 dma_dest[0] = unmap->addr[disks - 2];
92 dma_dest[1] = unmap->addr[disks - 1];
121 tx = dma->device_prep_dma_pq(chan, dma_dest, 93 tx = dma->device_prep_dma_pq(chan, dma_dest,
122 &dma_src[src_off], 94 &unmap->addr[src_off],
123 pq_src_cnt, 95 pq_src_cnt,
124 &coefs[src_off], len, 96 &scfs[src_off], unmap->len,
125 dma_flags); 97 dma_flags);
126 if (likely(tx)) 98 if (likely(tx))
127 break; 99 break;
@@ -129,6 +101,7 @@ do_async_gen_syndrome(struct dma_chan *chan, struct page **blocks,
129 dma_async_issue_pending(chan); 101 dma_async_issue_pending(chan);
130 } 102 }
131 103
104 dma_set_unmap(tx, unmap);
132 async_tx_submit(chan, tx, submit); 105 async_tx_submit(chan, tx, submit);
133 submit->depend_tx = tx; 106 submit->depend_tx = tx;
134 107
@@ -188,10 +161,6 @@ do_sync_gen_syndrome(struct page **blocks, unsigned int offset, int disks,
188 * set to NULL those buffers will be replaced with the raid6_zero_page 161 * set to NULL those buffers will be replaced with the raid6_zero_page
189 * in the synchronous path and omitted in the hardware-asynchronous 162 * in the synchronous path and omitted in the hardware-asynchronous
190 * path. 163 * path.
191 *
192 * 'blocks' note: if submit->scribble is NULL then the contents of
193 * 'blocks' may be overwritten to perform address conversions
194 * (dma_map_page() or page_address()).
195 */ 164 */
196struct dma_async_tx_descriptor * 165struct dma_async_tx_descriptor *
197async_gen_syndrome(struct page **blocks, unsigned int offset, int disks, 166async_gen_syndrome(struct page **blocks, unsigned int offset, int disks,
@@ -202,26 +171,69 @@ async_gen_syndrome(struct page **blocks, unsigned int offset, int disks,
202 &P(blocks, disks), 2, 171 &P(blocks, disks), 2,
203 blocks, src_cnt, len); 172 blocks, src_cnt, len);
204 struct dma_device *device = chan ? chan->device : NULL; 173 struct dma_device *device = chan ? chan->device : NULL;
205 dma_addr_t *dma_src = NULL; 174 struct dmaengine_unmap_data *unmap = NULL;
206 175
207 BUG_ON(disks > 255 || !(P(blocks, disks) || Q(blocks, disks))); 176 BUG_ON(disks > 255 || !(P(blocks, disks) || Q(blocks, disks)));
208 177
209 if (submit->scribble) 178 if (device)
210 dma_src = submit->scribble; 179 unmap = dmaengine_get_unmap_data(device->dev, disks, GFP_NOIO);
211 else if (sizeof(dma_addr_t) <= sizeof(struct page *))
212 dma_src = (dma_addr_t *) blocks;
213 180
214 if (dma_src && device && 181 if (unmap &&
215 (src_cnt <= dma_maxpq(device, 0) || 182 (src_cnt <= dma_maxpq(device, 0) ||
216 dma_maxpq(device, DMA_PREP_CONTINUE) > 0) && 183 dma_maxpq(device, DMA_PREP_CONTINUE) > 0) &&
217 is_dma_pq_aligned(device, offset, 0, len)) { 184 is_dma_pq_aligned(device, offset, 0, len)) {
185 struct dma_async_tx_descriptor *tx;
186 enum dma_ctrl_flags dma_flags = 0;
187 unsigned char coefs[src_cnt];
188 int i, j;
189
218 /* run the p+q asynchronously */ 190 /* run the p+q asynchronously */
219 pr_debug("%s: (async) disks: %d len: %zu\n", 191 pr_debug("%s: (async) disks: %d len: %zu\n",
220 __func__, disks, len); 192 __func__, disks, len);
221 return do_async_gen_syndrome(chan, blocks, raid6_gfexp, offset, 193
222 disks, len, dma_src, submit); 194 /* convert source addresses being careful to collapse 'empty'
195 * sources and update the coefficients accordingly
196 */
197 unmap->len = len;
198 for (i = 0, j = 0; i < src_cnt; i++) {
199 if (blocks[i] == NULL)
200 continue;
201 unmap->addr[j] = dma_map_page(device->dev, blocks[i], offset,
202 len, DMA_TO_DEVICE);
203 coefs[j] = raid6_gfexp[i];
204 unmap->to_cnt++;
205 j++;
206 }
207
208 /*
209 * DMAs use destinations as sources,
210 * so use BIDIRECTIONAL mapping
211 */
212 unmap->bidi_cnt++;
213 if (P(blocks, disks))
214 unmap->addr[j++] = dma_map_page(device->dev, P(blocks, disks),
215 offset, len, DMA_BIDIRECTIONAL);
216 else {
217 unmap->addr[j++] = 0;
218 dma_flags |= DMA_PREP_PQ_DISABLE_P;
219 }
220
221 unmap->bidi_cnt++;
222 if (Q(blocks, disks))
223 unmap->addr[j++] = dma_map_page(device->dev, Q(blocks, disks),
224 offset, len, DMA_BIDIRECTIONAL);
225 else {
226 unmap->addr[j++] = 0;
227 dma_flags |= DMA_PREP_PQ_DISABLE_Q;
228 }
229
230 tx = do_async_gen_syndrome(chan, coefs, j, unmap, dma_flags, submit);
231 dmaengine_unmap_put(unmap);
232 return tx;
223 } 233 }
224 234
235 dmaengine_unmap_put(unmap);
236
225 /* run the pq synchronously */ 237 /* run the pq synchronously */
226 pr_debug("%s: (sync) disks: %d len: %zu\n", __func__, disks, len); 238 pr_debug("%s: (sync) disks: %d len: %zu\n", __func__, disks, len);
227 239
@@ -277,50 +289,60 @@ async_syndrome_val(struct page **blocks, unsigned int offset, int disks,
277 struct dma_async_tx_descriptor *tx; 289 struct dma_async_tx_descriptor *tx;
278 unsigned char coefs[disks-2]; 290 unsigned char coefs[disks-2];
279 enum dma_ctrl_flags dma_flags = submit->cb_fn ? DMA_PREP_INTERRUPT : 0; 291 enum dma_ctrl_flags dma_flags = submit->cb_fn ? DMA_PREP_INTERRUPT : 0;
280 dma_addr_t *dma_src = NULL; 292 struct dmaengine_unmap_data *unmap = NULL;
281 int src_cnt = 0;
282 293
283 BUG_ON(disks < 4); 294 BUG_ON(disks < 4);
284 295
285 if (submit->scribble) 296 if (device)
286 dma_src = submit->scribble; 297 unmap = dmaengine_get_unmap_data(device->dev, disks, GFP_NOIO);
287 else if (sizeof(dma_addr_t) <= sizeof(struct page *))
288 dma_src = (dma_addr_t *) blocks;
289 298
290 if (dma_src && device && disks <= dma_maxpq(device, 0) && 299 if (unmap && disks <= dma_maxpq(device, 0) &&
291 is_dma_pq_aligned(device, offset, 0, len)) { 300 is_dma_pq_aligned(device, offset, 0, len)) {
292 struct device *dev = device->dev; 301 struct device *dev = device->dev;
293 dma_addr_t *pq = &dma_src[disks-2]; 302 dma_addr_t pq[2];
294 int i; 303 int i, j = 0, src_cnt = 0;
295 304
296 pr_debug("%s: (async) disks: %d len: %zu\n", 305 pr_debug("%s: (async) disks: %d len: %zu\n",
297 __func__, disks, len); 306 __func__, disks, len);
298 if (!P(blocks, disks)) 307
308 unmap->len = len;
309 for (i = 0; i < disks-2; i++)
310 if (likely(blocks[i])) {
311 unmap->addr[j] = dma_map_page(dev, blocks[i],
312 offset, len,
313 DMA_TO_DEVICE);
314 coefs[j] = raid6_gfexp[i];
315 unmap->to_cnt++;
316 src_cnt++;
317 j++;
318 }
319
320 if (!P(blocks, disks)) {
321 pq[0] = 0;
299 dma_flags |= DMA_PREP_PQ_DISABLE_P; 322 dma_flags |= DMA_PREP_PQ_DISABLE_P;
300 else 323 } else {
301 pq[0] = dma_map_page(dev, P(blocks, disks), 324 pq[0] = dma_map_page(dev, P(blocks, disks),
302 offset, len, 325 offset, len,
303 DMA_TO_DEVICE); 326 DMA_TO_DEVICE);
304 if (!Q(blocks, disks)) 327 unmap->addr[j++] = pq[0];
328 unmap->to_cnt++;
329 }
330 if (!Q(blocks, disks)) {
331 pq[1] = 0;
305 dma_flags |= DMA_PREP_PQ_DISABLE_Q; 332 dma_flags |= DMA_PREP_PQ_DISABLE_Q;
306 else 333 } else {
307 pq[1] = dma_map_page(dev, Q(blocks, disks), 334 pq[1] = dma_map_page(dev, Q(blocks, disks),
308 offset, len, 335 offset, len,
309 DMA_TO_DEVICE); 336 DMA_TO_DEVICE);
337 unmap->addr[j++] = pq[1];
338 unmap->to_cnt++;
339 }
310 340
311 if (submit->flags & ASYNC_TX_FENCE) 341 if (submit->flags & ASYNC_TX_FENCE)
312 dma_flags |= DMA_PREP_FENCE; 342 dma_flags |= DMA_PREP_FENCE;
313 for (i = 0; i < disks-2; i++)
314 if (likely(blocks[i])) {
315 dma_src[src_cnt] = dma_map_page(dev, blocks[i],
316 offset, len,
317 DMA_TO_DEVICE);
318 coefs[src_cnt] = raid6_gfexp[i];
319 src_cnt++;
320 }
321
322 for (;;) { 343 for (;;) {
323 tx = device->device_prep_dma_pq_val(chan, pq, dma_src, 344 tx = device->device_prep_dma_pq_val(chan, pq,
345 unmap->addr,
324 src_cnt, 346 src_cnt,
325 coefs, 347 coefs,
326 len, pqres, 348 len, pqres,
@@ -330,6 +352,8 @@ async_syndrome_val(struct page **blocks, unsigned int offset, int disks,
330 async_tx_quiesce(&submit->depend_tx); 352 async_tx_quiesce(&submit->depend_tx);
331 dma_async_issue_pending(chan); 353 dma_async_issue_pending(chan);
332 } 354 }
355
356 dma_set_unmap(tx, unmap);
333 async_tx_submit(chan, tx, submit); 357 async_tx_submit(chan, tx, submit);
334 358
335 return tx; 359 return tx;
diff --git a/crypto/async_tx/async_raid6_recov.c b/crypto/async_tx/async_raid6_recov.c
index a9f08a6a582e..934a84981495 100644
--- a/crypto/async_tx/async_raid6_recov.c
+++ b/crypto/async_tx/async_raid6_recov.c
@@ -26,6 +26,7 @@
26#include <linux/dma-mapping.h> 26#include <linux/dma-mapping.h>
27#include <linux/raid/pq.h> 27#include <linux/raid/pq.h>
28#include <linux/async_tx.h> 28#include <linux/async_tx.h>
29#include <linux/dmaengine.h>
29 30
30static struct dma_async_tx_descriptor * 31static struct dma_async_tx_descriptor *
31async_sum_product(struct page *dest, struct page **srcs, unsigned char *coef, 32async_sum_product(struct page *dest, struct page **srcs, unsigned char *coef,
@@ -34,35 +35,45 @@ async_sum_product(struct page *dest, struct page **srcs, unsigned char *coef,
34 struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ, 35 struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ,
35 &dest, 1, srcs, 2, len); 36 &dest, 1, srcs, 2, len);
36 struct dma_device *dma = chan ? chan->device : NULL; 37 struct dma_device *dma = chan ? chan->device : NULL;
38 struct dmaengine_unmap_data *unmap = NULL;
37 const u8 *amul, *bmul; 39 const u8 *amul, *bmul;
38 u8 ax, bx; 40 u8 ax, bx;
39 u8 *a, *b, *c; 41 u8 *a, *b, *c;
40 42
41 if (dma) { 43 if (dma)
42 dma_addr_t dma_dest[2]; 44 unmap = dmaengine_get_unmap_data(dma->dev, 3, GFP_NOIO);
43 dma_addr_t dma_src[2]; 45
46 if (unmap) {
44 struct device *dev = dma->dev; 47 struct device *dev = dma->dev;
48 dma_addr_t pq[2];
45 struct dma_async_tx_descriptor *tx; 49 struct dma_async_tx_descriptor *tx;
46 enum dma_ctrl_flags dma_flags = DMA_PREP_PQ_DISABLE_P; 50 enum dma_ctrl_flags dma_flags = DMA_PREP_PQ_DISABLE_P;
47 51
48 if (submit->flags & ASYNC_TX_FENCE) 52 if (submit->flags & ASYNC_TX_FENCE)
49 dma_flags |= DMA_PREP_FENCE; 53 dma_flags |= DMA_PREP_FENCE;
50 dma_dest[1] = dma_map_page(dev, dest, 0, len, DMA_BIDIRECTIONAL); 54 unmap->addr[0] = dma_map_page(dev, srcs[0], 0, len, DMA_TO_DEVICE);
51 dma_src[0] = dma_map_page(dev, srcs[0], 0, len, DMA_TO_DEVICE); 55 unmap->addr[1] = dma_map_page(dev, srcs[1], 0, len, DMA_TO_DEVICE);
52 dma_src[1] = dma_map_page(dev, srcs[1], 0, len, DMA_TO_DEVICE); 56 unmap->to_cnt = 2;
53 tx = dma->device_prep_dma_pq(chan, dma_dest, dma_src, 2, coef, 57
58 unmap->addr[2] = dma_map_page(dev, dest, 0, len, DMA_BIDIRECTIONAL);
59 unmap->bidi_cnt = 1;
60 /* engine only looks at Q, but expects it to follow P */
61 pq[1] = unmap->addr[2];
62
63 unmap->len = len;
64 tx = dma->device_prep_dma_pq(chan, pq, unmap->addr, 2, coef,
54 len, dma_flags); 65 len, dma_flags);
55 if (tx) { 66 if (tx) {
67 dma_set_unmap(tx, unmap);
56 async_tx_submit(chan, tx, submit); 68 async_tx_submit(chan, tx, submit);
69 dmaengine_unmap_put(unmap);
57 return tx; 70 return tx;
58 } 71 }
59 72
60 /* could not get a descriptor, unmap and fall through to 73 /* could not get a descriptor, unmap and fall through to
61 * the synchronous path 74 * the synchronous path
62 */ 75 */
63 dma_unmap_page(dev, dma_dest[1], len, DMA_BIDIRECTIONAL); 76 dmaengine_unmap_put(unmap);
64 dma_unmap_page(dev, dma_src[0], len, DMA_TO_DEVICE);
65 dma_unmap_page(dev, dma_src[1], len, DMA_TO_DEVICE);
66 } 77 }
67 78
68 /* run the operation synchronously */ 79 /* run the operation synchronously */
@@ -89,23 +100,38 @@ async_mult(struct page *dest, struct page *src, u8 coef, size_t len,
89 struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ, 100 struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ,
90 &dest, 1, &src, 1, len); 101 &dest, 1, &src, 1, len);
91 struct dma_device *dma = chan ? chan->device : NULL; 102 struct dma_device *dma = chan ? chan->device : NULL;
103 struct dmaengine_unmap_data *unmap = NULL;
92 const u8 *qmul; /* Q multiplier table */ 104 const u8 *qmul; /* Q multiplier table */
93 u8 *d, *s; 105 u8 *d, *s;
94 106
95 if (dma) { 107 if (dma)
108 unmap = dmaengine_get_unmap_data(dma->dev, 3, GFP_NOIO);
109
110 if (unmap) {
96 dma_addr_t dma_dest[2]; 111 dma_addr_t dma_dest[2];
97 dma_addr_t dma_src[1];
98 struct device *dev = dma->dev; 112 struct device *dev = dma->dev;
99 struct dma_async_tx_descriptor *tx; 113 struct dma_async_tx_descriptor *tx;
100 enum dma_ctrl_flags dma_flags = DMA_PREP_PQ_DISABLE_P; 114 enum dma_ctrl_flags dma_flags = DMA_PREP_PQ_DISABLE_P;
101 115
102 if (submit->flags & ASYNC_TX_FENCE) 116 if (submit->flags & ASYNC_TX_FENCE)
103 dma_flags |= DMA_PREP_FENCE; 117 dma_flags |= DMA_PREP_FENCE;
104 dma_dest[1] = dma_map_page(dev, dest, 0, len, DMA_BIDIRECTIONAL); 118 unmap->addr[0] = dma_map_page(dev, src, 0, len, DMA_TO_DEVICE);
105 dma_src[0] = dma_map_page(dev, src, 0, len, DMA_TO_DEVICE); 119 unmap->to_cnt++;
106 tx = dma->device_prep_dma_pq(chan, dma_dest, dma_src, 1, &coef, 120 unmap->addr[1] = dma_map_page(dev, dest, 0, len, DMA_BIDIRECTIONAL);
107 len, dma_flags); 121 dma_dest[1] = unmap->addr[1];
122 unmap->bidi_cnt++;
123 unmap->len = len;
124
125 /* this looks funny, but the engine looks for Q at
126 * dma_dest[1] and ignores dma_dest[0] as a dest
127 * due to DMA_PREP_PQ_DISABLE_P
128 */
129 tx = dma->device_prep_dma_pq(chan, dma_dest, unmap->addr,
130 1, &coef, len, dma_flags);
131
108 if (tx) { 132 if (tx) {
133 dma_set_unmap(tx, unmap);
134 dmaengine_unmap_put(unmap);
109 async_tx_submit(chan, tx, submit); 135 async_tx_submit(chan, tx, submit);
110 return tx; 136 return tx;
111 } 137 }
@@ -113,8 +139,7 @@ async_mult(struct page *dest, struct page *src, u8 coef, size_t len,
113 /* could not get a descriptor, unmap and fall through to 139 /* could not get a descriptor, unmap and fall through to
114 * the synchronous path 140 * the synchronous path
115 */ 141 */
116 dma_unmap_page(dev, dma_dest[1], len, DMA_BIDIRECTIONAL); 142 dmaengine_unmap_put(unmap);
117 dma_unmap_page(dev, dma_src[0], len, DMA_TO_DEVICE);
118 } 143 }
119 144
120 /* no channel available, or failed to allocate a descriptor, so 145 /* no channel available, or failed to allocate a descriptor, so
diff --git a/crypto/async_tx/async_tx.c b/crypto/async_tx/async_tx.c
index 7be34248b450..39ea4791a3c9 100644
--- a/crypto/async_tx/async_tx.c
+++ b/crypto/async_tx/async_tx.c
@@ -128,7 +128,7 @@ async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
128 } 128 }
129 device->device_issue_pending(chan); 129 device->device_issue_pending(chan);
130 } else { 130 } else {
131 if (dma_wait_for_async_tx(depend_tx) != DMA_SUCCESS) 131 if (dma_wait_for_async_tx(depend_tx) != DMA_COMPLETE)
132 panic("%s: DMA error waiting for depend_tx\n", 132 panic("%s: DMA error waiting for depend_tx\n",
133 __func__); 133 __func__);
134 tx->tx_submit(tx); 134 tx->tx_submit(tx);
@@ -280,7 +280,7 @@ void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
280 * we are referring to the correct operation 280 * we are referring to the correct operation
281 */ 281 */
282 BUG_ON(async_tx_test_ack(*tx)); 282 BUG_ON(async_tx_test_ack(*tx));
283 if (dma_wait_for_async_tx(*tx) != DMA_SUCCESS) 283 if (dma_wait_for_async_tx(*tx) != DMA_COMPLETE)
284 panic("%s: DMA error waiting for transaction\n", 284 panic("%s: DMA error waiting for transaction\n",
285 __func__); 285 __func__);
286 async_tx_ack(*tx); 286 async_tx_ack(*tx);
diff --git a/crypto/async_tx/async_xor.c b/crypto/async_tx/async_xor.c
index 8ade0a0481c6..3c562f5a60bb 100644
--- a/crypto/async_tx/async_xor.c
+++ b/crypto/async_tx/async_xor.c
@@ -33,48 +33,31 @@
33 33
34/* do_async_xor - dma map the pages and perform the xor with an engine */ 34/* do_async_xor - dma map the pages and perform the xor with an engine */
35static __async_inline struct dma_async_tx_descriptor * 35static __async_inline struct dma_async_tx_descriptor *
36do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list, 36do_async_xor(struct dma_chan *chan, struct dmaengine_unmap_data *unmap,
37 unsigned int offset, int src_cnt, size_t len, dma_addr_t *dma_src,
38 struct async_submit_ctl *submit) 37 struct async_submit_ctl *submit)
39{ 38{
40 struct dma_device *dma = chan->device; 39 struct dma_device *dma = chan->device;
41 struct dma_async_tx_descriptor *tx = NULL; 40 struct dma_async_tx_descriptor *tx = NULL;
42 int src_off = 0;
43 int i;
44 dma_async_tx_callback cb_fn_orig = submit->cb_fn; 41 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
45 void *cb_param_orig = submit->cb_param; 42 void *cb_param_orig = submit->cb_param;
46 enum async_tx_flags flags_orig = submit->flags; 43 enum async_tx_flags flags_orig = submit->flags;
47 enum dma_ctrl_flags dma_flags; 44 enum dma_ctrl_flags dma_flags = 0;
48 int xor_src_cnt = 0; 45 int src_cnt = unmap->to_cnt;
49 dma_addr_t dma_dest; 46 int xor_src_cnt;
50 47 dma_addr_t dma_dest = unmap->addr[unmap->to_cnt];
51 /* map the dest bidrectional in case it is re-used as a source */ 48 dma_addr_t *src_list = unmap->addr;
52 dma_dest = dma_map_page(dma->dev, dest, offset, len, DMA_BIDIRECTIONAL);
53 for (i = 0; i < src_cnt; i++) {
54 /* only map the dest once */
55 if (!src_list[i])
56 continue;
57 if (unlikely(src_list[i] == dest)) {
58 dma_src[xor_src_cnt++] = dma_dest;
59 continue;
60 }
61 dma_src[xor_src_cnt++] = dma_map_page(dma->dev, src_list[i], offset,
62 len, DMA_TO_DEVICE);
63 }
64 src_cnt = xor_src_cnt;
65 49
66 while (src_cnt) { 50 while (src_cnt) {
51 dma_addr_t tmp;
52
67 submit->flags = flags_orig; 53 submit->flags = flags_orig;
68 dma_flags = 0;
69 xor_src_cnt = min(src_cnt, (int)dma->max_xor); 54 xor_src_cnt = min(src_cnt, (int)dma->max_xor);
70 /* if we are submitting additional xors, leave the chain open, 55 /* if we are submitting additional xors, leave the chain open
71 * clear the callback parameters, and leave the destination 56 * and clear the callback parameters
72 * buffer mapped
73 */ 57 */
74 if (src_cnt > xor_src_cnt) { 58 if (src_cnt > xor_src_cnt) {
75 submit->flags &= ~ASYNC_TX_ACK; 59 submit->flags &= ~ASYNC_TX_ACK;
76 submit->flags |= ASYNC_TX_FENCE; 60 submit->flags |= ASYNC_TX_FENCE;
77 dma_flags = DMA_COMPL_SKIP_DEST_UNMAP;
78 submit->cb_fn = NULL; 61 submit->cb_fn = NULL;
79 submit->cb_param = NULL; 62 submit->cb_param = NULL;
80 } else { 63 } else {
@@ -85,12 +68,18 @@ do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list,
85 dma_flags |= DMA_PREP_INTERRUPT; 68 dma_flags |= DMA_PREP_INTERRUPT;
86 if (submit->flags & ASYNC_TX_FENCE) 69 if (submit->flags & ASYNC_TX_FENCE)
87 dma_flags |= DMA_PREP_FENCE; 70 dma_flags |= DMA_PREP_FENCE;
88 /* Since we have clobbered the src_list we are committed 71
89 * to doing this asynchronously. Drivers force forward progress 72 /* Drivers force forward progress in case they can not provide a
90 * in case they can not provide a descriptor 73 * descriptor
91 */ 74 */
92 tx = dma->device_prep_dma_xor(chan, dma_dest, &dma_src[src_off], 75 tmp = src_list[0];
93 xor_src_cnt, len, dma_flags); 76 if (src_list > unmap->addr)
77 src_list[0] = dma_dest;
78 tx = dma->device_prep_dma_xor(chan, dma_dest, src_list,
79 xor_src_cnt, unmap->len,
80 dma_flags);
81 src_list[0] = tmp;
82
94 83
95 if (unlikely(!tx)) 84 if (unlikely(!tx))
96 async_tx_quiesce(&submit->depend_tx); 85 async_tx_quiesce(&submit->depend_tx);
@@ -99,22 +88,21 @@ do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list,
99 while (unlikely(!tx)) { 88 while (unlikely(!tx)) {
100 dma_async_issue_pending(chan); 89 dma_async_issue_pending(chan);
101 tx = dma->device_prep_dma_xor(chan, dma_dest, 90 tx = dma->device_prep_dma_xor(chan, dma_dest,
102 &dma_src[src_off], 91 src_list,
103 xor_src_cnt, len, 92 xor_src_cnt, unmap->len,
104 dma_flags); 93 dma_flags);
105 } 94 }
106 95
96 dma_set_unmap(tx, unmap);
107 async_tx_submit(chan, tx, submit); 97 async_tx_submit(chan, tx, submit);
108 submit->depend_tx = tx; 98 submit->depend_tx = tx;
109 99
110 if (src_cnt > xor_src_cnt) { 100 if (src_cnt > xor_src_cnt) {
111 /* drop completed sources */ 101 /* drop completed sources */
112 src_cnt -= xor_src_cnt; 102 src_cnt -= xor_src_cnt;
113 src_off += xor_src_cnt;
114
115 /* use the intermediate result a source */ 103 /* use the intermediate result a source */
116 dma_src[--src_off] = dma_dest;
117 src_cnt++; 104 src_cnt++;
105 src_list += xor_src_cnt - 1;
118 } else 106 } else
119 break; 107 break;
120 } 108 }
@@ -189,22 +177,40 @@ async_xor(struct page *dest, struct page **src_list, unsigned int offset,
189 struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR, 177 struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR,
190 &dest, 1, src_list, 178 &dest, 1, src_list,
191 src_cnt, len); 179 src_cnt, len);
192 dma_addr_t *dma_src = NULL; 180 struct dma_device *device = chan ? chan->device : NULL;
181 struct dmaengine_unmap_data *unmap = NULL;
193 182
194 BUG_ON(src_cnt <= 1); 183 BUG_ON(src_cnt <= 1);
195 184
196 if (submit->scribble) 185 if (device)
197 dma_src = submit->scribble; 186 unmap = dmaengine_get_unmap_data(device->dev, src_cnt+1, GFP_NOIO);
198 else if (sizeof(dma_addr_t) <= sizeof(struct page *)) 187
199 dma_src = (dma_addr_t *) src_list; 188 if (unmap && is_dma_xor_aligned(device, offset, 0, len)) {
189 struct dma_async_tx_descriptor *tx;
190 int i, j;
200 191
201 if (dma_src && chan && is_dma_xor_aligned(chan->device, offset, 0, len)) {
202 /* run the xor asynchronously */ 192 /* run the xor asynchronously */
203 pr_debug("%s (async): len: %zu\n", __func__, len); 193 pr_debug("%s (async): len: %zu\n", __func__, len);
204 194
205 return do_async_xor(chan, dest, src_list, offset, src_cnt, len, 195 unmap->len = len;
206 dma_src, submit); 196 for (i = 0, j = 0; i < src_cnt; i++) {
197 if (!src_list[i])
198 continue;
199 unmap->to_cnt++;
200 unmap->addr[j++] = dma_map_page(device->dev, src_list[i],
201 offset, len, DMA_TO_DEVICE);
202 }
203
204 /* map it bidirectional as it may be re-used as a source */
205 unmap->addr[j] = dma_map_page(device->dev, dest, offset, len,
206 DMA_BIDIRECTIONAL);
207 unmap->bidi_cnt = 1;
208
209 tx = do_async_xor(chan, unmap, submit);
210 dmaengine_unmap_put(unmap);
211 return tx;
207 } else { 212 } else {
213 dmaengine_unmap_put(unmap);
208 /* run the xor synchronously */ 214 /* run the xor synchronously */
209 pr_debug("%s (sync): len: %zu\n", __func__, len); 215 pr_debug("%s (sync): len: %zu\n", __func__, len);
210 WARN_ONCE(chan, "%s: no space for dma address conversion\n", 216 WARN_ONCE(chan, "%s: no space for dma address conversion\n",
@@ -268,16 +274,14 @@ async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
268 struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len); 274 struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len);
269 struct dma_device *device = chan ? chan->device : NULL; 275 struct dma_device *device = chan ? chan->device : NULL;
270 struct dma_async_tx_descriptor *tx = NULL; 276 struct dma_async_tx_descriptor *tx = NULL;
271 dma_addr_t *dma_src = NULL; 277 struct dmaengine_unmap_data *unmap = NULL;
272 278
273 BUG_ON(src_cnt <= 1); 279 BUG_ON(src_cnt <= 1);
274 280
275 if (submit->scribble) 281 if (device)
276 dma_src = submit->scribble; 282 unmap = dmaengine_get_unmap_data(device->dev, src_cnt, GFP_NOIO);
277 else if (sizeof(dma_addr_t) <= sizeof(struct page *))
278 dma_src = (dma_addr_t *) src_list;
279 283
280 if (dma_src && device && src_cnt <= device->max_xor && 284 if (unmap && src_cnt <= device->max_xor &&
281 is_dma_xor_aligned(device, offset, 0, len)) { 285 is_dma_xor_aligned(device, offset, 0, len)) {
282 unsigned long dma_prep_flags = 0; 286 unsigned long dma_prep_flags = 0;
283 int i; 287 int i;
@@ -288,11 +292,15 @@ async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
288 dma_prep_flags |= DMA_PREP_INTERRUPT; 292 dma_prep_flags |= DMA_PREP_INTERRUPT;
289 if (submit->flags & ASYNC_TX_FENCE) 293 if (submit->flags & ASYNC_TX_FENCE)
290 dma_prep_flags |= DMA_PREP_FENCE; 294 dma_prep_flags |= DMA_PREP_FENCE;
291 for (i = 0; i < src_cnt; i++)
292 dma_src[i] = dma_map_page(device->dev, src_list[i],
293 offset, len, DMA_TO_DEVICE);
294 295
295 tx = device->device_prep_dma_xor_val(chan, dma_src, src_cnt, 296 for (i = 0; i < src_cnt; i++) {
297 unmap->addr[i] = dma_map_page(device->dev, src_list[i],
298 offset, len, DMA_TO_DEVICE);
299 unmap->to_cnt++;
300 }
301 unmap->len = len;
302
303 tx = device->device_prep_dma_xor_val(chan, unmap->addr, src_cnt,
296 len, result, 304 len, result,
297 dma_prep_flags); 305 dma_prep_flags);
298 if (unlikely(!tx)) { 306 if (unlikely(!tx)) {
@@ -301,11 +309,11 @@ async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
301 while (!tx) { 309 while (!tx) {
302 dma_async_issue_pending(chan); 310 dma_async_issue_pending(chan);
303 tx = device->device_prep_dma_xor_val(chan, 311 tx = device->device_prep_dma_xor_val(chan,
304 dma_src, src_cnt, len, result, 312 unmap->addr, src_cnt, len, result,
305 dma_prep_flags); 313 dma_prep_flags);
306 } 314 }
307 } 315 }
308 316 dma_set_unmap(tx, unmap);
309 async_tx_submit(chan, tx, submit); 317 async_tx_submit(chan, tx, submit);
310 } else { 318 } else {
311 enum async_tx_flags flags_orig = submit->flags; 319 enum async_tx_flags flags_orig = submit->flags;
@@ -327,6 +335,7 @@ async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
327 async_tx_sync_epilog(submit); 335 async_tx_sync_epilog(submit);
328 submit->flags = flags_orig; 336 submit->flags = flags_orig;
329 } 337 }
338 dmaengine_unmap_put(unmap);
330 339
331 return tx; 340 return tx;
332} 341}
diff --git a/crypto/async_tx/raid6test.c b/crypto/async_tx/raid6test.c
index 4a92bac744dc..dad95f45b88f 100644
--- a/crypto/async_tx/raid6test.c
+++ b/crypto/async_tx/raid6test.c
@@ -28,7 +28,7 @@
28#undef pr 28#undef pr
29#define pr(fmt, args...) pr_info("raid6test: " fmt, ##args) 29#define pr(fmt, args...) pr_info("raid6test: " fmt, ##args)
30 30
31#define NDISKS 16 /* Including P and Q */ 31#define NDISKS 64 /* Including P and Q */
32 32
33static struct page *dataptrs[NDISKS]; 33static struct page *dataptrs[NDISKS];
34static addr_conv_t addr_conv[NDISKS]; 34static addr_conv_t addr_conv[NDISKS];
@@ -219,6 +219,14 @@ static int raid6_test(void)
219 err += test(11, &tests); 219 err += test(11, &tests);
220 err += test(12, &tests); 220 err += test(12, &tests);
221 } 221 }
222
223 /* the 24 disk case is special for ioatdma as it is the boudary point
224 * at which it needs to switch from 8-source ops to 16-source
225 * ops for continuation (assumes DMA_HAS_PQ_CONTINUE is not set)
226 */
227 if (NDISKS > 24)
228 err += test(24, &tests);
229
222 err += test(NDISKS, &tests); 230 err += test(NDISKS, &tests);
223 231
224 pr("\n"); 232 pr("\n");
diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig
index c95df0b8c880..5d9248526d78 100644
--- a/drivers/acpi/Kconfig
+++ b/drivers/acpi/Kconfig
@@ -235,17 +235,6 @@ config ACPI_INITRD_TABLE_OVERRIDE
235 initrd, therefore it's safe to say Y. 235 initrd, therefore it's safe to say Y.
236 See Documentation/acpi/initrd_table_override.txt for details 236 See Documentation/acpi/initrd_table_override.txt for details
237 237
238config ACPI_BLACKLIST_YEAR
239 int "Disable ACPI for systems before Jan 1st this year" if X86_32
240 default 0
241 help
242 Enter a 4-digit year, e.g., 2001, to disable ACPI by default
243 on platforms with DMI BIOS date before January 1st that year.
244 "acpi=force" can be used to override this mechanism.
245
246 Enter 0 to disable this mechanism and allow ACPI to
247 run by default no matter what the year. (default)
248
249config ACPI_DEBUG 238config ACPI_DEBUG
250 bool "Debug Statements" 239 bool "Debug Statements"
251 default n 240 default n
diff --git a/drivers/acpi/ac.c b/drivers/acpi/ac.c
index b9f0d5f4bba5..8711e3797165 100644
--- a/drivers/acpi/ac.c
+++ b/drivers/acpi/ac.c
@@ -56,7 +56,6 @@ static int ac_sleep_before_get_state_ms;
56 56
57struct acpi_ac { 57struct acpi_ac {
58 struct power_supply charger; 58 struct power_supply charger;
59 struct acpi_device *adev;
60 struct platform_device *pdev; 59 struct platform_device *pdev;
61 unsigned long long state; 60 unsigned long long state;
62}; 61};
@@ -70,8 +69,9 @@ struct acpi_ac {
70static int acpi_ac_get_state(struct acpi_ac *ac) 69static int acpi_ac_get_state(struct acpi_ac *ac)
71{ 70{
72 acpi_status status; 71 acpi_status status;
72 acpi_handle handle = ACPI_HANDLE(&ac->pdev->dev);
73 73
74 status = acpi_evaluate_integer(ac->adev->handle, "_PSR", NULL, 74 status = acpi_evaluate_integer(handle, "_PSR", NULL,
75 &ac->state); 75 &ac->state);
76 if (ACPI_FAILURE(status)) { 76 if (ACPI_FAILURE(status)) {
77 ACPI_EXCEPTION((AE_INFO, status, 77 ACPI_EXCEPTION((AE_INFO, status,
@@ -119,6 +119,7 @@ static enum power_supply_property ac_props[] = {
119static void acpi_ac_notify_handler(acpi_handle handle, u32 event, void *data) 119static void acpi_ac_notify_handler(acpi_handle handle, u32 event, void *data)
120{ 120{
121 struct acpi_ac *ac = data; 121 struct acpi_ac *ac = data;
122 struct acpi_device *adev;
122 123
123 if (!ac) 124 if (!ac)
124 return; 125 return;
@@ -141,10 +142,11 @@ static void acpi_ac_notify_handler(acpi_handle handle, u32 event, void *data)
141 msleep(ac_sleep_before_get_state_ms); 142 msleep(ac_sleep_before_get_state_ms);
142 143
143 acpi_ac_get_state(ac); 144 acpi_ac_get_state(ac);
144 acpi_bus_generate_netlink_event(ac->adev->pnp.device_class, 145 adev = ACPI_COMPANION(&ac->pdev->dev);
146 acpi_bus_generate_netlink_event(adev->pnp.device_class,
145 dev_name(&ac->pdev->dev), 147 dev_name(&ac->pdev->dev),
146 event, (u32) ac->state); 148 event, (u32) ac->state);
147 acpi_notifier_call_chain(ac->adev, event, (u32) ac->state); 149 acpi_notifier_call_chain(adev, event, (u32) ac->state);
148 kobject_uevent(&ac->charger.dev->kobj, KOBJ_CHANGE); 150 kobject_uevent(&ac->charger.dev->kobj, KOBJ_CHANGE);
149 } 151 }
150 152
@@ -178,8 +180,8 @@ static int acpi_ac_probe(struct platform_device *pdev)
178 if (!pdev) 180 if (!pdev)
179 return -EINVAL; 181 return -EINVAL;
180 182
181 result = acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev); 183 adev = ACPI_COMPANION(&pdev->dev);
182 if (result) 184 if (!adev)
183 return -ENODEV; 185 return -ENODEV;
184 186
185 ac = kzalloc(sizeof(struct acpi_ac), GFP_KERNEL); 187 ac = kzalloc(sizeof(struct acpi_ac), GFP_KERNEL);
@@ -188,7 +190,6 @@ static int acpi_ac_probe(struct platform_device *pdev)
188 190
189 strcpy(acpi_device_name(adev), ACPI_AC_DEVICE_NAME); 191 strcpy(acpi_device_name(adev), ACPI_AC_DEVICE_NAME);
190 strcpy(acpi_device_class(adev), ACPI_AC_CLASS); 192 strcpy(acpi_device_class(adev), ACPI_AC_CLASS);
191 ac->adev = adev;
192 ac->pdev = pdev; 193 ac->pdev = pdev;
193 platform_set_drvdata(pdev, ac); 194 platform_set_drvdata(pdev, ac);
194 195
diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index d3961014aad7..6745fe137b9e 100644
--- a/drivers/acpi/acpi_lpss.c
+++ b/drivers/acpi/acpi_lpss.c
@@ -163,6 +163,15 @@ static const struct acpi_device_id acpi_lpss_device_ids[] = {
163 { "80860F41", (unsigned long)&byt_i2c_dev_desc }, 163 { "80860F41", (unsigned long)&byt_i2c_dev_desc },
164 { "INT33B2", }, 164 { "INT33B2", },
165 165
166 { "INT3430", (unsigned long)&lpt_dev_desc },
167 { "INT3431", (unsigned long)&lpt_dev_desc },
168 { "INT3432", (unsigned long)&lpt_dev_desc },
169 { "INT3433", (unsigned long)&lpt_dev_desc },
170 { "INT3434", (unsigned long)&lpt_uart_dev_desc },
171 { "INT3435", (unsigned long)&lpt_uart_dev_desc },
172 { "INT3436", (unsigned long)&lpt_sdio_dev_desc },
173 { "INT3437", },
174
166 { } 175 { }
167}; 176};
168 177
diff --git a/drivers/acpi/acpi_platform.c b/drivers/acpi/acpi_platform.c
index 8a4cfc7e71f0..dbfe49e5fd63 100644
--- a/drivers/acpi/acpi_platform.c
+++ b/drivers/acpi/acpi_platform.c
@@ -111,7 +111,7 @@ int acpi_create_platform_device(struct acpi_device *adev,
111 pdevinfo.id = -1; 111 pdevinfo.id = -1;
112 pdevinfo.res = resources; 112 pdevinfo.res = resources;
113 pdevinfo.num_res = count; 113 pdevinfo.num_res = count;
114 pdevinfo.acpi_node.handle = adev->handle; 114 pdevinfo.acpi_node.companion = adev;
115 pdev = platform_device_register_full(&pdevinfo); 115 pdev = platform_device_register_full(&pdevinfo);
116 if (IS_ERR(pdev)) { 116 if (IS_ERR(pdev)) {
117 dev_err(&adev->dev, "platform device creation failed: %ld\n", 117 dev_err(&adev->dev, "platform device creation failed: %ld\n",
diff --git a/drivers/acpi/blacklist.c b/drivers/acpi/blacklist.c
index fb848378d582..078c4f7fe2dd 100644
--- a/drivers/acpi/blacklist.c
+++ b/drivers/acpi/blacklist.c
@@ -75,39 +75,6 @@ static struct acpi_blacklist_item acpi_blacklist[] __initdata = {
75 {""} 75 {""}
76}; 76};
77 77
78#if CONFIG_ACPI_BLACKLIST_YEAR
79
80static int __init blacklist_by_year(void)
81{
82 int year;
83
84 /* Doesn't exist? Likely an old system */
85 if (!dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL)) {
86 printk(KERN_ERR PREFIX "no DMI BIOS year, "
87 "acpi=force is required to enable ACPI\n" );
88 return 1;
89 }
90 /* 0? Likely a buggy new BIOS */
91 if (year == 0) {
92 printk(KERN_ERR PREFIX "DMI BIOS year==0, "
93 "assuming ACPI-capable machine\n" );
94 return 0;
95 }
96 if (year < CONFIG_ACPI_BLACKLIST_YEAR) {
97 printk(KERN_ERR PREFIX "BIOS age (%d) fails cutoff (%d), "
98 "acpi=force is required to enable ACPI\n",
99 year, CONFIG_ACPI_BLACKLIST_YEAR);
100 return 1;
101 }
102 return 0;
103}
104#else
105static inline int blacklist_by_year(void)
106{
107 return 0;
108}
109#endif
110
111int __init acpi_blacklisted(void) 78int __init acpi_blacklisted(void)
112{ 79{
113 int i = 0; 80 int i = 0;
@@ -166,8 +133,6 @@ int __init acpi_blacklisted(void)
166 } 133 }
167 } 134 }
168 135
169 blacklisted += blacklist_by_year();
170
171 dmi_check_system(acpi_osi_dmi_table); 136 dmi_check_system(acpi_osi_dmi_table);
172 137
173 return blacklisted; 138 return blacklisted;
diff --git a/drivers/acpi/device_pm.c b/drivers/acpi/device_pm.c
index d42b2fb5a7e9..b3480cf7db1a 100644
--- a/drivers/acpi/device_pm.c
+++ b/drivers/acpi/device_pm.c
@@ -22,16 +22,12 @@
22 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 22 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
23 */ 23 */
24 24
25#include <linux/device.h> 25#include <linux/acpi.h>
26#include <linux/export.h> 26#include <linux/export.h>
27#include <linux/mutex.h> 27#include <linux/mutex.h>
28#include <linux/pm_qos.h> 28#include <linux/pm_qos.h>
29#include <linux/pm_runtime.h> 29#include <linux/pm_runtime.h>
30 30
31#include <acpi/acpi.h>
32#include <acpi/acpi_bus.h>
33#include <acpi/acpi_drivers.h>
34
35#include "internal.h" 31#include "internal.h"
36 32
37#define _COMPONENT ACPI_POWER_COMPONENT 33#define _COMPONENT ACPI_POWER_COMPONENT
@@ -548,7 +544,7 @@ static int acpi_dev_pm_get_state(struct device *dev, struct acpi_device *adev,
548 */ 544 */
549int acpi_pm_device_sleep_state(struct device *dev, int *d_min_p, int d_max_in) 545int acpi_pm_device_sleep_state(struct device *dev, int *d_min_p, int d_max_in)
550{ 546{
551 acpi_handle handle = DEVICE_ACPI_HANDLE(dev); 547 acpi_handle handle = ACPI_HANDLE(dev);
552 struct acpi_device *adev; 548 struct acpi_device *adev;
553 int ret, d_min, d_max; 549 int ret, d_min, d_max;
554 550
@@ -656,7 +652,7 @@ int acpi_pm_device_run_wake(struct device *phys_dev, bool enable)
656 if (!device_run_wake(phys_dev)) 652 if (!device_run_wake(phys_dev))
657 return -EINVAL; 653 return -EINVAL;
658 654
659 handle = DEVICE_ACPI_HANDLE(phys_dev); 655 handle = ACPI_HANDLE(phys_dev);
660 if (!handle || acpi_bus_get_device(handle, &adev)) { 656 if (!handle || acpi_bus_get_device(handle, &adev)) {
661 dev_dbg(phys_dev, "ACPI handle without context in %s!\n", 657 dev_dbg(phys_dev, "ACPI handle without context in %s!\n",
662 __func__); 658 __func__);
@@ -700,7 +696,7 @@ int acpi_pm_device_sleep_wake(struct device *dev, bool enable)
700 if (!device_can_wakeup(dev)) 696 if (!device_can_wakeup(dev))
701 return -EINVAL; 697 return -EINVAL;
702 698
703 handle = DEVICE_ACPI_HANDLE(dev); 699 handle = ACPI_HANDLE(dev);
704 if (!handle || acpi_bus_get_device(handle, &adev)) { 700 if (!handle || acpi_bus_get_device(handle, &adev)) {
705 dev_dbg(dev, "ACPI handle without context in %s!\n", __func__); 701 dev_dbg(dev, "ACPI handle without context in %s!\n", __func__);
706 return -ENODEV; 702 return -ENODEV;
@@ -722,7 +718,7 @@ int acpi_pm_device_sleep_wake(struct device *dev, bool enable)
722 */ 718 */
723struct acpi_device *acpi_dev_pm_get_node(struct device *dev) 719struct acpi_device *acpi_dev_pm_get_node(struct device *dev)
724{ 720{
725 acpi_handle handle = DEVICE_ACPI_HANDLE(dev); 721 acpi_handle handle = ACPI_HANDLE(dev);
726 struct acpi_device *adev; 722 struct acpi_device *adev;
727 723
728 return handle && !acpi_bus_get_device(handle, &adev) ? adev : NULL; 724 return handle && !acpi_bus_get_device(handle, &adev) ? adev : NULL;
diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c
index d5309fd49458..ba5b56db9d27 100644
--- a/drivers/acpi/ec.c
+++ b/drivers/acpi/ec.c
@@ -173,9 +173,10 @@ static void start_transaction(struct acpi_ec *ec)
173static void advance_transaction(struct acpi_ec *ec, u8 status) 173static void advance_transaction(struct acpi_ec *ec, u8 status)
174{ 174{
175 unsigned long flags; 175 unsigned long flags;
176 struct transaction *t = ec->curr; 176 struct transaction *t;
177 177
178 spin_lock_irqsave(&ec->lock, flags); 178 spin_lock_irqsave(&ec->lock, flags);
179 t = ec->curr;
179 if (!t) 180 if (!t)
180 goto unlock; 181 goto unlock;
181 if (t->wlen > t->wi) { 182 if (t->wlen > t->wi) {
diff --git a/drivers/acpi/glue.c b/drivers/acpi/glue.c
index 10f0f40587bb..a22a295edb69 100644
--- a/drivers/acpi/glue.c
+++ b/drivers/acpi/glue.c
@@ -197,30 +197,28 @@ static void acpi_physnode_link_name(char *buf, unsigned int node_id)
197 197
198int acpi_bind_one(struct device *dev, acpi_handle handle) 198int acpi_bind_one(struct device *dev, acpi_handle handle)
199{ 199{
200 struct acpi_device *acpi_dev; 200 struct acpi_device *acpi_dev = NULL;
201 acpi_status status;
202 struct acpi_device_physical_node *physical_node, *pn; 201 struct acpi_device_physical_node *physical_node, *pn;
203 char physical_node_name[PHYSICAL_NODE_NAME_SIZE]; 202 char physical_node_name[PHYSICAL_NODE_NAME_SIZE];
204 struct list_head *physnode_list; 203 struct list_head *physnode_list;
205 unsigned int node_id; 204 unsigned int node_id;
206 int retval = -EINVAL; 205 int retval = -EINVAL;
207 206
208 if (ACPI_HANDLE(dev)) { 207 if (ACPI_COMPANION(dev)) {
209 if (handle) { 208 if (handle) {
210 dev_warn(dev, "ACPI handle is already set\n"); 209 dev_warn(dev, "ACPI companion already set\n");
211 return -EINVAL; 210 return -EINVAL;
212 } else { 211 } else {
213 handle = ACPI_HANDLE(dev); 212 acpi_dev = ACPI_COMPANION(dev);
214 } 213 }
214 } else {
215 acpi_bus_get_device(handle, &acpi_dev);
215 } 216 }
216 if (!handle) 217 if (!acpi_dev)
217 return -EINVAL; 218 return -EINVAL;
218 219
220 get_device(&acpi_dev->dev);
219 get_device(dev); 221 get_device(dev);
220 status = acpi_bus_get_device(handle, &acpi_dev);
221 if (ACPI_FAILURE(status))
222 goto err;
223
224 physical_node = kzalloc(sizeof(*physical_node), GFP_KERNEL); 222 physical_node = kzalloc(sizeof(*physical_node), GFP_KERNEL);
225 if (!physical_node) { 223 if (!physical_node) {
226 retval = -ENOMEM; 224 retval = -ENOMEM;
@@ -242,10 +240,11 @@ int acpi_bind_one(struct device *dev, acpi_handle handle)
242 240
243 dev_warn(dev, "Already associated with ACPI node\n"); 241 dev_warn(dev, "Already associated with ACPI node\n");
244 kfree(physical_node); 242 kfree(physical_node);
245 if (ACPI_HANDLE(dev) != handle) 243 if (ACPI_COMPANION(dev) != acpi_dev)
246 goto err; 244 goto err;
247 245
248 put_device(dev); 246 put_device(dev);
247 put_device(&acpi_dev->dev);
249 return 0; 248 return 0;
250 } 249 }
251 if (pn->node_id == node_id) { 250 if (pn->node_id == node_id) {
@@ -259,8 +258,8 @@ int acpi_bind_one(struct device *dev, acpi_handle handle)
259 list_add(&physical_node->node, physnode_list); 258 list_add(&physical_node->node, physnode_list);
260 acpi_dev->physical_node_count++; 259 acpi_dev->physical_node_count++;
261 260
262 if (!ACPI_HANDLE(dev)) 261 if (!ACPI_COMPANION(dev))
263 ACPI_HANDLE_SET(dev, acpi_dev->handle); 262 ACPI_COMPANION_SET(dev, acpi_dev);
264 263
265 acpi_physnode_link_name(physical_node_name, node_id); 264 acpi_physnode_link_name(physical_node_name, node_id);
266 retval = sysfs_create_link(&acpi_dev->dev.kobj, &dev->kobj, 265 retval = sysfs_create_link(&acpi_dev->dev.kobj, &dev->kobj,
@@ -283,27 +282,21 @@ int acpi_bind_one(struct device *dev, acpi_handle handle)
283 return 0; 282 return 0;
284 283
285 err: 284 err:
286 ACPI_HANDLE_SET(dev, NULL); 285 ACPI_COMPANION_SET(dev, NULL);
287 put_device(dev); 286 put_device(dev);
287 put_device(&acpi_dev->dev);
288 return retval; 288 return retval;
289} 289}
290EXPORT_SYMBOL_GPL(acpi_bind_one); 290EXPORT_SYMBOL_GPL(acpi_bind_one);
291 291
292int acpi_unbind_one(struct device *dev) 292int acpi_unbind_one(struct device *dev)
293{ 293{
294 struct acpi_device *acpi_dev = ACPI_COMPANION(dev);
294 struct acpi_device_physical_node *entry; 295 struct acpi_device_physical_node *entry;
295 struct acpi_device *acpi_dev;
296 acpi_status status;
297 296
298 if (!ACPI_HANDLE(dev)) 297 if (!acpi_dev)
299 return 0; 298 return 0;
300 299
301 status = acpi_bus_get_device(ACPI_HANDLE(dev), &acpi_dev);
302 if (ACPI_FAILURE(status)) {
303 dev_err(dev, "Oops, ACPI handle corrupt in %s()\n", __func__);
304 return -EINVAL;
305 }
306
307 mutex_lock(&acpi_dev->physical_node_lock); 300 mutex_lock(&acpi_dev->physical_node_lock);
308 301
309 list_for_each_entry(entry, &acpi_dev->physical_node_list, node) 302 list_for_each_entry(entry, &acpi_dev->physical_node_list, node)
@@ -316,9 +309,10 @@ int acpi_unbind_one(struct device *dev)
316 acpi_physnode_link_name(physnode_name, entry->node_id); 309 acpi_physnode_link_name(physnode_name, entry->node_id);
317 sysfs_remove_link(&acpi_dev->dev.kobj, physnode_name); 310 sysfs_remove_link(&acpi_dev->dev.kobj, physnode_name);
318 sysfs_remove_link(&dev->kobj, "firmware_node"); 311 sysfs_remove_link(&dev->kobj, "firmware_node");
319 ACPI_HANDLE_SET(dev, NULL); 312 ACPI_COMPANION_SET(dev, NULL);
320 /* acpi_bind_one() increase refcnt by one. */ 313 /* Drop references taken by acpi_bind_one(). */
321 put_device(dev); 314 put_device(dev);
315 put_device(&acpi_dev->dev);
322 kfree(entry); 316 kfree(entry);
323 break; 317 break;
324 } 318 }
@@ -328,6 +322,15 @@ int acpi_unbind_one(struct device *dev)
328} 322}
329EXPORT_SYMBOL_GPL(acpi_unbind_one); 323EXPORT_SYMBOL_GPL(acpi_unbind_one);
330 324
325void acpi_preset_companion(struct device *dev, acpi_handle parent, u64 addr)
326{
327 struct acpi_device *adev;
328
329 if (!acpi_bus_get_device(acpi_get_child(parent, addr), &adev))
330 ACPI_COMPANION_SET(dev, adev);
331}
332EXPORT_SYMBOL_GPL(acpi_preset_companion);
333
331static int acpi_platform_notify(struct device *dev) 334static int acpi_platform_notify(struct device *dev)
332{ 335{
333 struct acpi_bus_type *type = acpi_get_bus_type(dev); 336 struct acpi_bus_type *type = acpi_get_bus_type(dev);
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 56f05869b08d..0703bff5e60e 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -575,6 +575,7 @@ static int acpi_pci_root_add(struct acpi_device *device,
575 dev_err(&device->dev, 575 dev_err(&device->dev,
576 "Bus %04x:%02x not present in PCI namespace\n", 576 "Bus %04x:%02x not present in PCI namespace\n",
577 root->segment, (unsigned int)root->secondary.start); 577 root->segment, (unsigned int)root->secondary.start);
578 device->driver_data = NULL;
578 result = -ENODEV; 579 result = -ENODEV;
579 goto end; 580 goto end;
580 } 581 }
diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c
index 55f9dedbbf9f..15daa21fcd05 100644
--- a/drivers/acpi/scan.c
+++ b/drivers/acpi/scan.c
@@ -289,24 +289,17 @@ void acpi_bus_device_eject(void *data, u32 ost_src)
289{ 289{
290 struct acpi_device *device = data; 290 struct acpi_device *device = data;
291 acpi_handle handle = device->handle; 291 acpi_handle handle = device->handle;
292 struct acpi_scan_handler *handler;
293 u32 ost_code = ACPI_OST_SC_NON_SPECIFIC_FAILURE; 292 u32 ost_code = ACPI_OST_SC_NON_SPECIFIC_FAILURE;
294 int error; 293 int error;
295 294
296 lock_device_hotplug(); 295 lock_device_hotplug();
297 mutex_lock(&acpi_scan_lock); 296 mutex_lock(&acpi_scan_lock);
298 297
299 handler = device->handler;
300 if (!handler || !handler->hotplug.enabled) {
301 put_device(&device->dev);
302 goto err_support;
303 }
304
305 if (ost_src == ACPI_NOTIFY_EJECT_REQUEST) 298 if (ost_src == ACPI_NOTIFY_EJECT_REQUEST)
306 acpi_evaluate_hotplug_ost(handle, ACPI_NOTIFY_EJECT_REQUEST, 299 acpi_evaluate_hotplug_ost(handle, ACPI_NOTIFY_EJECT_REQUEST,
307 ACPI_OST_SC_EJECT_IN_PROGRESS, NULL); 300 ACPI_OST_SC_EJECT_IN_PROGRESS, NULL);
308 301
309 if (handler->hotplug.mode == AHM_CONTAINER) 302 if (device->handler && device->handler->hotplug.mode == AHM_CONTAINER)
310 kobject_uevent(&device->dev.kobj, KOBJ_OFFLINE); 303 kobject_uevent(&device->dev.kobj, KOBJ_OFFLINE);
311 304
312 error = acpi_scan_hot_remove(device); 305 error = acpi_scan_hot_remove(device);
@@ -411,8 +404,7 @@ static void acpi_hotplug_notify_cb(acpi_handle handle, u32 type, void *data)
411 break; 404 break;
412 case ACPI_NOTIFY_EJECT_REQUEST: 405 case ACPI_NOTIFY_EJECT_REQUEST:
413 acpi_handle_debug(handle, "ACPI_NOTIFY_EJECT_REQUEST event\n"); 406 acpi_handle_debug(handle, "ACPI_NOTIFY_EJECT_REQUEST event\n");
414 status = acpi_bus_get_device(handle, &adev); 407 if (acpi_bus_get_device(handle, &adev))
415 if (ACPI_FAILURE(status))
416 goto err_out; 408 goto err_out;
417 409
418 get_device(&adev->dev); 410 get_device(&adev->dev);
@@ -1997,6 +1989,7 @@ static int acpi_bus_scan_fixed(void)
1997 if (result) 1989 if (result)
1998 return result; 1990 return result;
1999 1991
1992 device->flags.match_driver = true;
2000 result = device_attach(&device->dev); 1993 result = device_attach(&device->dev);
2001 if (result < 0) 1994 if (result < 0)
2002 return result; 1995 return result;
@@ -2013,6 +2006,7 @@ static int acpi_bus_scan_fixed(void)
2013 if (result) 2006 if (result)
2014 return result; 2007 return result;
2015 2008
2009 device->flags.match_driver = true;
2016 result = device_attach(&device->dev); 2010 result = device_attach(&device->dev);
2017 } 2011 }
2018 2012
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c
index 18dbdff4656e..995e91bcb97b 100644
--- a/drivers/acpi/video.c
+++ b/drivers/acpi/video.c
@@ -82,13 +82,6 @@ static bool allow_duplicates;
82module_param(allow_duplicates, bool, 0644); 82module_param(allow_duplicates, bool, 0644);
83 83
84/* 84/*
85 * Some BIOSes claim they use minimum backlight at boot,
86 * and this may bring dimming screen after boot
87 */
88static bool use_bios_initial_backlight = 1;
89module_param(use_bios_initial_backlight, bool, 0644);
90
91/*
92 * For Windows 8 systems: if set ture and the GPU driver has 85 * For Windows 8 systems: if set ture and the GPU driver has
93 * registered a backlight interface, skip registering ACPI video's. 86 * registered a backlight interface, skip registering ACPI video's.
94 */ 87 */
@@ -406,12 +399,6 @@ static int __init video_set_bqc_offset(const struct dmi_system_id *d)
406 return 0; 399 return 0;
407} 400}
408 401
409static int video_ignore_initial_backlight(const struct dmi_system_id *d)
410{
411 use_bios_initial_backlight = 0;
412 return 0;
413}
414
415static struct dmi_system_id video_dmi_table[] __initdata = { 402static struct dmi_system_id video_dmi_table[] __initdata = {
416 /* 403 /*
417 * Broken _BQC workaround http://bugzilla.kernel.org/show_bug.cgi?id=13121 404 * Broken _BQC workaround http://bugzilla.kernel.org/show_bug.cgi?id=13121
@@ -456,54 +443,6 @@ static struct dmi_system_id video_dmi_table[] __initdata = {
456 DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 7720"), 443 DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 7720"),
457 }, 444 },
458 }, 445 },
459 {
460 .callback = video_ignore_initial_backlight,
461 .ident = "HP Folio 13-2000",
462 .matches = {
463 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
464 DMI_MATCH(DMI_PRODUCT_NAME, "HP Folio 13 - 2000 Notebook PC"),
465 },
466 },
467 {
468 .callback = video_ignore_initial_backlight,
469 .ident = "Fujitsu E753",
470 .matches = {
471 DMI_MATCH(DMI_BOARD_VENDOR, "FUJITSU"),
472 DMI_MATCH(DMI_PRODUCT_NAME, "LIFEBOOK E753"),
473 },
474 },
475 {
476 .callback = video_ignore_initial_backlight,
477 .ident = "HP Pavilion dm4",
478 .matches = {
479 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
480 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dm4 Notebook PC"),
481 },
482 },
483 {
484 .callback = video_ignore_initial_backlight,
485 .ident = "HP Pavilion g6 Notebook PC",
486 .matches = {
487 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
488 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion g6 Notebook PC"),
489 },
490 },
491 {
492 .callback = video_ignore_initial_backlight,
493 .ident = "HP 1000 Notebook PC",
494 .matches = {
495 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
496 DMI_MATCH(DMI_PRODUCT_NAME, "HP 1000 Notebook PC"),
497 },
498 },
499 {
500 .callback = video_ignore_initial_backlight,
501 .ident = "HP Pavilion m4",
502 .matches = {
503 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
504 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion m4 Notebook PC"),
505 },
506 },
507 {} 446 {}
508}; 447};
509 448
@@ -839,20 +778,18 @@ acpi_video_init_brightness(struct acpi_video_device *device)
839 if (!device->cap._BQC) 778 if (!device->cap._BQC)
840 goto set_level; 779 goto set_level;
841 780
842 if (use_bios_initial_backlight) { 781 level = acpi_video_bqc_value_to_level(device, level_old);
843 level = acpi_video_bqc_value_to_level(device, level_old); 782 /*
844 /* 783 * On some buggy laptops, _BQC returns an uninitialized
845 * On some buggy laptops, _BQC returns an uninitialized 784 * value when invoked for the first time, i.e.
846 * value when invoked for the first time, i.e. 785 * level_old is invalid (no matter whether it's a level
847 * level_old is invalid (no matter whether it's a level 786 * or an index). Set the backlight to max_level in this case.
848 * or an index). Set the backlight to max_level in this case. 787 */
849 */ 788 for (i = 2; i < br->count; i++)
850 for (i = 2; i < br->count; i++) 789 if (level == br->levels[i])
851 if (level == br->levels[i]) 790 break;
852 break; 791 if (i == br->count || !level)
853 if (i == br->count || !level) 792 level = max_level;
854 level = max_level;
855 }
856 793
857set_level: 794set_level:
858 result = acpi_video_device_lcd_set_level(device, level); 795 result = acpi_video_device_lcd_set_level(device, level);
diff --git a/drivers/ata/libata-acpi.c b/drivers/ata/libata-acpi.c
index ab714d2ad978..4372cfa883c9 100644
--- a/drivers/ata/libata-acpi.c
+++ b/drivers/ata/libata-acpi.c
@@ -185,7 +185,7 @@ void ata_acpi_bind_port(struct ata_port *ap)
185 if (libata_noacpi || ap->flags & ATA_FLAG_ACPI_SATA || !host_handle) 185 if (libata_noacpi || ap->flags & ATA_FLAG_ACPI_SATA || !host_handle)
186 return; 186 return;
187 187
188 ACPI_HANDLE_SET(&ap->tdev, acpi_get_child(host_handle, ap->port_no)); 188 acpi_preset_companion(&ap->tdev, host_handle, ap->port_no);
189 189
190 if (ata_acpi_gtm(ap, &ap->__acpi_init_gtm) == 0) 190 if (ata_acpi_gtm(ap, &ap->__acpi_init_gtm) == 0)
191 ap->pflags |= ATA_PFLAG_INIT_GTM_VALID; 191 ap->pflags |= ATA_PFLAG_INIT_GTM_VALID;
@@ -222,7 +222,7 @@ void ata_acpi_bind_dev(struct ata_device *dev)
222 parent_handle = port_handle; 222 parent_handle = port_handle;
223 } 223 }
224 224
225 ACPI_HANDLE_SET(&dev->tdev, acpi_get_child(parent_handle, adr)); 225 acpi_preset_companion(&dev->tdev, parent_handle, adr);
226 226
227 register_hotplug_dock_device(ata_dev_acpi_handle(dev), 227 register_hotplug_dock_device(ata_dev_acpi_handle(dev),
228 &ata_acpi_dev_dock_ops, dev, NULL, NULL); 228 &ata_acpi_dev_dock_ops, dev, NULL, NULL);
diff --git a/drivers/ata/pata_arasan_cf.c b/drivers/ata/pata_arasan_cf.c
index 853f610af28f..e88690ebfd82 100644
--- a/drivers/ata/pata_arasan_cf.c
+++ b/drivers/ata/pata_arasan_cf.c
@@ -396,8 +396,7 @@ dma_xfer(struct arasan_cf_dev *acdev, dma_addr_t src, dma_addr_t dest, u32 len)
396 struct dma_async_tx_descriptor *tx; 396 struct dma_async_tx_descriptor *tx;
397 struct dma_chan *chan = acdev->dma_chan; 397 struct dma_chan *chan = acdev->dma_chan;
398 dma_cookie_t cookie; 398 dma_cookie_t cookie;
399 unsigned long flags = DMA_PREP_INTERRUPT | DMA_COMPL_SKIP_SRC_UNMAP | 399 unsigned long flags = DMA_PREP_INTERRUPT;
400 DMA_COMPL_SKIP_DEST_UNMAP;
401 int ret = 0; 400 int ret = 0;
402 401
403 tx = chan->device->device_prep_dma_memcpy(chan, dest, src, len, flags); 402 tx = chan->device->device_prep_dma_memcpy(chan, dest, src, len, flags);
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index 47051cd25113..3a94b799f166 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -432,7 +432,7 @@ struct platform_device *platform_device_register_full(
432 goto err_alloc; 432 goto err_alloc;
433 433
434 pdev->dev.parent = pdevinfo->parent; 434 pdev->dev.parent = pdevinfo->parent;
435 ACPI_HANDLE_SET(&pdev->dev, pdevinfo->acpi_node.handle); 435 ACPI_COMPANION_SET(&pdev->dev, pdevinfo->acpi_node.companion);
436 436
437 if (pdevinfo->dma_mask) { 437 if (pdevinfo->dma_mask) {
438 /* 438 /*
@@ -463,7 +463,7 @@ struct platform_device *platform_device_register_full(
463 ret = platform_device_add(pdev); 463 ret = platform_device_add(pdev);
464 if (ret) { 464 if (ret) {
465err: 465err:
466 ACPI_HANDLE_SET(&pdev->dev, NULL); 466 ACPI_COMPANION_SET(&pdev->dev, NULL);
467 kfree(pdev->dev.dma_mask); 467 kfree(pdev->dev.dma_mask);
468 468
469err_alloc: 469err_alloc:
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index c12e9b9556be..1b41fca3d65a 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -1350,6 +1350,9 @@ static int device_prepare(struct device *dev, pm_message_t state)
1350 1350
1351 device_unlock(dev); 1351 device_unlock(dev);
1352 1352
1353 if (error)
1354 pm_runtime_put(dev);
1355
1353 return error; 1356 return error;
1354} 1357}
1355 1358
diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c
index 588479d58f52..6a680d4de7f1 100644
--- a/drivers/block/virtio_blk.c
+++ b/drivers/block/virtio_blk.c
@@ -199,15 +199,16 @@ static int virtio_queue_rq(struct blk_mq_hw_ctx *hctx, struct request *req)
199 199
200 spin_lock_irqsave(&vblk->vq_lock, flags); 200 spin_lock_irqsave(&vblk->vq_lock, flags);
201 if (__virtblk_add_req(vblk->vq, vbr, vbr->sg, num) < 0) { 201 if (__virtblk_add_req(vblk->vq, vbr, vbr->sg, num) < 0) {
202 virtqueue_kick(vblk->vq);
202 spin_unlock_irqrestore(&vblk->vq_lock, flags); 203 spin_unlock_irqrestore(&vblk->vq_lock, flags);
203 blk_mq_stop_hw_queue(hctx); 204 blk_mq_stop_hw_queue(hctx);
204 virtqueue_kick(vblk->vq);
205 return BLK_MQ_RQ_QUEUE_BUSY; 205 return BLK_MQ_RQ_QUEUE_BUSY;
206 } 206 }
207 spin_unlock_irqrestore(&vblk->vq_lock, flags);
208 207
209 if (last) 208 if (last)
210 virtqueue_kick(vblk->vq); 209 virtqueue_kick(vblk->vq);
210
211 spin_unlock_irqrestore(&vblk->vq_lock, flags);
211 return BLK_MQ_RQ_QUEUE_OK; 212 return BLK_MQ_RQ_QUEUE_OK;
212} 213}
213 214
diff --git a/drivers/cpufreq/cpufreq_conservative.c b/drivers/cpufreq/cpufreq_conservative.c
index 218460fcd2e4..25a70d06c5bf 100644
--- a/drivers/cpufreq/cpufreq_conservative.c
+++ b/drivers/cpufreq/cpufreq_conservative.c
@@ -68,6 +68,9 @@ static void cs_check_cpu(int cpu, unsigned int load)
68 68
69 dbs_info->requested_freq += get_freq_target(cs_tuners, policy); 69 dbs_info->requested_freq += get_freq_target(cs_tuners, policy);
70 70
71 if (dbs_info->requested_freq > policy->max)
72 dbs_info->requested_freq = policy->max;
73
71 __cpufreq_driver_target(policy, dbs_info->requested_freq, 74 __cpufreq_driver_target(policy, dbs_info->requested_freq,
72 CPUFREQ_RELATION_H); 75 CPUFREQ_RELATION_H);
73 return; 76 return;
diff --git a/drivers/cpufreq/cpufreq_governor.c b/drivers/cpufreq/cpufreq_governor.c
index 0806c31e5764..e6be63561fa6 100644
--- a/drivers/cpufreq/cpufreq_governor.c
+++ b/drivers/cpufreq/cpufreq_governor.c
@@ -328,10 +328,6 @@ int cpufreq_governor_dbs(struct cpufreq_policy *policy,
328 dbs_data->cdata->gov_dbs_timer); 328 dbs_data->cdata->gov_dbs_timer);
329 } 329 }
330 330
331 /*
332 * conservative does not implement micro like ondemand
333 * governor, thus we are bound to jiffes/HZ
334 */
335 if (dbs_data->cdata->governor == GOV_CONSERVATIVE) { 331 if (dbs_data->cdata->governor == GOV_CONSERVATIVE) {
336 cs_dbs_info->down_skip = 0; 332 cs_dbs_info->down_skip = 0;
337 cs_dbs_info->enable = 1; 333 cs_dbs_info->enable = 1;
diff --git a/drivers/cpufreq/omap-cpufreq.c b/drivers/cpufreq/omap-cpufreq.c
index be6d14307aa8..a0acd0bfba40 100644
--- a/drivers/cpufreq/omap-cpufreq.c
+++ b/drivers/cpufreq/omap-cpufreq.c
@@ -53,6 +53,7 @@ static unsigned int omap_getspeed(unsigned int cpu)
53 53
54static int omap_target(struct cpufreq_policy *policy, unsigned int index) 54static int omap_target(struct cpufreq_policy *policy, unsigned int index)
55{ 55{
56 int r, ret;
56 struct dev_pm_opp *opp; 57 struct dev_pm_opp *opp;
57 unsigned long freq, volt = 0, volt_old = 0, tol = 0; 58 unsigned long freq, volt = 0, volt_old = 0, tol = 0;
58 unsigned int old_freq, new_freq; 59 unsigned int old_freq, new_freq;
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index dd2874ec1927..446687cc2334 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -89,14 +89,15 @@ config AT_HDMAC
89 Support the Atmel AHB DMA controller. 89 Support the Atmel AHB DMA controller.
90 90
91config FSL_DMA 91config FSL_DMA
92 tristate "Freescale Elo and Elo Plus DMA support" 92 tristate "Freescale Elo series DMA support"
93 depends on FSL_SOC 93 depends on FSL_SOC
94 select DMA_ENGINE 94 select DMA_ENGINE
95 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 95 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
96 ---help--- 96 ---help---
97 Enable support for the Freescale Elo and Elo Plus DMA controllers. 97 Enable support for the Freescale Elo series DMA controllers.
98 The Elo is the DMA controller on some 82xx and 83xx parts, and the 98 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
99 Elo Plus is the DMA controller on 85xx and 86xx parts. 99 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
100 some Txxx and Bxxx parts.
100 101
101config MPC512X_DMA 102config MPC512X_DMA
102 tristate "Freescale MPC512x built-in DMA engine support" 103 tristate "Freescale MPC512x built-in DMA engine support"
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index e51a9832ef0d..16a2aa28f856 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -1164,42 +1164,12 @@ static void pl08x_free_txd(struct pl08x_driver_data *pl08x,
1164 kfree(txd); 1164 kfree(txd);
1165} 1165}
1166 1166
1167static void pl08x_unmap_buffers(struct pl08x_txd *txd)
1168{
1169 struct device *dev = txd->vd.tx.chan->device->dev;
1170 struct pl08x_sg *dsg;
1171
1172 if (!(txd->vd.tx.flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
1173 if (txd->vd.tx.flags & DMA_COMPL_SRC_UNMAP_SINGLE)
1174 list_for_each_entry(dsg, &txd->dsg_list, node)
1175 dma_unmap_single(dev, dsg->src_addr, dsg->len,
1176 DMA_TO_DEVICE);
1177 else {
1178 list_for_each_entry(dsg, &txd->dsg_list, node)
1179 dma_unmap_page(dev, dsg->src_addr, dsg->len,
1180 DMA_TO_DEVICE);
1181 }
1182 }
1183 if (!(txd->vd.tx.flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
1184 if (txd->vd.tx.flags & DMA_COMPL_DEST_UNMAP_SINGLE)
1185 list_for_each_entry(dsg, &txd->dsg_list, node)
1186 dma_unmap_single(dev, dsg->dst_addr, dsg->len,
1187 DMA_FROM_DEVICE);
1188 else
1189 list_for_each_entry(dsg, &txd->dsg_list, node)
1190 dma_unmap_page(dev, dsg->dst_addr, dsg->len,
1191 DMA_FROM_DEVICE);
1192 }
1193}
1194
1195static void pl08x_desc_free(struct virt_dma_desc *vd) 1167static void pl08x_desc_free(struct virt_dma_desc *vd)
1196{ 1168{
1197 struct pl08x_txd *txd = to_pl08x_txd(&vd->tx); 1169 struct pl08x_txd *txd = to_pl08x_txd(&vd->tx);
1198 struct pl08x_dma_chan *plchan = to_pl08x_chan(vd->tx.chan); 1170 struct pl08x_dma_chan *plchan = to_pl08x_chan(vd->tx.chan);
1199 1171
1200 if (!plchan->slave) 1172 dma_descriptor_unmap(txd);
1201 pl08x_unmap_buffers(txd);
1202
1203 if (!txd->done) 1173 if (!txd->done)
1204 pl08x_release_mux(plchan); 1174 pl08x_release_mux(plchan);
1205 1175
@@ -1252,7 +1222,7 @@ static enum dma_status pl08x_dma_tx_status(struct dma_chan *chan,
1252 size_t bytes = 0; 1222 size_t bytes = 0;
1253 1223
1254 ret = dma_cookie_status(chan, cookie, txstate); 1224 ret = dma_cookie_status(chan, cookie, txstate);
1255 if (ret == DMA_SUCCESS) 1225 if (ret == DMA_COMPLETE)
1256 return ret; 1226 return ret;
1257 1227
1258 /* 1228 /*
@@ -1267,7 +1237,7 @@ static enum dma_status pl08x_dma_tx_status(struct dma_chan *chan,
1267 1237
1268 spin_lock_irqsave(&plchan->vc.lock, flags); 1238 spin_lock_irqsave(&plchan->vc.lock, flags);
1269 ret = dma_cookie_status(chan, cookie, txstate); 1239 ret = dma_cookie_status(chan, cookie, txstate);
1270 if (ret != DMA_SUCCESS) { 1240 if (ret != DMA_COMPLETE) {
1271 vd = vchan_find_desc(&plchan->vc, cookie); 1241 vd = vchan_find_desc(&plchan->vc, cookie);
1272 if (vd) { 1242 if (vd) {
1273 /* On the issued list, so hasn't been processed yet */ 1243 /* On the issued list, so hasn't been processed yet */
@@ -2138,8 +2108,7 @@ static int pl08x_probe(struct amba_device *adev, const struct amba_id *id)
2138 writel(0x000000FF, pl08x->base + PL080_ERR_CLEAR); 2108 writel(0x000000FF, pl08x->base + PL080_ERR_CLEAR);
2139 writel(0x000000FF, pl08x->base + PL080_TC_CLEAR); 2109 writel(0x000000FF, pl08x->base + PL080_TC_CLEAR);
2140 2110
2141 ret = request_irq(adev->irq[0], pl08x_irq, IRQF_DISABLED, 2111 ret = request_irq(adev->irq[0], pl08x_irq, 0, DRIVER_NAME, pl08x);
2142 DRIVER_NAME, pl08x);
2143 if (ret) { 2112 if (ret) {
2144 dev_err(&adev->dev, "%s failed to request interrupt %d\n", 2113 dev_err(&adev->dev, "%s failed to request interrupt %d\n",
2145 __func__, adev->irq[0]); 2114 __func__, adev->irq[0]);
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index c787f38a186a..e2c04dc81e2a 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -344,31 +344,7 @@ atc_chain_complete(struct at_dma_chan *atchan, struct at_desc *desc)
344 /* move myself to free_list */ 344 /* move myself to free_list */
345 list_move(&desc->desc_node, &atchan->free_list); 345 list_move(&desc->desc_node, &atchan->free_list);
346 346
347 /* unmap dma addresses (not on slave channels) */ 347 dma_descriptor_unmap(txd);
348 if (!atchan->chan_common.private) {
349 struct device *parent = chan2parent(&atchan->chan_common);
350 if (!(txd->flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
351 if (txd->flags & DMA_COMPL_DEST_UNMAP_SINGLE)
352 dma_unmap_single(parent,
353 desc->lli.daddr,
354 desc->len, DMA_FROM_DEVICE);
355 else
356 dma_unmap_page(parent,
357 desc->lli.daddr,
358 desc->len, DMA_FROM_DEVICE);
359 }
360 if (!(txd->flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
361 if (txd->flags & DMA_COMPL_SRC_UNMAP_SINGLE)
362 dma_unmap_single(parent,
363 desc->lli.saddr,
364 desc->len, DMA_TO_DEVICE);
365 else
366 dma_unmap_page(parent,
367 desc->lli.saddr,
368 desc->len, DMA_TO_DEVICE);
369 }
370 }
371
372 /* for cyclic transfers, 348 /* for cyclic transfers,
373 * no need to replay callback function while stopping */ 349 * no need to replay callback function while stopping */
374 if (!atc_chan_is_cyclic(atchan)) { 350 if (!atc_chan_is_cyclic(atchan)) {
@@ -1102,7 +1078,7 @@ atc_tx_status(struct dma_chan *chan,
1102 int bytes = 0; 1078 int bytes = 0;
1103 1079
1104 ret = dma_cookie_status(chan, cookie, txstate); 1080 ret = dma_cookie_status(chan, cookie, txstate);
1105 if (ret == DMA_SUCCESS) 1081 if (ret == DMA_COMPLETE)
1106 return ret; 1082 return ret;
1107 /* 1083 /*
1108 * There's no point calculating the residue if there's 1084 * There's no point calculating the residue if there's
diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
index 31011d2a26fc..3c6716e0b78e 100644
--- a/drivers/dma/coh901318.c
+++ b/drivers/dma/coh901318.c
@@ -2369,7 +2369,7 @@ coh901318_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
2369 enum dma_status ret; 2369 enum dma_status ret;
2370 2370
2371 ret = dma_cookie_status(chan, cookie, txstate); 2371 ret = dma_cookie_status(chan, cookie, txstate);
2372 if (ret == DMA_SUCCESS) 2372 if (ret == DMA_COMPLETE)
2373 return ret; 2373 return ret;
2374 2374
2375 dma_set_residue(txstate, coh901318_get_bytes_left(chan)); 2375 dma_set_residue(txstate, coh901318_get_bytes_left(chan));
@@ -2694,7 +2694,7 @@ static int __init coh901318_probe(struct platform_device *pdev)
2694 if (irq < 0) 2694 if (irq < 0)
2695 return irq; 2695 return irq;
2696 2696
2697 err = devm_request_irq(&pdev->dev, irq, dma_irq_handler, IRQF_DISABLED, 2697 err = devm_request_irq(&pdev->dev, irq, dma_irq_handler, 0,
2698 "coh901318", base); 2698 "coh901318", base);
2699 if (err) 2699 if (err)
2700 return err; 2700 return err;
diff --git a/drivers/dma/cppi41.c b/drivers/dma/cppi41.c
index 7c82b92f9b16..c29dacff66fa 100644
--- a/drivers/dma/cppi41.c
+++ b/drivers/dma/cppi41.c
@@ -141,6 +141,9 @@ struct cppi41_dd {
141 const struct chan_queues *queues_rx; 141 const struct chan_queues *queues_rx;
142 const struct chan_queues *queues_tx; 142 const struct chan_queues *queues_tx;
143 struct chan_queues td_queue; 143 struct chan_queues td_queue;
144
145 /* context for suspend/resume */
146 unsigned int dma_tdfdq;
144}; 147};
145 148
146#define FIST_COMPLETION_QUEUE 93 149#define FIST_COMPLETION_QUEUE 93
@@ -263,6 +266,15 @@ static u32 pd_trans_len(u32 val)
263 return val & ((1 << (DESC_LENGTH_BITS_NUM + 1)) - 1); 266 return val & ((1 << (DESC_LENGTH_BITS_NUM + 1)) - 1);
264} 267}
265 268
269static u32 cppi41_pop_desc(struct cppi41_dd *cdd, unsigned queue_num)
270{
271 u32 desc;
272
273 desc = cppi_readl(cdd->qmgr_mem + QMGR_QUEUE_D(queue_num));
274 desc &= ~0x1f;
275 return desc;
276}
277
266static irqreturn_t cppi41_irq(int irq, void *data) 278static irqreturn_t cppi41_irq(int irq, void *data)
267{ 279{
268 struct cppi41_dd *cdd = data; 280 struct cppi41_dd *cdd = data;
@@ -300,8 +312,7 @@ static irqreturn_t cppi41_irq(int irq, void *data)
300 q_num = __fls(val); 312 q_num = __fls(val);
301 val &= ~(1 << q_num); 313 val &= ~(1 << q_num);
302 q_num += 32 * i; 314 q_num += 32 * i;
303 desc = cppi_readl(cdd->qmgr_mem + QMGR_QUEUE_D(q_num)); 315 desc = cppi41_pop_desc(cdd, q_num);
304 desc &= ~0x1f;
305 c = desc_to_chan(cdd, desc); 316 c = desc_to_chan(cdd, desc);
306 if (WARN_ON(!c)) { 317 if (WARN_ON(!c)) {
307 pr_err("%s() q %d desc %08x\n", __func__, 318 pr_err("%s() q %d desc %08x\n", __func__,
@@ -353,7 +364,7 @@ static enum dma_status cppi41_dma_tx_status(struct dma_chan *chan,
353 364
354 /* lock */ 365 /* lock */
355 ret = dma_cookie_status(chan, cookie, txstate); 366 ret = dma_cookie_status(chan, cookie, txstate);
356 if (txstate && ret == DMA_SUCCESS) 367 if (txstate && ret == DMA_COMPLETE)
357 txstate->residue = c->residue; 368 txstate->residue = c->residue;
358 /* unlock */ 369 /* unlock */
359 370
@@ -517,15 +528,6 @@ static void cppi41_compute_td_desc(struct cppi41_desc *d)
517 d->pd0 = DESC_TYPE_TEARD << DESC_TYPE; 528 d->pd0 = DESC_TYPE_TEARD << DESC_TYPE;
518} 529}
519 530
520static u32 cppi41_pop_desc(struct cppi41_dd *cdd, unsigned queue_num)
521{
522 u32 desc;
523
524 desc = cppi_readl(cdd->qmgr_mem + QMGR_QUEUE_D(queue_num));
525 desc &= ~0x1f;
526 return desc;
527}
528
529static int cppi41_tear_down_chan(struct cppi41_channel *c) 531static int cppi41_tear_down_chan(struct cppi41_channel *c)
530{ 532{
531 struct cppi41_dd *cdd = c->cdd; 533 struct cppi41_dd *cdd = c->cdd;
@@ -561,36 +563,26 @@ static int cppi41_tear_down_chan(struct cppi41_channel *c)
561 c->td_retry = 100; 563 c->td_retry = 100;
562 } 564 }
563 565
564 if (!c->td_seen) { 566 if (!c->td_seen || !c->td_desc_seen) {
565 unsigned td_comp_queue;
566 567
567 if (c->is_tx) 568 desc_phys = cppi41_pop_desc(cdd, cdd->td_queue.complete);
568 td_comp_queue = cdd->td_queue.complete; 569 if (!desc_phys)
569 else 570 desc_phys = cppi41_pop_desc(cdd, c->q_comp_num);
570 td_comp_queue = c->q_comp_num;
571 571
572 desc_phys = cppi41_pop_desc(cdd, td_comp_queue); 572 if (desc_phys == c->desc_phys) {
573 if (desc_phys) { 573 c->td_desc_seen = 1;
574 __iormb(); 574
575 } else if (desc_phys == td_desc_phys) {
576 u32 pd0;
575 577
576 if (desc_phys == td_desc_phys) {
577 u32 pd0;
578 pd0 = td->pd0;
579 WARN_ON((pd0 >> DESC_TYPE) != DESC_TYPE_TEARD);
580 WARN_ON(!c->is_tx && !(pd0 & TD_DESC_IS_RX));
581 WARN_ON((pd0 & 0x1f) != c->port_num);
582 } else {
583 WARN_ON_ONCE(1);
584 }
585 c->td_seen = 1;
586 }
587 }
588 if (!c->td_desc_seen) {
589 desc_phys = cppi41_pop_desc(cdd, c->q_comp_num);
590 if (desc_phys) {
591 __iormb(); 578 __iormb();
592 WARN_ON(c->desc_phys != desc_phys); 579 pd0 = td->pd0;
593 c->td_desc_seen = 1; 580 WARN_ON((pd0 >> DESC_TYPE) != DESC_TYPE_TEARD);
581 WARN_ON(!c->is_tx && !(pd0 & TD_DESC_IS_RX));
582 WARN_ON((pd0 & 0x1f) != c->port_num);
583 c->td_seen = 1;
584 } else if (desc_phys) {
585 WARN_ON_ONCE(1);
594 } 586 }
595 } 587 }
596 c->td_retry--; 588 c->td_retry--;
@@ -609,7 +601,7 @@ static int cppi41_tear_down_chan(struct cppi41_channel *c)
609 601
610 WARN_ON(!c->td_retry); 602 WARN_ON(!c->td_retry);
611 if (!c->td_desc_seen) { 603 if (!c->td_desc_seen) {
612 desc_phys = cppi_readl(cdd->qmgr_mem + QMGR_QUEUE_D(c->q_num)); 604 desc_phys = cppi41_pop_desc(cdd, c->q_num);
613 WARN_ON(!desc_phys); 605 WARN_ON(!desc_phys);
614 } 606 }
615 607
@@ -674,14 +666,14 @@ static void cleanup_chans(struct cppi41_dd *cdd)
674 } 666 }
675} 667}
676 668
677static int cppi41_add_chans(struct platform_device *pdev, struct cppi41_dd *cdd) 669static int cppi41_add_chans(struct device *dev, struct cppi41_dd *cdd)
678{ 670{
679 struct cppi41_channel *cchan; 671 struct cppi41_channel *cchan;
680 int i; 672 int i;
681 int ret; 673 int ret;
682 u32 n_chans; 674 u32 n_chans;
683 675
684 ret = of_property_read_u32(pdev->dev.of_node, "#dma-channels", 676 ret = of_property_read_u32(dev->of_node, "#dma-channels",
685 &n_chans); 677 &n_chans);
686 if (ret) 678 if (ret)
687 return ret; 679 return ret;
@@ -719,7 +711,7 @@ err:
719 return -ENOMEM; 711 return -ENOMEM;
720} 712}
721 713
722static void purge_descs(struct platform_device *pdev, struct cppi41_dd *cdd) 714static void purge_descs(struct device *dev, struct cppi41_dd *cdd)
723{ 715{
724 unsigned int mem_decs; 716 unsigned int mem_decs;
725 int i; 717 int i;
@@ -731,7 +723,7 @@ static void purge_descs(struct platform_device *pdev, struct cppi41_dd *cdd)
731 cppi_writel(0, cdd->qmgr_mem + QMGR_MEMBASE(i)); 723 cppi_writel(0, cdd->qmgr_mem + QMGR_MEMBASE(i));
732 cppi_writel(0, cdd->qmgr_mem + QMGR_MEMCTRL(i)); 724 cppi_writel(0, cdd->qmgr_mem + QMGR_MEMCTRL(i));
733 725
734 dma_free_coherent(&pdev->dev, mem_decs, cdd->cd, 726 dma_free_coherent(dev, mem_decs, cdd->cd,
735 cdd->descs_phys); 727 cdd->descs_phys);
736 } 728 }
737} 729}
@@ -741,19 +733,19 @@ static void disable_sched(struct cppi41_dd *cdd)
741 cppi_writel(0, cdd->sched_mem + DMA_SCHED_CTRL); 733 cppi_writel(0, cdd->sched_mem + DMA_SCHED_CTRL);
742} 734}
743 735
744static void deinit_cpii41(struct platform_device *pdev, struct cppi41_dd *cdd) 736static void deinit_cppi41(struct device *dev, struct cppi41_dd *cdd)
745{ 737{
746 disable_sched(cdd); 738 disable_sched(cdd);
747 739
748 purge_descs(pdev, cdd); 740 purge_descs(dev, cdd);
749 741
750 cppi_writel(0, cdd->qmgr_mem + QMGR_LRAM0_BASE); 742 cppi_writel(0, cdd->qmgr_mem + QMGR_LRAM0_BASE);
751 cppi_writel(0, cdd->qmgr_mem + QMGR_LRAM0_BASE); 743 cppi_writel(0, cdd->qmgr_mem + QMGR_LRAM0_BASE);
752 dma_free_coherent(&pdev->dev, QMGR_SCRATCH_SIZE, cdd->qmgr_scratch, 744 dma_free_coherent(dev, QMGR_SCRATCH_SIZE, cdd->qmgr_scratch,
753 cdd->scratch_phys); 745 cdd->scratch_phys);
754} 746}
755 747
756static int init_descs(struct platform_device *pdev, struct cppi41_dd *cdd) 748static int init_descs(struct device *dev, struct cppi41_dd *cdd)
757{ 749{
758 unsigned int desc_size; 750 unsigned int desc_size;
759 unsigned int mem_decs; 751 unsigned int mem_decs;
@@ -777,7 +769,7 @@ static int init_descs(struct platform_device *pdev, struct cppi41_dd *cdd)
777 reg |= ilog2(ALLOC_DECS_NUM) - 5; 769 reg |= ilog2(ALLOC_DECS_NUM) - 5;
778 770
779 BUILD_BUG_ON(DESCS_AREAS != 1); 771 BUILD_BUG_ON(DESCS_AREAS != 1);
780 cdd->cd = dma_alloc_coherent(&pdev->dev, mem_decs, 772 cdd->cd = dma_alloc_coherent(dev, mem_decs,
781 &cdd->descs_phys, GFP_KERNEL); 773 &cdd->descs_phys, GFP_KERNEL);
782 if (!cdd->cd) 774 if (!cdd->cd)
783 return -ENOMEM; 775 return -ENOMEM;
@@ -813,12 +805,12 @@ static void init_sched(struct cppi41_dd *cdd)
813 cppi_writel(reg, cdd->sched_mem + DMA_SCHED_CTRL); 805 cppi_writel(reg, cdd->sched_mem + DMA_SCHED_CTRL);
814} 806}
815 807
816static int init_cppi41(struct platform_device *pdev, struct cppi41_dd *cdd) 808static int init_cppi41(struct device *dev, struct cppi41_dd *cdd)
817{ 809{
818 int ret; 810 int ret;
819 811
820 BUILD_BUG_ON(QMGR_SCRATCH_SIZE > ((1 << 14) - 1)); 812 BUILD_BUG_ON(QMGR_SCRATCH_SIZE > ((1 << 14) - 1));
821 cdd->qmgr_scratch = dma_alloc_coherent(&pdev->dev, QMGR_SCRATCH_SIZE, 813 cdd->qmgr_scratch = dma_alloc_coherent(dev, QMGR_SCRATCH_SIZE,
822 &cdd->scratch_phys, GFP_KERNEL); 814 &cdd->scratch_phys, GFP_KERNEL);
823 if (!cdd->qmgr_scratch) 815 if (!cdd->qmgr_scratch)
824 return -ENOMEM; 816 return -ENOMEM;
@@ -827,7 +819,7 @@ static int init_cppi41(struct platform_device *pdev, struct cppi41_dd *cdd)
827 cppi_writel(QMGR_SCRATCH_SIZE, cdd->qmgr_mem + QMGR_LRAM_SIZE); 819 cppi_writel(QMGR_SCRATCH_SIZE, cdd->qmgr_mem + QMGR_LRAM_SIZE);
828 cppi_writel(0, cdd->qmgr_mem + QMGR_LRAM1_BASE); 820 cppi_writel(0, cdd->qmgr_mem + QMGR_LRAM1_BASE);
829 821
830 ret = init_descs(pdev, cdd); 822 ret = init_descs(dev, cdd);
831 if (ret) 823 if (ret)
832 goto err_td; 824 goto err_td;
833 825
@@ -835,7 +827,7 @@ static int init_cppi41(struct platform_device *pdev, struct cppi41_dd *cdd)
835 init_sched(cdd); 827 init_sched(cdd);
836 return 0; 828 return 0;
837err_td: 829err_td:
838 deinit_cpii41(pdev, cdd); 830 deinit_cppi41(dev, cdd);
839 return ret; 831 return ret;
840} 832}
841 833
@@ -914,11 +906,11 @@ static const struct of_device_id cppi41_dma_ids[] = {
914}; 906};
915MODULE_DEVICE_TABLE(of, cppi41_dma_ids); 907MODULE_DEVICE_TABLE(of, cppi41_dma_ids);
916 908
917static const struct cppi_glue_infos *get_glue_info(struct platform_device *pdev) 909static const struct cppi_glue_infos *get_glue_info(struct device *dev)
918{ 910{
919 const struct of_device_id *of_id; 911 const struct of_device_id *of_id;
920 912
921 of_id = of_match_node(cppi41_dma_ids, pdev->dev.of_node); 913 of_id = of_match_node(cppi41_dma_ids, dev->of_node);
922 if (!of_id) 914 if (!of_id)
923 return NULL; 915 return NULL;
924 return of_id->data; 916 return of_id->data;
@@ -927,11 +919,12 @@ static const struct cppi_glue_infos *get_glue_info(struct platform_device *pdev)
927static int cppi41_dma_probe(struct platform_device *pdev) 919static int cppi41_dma_probe(struct platform_device *pdev)
928{ 920{
929 struct cppi41_dd *cdd; 921 struct cppi41_dd *cdd;
922 struct device *dev = &pdev->dev;
930 const struct cppi_glue_infos *glue_info; 923 const struct cppi_glue_infos *glue_info;
931 int irq; 924 int irq;
932 int ret; 925 int ret;
933 926
934 glue_info = get_glue_info(pdev); 927 glue_info = get_glue_info(dev);
935 if (!glue_info) 928 if (!glue_info)
936 return -EINVAL; 929 return -EINVAL;
937 930
@@ -946,14 +939,14 @@ static int cppi41_dma_probe(struct platform_device *pdev)
946 cdd->ddev.device_issue_pending = cppi41_dma_issue_pending; 939 cdd->ddev.device_issue_pending = cppi41_dma_issue_pending;
947 cdd->ddev.device_prep_slave_sg = cppi41_dma_prep_slave_sg; 940 cdd->ddev.device_prep_slave_sg = cppi41_dma_prep_slave_sg;
948 cdd->ddev.device_control = cppi41_dma_control; 941 cdd->ddev.device_control = cppi41_dma_control;
949 cdd->ddev.dev = &pdev->dev; 942 cdd->ddev.dev = dev;
950 INIT_LIST_HEAD(&cdd->ddev.channels); 943 INIT_LIST_HEAD(&cdd->ddev.channels);
951 cpp41_dma_info.dma_cap = cdd->ddev.cap_mask; 944 cpp41_dma_info.dma_cap = cdd->ddev.cap_mask;
952 945
953 cdd->usbss_mem = of_iomap(pdev->dev.of_node, 0); 946 cdd->usbss_mem = of_iomap(dev->of_node, 0);
954 cdd->ctrl_mem = of_iomap(pdev->dev.of_node, 1); 947 cdd->ctrl_mem = of_iomap(dev->of_node, 1);
955 cdd->sched_mem = of_iomap(pdev->dev.of_node, 2); 948 cdd->sched_mem = of_iomap(dev->of_node, 2);
956 cdd->qmgr_mem = of_iomap(pdev->dev.of_node, 3); 949 cdd->qmgr_mem = of_iomap(dev->of_node, 3);
957 950
958 if (!cdd->usbss_mem || !cdd->ctrl_mem || !cdd->sched_mem || 951 if (!cdd->usbss_mem || !cdd->ctrl_mem || !cdd->sched_mem ||
959 !cdd->qmgr_mem) { 952 !cdd->qmgr_mem) {
@@ -961,31 +954,31 @@ static int cppi41_dma_probe(struct platform_device *pdev)
961 goto err_remap; 954 goto err_remap;
962 } 955 }
963 956
964 pm_runtime_enable(&pdev->dev); 957 pm_runtime_enable(dev);
965 ret = pm_runtime_get_sync(&pdev->dev); 958 ret = pm_runtime_get_sync(dev);
966 if (ret) 959 if (ret < 0)
967 goto err_get_sync; 960 goto err_get_sync;
968 961
969 cdd->queues_rx = glue_info->queues_rx; 962 cdd->queues_rx = glue_info->queues_rx;
970 cdd->queues_tx = glue_info->queues_tx; 963 cdd->queues_tx = glue_info->queues_tx;
971 cdd->td_queue = glue_info->td_queue; 964 cdd->td_queue = glue_info->td_queue;
972 965
973 ret = init_cppi41(pdev, cdd); 966 ret = init_cppi41(dev, cdd);
974 if (ret) 967 if (ret)
975 goto err_init_cppi; 968 goto err_init_cppi;
976 969
977 ret = cppi41_add_chans(pdev, cdd); 970 ret = cppi41_add_chans(dev, cdd);
978 if (ret) 971 if (ret)
979 goto err_chans; 972 goto err_chans;
980 973
981 irq = irq_of_parse_and_map(pdev->dev.of_node, 0); 974 irq = irq_of_parse_and_map(dev->of_node, 0);
982 if (!irq) 975 if (!irq)
983 goto err_irq; 976 goto err_irq;
984 977
985 cppi_writel(USBSS_IRQ_PD_COMP, cdd->usbss_mem + USBSS_IRQ_ENABLER); 978 cppi_writel(USBSS_IRQ_PD_COMP, cdd->usbss_mem + USBSS_IRQ_ENABLER);
986 979
987 ret = request_irq(irq, glue_info->isr, IRQF_SHARED, 980 ret = request_irq(irq, glue_info->isr, IRQF_SHARED,
988 dev_name(&pdev->dev), cdd); 981 dev_name(dev), cdd);
989 if (ret) 982 if (ret)
990 goto err_irq; 983 goto err_irq;
991 cdd->irq = irq; 984 cdd->irq = irq;
@@ -994,7 +987,7 @@ static int cppi41_dma_probe(struct platform_device *pdev)
994 if (ret) 987 if (ret)
995 goto err_dma_reg; 988 goto err_dma_reg;
996 989
997 ret = of_dma_controller_register(pdev->dev.of_node, 990 ret = of_dma_controller_register(dev->of_node,
998 cppi41_dma_xlate, &cpp41_dma_info); 991 cppi41_dma_xlate, &cpp41_dma_info);
999 if (ret) 992 if (ret)
1000 goto err_of; 993 goto err_of;
@@ -1009,11 +1002,11 @@ err_irq:
1009 cppi_writel(0, cdd->usbss_mem + USBSS_IRQ_CLEARR); 1002 cppi_writel(0, cdd->usbss_mem + USBSS_IRQ_CLEARR);
1010 cleanup_chans(cdd); 1003 cleanup_chans(cdd);
1011err_chans: 1004err_chans:
1012 deinit_cpii41(pdev, cdd); 1005 deinit_cppi41(dev, cdd);
1013err_init_cppi: 1006err_init_cppi:
1014 pm_runtime_put(&pdev->dev); 1007 pm_runtime_put(dev);
1015err_get_sync: 1008err_get_sync:
1016 pm_runtime_disable(&pdev->dev); 1009 pm_runtime_disable(dev);
1017 iounmap(cdd->usbss_mem); 1010 iounmap(cdd->usbss_mem);
1018 iounmap(cdd->ctrl_mem); 1011 iounmap(cdd->ctrl_mem);
1019 iounmap(cdd->sched_mem); 1012 iounmap(cdd->sched_mem);
@@ -1033,7 +1026,7 @@ static int cppi41_dma_remove(struct platform_device *pdev)
1033 cppi_writel(0, cdd->usbss_mem + USBSS_IRQ_CLEARR); 1026 cppi_writel(0, cdd->usbss_mem + USBSS_IRQ_CLEARR);
1034 free_irq(cdd->irq, cdd); 1027 free_irq(cdd->irq, cdd);
1035 cleanup_chans(cdd); 1028 cleanup_chans(cdd);
1036 deinit_cpii41(pdev, cdd); 1029 deinit_cppi41(&pdev->dev, cdd);
1037 iounmap(cdd->usbss_mem); 1030 iounmap(cdd->usbss_mem);
1038 iounmap(cdd->ctrl_mem); 1031 iounmap(cdd->ctrl_mem);
1039 iounmap(cdd->sched_mem); 1032 iounmap(cdd->sched_mem);
@@ -1044,12 +1037,53 @@ static int cppi41_dma_remove(struct platform_device *pdev)
1044 return 0; 1037 return 0;
1045} 1038}
1046 1039
1040#ifdef CONFIG_PM_SLEEP
1041static int cppi41_suspend(struct device *dev)
1042{
1043 struct cppi41_dd *cdd = dev_get_drvdata(dev);
1044
1045 cdd->dma_tdfdq = cppi_readl(cdd->ctrl_mem + DMA_TDFDQ);
1046 cppi_writel(0, cdd->usbss_mem + USBSS_IRQ_CLEARR);
1047 disable_sched(cdd);
1048
1049 return 0;
1050}
1051
1052static int cppi41_resume(struct device *dev)
1053{
1054 struct cppi41_dd *cdd = dev_get_drvdata(dev);
1055 struct cppi41_channel *c;
1056 int i;
1057
1058 for (i = 0; i < DESCS_AREAS; i++)
1059 cppi_writel(cdd->descs_phys, cdd->qmgr_mem + QMGR_MEMBASE(i));
1060
1061 list_for_each_entry(c, &cdd->ddev.channels, chan.device_node)
1062 if (!c->is_tx)
1063 cppi_writel(c->q_num, c->gcr_reg + RXHPCRA0);
1064
1065 init_sched(cdd);
1066
1067 cppi_writel(cdd->dma_tdfdq, cdd->ctrl_mem + DMA_TDFDQ);
1068 cppi_writel(cdd->scratch_phys, cdd->qmgr_mem + QMGR_LRAM0_BASE);
1069 cppi_writel(QMGR_SCRATCH_SIZE, cdd->qmgr_mem + QMGR_LRAM_SIZE);
1070 cppi_writel(0, cdd->qmgr_mem + QMGR_LRAM1_BASE);
1071
1072 cppi_writel(USBSS_IRQ_PD_COMP, cdd->usbss_mem + USBSS_IRQ_ENABLER);
1073
1074 return 0;
1075}
1076#endif
1077
1078static SIMPLE_DEV_PM_OPS(cppi41_pm_ops, cppi41_suspend, cppi41_resume);
1079
1047static struct platform_driver cpp41_dma_driver = { 1080static struct platform_driver cpp41_dma_driver = {
1048 .probe = cppi41_dma_probe, 1081 .probe = cppi41_dma_probe,
1049 .remove = cppi41_dma_remove, 1082 .remove = cppi41_dma_remove,
1050 .driver = { 1083 .driver = {
1051 .name = "cppi41-dma-engine", 1084 .name = "cppi41-dma-engine",
1052 .owner = THIS_MODULE, 1085 .owner = THIS_MODULE,
1086 .pm = &cppi41_pm_ops,
1053 .of_match_table = of_match_ptr(cppi41_dma_ids), 1087 .of_match_table = of_match_ptr(cppi41_dma_ids),
1054 }, 1088 },
1055}; 1089};
diff --git a/drivers/dma/dma-jz4740.c b/drivers/dma/dma-jz4740.c
index b0c0c8268d42..94c380f07538 100644
--- a/drivers/dma/dma-jz4740.c
+++ b/drivers/dma/dma-jz4740.c
@@ -491,7 +491,7 @@ static enum dma_status jz4740_dma_tx_status(struct dma_chan *c,
491 unsigned long flags; 491 unsigned long flags;
492 492
493 status = dma_cookie_status(c, cookie, state); 493 status = dma_cookie_status(c, cookie, state);
494 if (status == DMA_SUCCESS || !state) 494 if (status == DMA_COMPLETE || !state)
495 return status; 495 return status;
496 496
497 spin_lock_irqsave(&chan->vchan.lock, flags); 497 spin_lock_irqsave(&chan->vchan.lock, flags);
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index 9162ac80c18f..ea806bdc12ef 100644
--- a/drivers/dma/dmaengine.c
+++ b/drivers/dma/dmaengine.c
@@ -65,6 +65,7 @@
65#include <linux/acpi.h> 65#include <linux/acpi.h>
66#include <linux/acpi_dma.h> 66#include <linux/acpi_dma.h>
67#include <linux/of_dma.h> 67#include <linux/of_dma.h>
68#include <linux/mempool.h>
68 69
69static DEFINE_MUTEX(dma_list_mutex); 70static DEFINE_MUTEX(dma_list_mutex);
70static DEFINE_IDR(dma_idr); 71static DEFINE_IDR(dma_idr);
@@ -901,98 +902,132 @@ void dma_async_device_unregister(struct dma_device *device)
901} 902}
902EXPORT_SYMBOL(dma_async_device_unregister); 903EXPORT_SYMBOL(dma_async_device_unregister);
903 904
904/** 905struct dmaengine_unmap_pool {
905 * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses 906 struct kmem_cache *cache;
906 * @chan: DMA channel to offload copy to 907 const char *name;
907 * @dest: destination address (virtual) 908 mempool_t *pool;
908 * @src: source address (virtual) 909 size_t size;
909 * @len: length 910};
910 *
911 * Both @dest and @src must be mappable to a bus address according to the
912 * DMA mapping API rules for streaming mappings.
913 * Both @dest and @src must stay memory resident (kernel memory or locked
914 * user space pages).
915 */
916dma_cookie_t
917dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest,
918 void *src, size_t len)
919{
920 struct dma_device *dev = chan->device;
921 struct dma_async_tx_descriptor *tx;
922 dma_addr_t dma_dest, dma_src;
923 dma_cookie_t cookie;
924 unsigned long flags;
925 911
926 dma_src = dma_map_single(dev->dev, src, len, DMA_TO_DEVICE); 912#define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) }
927 dma_dest = dma_map_single(dev->dev, dest, len, DMA_FROM_DEVICE); 913static struct dmaengine_unmap_pool unmap_pool[] = {
928 flags = DMA_CTRL_ACK | 914 __UNMAP_POOL(2),
929 DMA_COMPL_SRC_UNMAP_SINGLE | 915 #if IS_ENABLED(CONFIG_ASYNC_TX_DMA)
930 DMA_COMPL_DEST_UNMAP_SINGLE; 916 __UNMAP_POOL(16),
931 tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, flags); 917 __UNMAP_POOL(128),
918 __UNMAP_POOL(256),
919 #endif
920};
932 921
933 if (!tx) { 922static struct dmaengine_unmap_pool *__get_unmap_pool(int nr)
934 dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE); 923{
935 dma_unmap_single(dev->dev, dma_dest, len, DMA_FROM_DEVICE); 924 int order = get_count_order(nr);
936 return -ENOMEM; 925
926 switch (order) {
927 case 0 ... 1:
928 return &unmap_pool[0];
929 case 2 ... 4:
930 return &unmap_pool[1];
931 case 5 ... 7:
932 return &unmap_pool[2];
933 case 8:
934 return &unmap_pool[3];
935 default:
936 BUG();
937 return NULL;
937 } 938 }
939}
938 940
939 tx->callback = NULL; 941static void dmaengine_unmap(struct kref *kref)
940 cookie = tx->tx_submit(tx); 942{
943 struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref);
944 struct device *dev = unmap->dev;
945 int cnt, i;
946
947 cnt = unmap->to_cnt;
948 for (i = 0; i < cnt; i++)
949 dma_unmap_page(dev, unmap->addr[i], unmap->len,
950 DMA_TO_DEVICE);
951 cnt += unmap->from_cnt;
952 for (; i < cnt; i++)
953 dma_unmap_page(dev, unmap->addr[i], unmap->len,
954 DMA_FROM_DEVICE);
955 cnt += unmap->bidi_cnt;
956 for (; i < cnt; i++) {
957 if (unmap->addr[i] == 0)
958 continue;
959 dma_unmap_page(dev, unmap->addr[i], unmap->len,
960 DMA_BIDIRECTIONAL);
961 }
962 mempool_free(unmap, __get_unmap_pool(cnt)->pool);
963}
941 964
942 preempt_disable(); 965void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
943 __this_cpu_add(chan->local->bytes_transferred, len); 966{
944 __this_cpu_inc(chan->local->memcpy_count); 967 if (unmap)
945 preempt_enable(); 968 kref_put(&unmap->kref, dmaengine_unmap);
969}
970EXPORT_SYMBOL_GPL(dmaengine_unmap_put);
946 971
947 return cookie; 972static void dmaengine_destroy_unmap_pool(void)
973{
974 int i;
975
976 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
977 struct dmaengine_unmap_pool *p = &unmap_pool[i];
978
979 if (p->pool)
980 mempool_destroy(p->pool);
981 p->pool = NULL;
982 if (p->cache)
983 kmem_cache_destroy(p->cache);
984 p->cache = NULL;
985 }
948} 986}
949EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf);
950 987
951/** 988static int __init dmaengine_init_unmap_pool(void)
952 * dma_async_memcpy_buf_to_pg - offloaded copy from address to page
953 * @chan: DMA channel to offload copy to
954 * @page: destination page
955 * @offset: offset in page to copy to
956 * @kdata: source address (virtual)
957 * @len: length
958 *
959 * Both @page/@offset and @kdata must be mappable to a bus address according
960 * to the DMA mapping API rules for streaming mappings.
961 * Both @page/@offset and @kdata must stay memory resident (kernel memory or
962 * locked user space pages)
963 */
964dma_cookie_t
965dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page,
966 unsigned int offset, void *kdata, size_t len)
967{ 989{
968 struct dma_device *dev = chan->device; 990 int i;
969 struct dma_async_tx_descriptor *tx;
970 dma_addr_t dma_dest, dma_src;
971 dma_cookie_t cookie;
972 unsigned long flags;
973 991
974 dma_src = dma_map_single(dev->dev, kdata, len, DMA_TO_DEVICE); 992 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
975 dma_dest = dma_map_page(dev->dev, page, offset, len, DMA_FROM_DEVICE); 993 struct dmaengine_unmap_pool *p = &unmap_pool[i];
976 flags = DMA_CTRL_ACK | DMA_COMPL_SRC_UNMAP_SINGLE; 994 size_t size;
977 tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, flags);
978 995
979 if (!tx) { 996 size = sizeof(struct dmaengine_unmap_data) +
980 dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE); 997 sizeof(dma_addr_t) * p->size;
981 dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE); 998
982 return -ENOMEM; 999 p->cache = kmem_cache_create(p->name, size, 0,
1000 SLAB_HWCACHE_ALIGN, NULL);
1001 if (!p->cache)
1002 break;
1003 p->pool = mempool_create_slab_pool(1, p->cache);
1004 if (!p->pool)
1005 break;
983 } 1006 }
984 1007
985 tx->callback = NULL; 1008 if (i == ARRAY_SIZE(unmap_pool))
986 cookie = tx->tx_submit(tx); 1009 return 0;
987 1010
988 preempt_disable(); 1011 dmaengine_destroy_unmap_pool();
989 __this_cpu_add(chan->local->bytes_transferred, len); 1012 return -ENOMEM;
990 __this_cpu_inc(chan->local->memcpy_count); 1013}
991 preempt_enable();
992 1014
993 return cookie; 1015struct dmaengine_unmap_data *
1016dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
1017{
1018 struct dmaengine_unmap_data *unmap;
1019
1020 unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags);
1021 if (!unmap)
1022 return NULL;
1023
1024 memset(unmap, 0, sizeof(*unmap));
1025 kref_init(&unmap->kref);
1026 unmap->dev = dev;
1027
1028 return unmap;
994} 1029}
995EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg); 1030EXPORT_SYMBOL(dmaengine_get_unmap_data);
996 1031
997/** 1032/**
998 * dma_async_memcpy_pg_to_pg - offloaded copy from page to page 1033 * dma_async_memcpy_pg_to_pg - offloaded copy from page to page
@@ -1015,24 +1050,33 @@ dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg,
1015{ 1050{
1016 struct dma_device *dev = chan->device; 1051 struct dma_device *dev = chan->device;
1017 struct dma_async_tx_descriptor *tx; 1052 struct dma_async_tx_descriptor *tx;
1018 dma_addr_t dma_dest, dma_src; 1053 struct dmaengine_unmap_data *unmap;
1019 dma_cookie_t cookie; 1054 dma_cookie_t cookie;
1020 unsigned long flags; 1055 unsigned long flags;
1021 1056
1022 dma_src = dma_map_page(dev->dev, src_pg, src_off, len, DMA_TO_DEVICE); 1057 unmap = dmaengine_get_unmap_data(dev->dev, 2, GFP_NOIO);
1023 dma_dest = dma_map_page(dev->dev, dest_pg, dest_off, len, 1058 if (!unmap)
1024 DMA_FROM_DEVICE); 1059 return -ENOMEM;
1060
1061 unmap->to_cnt = 1;
1062 unmap->from_cnt = 1;
1063 unmap->addr[0] = dma_map_page(dev->dev, src_pg, src_off, len,
1064 DMA_TO_DEVICE);
1065 unmap->addr[1] = dma_map_page(dev->dev, dest_pg, dest_off, len,
1066 DMA_FROM_DEVICE);
1067 unmap->len = len;
1025 flags = DMA_CTRL_ACK; 1068 flags = DMA_CTRL_ACK;
1026 tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, flags); 1069 tx = dev->device_prep_dma_memcpy(chan, unmap->addr[1], unmap->addr[0],
1070 len, flags);
1027 1071
1028 if (!tx) { 1072 if (!tx) {
1029 dma_unmap_page(dev->dev, dma_src, len, DMA_TO_DEVICE); 1073 dmaengine_unmap_put(unmap);
1030 dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE);
1031 return -ENOMEM; 1074 return -ENOMEM;
1032 } 1075 }
1033 1076
1034 tx->callback = NULL; 1077 dma_set_unmap(tx, unmap);
1035 cookie = tx->tx_submit(tx); 1078 cookie = tx->tx_submit(tx);
1079 dmaengine_unmap_put(unmap);
1036 1080
1037 preempt_disable(); 1081 preempt_disable();
1038 __this_cpu_add(chan->local->bytes_transferred, len); 1082 __this_cpu_add(chan->local->bytes_transferred, len);
@@ -1043,6 +1087,52 @@ dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg,
1043} 1087}
1044EXPORT_SYMBOL(dma_async_memcpy_pg_to_pg); 1088EXPORT_SYMBOL(dma_async_memcpy_pg_to_pg);
1045 1089
1090/**
1091 * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses
1092 * @chan: DMA channel to offload copy to
1093 * @dest: destination address (virtual)
1094 * @src: source address (virtual)
1095 * @len: length
1096 *
1097 * Both @dest and @src must be mappable to a bus address according to the
1098 * DMA mapping API rules for streaming mappings.
1099 * Both @dest and @src must stay memory resident (kernel memory or locked
1100 * user space pages).
1101 */
1102dma_cookie_t
1103dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest,
1104 void *src, size_t len)
1105{
1106 return dma_async_memcpy_pg_to_pg(chan, virt_to_page(dest),
1107 (unsigned long) dest & ~PAGE_MASK,
1108 virt_to_page(src),
1109 (unsigned long) src & ~PAGE_MASK, len);
1110}
1111EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf);
1112
1113/**
1114 * dma_async_memcpy_buf_to_pg - offloaded copy from address to page
1115 * @chan: DMA channel to offload copy to
1116 * @page: destination page
1117 * @offset: offset in page to copy to
1118 * @kdata: source address (virtual)
1119 * @len: length
1120 *
1121 * Both @page/@offset and @kdata must be mappable to a bus address according
1122 * to the DMA mapping API rules for streaming mappings.
1123 * Both @page/@offset and @kdata must stay memory resident (kernel memory or
1124 * locked user space pages)
1125 */
1126dma_cookie_t
1127dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page,
1128 unsigned int offset, void *kdata, size_t len)
1129{
1130 return dma_async_memcpy_pg_to_pg(chan, page, offset,
1131 virt_to_page(kdata),
1132 (unsigned long) kdata & ~PAGE_MASK, len);
1133}
1134EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg);
1135
1046void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, 1136void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
1047 struct dma_chan *chan) 1137 struct dma_chan *chan)
1048{ 1138{
@@ -1062,7 +1152,7 @@ dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
1062 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); 1152 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
1063 1153
1064 if (!tx) 1154 if (!tx)
1065 return DMA_SUCCESS; 1155 return DMA_COMPLETE;
1066 1156
1067 while (tx->cookie == -EBUSY) { 1157 while (tx->cookie == -EBUSY) {
1068 if (time_after_eq(jiffies, dma_sync_wait_timeout)) { 1158 if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
@@ -1116,6 +1206,10 @@ EXPORT_SYMBOL_GPL(dma_run_dependencies);
1116 1206
1117static int __init dma_bus_init(void) 1207static int __init dma_bus_init(void)
1118{ 1208{
1209 int err = dmaengine_init_unmap_pool();
1210
1211 if (err)
1212 return err;
1119 return class_register(&dma_devclass); 1213 return class_register(&dma_devclass);
1120} 1214}
1121arch_initcall(dma_bus_init); 1215arch_initcall(dma_bus_init);
diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c
index 92f796cdc6ab..20f9a3aaf926 100644
--- a/drivers/dma/dmatest.c
+++ b/drivers/dma/dmatest.c
@@ -8,6 +8,8 @@
8 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
11#include <linux/delay.h> 13#include <linux/delay.h>
12#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
13#include <linux/dmaengine.h> 15#include <linux/dmaengine.h>
@@ -19,10 +21,6 @@
19#include <linux/random.h> 21#include <linux/random.h>
20#include <linux/slab.h> 22#include <linux/slab.h>
21#include <linux/wait.h> 23#include <linux/wait.h>
22#include <linux/ctype.h>
23#include <linux/debugfs.h>
24#include <linux/uaccess.h>
25#include <linux/seq_file.h>
26 24
27static unsigned int test_buf_size = 16384; 25static unsigned int test_buf_size = 16384;
28module_param(test_buf_size, uint, S_IRUGO | S_IWUSR); 26module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
@@ -68,92 +66,13 @@ module_param(timeout, uint, S_IRUGO | S_IWUSR);
68MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), " 66MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
69 "Pass -1 for infinite timeout"); 67 "Pass -1 for infinite timeout");
70 68
71/* Maximum amount of mismatched bytes in buffer to print */ 69static bool noverify;
72#define MAX_ERROR_COUNT 32 70module_param(noverify, bool, S_IRUGO | S_IWUSR);
73 71MODULE_PARM_DESC(noverify, "Disable random data setup and verification");
74/*
75 * Initialization patterns. All bytes in the source buffer has bit 7
76 * set, all bytes in the destination buffer has bit 7 cleared.
77 *
78 * Bit 6 is set for all bytes which are to be copied by the DMA
79 * engine. Bit 5 is set for all bytes which are to be overwritten by
80 * the DMA engine.
81 *
82 * The remaining bits are the inverse of a counter which increments by
83 * one for each byte address.
84 */
85#define PATTERN_SRC 0x80
86#define PATTERN_DST 0x00
87#define PATTERN_COPY 0x40
88#define PATTERN_OVERWRITE 0x20
89#define PATTERN_COUNT_MASK 0x1f
90
91enum dmatest_error_type {
92 DMATEST_ET_OK,
93 DMATEST_ET_MAP_SRC,
94 DMATEST_ET_MAP_DST,
95 DMATEST_ET_PREP,
96 DMATEST_ET_SUBMIT,
97 DMATEST_ET_TIMEOUT,
98 DMATEST_ET_DMA_ERROR,
99 DMATEST_ET_DMA_IN_PROGRESS,
100 DMATEST_ET_VERIFY,
101 DMATEST_ET_VERIFY_BUF,
102};
103
104struct dmatest_verify_buffer {
105 unsigned int index;
106 u8 expected;
107 u8 actual;
108};
109
110struct dmatest_verify_result {
111 unsigned int error_count;
112 struct dmatest_verify_buffer data[MAX_ERROR_COUNT];
113 u8 pattern;
114 bool is_srcbuf;
115};
116
117struct dmatest_thread_result {
118 struct list_head node;
119 unsigned int n;
120 unsigned int src_off;
121 unsigned int dst_off;
122 unsigned int len;
123 enum dmatest_error_type type;
124 union {
125 unsigned long data;
126 dma_cookie_t cookie;
127 enum dma_status status;
128 int error;
129 struct dmatest_verify_result *vr;
130 };
131};
132
133struct dmatest_result {
134 struct list_head node;
135 char *name;
136 struct list_head results;
137};
138
139struct dmatest_info;
140
141struct dmatest_thread {
142 struct list_head node;
143 struct dmatest_info *info;
144 struct task_struct *task;
145 struct dma_chan *chan;
146 u8 **srcs;
147 u8 **dsts;
148 enum dma_transaction_type type;
149 bool done;
150};
151 72
152struct dmatest_chan { 73static bool verbose;
153 struct list_head node; 74module_param(verbose, bool, S_IRUGO | S_IWUSR);
154 struct dma_chan *chan; 75MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)");
155 struct list_head threads;
156};
157 76
158/** 77/**
159 * struct dmatest_params - test parameters. 78 * struct dmatest_params - test parameters.
@@ -177,6 +96,7 @@ struct dmatest_params {
177 unsigned int xor_sources; 96 unsigned int xor_sources;
178 unsigned int pq_sources; 97 unsigned int pq_sources;
179 int timeout; 98 int timeout;
99 bool noverify;
180}; 100};
181 101
182/** 102/**
@@ -184,7 +104,7 @@ struct dmatest_params {
184 * @params: test parameters 104 * @params: test parameters
185 * @lock: access protection to the fields of this structure 105 * @lock: access protection to the fields of this structure
186 */ 106 */
187struct dmatest_info { 107static struct dmatest_info {
188 /* Test parameters */ 108 /* Test parameters */
189 struct dmatest_params params; 109 struct dmatest_params params;
190 110
@@ -192,16 +112,95 @@ struct dmatest_info {
192 struct list_head channels; 112 struct list_head channels;
193 unsigned int nr_channels; 113 unsigned int nr_channels;
194 struct mutex lock; 114 struct mutex lock;
115 bool did_init;
116} test_info = {
117 .channels = LIST_HEAD_INIT(test_info.channels),
118 .lock = __MUTEX_INITIALIZER(test_info.lock),
119};
120
121static int dmatest_run_set(const char *val, const struct kernel_param *kp);
122static int dmatest_run_get(char *val, const struct kernel_param *kp);
123static struct kernel_param_ops run_ops = {
124 .set = dmatest_run_set,
125 .get = dmatest_run_get,
126};
127static bool dmatest_run;
128module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR);
129MODULE_PARM_DESC(run, "Run the test (default: false)");
130
131/* Maximum amount of mismatched bytes in buffer to print */
132#define MAX_ERROR_COUNT 32
133
134/*
135 * Initialization patterns. All bytes in the source buffer has bit 7
136 * set, all bytes in the destination buffer has bit 7 cleared.
137 *
138 * Bit 6 is set for all bytes which are to be copied by the DMA
139 * engine. Bit 5 is set for all bytes which are to be overwritten by
140 * the DMA engine.
141 *
142 * The remaining bits are the inverse of a counter which increments by
143 * one for each byte address.
144 */
145#define PATTERN_SRC 0x80
146#define PATTERN_DST 0x00
147#define PATTERN_COPY 0x40
148#define PATTERN_OVERWRITE 0x20
149#define PATTERN_COUNT_MASK 0x1f
195 150
196 /* debugfs related stuff */ 151struct dmatest_thread {
197 struct dentry *root; 152 struct list_head node;
153 struct dmatest_info *info;
154 struct task_struct *task;
155 struct dma_chan *chan;
156 u8 **srcs;
157 u8 **dsts;
158 enum dma_transaction_type type;
159 bool done;
160};
198 161
199 /* Test results */ 162struct dmatest_chan {
200 struct list_head results; 163 struct list_head node;
201 struct mutex results_lock; 164 struct dma_chan *chan;
165 struct list_head threads;
202}; 166};
203 167
204static struct dmatest_info test_info; 168static DECLARE_WAIT_QUEUE_HEAD(thread_wait);
169static bool wait;
170
171static bool is_threaded_test_run(struct dmatest_info *info)
172{
173 struct dmatest_chan *dtc;
174
175 list_for_each_entry(dtc, &info->channels, node) {
176 struct dmatest_thread *thread;
177
178 list_for_each_entry(thread, &dtc->threads, node) {
179 if (!thread->done)
180 return true;
181 }
182 }
183
184 return false;
185}
186
187static int dmatest_wait_get(char *val, const struct kernel_param *kp)
188{
189 struct dmatest_info *info = &test_info;
190 struct dmatest_params *params = &info->params;
191
192 if (params->iterations)
193 wait_event(thread_wait, !is_threaded_test_run(info));
194 wait = true;
195 return param_get_bool(val, kp);
196}
197
198static struct kernel_param_ops wait_ops = {
199 .get = dmatest_wait_get,
200 .set = param_set_bool,
201};
202module_param_cb(wait, &wait_ops, &wait, S_IRUGO);
203MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)");
205 204
206static bool dmatest_match_channel(struct dmatest_params *params, 205static bool dmatest_match_channel(struct dmatest_params *params,
207 struct dma_chan *chan) 206 struct dma_chan *chan)
@@ -223,7 +222,7 @@ static unsigned long dmatest_random(void)
223{ 222{
224 unsigned long buf; 223 unsigned long buf;
225 224
226 get_random_bytes(&buf, sizeof(buf)); 225 prandom_bytes(&buf, sizeof(buf));
227 return buf; 226 return buf;
228} 227}
229 228
@@ -262,9 +261,31 @@ static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
262 } 261 }
263} 262}
264 263
265static unsigned int dmatest_verify(struct dmatest_verify_result *vr, u8 **bufs, 264static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
266 unsigned int start, unsigned int end, unsigned int counter, 265 unsigned int counter, bool is_srcbuf)
267 u8 pattern, bool is_srcbuf) 266{
267 u8 diff = actual ^ pattern;
268 u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
269 const char *thread_name = current->comm;
270
271 if (is_srcbuf)
272 pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
273 thread_name, index, expected, actual);
274 else if ((pattern & PATTERN_COPY)
275 && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
276 pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
277 thread_name, index, expected, actual);
278 else if (diff & PATTERN_SRC)
279 pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
280 thread_name, index, expected, actual);
281 else
282 pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
283 thread_name, index, expected, actual);
284}
285
286static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
287 unsigned int end, unsigned int counter, u8 pattern,
288 bool is_srcbuf)
268{ 289{
269 unsigned int i; 290 unsigned int i;
270 unsigned int error_count = 0; 291 unsigned int error_count = 0;
@@ -272,7 +293,6 @@ static unsigned int dmatest_verify(struct dmatest_verify_result *vr, u8 **bufs,
272 u8 expected; 293 u8 expected;
273 u8 *buf; 294 u8 *buf;
274 unsigned int counter_orig = counter; 295 unsigned int counter_orig = counter;
275 struct dmatest_verify_buffer *vb;
276 296
277 for (; (buf = *bufs); bufs++) { 297 for (; (buf = *bufs); bufs++) {
278 counter = counter_orig; 298 counter = counter_orig;
@@ -280,12 +300,9 @@ static unsigned int dmatest_verify(struct dmatest_verify_result *vr, u8 **bufs,
280 actual = buf[i]; 300 actual = buf[i];
281 expected = pattern | (~counter & PATTERN_COUNT_MASK); 301 expected = pattern | (~counter & PATTERN_COUNT_MASK);
282 if (actual != expected) { 302 if (actual != expected) {
283 if (error_count < MAX_ERROR_COUNT && vr) { 303 if (error_count < MAX_ERROR_COUNT)
284 vb = &vr->data[error_count]; 304 dmatest_mismatch(actual, pattern, i,
285 vb->index = i; 305 counter, is_srcbuf);
286 vb->expected = expected;
287 vb->actual = actual;
288 }
289 error_count++; 306 error_count++;
290 } 307 }
291 counter++; 308 counter++;
@@ -293,7 +310,7 @@ static unsigned int dmatest_verify(struct dmatest_verify_result *vr, u8 **bufs,
293 } 310 }
294 311
295 if (error_count > MAX_ERROR_COUNT) 312 if (error_count > MAX_ERROR_COUNT)
296 pr_warning("%s: %u errors suppressed\n", 313 pr_warn("%s: %u errors suppressed\n",
297 current->comm, error_count - MAX_ERROR_COUNT); 314 current->comm, error_count - MAX_ERROR_COUNT);
298 315
299 return error_count; 316 return error_count;
@@ -313,20 +330,6 @@ static void dmatest_callback(void *arg)
313 wake_up_all(done->wait); 330 wake_up_all(done->wait);
314} 331}
315 332
316static inline void unmap_src(struct device *dev, dma_addr_t *addr, size_t len,
317 unsigned int count)
318{
319 while (count--)
320 dma_unmap_single(dev, addr[count], len, DMA_TO_DEVICE);
321}
322
323static inline void unmap_dst(struct device *dev, dma_addr_t *addr, size_t len,
324 unsigned int count)
325{
326 while (count--)
327 dma_unmap_single(dev, addr[count], len, DMA_BIDIRECTIONAL);
328}
329
330static unsigned int min_odd(unsigned int x, unsigned int y) 333static unsigned int min_odd(unsigned int x, unsigned int y)
331{ 334{
332 unsigned int val = min(x, y); 335 unsigned int val = min(x, y);
@@ -334,172 +337,49 @@ static unsigned int min_odd(unsigned int x, unsigned int y)
334 return val % 2 ? val : val - 1; 337 return val % 2 ? val : val - 1;
335} 338}
336 339
337static char *verify_result_get_one(struct dmatest_verify_result *vr, 340static void result(const char *err, unsigned int n, unsigned int src_off,
338 unsigned int i) 341 unsigned int dst_off, unsigned int len, unsigned long data)
339{ 342{
340 struct dmatest_verify_buffer *vb = &vr->data[i]; 343 pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)",
341 u8 diff = vb->actual ^ vr->pattern; 344 current->comm, n, err, src_off, dst_off, len, data);
342 static char buf[512];
343 char *msg;
344
345 if (vr->is_srcbuf)
346 msg = "srcbuf overwritten!";
347 else if ((vr->pattern & PATTERN_COPY)
348 && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
349 msg = "dstbuf not copied!";
350 else if (diff & PATTERN_SRC)
351 msg = "dstbuf was copied!";
352 else
353 msg = "dstbuf mismatch!";
354
355 snprintf(buf, sizeof(buf) - 1, "%s [0x%x] Expected %02x, got %02x", msg,
356 vb->index, vb->expected, vb->actual);
357
358 return buf;
359} 345}
360 346
361static char *thread_result_get(const char *name, 347static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
362 struct dmatest_thread_result *tr) 348 unsigned int dst_off, unsigned int len,
349 unsigned long data)
363{ 350{
364 static const char * const messages[] = { 351 pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)",
365 [DMATEST_ET_OK] = "No errors", 352 current->comm, n, err, src_off, dst_off, len, data);
366 [DMATEST_ET_MAP_SRC] = "src mapping error",
367 [DMATEST_ET_MAP_DST] = "dst mapping error",
368 [DMATEST_ET_PREP] = "prep error",
369 [DMATEST_ET_SUBMIT] = "submit error",
370 [DMATEST_ET_TIMEOUT] = "test timed out",
371 [DMATEST_ET_DMA_ERROR] =
372 "got completion callback (DMA_ERROR)",
373 [DMATEST_ET_DMA_IN_PROGRESS] =
374 "got completion callback (DMA_IN_PROGRESS)",
375 [DMATEST_ET_VERIFY] = "errors",
376 [DMATEST_ET_VERIFY_BUF] = "verify errors",
377 };
378 static char buf[512];
379
380 snprintf(buf, sizeof(buf) - 1,
381 "%s: #%u: %s with src_off=0x%x ""dst_off=0x%x len=0x%x (%lu)",
382 name, tr->n, messages[tr->type], tr->src_off, tr->dst_off,
383 tr->len, tr->data);
384
385 return buf;
386} 353}
387 354
388static int thread_result_add(struct dmatest_info *info, 355#define verbose_result(err, n, src_off, dst_off, len, data) ({ \
389 struct dmatest_result *r, enum dmatest_error_type type, 356 if (verbose) \
390 unsigned int n, unsigned int src_off, unsigned int dst_off, 357 result(err, n, src_off, dst_off, len, data); \
391 unsigned int len, unsigned long data) 358 else \
392{ 359 dbg_result(err, n, src_off, dst_off, len, data); \
393 struct dmatest_thread_result *tr; 360})
394
395 tr = kzalloc(sizeof(*tr), GFP_KERNEL);
396 if (!tr)
397 return -ENOMEM;
398
399 tr->type = type;
400 tr->n = n;
401 tr->src_off = src_off;
402 tr->dst_off = dst_off;
403 tr->len = len;
404 tr->data = data;
405 361
406 mutex_lock(&info->results_lock); 362static unsigned long long dmatest_persec(s64 runtime, unsigned int val)
407 list_add_tail(&tr->node, &r->results);
408 mutex_unlock(&info->results_lock);
409
410 if (tr->type == DMATEST_ET_OK)
411 pr_debug("%s\n", thread_result_get(r->name, tr));
412 else
413 pr_warn("%s\n", thread_result_get(r->name, tr));
414
415 return 0;
416}
417
418static unsigned int verify_result_add(struct dmatest_info *info,
419 struct dmatest_result *r, unsigned int n,
420 unsigned int src_off, unsigned int dst_off, unsigned int len,
421 u8 **bufs, int whence, unsigned int counter, u8 pattern,
422 bool is_srcbuf)
423{ 363{
424 struct dmatest_verify_result *vr; 364 unsigned long long per_sec = 1000000;
425 unsigned int error_count;
426 unsigned int buf_off = is_srcbuf ? src_off : dst_off;
427 unsigned int start, end;
428
429 if (whence < 0) {
430 start = 0;
431 end = buf_off;
432 } else if (whence > 0) {
433 start = buf_off + len;
434 end = info->params.buf_size;
435 } else {
436 start = buf_off;
437 end = buf_off + len;
438 }
439 365
440 vr = kmalloc(sizeof(*vr), GFP_KERNEL); 366 if (runtime <= 0)
441 if (!vr) { 367 return 0;
442 pr_warn("dmatest: No memory to store verify result\n");
443 return dmatest_verify(NULL, bufs, start, end, counter, pattern,
444 is_srcbuf);
445 }
446
447 vr->pattern = pattern;
448 vr->is_srcbuf = is_srcbuf;
449
450 error_count = dmatest_verify(vr, bufs, start, end, counter, pattern,
451 is_srcbuf);
452 if (error_count) {
453 vr->error_count = error_count;
454 thread_result_add(info, r, DMATEST_ET_VERIFY_BUF, n, src_off,
455 dst_off, len, (unsigned long)vr);
456 return error_count;
457 }
458
459 kfree(vr);
460 return 0;
461}
462
463static void result_free(struct dmatest_info *info, const char *name)
464{
465 struct dmatest_result *r, *_r;
466
467 mutex_lock(&info->results_lock);
468 list_for_each_entry_safe(r, _r, &info->results, node) {
469 struct dmatest_thread_result *tr, *_tr;
470
471 if (name && strcmp(r->name, name))
472 continue;
473
474 list_for_each_entry_safe(tr, _tr, &r->results, node) {
475 if (tr->type == DMATEST_ET_VERIFY_BUF)
476 kfree(tr->vr);
477 list_del(&tr->node);
478 kfree(tr);
479 }
480 368
481 kfree(r->name); 369 /* drop precision until runtime is 32-bits */
482 list_del(&r->node); 370 while (runtime > UINT_MAX) {
483 kfree(r); 371 runtime >>= 1;
372 per_sec <<= 1;
484 } 373 }
485 374
486 mutex_unlock(&info->results_lock); 375 per_sec *= val;
376 do_div(per_sec, runtime);
377 return per_sec;
487} 378}
488 379
489static struct dmatest_result *result_init(struct dmatest_info *info, 380static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
490 const char *name)
491{ 381{
492 struct dmatest_result *r; 382 return dmatest_persec(runtime, len >> 10);
493
494 r = kzalloc(sizeof(*r), GFP_KERNEL);
495 if (r) {
496 r->name = kstrdup(name, GFP_KERNEL);
497 INIT_LIST_HEAD(&r->results);
498 mutex_lock(&info->results_lock);
499 list_add_tail(&r->node, &info->results);
500 mutex_unlock(&info->results_lock);
501 }
502 return r;
503} 383}
504 384
505/* 385/*
@@ -525,7 +405,6 @@ static int dmatest_func(void *data)
525 struct dmatest_params *params; 405 struct dmatest_params *params;
526 struct dma_chan *chan; 406 struct dma_chan *chan;
527 struct dma_device *dev; 407 struct dma_device *dev;
528 const char *thread_name;
529 unsigned int src_off, dst_off, len; 408 unsigned int src_off, dst_off, len;
530 unsigned int error_count; 409 unsigned int error_count;
531 unsigned int failed_tests = 0; 410 unsigned int failed_tests = 0;
@@ -538,9 +417,10 @@ static int dmatest_func(void *data)
538 int src_cnt; 417 int src_cnt;
539 int dst_cnt; 418 int dst_cnt;
540 int i; 419 int i;
541 struct dmatest_result *result; 420 ktime_t ktime;
421 s64 runtime = 0;
422 unsigned long long total_len = 0;
542 423
543 thread_name = current->comm;
544 set_freezable(); 424 set_freezable();
545 425
546 ret = -ENOMEM; 426 ret = -ENOMEM;
@@ -570,10 +450,6 @@ static int dmatest_func(void *data)
570 } else 450 } else
571 goto err_thread_type; 451 goto err_thread_type;
572 452
573 result = result_init(info, thread_name);
574 if (!result)
575 goto err_srcs;
576
577 thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL); 453 thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
578 if (!thread->srcs) 454 if (!thread->srcs)
579 goto err_srcs; 455 goto err_srcs;
@@ -597,17 +473,17 @@ static int dmatest_func(void *data)
597 set_user_nice(current, 10); 473 set_user_nice(current, 10);
598 474
599 /* 475 /*
600 * src buffers are freed by the DMAEngine code with dma_unmap_single() 476 * src and dst buffers are freed by ourselves below
601 * dst buffers are freed by ourselves below
602 */ 477 */
603 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT 478 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
604 | DMA_COMPL_SKIP_DEST_UNMAP | DMA_COMPL_SRC_UNMAP_SINGLE;
605 479
480 ktime = ktime_get();
606 while (!kthread_should_stop() 481 while (!kthread_should_stop()
607 && !(params->iterations && total_tests >= params->iterations)) { 482 && !(params->iterations && total_tests >= params->iterations)) {
608 struct dma_async_tx_descriptor *tx = NULL; 483 struct dma_async_tx_descriptor *tx = NULL;
609 dma_addr_t dma_srcs[src_cnt]; 484 struct dmaengine_unmap_data *um;
610 dma_addr_t dma_dsts[dst_cnt]; 485 dma_addr_t srcs[src_cnt];
486 dma_addr_t *dsts;
611 u8 align = 0; 487 u8 align = 0;
612 488
613 total_tests++; 489 total_tests++;
@@ -626,81 +502,103 @@ static int dmatest_func(void *data)
626 break; 502 break;
627 } 503 }
628 504
629 len = dmatest_random() % params->buf_size + 1; 505 if (params->noverify) {
506 len = params->buf_size;
507 src_off = 0;
508 dst_off = 0;
509 } else {
510 len = dmatest_random() % params->buf_size + 1;
511 len = (len >> align) << align;
512 if (!len)
513 len = 1 << align;
514 src_off = dmatest_random() % (params->buf_size - len + 1);
515 dst_off = dmatest_random() % (params->buf_size - len + 1);
516
517 src_off = (src_off >> align) << align;
518 dst_off = (dst_off >> align) << align;
519
520 dmatest_init_srcs(thread->srcs, src_off, len,
521 params->buf_size);
522 dmatest_init_dsts(thread->dsts, dst_off, len,
523 params->buf_size);
524 }
525
630 len = (len >> align) << align; 526 len = (len >> align) << align;
631 if (!len) 527 if (!len)
632 len = 1 << align; 528 len = 1 << align;
633 src_off = dmatest_random() % (params->buf_size - len + 1); 529 total_len += len;
634 dst_off = dmatest_random() % (params->buf_size - len + 1);
635 530
636 src_off = (src_off >> align) << align; 531 um = dmaengine_get_unmap_data(dev->dev, src_cnt+dst_cnt,
637 dst_off = (dst_off >> align) << align; 532 GFP_KERNEL);
638 533 if (!um) {
639 dmatest_init_srcs(thread->srcs, src_off, len, params->buf_size); 534 failed_tests++;
640 dmatest_init_dsts(thread->dsts, dst_off, len, params->buf_size); 535 result("unmap data NULL", total_tests,
536 src_off, dst_off, len, ret);
537 continue;
538 }
641 539
540 um->len = params->buf_size;
642 for (i = 0; i < src_cnt; i++) { 541 for (i = 0; i < src_cnt; i++) {
643 u8 *buf = thread->srcs[i] + src_off; 542 unsigned long buf = (unsigned long) thread->srcs[i];
644 543 struct page *pg = virt_to_page(buf);
645 dma_srcs[i] = dma_map_single(dev->dev, buf, len, 544 unsigned pg_off = buf & ~PAGE_MASK;
646 DMA_TO_DEVICE); 545
647 ret = dma_mapping_error(dev->dev, dma_srcs[i]); 546 um->addr[i] = dma_map_page(dev->dev, pg, pg_off,
547 um->len, DMA_TO_DEVICE);
548 srcs[i] = um->addr[i] + src_off;
549 ret = dma_mapping_error(dev->dev, um->addr[i]);
648 if (ret) { 550 if (ret) {
649 unmap_src(dev->dev, dma_srcs, len, i); 551 dmaengine_unmap_put(um);
650 thread_result_add(info, result, 552 result("src mapping error", total_tests,
651 DMATEST_ET_MAP_SRC, 553 src_off, dst_off, len, ret);
652 total_tests, src_off, dst_off,
653 len, ret);
654 failed_tests++; 554 failed_tests++;
655 continue; 555 continue;
656 } 556 }
557 um->to_cnt++;
657 } 558 }
658 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */ 559 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
560 dsts = &um->addr[src_cnt];
659 for (i = 0; i < dst_cnt; i++) { 561 for (i = 0; i < dst_cnt; i++) {
660 dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i], 562 unsigned long buf = (unsigned long) thread->dsts[i];
661 params->buf_size, 563 struct page *pg = virt_to_page(buf);
662 DMA_BIDIRECTIONAL); 564 unsigned pg_off = buf & ~PAGE_MASK;
663 ret = dma_mapping_error(dev->dev, dma_dsts[i]); 565
566 dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len,
567 DMA_BIDIRECTIONAL);
568 ret = dma_mapping_error(dev->dev, dsts[i]);
664 if (ret) { 569 if (ret) {
665 unmap_src(dev->dev, dma_srcs, len, src_cnt); 570 dmaengine_unmap_put(um);
666 unmap_dst(dev->dev, dma_dsts, params->buf_size, 571 result("dst mapping error", total_tests,
667 i); 572 src_off, dst_off, len, ret);
668 thread_result_add(info, result,
669 DMATEST_ET_MAP_DST,
670 total_tests, src_off, dst_off,
671 len, ret);
672 failed_tests++; 573 failed_tests++;
673 continue; 574 continue;
674 } 575 }
576 um->bidi_cnt++;
675 } 577 }
676 578
677 if (thread->type == DMA_MEMCPY) 579 if (thread->type == DMA_MEMCPY)
678 tx = dev->device_prep_dma_memcpy(chan, 580 tx = dev->device_prep_dma_memcpy(chan,
679 dma_dsts[0] + dst_off, 581 dsts[0] + dst_off,
680 dma_srcs[0], len, 582 srcs[0], len, flags);
681 flags);
682 else if (thread->type == DMA_XOR) 583 else if (thread->type == DMA_XOR)
683 tx = dev->device_prep_dma_xor(chan, 584 tx = dev->device_prep_dma_xor(chan,
684 dma_dsts[0] + dst_off, 585 dsts[0] + dst_off,
685 dma_srcs, src_cnt, 586 srcs, src_cnt,
686 len, flags); 587 len, flags);
687 else if (thread->type == DMA_PQ) { 588 else if (thread->type == DMA_PQ) {
688 dma_addr_t dma_pq[dst_cnt]; 589 dma_addr_t dma_pq[dst_cnt];
689 590
690 for (i = 0; i < dst_cnt; i++) 591 for (i = 0; i < dst_cnt; i++)
691 dma_pq[i] = dma_dsts[i] + dst_off; 592 dma_pq[i] = dsts[i] + dst_off;
692 tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs, 593 tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
693 src_cnt, pq_coefs, 594 src_cnt, pq_coefs,
694 len, flags); 595 len, flags);
695 } 596 }
696 597
697 if (!tx) { 598 if (!tx) {
698 unmap_src(dev->dev, dma_srcs, len, src_cnt); 599 dmaengine_unmap_put(um);
699 unmap_dst(dev->dev, dma_dsts, params->buf_size, 600 result("prep error", total_tests, src_off,
700 dst_cnt); 601 dst_off, len, ret);
701 thread_result_add(info, result, DMATEST_ET_PREP,
702 total_tests, src_off, dst_off,
703 len, 0);
704 msleep(100); 602 msleep(100);
705 failed_tests++; 603 failed_tests++;
706 continue; 604 continue;
@@ -712,9 +610,9 @@ static int dmatest_func(void *data)
712 cookie = tx->tx_submit(tx); 610 cookie = tx->tx_submit(tx);
713 611
714 if (dma_submit_error(cookie)) { 612 if (dma_submit_error(cookie)) {
715 thread_result_add(info, result, DMATEST_ET_SUBMIT, 613 dmaengine_unmap_put(um);
716 total_tests, src_off, dst_off, 614 result("submit error", total_tests, src_off,
717 len, cookie); 615 dst_off, len, ret);
718 msleep(100); 616 msleep(100);
719 failed_tests++; 617 failed_tests++;
720 continue; 618 continue;
@@ -735,59 +633,59 @@ static int dmatest_func(void *data)
735 * free it this time?" dancing. For now, just 633 * free it this time?" dancing. For now, just
736 * leave it dangling. 634 * leave it dangling.
737 */ 635 */
738 thread_result_add(info, result, DMATEST_ET_TIMEOUT, 636 dmaengine_unmap_put(um);
739 total_tests, src_off, dst_off, 637 result("test timed out", total_tests, src_off, dst_off,
740 len, 0); 638 len, 0);
741 failed_tests++; 639 failed_tests++;
742 continue; 640 continue;
743 } else if (status != DMA_SUCCESS) { 641 } else if (status != DMA_COMPLETE) {
744 enum dmatest_error_type type = (status == DMA_ERROR) ? 642 dmaengine_unmap_put(um);
745 DMATEST_ET_DMA_ERROR : DMATEST_ET_DMA_IN_PROGRESS; 643 result(status == DMA_ERROR ?
746 thread_result_add(info, result, type, 644 "completion error status" :
747 total_tests, src_off, dst_off, 645 "completion busy status", total_tests, src_off,
748 len, status); 646 dst_off, len, ret);
749 failed_tests++; 647 failed_tests++;
750 continue; 648 continue;
751 } 649 }
752 650
753 /* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */ 651 dmaengine_unmap_put(um);
754 unmap_dst(dev->dev, dma_dsts, params->buf_size, dst_cnt);
755 652
756 error_count = 0; 653 if (params->noverify) {
654 verbose_result("test passed", total_tests, src_off,
655 dst_off, len, 0);
656 continue;
657 }
757 658
758 pr_debug("%s: verifying source buffer...\n", thread_name); 659 pr_debug("%s: verifying source buffer...\n", current->comm);
759 error_count += verify_result_add(info, result, total_tests, 660 error_count = dmatest_verify(thread->srcs, 0, src_off,
760 src_off, dst_off, len, thread->srcs, -1,
761 0, PATTERN_SRC, true); 661 0, PATTERN_SRC, true);
762 error_count += verify_result_add(info, result, total_tests, 662 error_count += dmatest_verify(thread->srcs, src_off,
763 src_off, dst_off, len, thread->srcs, 0, 663 src_off + len, src_off,
764 src_off, PATTERN_SRC | PATTERN_COPY, true); 664 PATTERN_SRC | PATTERN_COPY, true);
765 error_count += verify_result_add(info, result, total_tests, 665 error_count += dmatest_verify(thread->srcs, src_off + len,
766 src_off, dst_off, len, thread->srcs, 1, 666 params->buf_size, src_off + len,
767 src_off + len, PATTERN_SRC, true); 667 PATTERN_SRC, true);
768 668
769 pr_debug("%s: verifying dest buffer...\n", thread_name); 669 pr_debug("%s: verifying dest buffer...\n", current->comm);
770 error_count += verify_result_add(info, result, total_tests, 670 error_count += dmatest_verify(thread->dsts, 0, dst_off,
771 src_off, dst_off, len, thread->dsts, -1,
772 0, PATTERN_DST, false); 671 0, PATTERN_DST, false);
773 error_count += verify_result_add(info, result, total_tests, 672 error_count += dmatest_verify(thread->dsts, dst_off,
774 src_off, dst_off, len, thread->dsts, 0, 673 dst_off + len, src_off,
775 src_off, PATTERN_SRC | PATTERN_COPY, false); 674 PATTERN_SRC | PATTERN_COPY, false);
776 error_count += verify_result_add(info, result, total_tests, 675 error_count += dmatest_verify(thread->dsts, dst_off + len,
777 src_off, dst_off, len, thread->dsts, 1, 676 params->buf_size, dst_off + len,
778 dst_off + len, PATTERN_DST, false); 677 PATTERN_DST, false);
779 678
780 if (error_count) { 679 if (error_count) {
781 thread_result_add(info, result, DMATEST_ET_VERIFY, 680 result("data error", total_tests, src_off, dst_off,
782 total_tests, src_off, dst_off, 681 len, error_count);
783 len, error_count);
784 failed_tests++; 682 failed_tests++;
785 } else { 683 } else {
786 thread_result_add(info, result, DMATEST_ET_OK, 684 verbose_result("test passed", total_tests, src_off,
787 total_tests, src_off, dst_off, 685 dst_off, len, 0);
788 len, 0);
789 } 686 }
790 } 687 }
688 runtime = ktime_us_delta(ktime_get(), ktime);
791 689
792 ret = 0; 690 ret = 0;
793 for (i = 0; thread->dsts[i]; i++) 691 for (i = 0; thread->dsts[i]; i++)
@@ -802,20 +700,17 @@ err_srcbuf:
802err_srcs: 700err_srcs:
803 kfree(pq_coefs); 701 kfree(pq_coefs);
804err_thread_type: 702err_thread_type:
805 pr_notice("%s: terminating after %u tests, %u failures (status %d)\n", 703 pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n",
806 thread_name, total_tests, failed_tests, ret); 704 current->comm, total_tests, failed_tests,
705 dmatest_persec(runtime, total_tests),
706 dmatest_KBs(runtime, total_len), ret);
807 707
808 /* terminate all transfers on specified channels */ 708 /* terminate all transfers on specified channels */
809 if (ret) 709 if (ret)
810 dmaengine_terminate_all(chan); 710 dmaengine_terminate_all(chan);
811 711
812 thread->done = true; 712 thread->done = true;
813 713 wake_up(&thread_wait);
814 if (params->iterations > 0)
815 while (!kthread_should_stop()) {
816 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit);
817 interruptible_sleep_on(&wait_dmatest_exit);
818 }
819 714
820 return ret; 715 return ret;
821} 716}
@@ -828,9 +723,10 @@ static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
828 723
829 list_for_each_entry_safe(thread, _thread, &dtc->threads, node) { 724 list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
830 ret = kthread_stop(thread->task); 725 ret = kthread_stop(thread->task);
831 pr_debug("dmatest: thread %s exited with status %d\n", 726 pr_debug("thread %s exited with status %d\n",
832 thread->task->comm, ret); 727 thread->task->comm, ret);
833 list_del(&thread->node); 728 list_del(&thread->node);
729 put_task_struct(thread->task);
834 kfree(thread); 730 kfree(thread);
835 } 731 }
836 732
@@ -861,27 +757,27 @@ static int dmatest_add_threads(struct dmatest_info *info,
861 for (i = 0; i < params->threads_per_chan; i++) { 757 for (i = 0; i < params->threads_per_chan; i++) {
862 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL); 758 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
863 if (!thread) { 759 if (!thread) {
864 pr_warning("dmatest: No memory for %s-%s%u\n", 760 pr_warn("No memory for %s-%s%u\n",
865 dma_chan_name(chan), op, i); 761 dma_chan_name(chan), op, i);
866
867 break; 762 break;
868 } 763 }
869 thread->info = info; 764 thread->info = info;
870 thread->chan = dtc->chan; 765 thread->chan = dtc->chan;
871 thread->type = type; 766 thread->type = type;
872 smp_wmb(); 767 smp_wmb();
873 thread->task = kthread_run(dmatest_func, thread, "%s-%s%u", 768 thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
874 dma_chan_name(chan), op, i); 769 dma_chan_name(chan), op, i);
875 if (IS_ERR(thread->task)) { 770 if (IS_ERR(thread->task)) {
876 pr_warning("dmatest: Failed to run thread %s-%s%u\n", 771 pr_warn("Failed to create thread %s-%s%u\n",
877 dma_chan_name(chan), op, i); 772 dma_chan_name(chan), op, i);
878 kfree(thread); 773 kfree(thread);
879 break; 774 break;
880 } 775 }
881 776
882 /* srcbuf and dstbuf are allocated by the thread itself */ 777 /* srcbuf and dstbuf are allocated by the thread itself */
883 778 get_task_struct(thread->task);
884 list_add_tail(&thread->node, &dtc->threads); 779 list_add_tail(&thread->node, &dtc->threads);
780 wake_up_process(thread->task);
885 } 781 }
886 782
887 return i; 783 return i;
@@ -897,7 +793,7 @@ static int dmatest_add_channel(struct dmatest_info *info,
897 793
898 dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL); 794 dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
899 if (!dtc) { 795 if (!dtc) {
900 pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan)); 796 pr_warn("No memory for %s\n", dma_chan_name(chan));
901 return -ENOMEM; 797 return -ENOMEM;
902 } 798 }
903 799
@@ -917,7 +813,7 @@ static int dmatest_add_channel(struct dmatest_info *info,
917 thread_count += cnt > 0 ? cnt : 0; 813 thread_count += cnt > 0 ? cnt : 0;
918 } 814 }
919 815
920 pr_info("dmatest: Started %u threads using %s\n", 816 pr_info("Started %u threads using %s\n",
921 thread_count, dma_chan_name(chan)); 817 thread_count, dma_chan_name(chan));
922 818
923 list_add_tail(&dtc->node, &info->channels); 819 list_add_tail(&dtc->node, &info->channels);
@@ -937,20 +833,20 @@ static bool filter(struct dma_chan *chan, void *param)
937 return true; 833 return true;
938} 834}
939 835
940static int __run_threaded_test(struct dmatest_info *info) 836static void request_channels(struct dmatest_info *info,
837 enum dma_transaction_type type)
941{ 838{
942 dma_cap_mask_t mask; 839 dma_cap_mask_t mask;
943 struct dma_chan *chan;
944 struct dmatest_params *params = &info->params;
945 int err = 0;
946 840
947 dma_cap_zero(mask); 841 dma_cap_zero(mask);
948 dma_cap_set(DMA_MEMCPY, mask); 842 dma_cap_set(type, mask);
949 for (;;) { 843 for (;;) {
844 struct dmatest_params *params = &info->params;
845 struct dma_chan *chan;
846
950 chan = dma_request_channel(mask, filter, params); 847 chan = dma_request_channel(mask, filter, params);
951 if (chan) { 848 if (chan) {
952 err = dmatest_add_channel(info, chan); 849 if (dmatest_add_channel(info, chan)) {
953 if (err) {
954 dma_release_channel(chan); 850 dma_release_channel(chan);
955 break; /* add_channel failed, punt */ 851 break; /* add_channel failed, punt */
956 } 852 }
@@ -960,22 +856,30 @@ static int __run_threaded_test(struct dmatest_info *info)
960 info->nr_channels >= params->max_channels) 856 info->nr_channels >= params->max_channels)
961 break; /* we have all we need */ 857 break; /* we have all we need */
962 } 858 }
963 return err;
964} 859}
965 860
966#ifndef MODULE 861static void run_threaded_test(struct dmatest_info *info)
967static int run_threaded_test(struct dmatest_info *info)
968{ 862{
969 int ret; 863 struct dmatest_params *params = &info->params;
970 864
971 mutex_lock(&info->lock); 865 /* Copy test parameters */
972 ret = __run_threaded_test(info); 866 params->buf_size = test_buf_size;
973 mutex_unlock(&info->lock); 867 strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
974 return ret; 868 strlcpy(params->device, strim(test_device), sizeof(params->device));
869 params->threads_per_chan = threads_per_chan;
870 params->max_channels = max_channels;
871 params->iterations = iterations;
872 params->xor_sources = xor_sources;
873 params->pq_sources = pq_sources;
874 params->timeout = timeout;
875 params->noverify = noverify;
876
877 request_channels(info, DMA_MEMCPY);
878 request_channels(info, DMA_XOR);
879 request_channels(info, DMA_PQ);
975} 880}
976#endif
977 881
978static void __stop_threaded_test(struct dmatest_info *info) 882static void stop_threaded_test(struct dmatest_info *info)
979{ 883{
980 struct dmatest_chan *dtc, *_dtc; 884 struct dmatest_chan *dtc, *_dtc;
981 struct dma_chan *chan; 885 struct dma_chan *chan;
@@ -984,203 +888,86 @@ static void __stop_threaded_test(struct dmatest_info *info)
984 list_del(&dtc->node); 888 list_del(&dtc->node);
985 chan = dtc->chan; 889 chan = dtc->chan;
986 dmatest_cleanup_channel(dtc); 890 dmatest_cleanup_channel(dtc);
987 pr_debug("dmatest: dropped channel %s\n", dma_chan_name(chan)); 891 pr_debug("dropped channel %s\n", dma_chan_name(chan));
988 dma_release_channel(chan); 892 dma_release_channel(chan);
989 } 893 }
990 894
991 info->nr_channels = 0; 895 info->nr_channels = 0;
992} 896}
993 897
994static void stop_threaded_test(struct dmatest_info *info) 898static void restart_threaded_test(struct dmatest_info *info, bool run)
995{ 899{
996 mutex_lock(&info->lock); 900 /* we might be called early to set run=, defer running until all
997 __stop_threaded_test(info); 901 * parameters have been evaluated
998 mutex_unlock(&info->lock); 902 */
999} 903 if (!info->did_init)
1000 904 return;
1001static int __restart_threaded_test(struct dmatest_info *info, bool run)
1002{
1003 struct dmatest_params *params = &info->params;
1004 905
1005 /* Stop any running test first */ 906 /* Stop any running test first */
1006 __stop_threaded_test(info); 907 stop_threaded_test(info);
1007
1008 if (run == false)
1009 return 0;
1010
1011 /* Clear results from previous run */
1012 result_free(info, NULL);
1013
1014 /* Copy test parameters */
1015 params->buf_size = test_buf_size;
1016 strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
1017 strlcpy(params->device, strim(test_device), sizeof(params->device));
1018 params->threads_per_chan = threads_per_chan;
1019 params->max_channels = max_channels;
1020 params->iterations = iterations;
1021 params->xor_sources = xor_sources;
1022 params->pq_sources = pq_sources;
1023 params->timeout = timeout;
1024 908
1025 /* Run test with new parameters */ 909 /* Run test with new parameters */
1026 return __run_threaded_test(info); 910 run_threaded_test(info);
1027}
1028
1029static bool __is_threaded_test_run(struct dmatest_info *info)
1030{
1031 struct dmatest_chan *dtc;
1032
1033 list_for_each_entry(dtc, &info->channels, node) {
1034 struct dmatest_thread *thread;
1035
1036 list_for_each_entry(thread, &dtc->threads, node) {
1037 if (!thread->done)
1038 return true;
1039 }
1040 }
1041
1042 return false;
1043} 911}
1044 912
1045static ssize_t dtf_read_run(struct file *file, char __user *user_buf, 913static int dmatest_run_get(char *val, const struct kernel_param *kp)
1046 size_t count, loff_t *ppos)
1047{ 914{
1048 struct dmatest_info *info = file->private_data; 915 struct dmatest_info *info = &test_info;
1049 char buf[3];
1050 916
1051 mutex_lock(&info->lock); 917 mutex_lock(&info->lock);
1052 918 if (is_threaded_test_run(info)) {
1053 if (__is_threaded_test_run(info)) { 919 dmatest_run = true;
1054 buf[0] = 'Y';
1055 } else { 920 } else {
1056 __stop_threaded_test(info); 921 stop_threaded_test(info);
1057 buf[0] = 'N'; 922 dmatest_run = false;
1058 } 923 }
1059
1060 mutex_unlock(&info->lock); 924 mutex_unlock(&info->lock);
1061 buf[1] = '\n';
1062 buf[2] = 0x00;
1063 return simple_read_from_buffer(user_buf, count, ppos, buf, 2);
1064}
1065
1066static ssize_t dtf_write_run(struct file *file, const char __user *user_buf,
1067 size_t count, loff_t *ppos)
1068{
1069 struct dmatest_info *info = file->private_data;
1070 char buf[16];
1071 bool bv;
1072 int ret = 0;
1073 925
1074 if (copy_from_user(buf, user_buf, min(count, (sizeof(buf) - 1)))) 926 return param_get_bool(val, kp);
1075 return -EFAULT;
1076
1077 if (strtobool(buf, &bv) == 0) {
1078 mutex_lock(&info->lock);
1079
1080 if (__is_threaded_test_run(info))
1081 ret = -EBUSY;
1082 else
1083 ret = __restart_threaded_test(info, bv);
1084
1085 mutex_unlock(&info->lock);
1086 }
1087
1088 return ret ? ret : count;
1089} 927}
1090 928
1091static const struct file_operations dtf_run_fops = { 929static int dmatest_run_set(const char *val, const struct kernel_param *kp)
1092 .read = dtf_read_run,
1093 .write = dtf_write_run,
1094 .open = simple_open,
1095 .llseek = default_llseek,
1096};
1097
1098static int dtf_results_show(struct seq_file *sf, void *data)
1099{ 930{
1100 struct dmatest_info *info = sf->private; 931 struct dmatest_info *info = &test_info;
1101 struct dmatest_result *result; 932 int ret;
1102 struct dmatest_thread_result *tr;
1103 unsigned int i;
1104 933
1105 mutex_lock(&info->results_lock); 934 mutex_lock(&info->lock);
1106 list_for_each_entry(result, &info->results, node) { 935 ret = param_set_bool(val, kp);
1107 list_for_each_entry(tr, &result->results, node) { 936 if (ret) {
1108 seq_printf(sf, "%s\n", 937 mutex_unlock(&info->lock);
1109 thread_result_get(result->name, tr)); 938 return ret;
1110 if (tr->type == DMATEST_ET_VERIFY_BUF) {
1111 for (i = 0; i < tr->vr->error_count; i++) {
1112 seq_printf(sf, "\t%s\n",
1113 verify_result_get_one(tr->vr, i));
1114 }
1115 }
1116 }
1117 } 939 }
1118 940
1119 mutex_unlock(&info->results_lock); 941 if (is_threaded_test_run(info))
1120 return 0; 942 ret = -EBUSY;
1121} 943 else if (dmatest_run)
1122 944 restart_threaded_test(info, dmatest_run);
1123static int dtf_results_open(struct inode *inode, struct file *file)
1124{
1125 return single_open(file, dtf_results_show, inode->i_private);
1126}
1127
1128static const struct file_operations dtf_results_fops = {
1129 .open = dtf_results_open,
1130 .read = seq_read,
1131 .llseek = seq_lseek,
1132 .release = single_release,
1133};
1134
1135static int dmatest_register_dbgfs(struct dmatest_info *info)
1136{
1137 struct dentry *d;
1138
1139 d = debugfs_create_dir("dmatest", NULL);
1140 if (IS_ERR(d))
1141 return PTR_ERR(d);
1142 if (!d)
1143 goto err_root;
1144 945
1145 info->root = d; 946 mutex_unlock(&info->lock);
1146
1147 /* Run or stop threaded test */
1148 debugfs_create_file("run", S_IWUSR | S_IRUGO, info->root, info,
1149 &dtf_run_fops);
1150
1151 /* Results of test in progress */
1152 debugfs_create_file("results", S_IRUGO, info->root, info,
1153 &dtf_results_fops);
1154
1155 return 0;
1156 947
1157err_root: 948 return ret;
1158 pr_err("dmatest: Failed to initialize debugfs\n");
1159 return -ENOMEM;
1160} 949}
1161 950
1162static int __init dmatest_init(void) 951static int __init dmatest_init(void)
1163{ 952{
1164 struct dmatest_info *info = &test_info; 953 struct dmatest_info *info = &test_info;
1165 int ret; 954 struct dmatest_params *params = &info->params;
1166
1167 memset(info, 0, sizeof(*info));
1168 955
1169 mutex_init(&info->lock); 956 if (dmatest_run) {
1170 INIT_LIST_HEAD(&info->channels); 957 mutex_lock(&info->lock);
958 run_threaded_test(info);
959 mutex_unlock(&info->lock);
960 }
1171 961
1172 mutex_init(&info->results_lock); 962 if (params->iterations && wait)
1173 INIT_LIST_HEAD(&info->results); 963 wait_event(thread_wait, !is_threaded_test_run(info));
1174 964
1175 ret = dmatest_register_dbgfs(info); 965 /* module parameters are stable, inittime tests are started,
1176 if (ret) 966 * let userspace take over 'run' control
1177 return ret; 967 */
968 info->did_init = true;
1178 969
1179#ifdef MODULE
1180 return 0; 970 return 0;
1181#else
1182 return run_threaded_test(info);
1183#endif
1184} 971}
1185/* when compiled-in wait for drivers to load first */ 972/* when compiled-in wait for drivers to load first */
1186late_initcall(dmatest_init); 973late_initcall(dmatest_init);
@@ -1189,9 +976,9 @@ static void __exit dmatest_exit(void)
1189{ 976{
1190 struct dmatest_info *info = &test_info; 977 struct dmatest_info *info = &test_info;
1191 978
1192 debugfs_remove_recursive(info->root); 979 mutex_lock(&info->lock);
1193 stop_threaded_test(info); 980 stop_threaded_test(info);
1194 result_free(info, NULL); 981 mutex_unlock(&info->lock);
1195} 982}
1196module_exit(dmatest_exit); 983module_exit(dmatest_exit);
1197 984
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index 89eb89f22284..7516be4677cf 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -85,10 +85,6 @@ static struct device *chan2dev(struct dma_chan *chan)
85{ 85{
86 return &chan->dev->device; 86 return &chan->dev->device;
87} 87}
88static struct device *chan2parent(struct dma_chan *chan)
89{
90 return chan->dev->device.parent;
91}
92 88
93static struct dw_desc *dwc_first_active(struct dw_dma_chan *dwc) 89static struct dw_desc *dwc_first_active(struct dw_dma_chan *dwc)
94{ 90{
@@ -311,26 +307,7 @@ dwc_descriptor_complete(struct dw_dma_chan *dwc, struct dw_desc *desc,
311 list_splice_init(&desc->tx_list, &dwc->free_list); 307 list_splice_init(&desc->tx_list, &dwc->free_list);
312 list_move(&desc->desc_node, &dwc->free_list); 308 list_move(&desc->desc_node, &dwc->free_list);
313 309
314 if (!is_slave_direction(dwc->direction)) { 310 dma_descriptor_unmap(txd);
315 struct device *parent = chan2parent(&dwc->chan);
316 if (!(txd->flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
317 if (txd->flags & DMA_COMPL_DEST_UNMAP_SINGLE)
318 dma_unmap_single(parent, desc->lli.dar,
319 desc->total_len, DMA_FROM_DEVICE);
320 else
321 dma_unmap_page(parent, desc->lli.dar,
322 desc->total_len, DMA_FROM_DEVICE);
323 }
324 if (!(txd->flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
325 if (txd->flags & DMA_COMPL_SRC_UNMAP_SINGLE)
326 dma_unmap_single(parent, desc->lli.sar,
327 desc->total_len, DMA_TO_DEVICE);
328 else
329 dma_unmap_page(parent, desc->lli.sar,
330 desc->total_len, DMA_TO_DEVICE);
331 }
332 }
333
334 spin_unlock_irqrestore(&dwc->lock, flags); 311 spin_unlock_irqrestore(&dwc->lock, flags);
335 312
336 if (callback) 313 if (callback)
@@ -1098,13 +1075,13 @@ dwc_tx_status(struct dma_chan *chan,
1098 enum dma_status ret; 1075 enum dma_status ret;
1099 1076
1100 ret = dma_cookie_status(chan, cookie, txstate); 1077 ret = dma_cookie_status(chan, cookie, txstate);
1101 if (ret == DMA_SUCCESS) 1078 if (ret == DMA_COMPLETE)
1102 return ret; 1079 return ret;
1103 1080
1104 dwc_scan_descriptors(to_dw_dma(chan->device), dwc); 1081 dwc_scan_descriptors(to_dw_dma(chan->device), dwc);
1105 1082
1106 ret = dma_cookie_status(chan, cookie, txstate); 1083 ret = dma_cookie_status(chan, cookie, txstate);
1107 if (ret != DMA_SUCCESS) 1084 if (ret != DMA_COMPLETE)
1108 dma_set_residue(txstate, dwc_get_residue(dwc)); 1085 dma_set_residue(txstate, dwc_get_residue(dwc));
1109 1086
1110 if (dwc->paused && ret == DMA_IN_PROGRESS) 1087 if (dwc->paused && ret == DMA_IN_PROGRESS)
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index bef8a368c8dd..2539ea0cbc63 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -46,14 +46,21 @@
46#define EDMA_CHANS 64 46#define EDMA_CHANS 64
47#endif /* CONFIG_ARCH_DAVINCI_DA8XX */ 47#endif /* CONFIG_ARCH_DAVINCI_DA8XX */
48 48
49/* Max of 16 segments per channel to conserve PaRAM slots */ 49/*
50#define MAX_NR_SG 16 50 * Max of 20 segments per channel to conserve PaRAM slots
51 * Also note that MAX_NR_SG should be atleast the no.of periods
52 * that are required for ASoC, otherwise DMA prep calls will
53 * fail. Today davinci-pcm is the only user of this driver and
54 * requires atleast 17 slots, so we setup the default to 20.
55 */
56#define MAX_NR_SG 20
51#define EDMA_MAX_SLOTS MAX_NR_SG 57#define EDMA_MAX_SLOTS MAX_NR_SG
52#define EDMA_DESCRIPTORS 16 58#define EDMA_DESCRIPTORS 16
53 59
54struct edma_desc { 60struct edma_desc {
55 struct virt_dma_desc vdesc; 61 struct virt_dma_desc vdesc;
56 struct list_head node; 62 struct list_head node;
63 int cyclic;
57 int absync; 64 int absync;
58 int pset_nr; 65 int pset_nr;
59 int processed; 66 int processed;
@@ -167,8 +174,13 @@ static void edma_execute(struct edma_chan *echan)
167 * then setup a link to the dummy slot, this results in all future 174 * then setup a link to the dummy slot, this results in all future
168 * events being absorbed and that's OK because we're done 175 * events being absorbed and that's OK because we're done
169 */ 176 */
170 if (edesc->processed == edesc->pset_nr) 177 if (edesc->processed == edesc->pset_nr) {
171 edma_link(echan->slot[nslots-1], echan->ecc->dummy_slot); 178 if (edesc->cyclic)
179 edma_link(echan->slot[nslots-1], echan->slot[1]);
180 else
181 edma_link(echan->slot[nslots-1],
182 echan->ecc->dummy_slot);
183 }
172 184
173 edma_resume(echan->ch_num); 185 edma_resume(echan->ch_num);
174 186
@@ -250,6 +262,117 @@ static int edma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
250 return ret; 262 return ret;
251} 263}
252 264
265/*
266 * A PaRAM set configuration abstraction used by other modes
267 * @chan: Channel who's PaRAM set we're configuring
268 * @pset: PaRAM set to initialize and setup.
269 * @src_addr: Source address of the DMA
270 * @dst_addr: Destination address of the DMA
271 * @burst: In units of dev_width, how much to send
272 * @dev_width: How much is the dev_width
273 * @dma_length: Total length of the DMA transfer
274 * @direction: Direction of the transfer
275 */
276static int edma_config_pset(struct dma_chan *chan, struct edmacc_param *pset,
277 dma_addr_t src_addr, dma_addr_t dst_addr, u32 burst,
278 enum dma_slave_buswidth dev_width, unsigned int dma_length,
279 enum dma_transfer_direction direction)
280{
281 struct edma_chan *echan = to_edma_chan(chan);
282 struct device *dev = chan->device->dev;
283 int acnt, bcnt, ccnt, cidx;
284 int src_bidx, dst_bidx, src_cidx, dst_cidx;
285 int absync;
286
287 acnt = dev_width;
288 /*
289 * If the maxburst is equal to the fifo width, use
290 * A-synced transfers. This allows for large contiguous
291 * buffer transfers using only one PaRAM set.
292 */
293 if (burst == 1) {
294 /*
295 * For the A-sync case, bcnt and ccnt are the remainder
296 * and quotient respectively of the division of:
297 * (dma_length / acnt) by (SZ_64K -1). This is so
298 * that in case bcnt over flows, we have ccnt to use.
299 * Note: In A-sync tranfer only, bcntrld is used, but it
300 * only applies for sg_dma_len(sg) >= SZ_64K.
301 * In this case, the best way adopted is- bccnt for the
302 * first frame will be the remainder below. Then for
303 * every successive frame, bcnt will be SZ_64K-1. This
304 * is assured as bcntrld = 0xffff in end of function.
305 */
306 absync = false;
307 ccnt = dma_length / acnt / (SZ_64K - 1);
308 bcnt = dma_length / acnt - ccnt * (SZ_64K - 1);
309 /*
310 * If bcnt is non-zero, we have a remainder and hence an
311 * extra frame to transfer, so increment ccnt.
312 */
313 if (bcnt)
314 ccnt++;
315 else
316 bcnt = SZ_64K - 1;
317 cidx = acnt;
318 } else {
319 /*
320 * If maxburst is greater than the fifo address_width,
321 * use AB-synced transfers where A count is the fifo
322 * address_width and B count is the maxburst. In this
323 * case, we are limited to transfers of C count frames
324 * of (address_width * maxburst) where C count is limited
325 * to SZ_64K-1. This places an upper bound on the length
326 * of an SG segment that can be handled.
327 */
328 absync = true;
329 bcnt = burst;
330 ccnt = dma_length / (acnt * bcnt);
331 if (ccnt > (SZ_64K - 1)) {
332 dev_err(dev, "Exceeded max SG segment size\n");
333 return -EINVAL;
334 }
335 cidx = acnt * bcnt;
336 }
337
338 if (direction == DMA_MEM_TO_DEV) {
339 src_bidx = acnt;
340 src_cidx = cidx;
341 dst_bidx = 0;
342 dst_cidx = 0;
343 } else if (direction == DMA_DEV_TO_MEM) {
344 src_bidx = 0;
345 src_cidx = 0;
346 dst_bidx = acnt;
347 dst_cidx = cidx;
348 } else {
349 dev_err(dev, "%s: direction not implemented yet\n", __func__);
350 return -EINVAL;
351 }
352
353 pset->opt = EDMA_TCC(EDMA_CHAN_SLOT(echan->ch_num));
354 /* Configure A or AB synchronized transfers */
355 if (absync)
356 pset->opt |= SYNCDIM;
357
358 pset->src = src_addr;
359 pset->dst = dst_addr;
360
361 pset->src_dst_bidx = (dst_bidx << 16) | src_bidx;
362 pset->src_dst_cidx = (dst_cidx << 16) | src_cidx;
363
364 pset->a_b_cnt = bcnt << 16 | acnt;
365 pset->ccnt = ccnt;
366 /*
367 * Only time when (bcntrld) auto reload is required is for
368 * A-sync case, and in this case, a requirement of reload value
369 * of SZ_64K-1 only is assured. 'link' is initially set to NULL
370 * and then later will be populated by edma_execute.
371 */
372 pset->link_bcntrld = 0xffffffff;
373 return absync;
374}
375
253static struct dma_async_tx_descriptor *edma_prep_slave_sg( 376static struct dma_async_tx_descriptor *edma_prep_slave_sg(
254 struct dma_chan *chan, struct scatterlist *sgl, 377 struct dma_chan *chan, struct scatterlist *sgl,
255 unsigned int sg_len, enum dma_transfer_direction direction, 378 unsigned int sg_len, enum dma_transfer_direction direction,
@@ -258,23 +381,21 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
258 struct edma_chan *echan = to_edma_chan(chan); 381 struct edma_chan *echan = to_edma_chan(chan);
259 struct device *dev = chan->device->dev; 382 struct device *dev = chan->device->dev;
260 struct edma_desc *edesc; 383 struct edma_desc *edesc;
261 dma_addr_t dev_addr; 384 dma_addr_t src_addr = 0, dst_addr = 0;
262 enum dma_slave_buswidth dev_width; 385 enum dma_slave_buswidth dev_width;
263 u32 burst; 386 u32 burst;
264 struct scatterlist *sg; 387 struct scatterlist *sg;
265 int acnt, bcnt, ccnt, src, dst, cidx; 388 int i, nslots, ret;
266 int src_bidx, dst_bidx, src_cidx, dst_cidx;
267 int i, nslots;
268 389
269 if (unlikely(!echan || !sgl || !sg_len)) 390 if (unlikely(!echan || !sgl || !sg_len))
270 return NULL; 391 return NULL;
271 392
272 if (direction == DMA_DEV_TO_MEM) { 393 if (direction == DMA_DEV_TO_MEM) {
273 dev_addr = echan->cfg.src_addr; 394 src_addr = echan->cfg.src_addr;
274 dev_width = echan->cfg.src_addr_width; 395 dev_width = echan->cfg.src_addr_width;
275 burst = echan->cfg.src_maxburst; 396 burst = echan->cfg.src_maxburst;
276 } else if (direction == DMA_MEM_TO_DEV) { 397 } else if (direction == DMA_MEM_TO_DEV) {
277 dev_addr = echan->cfg.dst_addr; 398 dst_addr = echan->cfg.dst_addr;
278 dev_width = echan->cfg.dst_addr_width; 399 dev_width = echan->cfg.dst_addr_width;
279 burst = echan->cfg.dst_maxburst; 400 burst = echan->cfg.dst_maxburst;
280 } else { 401 } else {
@@ -307,7 +428,6 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
307 if (echan->slot[i] < 0) { 428 if (echan->slot[i] < 0) {
308 kfree(edesc); 429 kfree(edesc);
309 dev_err(dev, "Failed to allocate slot\n"); 430 dev_err(dev, "Failed to allocate slot\n");
310 kfree(edesc);
311 return NULL; 431 return NULL;
312 } 432 }
313 } 433 }
@@ -315,64 +435,21 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
315 435
316 /* Configure PaRAM sets for each SG */ 436 /* Configure PaRAM sets for each SG */
317 for_each_sg(sgl, sg, sg_len, i) { 437 for_each_sg(sgl, sg, sg_len, i) {
318 438 /* Get address for each SG */
319 acnt = dev_width; 439 if (direction == DMA_DEV_TO_MEM)
320 440 dst_addr = sg_dma_address(sg);
321 /* 441 else
322 * If the maxburst is equal to the fifo width, use 442 src_addr = sg_dma_address(sg);
323 * A-synced transfers. This allows for large contiguous 443
324 * buffer transfers using only one PaRAM set. 444 ret = edma_config_pset(chan, &edesc->pset[i], src_addr,
325 */ 445 dst_addr, burst, dev_width,
326 if (burst == 1) { 446 sg_dma_len(sg), direction);
327 edesc->absync = false; 447 if (ret < 0) {
328 ccnt = sg_dma_len(sg) / acnt / (SZ_64K - 1); 448 kfree(edesc);
329 bcnt = sg_dma_len(sg) / acnt - ccnt * (SZ_64K - 1); 449 return NULL;
330 if (bcnt)
331 ccnt++;
332 else
333 bcnt = SZ_64K - 1;
334 cidx = acnt;
335 /*
336 * If maxburst is greater than the fifo address_width,
337 * use AB-synced transfers where A count is the fifo
338 * address_width and B count is the maxburst. In this
339 * case, we are limited to transfers of C count frames
340 * of (address_width * maxburst) where C count is limited
341 * to SZ_64K-1. This places an upper bound on the length
342 * of an SG segment that can be handled.
343 */
344 } else {
345 edesc->absync = true;
346 bcnt = burst;
347 ccnt = sg_dma_len(sg) / (acnt * bcnt);
348 if (ccnt > (SZ_64K - 1)) {
349 dev_err(dev, "Exceeded max SG segment size\n");
350 kfree(edesc);
351 return NULL;
352 }
353 cidx = acnt * bcnt;
354 } 450 }
355 451
356 if (direction == DMA_MEM_TO_DEV) { 452 edesc->absync = ret;
357 src = sg_dma_address(sg);
358 dst = dev_addr;
359 src_bidx = acnt;
360 src_cidx = cidx;
361 dst_bidx = 0;
362 dst_cidx = 0;
363 } else {
364 src = dev_addr;
365 dst = sg_dma_address(sg);
366 src_bidx = 0;
367 src_cidx = 0;
368 dst_bidx = acnt;
369 dst_cidx = cidx;
370 }
371
372 edesc->pset[i].opt = EDMA_TCC(EDMA_CHAN_SLOT(echan->ch_num));
373 /* Configure A or AB synchronized transfers */
374 if (edesc->absync)
375 edesc->pset[i].opt |= SYNCDIM;
376 453
377 /* If this is the last in a current SG set of transactions, 454 /* If this is the last in a current SG set of transactions,
378 enable interrupts so that next set is processed */ 455 enable interrupts so that next set is processed */
@@ -382,17 +459,138 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
382 /* If this is the last set, enable completion interrupt flag */ 459 /* If this is the last set, enable completion interrupt flag */
383 if (i == sg_len - 1) 460 if (i == sg_len - 1)
384 edesc->pset[i].opt |= TCINTEN; 461 edesc->pset[i].opt |= TCINTEN;
462 }
385 463
386 edesc->pset[i].src = src; 464 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags);
387 edesc->pset[i].dst = dst; 465}
388 466
389 edesc->pset[i].src_dst_bidx = (dst_bidx << 16) | src_bidx; 467static struct dma_async_tx_descriptor *edma_prep_dma_cyclic(
390 edesc->pset[i].src_dst_cidx = (dst_cidx << 16) | src_cidx; 468 struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
469 size_t period_len, enum dma_transfer_direction direction,
470 unsigned long tx_flags, void *context)
471{
472 struct edma_chan *echan = to_edma_chan(chan);
473 struct device *dev = chan->device->dev;
474 struct edma_desc *edesc;
475 dma_addr_t src_addr, dst_addr;
476 enum dma_slave_buswidth dev_width;
477 u32 burst;
478 int i, ret, nslots;
479
480 if (unlikely(!echan || !buf_len || !period_len))
481 return NULL;
482
483 if (direction == DMA_DEV_TO_MEM) {
484 src_addr = echan->cfg.src_addr;
485 dst_addr = buf_addr;
486 dev_width = echan->cfg.src_addr_width;
487 burst = echan->cfg.src_maxburst;
488 } else if (direction == DMA_MEM_TO_DEV) {
489 src_addr = buf_addr;
490 dst_addr = echan->cfg.dst_addr;
491 dev_width = echan->cfg.dst_addr_width;
492 burst = echan->cfg.dst_maxburst;
493 } else {
494 dev_err(dev, "%s: bad direction?\n", __func__);
495 return NULL;
496 }
497
498 if (dev_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) {
499 dev_err(dev, "Undefined slave buswidth\n");
500 return NULL;
501 }
502
503 if (unlikely(buf_len % period_len)) {
504 dev_err(dev, "Period should be multiple of Buffer length\n");
505 return NULL;
506 }
507
508 nslots = (buf_len / period_len) + 1;
509
510 /*
511 * Cyclic DMA users such as audio cannot tolerate delays introduced
512 * by cases where the number of periods is more than the maximum
513 * number of SGs the EDMA driver can handle at a time. For DMA types
514 * such as Slave SGs, such delays are tolerable and synchronized,
515 * but the synchronization is difficult to achieve with Cyclic and
516 * cannot be guaranteed, so we error out early.
517 */
518 if (nslots > MAX_NR_SG)
519 return NULL;
520
521 edesc = kzalloc(sizeof(*edesc) + nslots *
522 sizeof(edesc->pset[0]), GFP_ATOMIC);
523 if (!edesc) {
524 dev_dbg(dev, "Failed to allocate a descriptor\n");
525 return NULL;
526 }
527
528 edesc->cyclic = 1;
529 edesc->pset_nr = nslots;
530
531 dev_dbg(dev, "%s: nslots=%d\n", __func__, nslots);
532 dev_dbg(dev, "%s: period_len=%d\n", __func__, period_len);
533 dev_dbg(dev, "%s: buf_len=%d\n", __func__, buf_len);
534
535 for (i = 0; i < nslots; i++) {
536 /* Allocate a PaRAM slot, if needed */
537 if (echan->slot[i] < 0) {
538 echan->slot[i] =
539 edma_alloc_slot(EDMA_CTLR(echan->ch_num),
540 EDMA_SLOT_ANY);
541 if (echan->slot[i] < 0) {
542 dev_err(dev, "Failed to allocate slot\n");
543 return NULL;
544 }
545 }
546
547 if (i == nslots - 1) {
548 memcpy(&edesc->pset[i], &edesc->pset[0],
549 sizeof(edesc->pset[0]));
550 break;
551 }
552
553 ret = edma_config_pset(chan, &edesc->pset[i], src_addr,
554 dst_addr, burst, dev_width, period_len,
555 direction);
556 if (ret < 0)
557 return NULL;
391 558
392 edesc->pset[i].a_b_cnt = bcnt << 16 | acnt; 559 if (direction == DMA_DEV_TO_MEM)
393 edesc->pset[i].ccnt = ccnt; 560 dst_addr += period_len;
394 edesc->pset[i].link_bcntrld = 0xffffffff; 561 else
562 src_addr += period_len;
395 563
564 dev_dbg(dev, "%s: Configure period %d of buf:\n", __func__, i);
565 dev_dbg(dev,
566 "\n pset[%d]:\n"
567 " chnum\t%d\n"
568 " slot\t%d\n"
569 " opt\t%08x\n"
570 " src\t%08x\n"
571 " dst\t%08x\n"
572 " abcnt\t%08x\n"
573 " ccnt\t%08x\n"
574 " bidx\t%08x\n"
575 " cidx\t%08x\n"
576 " lkrld\t%08x\n",
577 i, echan->ch_num, echan->slot[i],
578 edesc->pset[i].opt,
579 edesc->pset[i].src,
580 edesc->pset[i].dst,
581 edesc->pset[i].a_b_cnt,
582 edesc->pset[i].ccnt,
583 edesc->pset[i].src_dst_bidx,
584 edesc->pset[i].src_dst_cidx,
585 edesc->pset[i].link_bcntrld);
586
587 edesc->absync = ret;
588
589 /*
590 * Enable interrupts for every period because callback
591 * has to be called for every period.
592 */
593 edesc->pset[i].opt |= TCINTEN;
396 } 594 }
397 595
398 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags); 596 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags);
@@ -406,30 +604,34 @@ static void edma_callback(unsigned ch_num, u16 ch_status, void *data)
406 unsigned long flags; 604 unsigned long flags;
407 struct edmacc_param p; 605 struct edmacc_param p;
408 606
409 /* Pause the channel */ 607 edesc = echan->edesc;
410 edma_pause(echan->ch_num); 608
609 /* Pause the channel for non-cyclic */
610 if (!edesc || (edesc && !edesc->cyclic))
611 edma_pause(echan->ch_num);
411 612
412 switch (ch_status) { 613 switch (ch_status) {
413 case DMA_COMPLETE: 614 case EDMA_DMA_COMPLETE:
414 spin_lock_irqsave(&echan->vchan.lock, flags); 615 spin_lock_irqsave(&echan->vchan.lock, flags);
415 616
416 edesc = echan->edesc;
417 if (edesc) { 617 if (edesc) {
418 if (edesc->processed == edesc->pset_nr) { 618 if (edesc->cyclic) {
619 vchan_cyclic_callback(&edesc->vdesc);
620 } else if (edesc->processed == edesc->pset_nr) {
419 dev_dbg(dev, "Transfer complete, stopping channel %d\n", ch_num); 621 dev_dbg(dev, "Transfer complete, stopping channel %d\n", ch_num);
420 edma_stop(echan->ch_num); 622 edma_stop(echan->ch_num);
421 vchan_cookie_complete(&edesc->vdesc); 623 vchan_cookie_complete(&edesc->vdesc);
624 edma_execute(echan);
422 } else { 625 } else {
423 dev_dbg(dev, "Intermediate transfer complete on channel %d\n", ch_num); 626 dev_dbg(dev, "Intermediate transfer complete on channel %d\n", ch_num);
627 edma_execute(echan);
424 } 628 }
425
426 edma_execute(echan);
427 } 629 }
428 630
429 spin_unlock_irqrestore(&echan->vchan.lock, flags); 631 spin_unlock_irqrestore(&echan->vchan.lock, flags);
430 632
431 break; 633 break;
432 case DMA_CC_ERROR: 634 case EDMA_DMA_CC_ERROR:
433 spin_lock_irqsave(&echan->vchan.lock, flags); 635 spin_lock_irqsave(&echan->vchan.lock, flags);
434 636
435 edma_read_slot(EDMA_CHAN_SLOT(echan->slot[0]), &p); 637 edma_read_slot(EDMA_CHAN_SLOT(echan->slot[0]), &p);
@@ -579,7 +781,7 @@ static enum dma_status edma_tx_status(struct dma_chan *chan,
579 unsigned long flags; 781 unsigned long flags;
580 782
581 ret = dma_cookie_status(chan, cookie, txstate); 783 ret = dma_cookie_status(chan, cookie, txstate);
582 if (ret == DMA_SUCCESS || !txstate) 784 if (ret == DMA_COMPLETE || !txstate)
583 return ret; 785 return ret;
584 786
585 spin_lock_irqsave(&echan->vchan.lock, flags); 787 spin_lock_irqsave(&echan->vchan.lock, flags);
@@ -619,6 +821,7 @@ static void edma_dma_init(struct edma_cc *ecc, struct dma_device *dma,
619 struct device *dev) 821 struct device *dev)
620{ 822{
621 dma->device_prep_slave_sg = edma_prep_slave_sg; 823 dma->device_prep_slave_sg = edma_prep_slave_sg;
824 dma->device_prep_dma_cyclic = edma_prep_dma_cyclic;
622 dma->device_alloc_chan_resources = edma_alloc_chan_resources; 825 dma->device_alloc_chan_resources = edma_alloc_chan_resources;
623 dma->device_free_chan_resources = edma_free_chan_resources; 826 dma->device_free_chan_resources = edma_free_chan_resources;
624 dma->device_issue_pending = edma_issue_pending; 827 dma->device_issue_pending = edma_issue_pending;
diff --git a/drivers/dma/ep93xx_dma.c b/drivers/dma/ep93xx_dma.c
index 591cd8c63abb..cb4bf682a708 100644
--- a/drivers/dma/ep93xx_dma.c
+++ b/drivers/dma/ep93xx_dma.c
@@ -733,28 +733,6 @@ static void ep93xx_dma_advance_work(struct ep93xx_dma_chan *edmac)
733 spin_unlock_irqrestore(&edmac->lock, flags); 733 spin_unlock_irqrestore(&edmac->lock, flags);
734} 734}
735 735
736static void ep93xx_dma_unmap_buffers(struct ep93xx_dma_desc *desc)
737{
738 struct device *dev = desc->txd.chan->device->dev;
739
740 if (!(desc->txd.flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
741 if (desc->txd.flags & DMA_COMPL_SRC_UNMAP_SINGLE)
742 dma_unmap_single(dev, desc->src_addr, desc->size,
743 DMA_TO_DEVICE);
744 else
745 dma_unmap_page(dev, desc->src_addr, desc->size,
746 DMA_TO_DEVICE);
747 }
748 if (!(desc->txd.flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
749 if (desc->txd.flags & DMA_COMPL_DEST_UNMAP_SINGLE)
750 dma_unmap_single(dev, desc->dst_addr, desc->size,
751 DMA_FROM_DEVICE);
752 else
753 dma_unmap_page(dev, desc->dst_addr, desc->size,
754 DMA_FROM_DEVICE);
755 }
756}
757
758static void ep93xx_dma_tasklet(unsigned long data) 736static void ep93xx_dma_tasklet(unsigned long data)
759{ 737{
760 struct ep93xx_dma_chan *edmac = (struct ep93xx_dma_chan *)data; 738 struct ep93xx_dma_chan *edmac = (struct ep93xx_dma_chan *)data;
@@ -787,13 +765,7 @@ static void ep93xx_dma_tasklet(unsigned long data)
787 765
788 /* Now we can release all the chained descriptors */ 766 /* Now we can release all the chained descriptors */
789 list_for_each_entry_safe(desc, d, &list, node) { 767 list_for_each_entry_safe(desc, d, &list, node) {
790 /* 768 dma_descriptor_unmap(&desc->txd);
791 * For the memcpy channels the API requires us to unmap the
792 * buffers unless requested otherwise.
793 */
794 if (!edmac->chan.private)
795 ep93xx_dma_unmap_buffers(desc);
796
797 ep93xx_dma_desc_put(edmac, desc); 769 ep93xx_dma_desc_put(edmac, desc);
798 } 770 }
799 771
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 61517dd0d0b7..7086a16a55f2 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -870,22 +870,7 @@ static void fsldma_cleanup_descriptor(struct fsldma_chan *chan,
870 /* Run any dependencies */ 870 /* Run any dependencies */
871 dma_run_dependencies(txd); 871 dma_run_dependencies(txd);
872 872
873 /* Unmap the dst buffer, if requested */ 873 dma_descriptor_unmap(txd);
874 if (!(txd->flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
875 if (txd->flags & DMA_COMPL_DEST_UNMAP_SINGLE)
876 dma_unmap_single(dev, dst, len, DMA_FROM_DEVICE);
877 else
878 dma_unmap_page(dev, dst, len, DMA_FROM_DEVICE);
879 }
880
881 /* Unmap the src buffer, if requested */
882 if (!(txd->flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
883 if (txd->flags & DMA_COMPL_SRC_UNMAP_SINGLE)
884 dma_unmap_single(dev, src, len, DMA_TO_DEVICE);
885 else
886 dma_unmap_page(dev, src, len, DMA_TO_DEVICE);
887 }
888
889#ifdef FSL_DMA_LD_DEBUG 874#ifdef FSL_DMA_LD_DEBUG
890 chan_dbg(chan, "LD %p free\n", desc); 875 chan_dbg(chan, "LD %p free\n", desc);
891#endif 876#endif
@@ -1255,7 +1240,9 @@ static int fsl_dma_chan_probe(struct fsldma_device *fdev,
1255 WARN_ON(fdev->feature != chan->feature); 1240 WARN_ON(fdev->feature != chan->feature);
1256 1241
1257 chan->dev = fdev->dev; 1242 chan->dev = fdev->dev;
1258 chan->id = ((res.start - 0x100) & 0xfff) >> 7; 1243 chan->id = (res.start & 0xfff) < 0x300 ?
1244 ((res.start - 0x100) & 0xfff) >> 7 :
1245 ((res.start - 0x200) & 0xfff) >> 7;
1259 if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) { 1246 if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) {
1260 dev_err(fdev->dev, "too many channels for device\n"); 1247 dev_err(fdev->dev, "too many channels for device\n");
1261 err = -EINVAL; 1248 err = -EINVAL;
@@ -1428,6 +1415,7 @@ static int fsldma_of_remove(struct platform_device *op)
1428} 1415}
1429 1416
1430static const struct of_device_id fsldma_of_ids[] = { 1417static const struct of_device_id fsldma_of_ids[] = {
1418 { .compatible = "fsl,elo3-dma", },
1431 { .compatible = "fsl,eloplus-dma", }, 1419 { .compatible = "fsl,eloplus-dma", },
1432 { .compatible = "fsl,elo-dma", }, 1420 { .compatible = "fsl,elo-dma", },
1433 {} 1421 {}
@@ -1449,7 +1437,7 @@ static struct platform_driver fsldma_of_driver = {
1449 1437
1450static __init int fsldma_init(void) 1438static __init int fsldma_init(void)
1451{ 1439{
1452 pr_info("Freescale Elo / Elo Plus DMA driver\n"); 1440 pr_info("Freescale Elo series DMA driver\n");
1453 return platform_driver_register(&fsldma_of_driver); 1441 return platform_driver_register(&fsldma_of_driver);
1454} 1442}
1455 1443
@@ -1461,5 +1449,5 @@ static void __exit fsldma_exit(void)
1461subsys_initcall(fsldma_init); 1449subsys_initcall(fsldma_init);
1462module_exit(fsldma_exit); 1450module_exit(fsldma_exit);
1463 1451
1464MODULE_DESCRIPTION("Freescale Elo / Elo Plus DMA driver"); 1452MODULE_DESCRIPTION("Freescale Elo series DMA driver");
1465MODULE_LICENSE("GPL"); 1453MODULE_LICENSE("GPL");
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index f5c38791fc74..1ffc24484d23 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -112,7 +112,7 @@ struct fsldma_chan_regs {
112}; 112};
113 113
114struct fsldma_chan; 114struct fsldma_chan;
115#define FSL_DMA_MAX_CHANS_PER_DEVICE 4 115#define FSL_DMA_MAX_CHANS_PER_DEVICE 8
116 116
117struct fsldma_device { 117struct fsldma_device {
118 void __iomem *regs; /* DGSR register base */ 118 void __iomem *regs; /* DGSR register base */
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index 55852c026791..6f9ac2022abd 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c
@@ -572,9 +572,11 @@ static int imxdma_xfer_desc(struct imxdma_desc *d)
572 572
573 imx_dmav1_writel(imxdma, d->len, DMA_CNTR(imxdmac->channel)); 573 imx_dmav1_writel(imxdma, d->len, DMA_CNTR(imxdmac->channel));
574 574
575 dev_dbg(imxdma->dev, "%s channel: %d dest=0x%08x src=0x%08x " 575 dev_dbg(imxdma->dev,
576 "dma_length=%d\n", __func__, imxdmac->channel, 576 "%s channel: %d dest=0x%08llx src=0x%08llx dma_length=%zu\n",
577 d->dest, d->src, d->len); 577 __func__, imxdmac->channel,
578 (unsigned long long)d->dest,
579 (unsigned long long)d->src, d->len);
578 580
579 break; 581 break;
580 /* Cyclic transfer is the same as slave_sg with special sg configuration. */ 582 /* Cyclic transfer is the same as slave_sg with special sg configuration. */
@@ -586,20 +588,22 @@ static int imxdma_xfer_desc(struct imxdma_desc *d)
586 imx_dmav1_writel(imxdma, imxdmac->ccr_from_device, 588 imx_dmav1_writel(imxdma, imxdmac->ccr_from_device,
587 DMA_CCR(imxdmac->channel)); 589 DMA_CCR(imxdmac->channel));
588 590
589 dev_dbg(imxdma->dev, "%s channel: %d sg=%p sgcount=%d " 591 dev_dbg(imxdma->dev,
590 "total length=%d dev_addr=0x%08x (dev2mem)\n", 592 "%s channel: %d sg=%p sgcount=%d total length=%zu dev_addr=0x%08llx (dev2mem)\n",
591 __func__, imxdmac->channel, d->sg, d->sgcount, 593 __func__, imxdmac->channel,
592 d->len, imxdmac->per_address); 594 d->sg, d->sgcount, d->len,
595 (unsigned long long)imxdmac->per_address);
593 } else if (d->direction == DMA_MEM_TO_DEV) { 596 } else if (d->direction == DMA_MEM_TO_DEV) {
594 imx_dmav1_writel(imxdma, imxdmac->per_address, 597 imx_dmav1_writel(imxdma, imxdmac->per_address,
595 DMA_DAR(imxdmac->channel)); 598 DMA_DAR(imxdmac->channel));
596 imx_dmav1_writel(imxdma, imxdmac->ccr_to_device, 599 imx_dmav1_writel(imxdma, imxdmac->ccr_to_device,
597 DMA_CCR(imxdmac->channel)); 600 DMA_CCR(imxdmac->channel));
598 601
599 dev_dbg(imxdma->dev, "%s channel: %d sg=%p sgcount=%d " 602 dev_dbg(imxdma->dev,
600 "total length=%d dev_addr=0x%08x (mem2dev)\n", 603 "%s channel: %d sg=%p sgcount=%d total length=%zu dev_addr=0x%08llx (mem2dev)\n",
601 __func__, imxdmac->channel, d->sg, d->sgcount, 604 __func__, imxdmac->channel,
602 d->len, imxdmac->per_address); 605 d->sg, d->sgcount, d->len,
606 (unsigned long long)imxdmac->per_address);
603 } else { 607 } else {
604 dev_err(imxdma->dev, "%s channel: %d bad dma mode\n", 608 dev_err(imxdma->dev, "%s channel: %d bad dma mode\n",
605 __func__, imxdmac->channel); 609 __func__, imxdmac->channel);
@@ -771,7 +775,7 @@ static int imxdma_alloc_chan_resources(struct dma_chan *chan)
771 desc->desc.tx_submit = imxdma_tx_submit; 775 desc->desc.tx_submit = imxdma_tx_submit;
772 /* txd.flags will be overwritten in prep funcs */ 776 /* txd.flags will be overwritten in prep funcs */
773 desc->desc.flags = DMA_CTRL_ACK; 777 desc->desc.flags = DMA_CTRL_ACK;
774 desc->status = DMA_SUCCESS; 778 desc->status = DMA_COMPLETE;
775 779
776 list_add_tail(&desc->node, &imxdmac->ld_free); 780 list_add_tail(&desc->node, &imxdmac->ld_free);
777 imxdmac->descs_allocated++; 781 imxdmac->descs_allocated++;
@@ -870,7 +874,7 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_cyclic(
870 int i; 874 int i;
871 unsigned int periods = buf_len / period_len; 875 unsigned int periods = buf_len / period_len;
872 876
873 dev_dbg(imxdma->dev, "%s channel: %d buf_len=%d period_len=%d\n", 877 dev_dbg(imxdma->dev, "%s channel: %d buf_len=%zu period_len=%zu\n",
874 __func__, imxdmac->channel, buf_len, period_len); 878 __func__, imxdmac->channel, buf_len, period_len);
875 879
876 if (list_empty(&imxdmac->ld_free) || 880 if (list_empty(&imxdmac->ld_free) ||
@@ -926,8 +930,9 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_memcpy(
926 struct imxdma_engine *imxdma = imxdmac->imxdma; 930 struct imxdma_engine *imxdma = imxdmac->imxdma;
927 struct imxdma_desc *desc; 931 struct imxdma_desc *desc;
928 932
929 dev_dbg(imxdma->dev, "%s channel: %d src=0x%x dst=0x%x len=%d\n", 933 dev_dbg(imxdma->dev, "%s channel: %d src=0x%llx dst=0x%llx len=%zu\n",
930 __func__, imxdmac->channel, src, dest, len); 934 __func__, imxdmac->channel, (unsigned long long)src,
935 (unsigned long long)dest, len);
931 936
932 if (list_empty(&imxdmac->ld_free) || 937 if (list_empty(&imxdmac->ld_free) ||
933 imxdma_chan_is_doing_cyclic(imxdmac)) 938 imxdma_chan_is_doing_cyclic(imxdmac))
@@ -956,9 +961,10 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_interleaved(
956 struct imxdma_engine *imxdma = imxdmac->imxdma; 961 struct imxdma_engine *imxdma = imxdmac->imxdma;
957 struct imxdma_desc *desc; 962 struct imxdma_desc *desc;
958 963
959 dev_dbg(imxdma->dev, "%s channel: %d src_start=0x%x dst_start=0x%x\n" 964 dev_dbg(imxdma->dev, "%s channel: %d src_start=0x%llx dst_start=0x%llx\n"
960 " src_sgl=%s dst_sgl=%s numf=%d frame_size=%d\n", __func__, 965 " src_sgl=%s dst_sgl=%s numf=%zu frame_size=%zu\n", __func__,
961 imxdmac->channel, xt->src_start, xt->dst_start, 966 imxdmac->channel, (unsigned long long)xt->src_start,
967 (unsigned long long) xt->dst_start,
962 xt->src_sgl ? "true" : "false", xt->dst_sgl ? "true" : "false", 968 xt->src_sgl ? "true" : "false", xt->dst_sgl ? "true" : "false",
963 xt->numf, xt->frame_size); 969 xt->numf, xt->frame_size);
964 970
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index c1fd504cae28..c75679d42028 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -638,7 +638,7 @@ static void mxc_sdma_handle_channel_normal(struct sdma_channel *sdmac)
638 if (error) 638 if (error)
639 sdmac->status = DMA_ERROR; 639 sdmac->status = DMA_ERROR;
640 else 640 else
641 sdmac->status = DMA_SUCCESS; 641 sdmac->status = DMA_COMPLETE;
642 642
643 dma_cookie_complete(&sdmac->desc); 643 dma_cookie_complete(&sdmac->desc);
644 if (sdmac->desc.callback) 644 if (sdmac->desc.callback)
@@ -1089,8 +1089,8 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
1089 param &= ~BD_CONT; 1089 param &= ~BD_CONT;
1090 } 1090 }
1091 1091
1092 dev_dbg(sdma->dev, "entry %d: count: %d dma: 0x%08x %s%s\n", 1092 dev_dbg(sdma->dev, "entry %d: count: %d dma: %#llx %s%s\n",
1093 i, count, sg->dma_address, 1093 i, count, (u64)sg->dma_address,
1094 param & BD_WRAP ? "wrap" : "", 1094 param & BD_WRAP ? "wrap" : "",
1095 param & BD_INTR ? " intr" : ""); 1095 param & BD_INTR ? " intr" : "");
1096 1096
@@ -1163,8 +1163,8 @@ static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic(
1163 if (i + 1 == num_periods) 1163 if (i + 1 == num_periods)
1164 param |= BD_WRAP; 1164 param |= BD_WRAP;
1165 1165
1166 dev_dbg(sdma->dev, "entry %d: count: %d dma: 0x%08x %s%s\n", 1166 dev_dbg(sdma->dev, "entry %d: count: %d dma: %#llx %s%s\n",
1167 i, period_len, dma_addr, 1167 i, period_len, (u64)dma_addr,
1168 param & BD_WRAP ? "wrap" : "", 1168 param & BD_WRAP ? "wrap" : "",
1169 param & BD_INTR ? " intr" : ""); 1169 param & BD_INTR ? " intr" : "");
1170 1170
diff --git a/drivers/dma/intel_mid_dma.c b/drivers/dma/intel_mid_dma.c
index a975ebebea8a..1aab8130efa1 100644
--- a/drivers/dma/intel_mid_dma.c
+++ b/drivers/dma/intel_mid_dma.c
@@ -309,7 +309,7 @@ static void midc_descriptor_complete(struct intel_mid_dma_chan *midc,
309 callback_txd(param_txd); 309 callback_txd(param_txd);
310 } 310 }
311 if (midc->raw_tfr) { 311 if (midc->raw_tfr) {
312 desc->status = DMA_SUCCESS; 312 desc->status = DMA_COMPLETE;
313 if (desc->lli != NULL) { 313 if (desc->lli != NULL) {
314 pci_pool_free(desc->lli_pool, desc->lli, 314 pci_pool_free(desc->lli_pool, desc->lli,
315 desc->lli_phys); 315 desc->lli_phys);
@@ -481,7 +481,7 @@ static enum dma_status intel_mid_dma_tx_status(struct dma_chan *chan,
481 enum dma_status ret; 481 enum dma_status ret;
482 482
483 ret = dma_cookie_status(chan, cookie, txstate); 483 ret = dma_cookie_status(chan, cookie, txstate);
484 if (ret != DMA_SUCCESS) { 484 if (ret != DMA_COMPLETE) {
485 spin_lock_bh(&midc->lock); 485 spin_lock_bh(&midc->lock);
486 midc_scan_descriptors(to_middma_device(chan->device), midc); 486 midc_scan_descriptors(to_middma_device(chan->device), midc);
487 spin_unlock_bh(&midc->lock); 487 spin_unlock_bh(&midc->lock);
diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c
index 5ff6fc1819dc..1a49c777607c 100644
--- a/drivers/dma/ioat/dma.c
+++ b/drivers/dma/ioat/dma.c
@@ -531,21 +531,6 @@ static void ioat1_cleanup_event(unsigned long data)
531 writew(IOAT_CHANCTRL_RUN, ioat->base.reg_base + IOAT_CHANCTRL_OFFSET); 531 writew(IOAT_CHANCTRL_RUN, ioat->base.reg_base + IOAT_CHANCTRL_OFFSET);
532} 532}
533 533
534void ioat_dma_unmap(struct ioat_chan_common *chan, enum dma_ctrl_flags flags,
535 size_t len, struct ioat_dma_descriptor *hw)
536{
537 struct pci_dev *pdev = chan->device->pdev;
538 size_t offset = len - hw->size;
539
540 if (!(flags & DMA_COMPL_SKIP_DEST_UNMAP))
541 ioat_unmap(pdev, hw->dst_addr - offset, len,
542 PCI_DMA_FROMDEVICE, flags, 1);
543
544 if (!(flags & DMA_COMPL_SKIP_SRC_UNMAP))
545 ioat_unmap(pdev, hw->src_addr - offset, len,
546 PCI_DMA_TODEVICE, flags, 0);
547}
548
549dma_addr_t ioat_get_current_completion(struct ioat_chan_common *chan) 534dma_addr_t ioat_get_current_completion(struct ioat_chan_common *chan)
550{ 535{
551 dma_addr_t phys_complete; 536 dma_addr_t phys_complete;
@@ -602,7 +587,7 @@ static void __cleanup(struct ioat_dma_chan *ioat, dma_addr_t phys_complete)
602 dump_desc_dbg(ioat, desc); 587 dump_desc_dbg(ioat, desc);
603 if (tx->cookie) { 588 if (tx->cookie) {
604 dma_cookie_complete(tx); 589 dma_cookie_complete(tx);
605 ioat_dma_unmap(chan, tx->flags, desc->len, desc->hw); 590 dma_descriptor_unmap(tx);
606 ioat->active -= desc->hw->tx_cnt; 591 ioat->active -= desc->hw->tx_cnt;
607 if (tx->callback) { 592 if (tx->callback) {
608 tx->callback(tx->callback_param); 593 tx->callback(tx->callback_param);
@@ -733,7 +718,7 @@ ioat_dma_tx_status(struct dma_chan *c, dma_cookie_t cookie,
733 enum dma_status ret; 718 enum dma_status ret;
734 719
735 ret = dma_cookie_status(c, cookie, txstate); 720 ret = dma_cookie_status(c, cookie, txstate);
736 if (ret == DMA_SUCCESS) 721 if (ret == DMA_COMPLETE)
737 return ret; 722 return ret;
738 723
739 device->cleanup_fn((unsigned long) c); 724 device->cleanup_fn((unsigned long) c);
@@ -833,8 +818,7 @@ int ioat_dma_self_test(struct ioatdma_device *device)
833 818
834 dma_src = dma_map_single(dev, src, IOAT_TEST_SIZE, DMA_TO_DEVICE); 819 dma_src = dma_map_single(dev, src, IOAT_TEST_SIZE, DMA_TO_DEVICE);
835 dma_dest = dma_map_single(dev, dest, IOAT_TEST_SIZE, DMA_FROM_DEVICE); 820 dma_dest = dma_map_single(dev, dest, IOAT_TEST_SIZE, DMA_FROM_DEVICE);
836 flags = DMA_COMPL_SKIP_SRC_UNMAP | DMA_COMPL_SKIP_DEST_UNMAP | 821 flags = DMA_PREP_INTERRUPT;
837 DMA_PREP_INTERRUPT;
838 tx = device->common.device_prep_dma_memcpy(dma_chan, dma_dest, dma_src, 822 tx = device->common.device_prep_dma_memcpy(dma_chan, dma_dest, dma_src,
839 IOAT_TEST_SIZE, flags); 823 IOAT_TEST_SIZE, flags);
840 if (!tx) { 824 if (!tx) {
@@ -859,7 +843,7 @@ int ioat_dma_self_test(struct ioatdma_device *device)
859 843
860 if (tmo == 0 || 844 if (tmo == 0 ||
861 dma->device_tx_status(dma_chan, cookie, NULL) 845 dma->device_tx_status(dma_chan, cookie, NULL)
862 != DMA_SUCCESS) { 846 != DMA_COMPLETE) {
863 dev_err(dev, "Self-test copy timed out, disabling\n"); 847 dev_err(dev, "Self-test copy timed out, disabling\n");
864 err = -ENODEV; 848 err = -ENODEV;
865 goto unmap_dma; 849 goto unmap_dma;
@@ -885,8 +869,7 @@ static char ioat_interrupt_style[32] = "msix";
885module_param_string(ioat_interrupt_style, ioat_interrupt_style, 869module_param_string(ioat_interrupt_style, ioat_interrupt_style,
886 sizeof(ioat_interrupt_style), 0644); 870 sizeof(ioat_interrupt_style), 0644);
887MODULE_PARM_DESC(ioat_interrupt_style, 871MODULE_PARM_DESC(ioat_interrupt_style,
888 "set ioat interrupt style: msix (default), " 872 "set ioat interrupt style: msix (default), msi, intx");
889 "msix-single-vector, msi, intx)");
890 873
891/** 874/**
892 * ioat_dma_setup_interrupts - setup interrupt handler 875 * ioat_dma_setup_interrupts - setup interrupt handler
@@ -904,8 +887,6 @@ int ioat_dma_setup_interrupts(struct ioatdma_device *device)
904 887
905 if (!strcmp(ioat_interrupt_style, "msix")) 888 if (!strcmp(ioat_interrupt_style, "msix"))
906 goto msix; 889 goto msix;
907 if (!strcmp(ioat_interrupt_style, "msix-single-vector"))
908 goto msix_single_vector;
909 if (!strcmp(ioat_interrupt_style, "msi")) 890 if (!strcmp(ioat_interrupt_style, "msi"))
910 goto msi; 891 goto msi;
911 if (!strcmp(ioat_interrupt_style, "intx")) 892 if (!strcmp(ioat_interrupt_style, "intx"))
@@ -920,10 +901,8 @@ msix:
920 device->msix_entries[i].entry = i; 901 device->msix_entries[i].entry = i;
921 902
922 err = pci_enable_msix(pdev, device->msix_entries, msixcnt); 903 err = pci_enable_msix(pdev, device->msix_entries, msixcnt);
923 if (err < 0) 904 if (err)
924 goto msi; 905 goto msi;
925 if (err > 0)
926 goto msix_single_vector;
927 906
928 for (i = 0; i < msixcnt; i++) { 907 for (i = 0; i < msixcnt; i++) {
929 msix = &device->msix_entries[i]; 908 msix = &device->msix_entries[i];
@@ -937,29 +916,13 @@ msix:
937 chan = ioat_chan_by_index(device, j); 916 chan = ioat_chan_by_index(device, j);
938 devm_free_irq(dev, msix->vector, chan); 917 devm_free_irq(dev, msix->vector, chan);
939 } 918 }
940 goto msix_single_vector; 919 goto msi;
941 } 920 }
942 } 921 }
943 intrctrl |= IOAT_INTRCTRL_MSIX_VECTOR_CONTROL; 922 intrctrl |= IOAT_INTRCTRL_MSIX_VECTOR_CONTROL;
944 device->irq_mode = IOAT_MSIX; 923 device->irq_mode = IOAT_MSIX;
945 goto done; 924 goto done;
946 925
947msix_single_vector:
948 msix = &device->msix_entries[0];
949 msix->entry = 0;
950 err = pci_enable_msix(pdev, device->msix_entries, 1);
951 if (err)
952 goto msi;
953
954 err = devm_request_irq(dev, msix->vector, ioat_dma_do_interrupt, 0,
955 "ioat-msix", device);
956 if (err) {
957 pci_disable_msix(pdev);
958 goto msi;
959 }
960 device->irq_mode = IOAT_MSIX_SINGLE;
961 goto done;
962
963msi: 926msi:
964 err = pci_enable_msi(pdev); 927 err = pci_enable_msi(pdev);
965 if (err) 928 if (err)
@@ -971,7 +934,7 @@ msi:
971 pci_disable_msi(pdev); 934 pci_disable_msi(pdev);
972 goto intx; 935 goto intx;
973 } 936 }
974 device->irq_mode = IOAT_MSIX; 937 device->irq_mode = IOAT_MSI;
975 goto done; 938 goto done;
976 939
977intx: 940intx:
diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h
index 54fb7b9ff9aa..11fb877ddca9 100644
--- a/drivers/dma/ioat/dma.h
+++ b/drivers/dma/ioat/dma.h
@@ -52,7 +52,6 @@
52enum ioat_irq_mode { 52enum ioat_irq_mode {
53 IOAT_NOIRQ = 0, 53 IOAT_NOIRQ = 0,
54 IOAT_MSIX, 54 IOAT_MSIX,
55 IOAT_MSIX_SINGLE,
56 IOAT_MSI, 55 IOAT_MSI,
57 IOAT_INTX 56 IOAT_INTX
58}; 57};
@@ -83,7 +82,6 @@ struct ioatdma_device {
83 struct pci_pool *completion_pool; 82 struct pci_pool *completion_pool;
84#define MAX_SED_POOLS 5 83#define MAX_SED_POOLS 5
85 struct dma_pool *sed_hw_pool[MAX_SED_POOLS]; 84 struct dma_pool *sed_hw_pool[MAX_SED_POOLS];
86 struct kmem_cache *sed_pool;
87 struct dma_device common; 85 struct dma_device common;
88 u8 version; 86 u8 version;
89 struct msix_entry msix_entries[4]; 87 struct msix_entry msix_entries[4];
@@ -342,16 +340,6 @@ static inline bool is_ioat_bug(unsigned long err)
342 return !!err; 340 return !!err;
343} 341}
344 342
345static inline void ioat_unmap(struct pci_dev *pdev, dma_addr_t addr, size_t len,
346 int direction, enum dma_ctrl_flags flags, bool dst)
347{
348 if ((dst && (flags & DMA_COMPL_DEST_UNMAP_SINGLE)) ||
349 (!dst && (flags & DMA_COMPL_SRC_UNMAP_SINGLE)))
350 pci_unmap_single(pdev, addr, len, direction);
351 else
352 pci_unmap_page(pdev, addr, len, direction);
353}
354
355int ioat_probe(struct ioatdma_device *device); 343int ioat_probe(struct ioatdma_device *device);
356int ioat_register(struct ioatdma_device *device); 344int ioat_register(struct ioatdma_device *device);
357int ioat1_dma_probe(struct ioatdma_device *dev, int dca); 345int ioat1_dma_probe(struct ioatdma_device *dev, int dca);
@@ -363,8 +351,6 @@ void ioat_init_channel(struct ioatdma_device *device,
363 struct ioat_chan_common *chan, int idx); 351 struct ioat_chan_common *chan, int idx);
364enum dma_status ioat_dma_tx_status(struct dma_chan *c, dma_cookie_t cookie, 352enum dma_status ioat_dma_tx_status(struct dma_chan *c, dma_cookie_t cookie,
365 struct dma_tx_state *txstate); 353 struct dma_tx_state *txstate);
366void ioat_dma_unmap(struct ioat_chan_common *chan, enum dma_ctrl_flags flags,
367 size_t len, struct ioat_dma_descriptor *hw);
368bool ioat_cleanup_preamble(struct ioat_chan_common *chan, 354bool ioat_cleanup_preamble(struct ioat_chan_common *chan,
369 dma_addr_t *phys_complete); 355 dma_addr_t *phys_complete);
370void ioat_kobject_add(struct ioatdma_device *device, struct kobj_type *type); 356void ioat_kobject_add(struct ioatdma_device *device, struct kobj_type *type);
diff --git a/drivers/dma/ioat/dma_v2.c b/drivers/dma/ioat/dma_v2.c
index b925e1b1d139..5d3affe7e976 100644
--- a/drivers/dma/ioat/dma_v2.c
+++ b/drivers/dma/ioat/dma_v2.c
@@ -148,7 +148,7 @@ static void __cleanup(struct ioat2_dma_chan *ioat, dma_addr_t phys_complete)
148 tx = &desc->txd; 148 tx = &desc->txd;
149 dump_desc_dbg(ioat, desc); 149 dump_desc_dbg(ioat, desc);
150 if (tx->cookie) { 150 if (tx->cookie) {
151 ioat_dma_unmap(chan, tx->flags, desc->len, desc->hw); 151 dma_descriptor_unmap(tx);
152 dma_cookie_complete(tx); 152 dma_cookie_complete(tx);
153 if (tx->callback) { 153 if (tx->callback) {
154 tx->callback(tx->callback_param); 154 tx->callback(tx->callback_param);
diff --git a/drivers/dma/ioat/dma_v2.h b/drivers/dma/ioat/dma_v2.h
index 212d584fe427..470292767e68 100644
--- a/drivers/dma/ioat/dma_v2.h
+++ b/drivers/dma/ioat/dma_v2.h
@@ -157,7 +157,6 @@ static inline void ioat2_set_chainaddr(struct ioat2_dma_chan *ioat, u64 addr)
157 157
158int ioat2_dma_probe(struct ioatdma_device *dev, int dca); 158int ioat2_dma_probe(struct ioatdma_device *dev, int dca);
159int ioat3_dma_probe(struct ioatdma_device *dev, int dca); 159int ioat3_dma_probe(struct ioatdma_device *dev, int dca);
160void ioat3_dma_remove(struct ioatdma_device *dev);
161struct dca_provider *ioat2_dca_init(struct pci_dev *pdev, void __iomem *iobase); 160struct dca_provider *ioat2_dca_init(struct pci_dev *pdev, void __iomem *iobase);
162struct dca_provider *ioat3_dca_init(struct pci_dev *pdev, void __iomem *iobase); 161struct dca_provider *ioat3_dca_init(struct pci_dev *pdev, void __iomem *iobase);
163int ioat2_check_space_lock(struct ioat2_dma_chan *ioat, int num_descs); 162int ioat2_check_space_lock(struct ioat2_dma_chan *ioat, int num_descs);
diff --git a/drivers/dma/ioat/dma_v3.c b/drivers/dma/ioat/dma_v3.c
index d8ececaf1b57..820817e97e62 100644
--- a/drivers/dma/ioat/dma_v3.c
+++ b/drivers/dma/ioat/dma_v3.c
@@ -67,6 +67,8 @@
67#include "dma.h" 67#include "dma.h"
68#include "dma_v2.h" 68#include "dma_v2.h"
69 69
70extern struct kmem_cache *ioat3_sed_cache;
71
70/* ioat hardware assumes at least two sources for raid operations */ 72/* ioat hardware assumes at least two sources for raid operations */
71#define src_cnt_to_sw(x) ((x) + 2) 73#define src_cnt_to_sw(x) ((x) + 2)
72#define src_cnt_to_hw(x) ((x) - 2) 74#define src_cnt_to_hw(x) ((x) - 2)
@@ -87,22 +89,8 @@ static const u8 pq_idx_to_field[] = { 1, 4, 5, 0, 1, 2, 4, 5 };
87static const u8 pq16_idx_to_field[] = { 1, 4, 1, 2, 3, 4, 5, 6, 7, 89static const u8 pq16_idx_to_field[] = { 1, 4, 1, 2, 3, 4, 5, 6, 7,
88 0, 1, 2, 3, 4, 5, 6 }; 90 0, 1, 2, 3, 4, 5, 6 };
89 91
90/*
91 * technically sources 1 and 2 do not require SED, but the op will have
92 * at least 9 descriptors so that's irrelevant.
93 */
94static const u8 pq16_idx_to_sed[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0,
95 1, 1, 1, 1, 1, 1, 1 };
96
97static void ioat3_eh(struct ioat2_dma_chan *ioat); 92static void ioat3_eh(struct ioat2_dma_chan *ioat);
98 93
99static dma_addr_t xor_get_src(struct ioat_raw_descriptor *descs[2], int idx)
100{
101 struct ioat_raw_descriptor *raw = descs[xor_idx_to_desc >> idx & 1];
102
103 return raw->field[xor_idx_to_field[idx]];
104}
105
106static void xor_set_src(struct ioat_raw_descriptor *descs[2], 94static void xor_set_src(struct ioat_raw_descriptor *descs[2],
107 dma_addr_t addr, u32 offset, int idx) 95 dma_addr_t addr, u32 offset, int idx)
108{ 96{
@@ -135,12 +123,6 @@ static void pq_set_src(struct ioat_raw_descriptor *descs[2],
135 pq->coef[idx] = coef; 123 pq->coef[idx] = coef;
136} 124}
137 125
138static int sed_get_pq16_pool_idx(int src_cnt)
139{
140
141 return pq16_idx_to_sed[src_cnt];
142}
143
144static bool is_jf_ioat(struct pci_dev *pdev) 126static bool is_jf_ioat(struct pci_dev *pdev)
145{ 127{
146 switch (pdev->device) { 128 switch (pdev->device) {
@@ -272,7 +254,7 @@ ioat3_alloc_sed(struct ioatdma_device *device, unsigned int hw_pool)
272 struct ioat_sed_ent *sed; 254 struct ioat_sed_ent *sed;
273 gfp_t flags = __GFP_ZERO | GFP_ATOMIC; 255 gfp_t flags = __GFP_ZERO | GFP_ATOMIC;
274 256
275 sed = kmem_cache_alloc(device->sed_pool, flags); 257 sed = kmem_cache_alloc(ioat3_sed_cache, flags);
276 if (!sed) 258 if (!sed)
277 return NULL; 259 return NULL;
278 260
@@ -280,7 +262,7 @@ ioat3_alloc_sed(struct ioatdma_device *device, unsigned int hw_pool)
280 sed->hw = dma_pool_alloc(device->sed_hw_pool[hw_pool], 262 sed->hw = dma_pool_alloc(device->sed_hw_pool[hw_pool],
281 flags, &sed->dma); 263 flags, &sed->dma);
282 if (!sed->hw) { 264 if (!sed->hw) {
283 kmem_cache_free(device->sed_pool, sed); 265 kmem_cache_free(ioat3_sed_cache, sed);
284 return NULL; 266 return NULL;
285 } 267 }
286 268
@@ -293,165 +275,7 @@ static void ioat3_free_sed(struct ioatdma_device *device, struct ioat_sed_ent *s
293 return; 275 return;
294 276
295 dma_pool_free(device->sed_hw_pool[sed->hw_pool], sed->hw, sed->dma); 277 dma_pool_free(device->sed_hw_pool[sed->hw_pool], sed->hw, sed->dma);
296 kmem_cache_free(device->sed_pool, sed); 278 kmem_cache_free(ioat3_sed_cache, sed);
297}
298
299static void ioat3_dma_unmap(struct ioat2_dma_chan *ioat,
300 struct ioat_ring_ent *desc, int idx)
301{
302 struct ioat_chan_common *chan = &ioat->base;
303 struct pci_dev *pdev = chan->device->pdev;
304 size_t len = desc->len;
305 size_t offset = len - desc->hw->size;
306 struct dma_async_tx_descriptor *tx = &desc->txd;
307 enum dma_ctrl_flags flags = tx->flags;
308
309 switch (desc->hw->ctl_f.op) {
310 case IOAT_OP_COPY:
311 if (!desc->hw->ctl_f.null) /* skip 'interrupt' ops */
312 ioat_dma_unmap(chan, flags, len, desc->hw);
313 break;
314 case IOAT_OP_XOR_VAL:
315 case IOAT_OP_XOR: {
316 struct ioat_xor_descriptor *xor = desc->xor;
317 struct ioat_ring_ent *ext;
318 struct ioat_xor_ext_descriptor *xor_ex = NULL;
319 int src_cnt = src_cnt_to_sw(xor->ctl_f.src_cnt);
320 struct ioat_raw_descriptor *descs[2];
321 int i;
322
323 if (src_cnt > 5) {
324 ext = ioat2_get_ring_ent(ioat, idx + 1);
325 xor_ex = ext->xor_ex;
326 }
327
328 if (!(flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
329 descs[0] = (struct ioat_raw_descriptor *) xor;
330 descs[1] = (struct ioat_raw_descriptor *) xor_ex;
331 for (i = 0; i < src_cnt; i++) {
332 dma_addr_t src = xor_get_src(descs, i);
333
334 ioat_unmap(pdev, src - offset, len,
335 PCI_DMA_TODEVICE, flags, 0);
336 }
337
338 /* dest is a source in xor validate operations */
339 if (xor->ctl_f.op == IOAT_OP_XOR_VAL) {
340 ioat_unmap(pdev, xor->dst_addr - offset, len,
341 PCI_DMA_TODEVICE, flags, 1);
342 break;
343 }
344 }
345
346 if (!(flags & DMA_COMPL_SKIP_DEST_UNMAP))
347 ioat_unmap(pdev, xor->dst_addr - offset, len,
348 PCI_DMA_FROMDEVICE, flags, 1);
349 break;
350 }
351 case IOAT_OP_PQ_VAL:
352 case IOAT_OP_PQ: {
353 struct ioat_pq_descriptor *pq = desc->pq;
354 struct ioat_ring_ent *ext;
355 struct ioat_pq_ext_descriptor *pq_ex = NULL;
356 int src_cnt = src_cnt_to_sw(pq->ctl_f.src_cnt);
357 struct ioat_raw_descriptor *descs[2];
358 int i;
359
360 if (src_cnt > 3) {
361 ext = ioat2_get_ring_ent(ioat, idx + 1);
362 pq_ex = ext->pq_ex;
363 }
364
365 /* in the 'continue' case don't unmap the dests as sources */
366 if (dmaf_p_disabled_continue(flags))
367 src_cnt--;
368 else if (dmaf_continue(flags))
369 src_cnt -= 3;
370
371 if (!(flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
372 descs[0] = (struct ioat_raw_descriptor *) pq;
373 descs[1] = (struct ioat_raw_descriptor *) pq_ex;
374 for (i = 0; i < src_cnt; i++) {
375 dma_addr_t src = pq_get_src(descs, i);
376
377 ioat_unmap(pdev, src - offset, len,
378 PCI_DMA_TODEVICE, flags, 0);
379 }
380
381 /* the dests are sources in pq validate operations */
382 if (pq->ctl_f.op == IOAT_OP_XOR_VAL) {
383 if (!(flags & DMA_PREP_PQ_DISABLE_P))
384 ioat_unmap(pdev, pq->p_addr - offset,
385 len, PCI_DMA_TODEVICE, flags, 0);
386 if (!(flags & DMA_PREP_PQ_DISABLE_Q))
387 ioat_unmap(pdev, pq->q_addr - offset,
388 len, PCI_DMA_TODEVICE, flags, 0);
389 break;
390 }
391 }
392
393 if (!(flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
394 if (!(flags & DMA_PREP_PQ_DISABLE_P))
395 ioat_unmap(pdev, pq->p_addr - offset, len,
396 PCI_DMA_BIDIRECTIONAL, flags, 1);
397 if (!(flags & DMA_PREP_PQ_DISABLE_Q))
398 ioat_unmap(pdev, pq->q_addr - offset, len,
399 PCI_DMA_BIDIRECTIONAL, flags, 1);
400 }
401 break;
402 }
403 case IOAT_OP_PQ_16S:
404 case IOAT_OP_PQ_VAL_16S: {
405 struct ioat_pq_descriptor *pq = desc->pq;
406 int src_cnt = src16_cnt_to_sw(pq->ctl_f.src_cnt);
407 struct ioat_raw_descriptor *descs[4];
408 int i;
409
410 /* in the 'continue' case don't unmap the dests as sources */
411 if (dmaf_p_disabled_continue(flags))
412 src_cnt--;
413 else if (dmaf_continue(flags))
414 src_cnt -= 3;
415
416 if (!(flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
417 descs[0] = (struct ioat_raw_descriptor *)pq;
418 descs[1] = (struct ioat_raw_descriptor *)(desc->sed->hw);
419 descs[2] = (struct ioat_raw_descriptor *)(&desc->sed->hw->b[0]);
420 for (i = 0; i < src_cnt; i++) {
421 dma_addr_t src = pq16_get_src(descs, i);
422
423 ioat_unmap(pdev, src - offset, len,
424 PCI_DMA_TODEVICE, flags, 0);
425 }
426
427 /* the dests are sources in pq validate operations */
428 if (pq->ctl_f.op == IOAT_OP_XOR_VAL) {
429 if (!(flags & DMA_PREP_PQ_DISABLE_P))
430 ioat_unmap(pdev, pq->p_addr - offset,
431 len, PCI_DMA_TODEVICE,
432 flags, 0);
433 if (!(flags & DMA_PREP_PQ_DISABLE_Q))
434 ioat_unmap(pdev, pq->q_addr - offset,
435 len, PCI_DMA_TODEVICE,
436 flags, 0);
437 break;
438 }
439 }
440
441 if (!(flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
442 if (!(flags & DMA_PREP_PQ_DISABLE_P))
443 ioat_unmap(pdev, pq->p_addr - offset, len,
444 PCI_DMA_BIDIRECTIONAL, flags, 1);
445 if (!(flags & DMA_PREP_PQ_DISABLE_Q))
446 ioat_unmap(pdev, pq->q_addr - offset, len,
447 PCI_DMA_BIDIRECTIONAL, flags, 1);
448 }
449 break;
450 }
451 default:
452 dev_err(&pdev->dev, "%s: unknown op type: %#x\n",
453 __func__, desc->hw->ctl_f.op);
454 }
455} 279}
456 280
457static bool desc_has_ext(struct ioat_ring_ent *desc) 281static bool desc_has_ext(struct ioat_ring_ent *desc)
@@ -577,7 +401,7 @@ static void __cleanup(struct ioat2_dma_chan *ioat, dma_addr_t phys_complete)
577 tx = &desc->txd; 401 tx = &desc->txd;
578 if (tx->cookie) { 402 if (tx->cookie) {
579 dma_cookie_complete(tx); 403 dma_cookie_complete(tx);
580 ioat3_dma_unmap(ioat, desc, idx + i); 404 dma_descriptor_unmap(tx);
581 if (tx->callback) { 405 if (tx->callback) {
582 tx->callback(tx->callback_param); 406 tx->callback(tx->callback_param);
583 tx->callback = NULL; 407 tx->callback = NULL;
@@ -807,7 +631,7 @@ ioat3_tx_status(struct dma_chan *c, dma_cookie_t cookie,
807 enum dma_status ret; 631 enum dma_status ret;
808 632
809 ret = dma_cookie_status(c, cookie, txstate); 633 ret = dma_cookie_status(c, cookie, txstate);
810 if (ret == DMA_SUCCESS) 634 if (ret == DMA_COMPLETE)
811 return ret; 635 return ret;
812 636
813 ioat3_cleanup(ioat); 637 ioat3_cleanup(ioat);
@@ -1129,9 +953,6 @@ __ioat3_prep_pq16_lock(struct dma_chan *c, enum sum_check_flags *result,
1129 u8 op; 953 u8 op;
1130 int i, s, idx, num_descs; 954 int i, s, idx, num_descs;
1131 955
1132 /* this function only handles src_cnt 9 - 16 */
1133 BUG_ON(src_cnt < 9);
1134
1135 /* this function is only called with 9-16 sources */ 956 /* this function is only called with 9-16 sources */
1136 op = result ? IOAT_OP_PQ_VAL_16S : IOAT_OP_PQ_16S; 957 op = result ? IOAT_OP_PQ_VAL_16S : IOAT_OP_PQ_16S;
1137 958
@@ -1159,8 +980,7 @@ __ioat3_prep_pq16_lock(struct dma_chan *c, enum sum_check_flags *result,
1159 980
1160 descs[0] = (struct ioat_raw_descriptor *) pq; 981 descs[0] = (struct ioat_raw_descriptor *) pq;
1161 982
1162 desc->sed = ioat3_alloc_sed(device, 983 desc->sed = ioat3_alloc_sed(device, (src_cnt-2) >> 3);
1163 sed_get_pq16_pool_idx(src_cnt));
1164 if (!desc->sed) { 984 if (!desc->sed) {
1165 dev_err(to_dev(chan), 985 dev_err(to_dev(chan),
1166 "%s: no free sed entries\n", __func__); 986 "%s: no free sed entries\n", __func__);
@@ -1218,13 +1038,21 @@ __ioat3_prep_pq16_lock(struct dma_chan *c, enum sum_check_flags *result,
1218 return &desc->txd; 1038 return &desc->txd;
1219} 1039}
1220 1040
1041static int src_cnt_flags(unsigned int src_cnt, unsigned long flags)
1042{
1043 if (dmaf_p_disabled_continue(flags))
1044 return src_cnt + 1;
1045 else if (dmaf_continue(flags))
1046 return src_cnt + 3;
1047 else
1048 return src_cnt;
1049}
1050
1221static struct dma_async_tx_descriptor * 1051static struct dma_async_tx_descriptor *
1222ioat3_prep_pq(struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src, 1052ioat3_prep_pq(struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src,
1223 unsigned int src_cnt, const unsigned char *scf, size_t len, 1053 unsigned int src_cnt, const unsigned char *scf, size_t len,
1224 unsigned long flags) 1054 unsigned long flags)
1225{ 1055{
1226 struct dma_device *dma = chan->device;
1227
1228 /* specify valid address for disabled result */ 1056 /* specify valid address for disabled result */
1229 if (flags & DMA_PREP_PQ_DISABLE_P) 1057 if (flags & DMA_PREP_PQ_DISABLE_P)
1230 dst[0] = dst[1]; 1058 dst[0] = dst[1];
@@ -1244,7 +1072,7 @@ ioat3_prep_pq(struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src,
1244 single_source_coef[0] = scf[0]; 1072 single_source_coef[0] = scf[0];
1245 single_source_coef[1] = 0; 1073 single_source_coef[1] = 0;
1246 1074
1247 return (src_cnt > 8) && (dma->max_pq > 8) ? 1075 return src_cnt_flags(src_cnt, flags) > 8 ?
1248 __ioat3_prep_pq16_lock(chan, NULL, dst, single_source, 1076 __ioat3_prep_pq16_lock(chan, NULL, dst, single_source,
1249 2, single_source_coef, len, 1077 2, single_source_coef, len,
1250 flags) : 1078 flags) :
@@ -1252,7 +1080,7 @@ ioat3_prep_pq(struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src,
1252 single_source_coef, len, flags); 1080 single_source_coef, len, flags);
1253 1081
1254 } else { 1082 } else {
1255 return (src_cnt > 8) && (dma->max_pq > 8) ? 1083 return src_cnt_flags(src_cnt, flags) > 8 ?
1256 __ioat3_prep_pq16_lock(chan, NULL, dst, src, src_cnt, 1084 __ioat3_prep_pq16_lock(chan, NULL, dst, src, src_cnt,
1257 scf, len, flags) : 1085 scf, len, flags) :
1258 __ioat3_prep_pq_lock(chan, NULL, dst, src, src_cnt, 1086 __ioat3_prep_pq_lock(chan, NULL, dst, src, src_cnt,
@@ -1265,8 +1093,6 @@ ioat3_prep_pq_val(struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src,
1265 unsigned int src_cnt, const unsigned char *scf, size_t len, 1093 unsigned int src_cnt, const unsigned char *scf, size_t len,
1266 enum sum_check_flags *pqres, unsigned long flags) 1094 enum sum_check_flags *pqres, unsigned long flags)
1267{ 1095{
1268 struct dma_device *dma = chan->device;
1269
1270 /* specify valid address for disabled result */ 1096 /* specify valid address for disabled result */
1271 if (flags & DMA_PREP_PQ_DISABLE_P) 1097 if (flags & DMA_PREP_PQ_DISABLE_P)
1272 pq[0] = pq[1]; 1098 pq[0] = pq[1];
@@ -1278,7 +1104,7 @@ ioat3_prep_pq_val(struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src,
1278 */ 1104 */
1279 *pqres = 0; 1105 *pqres = 0;
1280 1106
1281 return (src_cnt > 8) && (dma->max_pq > 8) ? 1107 return src_cnt_flags(src_cnt, flags) > 8 ?
1282 __ioat3_prep_pq16_lock(chan, pqres, pq, src, src_cnt, scf, len, 1108 __ioat3_prep_pq16_lock(chan, pqres, pq, src, src_cnt, scf, len,
1283 flags) : 1109 flags) :
1284 __ioat3_prep_pq_lock(chan, pqres, pq, src, src_cnt, scf, len, 1110 __ioat3_prep_pq_lock(chan, pqres, pq, src, src_cnt, scf, len,
@@ -1289,7 +1115,6 @@ static struct dma_async_tx_descriptor *
1289ioat3_prep_pqxor(struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src, 1115ioat3_prep_pqxor(struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src,
1290 unsigned int src_cnt, size_t len, unsigned long flags) 1116 unsigned int src_cnt, size_t len, unsigned long flags)
1291{ 1117{
1292 struct dma_device *dma = chan->device;
1293 unsigned char scf[src_cnt]; 1118 unsigned char scf[src_cnt];
1294 dma_addr_t pq[2]; 1119 dma_addr_t pq[2];
1295 1120
@@ -1298,7 +1123,7 @@ ioat3_prep_pqxor(struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src,
1298 flags |= DMA_PREP_PQ_DISABLE_Q; 1123 flags |= DMA_PREP_PQ_DISABLE_Q;
1299 pq[1] = dst; /* specify valid address for disabled result */ 1124 pq[1] = dst; /* specify valid address for disabled result */
1300 1125
1301 return (src_cnt > 8) && (dma->max_pq > 8) ? 1126 return src_cnt_flags(src_cnt, flags) > 8 ?
1302 __ioat3_prep_pq16_lock(chan, NULL, pq, src, src_cnt, scf, len, 1127 __ioat3_prep_pq16_lock(chan, NULL, pq, src, src_cnt, scf, len,
1303 flags) : 1128 flags) :
1304 __ioat3_prep_pq_lock(chan, NULL, pq, src, src_cnt, scf, len, 1129 __ioat3_prep_pq_lock(chan, NULL, pq, src, src_cnt, scf, len,
@@ -1310,7 +1135,6 @@ ioat3_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src,
1310 unsigned int src_cnt, size_t len, 1135 unsigned int src_cnt, size_t len,
1311 enum sum_check_flags *result, unsigned long flags) 1136 enum sum_check_flags *result, unsigned long flags)
1312{ 1137{
1313 struct dma_device *dma = chan->device;
1314 unsigned char scf[src_cnt]; 1138 unsigned char scf[src_cnt];
1315 dma_addr_t pq[2]; 1139 dma_addr_t pq[2];
1316 1140
@@ -1324,8 +1148,7 @@ ioat3_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src,
1324 flags |= DMA_PREP_PQ_DISABLE_Q; 1148 flags |= DMA_PREP_PQ_DISABLE_Q;
1325 pq[1] = pq[0]; /* specify valid address for disabled result */ 1149 pq[1] = pq[0]; /* specify valid address for disabled result */
1326 1150
1327 1151 return src_cnt_flags(src_cnt, flags) > 8 ?
1328 return (src_cnt > 8) && (dma->max_pq > 8) ?
1329 __ioat3_prep_pq16_lock(chan, result, pq, &src[1], src_cnt - 1, 1152 __ioat3_prep_pq16_lock(chan, result, pq, &src[1], src_cnt - 1,
1330 scf, len, flags) : 1153 scf, len, flags) :
1331 __ioat3_prep_pq_lock(chan, result, pq, &src[1], src_cnt - 1, 1154 __ioat3_prep_pq_lock(chan, result, pq, &src[1], src_cnt - 1,
@@ -1444,9 +1267,7 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
1444 DMA_TO_DEVICE); 1267 DMA_TO_DEVICE);
1445 tx = dma->device_prep_dma_xor(dma_chan, dest_dma, dma_srcs, 1268 tx = dma->device_prep_dma_xor(dma_chan, dest_dma, dma_srcs,
1446 IOAT_NUM_SRC_TEST, PAGE_SIZE, 1269 IOAT_NUM_SRC_TEST, PAGE_SIZE,
1447 DMA_PREP_INTERRUPT | 1270 DMA_PREP_INTERRUPT);
1448 DMA_COMPL_SKIP_SRC_UNMAP |
1449 DMA_COMPL_SKIP_DEST_UNMAP);
1450 1271
1451 if (!tx) { 1272 if (!tx) {
1452 dev_err(dev, "Self-test xor prep failed\n"); 1273 dev_err(dev, "Self-test xor prep failed\n");
@@ -1468,7 +1289,7 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
1468 1289
1469 tmo = wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000)); 1290 tmo = wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000));
1470 1291
1471 if (dma->device_tx_status(dma_chan, cookie, NULL) != DMA_SUCCESS) { 1292 if (dma->device_tx_status(dma_chan, cookie, NULL) != DMA_COMPLETE) {
1472 dev_err(dev, "Self-test xor timed out\n"); 1293 dev_err(dev, "Self-test xor timed out\n");
1473 err = -ENODEV; 1294 err = -ENODEV;
1474 goto dma_unmap; 1295 goto dma_unmap;
@@ -1507,9 +1328,7 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
1507 DMA_TO_DEVICE); 1328 DMA_TO_DEVICE);
1508 tx = dma->device_prep_dma_xor_val(dma_chan, dma_srcs, 1329 tx = dma->device_prep_dma_xor_val(dma_chan, dma_srcs,
1509 IOAT_NUM_SRC_TEST + 1, PAGE_SIZE, 1330 IOAT_NUM_SRC_TEST + 1, PAGE_SIZE,
1510 &xor_val_result, DMA_PREP_INTERRUPT | 1331 &xor_val_result, DMA_PREP_INTERRUPT);
1511 DMA_COMPL_SKIP_SRC_UNMAP |
1512 DMA_COMPL_SKIP_DEST_UNMAP);
1513 if (!tx) { 1332 if (!tx) {
1514 dev_err(dev, "Self-test zero prep failed\n"); 1333 dev_err(dev, "Self-test zero prep failed\n");
1515 err = -ENODEV; 1334 err = -ENODEV;
@@ -1530,7 +1349,7 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
1530 1349
1531 tmo = wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000)); 1350 tmo = wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000));
1532 1351
1533 if (dma->device_tx_status(dma_chan, cookie, NULL) != DMA_SUCCESS) { 1352 if (dma->device_tx_status(dma_chan, cookie, NULL) != DMA_COMPLETE) {
1534 dev_err(dev, "Self-test validate timed out\n"); 1353 dev_err(dev, "Self-test validate timed out\n");
1535 err = -ENODEV; 1354 err = -ENODEV;
1536 goto dma_unmap; 1355 goto dma_unmap;
@@ -1545,6 +1364,8 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
1545 goto free_resources; 1364 goto free_resources;
1546 } 1365 }
1547 1366
1367 memset(page_address(dest), 0, PAGE_SIZE);
1368
1548 /* test for non-zero parity sum */ 1369 /* test for non-zero parity sum */
1549 op = IOAT_OP_XOR_VAL; 1370 op = IOAT_OP_XOR_VAL;
1550 1371
@@ -1554,9 +1375,7 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
1554 DMA_TO_DEVICE); 1375 DMA_TO_DEVICE);
1555 tx = dma->device_prep_dma_xor_val(dma_chan, dma_srcs, 1376 tx = dma->device_prep_dma_xor_val(dma_chan, dma_srcs,
1556 IOAT_NUM_SRC_TEST + 1, PAGE_SIZE, 1377 IOAT_NUM_SRC_TEST + 1, PAGE_SIZE,
1557 &xor_val_result, DMA_PREP_INTERRUPT | 1378 &xor_val_result, DMA_PREP_INTERRUPT);
1558 DMA_COMPL_SKIP_SRC_UNMAP |
1559 DMA_COMPL_SKIP_DEST_UNMAP);
1560 if (!tx) { 1379 if (!tx) {
1561 dev_err(dev, "Self-test 2nd zero prep failed\n"); 1380 dev_err(dev, "Self-test 2nd zero prep failed\n");
1562 err = -ENODEV; 1381 err = -ENODEV;
@@ -1577,7 +1396,7 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
1577 1396
1578 tmo = wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000)); 1397 tmo = wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000));
1579 1398
1580 if (dma->device_tx_status(dma_chan, cookie, NULL) != DMA_SUCCESS) { 1399 if (dma->device_tx_status(dma_chan, cookie, NULL) != DMA_COMPLETE) {
1581 dev_err(dev, "Self-test 2nd validate timed out\n"); 1400 dev_err(dev, "Self-test 2nd validate timed out\n");
1582 err = -ENODEV; 1401 err = -ENODEV;
1583 goto dma_unmap; 1402 goto dma_unmap;
@@ -1630,52 +1449,36 @@ static int ioat3_dma_self_test(struct ioatdma_device *device)
1630 1449
1631static int ioat3_irq_reinit(struct ioatdma_device *device) 1450static int ioat3_irq_reinit(struct ioatdma_device *device)
1632{ 1451{
1633 int msixcnt = device->common.chancnt;
1634 struct pci_dev *pdev = device->pdev; 1452 struct pci_dev *pdev = device->pdev;
1635 int i; 1453 int irq = pdev->irq, i;
1636 struct msix_entry *msix; 1454
1637 struct ioat_chan_common *chan; 1455 if (!is_bwd_ioat(pdev))
1638 int err = 0; 1456 return 0;
1639 1457
1640 switch (device->irq_mode) { 1458 switch (device->irq_mode) {
1641 case IOAT_MSIX: 1459 case IOAT_MSIX:
1460 for (i = 0; i < device->common.chancnt; i++) {
1461 struct msix_entry *msix = &device->msix_entries[i];
1462 struct ioat_chan_common *chan;
1642 1463
1643 for (i = 0; i < msixcnt; i++) {
1644 msix = &device->msix_entries[i];
1645 chan = ioat_chan_by_index(device, i); 1464 chan = ioat_chan_by_index(device, i);
1646 devm_free_irq(&pdev->dev, msix->vector, chan); 1465 devm_free_irq(&pdev->dev, msix->vector, chan);
1647 } 1466 }
1648 1467
1649 pci_disable_msix(pdev); 1468 pci_disable_msix(pdev);
1650 break; 1469 break;
1651
1652 case IOAT_MSIX_SINGLE:
1653 msix = &device->msix_entries[0];
1654 chan = ioat_chan_by_index(device, 0);
1655 devm_free_irq(&pdev->dev, msix->vector, chan);
1656 pci_disable_msix(pdev);
1657 break;
1658
1659 case IOAT_MSI: 1470 case IOAT_MSI:
1660 chan = ioat_chan_by_index(device, 0);
1661 devm_free_irq(&pdev->dev, pdev->irq, chan);
1662 pci_disable_msi(pdev); 1471 pci_disable_msi(pdev);
1663 break; 1472 /* fall through */
1664
1665 case IOAT_INTX: 1473 case IOAT_INTX:
1666 chan = ioat_chan_by_index(device, 0); 1474 devm_free_irq(&pdev->dev, irq, device);
1667 devm_free_irq(&pdev->dev, pdev->irq, chan);
1668 break; 1475 break;
1669
1670 default: 1476 default:
1671 return 0; 1477 return 0;
1672 } 1478 }
1673
1674 device->irq_mode = IOAT_NOIRQ; 1479 device->irq_mode = IOAT_NOIRQ;
1675 1480
1676 err = ioat_dma_setup_interrupts(device); 1481 return ioat_dma_setup_interrupts(device);
1677
1678 return err;
1679} 1482}
1680 1483
1681static int ioat3_reset_hw(struct ioat_chan_common *chan) 1484static int ioat3_reset_hw(struct ioat_chan_common *chan)
@@ -1718,14 +1521,12 @@ static int ioat3_reset_hw(struct ioat_chan_common *chan)
1718 } 1521 }
1719 1522
1720 err = ioat2_reset_sync(chan, msecs_to_jiffies(200)); 1523 err = ioat2_reset_sync(chan, msecs_to_jiffies(200));
1721 if (err) { 1524 if (!err)
1722 dev_err(&pdev->dev, "Failed to reset!\n");
1723 return err;
1724 }
1725
1726 if (device->irq_mode != IOAT_NOIRQ && is_bwd_ioat(pdev))
1727 err = ioat3_irq_reinit(device); 1525 err = ioat3_irq_reinit(device);
1728 1526
1527 if (err)
1528 dev_err(&pdev->dev, "Failed to reset: %d\n", err);
1529
1729 return err; 1530 return err;
1730} 1531}
1731 1532
@@ -1835,21 +1636,15 @@ int ioat3_dma_probe(struct ioatdma_device *device, int dca)
1835 char pool_name[14]; 1636 char pool_name[14];
1836 int i; 1637 int i;
1837 1638
1838 /* allocate sw descriptor pool for SED */
1839 device->sed_pool = kmem_cache_create("ioat_sed",
1840 sizeof(struct ioat_sed_ent), 0, 0, NULL);
1841 if (!device->sed_pool)
1842 return -ENOMEM;
1843
1844 for (i = 0; i < MAX_SED_POOLS; i++) { 1639 for (i = 0; i < MAX_SED_POOLS; i++) {
1845 snprintf(pool_name, 14, "ioat_hw%d_sed", i); 1640 snprintf(pool_name, 14, "ioat_hw%d_sed", i);
1846 1641
1847 /* allocate SED DMA pool */ 1642 /* allocate SED DMA pool */
1848 device->sed_hw_pool[i] = dma_pool_create(pool_name, 1643 device->sed_hw_pool[i] = dmam_pool_create(pool_name,
1849 &pdev->dev, 1644 &pdev->dev,
1850 SED_SIZE * (i + 1), 64, 0); 1645 SED_SIZE * (i + 1), 64, 0);
1851 if (!device->sed_hw_pool[i]) 1646 if (!device->sed_hw_pool[i])
1852 goto sed_pool_cleanup; 1647 return -ENOMEM;
1853 1648
1854 } 1649 }
1855 } 1650 }
@@ -1875,28 +1670,4 @@ int ioat3_dma_probe(struct ioatdma_device *device, int dca)
1875 device->dca = ioat3_dca_init(pdev, device->reg_base); 1670 device->dca = ioat3_dca_init(pdev, device->reg_base);
1876 1671
1877 return 0; 1672 return 0;
1878
1879sed_pool_cleanup:
1880 if (device->sed_pool) {
1881 int i;
1882 kmem_cache_destroy(device->sed_pool);
1883
1884 for (i = 0; i < MAX_SED_POOLS; i++)
1885 if (device->sed_hw_pool[i])
1886 dma_pool_destroy(device->sed_hw_pool[i]);
1887 }
1888
1889 return -ENOMEM;
1890}
1891
1892void ioat3_dma_remove(struct ioatdma_device *device)
1893{
1894 if (device->sed_pool) {
1895 int i;
1896 kmem_cache_destroy(device->sed_pool);
1897
1898 for (i = 0; i < MAX_SED_POOLS; i++)
1899 if (device->sed_hw_pool[i])
1900 dma_pool_destroy(device->sed_hw_pool[i]);
1901 }
1902} 1673}
diff --git a/drivers/dma/ioat/pci.c b/drivers/dma/ioat/pci.c
index 2c8d560e6334..1d051cd045db 100644
--- a/drivers/dma/ioat/pci.c
+++ b/drivers/dma/ioat/pci.c
@@ -123,6 +123,7 @@ module_param(ioat_dca_enabled, int, 0644);
123MODULE_PARM_DESC(ioat_dca_enabled, "control support of dca service (default: 1)"); 123MODULE_PARM_DESC(ioat_dca_enabled, "control support of dca service (default: 1)");
124 124
125struct kmem_cache *ioat2_cache; 125struct kmem_cache *ioat2_cache;
126struct kmem_cache *ioat3_sed_cache;
126 127
127#define DRV_NAME "ioatdma" 128#define DRV_NAME "ioatdma"
128 129
@@ -207,9 +208,6 @@ static void ioat_remove(struct pci_dev *pdev)
207 if (!device) 208 if (!device)
208 return; 209 return;
209 210
210 if (device->version >= IOAT_VER_3_0)
211 ioat3_dma_remove(device);
212
213 dev_err(&pdev->dev, "Removing dma and dca services\n"); 211 dev_err(&pdev->dev, "Removing dma and dca services\n");
214 if (device->dca) { 212 if (device->dca) {
215 unregister_dca_provider(device->dca, &pdev->dev); 213 unregister_dca_provider(device->dca, &pdev->dev);
@@ -221,7 +219,7 @@ static void ioat_remove(struct pci_dev *pdev)
221 219
222static int __init ioat_init_module(void) 220static int __init ioat_init_module(void)
223{ 221{
224 int err; 222 int err = -ENOMEM;
225 223
226 pr_info("%s: Intel(R) QuickData Technology Driver %s\n", 224 pr_info("%s: Intel(R) QuickData Technology Driver %s\n",
227 DRV_NAME, IOAT_DMA_VERSION); 225 DRV_NAME, IOAT_DMA_VERSION);
@@ -231,9 +229,21 @@ static int __init ioat_init_module(void)
231 if (!ioat2_cache) 229 if (!ioat2_cache)
232 return -ENOMEM; 230 return -ENOMEM;
233 231
232 ioat3_sed_cache = KMEM_CACHE(ioat_sed_ent, 0);
233 if (!ioat3_sed_cache)
234 goto err_ioat2_cache;
235
234 err = pci_register_driver(&ioat_pci_driver); 236 err = pci_register_driver(&ioat_pci_driver);
235 if (err) 237 if (err)
236 kmem_cache_destroy(ioat2_cache); 238 goto err_ioat3_cache;
239
240 return 0;
241
242 err_ioat3_cache:
243 kmem_cache_destroy(ioat3_sed_cache);
244
245 err_ioat2_cache:
246 kmem_cache_destroy(ioat2_cache);
237 247
238 return err; 248 return err;
239} 249}
diff --git a/drivers/dma/iop-adma.c b/drivers/dma/iop-adma.c
index dd8b44a56e5d..c56137bc3868 100644
--- a/drivers/dma/iop-adma.c
+++ b/drivers/dma/iop-adma.c
@@ -61,80 +61,6 @@ static void iop_adma_free_slots(struct iop_adma_desc_slot *slot)
61 } 61 }
62} 62}
63 63
64static void
65iop_desc_unmap(struct iop_adma_chan *iop_chan, struct iop_adma_desc_slot *desc)
66{
67 struct dma_async_tx_descriptor *tx = &desc->async_tx;
68 struct iop_adma_desc_slot *unmap = desc->group_head;
69 struct device *dev = &iop_chan->device->pdev->dev;
70 u32 len = unmap->unmap_len;
71 enum dma_ctrl_flags flags = tx->flags;
72 u32 src_cnt;
73 dma_addr_t addr;
74 dma_addr_t dest;
75
76 src_cnt = unmap->unmap_src_cnt;
77 dest = iop_desc_get_dest_addr(unmap, iop_chan);
78 if (!(flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
79 enum dma_data_direction dir;
80
81 if (src_cnt > 1) /* is xor? */
82 dir = DMA_BIDIRECTIONAL;
83 else
84 dir = DMA_FROM_DEVICE;
85
86 dma_unmap_page(dev, dest, len, dir);
87 }
88
89 if (!(flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
90 while (src_cnt--) {
91 addr = iop_desc_get_src_addr(unmap, iop_chan, src_cnt);
92 if (addr == dest)
93 continue;
94 dma_unmap_page(dev, addr, len, DMA_TO_DEVICE);
95 }
96 }
97 desc->group_head = NULL;
98}
99
100static void
101iop_desc_unmap_pq(struct iop_adma_chan *iop_chan, struct iop_adma_desc_slot *desc)
102{
103 struct dma_async_tx_descriptor *tx = &desc->async_tx;
104 struct iop_adma_desc_slot *unmap = desc->group_head;
105 struct device *dev = &iop_chan->device->pdev->dev;
106 u32 len = unmap->unmap_len;
107 enum dma_ctrl_flags flags = tx->flags;
108 u32 src_cnt = unmap->unmap_src_cnt;
109 dma_addr_t pdest = iop_desc_get_dest_addr(unmap, iop_chan);
110 dma_addr_t qdest = iop_desc_get_qdest_addr(unmap, iop_chan);
111 int i;
112
113 if (tx->flags & DMA_PREP_CONTINUE)
114 src_cnt -= 3;
115
116 if (!(flags & DMA_COMPL_SKIP_DEST_UNMAP) && !desc->pq_check_result) {
117 dma_unmap_page(dev, pdest, len, DMA_BIDIRECTIONAL);
118 dma_unmap_page(dev, qdest, len, DMA_BIDIRECTIONAL);
119 }
120
121 if (!(flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
122 dma_addr_t addr;
123
124 for (i = 0; i < src_cnt; i++) {
125 addr = iop_desc_get_src_addr(unmap, iop_chan, i);
126 dma_unmap_page(dev, addr, len, DMA_TO_DEVICE);
127 }
128 if (desc->pq_check_result) {
129 dma_unmap_page(dev, pdest, len, DMA_TO_DEVICE);
130 dma_unmap_page(dev, qdest, len, DMA_TO_DEVICE);
131 }
132 }
133
134 desc->group_head = NULL;
135}
136
137
138static dma_cookie_t 64static dma_cookie_t
139iop_adma_run_tx_complete_actions(struct iop_adma_desc_slot *desc, 65iop_adma_run_tx_complete_actions(struct iop_adma_desc_slot *desc,
140 struct iop_adma_chan *iop_chan, dma_cookie_t cookie) 66 struct iop_adma_chan *iop_chan, dma_cookie_t cookie)
@@ -152,15 +78,9 @@ iop_adma_run_tx_complete_actions(struct iop_adma_desc_slot *desc,
152 if (tx->callback) 78 if (tx->callback)
153 tx->callback(tx->callback_param); 79 tx->callback(tx->callback_param);
154 80
155 /* unmap dma addresses 81 dma_descriptor_unmap(tx);
156 * (unmap_single vs unmap_page?) 82 if (desc->group_head)
157 */ 83 desc->group_head = NULL;
158 if (desc->group_head && desc->unmap_len) {
159 if (iop_desc_is_pq(desc))
160 iop_desc_unmap_pq(iop_chan, desc);
161 else
162 iop_desc_unmap(iop_chan, desc);
163 }
164 } 84 }
165 85
166 /* run dependent operations */ 86 /* run dependent operations */
@@ -591,7 +511,6 @@ iop_adma_prep_dma_interrupt(struct dma_chan *chan, unsigned long flags)
591 if (sw_desc) { 511 if (sw_desc) {
592 grp_start = sw_desc->group_head; 512 grp_start = sw_desc->group_head;
593 iop_desc_init_interrupt(grp_start, iop_chan); 513 iop_desc_init_interrupt(grp_start, iop_chan);
594 grp_start->unmap_len = 0;
595 sw_desc->async_tx.flags = flags; 514 sw_desc->async_tx.flags = flags;
596 } 515 }
597 spin_unlock_bh(&iop_chan->lock); 516 spin_unlock_bh(&iop_chan->lock);
@@ -623,8 +542,6 @@ iop_adma_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dma_dest,
623 iop_desc_set_byte_count(grp_start, iop_chan, len); 542 iop_desc_set_byte_count(grp_start, iop_chan, len);
624 iop_desc_set_dest_addr(grp_start, iop_chan, dma_dest); 543 iop_desc_set_dest_addr(grp_start, iop_chan, dma_dest);
625 iop_desc_set_memcpy_src_addr(grp_start, dma_src); 544 iop_desc_set_memcpy_src_addr(grp_start, dma_src);
626 sw_desc->unmap_src_cnt = 1;
627 sw_desc->unmap_len = len;
628 sw_desc->async_tx.flags = flags; 545 sw_desc->async_tx.flags = flags;
629 } 546 }
630 spin_unlock_bh(&iop_chan->lock); 547 spin_unlock_bh(&iop_chan->lock);
@@ -657,8 +574,6 @@ iop_adma_prep_dma_xor(struct dma_chan *chan, dma_addr_t dma_dest,
657 iop_desc_init_xor(grp_start, src_cnt, flags); 574 iop_desc_init_xor(grp_start, src_cnt, flags);
658 iop_desc_set_byte_count(grp_start, iop_chan, len); 575 iop_desc_set_byte_count(grp_start, iop_chan, len);
659 iop_desc_set_dest_addr(grp_start, iop_chan, dma_dest); 576 iop_desc_set_dest_addr(grp_start, iop_chan, dma_dest);
660 sw_desc->unmap_src_cnt = src_cnt;
661 sw_desc->unmap_len = len;
662 sw_desc->async_tx.flags = flags; 577 sw_desc->async_tx.flags = flags;
663 while (src_cnt--) 578 while (src_cnt--)
664 iop_desc_set_xor_src_addr(grp_start, src_cnt, 579 iop_desc_set_xor_src_addr(grp_start, src_cnt,
@@ -694,8 +609,6 @@ iop_adma_prep_dma_xor_val(struct dma_chan *chan, dma_addr_t *dma_src,
694 grp_start->xor_check_result = result; 609 grp_start->xor_check_result = result;
695 pr_debug("\t%s: grp_start->xor_check_result: %p\n", 610 pr_debug("\t%s: grp_start->xor_check_result: %p\n",
696 __func__, grp_start->xor_check_result); 611 __func__, grp_start->xor_check_result);
697 sw_desc->unmap_src_cnt = src_cnt;
698 sw_desc->unmap_len = len;
699 sw_desc->async_tx.flags = flags; 612 sw_desc->async_tx.flags = flags;
700 while (src_cnt--) 613 while (src_cnt--)
701 iop_desc_set_zero_sum_src_addr(grp_start, src_cnt, 614 iop_desc_set_zero_sum_src_addr(grp_start, src_cnt,
@@ -748,8 +661,6 @@ iop_adma_prep_dma_pq(struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src,
748 dst[0] = dst[1] & 0x7; 661 dst[0] = dst[1] & 0x7;
749 662
750 iop_desc_set_pq_addr(g, dst); 663 iop_desc_set_pq_addr(g, dst);
751 sw_desc->unmap_src_cnt = src_cnt;
752 sw_desc->unmap_len = len;
753 sw_desc->async_tx.flags = flags; 664 sw_desc->async_tx.flags = flags;
754 for (i = 0; i < src_cnt; i++) 665 for (i = 0; i < src_cnt; i++)
755 iop_desc_set_pq_src_addr(g, i, src[i], scf[i]); 666 iop_desc_set_pq_src_addr(g, i, src[i], scf[i]);
@@ -804,8 +715,6 @@ iop_adma_prep_dma_pq_val(struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src,
804 g->pq_check_result = pqres; 715 g->pq_check_result = pqres;
805 pr_debug("\t%s: g->pq_check_result: %p\n", 716 pr_debug("\t%s: g->pq_check_result: %p\n",
806 __func__, g->pq_check_result); 717 __func__, g->pq_check_result);
807 sw_desc->unmap_src_cnt = src_cnt+2;
808 sw_desc->unmap_len = len;
809 sw_desc->async_tx.flags = flags; 718 sw_desc->async_tx.flags = flags;
810 while (src_cnt--) 719 while (src_cnt--)
811 iop_desc_set_pq_zero_sum_src_addr(g, src_cnt, 720 iop_desc_set_pq_zero_sum_src_addr(g, src_cnt,
@@ -864,7 +773,7 @@ static enum dma_status iop_adma_status(struct dma_chan *chan,
864 int ret; 773 int ret;
865 774
866 ret = dma_cookie_status(chan, cookie, txstate); 775 ret = dma_cookie_status(chan, cookie, txstate);
867 if (ret == DMA_SUCCESS) 776 if (ret == DMA_COMPLETE)
868 return ret; 777 return ret;
869 778
870 iop_adma_slot_cleanup(iop_chan); 779 iop_adma_slot_cleanup(iop_chan);
@@ -983,7 +892,7 @@ static int iop_adma_memcpy_self_test(struct iop_adma_device *device)
983 msleep(1); 892 msleep(1);
984 893
985 if (iop_adma_status(dma_chan, cookie, NULL) != 894 if (iop_adma_status(dma_chan, cookie, NULL) !=
986 DMA_SUCCESS) { 895 DMA_COMPLETE) {
987 dev_err(dma_chan->device->dev, 896 dev_err(dma_chan->device->dev,
988 "Self-test copy timed out, disabling\n"); 897 "Self-test copy timed out, disabling\n");
989 err = -ENODEV; 898 err = -ENODEV;
@@ -1083,7 +992,7 @@ iop_adma_xor_val_self_test(struct iop_adma_device *device)
1083 msleep(8); 992 msleep(8);
1084 993
1085 if (iop_adma_status(dma_chan, cookie, NULL) != 994 if (iop_adma_status(dma_chan, cookie, NULL) !=
1086 DMA_SUCCESS) { 995 DMA_COMPLETE) {
1087 dev_err(dma_chan->device->dev, 996 dev_err(dma_chan->device->dev,
1088 "Self-test xor timed out, disabling\n"); 997 "Self-test xor timed out, disabling\n");
1089 err = -ENODEV; 998 err = -ENODEV;
@@ -1129,7 +1038,7 @@ iop_adma_xor_val_self_test(struct iop_adma_device *device)
1129 iop_adma_issue_pending(dma_chan); 1038 iop_adma_issue_pending(dma_chan);
1130 msleep(8); 1039 msleep(8);
1131 1040
1132 if (iop_adma_status(dma_chan, cookie, NULL) != DMA_SUCCESS) { 1041 if (iop_adma_status(dma_chan, cookie, NULL) != DMA_COMPLETE) {
1133 dev_err(dma_chan->device->dev, 1042 dev_err(dma_chan->device->dev,
1134 "Self-test zero sum timed out, disabling\n"); 1043 "Self-test zero sum timed out, disabling\n");
1135 err = -ENODEV; 1044 err = -ENODEV;
@@ -1158,7 +1067,7 @@ iop_adma_xor_val_self_test(struct iop_adma_device *device)
1158 iop_adma_issue_pending(dma_chan); 1067 iop_adma_issue_pending(dma_chan);
1159 msleep(8); 1068 msleep(8);
1160 1069
1161 if (iop_adma_status(dma_chan, cookie, NULL) != DMA_SUCCESS) { 1070 if (iop_adma_status(dma_chan, cookie, NULL) != DMA_COMPLETE) {
1162 dev_err(dma_chan->device->dev, 1071 dev_err(dma_chan->device->dev,
1163 "Self-test non-zero sum timed out, disabling\n"); 1072 "Self-test non-zero sum timed out, disabling\n");
1164 err = -ENODEV; 1073 err = -ENODEV;
@@ -1254,7 +1163,7 @@ iop_adma_pq_zero_sum_self_test(struct iop_adma_device *device)
1254 msleep(8); 1163 msleep(8);
1255 1164
1256 if (iop_adma_status(dma_chan, cookie, NULL) != 1165 if (iop_adma_status(dma_chan, cookie, NULL) !=
1257 DMA_SUCCESS) { 1166 DMA_COMPLETE) {
1258 dev_err(dev, "Self-test pq timed out, disabling\n"); 1167 dev_err(dev, "Self-test pq timed out, disabling\n");
1259 err = -ENODEV; 1168 err = -ENODEV;
1260 goto free_resources; 1169 goto free_resources;
@@ -1291,7 +1200,7 @@ iop_adma_pq_zero_sum_self_test(struct iop_adma_device *device)
1291 msleep(8); 1200 msleep(8);
1292 1201
1293 if (iop_adma_status(dma_chan, cookie, NULL) != 1202 if (iop_adma_status(dma_chan, cookie, NULL) !=
1294 DMA_SUCCESS) { 1203 DMA_COMPLETE) {
1295 dev_err(dev, "Self-test pq-zero-sum timed out, disabling\n"); 1204 dev_err(dev, "Self-test pq-zero-sum timed out, disabling\n");
1296 err = -ENODEV; 1205 err = -ENODEV;
1297 goto free_resources; 1206 goto free_resources;
@@ -1323,7 +1232,7 @@ iop_adma_pq_zero_sum_self_test(struct iop_adma_device *device)
1323 msleep(8); 1232 msleep(8);
1324 1233
1325 if (iop_adma_status(dma_chan, cookie, NULL) != 1234 if (iop_adma_status(dma_chan, cookie, NULL) !=
1326 DMA_SUCCESS) { 1235 DMA_COMPLETE) {
1327 dev_err(dev, "Self-test !pq-zero-sum timed out, disabling\n"); 1236 dev_err(dev, "Self-test !pq-zero-sum timed out, disabling\n");
1328 err = -ENODEV; 1237 err = -ENODEV;
1329 goto free_resources; 1238 goto free_resources;
diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c
index cb9c0bc317e8..128ca143486d 100644
--- a/drivers/dma/ipu/ipu_idmac.c
+++ b/drivers/dma/ipu/ipu_idmac.c
@@ -1232,8 +1232,10 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id)
1232 desc = list_entry(ichan->queue.next, struct idmac_tx_desc, list); 1232 desc = list_entry(ichan->queue.next, struct idmac_tx_desc, list);
1233 descnew = desc; 1233 descnew = desc;
1234 1234
1235 dev_dbg(dev, "IDMAC irq %d, dma 0x%08x, next dma 0x%08x, current %d, curbuf 0x%08x\n", 1235 dev_dbg(dev, "IDMAC irq %d, dma %#llx, next dma %#llx, current %d, curbuf %#x\n",
1236 irq, sg_dma_address(*sg), sgnext ? sg_dma_address(sgnext) : 0, ichan->active_buffer, curbuf); 1236 irq, (u64)sg_dma_address(*sg),
1237 sgnext ? (u64)sg_dma_address(sgnext) : 0,
1238 ichan->active_buffer, curbuf);
1237 1239
1238 /* Find the descriptor of sgnext */ 1240 /* Find the descriptor of sgnext */
1239 sgnew = idmac_sg_next(ichan, &descnew, *sg); 1241 sgnew = idmac_sg_next(ichan, &descnew, *sg);
diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
index a2c330f5f952..e26075408e9b 100644
--- a/drivers/dma/k3dma.c
+++ b/drivers/dma/k3dma.c
@@ -344,7 +344,7 @@ static enum dma_status k3_dma_tx_status(struct dma_chan *chan,
344 size_t bytes = 0; 344 size_t bytes = 0;
345 345
346 ret = dma_cookie_status(&c->vc.chan, cookie, state); 346 ret = dma_cookie_status(&c->vc.chan, cookie, state);
347 if (ret == DMA_SUCCESS) 347 if (ret == DMA_COMPLETE)
348 return ret; 348 return ret;
349 349
350 spin_lock_irqsave(&c->vc.lock, flags); 350 spin_lock_irqsave(&c->vc.lock, flags);
@@ -693,7 +693,7 @@ static int k3_dma_probe(struct platform_device *op)
693 693
694 irq = platform_get_irq(op, 0); 694 irq = platform_get_irq(op, 0);
695 ret = devm_request_irq(&op->dev, irq, 695 ret = devm_request_irq(&op->dev, irq,
696 k3_dma_int_handler, IRQF_DISABLED, DRIVER_NAME, d); 696 k3_dma_int_handler, 0, DRIVER_NAME, d);
697 if (ret) 697 if (ret)
698 return ret; 698 return ret;
699 699
diff --git a/drivers/dma/mmp_pdma.c b/drivers/dma/mmp_pdma.c
index ff8d7827f8cb..dcb1e05149a7 100644
--- a/drivers/dma/mmp_pdma.c
+++ b/drivers/dma/mmp_pdma.c
@@ -798,8 +798,7 @@ static void dma_do_tasklet(unsigned long data)
798 * move the descriptors to a temporary list so we can drop 798 * move the descriptors to a temporary list so we can drop
799 * the lock during the entire cleanup operation 799 * the lock during the entire cleanup operation
800 */ 800 */
801 list_del(&desc->node); 801 list_move(&desc->node, &chain_cleanup);
802 list_add(&desc->node, &chain_cleanup);
803 802
804 /* 803 /*
805 * Look for the first list entry which has the ENDIRQEN flag 804 * Look for the first list entry which has the ENDIRQEN flag
@@ -863,7 +862,7 @@ static int mmp_pdma_chan_init(struct mmp_pdma_device *pdev,
863 862
864 if (irq) { 863 if (irq) {
865 ret = devm_request_irq(pdev->dev, irq, 864 ret = devm_request_irq(pdev->dev, irq,
866 mmp_pdma_chan_handler, IRQF_DISABLED, "pdma", phy); 865 mmp_pdma_chan_handler, 0, "pdma", phy);
867 if (ret) { 866 if (ret) {
868 dev_err(pdev->dev, "channel request irq fail!\n"); 867 dev_err(pdev->dev, "channel request irq fail!\n");
869 return ret; 868 return ret;
@@ -970,7 +969,7 @@ static int mmp_pdma_probe(struct platform_device *op)
970 /* all chan share one irq, demux inside */ 969 /* all chan share one irq, demux inside */
971 irq = platform_get_irq(op, 0); 970 irq = platform_get_irq(op, 0);
972 ret = devm_request_irq(pdev->dev, irq, 971 ret = devm_request_irq(pdev->dev, irq,
973 mmp_pdma_int_handler, IRQF_DISABLED, "pdma", pdev); 972 mmp_pdma_int_handler, 0, "pdma", pdev);
974 if (ret) 973 if (ret)
975 return ret; 974 return ret;
976 } 975 }
diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index d3b6358e5a27..3ddacc14a736 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -62,6 +62,11 @@
62#define TDCR_BURSTSZ_16B (0x3 << 6) 62#define TDCR_BURSTSZ_16B (0x3 << 6)
63#define TDCR_BURSTSZ_32B (0x6 << 6) 63#define TDCR_BURSTSZ_32B (0x6 << 6)
64#define TDCR_BURSTSZ_64B (0x7 << 6) 64#define TDCR_BURSTSZ_64B (0x7 << 6)
65#define TDCR_BURSTSZ_SQU_1B (0x5 << 6)
66#define TDCR_BURSTSZ_SQU_2B (0x6 << 6)
67#define TDCR_BURSTSZ_SQU_4B (0x0 << 6)
68#define TDCR_BURSTSZ_SQU_8B (0x1 << 6)
69#define TDCR_BURSTSZ_SQU_16B (0x3 << 6)
65#define TDCR_BURSTSZ_SQU_32B (0x7 << 6) 70#define TDCR_BURSTSZ_SQU_32B (0x7 << 6)
66#define TDCR_BURSTSZ_128B (0x5 << 6) 71#define TDCR_BURSTSZ_128B (0x5 << 6)
67#define TDCR_DSTDIR_MSK (0x3 << 4) /* Dst Direction */ 72#define TDCR_DSTDIR_MSK (0x3 << 4) /* Dst Direction */
@@ -158,7 +163,7 @@ static void mmp_tdma_disable_chan(struct mmp_tdma_chan *tdmac)
158 /* disable irq */ 163 /* disable irq */
159 writel(0, tdmac->reg_base + TDIMR); 164 writel(0, tdmac->reg_base + TDIMR);
160 165
161 tdmac->status = DMA_SUCCESS; 166 tdmac->status = DMA_COMPLETE;
162} 167}
163 168
164static void mmp_tdma_resume_chan(struct mmp_tdma_chan *tdmac) 169static void mmp_tdma_resume_chan(struct mmp_tdma_chan *tdmac)
@@ -228,8 +233,31 @@ static int mmp_tdma_config_chan(struct mmp_tdma_chan *tdmac)
228 return -EINVAL; 233 return -EINVAL;
229 } 234 }
230 } else if (tdmac->type == PXA910_SQU) { 235 } else if (tdmac->type == PXA910_SQU) {
231 tdcr |= TDCR_BURSTSZ_SQU_32B;
232 tdcr |= TDCR_SSPMOD; 236 tdcr |= TDCR_SSPMOD;
237
238 switch (tdmac->burst_sz) {
239 case 1:
240 tdcr |= TDCR_BURSTSZ_SQU_1B;
241 break;
242 case 2:
243 tdcr |= TDCR_BURSTSZ_SQU_2B;
244 break;
245 case 4:
246 tdcr |= TDCR_BURSTSZ_SQU_4B;
247 break;
248 case 8:
249 tdcr |= TDCR_BURSTSZ_SQU_8B;
250 break;
251 case 16:
252 tdcr |= TDCR_BURSTSZ_SQU_16B;
253 break;
254 case 32:
255 tdcr |= TDCR_BURSTSZ_SQU_32B;
256 break;
257 default:
258 dev_err(tdmac->dev, "mmp_tdma: unknown burst size.\n");
259 return -EINVAL;
260 }
233 } 261 }
234 262
235 writel(tdcr, tdmac->reg_base + TDCR); 263 writel(tdcr, tdmac->reg_base + TDCR);
@@ -324,7 +352,7 @@ static int mmp_tdma_alloc_chan_resources(struct dma_chan *chan)
324 352
325 if (tdmac->irq) { 353 if (tdmac->irq) {
326 ret = devm_request_irq(tdmac->dev, tdmac->irq, 354 ret = devm_request_irq(tdmac->dev, tdmac->irq,
327 mmp_tdma_chan_handler, IRQF_DISABLED, "tdma", tdmac); 355 mmp_tdma_chan_handler, 0, "tdma", tdmac);
328 if (ret) 356 if (ret)
329 return ret; 357 return ret;
330 } 358 }
@@ -365,7 +393,7 @@ static struct dma_async_tx_descriptor *mmp_tdma_prep_dma_cyclic(
365 int num_periods = buf_len / period_len; 393 int num_periods = buf_len / period_len;
366 int i = 0, buf = 0; 394 int i = 0, buf = 0;
367 395
368 if (tdmac->status != DMA_SUCCESS) 396 if (tdmac->status != DMA_COMPLETE)
369 return NULL; 397 return NULL;
370 398
371 if (period_len > TDMA_MAX_XFER_BYTES) { 399 if (period_len > TDMA_MAX_XFER_BYTES) {
@@ -499,7 +527,7 @@ static int mmp_tdma_chan_init(struct mmp_tdma_device *tdev,
499 tdmac->idx = idx; 527 tdmac->idx = idx;
500 tdmac->type = type; 528 tdmac->type = type;
501 tdmac->reg_base = (unsigned long)tdev->base + idx * 4; 529 tdmac->reg_base = (unsigned long)tdev->base + idx * 4;
502 tdmac->status = DMA_SUCCESS; 530 tdmac->status = DMA_COMPLETE;
503 tdev->tdmac[tdmac->idx] = tdmac; 531 tdev->tdmac[tdmac->idx] = tdmac;
504 tasklet_init(&tdmac->tasklet, dma_do_tasklet, (unsigned long)tdmac); 532 tasklet_init(&tdmac->tasklet, dma_do_tasklet, (unsigned long)tdmac);
505 533
@@ -554,7 +582,7 @@ static int mmp_tdma_probe(struct platform_device *pdev)
554 if (irq_num != chan_num) { 582 if (irq_num != chan_num) {
555 irq = platform_get_irq(pdev, 0); 583 irq = platform_get_irq(pdev, 0);
556 ret = devm_request_irq(&pdev->dev, irq, 584 ret = devm_request_irq(&pdev->dev, irq,
557 mmp_tdma_int_handler, IRQF_DISABLED, "tdma", tdev); 585 mmp_tdma_int_handler, 0, "tdma", tdev);
558 if (ret) 586 if (ret)
559 return ret; 587 return ret;
560 } 588 }
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index 536dcb8ba5fd..7807f0ef4e20 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -60,14 +60,6 @@ static u32 mv_desc_get_dest_addr(struct mv_xor_desc_slot *desc)
60 return hw_desc->phy_dest_addr; 60 return hw_desc->phy_dest_addr;
61} 61}
62 62
63static u32 mv_desc_get_src_addr(struct mv_xor_desc_slot *desc,
64 int src_idx)
65{
66 struct mv_xor_desc *hw_desc = desc->hw_desc;
67 return hw_desc->phy_src_addr[mv_phy_src_idx(src_idx)];
68}
69
70
71static void mv_desc_set_byte_count(struct mv_xor_desc_slot *desc, 63static void mv_desc_set_byte_count(struct mv_xor_desc_slot *desc,
72 u32 byte_count) 64 u32 byte_count)
73{ 65{
@@ -278,42 +270,9 @@ mv_xor_run_tx_complete_actions(struct mv_xor_desc_slot *desc,
278 desc->async_tx.callback( 270 desc->async_tx.callback(
279 desc->async_tx.callback_param); 271 desc->async_tx.callback_param);
280 272
281 /* unmap dma addresses 273 dma_descriptor_unmap(&desc->async_tx);
282 * (unmap_single vs unmap_page?) 274 if (desc->group_head)
283 */
284 if (desc->group_head && desc->unmap_len) {
285 struct mv_xor_desc_slot *unmap = desc->group_head;
286 struct device *dev = mv_chan_to_devp(mv_chan);
287 u32 len = unmap->unmap_len;
288 enum dma_ctrl_flags flags = desc->async_tx.flags;
289 u32 src_cnt;
290 dma_addr_t addr;
291 dma_addr_t dest;
292
293 src_cnt = unmap->unmap_src_cnt;
294 dest = mv_desc_get_dest_addr(unmap);
295 if (!(flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
296 enum dma_data_direction dir;
297
298 if (src_cnt > 1) /* is xor ? */
299 dir = DMA_BIDIRECTIONAL;
300 else
301 dir = DMA_FROM_DEVICE;
302 dma_unmap_page(dev, dest, len, dir);
303 }
304
305 if (!(flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
306 while (src_cnt--) {
307 addr = mv_desc_get_src_addr(unmap,
308 src_cnt);
309 if (addr == dest)
310 continue;
311 dma_unmap_page(dev, addr, len,
312 DMA_TO_DEVICE);
313 }
314 }
315 desc->group_head = NULL; 275 desc->group_head = NULL;
316 }
317 } 276 }
318 277
319 /* run dependent operations */ 278 /* run dependent operations */
@@ -749,7 +708,7 @@ static enum dma_status mv_xor_status(struct dma_chan *chan,
749 enum dma_status ret; 708 enum dma_status ret;
750 709
751 ret = dma_cookie_status(chan, cookie, txstate); 710 ret = dma_cookie_status(chan, cookie, txstate);
752 if (ret == DMA_SUCCESS) { 711 if (ret == DMA_COMPLETE) {
753 mv_xor_clean_completed_slots(mv_chan); 712 mv_xor_clean_completed_slots(mv_chan);
754 return ret; 713 return ret;
755 } 714 }
@@ -874,7 +833,7 @@ static int mv_xor_memcpy_self_test(struct mv_xor_chan *mv_chan)
874 msleep(1); 833 msleep(1);
875 834
876 if (mv_xor_status(dma_chan, cookie, NULL) != 835 if (mv_xor_status(dma_chan, cookie, NULL) !=
877 DMA_SUCCESS) { 836 DMA_COMPLETE) {
878 dev_err(dma_chan->device->dev, 837 dev_err(dma_chan->device->dev,
879 "Self-test copy timed out, disabling\n"); 838 "Self-test copy timed out, disabling\n");
880 err = -ENODEV; 839 err = -ENODEV;
@@ -968,7 +927,7 @@ mv_xor_xor_self_test(struct mv_xor_chan *mv_chan)
968 msleep(8); 927 msleep(8);
969 928
970 if (mv_xor_status(dma_chan, cookie, NULL) != 929 if (mv_xor_status(dma_chan, cookie, NULL) !=
971 DMA_SUCCESS) { 930 DMA_COMPLETE) {
972 dev_err(dma_chan->device->dev, 931 dev_err(dma_chan->device->dev,
973 "Self-test xor timed out, disabling\n"); 932 "Self-test xor timed out, disabling\n");
974 err = -ENODEV; 933 err = -ENODEV;
@@ -1076,10 +1035,7 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
1076 } 1035 }
1077 1036
1078 mv_chan->mmr_base = xordev->xor_base; 1037 mv_chan->mmr_base = xordev->xor_base;
1079 if (!mv_chan->mmr_base) { 1038 mv_chan->mmr_high_base = xordev->xor_high_base;
1080 ret = -ENOMEM;
1081 goto err_free_dma;
1082 }
1083 tasklet_init(&mv_chan->irq_tasklet, mv_xor_tasklet, (unsigned long) 1039 tasklet_init(&mv_chan->irq_tasklet, mv_xor_tasklet, (unsigned long)
1084 mv_chan); 1040 mv_chan);
1085 1041
@@ -1138,7 +1094,7 @@ static void
1138mv_xor_conf_mbus_windows(struct mv_xor_device *xordev, 1094mv_xor_conf_mbus_windows(struct mv_xor_device *xordev,
1139 const struct mbus_dram_target_info *dram) 1095 const struct mbus_dram_target_info *dram)
1140{ 1096{
1141 void __iomem *base = xordev->xor_base; 1097 void __iomem *base = xordev->xor_high_base;
1142 u32 win_enable = 0; 1098 u32 win_enable = 0;
1143 int i; 1099 int i;
1144 1100
diff --git a/drivers/dma/mv_xor.h b/drivers/dma/mv_xor.h
index 06b067f24c9b..d0749229c875 100644
--- a/drivers/dma/mv_xor.h
+++ b/drivers/dma/mv_xor.h
@@ -34,13 +34,13 @@
34#define XOR_OPERATION_MODE_MEMCPY 2 34#define XOR_OPERATION_MODE_MEMCPY 2
35#define XOR_DESCRIPTOR_SWAP BIT(14) 35#define XOR_DESCRIPTOR_SWAP BIT(14)
36 36
37#define XOR_CURR_DESC(chan) (chan->mmr_base + 0x210 + (chan->idx * 4)) 37#define XOR_CURR_DESC(chan) (chan->mmr_high_base + 0x10 + (chan->idx * 4))
38#define XOR_NEXT_DESC(chan) (chan->mmr_base + 0x200 + (chan->idx * 4)) 38#define XOR_NEXT_DESC(chan) (chan->mmr_high_base + 0x00 + (chan->idx * 4))
39#define XOR_BYTE_COUNT(chan) (chan->mmr_base + 0x220 + (chan->idx * 4)) 39#define XOR_BYTE_COUNT(chan) (chan->mmr_high_base + 0x20 + (chan->idx * 4))
40#define XOR_DEST_POINTER(chan) (chan->mmr_base + 0x2B0 + (chan->idx * 4)) 40#define XOR_DEST_POINTER(chan) (chan->mmr_high_base + 0xB0 + (chan->idx * 4))
41#define XOR_BLOCK_SIZE(chan) (chan->mmr_base + 0x2C0 + (chan->idx * 4)) 41#define XOR_BLOCK_SIZE(chan) (chan->mmr_high_base + 0xC0 + (chan->idx * 4))
42#define XOR_INIT_VALUE_LOW(chan) (chan->mmr_base + 0x2E0) 42#define XOR_INIT_VALUE_LOW(chan) (chan->mmr_high_base + 0xE0)
43#define XOR_INIT_VALUE_HIGH(chan) (chan->mmr_base + 0x2E4) 43#define XOR_INIT_VALUE_HIGH(chan) (chan->mmr_high_base + 0xE4)
44 44
45#define XOR_CONFIG(chan) (chan->mmr_base + 0x10 + (chan->idx * 4)) 45#define XOR_CONFIG(chan) (chan->mmr_base + 0x10 + (chan->idx * 4))
46#define XOR_ACTIVATION(chan) (chan->mmr_base + 0x20 + (chan->idx * 4)) 46#define XOR_ACTIVATION(chan) (chan->mmr_base + 0x20 + (chan->idx * 4))
@@ -50,11 +50,11 @@
50#define XOR_ERROR_ADDR(chan) (chan->mmr_base + 0x60) 50#define XOR_ERROR_ADDR(chan) (chan->mmr_base + 0x60)
51#define XOR_INTR_MASK_VALUE 0x3F5 51#define XOR_INTR_MASK_VALUE 0x3F5
52 52
53#define WINDOW_BASE(w) (0x250 + ((w) << 2)) 53#define WINDOW_BASE(w) (0x50 + ((w) << 2))
54#define WINDOW_SIZE(w) (0x270 + ((w) << 2)) 54#define WINDOW_SIZE(w) (0x70 + ((w) << 2))
55#define WINDOW_REMAP_HIGH(w) (0x290 + ((w) << 2)) 55#define WINDOW_REMAP_HIGH(w) (0x90 + ((w) << 2))
56#define WINDOW_BAR_ENABLE(chan) (0x240 + ((chan) << 2)) 56#define WINDOW_BAR_ENABLE(chan) (0x40 + ((chan) << 2))
57#define WINDOW_OVERRIDE_CTRL(chan) (0x2A0 + ((chan) << 2)) 57#define WINDOW_OVERRIDE_CTRL(chan) (0xA0 + ((chan) << 2))
58 58
59struct mv_xor_device { 59struct mv_xor_device {
60 void __iomem *xor_base; 60 void __iomem *xor_base;
@@ -82,6 +82,7 @@ struct mv_xor_chan {
82 int pending; 82 int pending;
83 spinlock_t lock; /* protects the descriptor slot pool */ 83 spinlock_t lock; /* protects the descriptor slot pool */
84 void __iomem *mmr_base; 84 void __iomem *mmr_base;
85 void __iomem *mmr_high_base;
85 unsigned int idx; 86 unsigned int idx;
86 int irq; 87 int irq;
87 enum dma_transaction_type current_type; 88 enum dma_transaction_type current_type;
diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c
index ccd13df841db..ead491346da7 100644
--- a/drivers/dma/mxs-dma.c
+++ b/drivers/dma/mxs-dma.c
@@ -27,6 +27,7 @@
27#include <linux/of.h> 27#include <linux/of.h>
28#include <linux/of_device.h> 28#include <linux/of_device.h>
29#include <linux/of_dma.h> 29#include <linux/of_dma.h>
30#include <linux/list.h>
30 31
31#include <asm/irq.h> 32#include <asm/irq.h>
32 33
@@ -57,6 +58,9 @@
57 (((dma_is_apbh(d) && apbh_is_old(d)) ? 0x050 : 0x110) + (n) * 0x70) 58 (((dma_is_apbh(d) && apbh_is_old(d)) ? 0x050 : 0x110) + (n) * 0x70)
58#define HW_APBHX_CHn_SEMA(d, n) \ 59#define HW_APBHX_CHn_SEMA(d, n) \
59 (((dma_is_apbh(d) && apbh_is_old(d)) ? 0x080 : 0x140) + (n) * 0x70) 60 (((dma_is_apbh(d) && apbh_is_old(d)) ? 0x080 : 0x140) + (n) * 0x70)
61#define HW_APBHX_CHn_BAR(d, n) \
62 (((dma_is_apbh(d) && apbh_is_old(d)) ? 0x070 : 0x130) + (n) * 0x70)
63#define HW_APBX_CHn_DEBUG1(d, n) (0x150 + (n) * 0x70)
60 64
61/* 65/*
62 * ccw bits definitions 66 * ccw bits definitions
@@ -115,7 +119,9 @@ struct mxs_dma_chan {
115 int desc_count; 119 int desc_count;
116 enum dma_status status; 120 enum dma_status status;
117 unsigned int flags; 121 unsigned int flags;
122 bool reset;
118#define MXS_DMA_SG_LOOP (1 << 0) 123#define MXS_DMA_SG_LOOP (1 << 0)
124#define MXS_DMA_USE_SEMAPHORE (1 << 1)
119}; 125};
120 126
121#define MXS_DMA_CHANNELS 16 127#define MXS_DMA_CHANNELS 16
@@ -201,12 +207,47 @@ static void mxs_dma_reset_chan(struct mxs_dma_chan *mxs_chan)
201 struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma; 207 struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma;
202 int chan_id = mxs_chan->chan.chan_id; 208 int chan_id = mxs_chan->chan.chan_id;
203 209
204 if (dma_is_apbh(mxs_dma) && apbh_is_old(mxs_dma)) 210 /*
211 * mxs dma channel resets can cause a channel stall. To recover from a
212 * channel stall, we have to reset the whole DMA engine. To avoid this,
213 * we use cyclic DMA with semaphores, that are enhanced in
214 * mxs_dma_int_handler. To reset the channel, we can simply stop writing
215 * into the semaphore counter.
216 */
217 if (mxs_chan->flags & MXS_DMA_USE_SEMAPHORE &&
218 mxs_chan->flags & MXS_DMA_SG_LOOP) {
219 mxs_chan->reset = true;
220 } else if (dma_is_apbh(mxs_dma) && apbh_is_old(mxs_dma)) {
205 writel(1 << (chan_id + BP_APBH_CTRL0_RESET_CHANNEL), 221 writel(1 << (chan_id + BP_APBH_CTRL0_RESET_CHANNEL),
206 mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET); 222 mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);
207 else 223 } else {
224 unsigned long elapsed = 0;
225 const unsigned long max_wait = 50000; /* 50ms */
226 void __iomem *reg_dbg1 = mxs_dma->base +
227 HW_APBX_CHn_DEBUG1(mxs_dma, chan_id);
228
229 /*
230 * On i.MX28 APBX, the DMA channel can stop working if we reset
231 * the channel while it is in READ_FLUSH (0x08) state.
232 * We wait here until we leave the state. Then we trigger the
233 * reset. Waiting a maximum of 50ms, the kernel shouldn't crash
234 * because of this.
235 */
236 while ((readl(reg_dbg1) & 0xf) == 0x8 && elapsed < max_wait) {
237 udelay(100);
238 elapsed += 100;
239 }
240
241 if (elapsed >= max_wait)
242 dev_err(&mxs_chan->mxs_dma->pdev->dev,
243 "Failed waiting for the DMA channel %d to leave state READ_FLUSH, trying to reset channel in READ_FLUSH state now\n",
244 chan_id);
245
208 writel(1 << (chan_id + BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL), 246 writel(1 << (chan_id + BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL),
209 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_SET); 247 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_SET);
248 }
249
250 mxs_chan->status = DMA_COMPLETE;
210} 251}
211 252
212static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan) 253static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan)
@@ -219,12 +260,21 @@ static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan)
219 mxs_dma->base + HW_APBHX_CHn_NXTCMDAR(mxs_dma, chan_id)); 260 mxs_dma->base + HW_APBHX_CHn_NXTCMDAR(mxs_dma, chan_id));
220 261
221 /* write 1 to SEMA to kick off the channel */ 262 /* write 1 to SEMA to kick off the channel */
222 writel(1, mxs_dma->base + HW_APBHX_CHn_SEMA(mxs_dma, chan_id)); 263 if (mxs_chan->flags & MXS_DMA_USE_SEMAPHORE &&
264 mxs_chan->flags & MXS_DMA_SG_LOOP) {
265 /* A cyclic DMA consists of at least 2 segments, so initialize
266 * the semaphore with 2 so we have enough time to add 1 to the
267 * semaphore if we need to */
268 writel(2, mxs_dma->base + HW_APBHX_CHn_SEMA(mxs_dma, chan_id));
269 } else {
270 writel(1, mxs_dma->base + HW_APBHX_CHn_SEMA(mxs_dma, chan_id));
271 }
272 mxs_chan->reset = false;
223} 273}
224 274
225static void mxs_dma_disable_chan(struct mxs_dma_chan *mxs_chan) 275static void mxs_dma_disable_chan(struct mxs_dma_chan *mxs_chan)
226{ 276{
227 mxs_chan->status = DMA_SUCCESS; 277 mxs_chan->status = DMA_COMPLETE;
228} 278}
229 279
230static void mxs_dma_pause_chan(struct mxs_dma_chan *mxs_chan) 280static void mxs_dma_pause_chan(struct mxs_dma_chan *mxs_chan)
@@ -272,58 +322,88 @@ static void mxs_dma_tasklet(unsigned long data)
272 mxs_chan->desc.callback(mxs_chan->desc.callback_param); 322 mxs_chan->desc.callback(mxs_chan->desc.callback_param);
273} 323}
274 324
325static int mxs_dma_irq_to_chan(struct mxs_dma_engine *mxs_dma, int irq)
326{
327 int i;
328
329 for (i = 0; i != mxs_dma->nr_channels; ++i)
330 if (mxs_dma->mxs_chans[i].chan_irq == irq)
331 return i;
332
333 return -EINVAL;
334}
335
275static irqreturn_t mxs_dma_int_handler(int irq, void *dev_id) 336static irqreturn_t mxs_dma_int_handler(int irq, void *dev_id)
276{ 337{
277 struct mxs_dma_engine *mxs_dma = dev_id; 338 struct mxs_dma_engine *mxs_dma = dev_id;
278 u32 stat1, stat2; 339 struct mxs_dma_chan *mxs_chan;
340 u32 completed;
341 u32 err;
342 int chan = mxs_dma_irq_to_chan(mxs_dma, irq);
343
344 if (chan < 0)
345 return IRQ_NONE;
279 346
280 /* completion status */ 347 /* completion status */
281 stat1 = readl(mxs_dma->base + HW_APBHX_CTRL1); 348 completed = readl(mxs_dma->base + HW_APBHX_CTRL1);
282 stat1 &= MXS_DMA_CHANNELS_MASK; 349 completed = (completed >> chan) & 0x1;
283 writel(stat1, mxs_dma->base + HW_APBHX_CTRL1 + STMP_OFFSET_REG_CLR); 350
351 /* Clear interrupt */
352 writel((1 << chan),
353 mxs_dma->base + HW_APBHX_CTRL1 + STMP_OFFSET_REG_CLR);
284 354
285 /* error status */ 355 /* error status */
286 stat2 = readl(mxs_dma->base + HW_APBHX_CTRL2); 356 err = readl(mxs_dma->base + HW_APBHX_CTRL2);
287 writel(stat2, mxs_dma->base + HW_APBHX_CTRL2 + STMP_OFFSET_REG_CLR); 357 err &= (1 << (MXS_DMA_CHANNELS + chan)) | (1 << chan);
358
359 /*
360 * error status bit is in the upper 16 bits, error irq bit in the lower
361 * 16 bits. We transform it into a simpler error code:
362 * err: 0x00 = no error, 0x01 = TERMINATION, 0x02 = BUS_ERROR
363 */
364 err = (err >> (MXS_DMA_CHANNELS + chan)) + (err >> chan);
365
366 /* Clear error irq */
367 writel((1 << chan),
368 mxs_dma->base + HW_APBHX_CTRL2 + STMP_OFFSET_REG_CLR);
288 369
289 /* 370 /*
290 * When both completion and error of termination bits set at the 371 * When both completion and error of termination bits set at the
291 * same time, we do not take it as an error. IOW, it only becomes 372 * same time, we do not take it as an error. IOW, it only becomes
292 * an error we need to handle here in case of either it's (1) a bus 373 * an error we need to handle here in case of either it's a bus
293 * error or (2) a termination error with no completion. 374 * error or a termination error with no completion. 0x01 is termination
375 * error, so we can subtract err & completed to get the real error case.
294 */ 376 */
295 stat2 = ((stat2 >> MXS_DMA_CHANNELS) & stat2) | /* (1) */ 377 err -= err & completed;
296 (~(stat2 >> MXS_DMA_CHANNELS) & stat2 & ~stat1); /* (2) */
297
298 /* combine error and completion status for checking */
299 stat1 = (stat2 << MXS_DMA_CHANNELS) | stat1;
300 while (stat1) {
301 int channel = fls(stat1) - 1;
302 struct mxs_dma_chan *mxs_chan =
303 &mxs_dma->mxs_chans[channel % MXS_DMA_CHANNELS];
304
305 if (channel >= MXS_DMA_CHANNELS) {
306 dev_dbg(mxs_dma->dma_device.dev,
307 "%s: error in channel %d\n", __func__,
308 channel - MXS_DMA_CHANNELS);
309 mxs_chan->status = DMA_ERROR;
310 mxs_dma_reset_chan(mxs_chan);
311 } else {
312 if (mxs_chan->flags & MXS_DMA_SG_LOOP)
313 mxs_chan->status = DMA_IN_PROGRESS;
314 else
315 mxs_chan->status = DMA_SUCCESS;
316 }
317 378
318 stat1 &= ~(1 << channel); 379 mxs_chan = &mxs_dma->mxs_chans[chan];
319 380
320 if (mxs_chan->status == DMA_SUCCESS) 381 if (err) {
321 dma_cookie_complete(&mxs_chan->desc); 382 dev_dbg(mxs_dma->dma_device.dev,
383 "%s: error in channel %d\n", __func__,
384 chan);
385 mxs_chan->status = DMA_ERROR;
386 mxs_dma_reset_chan(mxs_chan);
387 } else if (mxs_chan->status != DMA_COMPLETE) {
388 if (mxs_chan->flags & MXS_DMA_SG_LOOP) {
389 mxs_chan->status = DMA_IN_PROGRESS;
390 if (mxs_chan->flags & MXS_DMA_USE_SEMAPHORE)
391 writel(1, mxs_dma->base +
392 HW_APBHX_CHn_SEMA(mxs_dma, chan));
393 } else {
394 mxs_chan->status = DMA_COMPLETE;
395 }
396 }
322 397
323 /* schedule tasklet on this channel */ 398 if (mxs_chan->status == DMA_COMPLETE) {
324 tasklet_schedule(&mxs_chan->tasklet); 399 if (mxs_chan->reset)
400 return IRQ_HANDLED;
401 dma_cookie_complete(&mxs_chan->desc);
325 } 402 }
326 403
404 /* schedule tasklet on this channel */
405 tasklet_schedule(&mxs_chan->tasklet);
406
327 return IRQ_HANDLED; 407 return IRQ_HANDLED;
328} 408}
329 409
@@ -523,6 +603,7 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_dma_cyclic(
523 603
524 mxs_chan->status = DMA_IN_PROGRESS; 604 mxs_chan->status = DMA_IN_PROGRESS;
525 mxs_chan->flags |= MXS_DMA_SG_LOOP; 605 mxs_chan->flags |= MXS_DMA_SG_LOOP;
606 mxs_chan->flags |= MXS_DMA_USE_SEMAPHORE;
526 607
527 if (num_periods > NUM_CCW) { 608 if (num_periods > NUM_CCW) {
528 dev_err(mxs_dma->dma_device.dev, 609 dev_err(mxs_dma->dma_device.dev,
@@ -554,6 +635,7 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_dma_cyclic(
554 ccw->bits |= CCW_IRQ; 635 ccw->bits |= CCW_IRQ;
555 ccw->bits |= CCW_HALT_ON_TERM; 636 ccw->bits |= CCW_HALT_ON_TERM;
556 ccw->bits |= CCW_TERM_FLUSH; 637 ccw->bits |= CCW_TERM_FLUSH;
638 ccw->bits |= CCW_DEC_SEM;
557 ccw->bits |= BF_CCW(direction == DMA_DEV_TO_MEM ? 639 ccw->bits |= BF_CCW(direction == DMA_DEV_TO_MEM ?
558 MXS_DMA_CMD_WRITE : MXS_DMA_CMD_READ, COMMAND); 640 MXS_DMA_CMD_WRITE : MXS_DMA_CMD_READ, COMMAND);
559 641
@@ -599,8 +681,24 @@ static enum dma_status mxs_dma_tx_status(struct dma_chan *chan,
599 dma_cookie_t cookie, struct dma_tx_state *txstate) 681 dma_cookie_t cookie, struct dma_tx_state *txstate)
600{ 682{
601 struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan); 683 struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan);
684 struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma;
685 u32 residue = 0;
686
687 if (mxs_chan->status == DMA_IN_PROGRESS &&
688 mxs_chan->flags & MXS_DMA_SG_LOOP) {
689 struct mxs_dma_ccw *last_ccw;
690 u32 bar;
691
692 last_ccw = &mxs_chan->ccw[mxs_chan->desc_count - 1];
693 residue = last_ccw->xfer_bytes + last_ccw->bufaddr;
694
695 bar = readl(mxs_dma->base +
696 HW_APBHX_CHn_BAR(mxs_dma, chan->chan_id));
697 residue -= bar;
698 }
602 699
603 dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie, 0); 700 dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie,
701 residue);
604 702
605 return mxs_chan->status; 703 return mxs_chan->status;
606} 704}
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index ec3fc4fd9160..2f66cf4e54fe 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -248,7 +248,7 @@ static enum dma_status omap_dma_tx_status(struct dma_chan *chan,
248 unsigned long flags; 248 unsigned long flags;
249 249
250 ret = dma_cookie_status(chan, cookie, txstate); 250 ret = dma_cookie_status(chan, cookie, txstate);
251 if (ret == DMA_SUCCESS || !txstate) 251 if (ret == DMA_COMPLETE || !txstate)
252 return ret; 252 return ret;
253 253
254 spin_lock_irqsave(&c->vc.lock, flags); 254 spin_lock_irqsave(&c->vc.lock, flags);
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index df8b10fd1726..cdf0483b8f2d 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -2268,6 +2268,8 @@ static void pl330_tasklet(unsigned long data)
2268 list_move_tail(&desc->node, &pch->dmac->desc_pool); 2268 list_move_tail(&desc->node, &pch->dmac->desc_pool);
2269 } 2269 }
2270 2270
2271 dma_descriptor_unmap(&desc->txd);
2272
2271 if (callback) { 2273 if (callback) {
2272 spin_unlock_irqrestore(&pch->lock, flags); 2274 spin_unlock_irqrestore(&pch->lock, flags);
2273 callback(callback_param); 2275 callback(callback_param);
@@ -2314,7 +2316,7 @@ bool pl330_filter(struct dma_chan *chan, void *param)
2314 return false; 2316 return false;
2315 2317
2316 peri_id = chan->private; 2318 peri_id = chan->private;
2317 return *peri_id == (unsigned)param; 2319 return *peri_id == (unsigned long)param;
2318} 2320}
2319EXPORT_SYMBOL(pl330_filter); 2321EXPORT_SYMBOL(pl330_filter);
2320 2322
@@ -2926,16 +2928,23 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
2926 2928
2927 amba_set_drvdata(adev, pdmac); 2929 amba_set_drvdata(adev, pdmac);
2928 2930
2929 irq = adev->irq[0]; 2931 for (i = 0; i < AMBA_NR_IRQS; i++) {
2930 ret = request_irq(irq, pl330_irq_handler, 0, 2932 irq = adev->irq[i];
2931 dev_name(&adev->dev), pi); 2933 if (irq) {
2932 if (ret) 2934 ret = devm_request_irq(&adev->dev, irq,
2933 return ret; 2935 pl330_irq_handler, 0,
2936 dev_name(&adev->dev), pi);
2937 if (ret)
2938 return ret;
2939 } else {
2940 break;
2941 }
2942 }
2934 2943
2935 pi->pcfg.periph_id = adev->periphid; 2944 pi->pcfg.periph_id = adev->periphid;
2936 ret = pl330_add(pi); 2945 ret = pl330_add(pi);
2937 if (ret) 2946 if (ret)
2938 goto probe_err1; 2947 return ret;
2939 2948
2940 INIT_LIST_HEAD(&pdmac->desc_pool); 2949 INIT_LIST_HEAD(&pdmac->desc_pool);
2941 spin_lock_init(&pdmac->pool_lock); 2950 spin_lock_init(&pdmac->pool_lock);
@@ -3033,8 +3042,6 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
3033 3042
3034 return 0; 3043 return 0;
3035probe_err3: 3044probe_err3:
3036 amba_set_drvdata(adev, NULL);
3037
3038 /* Idle the DMAC */ 3045 /* Idle the DMAC */
3039 list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels, 3046 list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels,
3040 chan.device_node) { 3047 chan.device_node) {
@@ -3048,8 +3055,6 @@ probe_err3:
3048 } 3055 }
3049probe_err2: 3056probe_err2:
3050 pl330_del(pi); 3057 pl330_del(pi);
3051probe_err1:
3052 free_irq(irq, pi);
3053 3058
3054 return ret; 3059 return ret;
3055} 3060}
@@ -3059,7 +3064,6 @@ static int pl330_remove(struct amba_device *adev)
3059 struct dma_pl330_dmac *pdmac = amba_get_drvdata(adev); 3064 struct dma_pl330_dmac *pdmac = amba_get_drvdata(adev);
3060 struct dma_pl330_chan *pch, *_p; 3065 struct dma_pl330_chan *pch, *_p;
3061 struct pl330_info *pi; 3066 struct pl330_info *pi;
3062 int irq;
3063 3067
3064 if (!pdmac) 3068 if (!pdmac)
3065 return 0; 3069 return 0;
@@ -3068,7 +3072,6 @@ static int pl330_remove(struct amba_device *adev)
3068 of_dma_controller_free(adev->dev.of_node); 3072 of_dma_controller_free(adev->dev.of_node);
3069 3073
3070 dma_async_device_unregister(&pdmac->ddma); 3074 dma_async_device_unregister(&pdmac->ddma);
3071 amba_set_drvdata(adev, NULL);
3072 3075
3073 /* Idle the DMAC */ 3076 /* Idle the DMAC */
3074 list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels, 3077 list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels,
@@ -3086,9 +3089,6 @@ static int pl330_remove(struct amba_device *adev)
3086 3089
3087 pl330_del(pi); 3090 pl330_del(pi);
3088 3091
3089 irq = adev->irq[0];
3090 free_irq(irq, pi);
3091
3092 return 0; 3092 return 0;
3093} 3093}
3094 3094
diff --git a/drivers/dma/ppc4xx/adma.c b/drivers/dma/ppc4xx/adma.c
index e24b5ef486b5..8da48c6b2a38 100644
--- a/drivers/dma/ppc4xx/adma.c
+++ b/drivers/dma/ppc4xx/adma.c
@@ -804,218 +804,6 @@ static void ppc440spe_desc_set_link(struct ppc440spe_adma_chan *chan,
804} 804}
805 805
806/** 806/**
807 * ppc440spe_desc_get_src_addr - extract the source address from the descriptor
808 */
809static u32 ppc440spe_desc_get_src_addr(struct ppc440spe_adma_desc_slot *desc,
810 struct ppc440spe_adma_chan *chan, int src_idx)
811{
812 struct dma_cdb *dma_hw_desc;
813 struct xor_cb *xor_hw_desc;
814
815 switch (chan->device->id) {
816 case PPC440SPE_DMA0_ID:
817 case PPC440SPE_DMA1_ID:
818 dma_hw_desc = desc->hw_desc;
819 /* May have 0, 1, 2, or 3 sources */
820 switch (dma_hw_desc->opc) {
821 case DMA_CDB_OPC_NO_OP:
822 case DMA_CDB_OPC_DFILL128:
823 return 0;
824 case DMA_CDB_OPC_DCHECK128:
825 if (unlikely(src_idx)) {
826 printk(KERN_ERR "%s: try to get %d source for"
827 " DCHECK128\n", __func__, src_idx);
828 BUG();
829 }
830 return le32_to_cpu(dma_hw_desc->sg1l);
831 case DMA_CDB_OPC_MULTICAST:
832 case DMA_CDB_OPC_MV_SG1_SG2:
833 if (unlikely(src_idx > 2)) {
834 printk(KERN_ERR "%s: try to get %d source from"
835 " DMA descr\n", __func__, src_idx);
836 BUG();
837 }
838 if (src_idx) {
839 if (le32_to_cpu(dma_hw_desc->sg1u) &
840 DMA_CUED_XOR_WIN_MSK) {
841 u8 region;
842
843 if (src_idx == 1)
844 return le32_to_cpu(
845 dma_hw_desc->sg1l) +
846 desc->unmap_len;
847
848 region = (le32_to_cpu(
849 dma_hw_desc->sg1u)) >>
850 DMA_CUED_REGION_OFF;
851
852 region &= DMA_CUED_REGION_MSK;
853 switch (region) {
854 case DMA_RXOR123:
855 return le32_to_cpu(
856 dma_hw_desc->sg1l) +
857 (desc->unmap_len << 1);
858 case DMA_RXOR124:
859 return le32_to_cpu(
860 dma_hw_desc->sg1l) +
861 (desc->unmap_len * 3);
862 case DMA_RXOR125:
863 return le32_to_cpu(
864 dma_hw_desc->sg1l) +
865 (desc->unmap_len << 2);
866 default:
867 printk(KERN_ERR
868 "%s: try to"
869 " get src3 for region %02x"
870 "PPC440SPE_DESC_RXOR12?\n",
871 __func__, region);
872 BUG();
873 }
874 } else {
875 printk(KERN_ERR
876 "%s: try to get %d"
877 " source for non-cued descr\n",
878 __func__, src_idx);
879 BUG();
880 }
881 }
882 return le32_to_cpu(dma_hw_desc->sg1l);
883 default:
884 printk(KERN_ERR "%s: unknown OPC 0x%02x\n",
885 __func__, dma_hw_desc->opc);
886 BUG();
887 }
888 return le32_to_cpu(dma_hw_desc->sg1l);
889 case PPC440SPE_XOR_ID:
890 /* May have up to 16 sources */
891 xor_hw_desc = desc->hw_desc;
892 return xor_hw_desc->ops[src_idx].l;
893 }
894 return 0;
895}
896
897/**
898 * ppc440spe_desc_get_dest_addr - extract the destination address from the
899 * descriptor
900 */
901static u32 ppc440spe_desc_get_dest_addr(struct ppc440spe_adma_desc_slot *desc,
902 struct ppc440spe_adma_chan *chan, int idx)
903{
904 struct dma_cdb *dma_hw_desc;
905 struct xor_cb *xor_hw_desc;
906
907 switch (chan->device->id) {
908 case PPC440SPE_DMA0_ID:
909 case PPC440SPE_DMA1_ID:
910 dma_hw_desc = desc->hw_desc;
911
912 if (likely(!idx))
913 return le32_to_cpu(dma_hw_desc->sg2l);
914 return le32_to_cpu(dma_hw_desc->sg3l);
915 case PPC440SPE_XOR_ID:
916 xor_hw_desc = desc->hw_desc;
917 return xor_hw_desc->cbtal;
918 }
919 return 0;
920}
921
922/**
923 * ppc440spe_desc_get_src_num - extract the number of source addresses from
924 * the descriptor
925 */
926static u32 ppc440spe_desc_get_src_num(struct ppc440spe_adma_desc_slot *desc,
927 struct ppc440spe_adma_chan *chan)
928{
929 struct dma_cdb *dma_hw_desc;
930 struct xor_cb *xor_hw_desc;
931
932 switch (chan->device->id) {
933 case PPC440SPE_DMA0_ID:
934 case PPC440SPE_DMA1_ID:
935 dma_hw_desc = desc->hw_desc;
936
937 switch (dma_hw_desc->opc) {
938 case DMA_CDB_OPC_NO_OP:
939 case DMA_CDB_OPC_DFILL128:
940 return 0;
941 case DMA_CDB_OPC_DCHECK128:
942 return 1;
943 case DMA_CDB_OPC_MV_SG1_SG2:
944 case DMA_CDB_OPC_MULTICAST:
945 /*
946 * Only for RXOR operations we have more than
947 * one source
948 */
949 if (le32_to_cpu(dma_hw_desc->sg1u) &
950 DMA_CUED_XOR_WIN_MSK) {
951 /* RXOR op, there are 2 or 3 sources */
952 if (((le32_to_cpu(dma_hw_desc->sg1u) >>
953 DMA_CUED_REGION_OFF) &
954 DMA_CUED_REGION_MSK) == DMA_RXOR12) {
955 /* RXOR 1-2 */
956 return 2;
957 } else {
958 /* RXOR 1-2-3/1-2-4/1-2-5 */
959 return 3;
960 }
961 }
962 return 1;
963 default:
964 printk(KERN_ERR "%s: unknown OPC 0x%02x\n",
965 __func__, dma_hw_desc->opc);
966 BUG();
967 }
968 case PPC440SPE_XOR_ID:
969 /* up to 16 sources */
970 xor_hw_desc = desc->hw_desc;
971 return xor_hw_desc->cbc & XOR_CDCR_OAC_MSK;
972 default:
973 BUG();
974 }
975 return 0;
976}
977
978/**
979 * ppc440spe_desc_get_dst_num - get the number of destination addresses in
980 * this descriptor
981 */
982static u32 ppc440spe_desc_get_dst_num(struct ppc440spe_adma_desc_slot *desc,
983 struct ppc440spe_adma_chan *chan)
984{
985 struct dma_cdb *dma_hw_desc;
986
987 switch (chan->device->id) {
988 case PPC440SPE_DMA0_ID:
989 case PPC440SPE_DMA1_ID:
990 /* May be 1 or 2 destinations */
991 dma_hw_desc = desc->hw_desc;
992 switch (dma_hw_desc->opc) {
993 case DMA_CDB_OPC_NO_OP:
994 case DMA_CDB_OPC_DCHECK128:
995 return 0;
996 case DMA_CDB_OPC_MV_SG1_SG2:
997 case DMA_CDB_OPC_DFILL128:
998 return 1;
999 case DMA_CDB_OPC_MULTICAST:
1000 if (desc->dst_cnt == 2)
1001 return 2;
1002 else
1003 return 1;
1004 default:
1005 printk(KERN_ERR "%s: unknown OPC 0x%02x\n",
1006 __func__, dma_hw_desc->opc);
1007 BUG();
1008 }
1009 case PPC440SPE_XOR_ID:
1010 /* Always only 1 destination */
1011 return 1;
1012 default:
1013 BUG();
1014 }
1015 return 0;
1016}
1017
1018/**
1019 * ppc440spe_desc_get_link - get the address of the descriptor that 807 * ppc440spe_desc_get_link - get the address of the descriptor that
1020 * follows this one 808 * follows this one
1021 */ 809 */
@@ -1707,43 +1495,6 @@ static void ppc440spe_adma_free_slots(struct ppc440spe_adma_desc_slot *slot,
1707 } 1495 }
1708} 1496}
1709 1497
1710static void ppc440spe_adma_unmap(struct ppc440spe_adma_chan *chan,
1711 struct ppc440spe_adma_desc_slot *desc)
1712{
1713 u32 src_cnt, dst_cnt;
1714 dma_addr_t addr;
1715
1716 /*
1717 * get the number of sources & destination
1718 * included in this descriptor and unmap
1719 * them all
1720 */
1721 src_cnt = ppc440spe_desc_get_src_num(desc, chan);
1722 dst_cnt = ppc440spe_desc_get_dst_num(desc, chan);
1723
1724 /* unmap destinations */
1725 if (!(desc->async_tx.flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
1726 while (dst_cnt--) {
1727 addr = ppc440spe_desc_get_dest_addr(
1728 desc, chan, dst_cnt);
1729 dma_unmap_page(chan->device->dev,
1730 addr, desc->unmap_len,
1731 DMA_FROM_DEVICE);
1732 }
1733 }
1734
1735 /* unmap sources */
1736 if (!(desc->async_tx.flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
1737 while (src_cnt--) {
1738 addr = ppc440spe_desc_get_src_addr(
1739 desc, chan, src_cnt);
1740 dma_unmap_page(chan->device->dev,
1741 addr, desc->unmap_len,
1742 DMA_TO_DEVICE);
1743 }
1744 }
1745}
1746
1747/** 1498/**
1748 * ppc440spe_adma_run_tx_complete_actions - call functions to be called 1499 * ppc440spe_adma_run_tx_complete_actions - call functions to be called
1749 * upon completion 1500 * upon completion
@@ -1767,26 +1518,7 @@ static dma_cookie_t ppc440spe_adma_run_tx_complete_actions(
1767 desc->async_tx.callback( 1518 desc->async_tx.callback(
1768 desc->async_tx.callback_param); 1519 desc->async_tx.callback_param);
1769 1520
1770 /* unmap dma addresses 1521 dma_descriptor_unmap(&desc->async_tx);
1771 * (unmap_single vs unmap_page?)
1772 *
1773 * actually, ppc's dma_unmap_page() functions are empty, so
1774 * the following code is just for the sake of completeness
1775 */
1776 if (chan && chan->needs_unmap && desc->group_head &&
1777 desc->unmap_len) {
1778 struct ppc440spe_adma_desc_slot *unmap =
1779 desc->group_head;
1780 /* assume 1 slot per op always */
1781 u32 slot_count = unmap->slot_cnt;
1782
1783 /* Run through the group list and unmap addresses */
1784 for (i = 0; i < slot_count; i++) {
1785 BUG_ON(!unmap);
1786 ppc440spe_adma_unmap(chan, unmap);
1787 unmap = unmap->hw_next;
1788 }
1789 }
1790 } 1522 }
1791 1523
1792 /* run dependent operations */ 1524 /* run dependent operations */
@@ -3893,7 +3625,7 @@ static enum dma_status ppc440spe_adma_tx_status(struct dma_chan *chan,
3893 3625
3894 ppc440spe_chan = to_ppc440spe_adma_chan(chan); 3626 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
3895 ret = dma_cookie_status(chan, cookie, txstate); 3627 ret = dma_cookie_status(chan, cookie, txstate);
3896 if (ret == DMA_SUCCESS) 3628 if (ret == DMA_COMPLETE)
3897 return ret; 3629 return ret;
3898 3630
3899 ppc440spe_adma_slot_cleanup(ppc440spe_chan); 3631 ppc440spe_adma_slot_cleanup(ppc440spe_chan);
diff --git a/drivers/dma/sa11x0-dma.c b/drivers/dma/sa11x0-dma.c
index 461a91ab70bb..ab26d46bbe15 100644
--- a/drivers/dma/sa11x0-dma.c
+++ b/drivers/dma/sa11x0-dma.c
@@ -436,7 +436,7 @@ static enum dma_status sa11x0_dma_tx_status(struct dma_chan *chan,
436 enum dma_status ret; 436 enum dma_status ret;
437 437
438 ret = dma_cookie_status(&c->vc.chan, cookie, state); 438 ret = dma_cookie_status(&c->vc.chan, cookie, state);
439 if (ret == DMA_SUCCESS) 439 if (ret == DMA_COMPLETE)
440 return ret; 440 return ret;
441 441
442 if (!state) 442 if (!state)
diff --git a/drivers/dma/sh/shdma-base.c b/drivers/dma/sh/shdma-base.c
index d94ab592cc1b..2e7b394def80 100644
--- a/drivers/dma/sh/shdma-base.c
+++ b/drivers/dma/sh/shdma-base.c
@@ -724,7 +724,7 @@ static enum dma_status shdma_tx_status(struct dma_chan *chan,
724 * If we don't find cookie on the queue, it has been aborted and we have 724 * If we don't find cookie on the queue, it has been aborted and we have
725 * to report error 725 * to report error
726 */ 726 */
727 if (status != DMA_SUCCESS) { 727 if (status != DMA_COMPLETE) {
728 struct shdma_desc *sdesc; 728 struct shdma_desc *sdesc;
729 status = DMA_ERROR; 729 status = DMA_ERROR;
730 list_for_each_entry(sdesc, &schan->ld_queue, node) 730 list_for_each_entry(sdesc, &schan->ld_queue, node)
diff --git a/drivers/dma/sh/shdmac.c b/drivers/dma/sh/shdmac.c
index 1069e8869f20..0d765c0e21ec 100644
--- a/drivers/dma/sh/shdmac.c
+++ b/drivers/dma/sh/shdmac.c
@@ -685,7 +685,7 @@ MODULE_DEVICE_TABLE(of, sh_dmae_of_match);
685static int sh_dmae_probe(struct platform_device *pdev) 685static int sh_dmae_probe(struct platform_device *pdev)
686{ 686{
687 const struct sh_dmae_pdata *pdata; 687 const struct sh_dmae_pdata *pdata;
688 unsigned long irqflags = IRQF_DISABLED, 688 unsigned long irqflags = 0,
689 chan_flag[SH_DMAE_MAX_CHANNELS] = {}; 689 chan_flag[SH_DMAE_MAX_CHANNELS] = {};
690 int errirq, chan_irq[SH_DMAE_MAX_CHANNELS]; 690 int errirq, chan_irq[SH_DMAE_MAX_CHANNELS];
691 int err, i, irq_cnt = 0, irqres = 0, irq_cap = 0; 691 int err, i, irq_cnt = 0, irqres = 0, irq_cap = 0;
@@ -838,7 +838,7 @@ static int sh_dmae_probe(struct platform_device *pdev)
838 IORESOURCE_IRQ_SHAREABLE) 838 IORESOURCE_IRQ_SHAREABLE)
839 chan_flag[irq_cnt] = IRQF_SHARED; 839 chan_flag[irq_cnt] = IRQF_SHARED;
840 else 840 else
841 chan_flag[irq_cnt] = IRQF_DISABLED; 841 chan_flag[irq_cnt] = 0;
842 dev_dbg(&pdev->dev, 842 dev_dbg(&pdev->dev,
843 "Found IRQ %d for channel %d\n", 843 "Found IRQ %d for channel %d\n",
844 i, irq_cnt); 844 i, irq_cnt);
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 82d2b97ad942..b8c031b7de4e 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -14,6 +14,7 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/clk.h> 15#include <linux/clk.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/log2.h>
17#include <linux/pm.h> 18#include <linux/pm.h>
18#include <linux/pm_runtime.h> 19#include <linux/pm_runtime.h>
19#include <linux/err.h> 20#include <linux/err.h>
@@ -2626,7 +2627,7 @@ static enum dma_status d40_tx_status(struct dma_chan *chan,
2626 } 2627 }
2627 2628
2628 ret = dma_cookie_status(chan, cookie, txstate); 2629 ret = dma_cookie_status(chan, cookie, txstate);
2629 if (ret != DMA_SUCCESS) 2630 if (ret != DMA_COMPLETE)
2630 dma_set_residue(txstate, stedma40_residue(chan)); 2631 dma_set_residue(txstate, stedma40_residue(chan));
2631 2632
2632 if (d40_is_paused(d40c)) 2633 if (d40_is_paused(d40c))
@@ -2796,8 +2797,8 @@ static int d40_set_runtime_config(struct dma_chan *chan,
2796 src_addr_width > DMA_SLAVE_BUSWIDTH_8_BYTES || 2797 src_addr_width > DMA_SLAVE_BUSWIDTH_8_BYTES ||
2797 dst_addr_width <= DMA_SLAVE_BUSWIDTH_UNDEFINED || 2798 dst_addr_width <= DMA_SLAVE_BUSWIDTH_UNDEFINED ||
2798 dst_addr_width > DMA_SLAVE_BUSWIDTH_8_BYTES || 2799 dst_addr_width > DMA_SLAVE_BUSWIDTH_8_BYTES ||
2799 ((src_addr_width > 1) && (src_addr_width & 1)) || 2800 !is_power_of_2(src_addr_width) ||
2800 ((dst_addr_width > 1) && (dst_addr_width & 1))) 2801 !is_power_of_2(dst_addr_width))
2801 return -EINVAL; 2802 return -EINVAL;
2802 2803
2803 cfg->src_info.data_width = src_addr_width; 2804 cfg->src_info.data_width = src_addr_width;
diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
index 5d4986e5f5fa..73654e33f13b 100644
--- a/drivers/dma/tegra20-apb-dma.c
+++ b/drivers/dma/tegra20-apb-dma.c
@@ -570,7 +570,7 @@ static void handle_once_dma_done(struct tegra_dma_channel *tdc,
570 570
571 list_del(&sgreq->node); 571 list_del(&sgreq->node);
572 if (sgreq->last_sg) { 572 if (sgreq->last_sg) {
573 dma_desc->dma_status = DMA_SUCCESS; 573 dma_desc->dma_status = DMA_COMPLETE;
574 dma_cookie_complete(&dma_desc->txd); 574 dma_cookie_complete(&dma_desc->txd);
575 if (!dma_desc->cb_count) 575 if (!dma_desc->cb_count)
576 list_add_tail(&dma_desc->cb_node, &tdc->cb_desc); 576 list_add_tail(&dma_desc->cb_node, &tdc->cb_desc);
@@ -768,7 +768,7 @@ static enum dma_status tegra_dma_tx_status(struct dma_chan *dc,
768 unsigned int residual; 768 unsigned int residual;
769 769
770 ret = dma_cookie_status(dc, cookie, txstate); 770 ret = dma_cookie_status(dc, cookie, txstate);
771 if (ret == DMA_SUCCESS) 771 if (ret == DMA_COMPLETE)
772 return ret; 772 return ret;
773 773
774 spin_lock_irqsave(&tdc->lock, flags); 774 spin_lock_irqsave(&tdc->lock, flags);
@@ -1018,7 +1018,7 @@ static struct dma_async_tx_descriptor *tegra_dma_prep_slave_sg(
1018 return &dma_desc->txd; 1018 return &dma_desc->txd;
1019} 1019}
1020 1020
1021struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic( 1021static struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
1022 struct dma_chan *dc, dma_addr_t buf_addr, size_t buf_len, 1022 struct dma_chan *dc, dma_addr_t buf_addr, size_t buf_len,
1023 size_t period_len, enum dma_transfer_direction direction, 1023 size_t period_len, enum dma_transfer_direction direction,
1024 unsigned long flags, void *context) 1024 unsigned long flags, void *context)
diff --git a/drivers/dma/timb_dma.c b/drivers/dma/timb_dma.c
index 28af214fce04..4506a7b4f972 100644
--- a/drivers/dma/timb_dma.c
+++ b/drivers/dma/timb_dma.c
@@ -154,38 +154,6 @@ static bool __td_dma_done_ack(struct timb_dma_chan *td_chan)
154 return done; 154 return done;
155} 155}
156 156
157static void __td_unmap_desc(struct timb_dma_chan *td_chan, const u8 *dma_desc,
158 bool single)
159{
160 dma_addr_t addr;
161 int len;
162
163 addr = (dma_desc[7] << 24) | (dma_desc[6] << 16) | (dma_desc[5] << 8) |
164 dma_desc[4];
165
166 len = (dma_desc[3] << 8) | dma_desc[2];
167
168 if (single)
169 dma_unmap_single(chan2dev(&td_chan->chan), addr, len,
170 DMA_TO_DEVICE);
171 else
172 dma_unmap_page(chan2dev(&td_chan->chan), addr, len,
173 DMA_TO_DEVICE);
174}
175
176static void __td_unmap_descs(struct timb_dma_desc *td_desc, bool single)
177{
178 struct timb_dma_chan *td_chan = container_of(td_desc->txd.chan,
179 struct timb_dma_chan, chan);
180 u8 *descs;
181
182 for (descs = td_desc->desc_list; ; descs += TIMB_DMA_DESC_SIZE) {
183 __td_unmap_desc(td_chan, descs, single);
184 if (descs[0] & 0x02)
185 break;
186 }
187}
188
189static int td_fill_desc(struct timb_dma_chan *td_chan, u8 *dma_desc, 157static int td_fill_desc(struct timb_dma_chan *td_chan, u8 *dma_desc,
190 struct scatterlist *sg, bool last) 158 struct scatterlist *sg, bool last)
191{ 159{
@@ -293,10 +261,7 @@ static void __td_finish(struct timb_dma_chan *td_chan)
293 261
294 list_move(&td_desc->desc_node, &td_chan->free_list); 262 list_move(&td_desc->desc_node, &td_chan->free_list);
295 263
296 if (!(txd->flags & DMA_COMPL_SKIP_SRC_UNMAP)) 264 dma_descriptor_unmap(txd);
297 __td_unmap_descs(td_desc,
298 txd->flags & DMA_COMPL_SRC_UNMAP_SINGLE);
299
300 /* 265 /*
301 * The API requires that no submissions are done from a 266 * The API requires that no submissions are done from a
302 * callback, so we don't need to drop the lock here 267 * callback, so we don't need to drop the lock here
diff --git a/drivers/dma/txx9dmac.c b/drivers/dma/txx9dmac.c
index 71e8e775189e..bae6c29f5502 100644
--- a/drivers/dma/txx9dmac.c
+++ b/drivers/dma/txx9dmac.c
@@ -419,30 +419,7 @@ txx9dmac_descriptor_complete(struct txx9dmac_chan *dc,
419 list_splice_init(&desc->tx_list, &dc->free_list); 419 list_splice_init(&desc->tx_list, &dc->free_list);
420 list_move(&desc->desc_node, &dc->free_list); 420 list_move(&desc->desc_node, &dc->free_list);
421 421
422 if (!ds) { 422 dma_descriptor_unmap(txd);
423 dma_addr_t dmaaddr;
424 if (!(txd->flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
425 dmaaddr = is_dmac64(dc) ?
426 desc->hwdesc.DAR : desc->hwdesc32.DAR;
427 if (txd->flags & DMA_COMPL_DEST_UNMAP_SINGLE)
428 dma_unmap_single(chan2parent(&dc->chan),
429 dmaaddr, desc->len, DMA_FROM_DEVICE);
430 else
431 dma_unmap_page(chan2parent(&dc->chan),
432 dmaaddr, desc->len, DMA_FROM_DEVICE);
433 }
434 if (!(txd->flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
435 dmaaddr = is_dmac64(dc) ?
436 desc->hwdesc.SAR : desc->hwdesc32.SAR;
437 if (txd->flags & DMA_COMPL_SRC_UNMAP_SINGLE)
438 dma_unmap_single(chan2parent(&dc->chan),
439 dmaaddr, desc->len, DMA_TO_DEVICE);
440 else
441 dma_unmap_page(chan2parent(&dc->chan),
442 dmaaddr, desc->len, DMA_TO_DEVICE);
443 }
444 }
445
446 /* 423 /*
447 * The API requires that no submissions are done from a 424 * The API requires that no submissions are done from a
448 * callback, so we don't need to drop the lock here 425 * callback, so we don't need to drop the lock here
@@ -962,8 +939,8 @@ txx9dmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
962 enum dma_status ret; 939 enum dma_status ret;
963 940
964 ret = dma_cookie_status(chan, cookie, txstate); 941 ret = dma_cookie_status(chan, cookie, txstate);
965 if (ret == DMA_SUCCESS) 942 if (ret == DMA_COMPLETE)
966 return DMA_SUCCESS; 943 return DMA_COMPLETE;
967 944
968 spin_lock_bh(&dc->lock); 945 spin_lock_bh(&dc->lock);
969 txx9dmac_scan_descriptors(dc); 946 txx9dmac_scan_descriptors(dc);
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 7dd446150294..4e10b10d3ddd 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -13,6 +13,7 @@
13#include <linux/acpi_gpio.h> 13#include <linux/acpi_gpio.h>
14#include <linux/idr.h> 14#include <linux/idr.h>
15#include <linux/slab.h> 15#include <linux/slab.h>
16#include <linux/acpi.h>
16 17
17#define CREATE_TRACE_POINTS 18#define CREATE_TRACE_POINTS
18#include <trace/events/gpio.h> 19#include <trace/events/gpio.h>
diff --git a/drivers/gpu/drm/i915/intel_acpi.c b/drivers/gpu/drm/i915/intel_acpi.c
index 43959edd4291..dfff0907f70e 100644
--- a/drivers/gpu/drm/i915/intel_acpi.c
+++ b/drivers/gpu/drm/i915/intel_acpi.c
@@ -196,7 +196,7 @@ static bool intel_dsm_pci_probe(struct pci_dev *pdev)
196 acpi_handle dhandle; 196 acpi_handle dhandle;
197 int ret; 197 int ret;
198 198
199 dhandle = DEVICE_ACPI_HANDLE(&pdev->dev); 199 dhandle = ACPI_HANDLE(&pdev->dev);
200 if (!dhandle) 200 if (!dhandle)
201 return false; 201 return false;
202 202
diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
index 1b2f41c3f191..6d69a9bad865 100644
--- a/drivers/gpu/drm/i915/intel_opregion.c
+++ b/drivers/gpu/drm/i915/intel_opregion.c
@@ -638,7 +638,7 @@ static void intel_didl_outputs(struct drm_device *dev)
638 u32 temp; 638 u32 temp;
639 int i = 0; 639 int i = 0;
640 640
641 handle = DEVICE_ACPI_HANDLE(&dev->pdev->dev); 641 handle = ACPI_HANDLE(&dev->pdev->dev);
642 if (!handle || acpi_bus_get_device(handle, &acpi_dev)) 642 if (!handle || acpi_bus_get_device(handle, &acpi_dev))
643 return; 643 return;
644 644
diff --git a/drivers/gpu/drm/nouveau/core/subdev/mxm/base.c b/drivers/gpu/drm/nouveau/core/subdev/mxm/base.c
index e286e132c7e7..129120473f6c 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/mxm/base.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/mxm/base.c
@@ -116,7 +116,7 @@ mxm_shadow_dsm(struct nouveau_mxm *mxm, u8 version)
116 acpi_handle handle; 116 acpi_handle handle;
117 int ret; 117 int ret;
118 118
119 handle = DEVICE_ACPI_HANDLE(&device->pdev->dev); 119 handle = ACPI_HANDLE(&device->pdev->dev);
120 if (!handle) 120 if (!handle)
121 return false; 121 return false;
122 122
diff --git a/drivers/gpu/drm/nouveau/nouveau_acpi.c b/drivers/gpu/drm/nouveau/nouveau_acpi.c
index 07273a2ae62f..95c740454049 100644
--- a/drivers/gpu/drm/nouveau/nouveau_acpi.c
+++ b/drivers/gpu/drm/nouveau/nouveau_acpi.c
@@ -256,7 +256,7 @@ static int nouveau_dsm_pci_probe(struct pci_dev *pdev)
256 acpi_handle dhandle; 256 acpi_handle dhandle;
257 int retval = 0; 257 int retval = 0;
258 258
259 dhandle = DEVICE_ACPI_HANDLE(&pdev->dev); 259 dhandle = ACPI_HANDLE(&pdev->dev);
260 if (!dhandle) 260 if (!dhandle)
261 return false; 261 return false;
262 262
@@ -414,7 +414,7 @@ bool nouveau_acpi_rom_supported(struct pci_dev *pdev)
414 if (!nouveau_dsm_priv.dsm_detected && !nouveau_dsm_priv.optimus_detected) 414 if (!nouveau_dsm_priv.dsm_detected && !nouveau_dsm_priv.optimus_detected)
415 return false; 415 return false;
416 416
417 dhandle = DEVICE_ACPI_HANDLE(&pdev->dev); 417 dhandle = ACPI_HANDLE(&pdev->dev);
418 if (!dhandle) 418 if (!dhandle)
419 return false; 419 return false;
420 420
@@ -448,7 +448,7 @@ nouveau_acpi_edid(struct drm_device *dev, struct drm_connector *connector)
448 return NULL; 448 return NULL;
449 } 449 }
450 450
451 handle = DEVICE_ACPI_HANDLE(&dev->pdev->dev); 451 handle = ACPI_HANDLE(&dev->pdev->dev);
452 if (!handle) 452 if (!handle)
453 return NULL; 453 return NULL;
454 454
diff --git a/drivers/gpu/drm/radeon/radeon_acpi.c b/drivers/gpu/drm/radeon/radeon_acpi.c
index 10f98c7742d8..98a9074b306b 100644
--- a/drivers/gpu/drm/radeon/radeon_acpi.c
+++ b/drivers/gpu/drm/radeon/radeon_acpi.c
@@ -369,7 +369,7 @@ int radeon_atif_handler(struct radeon_device *rdev,
369 return NOTIFY_DONE; 369 return NOTIFY_DONE;
370 370
371 /* Check pending SBIOS requests */ 371 /* Check pending SBIOS requests */
372 handle = DEVICE_ACPI_HANDLE(&rdev->pdev->dev); 372 handle = ACPI_HANDLE(&rdev->pdev->dev);
373 count = radeon_atif_get_sbios_requests(handle, &req); 373 count = radeon_atif_get_sbios_requests(handle, &req);
374 374
375 if (count <= 0) 375 if (count <= 0)
@@ -556,7 +556,7 @@ int radeon_acpi_pcie_notify_device_ready(struct radeon_device *rdev)
556 struct radeon_atcs *atcs = &rdev->atcs; 556 struct radeon_atcs *atcs = &rdev->atcs;
557 557
558 /* Get the device handle */ 558 /* Get the device handle */
559 handle = DEVICE_ACPI_HANDLE(&rdev->pdev->dev); 559 handle = ACPI_HANDLE(&rdev->pdev->dev);
560 if (!handle) 560 if (!handle)
561 return -EINVAL; 561 return -EINVAL;
562 562
@@ -596,7 +596,7 @@ int radeon_acpi_pcie_performance_request(struct radeon_device *rdev,
596 u32 retry = 3; 596 u32 retry = 3;
597 597
598 /* Get the device handle */ 598 /* Get the device handle */
599 handle = DEVICE_ACPI_HANDLE(&rdev->pdev->dev); 599 handle = ACPI_HANDLE(&rdev->pdev->dev);
600 if (!handle) 600 if (!handle)
601 return -EINVAL; 601 return -EINVAL;
602 602
@@ -699,7 +699,7 @@ int radeon_acpi_init(struct radeon_device *rdev)
699 int ret; 699 int ret;
700 700
701 /* Get the device handle */ 701 /* Get the device handle */
702 handle = DEVICE_ACPI_HANDLE(&rdev->pdev->dev); 702 handle = ACPI_HANDLE(&rdev->pdev->dev);
703 703
704 /* No need to proceed if we're sure that ATIF is not supported */ 704 /* No need to proceed if we're sure that ATIF is not supported */
705 if (!ASIC_IS_AVIVO(rdev) || !rdev->bios || !handle) 705 if (!ASIC_IS_AVIVO(rdev) || !rdev->bios || !handle)
diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
index 6153ec18943a..9d302eaeea15 100644
--- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
+++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
@@ -8,8 +8,7 @@
8 */ 8 */
9#include <linux/vga_switcheroo.h> 9#include <linux/vga_switcheroo.h>
10#include <linux/slab.h> 10#include <linux/slab.h>
11#include <acpi/acpi.h> 11#include <linux/acpi.h>
12#include <acpi/acpi_bus.h>
13#include <linux/pci.h> 12#include <linux/pci.h>
14 13
15#include "radeon_acpi.h" 14#include "radeon_acpi.h"
@@ -447,7 +446,7 @@ static bool radeon_atpx_pci_probe_handle(struct pci_dev *pdev)
447 acpi_handle dhandle, atpx_handle; 446 acpi_handle dhandle, atpx_handle;
448 acpi_status status; 447 acpi_status status;
449 448
450 dhandle = DEVICE_ACPI_HANDLE(&pdev->dev); 449 dhandle = ACPI_HANDLE(&pdev->dev);
451 if (!dhandle) 450 if (!dhandle)
452 return false; 451 return false;
453 452
@@ -493,7 +492,7 @@ static int radeon_atpx_init(void)
493 */ 492 */
494static int radeon_atpx_get_client_id(struct pci_dev *pdev) 493static int radeon_atpx_get_client_id(struct pci_dev *pdev)
495{ 494{
496 if (radeon_atpx_priv.dhandle == DEVICE_ACPI_HANDLE(&pdev->dev)) 495 if (radeon_atpx_priv.dhandle == ACPI_HANDLE(&pdev->dev))
497 return VGA_SWITCHEROO_IGD; 496 return VGA_SWITCHEROO_IGD;
498 else 497 else
499 return VGA_SWITCHEROO_DIS; 498 return VGA_SWITCHEROO_DIS;
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c
index c155d6f3fa68..b3633d9a5317 100644
--- a/drivers/gpu/drm/radeon/radeon_bios.c
+++ b/drivers/gpu/drm/radeon/radeon_bios.c
@@ -185,7 +185,7 @@ static bool radeon_atrm_get_bios(struct radeon_device *rdev)
185 return false; 185 return false;
186 186
187 while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) { 187 while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
188 dhandle = DEVICE_ACPI_HANDLE(&pdev->dev); 188 dhandle = ACPI_HANDLE(&pdev->dev);
189 if (!dhandle) 189 if (!dhandle)
190 continue; 190 continue;
191 191
diff --git a/drivers/hid/i2c-hid/i2c-hid.c b/drivers/hid/i2c-hid/i2c-hid.c
index ae48d18ee315..5f7e55f4b7f0 100644
--- a/drivers/hid/i2c-hid/i2c-hid.c
+++ b/drivers/hid/i2c-hid/i2c-hid.c
@@ -1008,7 +1008,7 @@ static int i2c_hid_probe(struct i2c_client *client,
1008 hid->hid_get_raw_report = i2c_hid_get_raw_report; 1008 hid->hid_get_raw_report = i2c_hid_get_raw_report;
1009 hid->hid_output_raw_report = i2c_hid_output_raw_report; 1009 hid->hid_output_raw_report = i2c_hid_output_raw_report;
1010 hid->dev.parent = &client->dev; 1010 hid->dev.parent = &client->dev;
1011 ACPI_HANDLE_SET(&hid->dev, ACPI_HANDLE(&client->dev)); 1011 ACPI_COMPANION_SET(&hid->dev, ACPI_COMPANION(&client->dev));
1012 hid->bus = BUS_I2C; 1012 hid->bus = BUS_I2C;
1013 hid->version = le16_to_cpu(ihid->hdesc.bcdVersion); 1013 hid->version = le16_to_cpu(ihid->hdesc.bcdVersion);
1014 hid->vendor = le16_to_cpu(ihid->hdesc.wVendorID); 1014 hid->vendor = le16_to_cpu(ihid->hdesc.wVendorID);
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 5923cfa390c8..d74c0b34248e 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -615,6 +615,22 @@ void i2c_unlock_adapter(struct i2c_adapter *adapter)
615} 615}
616EXPORT_SYMBOL_GPL(i2c_unlock_adapter); 616EXPORT_SYMBOL_GPL(i2c_unlock_adapter);
617 617
618static void i2c_dev_set_name(struct i2c_adapter *adap,
619 struct i2c_client *client)
620{
621 struct acpi_device *adev = ACPI_COMPANION(&client->dev);
622
623 if (adev) {
624 dev_set_name(&client->dev, "i2c-%s", acpi_dev_name(adev));
625 return;
626 }
627
628 /* For 10-bit clients, add an arbitrary offset to avoid collisions */
629 dev_set_name(&client->dev, "%d-%04x", i2c_adapter_id(adap),
630 client->addr | ((client->flags & I2C_CLIENT_TEN)
631 ? 0xa000 : 0));
632}
633
618/** 634/**
619 * i2c_new_device - instantiate an i2c device 635 * i2c_new_device - instantiate an i2c device
620 * @adap: the adapter managing the device 636 * @adap: the adapter managing the device
@@ -671,12 +687,9 @@ i2c_new_device(struct i2c_adapter *adap, struct i2c_board_info const *info)
671 client->dev.bus = &i2c_bus_type; 687 client->dev.bus = &i2c_bus_type;
672 client->dev.type = &i2c_client_type; 688 client->dev.type = &i2c_client_type;
673 client->dev.of_node = info->of_node; 689 client->dev.of_node = info->of_node;
674 ACPI_HANDLE_SET(&client->dev, info->acpi_node.handle); 690 ACPI_COMPANION_SET(&client->dev, info->acpi_node.companion);
675 691
676 /* For 10-bit clients, add an arbitrary offset to avoid collisions */ 692 i2c_dev_set_name(adap, client);
677 dev_set_name(&client->dev, "%d-%04x", i2c_adapter_id(adap),
678 client->addr | ((client->flags & I2C_CLIENT_TEN)
679 ? 0xa000 : 0));
680 status = device_register(&client->dev); 693 status = device_register(&client->dev);
681 if (status) 694 if (status)
682 goto out_err; 695 goto out_err;
@@ -1100,7 +1113,7 @@ static acpi_status acpi_i2c_add_device(acpi_handle handle, u32 level,
1100 return AE_OK; 1113 return AE_OK;
1101 1114
1102 memset(&info, 0, sizeof(info)); 1115 memset(&info, 0, sizeof(info));
1103 info.acpi_node.handle = handle; 1116 info.acpi_node.companion = adev;
1104 info.irq = -1; 1117 info.irq = -1;
1105 1118
1106 INIT_LIST_HEAD(&resource_list); 1119 INIT_LIST_HEAD(&resource_list);
diff --git a/drivers/ide/ide-acpi.c b/drivers/ide/ide-acpi.c
index 140c8ef50529..d9e1f7ccfe6f 100644
--- a/drivers/ide/ide-acpi.c
+++ b/drivers/ide/ide-acpi.c
@@ -7,6 +7,7 @@
7 * Copyright (C) 2006 Hannes Reinecke 7 * Copyright (C) 2006 Hannes Reinecke
8 */ 8 */
9 9
10#include <linux/acpi.h>
10#include <linux/ata.h> 11#include <linux/ata.h>
11#include <linux/delay.h> 12#include <linux/delay.h>
12#include <linux/device.h> 13#include <linux/device.h>
@@ -19,8 +20,6 @@
19#include <linux/dmi.h> 20#include <linux/dmi.h>
20#include <linux/module.h> 21#include <linux/module.h>
21 22
22#include <acpi/acpi_bus.h>
23
24#define REGS_PER_GTF 7 23#define REGS_PER_GTF 7
25 24
26struct GTM_buffer { 25struct GTM_buffer {
@@ -128,7 +127,7 @@ static int ide_get_dev_handle(struct device *dev, acpi_handle *handle,
128 127
129 DEBPRINT("ENTER: pci %02x:%02x.%01x\n", bus, devnum, func); 128 DEBPRINT("ENTER: pci %02x:%02x.%01x\n", bus, devnum, func);
130 129
131 dev_handle = DEVICE_ACPI_HANDLE(dev); 130 dev_handle = ACPI_HANDLE(dev);
132 if (!dev_handle) { 131 if (!dev_handle) {
133 DEBPRINT("no acpi handle for device\n"); 132 DEBPRINT("no acpi handle for device\n");
134 goto err; 133 goto err;
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index 3226ce98fb18..cbd4e9abc47e 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * intel_idle.c - native hardware idle loop for modern Intel processors 2 * intel_idle.c - native hardware idle loop for modern Intel processors
3 * 3 *
4 * Copyright (c) 2010, Intel Corporation. 4 * Copyright (c) 2013, Intel Corporation.
5 * Len Brown <len.brown@intel.com> 5 * Len Brown <len.brown@intel.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
@@ -329,6 +329,22 @@ static struct cpuidle_state atom_cstates[] __initdata = {
329 { 329 {
330 .enter = NULL } 330 .enter = NULL }
331}; 331};
332static struct cpuidle_state avn_cstates[CPUIDLE_STATE_MAX] = {
333 {
334 .name = "C1-AVN",
335 .desc = "MWAIT 0x00",
336 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
337 .exit_latency = 2,
338 .target_residency = 2,
339 .enter = &intel_idle },
340 {
341 .name = "C6-AVN",
342 .desc = "MWAIT 0x51",
343 .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
344 .exit_latency = 15,
345 .target_residency = 45,
346 .enter = &intel_idle },
347};
332 348
333/** 349/**
334 * intel_idle 350 * intel_idle
@@ -462,6 +478,11 @@ static const struct idle_cpu idle_cpu_hsw = {
462 .disable_promotion_to_c1e = true, 478 .disable_promotion_to_c1e = true,
463}; 479};
464 480
481static const struct idle_cpu idle_cpu_avn = {
482 .state_table = avn_cstates,
483 .disable_promotion_to_c1e = true,
484};
485
465#define ICPU(model, cpu) \ 486#define ICPU(model, cpu) \
466 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu } 487 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu }
467 488
@@ -483,6 +504,7 @@ static const struct x86_cpu_id intel_idle_ids[] = {
483 ICPU(0x3f, idle_cpu_hsw), 504 ICPU(0x3f, idle_cpu_hsw),
484 ICPU(0x45, idle_cpu_hsw), 505 ICPU(0x45, idle_cpu_hsw),
485 ICPU(0x46, idle_cpu_hsw), 506 ICPU(0x46, idle_cpu_hsw),
507 ICPU(0x4D, idle_cpu_avn),
486 {} 508 {}
487}; 509};
488MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids); 510MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);
diff --git a/drivers/md/md.c b/drivers/md/md.c
index 8766eabb0014..b6b7a2866c9e 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -112,7 +112,7 @@ static inline int speed_max(struct mddev *mddev)
112 112
113static struct ctl_table_header *raid_table_header; 113static struct ctl_table_header *raid_table_header;
114 114
115static ctl_table raid_table[] = { 115static struct ctl_table raid_table[] = {
116 { 116 {
117 .procname = "speed_limit_min", 117 .procname = "speed_limit_min",
118 .data = &sysctl_speed_limit_min, 118 .data = &sysctl_speed_limit_min,
@@ -130,7 +130,7 @@ static ctl_table raid_table[] = {
130 { } 130 { }
131}; 131};
132 132
133static ctl_table raid_dir_table[] = { 133static struct ctl_table raid_dir_table[] = {
134 { 134 {
135 .procname = "raid", 135 .procname = "raid",
136 .maxlen = 0, 136 .maxlen = 0,
@@ -140,7 +140,7 @@ static ctl_table raid_dir_table[] = {
140 { } 140 { }
141}; 141};
142 142
143static ctl_table raid_root_table[] = { 143static struct ctl_table raid_root_table[] = {
144 { 144 {
145 .procname = "dev", 145 .procname = "dev",
146 .maxlen = 0, 146 .maxlen = 0,
@@ -562,11 +562,19 @@ static struct mddev * mddev_find(dev_t unit)
562 goto retry; 562 goto retry;
563} 563}
564 564
565static inline int mddev_lock(struct mddev * mddev) 565static inline int __must_check mddev_lock(struct mddev * mddev)
566{ 566{
567 return mutex_lock_interruptible(&mddev->reconfig_mutex); 567 return mutex_lock_interruptible(&mddev->reconfig_mutex);
568} 568}
569 569
570/* Sometimes we need to take the lock in a situation where
571 * failure due to interrupts is not acceptable.
572 */
573static inline void mddev_lock_nointr(struct mddev * mddev)
574{
575 mutex_lock(&mddev->reconfig_mutex);
576}
577
570static inline int mddev_is_locked(struct mddev *mddev) 578static inline int mddev_is_locked(struct mddev *mddev)
571{ 579{
572 return mutex_is_locked(&mddev->reconfig_mutex); 580 return mutex_is_locked(&mddev->reconfig_mutex);
@@ -2978,7 +2986,7 @@ rdev_size_store(struct md_rdev *rdev, const char *buf, size_t len)
2978 for_each_mddev(mddev, tmp) { 2986 for_each_mddev(mddev, tmp) {
2979 struct md_rdev *rdev2; 2987 struct md_rdev *rdev2;
2980 2988
2981 mddev_lock(mddev); 2989 mddev_lock_nointr(mddev);
2982 rdev_for_each(rdev2, mddev) 2990 rdev_for_each(rdev2, mddev)
2983 if (rdev->bdev == rdev2->bdev && 2991 if (rdev->bdev == rdev2->bdev &&
2984 rdev != rdev2 && 2992 rdev != rdev2 &&
@@ -2994,7 +3002,7 @@ rdev_size_store(struct md_rdev *rdev, const char *buf, size_t len)
2994 break; 3002 break;
2995 } 3003 }
2996 } 3004 }
2997 mddev_lock(my_mddev); 3005 mddev_lock_nointr(my_mddev);
2998 if (overlap) { 3006 if (overlap) {
2999 /* Someone else could have slipped in a size 3007 /* Someone else could have slipped in a size
3000 * change here, but doing so is just silly. 3008 * change here, but doing so is just silly.
@@ -3580,6 +3588,7 @@ level_store(struct mddev *mddev, const char *buf, size_t len)
3580 mddev->in_sync = 1; 3588 mddev->in_sync = 1;
3581 del_timer_sync(&mddev->safemode_timer); 3589 del_timer_sync(&mddev->safemode_timer);
3582 } 3590 }
3591 blk_set_stacking_limits(&mddev->queue->limits);
3583 pers->run(mddev); 3592 pers->run(mddev);
3584 set_bit(MD_CHANGE_DEVS, &mddev->flags); 3593 set_bit(MD_CHANGE_DEVS, &mddev->flags);
3585 mddev_resume(mddev); 3594 mddev_resume(mddev);
@@ -5258,7 +5267,7 @@ static void __md_stop_writes(struct mddev *mddev)
5258 5267
5259void md_stop_writes(struct mddev *mddev) 5268void md_stop_writes(struct mddev *mddev)
5260{ 5269{
5261 mddev_lock(mddev); 5270 mddev_lock_nointr(mddev);
5262 __md_stop_writes(mddev); 5271 __md_stop_writes(mddev);
5263 mddev_unlock(mddev); 5272 mddev_unlock(mddev);
5264} 5273}
@@ -5291,20 +5300,35 @@ EXPORT_SYMBOL_GPL(md_stop);
5291static int md_set_readonly(struct mddev *mddev, struct block_device *bdev) 5300static int md_set_readonly(struct mddev *mddev, struct block_device *bdev)
5292{ 5301{
5293 int err = 0; 5302 int err = 0;
5303 int did_freeze = 0;
5304
5305 if (!test_bit(MD_RECOVERY_FROZEN, &mddev->recovery)) {
5306 did_freeze = 1;
5307 set_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
5308 md_wakeup_thread(mddev->thread);
5309 }
5310 if (mddev->sync_thread) {
5311 set_bit(MD_RECOVERY_INTR, &mddev->recovery);
5312 /* Thread might be blocked waiting for metadata update
5313 * which will now never happen */
5314 wake_up_process(mddev->sync_thread->tsk);
5315 }
5316 mddev_unlock(mddev);
5317 wait_event(resync_wait, mddev->sync_thread == NULL);
5318 mddev_lock_nointr(mddev);
5319
5294 mutex_lock(&mddev->open_mutex); 5320 mutex_lock(&mddev->open_mutex);
5295 if (atomic_read(&mddev->openers) > !!bdev) { 5321 if (atomic_read(&mddev->openers) > !!bdev ||
5322 mddev->sync_thread ||
5323 (bdev && !test_bit(MD_STILL_CLOSED, &mddev->flags))) {
5296 printk("md: %s still in use.\n",mdname(mddev)); 5324 printk("md: %s still in use.\n",mdname(mddev));
5325 if (did_freeze) {
5326 clear_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
5327 md_wakeup_thread(mddev->thread);
5328 }
5297 err = -EBUSY; 5329 err = -EBUSY;
5298 goto out; 5330 goto out;
5299 } 5331 }
5300 if (bdev && !test_bit(MD_STILL_CLOSED, &mddev->flags)) {
5301 /* Someone opened the device since we flushed it
5302 * so page cache could be dirty and it is too late
5303 * to flush. So abort
5304 */
5305 mutex_unlock(&mddev->open_mutex);
5306 return -EBUSY;
5307 }
5308 if (mddev->pers) { 5332 if (mddev->pers) {
5309 __md_stop_writes(mddev); 5333 __md_stop_writes(mddev);
5310 5334
@@ -5315,7 +5339,7 @@ static int md_set_readonly(struct mddev *mddev, struct block_device *bdev)
5315 set_disk_ro(mddev->gendisk, 1); 5339 set_disk_ro(mddev->gendisk, 1);
5316 clear_bit(MD_RECOVERY_FROZEN, &mddev->recovery); 5340 clear_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
5317 sysfs_notify_dirent_safe(mddev->sysfs_state); 5341 sysfs_notify_dirent_safe(mddev->sysfs_state);
5318 err = 0; 5342 err = 0;
5319 } 5343 }
5320out: 5344out:
5321 mutex_unlock(&mddev->open_mutex); 5345 mutex_unlock(&mddev->open_mutex);
@@ -5331,20 +5355,34 @@ static int do_md_stop(struct mddev * mddev, int mode,
5331{ 5355{
5332 struct gendisk *disk = mddev->gendisk; 5356 struct gendisk *disk = mddev->gendisk;
5333 struct md_rdev *rdev; 5357 struct md_rdev *rdev;
5358 int did_freeze = 0;
5359
5360 if (!test_bit(MD_RECOVERY_FROZEN, &mddev->recovery)) {
5361 did_freeze = 1;
5362 set_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
5363 md_wakeup_thread(mddev->thread);
5364 }
5365 if (mddev->sync_thread) {
5366 set_bit(MD_RECOVERY_INTR, &mddev->recovery);
5367 /* Thread might be blocked waiting for metadata update
5368 * which will now never happen */
5369 wake_up_process(mddev->sync_thread->tsk);
5370 }
5371 mddev_unlock(mddev);
5372 wait_event(resync_wait, mddev->sync_thread == NULL);
5373 mddev_lock_nointr(mddev);
5334 5374
5335 mutex_lock(&mddev->open_mutex); 5375 mutex_lock(&mddev->open_mutex);
5336 if (atomic_read(&mddev->openers) > !!bdev || 5376 if (atomic_read(&mddev->openers) > !!bdev ||
5337 mddev->sysfs_active) { 5377 mddev->sysfs_active ||
5378 mddev->sync_thread ||
5379 (bdev && !test_bit(MD_STILL_CLOSED, &mddev->flags))) {
5338 printk("md: %s still in use.\n",mdname(mddev)); 5380 printk("md: %s still in use.\n",mdname(mddev));
5339 mutex_unlock(&mddev->open_mutex); 5381 mutex_unlock(&mddev->open_mutex);
5340 return -EBUSY; 5382 if (did_freeze) {
5341 } 5383 clear_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
5342 if (bdev && !test_bit(MD_STILL_CLOSED, &mddev->flags)) { 5384 md_wakeup_thread(mddev->thread);
5343 /* Someone opened the device since we flushed it 5385 }
5344 * so page cache could be dirty and it is too late
5345 * to flush. So abort
5346 */
5347 mutex_unlock(&mddev->open_mutex);
5348 return -EBUSY; 5386 return -EBUSY;
5349 } 5387 }
5350 if (mddev->pers) { 5388 if (mddev->pers) {
@@ -6551,7 +6589,7 @@ static int md_ioctl(struct block_device *bdev, fmode_t mode,
6551 wait_event(mddev->sb_wait, 6589 wait_event(mddev->sb_wait,
6552 !test_bit(MD_CHANGE_DEVS, &mddev->flags) && 6590 !test_bit(MD_CHANGE_DEVS, &mddev->flags) &&
6553 !test_bit(MD_CHANGE_PENDING, &mddev->flags)); 6591 !test_bit(MD_CHANGE_PENDING, &mddev->flags));
6554 mddev_lock(mddev); 6592 mddev_lock_nointr(mddev);
6555 } 6593 }
6556 } else { 6594 } else {
6557 err = -EROFS; 6595 err = -EROFS;
@@ -7361,9 +7399,6 @@ void md_do_sync(struct md_thread *thread)
7361 mddev->curr_resync = 2; 7399 mddev->curr_resync = 2;
7362 7400
7363 try_again: 7401 try_again:
7364 if (kthread_should_stop())
7365 set_bit(MD_RECOVERY_INTR, &mddev->recovery);
7366
7367 if (test_bit(MD_RECOVERY_INTR, &mddev->recovery)) 7402 if (test_bit(MD_RECOVERY_INTR, &mddev->recovery))
7368 goto skip; 7403 goto skip;
7369 for_each_mddev(mddev2, tmp) { 7404 for_each_mddev(mddev2, tmp) {
@@ -7388,7 +7423,7 @@ void md_do_sync(struct md_thread *thread)
7388 * be caught by 'softlockup' 7423 * be caught by 'softlockup'
7389 */ 7424 */
7390 prepare_to_wait(&resync_wait, &wq, TASK_INTERRUPTIBLE); 7425 prepare_to_wait(&resync_wait, &wq, TASK_INTERRUPTIBLE);
7391 if (!kthread_should_stop() && 7426 if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery) &&
7392 mddev2->curr_resync >= mddev->curr_resync) { 7427 mddev2->curr_resync >= mddev->curr_resync) {
7393 printk(KERN_INFO "md: delaying %s of %s" 7428 printk(KERN_INFO "md: delaying %s of %s"
7394 " until %s has finished (they" 7429 " until %s has finished (they"
@@ -7464,7 +7499,7 @@ void md_do_sync(struct md_thread *thread)
7464 last_check = 0; 7499 last_check = 0;
7465 7500
7466 if (j>2) { 7501 if (j>2) {
7467 printk(KERN_INFO 7502 printk(KERN_INFO
7468 "md: resuming %s of %s from checkpoint.\n", 7503 "md: resuming %s of %s from checkpoint.\n",
7469 desc, mdname(mddev)); 7504 desc, mdname(mddev));
7470 mddev->curr_resync = j; 7505 mddev->curr_resync = j;
@@ -7501,7 +7536,8 @@ void md_do_sync(struct md_thread *thread)
7501 sysfs_notify(&mddev->kobj, NULL, "sync_completed"); 7536 sysfs_notify(&mddev->kobj, NULL, "sync_completed");
7502 } 7537 }
7503 7538
7504 while (j >= mddev->resync_max && !kthread_should_stop()) { 7539 while (j >= mddev->resync_max &&
7540 !test_bit(MD_RECOVERY_INTR, &mddev->recovery)) {
7505 /* As this condition is controlled by user-space, 7541 /* As this condition is controlled by user-space,
7506 * we can block indefinitely, so use '_interruptible' 7542 * we can block indefinitely, so use '_interruptible'
7507 * to avoid triggering warnings. 7543 * to avoid triggering warnings.
@@ -7509,17 +7545,18 @@ void md_do_sync(struct md_thread *thread)
7509 flush_signals(current); /* just in case */ 7545 flush_signals(current); /* just in case */
7510 wait_event_interruptible(mddev->recovery_wait, 7546 wait_event_interruptible(mddev->recovery_wait,
7511 mddev->resync_max > j 7547 mddev->resync_max > j
7512 || kthread_should_stop()); 7548 || test_bit(MD_RECOVERY_INTR,
7549 &mddev->recovery));
7513 } 7550 }
7514 7551
7515 if (kthread_should_stop()) 7552 if (test_bit(MD_RECOVERY_INTR, &mddev->recovery))
7516 goto interrupted; 7553 break;
7517 7554
7518 sectors = mddev->pers->sync_request(mddev, j, &skipped, 7555 sectors = mddev->pers->sync_request(mddev, j, &skipped,
7519 currspeed < speed_min(mddev)); 7556 currspeed < speed_min(mddev));
7520 if (sectors == 0) { 7557 if (sectors == 0) {
7521 set_bit(MD_RECOVERY_INTR, &mddev->recovery); 7558 set_bit(MD_RECOVERY_INTR, &mddev->recovery);
7522 goto out; 7559 break;
7523 } 7560 }
7524 7561
7525 if (!skipped) { /* actual IO requested */ 7562 if (!skipped) { /* actual IO requested */
@@ -7556,10 +7593,8 @@ void md_do_sync(struct md_thread *thread)
7556 last_mark = next; 7593 last_mark = next;
7557 } 7594 }
7558 7595
7559 7596 if (test_bit(MD_RECOVERY_INTR, &mddev->recovery))
7560 if (kthread_should_stop()) 7597 break;
7561 goto interrupted;
7562
7563 7598
7564 /* 7599 /*
7565 * this loop exits only if either when we are slower than 7600 * this loop exits only if either when we are slower than
@@ -7582,11 +7617,12 @@ void md_do_sync(struct md_thread *thread)
7582 } 7617 }
7583 } 7618 }
7584 } 7619 }
7585 printk(KERN_INFO "md: %s: %s done.\n",mdname(mddev), desc); 7620 printk(KERN_INFO "md: %s: %s %s.\n",mdname(mddev), desc,
7621 test_bit(MD_RECOVERY_INTR, &mddev->recovery)
7622 ? "interrupted" : "done");
7586 /* 7623 /*
7587 * this also signals 'finished resyncing' to md_stop 7624 * this also signals 'finished resyncing' to md_stop
7588 */ 7625 */
7589 out:
7590 blk_finish_plug(&plug); 7626 blk_finish_plug(&plug);
7591 wait_event(mddev->recovery_wait, !atomic_read(&mddev->recovery_active)); 7627 wait_event(mddev->recovery_wait, !atomic_read(&mddev->recovery_active));
7592 7628
@@ -7640,16 +7676,6 @@ void md_do_sync(struct md_thread *thread)
7640 set_bit(MD_RECOVERY_DONE, &mddev->recovery); 7676 set_bit(MD_RECOVERY_DONE, &mddev->recovery);
7641 md_wakeup_thread(mddev->thread); 7677 md_wakeup_thread(mddev->thread);
7642 return; 7678 return;
7643
7644 interrupted:
7645 /*
7646 * got a signal, exit.
7647 */
7648 printk(KERN_INFO
7649 "md: md_do_sync() got signal ... exiting\n");
7650 set_bit(MD_RECOVERY_INTR, &mddev->recovery);
7651 goto out;
7652
7653} 7679}
7654EXPORT_SYMBOL_GPL(md_do_sync); 7680EXPORT_SYMBOL_GPL(md_do_sync);
7655 7681
@@ -7894,6 +7920,7 @@ void md_reap_sync_thread(struct mddev *mddev)
7894 7920
7895 /* resync has finished, collect result */ 7921 /* resync has finished, collect result */
7896 md_unregister_thread(&mddev->sync_thread); 7922 md_unregister_thread(&mddev->sync_thread);
7923 wake_up(&resync_wait);
7897 if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery) && 7924 if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery) &&
7898 !test_bit(MD_RECOVERY_REQUESTED, &mddev->recovery)) { 7925 !test_bit(MD_RECOVERY_REQUESTED, &mddev->recovery)) {
7899 /* success...*/ 7926 /* success...*/
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c
index af6681b19776..1e5a540995e9 100644
--- a/drivers/md/raid1.c
+++ b/drivers/md/raid1.c
@@ -66,7 +66,8 @@
66 */ 66 */
67static int max_queued_requests = 1024; 67static int max_queued_requests = 1024;
68 68
69static void allow_barrier(struct r1conf *conf); 69static void allow_barrier(struct r1conf *conf, sector_t start_next_window,
70 sector_t bi_sector);
70static void lower_barrier(struct r1conf *conf); 71static void lower_barrier(struct r1conf *conf);
71 72
72static void * r1bio_pool_alloc(gfp_t gfp_flags, void *data) 73static void * r1bio_pool_alloc(gfp_t gfp_flags, void *data)
@@ -84,10 +85,12 @@ static void r1bio_pool_free(void *r1_bio, void *data)
84} 85}
85 86
86#define RESYNC_BLOCK_SIZE (64*1024) 87#define RESYNC_BLOCK_SIZE (64*1024)
87//#define RESYNC_BLOCK_SIZE PAGE_SIZE 88#define RESYNC_DEPTH 32
88#define RESYNC_SECTORS (RESYNC_BLOCK_SIZE >> 9) 89#define RESYNC_SECTORS (RESYNC_BLOCK_SIZE >> 9)
89#define RESYNC_PAGES ((RESYNC_BLOCK_SIZE + PAGE_SIZE-1) / PAGE_SIZE) 90#define RESYNC_PAGES ((RESYNC_BLOCK_SIZE + PAGE_SIZE-1) / PAGE_SIZE)
90#define RESYNC_WINDOW (2048*1024) 91#define RESYNC_WINDOW (RESYNC_BLOCK_SIZE * RESYNC_DEPTH)
92#define RESYNC_WINDOW_SECTORS (RESYNC_WINDOW >> 9)
93#define NEXT_NORMALIO_DISTANCE (3 * RESYNC_WINDOW_SECTORS)
91 94
92static void * r1buf_pool_alloc(gfp_t gfp_flags, void *data) 95static void * r1buf_pool_alloc(gfp_t gfp_flags, void *data)
93{ 96{
@@ -225,6 +228,8 @@ static void call_bio_endio(struct r1bio *r1_bio)
225 struct bio *bio = r1_bio->master_bio; 228 struct bio *bio = r1_bio->master_bio;
226 int done; 229 int done;
227 struct r1conf *conf = r1_bio->mddev->private; 230 struct r1conf *conf = r1_bio->mddev->private;
231 sector_t start_next_window = r1_bio->start_next_window;
232 sector_t bi_sector = bio->bi_sector;
228 233
229 if (bio->bi_phys_segments) { 234 if (bio->bi_phys_segments) {
230 unsigned long flags; 235 unsigned long flags;
@@ -232,6 +237,11 @@ static void call_bio_endio(struct r1bio *r1_bio)
232 bio->bi_phys_segments--; 237 bio->bi_phys_segments--;
233 done = (bio->bi_phys_segments == 0); 238 done = (bio->bi_phys_segments == 0);
234 spin_unlock_irqrestore(&conf->device_lock, flags); 239 spin_unlock_irqrestore(&conf->device_lock, flags);
240 /*
241 * make_request() might be waiting for
242 * bi_phys_segments to decrease
243 */
244 wake_up(&conf->wait_barrier);
235 } else 245 } else
236 done = 1; 246 done = 1;
237 247
@@ -243,7 +253,7 @@ static void call_bio_endio(struct r1bio *r1_bio)
243 * Wake up any possible resync thread that waits for the device 253 * Wake up any possible resync thread that waits for the device
244 * to go idle. 254 * to go idle.
245 */ 255 */
246 allow_barrier(conf); 256 allow_barrier(conf, start_next_window, bi_sector);
247 } 257 }
248} 258}
249 259
@@ -814,8 +824,6 @@ static void flush_pending_writes(struct r1conf *conf)
814 * there is no normal IO happeing. It must arrange to call 824 * there is no normal IO happeing. It must arrange to call
815 * lower_barrier when the particular background IO completes. 825 * lower_barrier when the particular background IO completes.
816 */ 826 */
817#define RESYNC_DEPTH 32
818
819static void raise_barrier(struct r1conf *conf) 827static void raise_barrier(struct r1conf *conf)
820{ 828{
821 spin_lock_irq(&conf->resync_lock); 829 spin_lock_irq(&conf->resync_lock);
@@ -827,9 +835,19 @@ static void raise_barrier(struct r1conf *conf)
827 /* block any new IO from starting */ 835 /* block any new IO from starting */
828 conf->barrier++; 836 conf->barrier++;
829 837
830 /* Now wait for all pending IO to complete */ 838 /* For these conditions we must wait:
839 * A: while the array is in frozen state
840 * B: while barrier >= RESYNC_DEPTH, meaning resync reach
841 * the max count which allowed.
842 * C: next_resync + RESYNC_SECTORS > start_next_window, meaning
843 * next resync will reach to the window which normal bios are
844 * handling.
845 */
831 wait_event_lock_irq(conf->wait_barrier, 846 wait_event_lock_irq(conf->wait_barrier,
832 !conf->nr_pending && conf->barrier < RESYNC_DEPTH, 847 !conf->array_frozen &&
848 conf->barrier < RESYNC_DEPTH &&
849 (conf->start_next_window >=
850 conf->next_resync + RESYNC_SECTORS),
833 conf->resync_lock); 851 conf->resync_lock);
834 852
835 spin_unlock_irq(&conf->resync_lock); 853 spin_unlock_irq(&conf->resync_lock);
@@ -845,10 +863,33 @@ static void lower_barrier(struct r1conf *conf)
845 wake_up(&conf->wait_barrier); 863 wake_up(&conf->wait_barrier);
846} 864}
847 865
848static void wait_barrier(struct r1conf *conf) 866static bool need_to_wait_for_sync(struct r1conf *conf, struct bio *bio)
849{ 867{
868 bool wait = false;
869
870 if (conf->array_frozen || !bio)
871 wait = true;
872 else if (conf->barrier && bio_data_dir(bio) == WRITE) {
873 if (conf->next_resync < RESYNC_WINDOW_SECTORS)
874 wait = true;
875 else if ((conf->next_resync - RESYNC_WINDOW_SECTORS
876 >= bio_end_sector(bio)) ||
877 (conf->next_resync + NEXT_NORMALIO_DISTANCE
878 <= bio->bi_sector))
879 wait = false;
880 else
881 wait = true;
882 }
883
884 return wait;
885}
886
887static sector_t wait_barrier(struct r1conf *conf, struct bio *bio)
888{
889 sector_t sector = 0;
890
850 spin_lock_irq(&conf->resync_lock); 891 spin_lock_irq(&conf->resync_lock);
851 if (conf->barrier) { 892 if (need_to_wait_for_sync(conf, bio)) {
852 conf->nr_waiting++; 893 conf->nr_waiting++;
853 /* Wait for the barrier to drop. 894 /* Wait for the barrier to drop.
854 * However if there are already pending 895 * However if there are already pending
@@ -860,22 +901,67 @@ static void wait_barrier(struct r1conf *conf)
860 * count down. 901 * count down.
861 */ 902 */
862 wait_event_lock_irq(conf->wait_barrier, 903 wait_event_lock_irq(conf->wait_barrier,
863 !conf->barrier || 904 !conf->array_frozen &&
864 (conf->nr_pending && 905 (!conf->barrier ||
906 ((conf->start_next_window <
907 conf->next_resync + RESYNC_SECTORS) &&
865 current->bio_list && 908 current->bio_list &&
866 !bio_list_empty(current->bio_list)), 909 !bio_list_empty(current->bio_list))),
867 conf->resync_lock); 910 conf->resync_lock);
868 conf->nr_waiting--; 911 conf->nr_waiting--;
869 } 912 }
913
914 if (bio && bio_data_dir(bio) == WRITE) {
915 if (conf->next_resync + NEXT_NORMALIO_DISTANCE
916 <= bio->bi_sector) {
917 if (conf->start_next_window == MaxSector)
918 conf->start_next_window =
919 conf->next_resync +
920 NEXT_NORMALIO_DISTANCE;
921
922 if ((conf->start_next_window + NEXT_NORMALIO_DISTANCE)
923 <= bio->bi_sector)
924 conf->next_window_requests++;
925 else
926 conf->current_window_requests++;
927 }
928 if (bio->bi_sector >= conf->start_next_window)
929 sector = conf->start_next_window;
930 }
931
870 conf->nr_pending++; 932 conf->nr_pending++;
871 spin_unlock_irq(&conf->resync_lock); 933 spin_unlock_irq(&conf->resync_lock);
934 return sector;
872} 935}
873 936
874static void allow_barrier(struct r1conf *conf) 937static void allow_barrier(struct r1conf *conf, sector_t start_next_window,
938 sector_t bi_sector)
875{ 939{
876 unsigned long flags; 940 unsigned long flags;
941
877 spin_lock_irqsave(&conf->resync_lock, flags); 942 spin_lock_irqsave(&conf->resync_lock, flags);
878 conf->nr_pending--; 943 conf->nr_pending--;
944 if (start_next_window) {
945 if (start_next_window == conf->start_next_window) {
946 if (conf->start_next_window + NEXT_NORMALIO_DISTANCE
947 <= bi_sector)
948 conf->next_window_requests--;
949 else
950 conf->current_window_requests--;
951 } else
952 conf->current_window_requests--;
953
954 if (!conf->current_window_requests) {
955 if (conf->next_window_requests) {
956 conf->current_window_requests =
957 conf->next_window_requests;
958 conf->next_window_requests = 0;
959 conf->start_next_window +=
960 NEXT_NORMALIO_DISTANCE;
961 } else
962 conf->start_next_window = MaxSector;
963 }
964 }
879 spin_unlock_irqrestore(&conf->resync_lock, flags); 965 spin_unlock_irqrestore(&conf->resync_lock, flags);
880 wake_up(&conf->wait_barrier); 966 wake_up(&conf->wait_barrier);
881} 967}
@@ -884,8 +970,7 @@ static void freeze_array(struct r1conf *conf, int extra)
884{ 970{
885 /* stop syncio and normal IO and wait for everything to 971 /* stop syncio and normal IO and wait for everything to
886 * go quite. 972 * go quite.
887 * We increment barrier and nr_waiting, and then 973 * We wait until nr_pending match nr_queued+extra
888 * wait until nr_pending match nr_queued+extra
889 * This is called in the context of one normal IO request 974 * This is called in the context of one normal IO request
890 * that has failed. Thus any sync request that might be pending 975 * that has failed. Thus any sync request that might be pending
891 * will be blocked by nr_pending, and we need to wait for 976 * will be blocked by nr_pending, and we need to wait for
@@ -895,8 +980,7 @@ static void freeze_array(struct r1conf *conf, int extra)
895 * we continue. 980 * we continue.
896 */ 981 */
897 spin_lock_irq(&conf->resync_lock); 982 spin_lock_irq(&conf->resync_lock);
898 conf->barrier++; 983 conf->array_frozen = 1;
899 conf->nr_waiting++;
900 wait_event_lock_irq_cmd(conf->wait_barrier, 984 wait_event_lock_irq_cmd(conf->wait_barrier,
901 conf->nr_pending == conf->nr_queued+extra, 985 conf->nr_pending == conf->nr_queued+extra,
902 conf->resync_lock, 986 conf->resync_lock,
@@ -907,8 +991,7 @@ static void unfreeze_array(struct r1conf *conf)
907{ 991{
908 /* reverse the effect of the freeze */ 992 /* reverse the effect of the freeze */
909 spin_lock_irq(&conf->resync_lock); 993 spin_lock_irq(&conf->resync_lock);
910 conf->barrier--; 994 conf->array_frozen = 0;
911 conf->nr_waiting--;
912 wake_up(&conf->wait_barrier); 995 wake_up(&conf->wait_barrier);
913 spin_unlock_irq(&conf->resync_lock); 996 spin_unlock_irq(&conf->resync_lock);
914} 997}
@@ -1013,6 +1096,7 @@ static void make_request(struct mddev *mddev, struct bio * bio)
1013 int first_clone; 1096 int first_clone;
1014 int sectors_handled; 1097 int sectors_handled;
1015 int max_sectors; 1098 int max_sectors;
1099 sector_t start_next_window;
1016 1100
1017 /* 1101 /*
1018 * Register the new request and wait if the reconstruction 1102 * Register the new request and wait if the reconstruction
@@ -1042,7 +1126,7 @@ static void make_request(struct mddev *mddev, struct bio * bio)
1042 finish_wait(&conf->wait_barrier, &w); 1126 finish_wait(&conf->wait_barrier, &w);
1043 } 1127 }
1044 1128
1045 wait_barrier(conf); 1129 start_next_window = wait_barrier(conf, bio);
1046 1130
1047 bitmap = mddev->bitmap; 1131 bitmap = mddev->bitmap;
1048 1132
@@ -1163,6 +1247,7 @@ read_again:
1163 1247
1164 disks = conf->raid_disks * 2; 1248 disks = conf->raid_disks * 2;
1165 retry_write: 1249 retry_write:
1250 r1_bio->start_next_window = start_next_window;
1166 blocked_rdev = NULL; 1251 blocked_rdev = NULL;
1167 rcu_read_lock(); 1252 rcu_read_lock();
1168 max_sectors = r1_bio->sectors; 1253 max_sectors = r1_bio->sectors;
@@ -1231,14 +1316,24 @@ read_again:
1231 if (unlikely(blocked_rdev)) { 1316 if (unlikely(blocked_rdev)) {
1232 /* Wait for this device to become unblocked */ 1317 /* Wait for this device to become unblocked */
1233 int j; 1318 int j;
1319 sector_t old = start_next_window;
1234 1320
1235 for (j = 0; j < i; j++) 1321 for (j = 0; j < i; j++)
1236 if (r1_bio->bios[j]) 1322 if (r1_bio->bios[j])
1237 rdev_dec_pending(conf->mirrors[j].rdev, mddev); 1323 rdev_dec_pending(conf->mirrors[j].rdev, mddev);
1238 r1_bio->state = 0; 1324 r1_bio->state = 0;
1239 allow_barrier(conf); 1325 allow_barrier(conf, start_next_window, bio->bi_sector);
1240 md_wait_for_blocked_rdev(blocked_rdev, mddev); 1326 md_wait_for_blocked_rdev(blocked_rdev, mddev);
1241 wait_barrier(conf); 1327 start_next_window = wait_barrier(conf, bio);
1328 /*
1329 * We must make sure the multi r1bios of bio have
1330 * the same value of bi_phys_segments
1331 */
1332 if (bio->bi_phys_segments && old &&
1333 old != start_next_window)
1334 /* Wait for the former r1bio(s) to complete */
1335 wait_event(conf->wait_barrier,
1336 bio->bi_phys_segments == 1);
1242 goto retry_write; 1337 goto retry_write;
1243 } 1338 }
1244 1339
@@ -1438,11 +1533,14 @@ static void print_conf(struct r1conf *conf)
1438 1533
1439static void close_sync(struct r1conf *conf) 1534static void close_sync(struct r1conf *conf)
1440{ 1535{
1441 wait_barrier(conf); 1536 wait_barrier(conf, NULL);
1442 allow_barrier(conf); 1537 allow_barrier(conf, 0, 0);
1443 1538
1444 mempool_destroy(conf->r1buf_pool); 1539 mempool_destroy(conf->r1buf_pool);
1445 conf->r1buf_pool = NULL; 1540 conf->r1buf_pool = NULL;
1541
1542 conf->next_resync = 0;
1543 conf->start_next_window = MaxSector;
1446} 1544}
1447 1545
1448static int raid1_spare_active(struct mddev *mddev) 1546static int raid1_spare_active(struct mddev *mddev)
@@ -2714,6 +2812,9 @@ static struct r1conf *setup_conf(struct mddev *mddev)
2714 conf->pending_count = 0; 2812 conf->pending_count = 0;
2715 conf->recovery_disabled = mddev->recovery_disabled - 1; 2813 conf->recovery_disabled = mddev->recovery_disabled - 1;
2716 2814
2815 conf->start_next_window = MaxSector;
2816 conf->current_window_requests = conf->next_window_requests = 0;
2817
2717 err = -EIO; 2818 err = -EIO;
2718 for (i = 0; i < conf->raid_disks * 2; i++) { 2819 for (i = 0; i < conf->raid_disks * 2; i++) {
2719 2820
@@ -2871,8 +2972,8 @@ static int stop(struct mddev *mddev)
2871 atomic_read(&bitmap->behind_writes) == 0); 2972 atomic_read(&bitmap->behind_writes) == 0);
2872 } 2973 }
2873 2974
2874 raise_barrier(conf); 2975 freeze_array(conf, 0);
2875 lower_barrier(conf); 2976 unfreeze_array(conf);
2876 2977
2877 md_unregister_thread(&mddev->thread); 2978 md_unregister_thread(&mddev->thread);
2878 if (conf->r1bio_pool) 2979 if (conf->r1bio_pool)
@@ -3031,10 +3132,10 @@ static void raid1_quiesce(struct mddev *mddev, int state)
3031 wake_up(&conf->wait_barrier); 3132 wake_up(&conf->wait_barrier);
3032 break; 3133 break;
3033 case 1: 3134 case 1:
3034 raise_barrier(conf); 3135 freeze_array(conf, 0);
3035 break; 3136 break;
3036 case 0: 3137 case 0:
3037 lower_barrier(conf); 3138 unfreeze_array(conf);
3038 break; 3139 break;
3039 } 3140 }
3040} 3141}
@@ -3051,7 +3152,8 @@ static void *raid1_takeover(struct mddev *mddev)
3051 mddev->new_chunk_sectors = 0; 3152 mddev->new_chunk_sectors = 0;
3052 conf = setup_conf(mddev); 3153 conf = setup_conf(mddev);
3053 if (!IS_ERR(conf)) 3154 if (!IS_ERR(conf))
3054 conf->barrier = 1; 3155 /* Array must appear to be quiesced */
3156 conf->array_frozen = 1;
3055 return conf; 3157 return conf;
3056 } 3158 }
3057 return ERR_PTR(-EINVAL); 3159 return ERR_PTR(-EINVAL);
diff --git a/drivers/md/raid1.h b/drivers/md/raid1.h
index 0ff3715fb7eb..9bebca7bff2f 100644
--- a/drivers/md/raid1.h
+++ b/drivers/md/raid1.h
@@ -41,6 +41,19 @@ struct r1conf {
41 */ 41 */
42 sector_t next_resync; 42 sector_t next_resync;
43 43
44 /* When raid1 starts resync, we divide array into four partitions
45 * |---------|--------------|---------------------|-------------|
46 * next_resync start_next_window end_window
47 * start_next_window = next_resync + NEXT_NORMALIO_DISTANCE
48 * end_window = start_next_window + NEXT_NORMALIO_DISTANCE
49 * current_window_requests means the count of normalIO between
50 * start_next_window and end_window.
51 * next_window_requests means the count of normalIO after end_window.
52 * */
53 sector_t start_next_window;
54 int current_window_requests;
55 int next_window_requests;
56
44 spinlock_t device_lock; 57 spinlock_t device_lock;
45 58
46 /* list of 'struct r1bio' that need to be processed by raid1d, 59 /* list of 'struct r1bio' that need to be processed by raid1d,
@@ -65,6 +78,7 @@ struct r1conf {
65 int nr_waiting; 78 int nr_waiting;
66 int nr_queued; 79 int nr_queued;
67 int barrier; 80 int barrier;
81 int array_frozen;
68 82
69 /* Set to 1 if a full sync is needed, (fresh device added). 83 /* Set to 1 if a full sync is needed, (fresh device added).
70 * Cleared when a sync completes. 84 * Cleared when a sync completes.
@@ -111,6 +125,7 @@ struct r1bio {
111 * in this BehindIO request 125 * in this BehindIO request
112 */ 126 */
113 sector_t sector; 127 sector_t sector;
128 sector_t start_next_window;
114 int sectors; 129 int sectors;
115 unsigned long state; 130 unsigned long state;
116 struct mddev *mddev; 131 struct mddev *mddev;
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c
index 7c3508abb5e1..c504e8389e69 100644
--- a/drivers/md/raid10.c
+++ b/drivers/md/raid10.c
@@ -4384,7 +4384,11 @@ static sector_t reshape_request(struct mddev *mddev, sector_t sector_nr,
4384 set_bit(MD_CHANGE_DEVS, &mddev->flags); 4384 set_bit(MD_CHANGE_DEVS, &mddev->flags);
4385 md_wakeup_thread(mddev->thread); 4385 md_wakeup_thread(mddev->thread);
4386 wait_event(mddev->sb_wait, mddev->flags == 0 || 4386 wait_event(mddev->sb_wait, mddev->flags == 0 ||
4387 kthread_should_stop()); 4387 test_bit(MD_RECOVERY_INTR, &mddev->recovery));
4388 if (test_bit(MD_RECOVERY_INTR, &mddev->recovery)) {
4389 allow_barrier(conf);
4390 return sectors_done;
4391 }
4388 conf->reshape_safe = mddev->reshape_position; 4392 conf->reshape_safe = mddev->reshape_position;
4389 allow_barrier(conf); 4393 allow_barrier(conf);
4390 } 4394 }
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index 7f0e17a27aeb..47da0af6322b 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -85,6 +85,42 @@ static inline struct hlist_head *stripe_hash(struct r5conf *conf, sector_t sect)
85 return &conf->stripe_hashtbl[hash]; 85 return &conf->stripe_hashtbl[hash];
86} 86}
87 87
88static inline int stripe_hash_locks_hash(sector_t sect)
89{
90 return (sect >> STRIPE_SHIFT) & STRIPE_HASH_LOCKS_MASK;
91}
92
93static inline void lock_device_hash_lock(struct r5conf *conf, int hash)
94{
95 spin_lock_irq(conf->hash_locks + hash);
96 spin_lock(&conf->device_lock);
97}
98
99static inline void unlock_device_hash_lock(struct r5conf *conf, int hash)
100{
101 spin_unlock(&conf->device_lock);
102 spin_unlock_irq(conf->hash_locks + hash);
103}
104
105static inline void lock_all_device_hash_locks_irq(struct r5conf *conf)
106{
107 int i;
108 local_irq_disable();
109 spin_lock(conf->hash_locks);
110 for (i = 1; i < NR_STRIPE_HASH_LOCKS; i++)
111 spin_lock_nest_lock(conf->hash_locks + i, conf->hash_locks);
112 spin_lock(&conf->device_lock);
113}
114
115static inline void unlock_all_device_hash_locks_irq(struct r5conf *conf)
116{
117 int i;
118 spin_unlock(&conf->device_lock);
119 for (i = NR_STRIPE_HASH_LOCKS; i; i--)
120 spin_unlock(conf->hash_locks + i - 1);
121 local_irq_enable();
122}
123
88/* bio's attached to a stripe+device for I/O are linked together in bi_sector 124/* bio's attached to a stripe+device for I/O are linked together in bi_sector
89 * order without overlap. There may be several bio's per stripe+device, and 125 * order without overlap. There may be several bio's per stripe+device, and
90 * a bio could span several devices. 126 * a bio could span several devices.
@@ -249,7 +285,8 @@ static void raid5_wakeup_stripe_thread(struct stripe_head *sh)
249 } 285 }
250} 286}
251 287
252static void do_release_stripe(struct r5conf *conf, struct stripe_head *sh) 288static void do_release_stripe(struct r5conf *conf, struct stripe_head *sh,
289 struct list_head *temp_inactive_list)
253{ 290{
254 BUG_ON(!list_empty(&sh->lru)); 291 BUG_ON(!list_empty(&sh->lru));
255 BUG_ON(atomic_read(&conf->active_stripes)==0); 292 BUG_ON(atomic_read(&conf->active_stripes)==0);
@@ -278,23 +315,68 @@ static void do_release_stripe(struct r5conf *conf, struct stripe_head *sh)
278 < IO_THRESHOLD) 315 < IO_THRESHOLD)
279 md_wakeup_thread(conf->mddev->thread); 316 md_wakeup_thread(conf->mddev->thread);
280 atomic_dec(&conf->active_stripes); 317 atomic_dec(&conf->active_stripes);
281 if (!test_bit(STRIPE_EXPANDING, &sh->state)) { 318 if (!test_bit(STRIPE_EXPANDING, &sh->state))
282 list_add_tail(&sh->lru, &conf->inactive_list); 319 list_add_tail(&sh->lru, temp_inactive_list);
283 wake_up(&conf->wait_for_stripe);
284 if (conf->retry_read_aligned)
285 md_wakeup_thread(conf->mddev->thread);
286 }
287 } 320 }
288} 321}
289 322
290static void __release_stripe(struct r5conf *conf, struct stripe_head *sh) 323static void __release_stripe(struct r5conf *conf, struct stripe_head *sh,
324 struct list_head *temp_inactive_list)
291{ 325{
292 if (atomic_dec_and_test(&sh->count)) 326 if (atomic_dec_and_test(&sh->count))
293 do_release_stripe(conf, sh); 327 do_release_stripe(conf, sh, temp_inactive_list);
328}
329
330/*
331 * @hash could be NR_STRIPE_HASH_LOCKS, then we have a list of inactive_list
332 *
333 * Be careful: Only one task can add/delete stripes from temp_inactive_list at
334 * given time. Adding stripes only takes device lock, while deleting stripes
335 * only takes hash lock.
336 */
337static void release_inactive_stripe_list(struct r5conf *conf,
338 struct list_head *temp_inactive_list,
339 int hash)
340{
341 int size;
342 bool do_wakeup = false;
343 unsigned long flags;
344
345 if (hash == NR_STRIPE_HASH_LOCKS) {
346 size = NR_STRIPE_HASH_LOCKS;
347 hash = NR_STRIPE_HASH_LOCKS - 1;
348 } else
349 size = 1;
350 while (size) {
351 struct list_head *list = &temp_inactive_list[size - 1];
352
353 /*
354 * We don't hold any lock here yet, get_active_stripe() might
355 * remove stripes from the list
356 */
357 if (!list_empty_careful(list)) {
358 spin_lock_irqsave(conf->hash_locks + hash, flags);
359 if (list_empty(conf->inactive_list + hash) &&
360 !list_empty(list))
361 atomic_dec(&conf->empty_inactive_list_nr);
362 list_splice_tail_init(list, conf->inactive_list + hash);
363 do_wakeup = true;
364 spin_unlock_irqrestore(conf->hash_locks + hash, flags);
365 }
366 size--;
367 hash--;
368 }
369
370 if (do_wakeup) {
371 wake_up(&conf->wait_for_stripe);
372 if (conf->retry_read_aligned)
373 md_wakeup_thread(conf->mddev->thread);
374 }
294} 375}
295 376
296/* should hold conf->device_lock already */ 377/* should hold conf->device_lock already */
297static int release_stripe_list(struct r5conf *conf) 378static int release_stripe_list(struct r5conf *conf,
379 struct list_head *temp_inactive_list)
298{ 380{
299 struct stripe_head *sh; 381 struct stripe_head *sh;
300 int count = 0; 382 int count = 0;
@@ -303,6 +385,8 @@ static int release_stripe_list(struct r5conf *conf)
303 head = llist_del_all(&conf->released_stripes); 385 head = llist_del_all(&conf->released_stripes);
304 head = llist_reverse_order(head); 386 head = llist_reverse_order(head);
305 while (head) { 387 while (head) {
388 int hash;
389
306 sh = llist_entry(head, struct stripe_head, release_list); 390 sh = llist_entry(head, struct stripe_head, release_list);
307 head = llist_next(head); 391 head = llist_next(head);
308 /* sh could be readded after STRIPE_ON_RELEASE_LIST is cleard */ 392 /* sh could be readded after STRIPE_ON_RELEASE_LIST is cleard */
@@ -313,7 +397,8 @@ static int release_stripe_list(struct r5conf *conf)
313 * again, the count is always > 1. This is true for 397 * again, the count is always > 1. This is true for
314 * STRIPE_ON_UNPLUG_LIST bit too. 398 * STRIPE_ON_UNPLUG_LIST bit too.
315 */ 399 */
316 __release_stripe(conf, sh); 400 hash = sh->hash_lock_index;
401 __release_stripe(conf, sh, &temp_inactive_list[hash]);
317 count++; 402 count++;
318 } 403 }
319 404
@@ -324,9 +409,12 @@ static void release_stripe(struct stripe_head *sh)
324{ 409{
325 struct r5conf *conf = sh->raid_conf; 410 struct r5conf *conf = sh->raid_conf;
326 unsigned long flags; 411 unsigned long flags;
412 struct list_head list;
413 int hash;
327 bool wakeup; 414 bool wakeup;
328 415
329 if (test_and_set_bit(STRIPE_ON_RELEASE_LIST, &sh->state)) 416 if (unlikely(!conf->mddev->thread) ||
417 test_and_set_bit(STRIPE_ON_RELEASE_LIST, &sh->state))
330 goto slow_path; 418 goto slow_path;
331 wakeup = llist_add(&sh->release_list, &conf->released_stripes); 419 wakeup = llist_add(&sh->release_list, &conf->released_stripes);
332 if (wakeup) 420 if (wakeup)
@@ -336,8 +424,11 @@ slow_path:
336 local_irq_save(flags); 424 local_irq_save(flags);
337 /* we are ok here if STRIPE_ON_RELEASE_LIST is set or not */ 425 /* we are ok here if STRIPE_ON_RELEASE_LIST is set or not */
338 if (atomic_dec_and_lock(&sh->count, &conf->device_lock)) { 426 if (atomic_dec_and_lock(&sh->count, &conf->device_lock)) {
339 do_release_stripe(conf, sh); 427 INIT_LIST_HEAD(&list);
428 hash = sh->hash_lock_index;
429 do_release_stripe(conf, sh, &list);
340 spin_unlock(&conf->device_lock); 430 spin_unlock(&conf->device_lock);
431 release_inactive_stripe_list(conf, &list, hash);
341 } 432 }
342 local_irq_restore(flags); 433 local_irq_restore(flags);
343} 434}
@@ -362,18 +453,21 @@ static inline void insert_hash(struct r5conf *conf, struct stripe_head *sh)
362 453
363 454
364/* find an idle stripe, make sure it is unhashed, and return it. */ 455/* find an idle stripe, make sure it is unhashed, and return it. */
365static struct stripe_head *get_free_stripe(struct r5conf *conf) 456static struct stripe_head *get_free_stripe(struct r5conf *conf, int hash)
366{ 457{
367 struct stripe_head *sh = NULL; 458 struct stripe_head *sh = NULL;
368 struct list_head *first; 459 struct list_head *first;
369 460
370 if (list_empty(&conf->inactive_list)) 461 if (list_empty(conf->inactive_list + hash))
371 goto out; 462 goto out;
372 first = conf->inactive_list.next; 463 first = (conf->inactive_list + hash)->next;
373 sh = list_entry(first, struct stripe_head, lru); 464 sh = list_entry(first, struct stripe_head, lru);
374 list_del_init(first); 465 list_del_init(first);
375 remove_hash(sh); 466 remove_hash(sh);
376 atomic_inc(&conf->active_stripes); 467 atomic_inc(&conf->active_stripes);
468 BUG_ON(hash != sh->hash_lock_index);
469 if (list_empty(conf->inactive_list + hash))
470 atomic_inc(&conf->empty_inactive_list_nr);
377out: 471out:
378 return sh; 472 return sh;
379} 473}
@@ -416,7 +510,7 @@ static void stripe_set_idx(sector_t stripe, struct r5conf *conf, int previous,
416static void init_stripe(struct stripe_head *sh, sector_t sector, int previous) 510static void init_stripe(struct stripe_head *sh, sector_t sector, int previous)
417{ 511{
418 struct r5conf *conf = sh->raid_conf; 512 struct r5conf *conf = sh->raid_conf;
419 int i; 513 int i, seq;
420 514
421 BUG_ON(atomic_read(&sh->count) != 0); 515 BUG_ON(atomic_read(&sh->count) != 0);
422 BUG_ON(test_bit(STRIPE_HANDLE, &sh->state)); 516 BUG_ON(test_bit(STRIPE_HANDLE, &sh->state));
@@ -426,7 +520,8 @@ static void init_stripe(struct stripe_head *sh, sector_t sector, int previous)
426 (unsigned long long)sh->sector); 520 (unsigned long long)sh->sector);
427 521
428 remove_hash(sh); 522 remove_hash(sh);
429 523retry:
524 seq = read_seqcount_begin(&conf->gen_lock);
430 sh->generation = conf->generation - previous; 525 sh->generation = conf->generation - previous;
431 sh->disks = previous ? conf->previous_raid_disks : conf->raid_disks; 526 sh->disks = previous ? conf->previous_raid_disks : conf->raid_disks;
432 sh->sector = sector; 527 sh->sector = sector;
@@ -448,6 +543,8 @@ static void init_stripe(struct stripe_head *sh, sector_t sector, int previous)
448 dev->flags = 0; 543 dev->flags = 0;
449 raid5_build_block(sh, i, previous); 544 raid5_build_block(sh, i, previous);
450 } 545 }
546 if (read_seqcount_retry(&conf->gen_lock, seq))
547 goto retry;
451 insert_hash(conf, sh); 548 insert_hash(conf, sh);
452 sh->cpu = smp_processor_id(); 549 sh->cpu = smp_processor_id();
453} 550}
@@ -552,29 +649,31 @@ get_active_stripe(struct r5conf *conf, sector_t sector,
552 int previous, int noblock, int noquiesce) 649 int previous, int noblock, int noquiesce)
553{ 650{
554 struct stripe_head *sh; 651 struct stripe_head *sh;
652 int hash = stripe_hash_locks_hash(sector);
555 653
556 pr_debug("get_stripe, sector %llu\n", (unsigned long long)sector); 654 pr_debug("get_stripe, sector %llu\n", (unsigned long long)sector);
557 655
558 spin_lock_irq(&conf->device_lock); 656 spin_lock_irq(conf->hash_locks + hash);
559 657
560 do { 658 do {
561 wait_event_lock_irq(conf->wait_for_stripe, 659 wait_event_lock_irq(conf->wait_for_stripe,
562 conf->quiesce == 0 || noquiesce, 660 conf->quiesce == 0 || noquiesce,
563 conf->device_lock); 661 *(conf->hash_locks + hash));
564 sh = __find_stripe(conf, sector, conf->generation - previous); 662 sh = __find_stripe(conf, sector, conf->generation - previous);
565 if (!sh) { 663 if (!sh) {
566 if (!conf->inactive_blocked) 664 if (!conf->inactive_blocked)
567 sh = get_free_stripe(conf); 665 sh = get_free_stripe(conf, hash);
568 if (noblock && sh == NULL) 666 if (noblock && sh == NULL)
569 break; 667 break;
570 if (!sh) { 668 if (!sh) {
571 conf->inactive_blocked = 1; 669 conf->inactive_blocked = 1;
572 wait_event_lock_irq(conf->wait_for_stripe, 670 wait_event_lock_irq(
573 !list_empty(&conf->inactive_list) && 671 conf->wait_for_stripe,
574 (atomic_read(&conf->active_stripes) 672 !list_empty(conf->inactive_list + hash) &&
575 < (conf->max_nr_stripes *3/4) 673 (atomic_read(&conf->active_stripes)
576 || !conf->inactive_blocked), 674 < (conf->max_nr_stripes * 3 / 4)
577 conf->device_lock); 675 || !conf->inactive_blocked),
676 *(conf->hash_locks + hash));
578 conf->inactive_blocked = 0; 677 conf->inactive_blocked = 0;
579 } else 678 } else
580 init_stripe(sh, sector, previous); 679 init_stripe(sh, sector, previous);
@@ -585,9 +684,11 @@ get_active_stripe(struct r5conf *conf, sector_t sector,
585 && !test_bit(STRIPE_ON_UNPLUG_LIST, &sh->state) 684 && !test_bit(STRIPE_ON_UNPLUG_LIST, &sh->state)
586 && !test_bit(STRIPE_ON_RELEASE_LIST, &sh->state)); 685 && !test_bit(STRIPE_ON_RELEASE_LIST, &sh->state));
587 } else { 686 } else {
687 spin_lock(&conf->device_lock);
588 if (!test_bit(STRIPE_HANDLE, &sh->state)) 688 if (!test_bit(STRIPE_HANDLE, &sh->state))
589 atomic_inc(&conf->active_stripes); 689 atomic_inc(&conf->active_stripes);
590 if (list_empty(&sh->lru) && 690 if (list_empty(&sh->lru) &&
691 !test_bit(STRIPE_ON_RELEASE_LIST, &sh->state) &&
591 !test_bit(STRIPE_EXPANDING, &sh->state)) 692 !test_bit(STRIPE_EXPANDING, &sh->state))
592 BUG(); 693 BUG();
593 list_del_init(&sh->lru); 694 list_del_init(&sh->lru);
@@ -595,6 +696,7 @@ get_active_stripe(struct r5conf *conf, sector_t sector,
595 sh->group->stripes_cnt--; 696 sh->group->stripes_cnt--;
596 sh->group = NULL; 697 sh->group = NULL;
597 } 698 }
699 spin_unlock(&conf->device_lock);
598 } 700 }
599 } 701 }
600 } while (sh == NULL); 702 } while (sh == NULL);
@@ -602,7 +704,7 @@ get_active_stripe(struct r5conf *conf, sector_t sector,
602 if (sh) 704 if (sh)
603 atomic_inc(&sh->count); 705 atomic_inc(&sh->count);
604 706
605 spin_unlock_irq(&conf->device_lock); 707 spin_unlock_irq(conf->hash_locks + hash);
606 return sh; 708 return sh;
607} 709}
608 710
@@ -758,7 +860,7 @@ static void ops_run_io(struct stripe_head *sh, struct stripe_head_state *s)
758 bi->bi_sector = (sh->sector 860 bi->bi_sector = (sh->sector
759 + rdev->data_offset); 861 + rdev->data_offset);
760 if (test_bit(R5_ReadNoMerge, &sh->dev[i].flags)) 862 if (test_bit(R5_ReadNoMerge, &sh->dev[i].flags))
761 bi->bi_rw |= REQ_FLUSH; 863 bi->bi_rw |= REQ_NOMERGE;
762 864
763 bi->bi_vcnt = 1; 865 bi->bi_vcnt = 1;
764 bi->bi_io_vec[0].bv_len = STRIPE_SIZE; 866 bi->bi_io_vec[0].bv_len = STRIPE_SIZE;
@@ -1582,7 +1684,7 @@ static void raid_run_ops(struct stripe_head *sh, unsigned long ops_request)
1582 put_cpu(); 1684 put_cpu();
1583} 1685}
1584 1686
1585static int grow_one_stripe(struct r5conf *conf) 1687static int grow_one_stripe(struct r5conf *conf, int hash)
1586{ 1688{
1587 struct stripe_head *sh; 1689 struct stripe_head *sh;
1588 sh = kmem_cache_zalloc(conf->slab_cache, GFP_KERNEL); 1690 sh = kmem_cache_zalloc(conf->slab_cache, GFP_KERNEL);
@@ -1598,6 +1700,7 @@ static int grow_one_stripe(struct r5conf *conf)
1598 kmem_cache_free(conf->slab_cache, sh); 1700 kmem_cache_free(conf->slab_cache, sh);
1599 return 0; 1701 return 0;
1600 } 1702 }
1703 sh->hash_lock_index = hash;
1601 /* we just created an active stripe so... */ 1704 /* we just created an active stripe so... */
1602 atomic_set(&sh->count, 1); 1705 atomic_set(&sh->count, 1);
1603 atomic_inc(&conf->active_stripes); 1706 atomic_inc(&conf->active_stripes);
@@ -1610,6 +1713,7 @@ static int grow_stripes(struct r5conf *conf, int num)
1610{ 1713{
1611 struct kmem_cache *sc; 1714 struct kmem_cache *sc;
1612 int devs = max(conf->raid_disks, conf->previous_raid_disks); 1715 int devs = max(conf->raid_disks, conf->previous_raid_disks);
1716 int hash;
1613 1717
1614 if (conf->mddev->gendisk) 1718 if (conf->mddev->gendisk)
1615 sprintf(conf->cache_name[0], 1719 sprintf(conf->cache_name[0],
@@ -1627,9 +1731,13 @@ static int grow_stripes(struct r5conf *conf, int num)
1627 return 1; 1731 return 1;
1628 conf->slab_cache = sc; 1732 conf->slab_cache = sc;
1629 conf->pool_size = devs; 1733 conf->pool_size = devs;
1630 while (num--) 1734 hash = conf->max_nr_stripes % NR_STRIPE_HASH_LOCKS;
1631 if (!grow_one_stripe(conf)) 1735 while (num--) {
1736 if (!grow_one_stripe(conf, hash))
1632 return 1; 1737 return 1;
1738 conf->max_nr_stripes++;
1739 hash = (hash + 1) % NR_STRIPE_HASH_LOCKS;
1740 }
1633 return 0; 1741 return 0;
1634} 1742}
1635 1743
@@ -1687,6 +1795,7 @@ static int resize_stripes(struct r5conf *conf, int newsize)
1687 int err; 1795 int err;
1688 struct kmem_cache *sc; 1796 struct kmem_cache *sc;
1689 int i; 1797 int i;
1798 int hash, cnt;
1690 1799
1691 if (newsize <= conf->pool_size) 1800 if (newsize <= conf->pool_size)
1692 return 0; /* never bother to shrink */ 1801 return 0; /* never bother to shrink */
@@ -1726,19 +1835,29 @@ static int resize_stripes(struct r5conf *conf, int newsize)
1726 * OK, we have enough stripes, start collecting inactive 1835 * OK, we have enough stripes, start collecting inactive
1727 * stripes and copying them over 1836 * stripes and copying them over
1728 */ 1837 */
1838 hash = 0;
1839 cnt = 0;
1729 list_for_each_entry(nsh, &newstripes, lru) { 1840 list_for_each_entry(nsh, &newstripes, lru) {
1730 spin_lock_irq(&conf->device_lock); 1841 lock_device_hash_lock(conf, hash);
1731 wait_event_lock_irq(conf->wait_for_stripe, 1842 wait_event_cmd(conf->wait_for_stripe,
1732 !list_empty(&conf->inactive_list), 1843 !list_empty(conf->inactive_list + hash),
1733 conf->device_lock); 1844 unlock_device_hash_lock(conf, hash),
1734 osh = get_free_stripe(conf); 1845 lock_device_hash_lock(conf, hash));
1735 spin_unlock_irq(&conf->device_lock); 1846 osh = get_free_stripe(conf, hash);
1847 unlock_device_hash_lock(conf, hash);
1736 atomic_set(&nsh->count, 1); 1848 atomic_set(&nsh->count, 1);
1737 for(i=0; i<conf->pool_size; i++) 1849 for(i=0; i<conf->pool_size; i++)
1738 nsh->dev[i].page = osh->dev[i].page; 1850 nsh->dev[i].page = osh->dev[i].page;
1739 for( ; i<newsize; i++) 1851 for( ; i<newsize; i++)
1740 nsh->dev[i].page = NULL; 1852 nsh->dev[i].page = NULL;
1853 nsh->hash_lock_index = hash;
1741 kmem_cache_free(conf->slab_cache, osh); 1854 kmem_cache_free(conf->slab_cache, osh);
1855 cnt++;
1856 if (cnt >= conf->max_nr_stripes / NR_STRIPE_HASH_LOCKS +
1857 !!((conf->max_nr_stripes % NR_STRIPE_HASH_LOCKS) > hash)) {
1858 hash++;
1859 cnt = 0;
1860 }
1742 } 1861 }
1743 kmem_cache_destroy(conf->slab_cache); 1862 kmem_cache_destroy(conf->slab_cache);
1744 1863
@@ -1797,13 +1916,13 @@ static int resize_stripes(struct r5conf *conf, int newsize)
1797 return err; 1916 return err;
1798} 1917}
1799 1918
1800static int drop_one_stripe(struct r5conf *conf) 1919static int drop_one_stripe(struct r5conf *conf, int hash)
1801{ 1920{
1802 struct stripe_head *sh; 1921 struct stripe_head *sh;
1803 1922
1804 spin_lock_irq(&conf->device_lock); 1923 spin_lock_irq(conf->hash_locks + hash);
1805 sh = get_free_stripe(conf); 1924 sh = get_free_stripe(conf, hash);
1806 spin_unlock_irq(&conf->device_lock); 1925 spin_unlock_irq(conf->hash_locks + hash);
1807 if (!sh) 1926 if (!sh)
1808 return 0; 1927 return 0;
1809 BUG_ON(atomic_read(&sh->count)); 1928 BUG_ON(atomic_read(&sh->count));
@@ -1815,8 +1934,10 @@ static int drop_one_stripe(struct r5conf *conf)
1815 1934
1816static void shrink_stripes(struct r5conf *conf) 1935static void shrink_stripes(struct r5conf *conf)
1817{ 1936{
1818 while (drop_one_stripe(conf)) 1937 int hash;
1819 ; 1938 for (hash = 0; hash < NR_STRIPE_HASH_LOCKS; hash++)
1939 while (drop_one_stripe(conf, hash))
1940 ;
1820 1941
1821 if (conf->slab_cache) 1942 if (conf->slab_cache)
1822 kmem_cache_destroy(conf->slab_cache); 1943 kmem_cache_destroy(conf->slab_cache);
@@ -1921,6 +2042,9 @@ static void raid5_end_read_request(struct bio * bi, int error)
1921 mdname(conf->mddev), bdn); 2042 mdname(conf->mddev), bdn);
1922 else 2043 else
1923 retry = 1; 2044 retry = 1;
2045 if (set_bad && test_bit(In_sync, &rdev->flags)
2046 && !test_bit(R5_ReadNoMerge, &sh->dev[i].flags))
2047 retry = 1;
1924 if (retry) 2048 if (retry)
1925 if (test_bit(R5_ReadNoMerge, &sh->dev[i].flags)) { 2049 if (test_bit(R5_ReadNoMerge, &sh->dev[i].flags)) {
1926 set_bit(R5_ReadError, &sh->dev[i].flags); 2050 set_bit(R5_ReadError, &sh->dev[i].flags);
@@ -3900,7 +4024,8 @@ static void raid5_activate_delayed(struct r5conf *conf)
3900 } 4024 }
3901} 4025}
3902 4026
3903static void activate_bit_delay(struct r5conf *conf) 4027static void activate_bit_delay(struct r5conf *conf,
4028 struct list_head *temp_inactive_list)
3904{ 4029{
3905 /* device_lock is held */ 4030 /* device_lock is held */
3906 struct list_head head; 4031 struct list_head head;
@@ -3908,9 +4033,11 @@ static void activate_bit_delay(struct r5conf *conf)
3908 list_del_init(&conf->bitmap_list); 4033 list_del_init(&conf->bitmap_list);
3909 while (!list_empty(&head)) { 4034 while (!list_empty(&head)) {
3910 struct stripe_head *sh = list_entry(head.next, struct stripe_head, lru); 4035 struct stripe_head *sh = list_entry(head.next, struct stripe_head, lru);
4036 int hash;
3911 list_del_init(&sh->lru); 4037 list_del_init(&sh->lru);
3912 atomic_inc(&sh->count); 4038 atomic_inc(&sh->count);
3913 __release_stripe(conf, sh); 4039 hash = sh->hash_lock_index;
4040 __release_stripe(conf, sh, &temp_inactive_list[hash]);
3914 } 4041 }
3915} 4042}
3916 4043
@@ -3926,7 +4053,7 @@ int md_raid5_congested(struct mddev *mddev, int bits)
3926 return 1; 4053 return 1;
3927 if (conf->quiesce) 4054 if (conf->quiesce)
3928 return 1; 4055 return 1;
3929 if (list_empty_careful(&conf->inactive_list)) 4056 if (atomic_read(&conf->empty_inactive_list_nr))
3930 return 1; 4057 return 1;
3931 4058
3932 return 0; 4059 return 0;
@@ -4256,6 +4383,7 @@ static struct stripe_head *__get_priority_stripe(struct r5conf *conf, int group)
4256struct raid5_plug_cb { 4383struct raid5_plug_cb {
4257 struct blk_plug_cb cb; 4384 struct blk_plug_cb cb;
4258 struct list_head list; 4385 struct list_head list;
4386 struct list_head temp_inactive_list[NR_STRIPE_HASH_LOCKS];
4259}; 4387};
4260 4388
4261static void raid5_unplug(struct blk_plug_cb *blk_cb, bool from_schedule) 4389static void raid5_unplug(struct blk_plug_cb *blk_cb, bool from_schedule)
@@ -4266,6 +4394,7 @@ static void raid5_unplug(struct blk_plug_cb *blk_cb, bool from_schedule)
4266 struct mddev *mddev = cb->cb.data; 4394 struct mddev *mddev = cb->cb.data;
4267 struct r5conf *conf = mddev->private; 4395 struct r5conf *conf = mddev->private;
4268 int cnt = 0; 4396 int cnt = 0;
4397 int hash;
4269 4398
4270 if (cb->list.next && !list_empty(&cb->list)) { 4399 if (cb->list.next && !list_empty(&cb->list)) {
4271 spin_lock_irq(&conf->device_lock); 4400 spin_lock_irq(&conf->device_lock);
@@ -4283,11 +4412,14 @@ static void raid5_unplug(struct blk_plug_cb *blk_cb, bool from_schedule)
4283 * STRIPE_ON_RELEASE_LIST could be set here. In that 4412 * STRIPE_ON_RELEASE_LIST could be set here. In that
4284 * case, the count is always > 1 here 4413 * case, the count is always > 1 here
4285 */ 4414 */
4286 __release_stripe(conf, sh); 4415 hash = sh->hash_lock_index;
4416 __release_stripe(conf, sh, &cb->temp_inactive_list[hash]);
4287 cnt++; 4417 cnt++;
4288 } 4418 }
4289 spin_unlock_irq(&conf->device_lock); 4419 spin_unlock_irq(&conf->device_lock);
4290 } 4420 }
4421 release_inactive_stripe_list(conf, cb->temp_inactive_list,
4422 NR_STRIPE_HASH_LOCKS);
4291 if (mddev->queue) 4423 if (mddev->queue)
4292 trace_block_unplug(mddev->queue, cnt, !from_schedule); 4424 trace_block_unplug(mddev->queue, cnt, !from_schedule);
4293 kfree(cb); 4425 kfree(cb);
@@ -4308,8 +4440,12 @@ static void release_stripe_plug(struct mddev *mddev,
4308 4440
4309 cb = container_of(blk_cb, struct raid5_plug_cb, cb); 4441 cb = container_of(blk_cb, struct raid5_plug_cb, cb);
4310 4442
4311 if (cb->list.next == NULL) 4443 if (cb->list.next == NULL) {
4444 int i;
4312 INIT_LIST_HEAD(&cb->list); 4445 INIT_LIST_HEAD(&cb->list);
4446 for (i = 0; i < NR_STRIPE_HASH_LOCKS; i++)
4447 INIT_LIST_HEAD(cb->temp_inactive_list + i);
4448 }
4313 4449
4314 if (!test_and_set_bit(STRIPE_ON_UNPLUG_LIST, &sh->state)) 4450 if (!test_and_set_bit(STRIPE_ON_UNPLUG_LIST, &sh->state))
4315 list_add_tail(&sh->lru, &cb->list); 4451 list_add_tail(&sh->lru, &cb->list);
@@ -4692,14 +4828,19 @@ static sector_t reshape_request(struct mddev *mddev, sector_t sector_nr, int *sk
4692 time_after(jiffies, conf->reshape_checkpoint + 10*HZ)) { 4828 time_after(jiffies, conf->reshape_checkpoint + 10*HZ)) {
4693 /* Cannot proceed until we've updated the superblock... */ 4829 /* Cannot proceed until we've updated the superblock... */
4694 wait_event(conf->wait_for_overlap, 4830 wait_event(conf->wait_for_overlap,
4695 atomic_read(&conf->reshape_stripes)==0); 4831 atomic_read(&conf->reshape_stripes)==0
4832 || test_bit(MD_RECOVERY_INTR, &mddev->recovery));
4833 if (atomic_read(&conf->reshape_stripes) != 0)
4834 return 0;
4696 mddev->reshape_position = conf->reshape_progress; 4835 mddev->reshape_position = conf->reshape_progress;
4697 mddev->curr_resync_completed = sector_nr; 4836 mddev->curr_resync_completed = sector_nr;
4698 conf->reshape_checkpoint = jiffies; 4837 conf->reshape_checkpoint = jiffies;
4699 set_bit(MD_CHANGE_DEVS, &mddev->flags); 4838 set_bit(MD_CHANGE_DEVS, &mddev->flags);
4700 md_wakeup_thread(mddev->thread); 4839 md_wakeup_thread(mddev->thread);
4701 wait_event(mddev->sb_wait, mddev->flags == 0 || 4840 wait_event(mddev->sb_wait, mddev->flags == 0 ||
4702 kthread_should_stop()); 4841 test_bit(MD_RECOVERY_INTR, &mddev->recovery));
4842 if (test_bit(MD_RECOVERY_INTR, &mddev->recovery))
4843 return 0;
4703 spin_lock_irq(&conf->device_lock); 4844 spin_lock_irq(&conf->device_lock);
4704 conf->reshape_safe = mddev->reshape_position; 4845 conf->reshape_safe = mddev->reshape_position;
4705 spin_unlock_irq(&conf->device_lock); 4846 spin_unlock_irq(&conf->device_lock);
@@ -4782,7 +4923,10 @@ static sector_t reshape_request(struct mddev *mddev, sector_t sector_nr, int *sk
4782 >= mddev->resync_max - mddev->curr_resync_completed) { 4923 >= mddev->resync_max - mddev->curr_resync_completed) {
4783 /* Cannot proceed until we've updated the superblock... */ 4924 /* Cannot proceed until we've updated the superblock... */
4784 wait_event(conf->wait_for_overlap, 4925 wait_event(conf->wait_for_overlap,
4785 atomic_read(&conf->reshape_stripes) == 0); 4926 atomic_read(&conf->reshape_stripes) == 0
4927 || test_bit(MD_RECOVERY_INTR, &mddev->recovery));
4928 if (atomic_read(&conf->reshape_stripes) != 0)
4929 goto ret;
4786 mddev->reshape_position = conf->reshape_progress; 4930 mddev->reshape_position = conf->reshape_progress;
4787 mddev->curr_resync_completed = sector_nr; 4931 mddev->curr_resync_completed = sector_nr;
4788 conf->reshape_checkpoint = jiffies; 4932 conf->reshape_checkpoint = jiffies;
@@ -4790,13 +4934,16 @@ static sector_t reshape_request(struct mddev *mddev, sector_t sector_nr, int *sk
4790 md_wakeup_thread(mddev->thread); 4934 md_wakeup_thread(mddev->thread);
4791 wait_event(mddev->sb_wait, 4935 wait_event(mddev->sb_wait,
4792 !test_bit(MD_CHANGE_DEVS, &mddev->flags) 4936 !test_bit(MD_CHANGE_DEVS, &mddev->flags)
4793 || kthread_should_stop()); 4937 || test_bit(MD_RECOVERY_INTR, &mddev->recovery));
4938 if (test_bit(MD_RECOVERY_INTR, &mddev->recovery))
4939 goto ret;
4794 spin_lock_irq(&conf->device_lock); 4940 spin_lock_irq(&conf->device_lock);
4795 conf->reshape_safe = mddev->reshape_position; 4941 conf->reshape_safe = mddev->reshape_position;
4796 spin_unlock_irq(&conf->device_lock); 4942 spin_unlock_irq(&conf->device_lock);
4797 wake_up(&conf->wait_for_overlap); 4943 wake_up(&conf->wait_for_overlap);
4798 sysfs_notify(&mddev->kobj, NULL, "sync_completed"); 4944 sysfs_notify(&mddev->kobj, NULL, "sync_completed");
4799 } 4945 }
4946ret:
4800 return reshape_sectors; 4947 return reshape_sectors;
4801} 4948}
4802 4949
@@ -4954,27 +5101,45 @@ static int retry_aligned_read(struct r5conf *conf, struct bio *raid_bio)
4954} 5101}
4955 5102
4956static int handle_active_stripes(struct r5conf *conf, int group, 5103static int handle_active_stripes(struct r5conf *conf, int group,
4957 struct r5worker *worker) 5104 struct r5worker *worker,
5105 struct list_head *temp_inactive_list)
4958{ 5106{
4959 struct stripe_head *batch[MAX_STRIPE_BATCH], *sh; 5107 struct stripe_head *batch[MAX_STRIPE_BATCH], *sh;
4960 int i, batch_size = 0; 5108 int i, batch_size = 0, hash;
5109 bool release_inactive = false;
4961 5110
4962 while (batch_size < MAX_STRIPE_BATCH && 5111 while (batch_size < MAX_STRIPE_BATCH &&
4963 (sh = __get_priority_stripe(conf, group)) != NULL) 5112 (sh = __get_priority_stripe(conf, group)) != NULL)
4964 batch[batch_size++] = sh; 5113 batch[batch_size++] = sh;
4965 5114
4966 if (batch_size == 0) 5115 if (batch_size == 0) {
4967 return batch_size; 5116 for (i = 0; i < NR_STRIPE_HASH_LOCKS; i++)
5117 if (!list_empty(temp_inactive_list + i))
5118 break;
5119 if (i == NR_STRIPE_HASH_LOCKS)
5120 return batch_size;
5121 release_inactive = true;
5122 }
4968 spin_unlock_irq(&conf->device_lock); 5123 spin_unlock_irq(&conf->device_lock);
4969 5124
5125 release_inactive_stripe_list(conf, temp_inactive_list,
5126 NR_STRIPE_HASH_LOCKS);
5127
5128 if (release_inactive) {
5129 spin_lock_irq(&conf->device_lock);
5130 return 0;
5131 }
5132
4970 for (i = 0; i < batch_size; i++) 5133 for (i = 0; i < batch_size; i++)
4971 handle_stripe(batch[i]); 5134 handle_stripe(batch[i]);
4972 5135
4973 cond_resched(); 5136 cond_resched();
4974 5137
4975 spin_lock_irq(&conf->device_lock); 5138 spin_lock_irq(&conf->device_lock);
4976 for (i = 0; i < batch_size; i++) 5139 for (i = 0; i < batch_size; i++) {
4977 __release_stripe(conf, batch[i]); 5140 hash = batch[i]->hash_lock_index;
5141 __release_stripe(conf, batch[i], &temp_inactive_list[hash]);
5142 }
4978 return batch_size; 5143 return batch_size;
4979} 5144}
4980 5145
@@ -4995,9 +5160,10 @@ static void raid5_do_work(struct work_struct *work)
4995 while (1) { 5160 while (1) {
4996 int batch_size, released; 5161 int batch_size, released;
4997 5162
4998 released = release_stripe_list(conf); 5163 released = release_stripe_list(conf, worker->temp_inactive_list);
4999 5164
5000 batch_size = handle_active_stripes(conf, group_id, worker); 5165 batch_size = handle_active_stripes(conf, group_id, worker,
5166 worker->temp_inactive_list);
5001 worker->working = false; 5167 worker->working = false;
5002 if (!batch_size && !released) 5168 if (!batch_size && !released)
5003 break; 5169 break;
@@ -5036,7 +5202,7 @@ static void raid5d(struct md_thread *thread)
5036 struct bio *bio; 5202 struct bio *bio;
5037 int batch_size, released; 5203 int batch_size, released;
5038 5204
5039 released = release_stripe_list(conf); 5205 released = release_stripe_list(conf, conf->temp_inactive_list);
5040 5206
5041 if ( 5207 if (
5042 !list_empty(&conf->bitmap_list)) { 5208 !list_empty(&conf->bitmap_list)) {
@@ -5046,7 +5212,7 @@ static void raid5d(struct md_thread *thread)
5046 bitmap_unplug(mddev->bitmap); 5212 bitmap_unplug(mddev->bitmap);
5047 spin_lock_irq(&conf->device_lock); 5213 spin_lock_irq(&conf->device_lock);
5048 conf->seq_write = conf->seq_flush; 5214 conf->seq_write = conf->seq_flush;
5049 activate_bit_delay(conf); 5215 activate_bit_delay(conf, conf->temp_inactive_list);
5050 } 5216 }
5051 raid5_activate_delayed(conf); 5217 raid5_activate_delayed(conf);
5052 5218
@@ -5060,7 +5226,8 @@ static void raid5d(struct md_thread *thread)
5060 handled++; 5226 handled++;
5061 } 5227 }
5062 5228
5063 batch_size = handle_active_stripes(conf, ANY_GROUP, NULL); 5229 batch_size = handle_active_stripes(conf, ANY_GROUP, NULL,
5230 conf->temp_inactive_list);
5064 if (!batch_size && !released) 5231 if (!batch_size && !released)
5065 break; 5232 break;
5066 handled += batch_size; 5233 handled += batch_size;
@@ -5096,22 +5263,29 @@ raid5_set_cache_size(struct mddev *mddev, int size)
5096{ 5263{
5097 struct r5conf *conf = mddev->private; 5264 struct r5conf *conf = mddev->private;
5098 int err; 5265 int err;
5266 int hash;
5099 5267
5100 if (size <= 16 || size > 32768) 5268 if (size <= 16 || size > 32768)
5101 return -EINVAL; 5269 return -EINVAL;
5270 hash = (conf->max_nr_stripes - 1) % NR_STRIPE_HASH_LOCKS;
5102 while (size < conf->max_nr_stripes) { 5271 while (size < conf->max_nr_stripes) {
5103 if (drop_one_stripe(conf)) 5272 if (drop_one_stripe(conf, hash))
5104 conf->max_nr_stripes--; 5273 conf->max_nr_stripes--;
5105 else 5274 else
5106 break; 5275 break;
5276 hash--;
5277 if (hash < 0)
5278 hash = NR_STRIPE_HASH_LOCKS - 1;
5107 } 5279 }
5108 err = md_allow_write(mddev); 5280 err = md_allow_write(mddev);
5109 if (err) 5281 if (err)
5110 return err; 5282 return err;
5283 hash = conf->max_nr_stripes % NR_STRIPE_HASH_LOCKS;
5111 while (size > conf->max_nr_stripes) { 5284 while (size > conf->max_nr_stripes) {
5112 if (grow_one_stripe(conf)) 5285 if (grow_one_stripe(conf, hash))
5113 conf->max_nr_stripes++; 5286 conf->max_nr_stripes++;
5114 else break; 5287 else break;
5288 hash = (hash + 1) % NR_STRIPE_HASH_LOCKS;
5115 } 5289 }
5116 return 0; 5290 return 0;
5117} 5291}
@@ -5199,15 +5373,18 @@ raid5_show_group_thread_cnt(struct mddev *mddev, char *page)
5199 return 0; 5373 return 0;
5200} 5374}
5201 5375
5202static int alloc_thread_groups(struct r5conf *conf, int cnt); 5376static int alloc_thread_groups(struct r5conf *conf, int cnt,
5377 int *group_cnt,
5378 int *worker_cnt_per_group,
5379 struct r5worker_group **worker_groups);
5203static ssize_t 5380static ssize_t
5204raid5_store_group_thread_cnt(struct mddev *mddev, const char *page, size_t len) 5381raid5_store_group_thread_cnt(struct mddev *mddev, const char *page, size_t len)
5205{ 5382{
5206 struct r5conf *conf = mddev->private; 5383 struct r5conf *conf = mddev->private;
5207 unsigned long new; 5384 unsigned long new;
5208 int err; 5385 int err;
5209 struct r5worker_group *old_groups; 5386 struct r5worker_group *new_groups, *old_groups;
5210 int old_group_cnt; 5387 int group_cnt, worker_cnt_per_group;
5211 5388
5212 if (len >= PAGE_SIZE) 5389 if (len >= PAGE_SIZE)
5213 return -EINVAL; 5390 return -EINVAL;
@@ -5223,14 +5400,19 @@ raid5_store_group_thread_cnt(struct mddev *mddev, const char *page, size_t len)
5223 mddev_suspend(mddev); 5400 mddev_suspend(mddev);
5224 5401
5225 old_groups = conf->worker_groups; 5402 old_groups = conf->worker_groups;
5226 old_group_cnt = conf->worker_cnt_per_group; 5403 if (old_groups)
5404 flush_workqueue(raid5_wq);
5405
5406 err = alloc_thread_groups(conf, new,
5407 &group_cnt, &worker_cnt_per_group,
5408 &new_groups);
5409 if (!err) {
5410 spin_lock_irq(&conf->device_lock);
5411 conf->group_cnt = group_cnt;
5412 conf->worker_cnt_per_group = worker_cnt_per_group;
5413 conf->worker_groups = new_groups;
5414 spin_unlock_irq(&conf->device_lock);
5227 5415
5228 conf->worker_groups = NULL;
5229 err = alloc_thread_groups(conf, new);
5230 if (err) {
5231 conf->worker_groups = old_groups;
5232 conf->worker_cnt_per_group = old_group_cnt;
5233 } else {
5234 if (old_groups) 5416 if (old_groups)
5235 kfree(old_groups[0].workers); 5417 kfree(old_groups[0].workers);
5236 kfree(old_groups); 5418 kfree(old_groups);
@@ -5260,40 +5442,47 @@ static struct attribute_group raid5_attrs_group = {
5260 .attrs = raid5_attrs, 5442 .attrs = raid5_attrs,
5261}; 5443};
5262 5444
5263static int alloc_thread_groups(struct r5conf *conf, int cnt) 5445static int alloc_thread_groups(struct r5conf *conf, int cnt,
5446 int *group_cnt,
5447 int *worker_cnt_per_group,
5448 struct r5worker_group **worker_groups)
5264{ 5449{
5265 int i, j; 5450 int i, j, k;
5266 ssize_t size; 5451 ssize_t size;
5267 struct r5worker *workers; 5452 struct r5worker *workers;
5268 5453
5269 conf->worker_cnt_per_group = cnt; 5454 *worker_cnt_per_group = cnt;
5270 if (cnt == 0) { 5455 if (cnt == 0) {
5271 conf->worker_groups = NULL; 5456 *group_cnt = 0;
5457 *worker_groups = NULL;
5272 return 0; 5458 return 0;
5273 } 5459 }
5274 conf->group_cnt = num_possible_nodes(); 5460 *group_cnt = num_possible_nodes();
5275 size = sizeof(struct r5worker) * cnt; 5461 size = sizeof(struct r5worker) * cnt;
5276 workers = kzalloc(size * conf->group_cnt, GFP_NOIO); 5462 workers = kzalloc(size * *group_cnt, GFP_NOIO);
5277 conf->worker_groups = kzalloc(sizeof(struct r5worker_group) * 5463 *worker_groups = kzalloc(sizeof(struct r5worker_group) *
5278 conf->group_cnt, GFP_NOIO); 5464 *group_cnt, GFP_NOIO);
5279 if (!conf->worker_groups || !workers) { 5465 if (!*worker_groups || !workers) {
5280 kfree(workers); 5466 kfree(workers);
5281 kfree(conf->worker_groups); 5467 kfree(*worker_groups);
5282 conf->worker_groups = NULL;
5283 return -ENOMEM; 5468 return -ENOMEM;
5284 } 5469 }
5285 5470
5286 for (i = 0; i < conf->group_cnt; i++) { 5471 for (i = 0; i < *group_cnt; i++) {
5287 struct r5worker_group *group; 5472 struct r5worker_group *group;
5288 5473
5289 group = &conf->worker_groups[i]; 5474 group = worker_groups[i];
5290 INIT_LIST_HEAD(&group->handle_list); 5475 INIT_LIST_HEAD(&group->handle_list);
5291 group->conf = conf; 5476 group->conf = conf;
5292 group->workers = workers + i * cnt; 5477 group->workers = workers + i * cnt;
5293 5478
5294 for (j = 0; j < cnt; j++) { 5479 for (j = 0; j < cnt; j++) {
5295 group->workers[j].group = group; 5480 struct r5worker *worker = group->workers + j;
5296 INIT_WORK(&group->workers[j].work, raid5_do_work); 5481 worker->group = group;
5482 INIT_WORK(&worker->work, raid5_do_work);
5483
5484 for (k = 0; k < NR_STRIPE_HASH_LOCKS; k++)
5485 INIT_LIST_HEAD(worker->temp_inactive_list + k);
5297 } 5486 }
5298 } 5487 }
5299 5488
@@ -5444,6 +5633,9 @@ static struct r5conf *setup_conf(struct mddev *mddev)
5444 struct md_rdev *rdev; 5633 struct md_rdev *rdev;
5445 struct disk_info *disk; 5634 struct disk_info *disk;
5446 char pers_name[6]; 5635 char pers_name[6];
5636 int i;
5637 int group_cnt, worker_cnt_per_group;
5638 struct r5worker_group *new_group;
5447 5639
5448 if (mddev->new_level != 5 5640 if (mddev->new_level != 5
5449 && mddev->new_level != 4 5641 && mddev->new_level != 4
@@ -5478,7 +5670,12 @@ static struct r5conf *setup_conf(struct mddev *mddev)
5478 if (conf == NULL) 5670 if (conf == NULL)
5479 goto abort; 5671 goto abort;
5480 /* Don't enable multi-threading by default*/ 5672 /* Don't enable multi-threading by default*/
5481 if (alloc_thread_groups(conf, 0)) 5673 if (!alloc_thread_groups(conf, 0, &group_cnt, &worker_cnt_per_group,
5674 &new_group)) {
5675 conf->group_cnt = group_cnt;
5676 conf->worker_cnt_per_group = worker_cnt_per_group;
5677 conf->worker_groups = new_group;
5678 } else
5482 goto abort; 5679 goto abort;
5483 spin_lock_init(&conf->device_lock); 5680 spin_lock_init(&conf->device_lock);
5484 seqcount_init(&conf->gen_lock); 5681 seqcount_init(&conf->gen_lock);
@@ -5488,7 +5685,6 @@ static struct r5conf *setup_conf(struct mddev *mddev)
5488 INIT_LIST_HEAD(&conf->hold_list); 5685 INIT_LIST_HEAD(&conf->hold_list);
5489 INIT_LIST_HEAD(&conf->delayed_list); 5686 INIT_LIST_HEAD(&conf->delayed_list);
5490 INIT_LIST_HEAD(&conf->bitmap_list); 5687 INIT_LIST_HEAD(&conf->bitmap_list);
5491 INIT_LIST_HEAD(&conf->inactive_list);
5492 init_llist_head(&conf->released_stripes); 5688 init_llist_head(&conf->released_stripes);
5493 atomic_set(&conf->active_stripes, 0); 5689 atomic_set(&conf->active_stripes, 0);
5494 atomic_set(&conf->preread_active_stripes, 0); 5690 atomic_set(&conf->preread_active_stripes, 0);
@@ -5514,6 +5710,21 @@ static struct r5conf *setup_conf(struct mddev *mddev)
5514 if ((conf->stripe_hashtbl = kzalloc(PAGE_SIZE, GFP_KERNEL)) == NULL) 5710 if ((conf->stripe_hashtbl = kzalloc(PAGE_SIZE, GFP_KERNEL)) == NULL)
5515 goto abort; 5711 goto abort;
5516 5712
5713 /* We init hash_locks[0] separately to that it can be used
5714 * as the reference lock in the spin_lock_nest_lock() call
5715 * in lock_all_device_hash_locks_irq in order to convince
5716 * lockdep that we know what we are doing.
5717 */
5718 spin_lock_init(conf->hash_locks);
5719 for (i = 1; i < NR_STRIPE_HASH_LOCKS; i++)
5720 spin_lock_init(conf->hash_locks + i);
5721
5722 for (i = 0; i < NR_STRIPE_HASH_LOCKS; i++)
5723 INIT_LIST_HEAD(conf->inactive_list + i);
5724
5725 for (i = 0; i < NR_STRIPE_HASH_LOCKS; i++)
5726 INIT_LIST_HEAD(conf->temp_inactive_list + i);
5727
5517 conf->level = mddev->new_level; 5728 conf->level = mddev->new_level;
5518 if (raid5_alloc_percpu(conf) != 0) 5729 if (raid5_alloc_percpu(conf) != 0)
5519 goto abort; 5730 goto abort;
@@ -5554,7 +5765,6 @@ static struct r5conf *setup_conf(struct mddev *mddev)
5554 else 5765 else
5555 conf->max_degraded = 1; 5766 conf->max_degraded = 1;
5556 conf->algorithm = mddev->new_layout; 5767 conf->algorithm = mddev->new_layout;
5557 conf->max_nr_stripes = NR_STRIPES;
5558 conf->reshape_progress = mddev->reshape_position; 5768 conf->reshape_progress = mddev->reshape_position;
5559 if (conf->reshape_progress != MaxSector) { 5769 if (conf->reshape_progress != MaxSector) {
5560 conf->prev_chunk_sectors = mddev->chunk_sectors; 5770 conf->prev_chunk_sectors = mddev->chunk_sectors;
@@ -5563,7 +5773,8 @@ static struct r5conf *setup_conf(struct mddev *mddev)
5563 5773
5564 memory = conf->max_nr_stripes * (sizeof(struct stripe_head) + 5774 memory = conf->max_nr_stripes * (sizeof(struct stripe_head) +
5565 max_disks * ((sizeof(struct bio) + PAGE_SIZE))) / 1024; 5775 max_disks * ((sizeof(struct bio) + PAGE_SIZE))) / 1024;
5566 if (grow_stripes(conf, conf->max_nr_stripes)) { 5776 atomic_set(&conf->empty_inactive_list_nr, NR_STRIPE_HASH_LOCKS);
5777 if (grow_stripes(conf, NR_STRIPES)) {
5567 printk(KERN_ERR 5778 printk(KERN_ERR
5568 "md/raid:%s: couldn't allocate %dkB for buffers\n", 5779 "md/raid:%s: couldn't allocate %dkB for buffers\n",
5569 mdname(mddev), memory); 5780 mdname(mddev), memory);
@@ -6369,12 +6580,18 @@ static int raid5_start_reshape(struct mddev *mddev)
6369 if (!mddev->sync_thread) { 6580 if (!mddev->sync_thread) {
6370 mddev->recovery = 0; 6581 mddev->recovery = 0;
6371 spin_lock_irq(&conf->device_lock); 6582 spin_lock_irq(&conf->device_lock);
6583 write_seqcount_begin(&conf->gen_lock);
6372 mddev->raid_disks = conf->raid_disks = conf->previous_raid_disks; 6584 mddev->raid_disks = conf->raid_disks = conf->previous_raid_disks;
6585 mddev->new_chunk_sectors =
6586 conf->chunk_sectors = conf->prev_chunk_sectors;
6587 mddev->new_layout = conf->algorithm = conf->prev_algo;
6373 rdev_for_each(rdev, mddev) 6588 rdev_for_each(rdev, mddev)
6374 rdev->new_data_offset = rdev->data_offset; 6589 rdev->new_data_offset = rdev->data_offset;
6375 smp_wmb(); 6590 smp_wmb();
6591 conf->generation --;
6376 conf->reshape_progress = MaxSector; 6592 conf->reshape_progress = MaxSector;
6377 mddev->reshape_position = MaxSector; 6593 mddev->reshape_position = MaxSector;
6594 write_seqcount_end(&conf->gen_lock);
6378 spin_unlock_irq(&conf->device_lock); 6595 spin_unlock_irq(&conf->device_lock);
6379 return -EAGAIN; 6596 return -EAGAIN;
6380 } 6597 }
@@ -6462,27 +6679,28 @@ static void raid5_quiesce(struct mddev *mddev, int state)
6462 break; 6679 break;
6463 6680
6464 case 1: /* stop all writes */ 6681 case 1: /* stop all writes */
6465 spin_lock_irq(&conf->device_lock); 6682 lock_all_device_hash_locks_irq(conf);
6466 /* '2' tells resync/reshape to pause so that all 6683 /* '2' tells resync/reshape to pause so that all
6467 * active stripes can drain 6684 * active stripes can drain
6468 */ 6685 */
6469 conf->quiesce = 2; 6686 conf->quiesce = 2;
6470 wait_event_lock_irq(conf->wait_for_stripe, 6687 wait_event_cmd(conf->wait_for_stripe,
6471 atomic_read(&conf->active_stripes) == 0 && 6688 atomic_read(&conf->active_stripes) == 0 &&
6472 atomic_read(&conf->active_aligned_reads) == 0, 6689 atomic_read(&conf->active_aligned_reads) == 0,
6473 conf->device_lock); 6690 unlock_all_device_hash_locks_irq(conf),
6691 lock_all_device_hash_locks_irq(conf));
6474 conf->quiesce = 1; 6692 conf->quiesce = 1;
6475 spin_unlock_irq(&conf->device_lock); 6693 unlock_all_device_hash_locks_irq(conf);
6476 /* allow reshape to continue */ 6694 /* allow reshape to continue */
6477 wake_up(&conf->wait_for_overlap); 6695 wake_up(&conf->wait_for_overlap);
6478 break; 6696 break;
6479 6697
6480 case 0: /* re-enable writes */ 6698 case 0: /* re-enable writes */
6481 spin_lock_irq(&conf->device_lock); 6699 lock_all_device_hash_locks_irq(conf);
6482 conf->quiesce = 0; 6700 conf->quiesce = 0;
6483 wake_up(&conf->wait_for_stripe); 6701 wake_up(&conf->wait_for_stripe);
6484 wake_up(&conf->wait_for_overlap); 6702 wake_up(&conf->wait_for_overlap);
6485 spin_unlock_irq(&conf->device_lock); 6703 unlock_all_device_hash_locks_irq(conf);
6486 break; 6704 break;
6487 } 6705 }
6488} 6706}
diff --git a/drivers/md/raid5.h b/drivers/md/raid5.h
index b42e6b462eda..01ad8ae8f578 100644
--- a/drivers/md/raid5.h
+++ b/drivers/md/raid5.h
@@ -205,6 +205,7 @@ struct stripe_head {
205 short pd_idx; /* parity disk index */ 205 short pd_idx; /* parity disk index */
206 short qd_idx; /* 'Q' disk index for raid6 */ 206 short qd_idx; /* 'Q' disk index for raid6 */
207 short ddf_layout;/* use DDF ordering to calculate Q */ 207 short ddf_layout;/* use DDF ordering to calculate Q */
208 short hash_lock_index;
208 unsigned long state; /* state flags */ 209 unsigned long state; /* state flags */
209 atomic_t count; /* nr of active thread/requests */ 210 atomic_t count; /* nr of active thread/requests */
210 int bm_seq; /* sequence number for bitmap flushes */ 211 int bm_seq; /* sequence number for bitmap flushes */
@@ -367,9 +368,18 @@ struct disk_info {
367 struct md_rdev *rdev, *replacement; 368 struct md_rdev *rdev, *replacement;
368}; 369};
369 370
371/* NOTE NR_STRIPE_HASH_LOCKS must remain below 64.
372 * This is because we sometimes take all the spinlocks
373 * and creating that much locking depth can cause
374 * problems.
375 */
376#define NR_STRIPE_HASH_LOCKS 8
377#define STRIPE_HASH_LOCKS_MASK (NR_STRIPE_HASH_LOCKS - 1)
378
370struct r5worker { 379struct r5worker {
371 struct work_struct work; 380 struct work_struct work;
372 struct r5worker_group *group; 381 struct r5worker_group *group;
382 struct list_head temp_inactive_list[NR_STRIPE_HASH_LOCKS];
373 bool working; 383 bool working;
374}; 384};
375 385
@@ -382,6 +392,8 @@ struct r5worker_group {
382 392
383struct r5conf { 393struct r5conf {
384 struct hlist_head *stripe_hashtbl; 394 struct hlist_head *stripe_hashtbl;
395 /* only protect corresponding hash list and inactive_list */
396 spinlock_t hash_locks[NR_STRIPE_HASH_LOCKS];
385 struct mddev *mddev; 397 struct mddev *mddev;
386 int chunk_sectors; 398 int chunk_sectors;
387 int level, algorithm; 399 int level, algorithm;
@@ -462,7 +474,8 @@ struct r5conf {
462 * Free stripes pool 474 * Free stripes pool
463 */ 475 */
464 atomic_t active_stripes; 476 atomic_t active_stripes;
465 struct list_head inactive_list; 477 struct list_head inactive_list[NR_STRIPE_HASH_LOCKS];
478 atomic_t empty_inactive_list_nr;
466 struct llist_head released_stripes; 479 struct llist_head released_stripes;
467 wait_queue_head_t wait_for_stripe; 480 wait_queue_head_t wait_for_stripe;
468 wait_queue_head_t wait_for_overlap; 481 wait_queue_head_t wait_for_overlap;
@@ -477,6 +490,7 @@ struct r5conf {
477 * the new thread here until we fully activate the array. 490 * the new thread here until we fully activate the array.
478 */ 491 */
479 struct md_thread *thread; 492 struct md_thread *thread;
493 struct list_head temp_inactive_list[NR_STRIPE_HASH_LOCKS];
480 struct r5worker_group *worker_groups; 494 struct r5worker_group *worker_groups;
481 int group_cnt; 495 int group_cnt;
482 int worker_cnt_per_group; 496 int worker_cnt_per_group;
diff --git a/drivers/media/platform/m2m-deinterlace.c b/drivers/media/platform/m2m-deinterlace.c
index 36513e896413..65cab70fefcb 100644
--- a/drivers/media/platform/m2m-deinterlace.c
+++ b/drivers/media/platform/m2m-deinterlace.c
@@ -341,8 +341,7 @@ static void deinterlace_issue_dma(struct deinterlace_ctx *ctx, int op,
341 ctx->xt->dir = DMA_MEM_TO_MEM; 341 ctx->xt->dir = DMA_MEM_TO_MEM;
342 ctx->xt->src_sgl = false; 342 ctx->xt->src_sgl = false;
343 ctx->xt->dst_sgl = true; 343 ctx->xt->dst_sgl = true;
344 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT | 344 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
345 DMA_COMPL_SKIP_DEST_UNMAP | DMA_COMPL_SKIP_SRC_UNMAP;
346 345
347 tx = dmadev->device_prep_interleaved_dma(chan, ctx->xt, flags); 346 tx = dmadev->device_prep_interleaved_dma(chan, ctx->xt, flags);
348 if (tx == NULL) { 347 if (tx == NULL) {
diff --git a/drivers/media/platform/timblogiw.c b/drivers/media/platform/timblogiw.c
index 6a74ce040d28..ccdadd623a3a 100644
--- a/drivers/media/platform/timblogiw.c
+++ b/drivers/media/platform/timblogiw.c
@@ -565,7 +565,7 @@ static void buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
565 565
566 desc = dmaengine_prep_slave_sg(fh->chan, 566 desc = dmaengine_prep_slave_sg(fh->chan,
567 buf->sg, sg_elems, DMA_DEV_TO_MEM, 567 buf->sg, sg_elems, DMA_DEV_TO_MEM,
568 DMA_PREP_INTERRUPT | DMA_COMPL_SKIP_SRC_UNMAP); 568 DMA_PREP_INTERRUPT);
569 if (!desc) { 569 if (!desc) {
570 spin_lock_irq(&fh->queue_lock); 570 spin_lock_irq(&fh->queue_lock);
571 list_del_init(&vb->queue); 571 list_del_init(&vb->queue);
diff --git a/drivers/misc/carma/carma-fpga.c b/drivers/misc/carma/carma-fpga.c
index 08b18f3f5264..9e2b985293fc 100644
--- a/drivers/misc/carma/carma-fpga.c
+++ b/drivers/misc/carma/carma-fpga.c
@@ -633,8 +633,7 @@ static int data_submit_dma(struct fpga_device *priv, struct data_buf *buf)
633 struct dma_async_tx_descriptor *tx; 633 struct dma_async_tx_descriptor *tx;
634 dma_cookie_t cookie; 634 dma_cookie_t cookie;
635 dma_addr_t dst, src; 635 dma_addr_t dst, src;
636 unsigned long dma_flags = DMA_COMPL_SKIP_DEST_UNMAP | 636 unsigned long dma_flags = 0;
637 DMA_COMPL_SKIP_SRC_UNMAP;
638 637
639 dst_sg = buf->vb.sglist; 638 dst_sg = buf->vb.sglist;
640 dst_nents = buf->vb.sglen; 639 dst_nents = buf->vb.sglen;
diff --git a/drivers/mmc/core/sdio_bus.c b/drivers/mmc/core/sdio_bus.c
index ef8956568c3a..157b570ba343 100644
--- a/drivers/mmc/core/sdio_bus.c
+++ b/drivers/mmc/core/sdio_bus.c
@@ -308,8 +308,7 @@ static void sdio_acpi_set_handle(struct sdio_func *func)
308 struct mmc_host *host = func->card->host; 308 struct mmc_host *host = func->card->host;
309 u64 addr = (host->slotno << 16) | func->num; 309 u64 addr = (host->slotno << 16) | func->num;
310 310
311 ACPI_HANDLE_SET(&func->dev, 311 acpi_preset_companion(&func->dev, ACPI_HANDLE(host->parent), addr);
312 acpi_get_child(ACPI_HANDLE(host->parent), addr));
313} 312}
314#else 313#else
315static inline void sdio_acpi_set_handle(struct sdio_func *func) {} 314static inline void sdio_acpi_set_handle(struct sdio_func *func) {}
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index d78a97d4153a..59f08c44abdb 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -375,8 +375,7 @@ static int atmel_nand_dma_op(struct mtd_info *mtd, void *buf, int len,
375 375
376 dma_dev = host->dma_chan->device; 376 dma_dev = host->dma_chan->device;
377 377
378 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT | DMA_COMPL_SKIP_SRC_UNMAP | 378 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
379 DMA_COMPL_SKIP_DEST_UNMAP;
380 379
381 phys_addr = dma_map_single(dma_dev->dev, p, len, dir); 380 phys_addr = dma_map_single(dma_dev->dev, p, len, dir);
382 if (dma_mapping_error(dma_dev->dev, phys_addr)) { 381 if (dma_mapping_error(dma_dev->dev, phys_addr)) {
diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
index 3dc1a7564d87..8b2752263db9 100644
--- a/drivers/mtd/nand/fsmc_nand.c
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -573,8 +573,6 @@ static int dma_xfer(struct fsmc_nand_data *host, void *buffer, int len,
573 dma_dev = chan->device; 573 dma_dev = chan->device;
574 dma_addr = dma_map_single(dma_dev->dev, buffer, len, direction); 574 dma_addr = dma_map_single(dma_dev->dev, buffer, len, direction);
575 575
576 flags |= DMA_COMPL_SKIP_SRC_UNMAP | DMA_COMPL_SKIP_DEST_UNMAP;
577
578 if (direction == DMA_TO_DEVICE) { 576 if (direction == DMA_TO_DEVICE) {
579 dma_src = dma_addr; 577 dma_src = dma_addr;
580 dma_dst = host->data_pa; 578 dma_dst = host->data_pa;
diff --git a/drivers/net/ethernet/micrel/ks8842.c b/drivers/net/ethernet/micrel/ks8842.c
index 0951f7aca1ef..822616e3c375 100644
--- a/drivers/net/ethernet/micrel/ks8842.c
+++ b/drivers/net/ethernet/micrel/ks8842.c
@@ -459,8 +459,7 @@ static int ks8842_tx_frame_dma(struct sk_buff *skb, struct net_device *netdev)
459 sg_dma_len(&ctl->sg) += 4 - sg_dma_len(&ctl->sg) % 4; 459 sg_dma_len(&ctl->sg) += 4 - sg_dma_len(&ctl->sg) % 4;
460 460
461 ctl->adesc = dmaengine_prep_slave_sg(ctl->chan, 461 ctl->adesc = dmaengine_prep_slave_sg(ctl->chan,
462 &ctl->sg, 1, DMA_MEM_TO_DEV, 462 &ctl->sg, 1, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT);
463 DMA_PREP_INTERRUPT | DMA_COMPL_SKIP_SRC_UNMAP);
464 if (!ctl->adesc) 463 if (!ctl->adesc)
465 return NETDEV_TX_BUSY; 464 return NETDEV_TX_BUSY;
466 465
@@ -571,8 +570,7 @@ static int __ks8842_start_new_rx_dma(struct net_device *netdev)
571 sg_dma_len(sg) = DMA_BUFFER_SIZE; 570 sg_dma_len(sg) = DMA_BUFFER_SIZE;
572 571
573 ctl->adesc = dmaengine_prep_slave_sg(ctl->chan, 572 ctl->adesc = dmaengine_prep_slave_sg(ctl->chan,
574 sg, 1, DMA_DEV_TO_MEM, 573 sg, 1, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT);
575 DMA_PREP_INTERRUPT | DMA_COMPL_SKIP_SRC_UNMAP);
576 574
577 if (!ctl->adesc) 575 if (!ctl->adesc)
578 goto out; 576 goto out;
diff --git a/drivers/ntb/ntb_transport.c b/drivers/ntb/ntb_transport.c
index 12a9e83c008b..d0222f13d154 100644
--- a/drivers/ntb/ntb_transport.c
+++ b/drivers/ntb/ntb_transport.c
@@ -1034,10 +1034,9 @@ static void ntb_async_rx(struct ntb_queue_entry *entry, void *offset,
1034 struct dma_chan *chan = qp->dma_chan; 1034 struct dma_chan *chan = qp->dma_chan;
1035 struct dma_device *device; 1035 struct dma_device *device;
1036 size_t pay_off, buff_off; 1036 size_t pay_off, buff_off;
1037 dma_addr_t src, dest; 1037 struct dmaengine_unmap_data *unmap;
1038 dma_cookie_t cookie; 1038 dma_cookie_t cookie;
1039 void *buf = entry->buf; 1039 void *buf = entry->buf;
1040 unsigned long flags;
1041 1040
1042 entry->len = len; 1041 entry->len = len;
1043 1042
@@ -1045,35 +1044,49 @@ static void ntb_async_rx(struct ntb_queue_entry *entry, void *offset,
1045 goto err; 1044 goto err;
1046 1045
1047 if (len < copy_bytes) 1046 if (len < copy_bytes)
1048 goto err1; 1047 goto err_wait;
1049 1048
1050 device = chan->device; 1049 device = chan->device;
1051 pay_off = (size_t) offset & ~PAGE_MASK; 1050 pay_off = (size_t) offset & ~PAGE_MASK;
1052 buff_off = (size_t) buf & ~PAGE_MASK; 1051 buff_off = (size_t) buf & ~PAGE_MASK;
1053 1052
1054 if (!is_dma_copy_aligned(device, pay_off, buff_off, len)) 1053 if (!is_dma_copy_aligned(device, pay_off, buff_off, len))
1055 goto err1; 1054 goto err_wait;
1056 1055
1057 dest = dma_map_single(device->dev, buf, len, DMA_FROM_DEVICE); 1056 unmap = dmaengine_get_unmap_data(device->dev, 2, GFP_NOWAIT);
1058 if (dma_mapping_error(device->dev, dest)) 1057 if (!unmap)
1059 goto err1; 1058 goto err_wait;
1060 1059
1061 src = dma_map_single(device->dev, offset, len, DMA_TO_DEVICE); 1060 unmap->len = len;
1062 if (dma_mapping_error(device->dev, src)) 1061 unmap->addr[0] = dma_map_page(device->dev, virt_to_page(offset),
1063 goto err2; 1062 pay_off, len, DMA_TO_DEVICE);
1063 if (dma_mapping_error(device->dev, unmap->addr[0]))
1064 goto err_get_unmap;
1065
1066 unmap->to_cnt = 1;
1064 1067
1065 flags = DMA_COMPL_DEST_UNMAP_SINGLE | DMA_COMPL_SRC_UNMAP_SINGLE | 1068 unmap->addr[1] = dma_map_page(device->dev, virt_to_page(buf),
1066 DMA_PREP_INTERRUPT; 1069 buff_off, len, DMA_FROM_DEVICE);
1067 txd = device->device_prep_dma_memcpy(chan, dest, src, len, flags); 1070 if (dma_mapping_error(device->dev, unmap->addr[1]))
1071 goto err_get_unmap;
1072
1073 unmap->from_cnt = 1;
1074
1075 txd = device->device_prep_dma_memcpy(chan, unmap->addr[1],
1076 unmap->addr[0], len,
1077 DMA_PREP_INTERRUPT);
1068 if (!txd) 1078 if (!txd)
1069 goto err3; 1079 goto err_get_unmap;
1070 1080
1071 txd->callback = ntb_rx_copy_callback; 1081 txd->callback = ntb_rx_copy_callback;
1072 txd->callback_param = entry; 1082 txd->callback_param = entry;
1083 dma_set_unmap(txd, unmap);
1073 1084
1074 cookie = dmaengine_submit(txd); 1085 cookie = dmaengine_submit(txd);
1075 if (dma_submit_error(cookie)) 1086 if (dma_submit_error(cookie))
1076 goto err3; 1087 goto err_set_unmap;
1088
1089 dmaengine_unmap_put(unmap);
1077 1090
1078 qp->last_cookie = cookie; 1091 qp->last_cookie = cookie;
1079 1092
@@ -1081,11 +1094,11 @@ static void ntb_async_rx(struct ntb_queue_entry *entry, void *offset,
1081 1094
1082 return; 1095 return;
1083 1096
1084err3: 1097err_set_unmap:
1085 dma_unmap_single(device->dev, src, len, DMA_TO_DEVICE); 1098 dmaengine_unmap_put(unmap);
1086err2: 1099err_get_unmap:
1087 dma_unmap_single(device->dev, dest, len, DMA_FROM_DEVICE); 1100 dmaengine_unmap_put(unmap);
1088err1: 1101err_wait:
1089 /* If the callbacks come out of order, the writing of the index to the 1102 /* If the callbacks come out of order, the writing of the index to the
1090 * last completed will be out of order. This may result in the 1103 * last completed will be out of order. This may result in the
1091 * receive stalling forever. 1104 * receive stalling forever.
@@ -1245,12 +1258,12 @@ static void ntb_async_tx(struct ntb_transport_qp *qp,
1245 struct dma_chan *chan = qp->dma_chan; 1258 struct dma_chan *chan = qp->dma_chan;
1246 struct dma_device *device; 1259 struct dma_device *device;
1247 size_t dest_off, buff_off; 1260 size_t dest_off, buff_off;
1248 dma_addr_t src, dest; 1261 struct dmaengine_unmap_data *unmap;
1262 dma_addr_t dest;
1249 dma_cookie_t cookie; 1263 dma_cookie_t cookie;
1250 void __iomem *offset; 1264 void __iomem *offset;
1251 size_t len = entry->len; 1265 size_t len = entry->len;
1252 void *buf = entry->buf; 1266 void *buf = entry->buf;
1253 unsigned long flags;
1254 1267
1255 offset = qp->tx_mw + qp->tx_max_frame * qp->tx_index; 1268 offset = qp->tx_mw + qp->tx_max_frame * qp->tx_index;
1256 hdr = offset + qp->tx_max_frame - sizeof(struct ntb_payload_header); 1269 hdr = offset + qp->tx_max_frame - sizeof(struct ntb_payload_header);
@@ -1273,28 +1286,41 @@ static void ntb_async_tx(struct ntb_transport_qp *qp,
1273 if (!is_dma_copy_aligned(device, buff_off, dest_off, len)) 1286 if (!is_dma_copy_aligned(device, buff_off, dest_off, len))
1274 goto err; 1287 goto err;
1275 1288
1276 src = dma_map_single(device->dev, buf, len, DMA_TO_DEVICE); 1289 unmap = dmaengine_get_unmap_data(device->dev, 1, GFP_NOWAIT);
1277 if (dma_mapping_error(device->dev, src)) 1290 if (!unmap)
1278 goto err; 1291 goto err;
1279 1292
1280 flags = DMA_COMPL_SRC_UNMAP_SINGLE | DMA_PREP_INTERRUPT; 1293 unmap->len = len;
1281 txd = device->device_prep_dma_memcpy(chan, dest, src, len, flags); 1294 unmap->addr[0] = dma_map_page(device->dev, virt_to_page(buf),
1295 buff_off, len, DMA_TO_DEVICE);
1296 if (dma_mapping_error(device->dev, unmap->addr[0]))
1297 goto err_get_unmap;
1298
1299 unmap->to_cnt = 1;
1300
1301 txd = device->device_prep_dma_memcpy(chan, dest, unmap->addr[0], len,
1302 DMA_PREP_INTERRUPT);
1282 if (!txd) 1303 if (!txd)
1283 goto err1; 1304 goto err_get_unmap;
1284 1305
1285 txd->callback = ntb_tx_copy_callback; 1306 txd->callback = ntb_tx_copy_callback;
1286 txd->callback_param = entry; 1307 txd->callback_param = entry;
1308 dma_set_unmap(txd, unmap);
1287 1309
1288 cookie = dmaengine_submit(txd); 1310 cookie = dmaengine_submit(txd);
1289 if (dma_submit_error(cookie)) 1311 if (dma_submit_error(cookie))
1290 goto err1; 1312 goto err_set_unmap;
1313
1314 dmaengine_unmap_put(unmap);
1291 1315
1292 dma_async_issue_pending(chan); 1316 dma_async_issue_pending(chan);
1293 qp->tx_async++; 1317 qp->tx_async++;
1294 1318
1295 return; 1319 return;
1296err1: 1320err_set_unmap:
1297 dma_unmap_single(device->dev, src, len, DMA_TO_DEVICE); 1321 dmaengine_unmap_put(unmap);
1322err_get_unmap:
1323 dmaengine_unmap_put(unmap);
1298err: 1324err:
1299 ntb_memcpy_tx(entry, offset); 1325 ntb_memcpy_tx(entry, offset);
1300 qp->tx_memcpy++; 1326 qp->tx_memcpy++;
diff --git a/drivers/pci/hotplug/acpi_pcihp.c b/drivers/pci/hotplug/acpi_pcihp.c
index 1ce8ee054f1a..a94d850ae228 100644
--- a/drivers/pci/hotplug/acpi_pcihp.c
+++ b/drivers/pci/hotplug/acpi_pcihp.c
@@ -367,7 +367,7 @@ int acpi_get_hp_hw_control_from_firmware(struct pci_dev *pdev, u32 flags)
367 string = (struct acpi_buffer){ ACPI_ALLOCATE_BUFFER, NULL }; 367 string = (struct acpi_buffer){ ACPI_ALLOCATE_BUFFER, NULL };
368 } 368 }
369 369
370 handle = DEVICE_ACPI_HANDLE(&pdev->dev); 370 handle = ACPI_HANDLE(&pdev->dev);
371 if (!handle) { 371 if (!handle) {
372 /* 372 /*
373 * This hotplug controller was not listed in the ACPI name 373 * This hotplug controller was not listed in the ACPI name
diff --git a/drivers/pci/hotplug/acpiphp.h b/drivers/pci/hotplug/acpiphp.h
index 26100f510b10..1592dbe4f904 100644
--- a/drivers/pci/hotplug/acpiphp.h
+++ b/drivers/pci/hotplug/acpiphp.h
@@ -176,7 +176,6 @@ u8 acpiphp_get_latch_status(struct acpiphp_slot *slot);
176u8 acpiphp_get_adapter_status(struct acpiphp_slot *slot); 176u8 acpiphp_get_adapter_status(struct acpiphp_slot *slot);
177 177
178/* variables */ 178/* variables */
179extern bool acpiphp_debug;
180extern bool acpiphp_disabled; 179extern bool acpiphp_disabled;
181 180
182#endif /* _ACPIPHP_H */ 181#endif /* _ACPIPHP_H */
diff --git a/drivers/pci/hotplug/pciehp_acpi.c b/drivers/pci/hotplug/pciehp_acpi.c
index ead7c534095e..cff7cadfc2e4 100644
--- a/drivers/pci/hotplug/pciehp_acpi.c
+++ b/drivers/pci/hotplug/pciehp_acpi.c
@@ -54,7 +54,7 @@ int pciehp_acpi_slot_detection_check(struct pci_dev *dev)
54{ 54{
55 if (slot_detection_mode != PCIEHP_DETECT_ACPI) 55 if (slot_detection_mode != PCIEHP_DETECT_ACPI)
56 return 0; 56 return 0;
57 if (acpi_pci_detect_ejectable(DEVICE_ACPI_HANDLE(&dev->dev))) 57 if (acpi_pci_detect_ejectable(ACPI_HANDLE(&dev->dev)))
58 return 0; 58 return 0;
59 return -ENODEV; 59 return -ENODEV;
60} 60}
@@ -96,7 +96,7 @@ static int __init dummy_probe(struct pcie_device *dev)
96 dup_slot_id++; 96 dup_slot_id++;
97 } 97 }
98 list_add_tail(&slot->list, &dummy_slots); 98 list_add_tail(&slot->list, &dummy_slots);
99 handle = DEVICE_ACPI_HANDLE(&pdev->dev); 99 handle = ACPI_HANDLE(&pdev->dev);
100 if (!acpi_slot_detected && acpi_pci_detect_ejectable(handle)) 100 if (!acpi_slot_detected && acpi_pci_detect_ejectable(handle))
101 acpi_slot_detected = 1; 101 acpi_slot_detected = 1;
102 return -ENODEV; /* dummy driver always returns error */ 102 return -ENODEV; /* dummy driver always returns error */
diff --git a/drivers/pci/hotplug/sgi_hotplug.c b/drivers/pci/hotplug/sgi_hotplug.c
index b2781dfe60e9..5b05a68cca6c 100644
--- a/drivers/pci/hotplug/sgi_hotplug.c
+++ b/drivers/pci/hotplug/sgi_hotplug.c
@@ -9,6 +9,7 @@
9 * Work to add BIOS PROM support was completed by Mike Habeck. 9 * Work to add BIOS PROM support was completed by Mike Habeck.
10 */ 10 */
11 11
12#include <linux/acpi.h>
12#include <linux/init.h> 13#include <linux/init.h>
13#include <linux/kernel.h> 14#include <linux/kernel.h>
14#include <linux/module.h> 15#include <linux/module.h>
@@ -29,7 +30,6 @@
29#include <asm/sn/sn_feature_sets.h> 30#include <asm/sn/sn_feature_sets.h>
30#include <asm/sn/sn_sal.h> 31#include <asm/sn/sn_sal.h>
31#include <asm/sn/types.h> 32#include <asm/sn/types.h>
32#include <linux/acpi.h>
33#include <asm/sn/acpi.h> 33#include <asm/sn/acpi.h>
34 34
35#include "../pci.h" 35#include "../pci.h"
@@ -414,7 +414,7 @@ static int enable_slot(struct hotplug_slot *bss_hotplug_slot)
414 acpi_handle rethandle; 414 acpi_handle rethandle;
415 acpi_status ret; 415 acpi_status ret;
416 416
417 phandle = PCI_CONTROLLER(slot->pci_bus)->acpi_handle; 417 phandle = acpi_device_handle(PCI_CONTROLLER(slot->pci_bus)->companion);
418 418
419 if (acpi_bus_get_device(phandle, &pdevice)) { 419 if (acpi_bus_get_device(phandle, &pdevice)) {
420 dev_dbg(&slot->pci_bus->self->dev, 420 dev_dbg(&slot->pci_bus->self->dev,
@@ -495,7 +495,7 @@ static int disable_slot(struct hotplug_slot *bss_hotplug_slot)
495 495
496 /* free the ACPI resources for the slot */ 496 /* free the ACPI resources for the slot */
497 if (SN_ACPI_BASE_SUPPORT() && 497 if (SN_ACPI_BASE_SUPPORT() &&
498 PCI_CONTROLLER(slot->pci_bus)->acpi_handle) { 498 PCI_CONTROLLER(slot->pci_bus)->companion) {
499 unsigned long long adr; 499 unsigned long long adr;
500 struct acpi_device *device; 500 struct acpi_device *device;
501 acpi_handle phandle; 501 acpi_handle phandle;
@@ -504,7 +504,7 @@ static int disable_slot(struct hotplug_slot *bss_hotplug_slot)
504 acpi_status ret; 504 acpi_status ret;
505 505
506 /* Get the rootbus node pointer */ 506 /* Get the rootbus node pointer */
507 phandle = PCI_CONTROLLER(slot->pci_bus)->acpi_handle; 507 phandle = acpi_device_handle(PCI_CONTROLLER(slot->pci_bus)->companion);
508 508
509 acpi_scan_lock_acquire(); 509 acpi_scan_lock_acquire();
510 /* 510 /*
diff --git a/drivers/pci/ioapic.c b/drivers/pci/ioapic.c
index 1b90579b233a..50ce68098298 100644
--- a/drivers/pci/ioapic.c
+++ b/drivers/pci/ioapic.c
@@ -37,7 +37,7 @@ static int ioapic_probe(struct pci_dev *dev, const struct pci_device_id *ent)
37 char *type; 37 char *type;
38 struct resource *res; 38 struct resource *res;
39 39
40 handle = DEVICE_ACPI_HANDLE(&dev->dev); 40 handle = ACPI_HANDLE(&dev->dev);
41 if (!handle) 41 if (!handle)
42 return -EINVAL; 42 return -EINVAL;
43 43
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index dfd1f59de729..f166126e28d1 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -173,14 +173,14 @@ static pci_power_t acpi_pci_choose_state(struct pci_dev *pdev)
173 173
174static bool acpi_pci_power_manageable(struct pci_dev *dev) 174static bool acpi_pci_power_manageable(struct pci_dev *dev)
175{ 175{
176 acpi_handle handle = DEVICE_ACPI_HANDLE(&dev->dev); 176 acpi_handle handle = ACPI_HANDLE(&dev->dev);
177 177
178 return handle ? acpi_bus_power_manageable(handle) : false; 178 return handle ? acpi_bus_power_manageable(handle) : false;
179} 179}
180 180
181static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state) 181static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state)
182{ 182{
183 acpi_handle handle = DEVICE_ACPI_HANDLE(&dev->dev); 183 acpi_handle handle = ACPI_HANDLE(&dev->dev);
184 static const u8 state_conv[] = { 184 static const u8 state_conv[] = {
185 [PCI_D0] = ACPI_STATE_D0, 185 [PCI_D0] = ACPI_STATE_D0,
186 [PCI_D1] = ACPI_STATE_D1, 186 [PCI_D1] = ACPI_STATE_D1,
@@ -217,7 +217,7 @@ static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state)
217 217
218static bool acpi_pci_can_wakeup(struct pci_dev *dev) 218static bool acpi_pci_can_wakeup(struct pci_dev *dev)
219{ 219{
220 acpi_handle handle = DEVICE_ACPI_HANDLE(&dev->dev); 220 acpi_handle handle = ACPI_HANDLE(&dev->dev);
221 221
222 return handle ? acpi_bus_can_wakeup(handle) : false; 222 return handle ? acpi_bus_can_wakeup(handle) : false;
223} 223}
diff --git a/drivers/pci/pci-label.c b/drivers/pci/pci-label.c
index edaed6f4da6c..d51f45aa669e 100644
--- a/drivers/pci/pci-label.c
+++ b/drivers/pci/pci-label.c
@@ -263,7 +263,7 @@ device_has_dsm(struct device *dev)
263 acpi_handle handle; 263 acpi_handle handle;
264 struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL}; 264 struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
265 265
266 handle = DEVICE_ACPI_HANDLE(dev); 266 handle = ACPI_HANDLE(dev);
267 267
268 if (!handle) 268 if (!handle)
269 return FALSE; 269 return FALSE;
@@ -295,7 +295,7 @@ acpilabel_show(struct device *dev, struct device_attribute *attr, char *buf)
295 acpi_handle handle; 295 acpi_handle handle;
296 int length; 296 int length;
297 297
298 handle = DEVICE_ACPI_HANDLE(dev); 298 handle = ACPI_HANDLE(dev);
299 299
300 if (!handle) 300 if (!handle)
301 return -1; 301 return -1;
@@ -316,7 +316,7 @@ acpiindex_show(struct device *dev, struct device_attribute *attr, char *buf)
316 acpi_handle handle; 316 acpi_handle handle;
317 int length; 317 int length;
318 318
319 handle = DEVICE_ACPI_HANDLE(dev); 319 handle = ACPI_HANDLE(dev);
320 320
321 if (!handle) 321 if (!handle)
322 return -1; 322 return -1;
diff --git a/drivers/platform/x86/apple-gmux.c b/drivers/platform/x86/apple-gmux.c
index 605a9be55129..b9429fbf1cd8 100644
--- a/drivers/platform/x86/apple-gmux.c
+++ b/drivers/platform/x86/apple-gmux.c
@@ -519,7 +519,7 @@ static int gmux_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
519 519
520 gmux_data->power_state = VGA_SWITCHEROO_ON; 520 gmux_data->power_state = VGA_SWITCHEROO_ON;
521 521
522 gmux_data->dhandle = DEVICE_ACPI_HANDLE(&pnp->dev); 522 gmux_data->dhandle = ACPI_HANDLE(&pnp->dev);
523 if (!gmux_data->dhandle) { 523 if (!gmux_data->dhandle) {
524 pr_err("Cannot find acpi handle for pnp device %s\n", 524 pr_err("Cannot find acpi handle for pnp device %s\n",
525 dev_name(&pnp->dev)); 525 dev_name(&pnp->dev));
diff --git a/drivers/pnp/pnpacpi/core.c b/drivers/pnp/pnpacpi/core.c
index 747826d99059..14655a0f0431 100644
--- a/drivers/pnp/pnpacpi/core.c
+++ b/drivers/pnp/pnpacpi/core.c
@@ -89,7 +89,7 @@ static int pnpacpi_set_resources(struct pnp_dev *dev)
89 89
90 pnp_dbg(&dev->dev, "set resources\n"); 90 pnp_dbg(&dev->dev, "set resources\n");
91 91
92 handle = DEVICE_ACPI_HANDLE(&dev->dev); 92 handle = ACPI_HANDLE(&dev->dev);
93 if (!handle || acpi_bus_get_device(handle, &acpi_dev)) { 93 if (!handle || acpi_bus_get_device(handle, &acpi_dev)) {
94 dev_dbg(&dev->dev, "ACPI device not found in %s!\n", __func__); 94 dev_dbg(&dev->dev, "ACPI device not found in %s!\n", __func__);
95 return -ENODEV; 95 return -ENODEV;
@@ -122,7 +122,7 @@ static int pnpacpi_disable_resources(struct pnp_dev *dev)
122 122
123 dev_dbg(&dev->dev, "disable resources\n"); 123 dev_dbg(&dev->dev, "disable resources\n");
124 124
125 handle = DEVICE_ACPI_HANDLE(&dev->dev); 125 handle = ACPI_HANDLE(&dev->dev);
126 if (!handle || acpi_bus_get_device(handle, &acpi_dev)) { 126 if (!handle || acpi_bus_get_device(handle, &acpi_dev)) {
127 dev_dbg(&dev->dev, "ACPI device not found in %s!\n", __func__); 127 dev_dbg(&dev->dev, "ACPI device not found in %s!\n", __func__);
128 return 0; 128 return 0;
@@ -144,7 +144,7 @@ static bool pnpacpi_can_wakeup(struct pnp_dev *dev)
144 struct acpi_device *acpi_dev; 144 struct acpi_device *acpi_dev;
145 acpi_handle handle; 145 acpi_handle handle;
146 146
147 handle = DEVICE_ACPI_HANDLE(&dev->dev); 147 handle = ACPI_HANDLE(&dev->dev);
148 if (!handle || acpi_bus_get_device(handle, &acpi_dev)) { 148 if (!handle || acpi_bus_get_device(handle, &acpi_dev)) {
149 dev_dbg(&dev->dev, "ACPI device not found in %s!\n", __func__); 149 dev_dbg(&dev->dev, "ACPI device not found in %s!\n", __func__);
150 return false; 150 return false;
@@ -159,7 +159,7 @@ static int pnpacpi_suspend(struct pnp_dev *dev, pm_message_t state)
159 acpi_handle handle; 159 acpi_handle handle;
160 int error = 0; 160 int error = 0;
161 161
162 handle = DEVICE_ACPI_HANDLE(&dev->dev); 162 handle = ACPI_HANDLE(&dev->dev);
163 if (!handle || acpi_bus_get_device(handle, &acpi_dev)) { 163 if (!handle || acpi_bus_get_device(handle, &acpi_dev)) {
164 dev_dbg(&dev->dev, "ACPI device not found in %s!\n", __func__); 164 dev_dbg(&dev->dev, "ACPI device not found in %s!\n", __func__);
165 return 0; 165 return 0;
@@ -194,7 +194,7 @@ static int pnpacpi_suspend(struct pnp_dev *dev, pm_message_t state)
194static int pnpacpi_resume(struct pnp_dev *dev) 194static int pnpacpi_resume(struct pnp_dev *dev)
195{ 195{
196 struct acpi_device *acpi_dev; 196 struct acpi_device *acpi_dev;
197 acpi_handle handle = DEVICE_ACPI_HANDLE(&dev->dev); 197 acpi_handle handle = ACPI_HANDLE(&dev->dev);
198 int error = 0; 198 int error = 0;
199 199
200 if (!handle || acpi_bus_get_device(handle, &acpi_dev)) { 200 if (!handle || acpi_bus_get_device(handle, &acpi_dev)) {
diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c
index b9f0192758d6..6d207afec8cb 100644
--- a/drivers/spi/spi-dw-mid.c
+++ b/drivers/spi/spi-dw-mid.c
@@ -150,7 +150,7 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
150 &dws->tx_sgl, 150 &dws->tx_sgl,
151 1, 151 1,
152 DMA_MEM_TO_DEV, 152 DMA_MEM_TO_DEV,
153 DMA_PREP_INTERRUPT | DMA_COMPL_SKIP_DEST_UNMAP); 153 DMA_PREP_INTERRUPT);
154 txdesc->callback = dw_spi_dma_done; 154 txdesc->callback = dw_spi_dma_done;
155 txdesc->callback_param = dws; 155 txdesc->callback_param = dws;
156 156
@@ -173,7 +173,7 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
173 &dws->rx_sgl, 173 &dws->rx_sgl,
174 1, 174 1,
175 DMA_DEV_TO_MEM, 175 DMA_DEV_TO_MEM,
176 DMA_PREP_INTERRUPT | DMA_COMPL_SKIP_DEST_UNMAP); 176 DMA_PREP_INTERRUPT);
177 rxdesc->callback = dw_spi_dma_done; 177 rxdesc->callback = dw_spi_dma_done;
178 rxdesc->callback_param = dws; 178 rxdesc->callback_param = dws;
179 179
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 8d85ddc46011..18cc625d887f 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -357,6 +357,19 @@ struct spi_device *spi_alloc_device(struct spi_master *master)
357} 357}
358EXPORT_SYMBOL_GPL(spi_alloc_device); 358EXPORT_SYMBOL_GPL(spi_alloc_device);
359 359
360static void spi_dev_set_name(struct spi_device *spi)
361{
362 struct acpi_device *adev = ACPI_COMPANION(&spi->dev);
363
364 if (adev) {
365 dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev));
366 return;
367 }
368
369 dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->master->dev),
370 spi->chip_select);
371}
372
360/** 373/**
361 * spi_add_device - Add spi_device allocated with spi_alloc_device 374 * spi_add_device - Add spi_device allocated with spi_alloc_device
362 * @spi: spi_device to register 375 * @spi: spi_device to register
@@ -383,9 +396,7 @@ int spi_add_device(struct spi_device *spi)
383 } 396 }
384 397
385 /* Set the bus ID string */ 398 /* Set the bus ID string */
386 dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->master->dev), 399 spi_dev_set_name(spi);
387 spi->chip_select);
388
389 400
390 /* We need to make sure there's no other device with this 401 /* We need to make sure there's no other device with this
391 * chipselect **BEFORE** we call setup(), else we'll trash 402 * chipselect **BEFORE** we call setup(), else we'll trash
@@ -1144,7 +1155,7 @@ static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level,
1144 return AE_NO_MEMORY; 1155 return AE_NO_MEMORY;
1145 } 1156 }
1146 1157
1147 ACPI_HANDLE_SET(&spi->dev, handle); 1158 ACPI_COMPANION_SET(&spi->dev, adev);
1148 spi->irq = -1; 1159 spi->irq = -1;
1149 1160
1150 INIT_LIST_HEAD(&resource_list); 1161 INIT_LIST_HEAD(&resource_list);
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 537750261aaa..7d8103cd3e2e 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -1433,7 +1433,7 @@ static void work_fn_rx(struct work_struct *work)
1433 desc = s->desc_rx[new]; 1433 desc = s->desc_rx[new];
1434 1434
1435 if (dma_async_is_tx_complete(s->chan_rx, s->active_rx, NULL, NULL) != 1435 if (dma_async_is_tx_complete(s->chan_rx, s->active_rx, NULL, NULL) !=
1436 DMA_SUCCESS) { 1436 DMA_COMPLETE) {
1437 /* Handle incomplete DMA receive */ 1437 /* Handle incomplete DMA receive */
1438 struct dma_chan *chan = s->chan_rx; 1438 struct dma_chan *chan = s->chan_rx;
1439 struct shdma_desc *sh_desc = container_of(desc, 1439 struct shdma_desc *sh_desc = container_of(desc,
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 06cec635e703..a7c04e24ca48 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -5501,6 +5501,6 @@ acpi_handle usb_get_hub_port_acpi_handle(struct usb_device *hdev,
5501 if (!hub) 5501 if (!hub)
5502 return NULL; 5502 return NULL;
5503 5503
5504 return DEVICE_ACPI_HANDLE(&hub->ports[port1 - 1]->dev); 5504 return ACPI_HANDLE(&hub->ports[port1 - 1]->dev);
5505} 5505}
5506#endif 5506#endif
diff --git a/drivers/usb/core/usb-acpi.c b/drivers/usb/core/usb-acpi.c
index 255c14464bf2..4e243c37f17f 100644
--- a/drivers/usb/core/usb-acpi.c
+++ b/drivers/usb/core/usb-acpi.c
@@ -173,7 +173,7 @@ static int usb_acpi_find_device(struct device *dev, acpi_handle *handle)
173 } 173 }
174 174
175 /* root hub's parent is the usb hcd. */ 175 /* root hub's parent is the usb hcd. */
176 parent_handle = DEVICE_ACPI_HANDLE(dev->parent); 176 parent_handle = ACPI_HANDLE(dev->parent);
177 *handle = acpi_get_child(parent_handle, udev->portnum); 177 *handle = acpi_get_child(parent_handle, udev->portnum);
178 if (!*handle) 178 if (!*handle)
179 return -ENODEV; 179 return -ENODEV;
@@ -194,7 +194,7 @@ static int usb_acpi_find_device(struct device *dev, acpi_handle *handle)
194 194
195 raw_port_num = usb_hcd_find_raw_port_number(hcd, 195 raw_port_num = usb_hcd_find_raw_port_number(hcd,
196 port_num); 196 port_num);
197 *handle = acpi_get_child(DEVICE_ACPI_HANDLE(&udev->dev), 197 *handle = acpi_get_child(ACPI_HANDLE(&udev->dev),
198 raw_port_num); 198 raw_port_num);
199 if (!*handle) 199 if (!*handle)
200 return -ENODEV; 200 return -ENODEV;
diff --git a/drivers/xen/pci.c b/drivers/xen/pci.c
index d15f6e80479f..188825122aae 100644
--- a/drivers/xen/pci.c
+++ b/drivers/xen/pci.c
@@ -59,12 +59,12 @@ static int xen_add_device(struct device *dev)
59 add.flags = XEN_PCI_DEV_EXTFN; 59 add.flags = XEN_PCI_DEV_EXTFN;
60 60
61#ifdef CONFIG_ACPI 61#ifdef CONFIG_ACPI
62 handle = DEVICE_ACPI_HANDLE(&pci_dev->dev); 62 handle = ACPI_HANDLE(&pci_dev->dev);
63 if (!handle && pci_dev->bus->bridge) 63 if (!handle && pci_dev->bus->bridge)
64 handle = DEVICE_ACPI_HANDLE(pci_dev->bus->bridge); 64 handle = ACPI_HANDLE(pci_dev->bus->bridge);
65#ifdef CONFIG_PCI_IOV 65#ifdef CONFIG_PCI_IOV
66 if (!handle && pci_dev->is_virtfn) 66 if (!handle && pci_dev->is_virtfn)
67 handle = DEVICE_ACPI_HANDLE(physfn->bus->bridge); 67 handle = ACPI_HANDLE(physfn->bus->bridge);
68#endif 68#endif
69 if (handle) { 69 if (handle) {
70 acpi_status status; 70 acpi_status status;
diff --git a/fs/9p/vfs_dentry.c b/fs/9p/vfs_dentry.c
index f039b104a98e..b03dd23feda8 100644
--- a/fs/9p/vfs_dentry.c
+++ b/fs/9p/vfs_dentry.c
@@ -43,23 +43,6 @@
43#include "fid.h" 43#include "fid.h"
44 44
45/** 45/**
46 * v9fs_dentry_delete - called when dentry refcount equals 0
47 * @dentry: dentry in question
48 *
49 * By returning 1 here we should remove cacheing of unused
50 * dentry components.
51 *
52 */
53
54static int v9fs_dentry_delete(const struct dentry *dentry)
55{
56 p9_debug(P9_DEBUG_VFS, " dentry: %s (%p)\n",
57 dentry->d_name.name, dentry);
58
59 return 1;
60}
61
62/**
63 * v9fs_cached_dentry_delete - called when dentry refcount equals 0 46 * v9fs_cached_dentry_delete - called when dentry refcount equals 0
64 * @dentry: dentry in question 47 * @dentry: dentry in question
65 * 48 *
@@ -134,6 +117,6 @@ const struct dentry_operations v9fs_cached_dentry_operations = {
134}; 117};
135 118
136const struct dentry_operations v9fs_dentry_operations = { 119const struct dentry_operations v9fs_dentry_operations = {
137 .d_delete = v9fs_dentry_delete, 120 .d_delete = always_delete_dentry,
138 .d_release = v9fs_dentry_release, 121 .d_release = v9fs_dentry_release,
139}; 122};
diff --git a/fs/bio.c b/fs/bio.c
index 2bdb4e25ee77..33d79a4eb92d 100644
--- a/fs/bio.c
+++ b/fs/bio.c
@@ -601,7 +601,7 @@ EXPORT_SYMBOL(bio_get_nr_vecs);
601 601
602static int __bio_add_page(struct request_queue *q, struct bio *bio, struct page 602static int __bio_add_page(struct request_queue *q, struct bio *bio, struct page
603 *page, unsigned int len, unsigned int offset, 603 *page, unsigned int len, unsigned int offset,
604 unsigned short max_sectors) 604 unsigned int max_sectors)
605{ 605{
606 int retried_segments = 0; 606 int retried_segments = 0;
607 struct bio_vec *bvec; 607 struct bio_vec *bvec;
diff --git a/fs/configfs/dir.c b/fs/configfs/dir.c
index 277bd1be21fd..4522e0755773 100644
--- a/fs/configfs/dir.c
+++ b/fs/configfs/dir.c
@@ -66,19 +66,9 @@ static void configfs_d_iput(struct dentry * dentry,
66 iput(inode); 66 iput(inode);
67} 67}
68 68
69/*
70 * We _must_ delete our dentries on last dput, as the chain-to-parent
71 * behavior is required to clear the parents of default_groups.
72 */
73static int configfs_d_delete(const struct dentry *dentry)
74{
75 return 1;
76}
77
78const struct dentry_operations configfs_dentry_ops = { 69const struct dentry_operations configfs_dentry_ops = {
79 .d_iput = configfs_d_iput, 70 .d_iput = configfs_d_iput,
80 /* simple_delete_dentry() isn't exported */ 71 .d_delete = always_delete_dentry,
81 .d_delete = configfs_d_delete,
82}; 72};
83 73
84#ifdef CONFIG_LOCKDEP 74#ifdef CONFIG_LOCKDEP
diff --git a/fs/coredump.c b/fs/coredump.c
index 62406b6959b6..bc3fbcd32558 100644
--- a/fs/coredump.c
+++ b/fs/coredump.c
@@ -695,7 +695,7 @@ int dump_emit(struct coredump_params *cprm, const void *addr, int nr)
695 while (nr) { 695 while (nr) {
696 if (dump_interrupted()) 696 if (dump_interrupted())
697 return 0; 697 return 0;
698 n = vfs_write(file, addr, nr, &pos); 698 n = __kernel_write(file, addr, nr, &pos);
699 if (n <= 0) 699 if (n <= 0)
700 return 0; 700 return 0;
701 file->f_pos = pos; 701 file->f_pos = pos;
@@ -733,7 +733,7 @@ int dump_align(struct coredump_params *cprm, int align)
733{ 733{
734 unsigned mod = cprm->written & (align - 1); 734 unsigned mod = cprm->written & (align - 1);
735 if (align & (align - 1)) 735 if (align & (align - 1))
736 return -EINVAL; 736 return 0;
737 return mod ? dump_skip(cprm, align - mod) : 0; 737 return mod ? dump_skip(cprm, align - mod) : 1;
738} 738}
739EXPORT_SYMBOL(dump_align); 739EXPORT_SYMBOL(dump_align);
diff --git a/fs/dcache.c b/fs/dcache.c
index 0a38ef8d7f00..4bdb300b16e2 100644
--- a/fs/dcache.c
+++ b/fs/dcache.c
@@ -88,35 +88,6 @@ EXPORT_SYMBOL(rename_lock);
88 88
89static struct kmem_cache *dentry_cache __read_mostly; 89static struct kmem_cache *dentry_cache __read_mostly;
90 90
91/**
92 * read_seqbegin_or_lock - begin a sequence number check or locking block
93 * @lock: sequence lock
94 * @seq : sequence number to be checked
95 *
96 * First try it once optimistically without taking the lock. If that fails,
97 * take the lock. The sequence number is also used as a marker for deciding
98 * whether to be a reader (even) or writer (odd).
99 * N.B. seq must be initialized to an even number to begin with.
100 */
101static inline void read_seqbegin_or_lock(seqlock_t *lock, int *seq)
102{
103 if (!(*seq & 1)) /* Even */
104 *seq = read_seqbegin(lock);
105 else /* Odd */
106 read_seqlock_excl(lock);
107}
108
109static inline int need_seqretry(seqlock_t *lock, int seq)
110{
111 return !(seq & 1) && read_seqretry(lock, seq);
112}
113
114static inline void done_seqretry(seqlock_t *lock, int seq)
115{
116 if (seq & 1)
117 read_sequnlock_excl(lock);
118}
119
120/* 91/*
121 * This is the single most critical data structure when it comes 92 * This is the single most critical data structure when it comes
122 * to the dcache: the hashtable for lookups. Somebody should try 93 * to the dcache: the hashtable for lookups. Somebody should try
@@ -125,8 +96,6 @@ static inline void done_seqretry(seqlock_t *lock, int seq)
125 * This hash-function tries to avoid losing too many bits of hash 96 * This hash-function tries to avoid losing too many bits of hash
126 * information, yet avoid using a prime hash-size or similar. 97 * information, yet avoid using a prime hash-size or similar.
127 */ 98 */
128#define D_HASHBITS d_hash_shift
129#define D_HASHMASK d_hash_mask
130 99
131static unsigned int d_hash_mask __read_mostly; 100static unsigned int d_hash_mask __read_mostly;
132static unsigned int d_hash_shift __read_mostly; 101static unsigned int d_hash_shift __read_mostly;
@@ -137,8 +106,8 @@ static inline struct hlist_bl_head *d_hash(const struct dentry *parent,
137 unsigned int hash) 106 unsigned int hash)
138{ 107{
139 hash += (unsigned long) parent / L1_CACHE_BYTES; 108 hash += (unsigned long) parent / L1_CACHE_BYTES;
140 hash = hash + (hash >> D_HASHBITS); 109 hash = hash + (hash >> d_hash_shift);
141 return dentry_hashtable + (hash & D_HASHMASK); 110 return dentry_hashtable + (hash & d_hash_mask);
142} 111}
143 112
144/* Statistics gathering. */ 113/* Statistics gathering. */
@@ -469,7 +438,7 @@ static struct dentry *d_kill(struct dentry *dentry, struct dentry *parent)
469{ 438{
470 list_del(&dentry->d_u.d_child); 439 list_del(&dentry->d_u.d_child);
471 /* 440 /*
472 * Inform try_to_ascend() that we are no longer attached to the 441 * Inform d_walk() that we are no longer attached to the
473 * dentry tree 442 * dentry tree
474 */ 443 */
475 dentry->d_flags |= DCACHE_DENTRY_KILLED; 444 dentry->d_flags |= DCACHE_DENTRY_KILLED;
@@ -1069,34 +1038,6 @@ void shrink_dcache_sb(struct super_block *sb)
1069} 1038}
1070EXPORT_SYMBOL(shrink_dcache_sb); 1039EXPORT_SYMBOL(shrink_dcache_sb);
1071 1040
1072/*
1073 * This tries to ascend one level of parenthood, but
1074 * we can race with renaming, so we need to re-check
1075 * the parenthood after dropping the lock and check
1076 * that the sequence number still matches.
1077 */
1078static struct dentry *try_to_ascend(struct dentry *old, unsigned seq)
1079{
1080 struct dentry *new = old->d_parent;
1081
1082 rcu_read_lock();
1083 spin_unlock(&old->d_lock);
1084 spin_lock(&new->d_lock);
1085
1086 /*
1087 * might go back up the wrong parent if we have had a rename
1088 * or deletion
1089 */
1090 if (new != old->d_parent ||
1091 (old->d_flags & DCACHE_DENTRY_KILLED) ||
1092 need_seqretry(&rename_lock, seq)) {
1093 spin_unlock(&new->d_lock);
1094 new = NULL;
1095 }
1096 rcu_read_unlock();
1097 return new;
1098}
1099
1100/** 1041/**
1101 * enum d_walk_ret - action to talke during tree walk 1042 * enum d_walk_ret - action to talke during tree walk
1102 * @D_WALK_CONTINUE: contrinue walk 1043 * @D_WALK_CONTINUE: contrinue walk
@@ -1185,9 +1126,24 @@ resume:
1185 */ 1126 */
1186 if (this_parent != parent) { 1127 if (this_parent != parent) {
1187 struct dentry *child = this_parent; 1128 struct dentry *child = this_parent;
1188 this_parent = try_to_ascend(this_parent, seq); 1129 this_parent = child->d_parent;
1189 if (!this_parent) 1130
1131 rcu_read_lock();
1132 spin_unlock(&child->d_lock);
1133 spin_lock(&this_parent->d_lock);
1134
1135 /*
1136 * might go back up the wrong parent if we have had a rename
1137 * or deletion
1138 */
1139 if (this_parent != child->d_parent ||
1140 (child->d_flags & DCACHE_DENTRY_KILLED) ||
1141 need_seqretry(&rename_lock, seq)) {
1142 spin_unlock(&this_parent->d_lock);
1143 rcu_read_unlock();
1190 goto rename_retry; 1144 goto rename_retry;
1145 }
1146 rcu_read_unlock();
1191 next = child->d_u.d_child.next; 1147 next = child->d_u.d_child.next;
1192 goto resume; 1148 goto resume;
1193 } 1149 }
diff --git a/fs/efivarfs/super.c b/fs/efivarfs/super.c
index a8766b880c07..becc725a1953 100644
--- a/fs/efivarfs/super.c
+++ b/fs/efivarfs/super.c
@@ -83,19 +83,10 @@ static int efivarfs_d_hash(const struct dentry *dentry, struct qstr *qstr)
83 return 0; 83 return 0;
84} 84}
85 85
86/*
87 * Retaining negative dentries for an in-memory filesystem just wastes
88 * memory and lookup time: arrange for them to be deleted immediately.
89 */
90static int efivarfs_delete_dentry(const struct dentry *dentry)
91{
92 return 1;
93}
94
95static struct dentry_operations efivarfs_d_ops = { 86static struct dentry_operations efivarfs_d_ops = {
96 .d_compare = efivarfs_d_compare, 87 .d_compare = efivarfs_d_compare,
97 .d_hash = efivarfs_d_hash, 88 .d_hash = efivarfs_d_hash,
98 .d_delete = efivarfs_delete_dentry, 89 .d_delete = always_delete_dentry,
99}; 90};
100 91
101static struct dentry *efivarfs_alloc_dentry(struct dentry *parent, char *name) 92static struct dentry *efivarfs_alloc_dentry(struct dentry *parent, char *name)
diff --git a/fs/gfs2/lock_dlm.c b/fs/gfs2/lock_dlm.c
index c8423d6de6c3..2a6ba06bee6f 100644
--- a/fs/gfs2/lock_dlm.c
+++ b/fs/gfs2/lock_dlm.c
@@ -466,19 +466,19 @@ static void gdlm_cancel(struct gfs2_glock *gl)
466static void control_lvb_read(struct lm_lockstruct *ls, uint32_t *lvb_gen, 466static void control_lvb_read(struct lm_lockstruct *ls, uint32_t *lvb_gen,
467 char *lvb_bits) 467 char *lvb_bits)
468{ 468{
469 uint32_t gen; 469 __le32 gen;
470 memcpy(lvb_bits, ls->ls_control_lvb, GDLM_LVB_SIZE); 470 memcpy(lvb_bits, ls->ls_control_lvb, GDLM_LVB_SIZE);
471 memcpy(&gen, lvb_bits, sizeof(uint32_t)); 471 memcpy(&gen, lvb_bits, sizeof(__le32));
472 *lvb_gen = le32_to_cpu(gen); 472 *lvb_gen = le32_to_cpu(gen);
473} 473}
474 474
475static void control_lvb_write(struct lm_lockstruct *ls, uint32_t lvb_gen, 475static void control_lvb_write(struct lm_lockstruct *ls, uint32_t lvb_gen,
476 char *lvb_bits) 476 char *lvb_bits)
477{ 477{
478 uint32_t gen; 478 __le32 gen;
479 memcpy(ls->ls_control_lvb, lvb_bits, GDLM_LVB_SIZE); 479 memcpy(ls->ls_control_lvb, lvb_bits, GDLM_LVB_SIZE);
480 gen = cpu_to_le32(lvb_gen); 480 gen = cpu_to_le32(lvb_gen);
481 memcpy(ls->ls_control_lvb, &gen, sizeof(uint32_t)); 481 memcpy(ls->ls_control_lvb, &gen, sizeof(__le32));
482} 482}
483 483
484static int all_jid_bits_clear(char *lvb) 484static int all_jid_bits_clear(char *lvb)
diff --git a/fs/gfs2/quota.c b/fs/gfs2/quota.c
index 453b50eaddec..98236d0df3ca 100644
--- a/fs/gfs2/quota.c
+++ b/fs/gfs2/quota.c
@@ -667,7 +667,7 @@ static int gfs2_adjust_quota(struct gfs2_inode *ip, loff_t loc,
667 struct buffer_head *bh; 667 struct buffer_head *bh;
668 struct page *page; 668 struct page *page;
669 void *kaddr, *ptr; 669 void *kaddr, *ptr;
670 struct gfs2_quota q, *qp; 670 struct gfs2_quota q;
671 int err, nbytes; 671 int err, nbytes;
672 u64 size; 672 u64 size;
673 673
@@ -683,28 +683,25 @@ static int gfs2_adjust_quota(struct gfs2_inode *ip, loff_t loc,
683 return err; 683 return err;
684 684
685 err = -EIO; 685 err = -EIO;
686 qp = &q; 686 be64_add_cpu(&q.qu_value, change);
687 qp->qu_value = be64_to_cpu(qp->qu_value); 687 qd->qd_qb.qb_value = q.qu_value;
688 qp->qu_value += change;
689 qp->qu_value = cpu_to_be64(qp->qu_value);
690 qd->qd_qb.qb_value = qp->qu_value;
691 if (fdq) { 688 if (fdq) {
692 if (fdq->d_fieldmask & FS_DQ_BSOFT) { 689 if (fdq->d_fieldmask & FS_DQ_BSOFT) {
693 qp->qu_warn = cpu_to_be64(fdq->d_blk_softlimit >> sdp->sd_fsb2bb_shift); 690 q.qu_warn = cpu_to_be64(fdq->d_blk_softlimit >> sdp->sd_fsb2bb_shift);
694 qd->qd_qb.qb_warn = qp->qu_warn; 691 qd->qd_qb.qb_warn = q.qu_warn;
695 } 692 }
696 if (fdq->d_fieldmask & FS_DQ_BHARD) { 693 if (fdq->d_fieldmask & FS_DQ_BHARD) {
697 qp->qu_limit = cpu_to_be64(fdq->d_blk_hardlimit >> sdp->sd_fsb2bb_shift); 694 q.qu_limit = cpu_to_be64(fdq->d_blk_hardlimit >> sdp->sd_fsb2bb_shift);
698 qd->qd_qb.qb_limit = qp->qu_limit; 695 qd->qd_qb.qb_limit = q.qu_limit;
699 } 696 }
700 if (fdq->d_fieldmask & FS_DQ_BCOUNT) { 697 if (fdq->d_fieldmask & FS_DQ_BCOUNT) {
701 qp->qu_value = cpu_to_be64(fdq->d_bcount >> sdp->sd_fsb2bb_shift); 698 q.qu_value = cpu_to_be64(fdq->d_bcount >> sdp->sd_fsb2bb_shift);
702 qd->qd_qb.qb_value = qp->qu_value; 699 qd->qd_qb.qb_value = q.qu_value;
703 } 700 }
704 } 701 }
705 702
706 /* Write the quota into the quota file on disk */ 703 /* Write the quota into the quota file on disk */
707 ptr = qp; 704 ptr = &q;
708 nbytes = sizeof(struct gfs2_quota); 705 nbytes = sizeof(struct gfs2_quota);
709get_a_page: 706get_a_page:
710 page = find_or_create_page(mapping, index, GFP_NOFS); 707 page = find_or_create_page(mapping, index, GFP_NOFS);
diff --git a/fs/gfs2/rgrp.c b/fs/gfs2/rgrp.c
index 4d83abdd5635..c8d6161bd682 100644
--- a/fs/gfs2/rgrp.c
+++ b/fs/gfs2/rgrp.c
@@ -1127,7 +1127,7 @@ int gfs2_rgrp_bh_get(struct gfs2_rgrpd *rgd)
1127 rgd->rd_flags |= (GFS2_RDF_UPTODATE | GFS2_RDF_CHECK); 1127 rgd->rd_flags |= (GFS2_RDF_UPTODATE | GFS2_RDF_CHECK);
1128 rgd->rd_free_clone = rgd->rd_free; 1128 rgd->rd_free_clone = rgd->rd_free;
1129 } 1129 }
1130 if (be32_to_cpu(GFS2_MAGIC) != rgd->rd_rgl->rl_magic) { 1130 if (cpu_to_be32(GFS2_MAGIC) != rgd->rd_rgl->rl_magic) {
1131 rgd->rd_rgl->rl_unlinked = cpu_to_be32(count_unlinked(rgd)); 1131 rgd->rd_rgl->rl_unlinked = cpu_to_be32(count_unlinked(rgd));
1132 gfs2_rgrp_ondisk2lvb(rgd->rd_rgl, 1132 gfs2_rgrp_ondisk2lvb(rgd->rd_rgl,
1133 rgd->rd_bits[0].bi_bh->b_data); 1133 rgd->rd_bits[0].bi_bh->b_data);
@@ -1161,7 +1161,7 @@ int update_rgrp_lvb(struct gfs2_rgrpd *rgd)
1161 if (rgd->rd_flags & GFS2_RDF_UPTODATE) 1161 if (rgd->rd_flags & GFS2_RDF_UPTODATE)
1162 return 0; 1162 return 0;
1163 1163
1164 if (be32_to_cpu(GFS2_MAGIC) != rgd->rd_rgl->rl_magic) 1164 if (cpu_to_be32(GFS2_MAGIC) != rgd->rd_rgl->rl_magic)
1165 return gfs2_rgrp_bh_get(rgd); 1165 return gfs2_rgrp_bh_get(rgd);
1166 1166
1167 rl_flags = be32_to_cpu(rgd->rd_rgl->rl_flags); 1167 rl_flags = be32_to_cpu(rgd->rd_rgl->rl_flags);
diff --git a/fs/hostfs/hostfs_kern.c b/fs/hostfs/hostfs_kern.c
index 25437280a207..db23ce1bd903 100644
--- a/fs/hostfs/hostfs_kern.c
+++ b/fs/hostfs/hostfs_kern.c
@@ -33,15 +33,6 @@ static inline struct hostfs_inode_info *HOSTFS_I(struct inode *inode)
33 33
34#define FILE_HOSTFS_I(file) HOSTFS_I(file_inode(file)) 34#define FILE_HOSTFS_I(file) HOSTFS_I(file_inode(file))
35 35
36static int hostfs_d_delete(const struct dentry *dentry)
37{
38 return 1;
39}
40
41static const struct dentry_operations hostfs_dentry_ops = {
42 .d_delete = hostfs_d_delete,
43};
44
45/* Changed in hostfs_args before the kernel starts running */ 36/* Changed in hostfs_args before the kernel starts running */
46static char *root_ino = ""; 37static char *root_ino = "";
47static int append = 0; 38static int append = 0;
@@ -925,7 +916,7 @@ static int hostfs_fill_sb_common(struct super_block *sb, void *d, int silent)
925 sb->s_blocksize_bits = 10; 916 sb->s_blocksize_bits = 10;
926 sb->s_magic = HOSTFS_SUPER_MAGIC; 917 sb->s_magic = HOSTFS_SUPER_MAGIC;
927 sb->s_op = &hostfs_sbops; 918 sb->s_op = &hostfs_sbops;
928 sb->s_d_op = &hostfs_dentry_ops; 919 sb->s_d_op = &simple_dentry_operations;
929 sb->s_maxbytes = MAX_LFS_FILESIZE; 920 sb->s_maxbytes = MAX_LFS_FILESIZE;
930 921
931 /* NULL is printed as <NULL> by sprintf: avoid that. */ 922 /* NULL is printed as <NULL> by sprintf: avoid that. */
diff --git a/fs/libfs.c b/fs/libfs.c
index 5de06947ba5e..a1844244246f 100644
--- a/fs/libfs.c
+++ b/fs/libfs.c
@@ -47,10 +47,16 @@ EXPORT_SYMBOL(simple_statfs);
47 * Retaining negative dentries for an in-memory filesystem just wastes 47 * Retaining negative dentries for an in-memory filesystem just wastes
48 * memory and lookup time: arrange for them to be deleted immediately. 48 * memory and lookup time: arrange for them to be deleted immediately.
49 */ 49 */
50static int simple_delete_dentry(const struct dentry *dentry) 50int always_delete_dentry(const struct dentry *dentry)
51{ 51{
52 return 1; 52 return 1;
53} 53}
54EXPORT_SYMBOL(always_delete_dentry);
55
56const struct dentry_operations simple_dentry_operations = {
57 .d_delete = always_delete_dentry,
58};
59EXPORT_SYMBOL(simple_dentry_operations);
54 60
55/* 61/*
56 * Lookup the data. This is trivial - if the dentry didn't already 62 * Lookup the data. This is trivial - if the dentry didn't already
@@ -58,10 +64,6 @@ static int simple_delete_dentry(const struct dentry *dentry)
58 */ 64 */
59struct dentry *simple_lookup(struct inode *dir, struct dentry *dentry, unsigned int flags) 65struct dentry *simple_lookup(struct inode *dir, struct dentry *dentry, unsigned int flags)
60{ 66{
61 static const struct dentry_operations simple_dentry_operations = {
62 .d_delete = simple_delete_dentry,
63 };
64
65 if (dentry->d_name.len > NAME_MAX) 67 if (dentry->d_name.len > NAME_MAX)
66 return ERR_PTR(-ENAMETOOLONG); 68 return ERR_PTR(-ENAMETOOLONG);
67 if (!dentry->d_sb->s_d_op) 69 if (!dentry->d_sb->s_d_op)
diff --git a/fs/proc/generic.c b/fs/proc/generic.c
index 737e15615b04..cca93b6fb9a9 100644
--- a/fs/proc/generic.c
+++ b/fs/proc/generic.c
@@ -175,22 +175,6 @@ static const struct inode_operations proc_link_inode_operations = {
175}; 175};
176 176
177/* 177/*
178 * As some entries in /proc are volatile, we want to
179 * get rid of unused dentries. This could be made
180 * smarter: we could keep a "volatile" flag in the
181 * inode to indicate which ones to keep.
182 */
183static int proc_delete_dentry(const struct dentry * dentry)
184{
185 return 1;
186}
187
188static const struct dentry_operations proc_dentry_operations =
189{
190 .d_delete = proc_delete_dentry,
191};
192
193/*
194 * Don't create negative dentries here, return -ENOENT by hand 178 * Don't create negative dentries here, return -ENOENT by hand
195 * instead. 179 * instead.
196 */ 180 */
@@ -209,7 +193,7 @@ struct dentry *proc_lookup_de(struct proc_dir_entry *de, struct inode *dir,
209 inode = proc_get_inode(dir->i_sb, de); 193 inode = proc_get_inode(dir->i_sb, de);
210 if (!inode) 194 if (!inode)
211 return ERR_PTR(-ENOMEM); 195 return ERR_PTR(-ENOMEM);
212 d_set_d_op(dentry, &proc_dentry_operations); 196 d_set_d_op(dentry, &simple_dentry_operations);
213 d_add(dentry, inode); 197 d_add(dentry, inode);
214 return NULL; 198 return NULL;
215 } 199 }
diff --git a/fs/proc/namespaces.c b/fs/proc/namespaces.c
index 49a7fff2e83a..9ae46b87470d 100644
--- a/fs/proc/namespaces.c
+++ b/fs/proc/namespaces.c
@@ -42,12 +42,6 @@ static const struct inode_operations ns_inode_operations = {
42 .setattr = proc_setattr, 42 .setattr = proc_setattr,
43}; 43};
44 44
45static int ns_delete_dentry(const struct dentry *dentry)
46{
47 /* Don't cache namespace inodes when not in use */
48 return 1;
49}
50
51static char *ns_dname(struct dentry *dentry, char *buffer, int buflen) 45static char *ns_dname(struct dentry *dentry, char *buffer, int buflen)
52{ 46{
53 struct inode *inode = dentry->d_inode; 47 struct inode *inode = dentry->d_inode;
@@ -59,7 +53,7 @@ static char *ns_dname(struct dentry *dentry, char *buffer, int buflen)
59 53
60const struct dentry_operations ns_dentry_operations = 54const struct dentry_operations ns_dentry_operations =
61{ 55{
62 .d_delete = ns_delete_dentry, 56 .d_delete = always_delete_dentry,
63 .d_dname = ns_dname, 57 .d_dname = ns_dname,
64}; 58};
65 59
diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index c70111ebefd4..b6fa8657dcbc 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -25,6 +25,78 @@ config SQUASHFS
25 25
26 If unsure, say N. 26 If unsure, say N.
27 27
28choice
29 prompt "File decompression options"
30 depends on SQUASHFS
31 help
32 Squashfs now supports two options for decompressing file
33 data. Traditionally Squashfs has decompressed into an
34 intermediate buffer and then memcopied it into the page cache.
35 Squashfs now supports the ability to decompress directly into
36 the page cache.
37
38 If unsure, select "Decompress file data into an intermediate buffer"
39
40config SQUASHFS_FILE_CACHE
41 bool "Decompress file data into an intermediate buffer"
42 help
43 Decompress file data into an intermediate buffer and then
44 memcopy it into the page cache.
45
46config SQUASHFS_FILE_DIRECT
47 bool "Decompress files directly into the page cache"
48 help
49 Directly decompress file data into the page cache.
50 Doing so can significantly improve performance because
51 it eliminates a memcpy and it also removes the lock contention
52 on the single buffer.
53
54endchoice
55
56choice
57 prompt "Decompressor parallelisation options"
58 depends on SQUASHFS
59 help
60 Squashfs now supports three parallelisation options for
61 decompression. Each one exhibits various trade-offs between
62 decompression performance and CPU and memory usage.
63
64 If in doubt, select "Single threaded compression"
65
66config SQUASHFS_DECOMP_SINGLE
67 bool "Single threaded compression"
68 help
69 Traditionally Squashfs has used single-threaded decompression.
70 Only one block (data or metadata) can be decompressed at any
71 one time. This limits CPU and memory usage to a minimum.
72
73config SQUASHFS_DECOMP_MULTI
74 bool "Use multiple decompressors for parallel I/O"
75 help
76 By default Squashfs uses a single decompressor but it gives
77 poor performance on parallel I/O workloads when using multiple CPU
78 machines due to waiting on decompressor availability.
79
80 If you have a parallel I/O workload and your system has enough memory,
81 using this option may improve overall I/O performance.
82
83 This decompressor implementation uses up to two parallel
84 decompressors per core. It dynamically allocates decompressors
85 on a demand basis.
86
87config SQUASHFS_DECOMP_MULTI_PERCPU
88 bool "Use percpu multiple decompressors for parallel I/O"
89 help
90 By default Squashfs uses a single decompressor but it gives
91 poor performance on parallel I/O workloads when using multiple CPU
92 machines due to waiting on decompressor availability.
93
94 This decompressor implementation uses a maximum of one
95 decompressor per core. It uses percpu variables to ensure
96 decompression is load-balanced across the cores.
97
98endchoice
99
28config SQUASHFS_XATTR 100config SQUASHFS_XATTR
29 bool "Squashfs XATTR support" 101 bool "Squashfs XATTR support"
30 depends on SQUASHFS 102 depends on SQUASHFS
diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
index 110b0476f3b4..4132520b4ff2 100644
--- a/fs/squashfs/Makefile
+++ b/fs/squashfs/Makefile
@@ -5,6 +5,11 @@
5obj-$(CONFIG_SQUASHFS) += squashfs.o 5obj-$(CONFIG_SQUASHFS) += squashfs.o
6squashfs-y += block.o cache.o dir.o export.o file.o fragment.o id.o inode.o 6squashfs-y += block.o cache.o dir.o export.o file.o fragment.o id.o inode.o
7squashfs-y += namei.o super.o symlink.o decompressor.o 7squashfs-y += namei.o super.o symlink.o decompressor.o
8squashfs-$(CONFIG_SQUASHFS_FILE_CACHE) += file_cache.o
9squashfs-$(CONFIG_SQUASHFS_FILE_DIRECT) += file_direct.o page_actor.o
10squashfs-$(CONFIG_SQUASHFS_DECOMP_SINGLE) += decompressor_single.o
11squashfs-$(CONFIG_SQUASHFS_DECOMP_MULTI) += decompressor_multi.o
12squashfs-$(CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU) += decompressor_multi_percpu.o
8squashfs-$(CONFIG_SQUASHFS_XATTR) += xattr.o xattr_id.o 13squashfs-$(CONFIG_SQUASHFS_XATTR) += xattr.o xattr_id.o
9squashfs-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o 14squashfs-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
10squashfs-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o 15squashfs-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
diff --git a/fs/squashfs/block.c b/fs/squashfs/block.c
index 41d108ecc9be..0cea9b9236d0 100644
--- a/fs/squashfs/block.c
+++ b/fs/squashfs/block.c
@@ -36,6 +36,7 @@
36#include "squashfs_fs_sb.h" 36#include "squashfs_fs_sb.h"
37#include "squashfs.h" 37#include "squashfs.h"
38#include "decompressor.h" 38#include "decompressor.h"
39#include "page_actor.h"
39 40
40/* 41/*
41 * Read the metadata block length, this is stored in the first two 42 * Read the metadata block length, this is stored in the first two
@@ -86,16 +87,16 @@ static struct buffer_head *get_block_length(struct super_block *sb,
86 * generated a larger block - this does occasionally happen with compression 87 * generated a larger block - this does occasionally happen with compression
87 * algorithms). 88 * algorithms).
88 */ 89 */
89int squashfs_read_data(struct super_block *sb, void **buffer, u64 index, 90int squashfs_read_data(struct super_block *sb, u64 index, int length,
90 int length, u64 *next_index, int srclength, int pages) 91 u64 *next_index, struct squashfs_page_actor *output)
91{ 92{
92 struct squashfs_sb_info *msblk = sb->s_fs_info; 93 struct squashfs_sb_info *msblk = sb->s_fs_info;
93 struct buffer_head **bh; 94 struct buffer_head **bh;
94 int offset = index & ((1 << msblk->devblksize_log2) - 1); 95 int offset = index & ((1 << msblk->devblksize_log2) - 1);
95 u64 cur_index = index >> msblk->devblksize_log2; 96 u64 cur_index = index >> msblk->devblksize_log2;
96 int bytes, compressed, b = 0, k = 0, page = 0, avail; 97 int bytes, compressed, b = 0, k = 0, avail, i;
97 98
98 bh = kcalloc(((srclength + msblk->devblksize - 1) 99 bh = kcalloc(((output->length + msblk->devblksize - 1)
99 >> msblk->devblksize_log2) + 1, sizeof(*bh), GFP_KERNEL); 100 >> msblk->devblksize_log2) + 1, sizeof(*bh), GFP_KERNEL);
100 if (bh == NULL) 101 if (bh == NULL)
101 return -ENOMEM; 102 return -ENOMEM;
@@ -111,9 +112,9 @@ int squashfs_read_data(struct super_block *sb, void **buffer, u64 index,
111 *next_index = index + length; 112 *next_index = index + length;
112 113
113 TRACE("Block @ 0x%llx, %scompressed size %d, src size %d\n", 114 TRACE("Block @ 0x%llx, %scompressed size %d, src size %d\n",
114 index, compressed ? "" : "un", length, srclength); 115 index, compressed ? "" : "un", length, output->length);
115 116
116 if (length < 0 || length > srclength || 117 if (length < 0 || length > output->length ||
117 (index + length) > msblk->bytes_used) 118 (index + length) > msblk->bytes_used)
118 goto read_failure; 119 goto read_failure;
119 120
@@ -145,7 +146,7 @@ int squashfs_read_data(struct super_block *sb, void **buffer, u64 index,
145 TRACE("Block @ 0x%llx, %scompressed size %d\n", index, 146 TRACE("Block @ 0x%llx, %scompressed size %d\n", index,
146 compressed ? "" : "un", length); 147 compressed ? "" : "un", length);
147 148
148 if (length < 0 || length > srclength || 149 if (length < 0 || length > output->length ||
149 (index + length) > msblk->bytes_used) 150 (index + length) > msblk->bytes_used)
150 goto block_release; 151 goto block_release;
151 152
@@ -158,9 +159,15 @@ int squashfs_read_data(struct super_block *sb, void **buffer, u64 index,
158 ll_rw_block(READ, b - 1, bh + 1); 159 ll_rw_block(READ, b - 1, bh + 1);
159 } 160 }
160 161
162 for (i = 0; i < b; i++) {
163 wait_on_buffer(bh[i]);
164 if (!buffer_uptodate(bh[i]))
165 goto block_release;
166 }
167
161 if (compressed) { 168 if (compressed) {
162 length = squashfs_decompress(msblk, buffer, bh, b, offset, 169 length = squashfs_decompress(msblk, bh, b, offset, length,
163 length, srclength, pages); 170 output);
164 if (length < 0) 171 if (length < 0)
165 goto read_failure; 172 goto read_failure;
166 } else { 173 } else {
@@ -168,22 +175,20 @@ int squashfs_read_data(struct super_block *sb, void **buffer, u64 index,
168 * Block is uncompressed. 175 * Block is uncompressed.
169 */ 176 */
170 int in, pg_offset = 0; 177 int in, pg_offset = 0;
178 void *data = squashfs_first_page(output);
171 179
172 for (bytes = length; k < b; k++) { 180 for (bytes = length; k < b; k++) {
173 in = min(bytes, msblk->devblksize - offset); 181 in = min(bytes, msblk->devblksize - offset);
174 bytes -= in; 182 bytes -= in;
175 wait_on_buffer(bh[k]);
176 if (!buffer_uptodate(bh[k]))
177 goto block_release;
178 while (in) { 183 while (in) {
179 if (pg_offset == PAGE_CACHE_SIZE) { 184 if (pg_offset == PAGE_CACHE_SIZE) {
180 page++; 185 data = squashfs_next_page(output);
181 pg_offset = 0; 186 pg_offset = 0;
182 } 187 }
183 avail = min_t(int, in, PAGE_CACHE_SIZE - 188 avail = min_t(int, in, PAGE_CACHE_SIZE -
184 pg_offset); 189 pg_offset);
185 memcpy(buffer[page] + pg_offset, 190 memcpy(data + pg_offset, bh[k]->b_data + offset,
186 bh[k]->b_data + offset, avail); 191 avail);
187 in -= avail; 192 in -= avail;
188 pg_offset += avail; 193 pg_offset += avail;
189 offset += avail; 194 offset += avail;
@@ -191,6 +196,7 @@ int squashfs_read_data(struct super_block *sb, void **buffer, u64 index,
191 offset = 0; 196 offset = 0;
192 put_bh(bh[k]); 197 put_bh(bh[k]);
193 } 198 }
199 squashfs_finish_page(output);
194 } 200 }
195 201
196 kfree(bh); 202 kfree(bh);
diff --git a/fs/squashfs/cache.c b/fs/squashfs/cache.c
index af0b73802592..1cb70a0b2168 100644
--- a/fs/squashfs/cache.c
+++ b/fs/squashfs/cache.c
@@ -56,6 +56,7 @@
56#include "squashfs_fs.h" 56#include "squashfs_fs.h"
57#include "squashfs_fs_sb.h" 57#include "squashfs_fs_sb.h"
58#include "squashfs.h" 58#include "squashfs.h"
59#include "page_actor.h"
59 60
60/* 61/*
61 * Look-up block in cache, and increment usage count. If not in cache, read 62 * Look-up block in cache, and increment usage count. If not in cache, read
@@ -119,9 +120,8 @@ struct squashfs_cache_entry *squashfs_cache_get(struct super_block *sb,
119 entry->error = 0; 120 entry->error = 0;
120 spin_unlock(&cache->lock); 121 spin_unlock(&cache->lock);
121 122
122 entry->length = squashfs_read_data(sb, entry->data, 123 entry->length = squashfs_read_data(sb, block, length,
123 block, length, &entry->next_index, 124 &entry->next_index, entry->actor);
124 cache->block_size, cache->pages);
125 125
126 spin_lock(&cache->lock); 126 spin_lock(&cache->lock);
127 127
@@ -220,6 +220,7 @@ void squashfs_cache_delete(struct squashfs_cache *cache)
220 kfree(cache->entry[i].data[j]); 220 kfree(cache->entry[i].data[j]);
221 kfree(cache->entry[i].data); 221 kfree(cache->entry[i].data);
222 } 222 }
223 kfree(cache->entry[i].actor);
223 } 224 }
224 225
225 kfree(cache->entry); 226 kfree(cache->entry);
@@ -280,6 +281,13 @@ struct squashfs_cache *squashfs_cache_init(char *name, int entries,
280 goto cleanup; 281 goto cleanup;
281 } 282 }
282 } 283 }
284
285 entry->actor = squashfs_page_actor_init(entry->data,
286 cache->pages, 0);
287 if (entry->actor == NULL) {
288 ERROR("Failed to allocate %s cache entry\n", name);
289 goto cleanup;
290 }
283 } 291 }
284 292
285 return cache; 293 return cache;
@@ -410,6 +418,7 @@ void *squashfs_read_table(struct super_block *sb, u64 block, int length)
410 int pages = (length + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT; 418 int pages = (length + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT;
411 int i, res; 419 int i, res;
412 void *table, *buffer, **data; 420 void *table, *buffer, **data;
421 struct squashfs_page_actor *actor;
413 422
414 table = buffer = kmalloc(length, GFP_KERNEL); 423 table = buffer = kmalloc(length, GFP_KERNEL);
415 if (table == NULL) 424 if (table == NULL)
@@ -421,19 +430,28 @@ void *squashfs_read_table(struct super_block *sb, u64 block, int length)
421 goto failed; 430 goto failed;
422 } 431 }
423 432
433 actor = squashfs_page_actor_init(data, pages, length);
434 if (actor == NULL) {
435 res = -ENOMEM;
436 goto failed2;
437 }
438
424 for (i = 0; i < pages; i++, buffer += PAGE_CACHE_SIZE) 439 for (i = 0; i < pages; i++, buffer += PAGE_CACHE_SIZE)
425 data[i] = buffer; 440 data[i] = buffer;
426 441
427 res = squashfs_read_data(sb, data, block, length | 442 res = squashfs_read_data(sb, block, length |
428 SQUASHFS_COMPRESSED_BIT_BLOCK, NULL, length, pages); 443 SQUASHFS_COMPRESSED_BIT_BLOCK, NULL, actor);
429 444
430 kfree(data); 445 kfree(data);
446 kfree(actor);
431 447
432 if (res < 0) 448 if (res < 0)
433 goto failed; 449 goto failed;
434 450
435 return table; 451 return table;
436 452
453failed2:
454 kfree(data);
437failed: 455failed:
438 kfree(table); 456 kfree(table);
439 return ERR_PTR(res); 457 return ERR_PTR(res);
diff --git a/fs/squashfs/decompressor.c b/fs/squashfs/decompressor.c
index 3f6271d86abc..ac22fe73b0ad 100644
--- a/fs/squashfs/decompressor.c
+++ b/fs/squashfs/decompressor.c
@@ -30,6 +30,7 @@
30#include "squashfs_fs_sb.h" 30#include "squashfs_fs_sb.h"
31#include "decompressor.h" 31#include "decompressor.h"
32#include "squashfs.h" 32#include "squashfs.h"
33#include "page_actor.h"
33 34
34/* 35/*
35 * This file (and decompressor.h) implements a decompressor framework for 36 * This file (and decompressor.h) implements a decompressor framework for
@@ -37,29 +38,29 @@
37 */ 38 */
38 39
39static const struct squashfs_decompressor squashfs_lzma_unsupported_comp_ops = { 40static const struct squashfs_decompressor squashfs_lzma_unsupported_comp_ops = {
40 NULL, NULL, NULL, LZMA_COMPRESSION, "lzma", 0 41 NULL, NULL, NULL, NULL, LZMA_COMPRESSION, "lzma", 0
41}; 42};
42 43
43#ifndef CONFIG_SQUASHFS_LZO 44#ifndef CONFIG_SQUASHFS_LZO
44static const struct squashfs_decompressor squashfs_lzo_comp_ops = { 45static const struct squashfs_decompressor squashfs_lzo_comp_ops = {
45 NULL, NULL, NULL, LZO_COMPRESSION, "lzo", 0 46 NULL, NULL, NULL, NULL, LZO_COMPRESSION, "lzo", 0
46}; 47};
47#endif 48#endif
48 49
49#ifndef CONFIG_SQUASHFS_XZ 50#ifndef CONFIG_SQUASHFS_XZ
50static const struct squashfs_decompressor squashfs_xz_comp_ops = { 51static const struct squashfs_decompressor squashfs_xz_comp_ops = {
51 NULL, NULL, NULL, XZ_COMPRESSION, "xz", 0 52 NULL, NULL, NULL, NULL, XZ_COMPRESSION, "xz", 0
52}; 53};
53#endif 54#endif
54 55
55#ifndef CONFIG_SQUASHFS_ZLIB 56#ifndef CONFIG_SQUASHFS_ZLIB
56static const struct squashfs_decompressor squashfs_zlib_comp_ops = { 57static const struct squashfs_decompressor squashfs_zlib_comp_ops = {
57 NULL, NULL, NULL, ZLIB_COMPRESSION, "zlib", 0 58 NULL, NULL, NULL, NULL, ZLIB_COMPRESSION, "zlib", 0
58}; 59};
59#endif 60#endif
60 61
61static const struct squashfs_decompressor squashfs_unknown_comp_ops = { 62static const struct squashfs_decompressor squashfs_unknown_comp_ops = {
62 NULL, NULL, NULL, 0, "unknown", 0 63 NULL, NULL, NULL, NULL, 0, "unknown", 0
63}; 64};
64 65
65static const struct squashfs_decompressor *decompressor[] = { 66static const struct squashfs_decompressor *decompressor[] = {
@@ -83,10 +84,11 @@ const struct squashfs_decompressor *squashfs_lookup_decompressor(int id)
83} 84}
84 85
85 86
86void *squashfs_decompressor_init(struct super_block *sb, unsigned short flags) 87static void *get_comp_opts(struct super_block *sb, unsigned short flags)
87{ 88{
88 struct squashfs_sb_info *msblk = sb->s_fs_info; 89 struct squashfs_sb_info *msblk = sb->s_fs_info;
89 void *strm, *buffer = NULL; 90 void *buffer = NULL, *comp_opts;
91 struct squashfs_page_actor *actor = NULL;
90 int length = 0; 92 int length = 0;
91 93
92 /* 94 /*
@@ -94,23 +96,46 @@ void *squashfs_decompressor_init(struct super_block *sb, unsigned short flags)
94 */ 96 */
95 if (SQUASHFS_COMP_OPTS(flags)) { 97 if (SQUASHFS_COMP_OPTS(flags)) {
96 buffer = kmalloc(PAGE_CACHE_SIZE, GFP_KERNEL); 98 buffer = kmalloc(PAGE_CACHE_SIZE, GFP_KERNEL);
97 if (buffer == NULL) 99 if (buffer == NULL) {
98 return ERR_PTR(-ENOMEM); 100 comp_opts = ERR_PTR(-ENOMEM);
101 goto out;
102 }
103
104 actor = squashfs_page_actor_init(&buffer, 1, 0);
105 if (actor == NULL) {
106 comp_opts = ERR_PTR(-ENOMEM);
107 goto out;
108 }
99 109
100 length = squashfs_read_data(sb, &buffer, 110 length = squashfs_read_data(sb,
101 sizeof(struct squashfs_super_block), 0, NULL, 111 sizeof(struct squashfs_super_block), 0, NULL, actor);
102 PAGE_CACHE_SIZE, 1);
103 112
104 if (length < 0) { 113 if (length < 0) {
105 strm = ERR_PTR(length); 114 comp_opts = ERR_PTR(length);
106 goto finished; 115 goto out;
107 } 116 }
108 } 117 }
109 118
110 strm = msblk->decompressor->init(msblk, buffer, length); 119 comp_opts = squashfs_comp_opts(msblk, buffer, length);
111 120
112finished: 121out:
122 kfree(actor);
113 kfree(buffer); 123 kfree(buffer);
124 return comp_opts;
125}
126
127
128void *squashfs_decompressor_setup(struct super_block *sb, unsigned short flags)
129{
130 struct squashfs_sb_info *msblk = sb->s_fs_info;
131 void *stream, *comp_opts = get_comp_opts(sb, flags);
132
133 if (IS_ERR(comp_opts))
134 return comp_opts;
135
136 stream = squashfs_decompressor_create(msblk, comp_opts);
137 if (IS_ERR(stream))
138 kfree(comp_opts);
114 139
115 return strm; 140 return stream;
116} 141}
diff --git a/fs/squashfs/decompressor.h b/fs/squashfs/decompressor.h
index 330073e29029..af0985321808 100644
--- a/fs/squashfs/decompressor.h
+++ b/fs/squashfs/decompressor.h
@@ -24,28 +24,22 @@
24 */ 24 */
25 25
26struct squashfs_decompressor { 26struct squashfs_decompressor {
27 void *(*init)(struct squashfs_sb_info *, void *, int); 27 void *(*init)(struct squashfs_sb_info *, void *);
28 void *(*comp_opts)(struct squashfs_sb_info *, void *, int);
28 void (*free)(void *); 29 void (*free)(void *);
29 int (*decompress)(struct squashfs_sb_info *, void **, 30 int (*decompress)(struct squashfs_sb_info *, void *,
30 struct buffer_head **, int, int, int, int, int); 31 struct buffer_head **, int, int, int,
32 struct squashfs_page_actor *);
31 int id; 33 int id;
32 char *name; 34 char *name;
33 int supported; 35 int supported;
34}; 36};
35 37
36static inline void squashfs_decompressor_free(struct squashfs_sb_info *msblk, 38static inline void *squashfs_comp_opts(struct squashfs_sb_info *msblk,
37 void *s) 39 void *buff, int length)
38{ 40{
39 if (msblk->decompressor) 41 return msblk->decompressor->comp_opts ?
40 msblk->decompressor->free(s); 42 msblk->decompressor->comp_opts(msblk, buff, length) : NULL;
41}
42
43static inline int squashfs_decompress(struct squashfs_sb_info *msblk,
44 void **buffer, struct buffer_head **bh, int b, int offset, int length,
45 int srclength, int pages)
46{
47 return msblk->decompressor->decompress(msblk, buffer, bh, b, offset,
48 length, srclength, pages);
49} 43}
50 44
51#ifdef CONFIG_SQUASHFS_XZ 45#ifdef CONFIG_SQUASHFS_XZ
diff --git a/fs/squashfs/decompressor_multi.c b/fs/squashfs/decompressor_multi.c
new file mode 100644
index 000000000000..d6008a636479
--- /dev/null
+++ b/fs/squashfs/decompressor_multi.c
@@ -0,0 +1,198 @@
1/*
2 * Copyright (c) 2013
3 * Minchan Kim <minchan@kernel.org>
4 *
5 * This work is licensed under the terms of the GNU GPL, version 2. See
6 * the COPYING file in the top-level directory.
7 */
8#include <linux/types.h>
9#include <linux/mutex.h>
10#include <linux/slab.h>
11#include <linux/buffer_head.h>
12#include <linux/sched.h>
13#include <linux/wait.h>
14#include <linux/cpumask.h>
15
16#include "squashfs_fs.h"
17#include "squashfs_fs_sb.h"
18#include "decompressor.h"
19#include "squashfs.h"
20
21/*
22 * This file implements multi-threaded decompression in the
23 * decompressor framework
24 */
25
26
27/*
28 * The reason that multiply two is that a CPU can request new I/O
29 * while it is waiting previous request.
30 */
31#define MAX_DECOMPRESSOR (num_online_cpus() * 2)
32
33
34int squashfs_max_decompressors(void)
35{
36 return MAX_DECOMPRESSOR;
37}
38
39
40struct squashfs_stream {
41 void *comp_opts;
42 struct list_head strm_list;
43 struct mutex mutex;
44 int avail_decomp;
45 wait_queue_head_t wait;
46};
47
48
49struct decomp_stream {
50 void *stream;
51 struct list_head list;
52};
53
54
55static void put_decomp_stream(struct decomp_stream *decomp_strm,
56 struct squashfs_stream *stream)
57{
58 mutex_lock(&stream->mutex);
59 list_add(&decomp_strm->list, &stream->strm_list);
60 mutex_unlock(&stream->mutex);
61 wake_up(&stream->wait);
62}
63
64void *squashfs_decompressor_create(struct squashfs_sb_info *msblk,
65 void *comp_opts)
66{
67 struct squashfs_stream *stream;
68 struct decomp_stream *decomp_strm = NULL;
69 int err = -ENOMEM;
70
71 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
72 if (!stream)
73 goto out;
74
75 stream->comp_opts = comp_opts;
76 mutex_init(&stream->mutex);
77 INIT_LIST_HEAD(&stream->strm_list);
78 init_waitqueue_head(&stream->wait);
79
80 /*
81 * We should have a decompressor at least as default
82 * so if we fail to allocate new decompressor dynamically,
83 * we could always fall back to default decompressor and
84 * file system works.
85 */
86 decomp_strm = kmalloc(sizeof(*decomp_strm), GFP_KERNEL);
87 if (!decomp_strm)
88 goto out;
89
90 decomp_strm->stream = msblk->decompressor->init(msblk,
91 stream->comp_opts);
92 if (IS_ERR(decomp_strm->stream)) {
93 err = PTR_ERR(decomp_strm->stream);
94 goto out;
95 }
96
97 list_add(&decomp_strm->list, &stream->strm_list);
98 stream->avail_decomp = 1;
99 return stream;
100
101out:
102 kfree(decomp_strm);
103 kfree(stream);
104 return ERR_PTR(err);
105}
106
107
108void squashfs_decompressor_destroy(struct squashfs_sb_info *msblk)
109{
110 struct squashfs_stream *stream = msblk->stream;
111 if (stream) {
112 struct decomp_stream *decomp_strm;
113
114 while (!list_empty(&stream->strm_list)) {
115 decomp_strm = list_entry(stream->strm_list.prev,
116 struct decomp_stream, list);
117 list_del(&decomp_strm->list);
118 msblk->decompressor->free(decomp_strm->stream);
119 kfree(decomp_strm);
120 stream->avail_decomp--;
121 }
122 WARN_ON(stream->avail_decomp);
123 kfree(stream->comp_opts);
124 kfree(stream);
125 }
126}
127
128
129static struct decomp_stream *get_decomp_stream(struct squashfs_sb_info *msblk,
130 struct squashfs_stream *stream)
131{
132 struct decomp_stream *decomp_strm;
133
134 while (1) {
135 mutex_lock(&stream->mutex);
136
137 /* There is available decomp_stream */
138 if (!list_empty(&stream->strm_list)) {
139 decomp_strm = list_entry(stream->strm_list.prev,
140 struct decomp_stream, list);
141 list_del(&decomp_strm->list);
142 mutex_unlock(&stream->mutex);
143 break;
144 }
145
146 /*
147 * If there is no available decomp and already full,
148 * let's wait for releasing decomp from other users.
149 */
150 if (stream->avail_decomp >= MAX_DECOMPRESSOR)
151 goto wait;
152
153 /* Let's allocate new decomp */
154 decomp_strm = kmalloc(sizeof(*decomp_strm), GFP_KERNEL);
155 if (!decomp_strm)
156 goto wait;
157
158 decomp_strm->stream = msblk->decompressor->init(msblk,
159 stream->comp_opts);
160 if (IS_ERR(decomp_strm->stream)) {
161 kfree(decomp_strm);
162 goto wait;
163 }
164
165 stream->avail_decomp++;
166 WARN_ON(stream->avail_decomp > MAX_DECOMPRESSOR);
167
168 mutex_unlock(&stream->mutex);
169 break;
170wait:
171 /*
172 * If system memory is tough, let's for other's
173 * releasing instead of hurting VM because it could
174 * make page cache thrashing.
175 */
176 mutex_unlock(&stream->mutex);
177 wait_event(stream->wait,
178 !list_empty(&stream->strm_list));
179 }
180
181 return decomp_strm;
182}
183
184
185int squashfs_decompress(struct squashfs_sb_info *msblk, struct buffer_head **bh,
186 int b, int offset, int length, struct squashfs_page_actor *output)
187{
188 int res;
189 struct squashfs_stream *stream = msblk->stream;
190 struct decomp_stream *decomp_stream = get_decomp_stream(msblk, stream);
191 res = msblk->decompressor->decompress(msblk, decomp_stream->stream,
192 bh, b, offset, length, output);
193 put_decomp_stream(decomp_stream, stream);
194 if (res < 0)
195 ERROR("%s decompression failed, data probably corrupt\n",
196 msblk->decompressor->name);
197 return res;
198}
diff --git a/fs/squashfs/decompressor_multi_percpu.c b/fs/squashfs/decompressor_multi_percpu.c
new file mode 100644
index 000000000000..23a9c28ad8ea
--- /dev/null
+++ b/fs/squashfs/decompressor_multi_percpu.c
@@ -0,0 +1,97 @@
1/*
2 * Copyright (c) 2013
3 * Phillip Lougher <phillip@squashfs.org.uk>
4 *
5 * This work is licensed under the terms of the GNU GPL, version 2. See
6 * the COPYING file in the top-level directory.
7 */
8
9#include <linux/types.h>
10#include <linux/slab.h>
11#include <linux/percpu.h>
12#include <linux/buffer_head.h>
13
14#include "squashfs_fs.h"
15#include "squashfs_fs_sb.h"
16#include "decompressor.h"
17#include "squashfs.h"
18
19/*
20 * This file implements multi-threaded decompression using percpu
21 * variables, one thread per cpu core.
22 */
23
24struct squashfs_stream {
25 void *stream;
26};
27
28void *squashfs_decompressor_create(struct squashfs_sb_info *msblk,
29 void *comp_opts)
30{
31 struct squashfs_stream *stream;
32 struct squashfs_stream __percpu *percpu;
33 int err, cpu;
34
35 percpu = alloc_percpu(struct squashfs_stream);
36 if (percpu == NULL)
37 return ERR_PTR(-ENOMEM);
38
39 for_each_possible_cpu(cpu) {
40 stream = per_cpu_ptr(percpu, cpu);
41 stream->stream = msblk->decompressor->init(msblk, comp_opts);
42 if (IS_ERR(stream->stream)) {
43 err = PTR_ERR(stream->stream);
44 goto out;
45 }
46 }
47
48 kfree(comp_opts);
49 return (__force void *) percpu;
50
51out:
52 for_each_possible_cpu(cpu) {
53 stream = per_cpu_ptr(percpu, cpu);
54 if (!IS_ERR_OR_NULL(stream->stream))
55 msblk->decompressor->free(stream->stream);
56 }
57 free_percpu(percpu);
58 return ERR_PTR(err);
59}
60
61void squashfs_decompressor_destroy(struct squashfs_sb_info *msblk)
62{
63 struct squashfs_stream __percpu *percpu =
64 (struct squashfs_stream __percpu *) msblk->stream;
65 struct squashfs_stream *stream;
66 int cpu;
67
68 if (msblk->stream) {
69 for_each_possible_cpu(cpu) {
70 stream = per_cpu_ptr(percpu, cpu);
71 msblk->decompressor->free(stream->stream);
72 }
73 free_percpu(percpu);
74 }
75}
76
77int squashfs_decompress(struct squashfs_sb_info *msblk, struct buffer_head **bh,
78 int b, int offset, int length, struct squashfs_page_actor *output)
79{
80 struct squashfs_stream __percpu *percpu =
81 (struct squashfs_stream __percpu *) msblk->stream;
82 struct squashfs_stream *stream = get_cpu_ptr(percpu);
83 int res = msblk->decompressor->decompress(msblk, stream->stream, bh, b,
84 offset, length, output);
85 put_cpu_ptr(stream);
86
87 if (res < 0)
88 ERROR("%s decompression failed, data probably corrupt\n",
89 msblk->decompressor->name);
90
91 return res;
92}
93
94int squashfs_max_decompressors(void)
95{
96 return num_possible_cpus();
97}
diff --git a/fs/squashfs/decompressor_single.c b/fs/squashfs/decompressor_single.c
new file mode 100644
index 000000000000..a6c75929a00e
--- /dev/null
+++ b/fs/squashfs/decompressor_single.c
@@ -0,0 +1,85 @@
1/*
2 * Copyright (c) 2013
3 * Phillip Lougher <phillip@squashfs.org.uk>
4 *
5 * This work is licensed under the terms of the GNU GPL, version 2. See
6 * the COPYING file in the top-level directory.
7 */
8
9#include <linux/types.h>
10#include <linux/mutex.h>
11#include <linux/slab.h>
12#include <linux/buffer_head.h>
13
14#include "squashfs_fs.h"
15#include "squashfs_fs_sb.h"
16#include "decompressor.h"
17#include "squashfs.h"
18
19/*
20 * This file implements single-threaded decompression in the
21 * decompressor framework
22 */
23
24struct squashfs_stream {
25 void *stream;
26 struct mutex mutex;
27};
28
29void *squashfs_decompressor_create(struct squashfs_sb_info *msblk,
30 void *comp_opts)
31{
32 struct squashfs_stream *stream;
33 int err = -ENOMEM;
34
35 stream = kmalloc(sizeof(*stream), GFP_KERNEL);
36 if (stream == NULL)
37 goto out;
38
39 stream->stream = msblk->decompressor->init(msblk, comp_opts);
40 if (IS_ERR(stream->stream)) {
41 err = PTR_ERR(stream->stream);
42 goto out;
43 }
44
45 kfree(comp_opts);
46 mutex_init(&stream->mutex);
47 return stream;
48
49out:
50 kfree(stream);
51 return ERR_PTR(err);
52}
53
54void squashfs_decompressor_destroy(struct squashfs_sb_info *msblk)
55{
56 struct squashfs_stream *stream = msblk->stream;
57
58 if (stream) {
59 msblk->decompressor->free(stream->stream);
60 kfree(stream);
61 }
62}
63
64int squashfs_decompress(struct squashfs_sb_info *msblk, struct buffer_head **bh,
65 int b, int offset, int length, struct squashfs_page_actor *output)
66{
67 int res;
68 struct squashfs_stream *stream = msblk->stream;
69
70 mutex_lock(&stream->mutex);
71 res = msblk->decompressor->decompress(msblk, stream->stream, bh, b,
72 offset, length, output);
73 mutex_unlock(&stream->mutex);
74
75 if (res < 0)
76 ERROR("%s decompression failed, data probably corrupt\n",
77 msblk->decompressor->name);
78
79 return res;
80}
81
82int squashfs_max_decompressors(void)
83{
84 return 1;
85}
diff --git a/fs/squashfs/file.c b/fs/squashfs/file.c
index 8ca62c28fe12..e5c9689062ba 100644
--- a/fs/squashfs/file.c
+++ b/fs/squashfs/file.c
@@ -370,77 +370,15 @@ static int read_blocklist(struct inode *inode, int index, u64 *block)
370 return le32_to_cpu(size); 370 return le32_to_cpu(size);
371} 371}
372 372
373 373/* Copy data into page cache */
374static int squashfs_readpage(struct file *file, struct page *page) 374void squashfs_copy_cache(struct page *page, struct squashfs_cache_entry *buffer,
375 int bytes, int offset)
375{ 376{
376 struct inode *inode = page->mapping->host; 377 struct inode *inode = page->mapping->host;
377 struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info; 378 struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
378 int bytes, i, offset = 0, sparse = 0;
379 struct squashfs_cache_entry *buffer = NULL;
380 void *pageaddr; 379 void *pageaddr;
381 380 int i, mask = (1 << (msblk->block_log - PAGE_CACHE_SHIFT)) - 1;
382 int mask = (1 << (msblk->block_log - PAGE_CACHE_SHIFT)) - 1; 381 int start_index = page->index & ~mask, end_index = start_index | mask;
383 int index = page->index >> (msblk->block_log - PAGE_CACHE_SHIFT);
384 int start_index = page->index & ~mask;
385 int end_index = start_index | mask;
386 int file_end = i_size_read(inode) >> msblk->block_log;
387
388 TRACE("Entered squashfs_readpage, page index %lx, start block %llx\n",
389 page->index, squashfs_i(inode)->start);
390
391 if (page->index >= ((i_size_read(inode) + PAGE_CACHE_SIZE - 1) >>
392 PAGE_CACHE_SHIFT))
393 goto out;
394
395 if (index < file_end || squashfs_i(inode)->fragment_block ==
396 SQUASHFS_INVALID_BLK) {
397 /*
398 * Reading a datablock from disk. Need to read block list
399 * to get location and block size.
400 */
401 u64 block = 0;
402 int bsize = read_blocklist(inode, index, &block);
403 if (bsize < 0)
404 goto error_out;
405
406 if (bsize == 0) { /* hole */
407 bytes = index == file_end ?
408 (i_size_read(inode) & (msblk->block_size - 1)) :
409 msblk->block_size;
410 sparse = 1;
411 } else {
412 /*
413 * Read and decompress datablock.
414 */
415 buffer = squashfs_get_datablock(inode->i_sb,
416 block, bsize);
417 if (buffer->error) {
418 ERROR("Unable to read page, block %llx, size %x"
419 "\n", block, bsize);
420 squashfs_cache_put(buffer);
421 goto error_out;
422 }
423 bytes = buffer->length;
424 }
425 } else {
426 /*
427 * Datablock is stored inside a fragment (tail-end packed
428 * block).
429 */
430 buffer = squashfs_get_fragment(inode->i_sb,
431 squashfs_i(inode)->fragment_block,
432 squashfs_i(inode)->fragment_size);
433
434 if (buffer->error) {
435 ERROR("Unable to read page, block %llx, size %x\n",
436 squashfs_i(inode)->fragment_block,
437 squashfs_i(inode)->fragment_size);
438 squashfs_cache_put(buffer);
439 goto error_out;
440 }
441 bytes = i_size_read(inode) & (msblk->block_size - 1);
442 offset = squashfs_i(inode)->fragment_offset;
443 }
444 382
445 /* 383 /*
446 * Loop copying datablock into pages. As the datablock likely covers 384 * Loop copying datablock into pages. As the datablock likely covers
@@ -451,7 +389,7 @@ static int squashfs_readpage(struct file *file, struct page *page)
451 for (i = start_index; i <= end_index && bytes > 0; i++, 389 for (i = start_index; i <= end_index && bytes > 0; i++,
452 bytes -= PAGE_CACHE_SIZE, offset += PAGE_CACHE_SIZE) { 390 bytes -= PAGE_CACHE_SIZE, offset += PAGE_CACHE_SIZE) {
453 struct page *push_page; 391 struct page *push_page;
454 int avail = sparse ? 0 : min_t(int, bytes, PAGE_CACHE_SIZE); 392 int avail = buffer ? min_t(int, bytes, PAGE_CACHE_SIZE) : 0;
455 393
456 TRACE("bytes %d, i %d, available_bytes %d\n", bytes, i, avail); 394 TRACE("bytes %d, i %d, available_bytes %d\n", bytes, i, avail);
457 395
@@ -475,11 +413,75 @@ skip_page:
475 if (i != page->index) 413 if (i != page->index)
476 page_cache_release(push_page); 414 page_cache_release(push_page);
477 } 415 }
416}
417
418/* Read datablock stored packed inside a fragment (tail-end packed block) */
419static int squashfs_readpage_fragment(struct page *page)
420{
421 struct inode *inode = page->mapping->host;
422 struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
423 struct squashfs_cache_entry *buffer = squashfs_get_fragment(inode->i_sb,
424 squashfs_i(inode)->fragment_block,
425 squashfs_i(inode)->fragment_size);
426 int res = buffer->error;
427
428 if (res)
429 ERROR("Unable to read page, block %llx, size %x\n",
430 squashfs_i(inode)->fragment_block,
431 squashfs_i(inode)->fragment_size);
432 else
433 squashfs_copy_cache(page, buffer, i_size_read(inode) &
434 (msblk->block_size - 1),
435 squashfs_i(inode)->fragment_offset);
436
437 squashfs_cache_put(buffer);
438 return res;
439}
478 440
479 if (!sparse) 441static int squashfs_readpage_sparse(struct page *page, int index, int file_end)
480 squashfs_cache_put(buffer); 442{
443 struct inode *inode = page->mapping->host;
444 struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
445 int bytes = index == file_end ?
446 (i_size_read(inode) & (msblk->block_size - 1)) :
447 msblk->block_size;
481 448
449 squashfs_copy_cache(page, NULL, bytes, 0);
482 return 0; 450 return 0;
451}
452
453static int squashfs_readpage(struct file *file, struct page *page)
454{
455 struct inode *inode = page->mapping->host;
456 struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
457 int index = page->index >> (msblk->block_log - PAGE_CACHE_SHIFT);
458 int file_end = i_size_read(inode) >> msblk->block_log;
459 int res;
460 void *pageaddr;
461
462 TRACE("Entered squashfs_readpage, page index %lx, start block %llx\n",
463 page->index, squashfs_i(inode)->start);
464
465 if (page->index >= ((i_size_read(inode) + PAGE_CACHE_SIZE - 1) >>
466 PAGE_CACHE_SHIFT))
467 goto out;
468
469 if (index < file_end || squashfs_i(inode)->fragment_block ==
470 SQUASHFS_INVALID_BLK) {
471 u64 block = 0;
472 int bsize = read_blocklist(inode, index, &block);
473 if (bsize < 0)
474 goto error_out;
475
476 if (bsize == 0)
477 res = squashfs_readpage_sparse(page, index, file_end);
478 else
479 res = squashfs_readpage_block(page, block, bsize);
480 } else
481 res = squashfs_readpage_fragment(page);
482
483 if (!res)
484 return 0;
483 485
484error_out: 486error_out:
485 SetPageError(page); 487 SetPageError(page);
diff --git a/fs/squashfs/file_cache.c b/fs/squashfs/file_cache.c
new file mode 100644
index 000000000000..f2310d2a2019
--- /dev/null
+++ b/fs/squashfs/file_cache.c
@@ -0,0 +1,38 @@
1/*
2 * Copyright (c) 2013
3 * Phillip Lougher <phillip@squashfs.org.uk>
4 *
5 * This work is licensed under the terms of the GNU GPL, version 2. See
6 * the COPYING file in the top-level directory.
7 */
8
9#include <linux/fs.h>
10#include <linux/vfs.h>
11#include <linux/kernel.h>
12#include <linux/slab.h>
13#include <linux/string.h>
14#include <linux/pagemap.h>
15#include <linux/mutex.h>
16
17#include "squashfs_fs.h"
18#include "squashfs_fs_sb.h"
19#include "squashfs_fs_i.h"
20#include "squashfs.h"
21
22/* Read separately compressed datablock and memcopy into page cache */
23int squashfs_readpage_block(struct page *page, u64 block, int bsize)
24{
25 struct inode *i = page->mapping->host;
26 struct squashfs_cache_entry *buffer = squashfs_get_datablock(i->i_sb,
27 block, bsize);
28 int res = buffer->error;
29
30 if (res)
31 ERROR("Unable to read page, block %llx, size %x\n", block,
32 bsize);
33 else
34 squashfs_copy_cache(page, buffer, buffer->length, 0);
35
36 squashfs_cache_put(buffer);
37 return res;
38}
diff --git a/fs/squashfs/file_direct.c b/fs/squashfs/file_direct.c
new file mode 100644
index 000000000000..2943b2bfae48
--- /dev/null
+++ b/fs/squashfs/file_direct.c
@@ -0,0 +1,173 @@
1/*
2 * Copyright (c) 2013
3 * Phillip Lougher <phillip@squashfs.org.uk>
4 *
5 * This work is licensed under the terms of the GNU GPL, version 2. See
6 * the COPYING file in the top-level directory.
7 */
8
9#include <linux/fs.h>
10#include <linux/vfs.h>
11#include <linux/kernel.h>
12#include <linux/slab.h>
13#include <linux/string.h>
14#include <linux/pagemap.h>
15#include <linux/mutex.h>
16
17#include "squashfs_fs.h"
18#include "squashfs_fs_sb.h"
19#include "squashfs_fs_i.h"
20#include "squashfs.h"
21#include "page_actor.h"
22
23static int squashfs_read_cache(struct page *target_page, u64 block, int bsize,
24 int pages, struct page **page);
25
26/* Read separately compressed datablock directly into page cache */
27int squashfs_readpage_block(struct page *target_page, u64 block, int bsize)
28
29{
30 struct inode *inode = target_page->mapping->host;
31 struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
32
33 int file_end = (i_size_read(inode) - 1) >> PAGE_CACHE_SHIFT;
34 int mask = (1 << (msblk->block_log - PAGE_CACHE_SHIFT)) - 1;
35 int start_index = target_page->index & ~mask;
36 int end_index = start_index | mask;
37 int i, n, pages, missing_pages, bytes, res = -ENOMEM;
38 struct page **page;
39 struct squashfs_page_actor *actor;
40 void *pageaddr;
41
42 if (end_index > file_end)
43 end_index = file_end;
44
45 pages = end_index - start_index + 1;
46
47 page = kmalloc(sizeof(void *) * pages, GFP_KERNEL);
48 if (page == NULL)
49 return res;
50
51 /*
52 * Create a "page actor" which will kmap and kunmap the
53 * page cache pages appropriately within the decompressor
54 */
55 actor = squashfs_page_actor_init_special(page, pages, 0);
56 if (actor == NULL)
57 goto out;
58
59 /* Try to grab all the pages covered by the Squashfs block */
60 for (missing_pages = 0, i = 0, n = start_index; i < pages; i++, n++) {
61 page[i] = (n == target_page->index) ? target_page :
62 grab_cache_page_nowait(target_page->mapping, n);
63
64 if (page[i] == NULL) {
65 missing_pages++;
66 continue;
67 }
68
69 if (PageUptodate(page[i])) {
70 unlock_page(page[i]);
71 page_cache_release(page[i]);
72 page[i] = NULL;
73 missing_pages++;
74 }
75 }
76
77 if (missing_pages) {
78 /*
79 * Couldn't get one or more pages, this page has either
80 * been VM reclaimed, but others are still in the page cache
81 * and uptodate, or we're racing with another thread in
82 * squashfs_readpage also trying to grab them. Fall back to
83 * using an intermediate buffer.
84 */
85 res = squashfs_read_cache(target_page, block, bsize, pages,
86 page);
87 goto out;
88 }
89
90 /* Decompress directly into the page cache buffers */
91 res = squashfs_read_data(inode->i_sb, block, bsize, NULL, actor);
92 if (res < 0)
93 goto mark_errored;
94
95 /* Last page may have trailing bytes not filled */
96 bytes = res % PAGE_CACHE_SIZE;
97 if (bytes) {
98 pageaddr = kmap_atomic(page[pages - 1]);
99 memset(pageaddr + bytes, 0, PAGE_CACHE_SIZE - bytes);
100 kunmap_atomic(pageaddr);
101 }
102
103 /* Mark pages as uptodate, unlock and release */
104 for (i = 0; i < pages; i++) {
105 flush_dcache_page(page[i]);
106 SetPageUptodate(page[i]);
107 unlock_page(page[i]);
108 if (page[i] != target_page)
109 page_cache_release(page[i]);
110 }
111
112 kfree(actor);
113 kfree(page);
114
115 return 0;
116
117mark_errored:
118 /* Decompression failed, mark pages as errored. Target_page is
119 * dealt with by the caller
120 */
121 for (i = 0; i < pages; i++) {
122 if (page[i] == target_page)
123 continue;
124 flush_dcache_page(page[i]);
125 SetPageError(page[i]);
126 unlock_page(page[i]);
127 page_cache_release(page[i]);
128 }
129
130out:
131 kfree(actor);
132 kfree(page);
133 return res;
134}
135
136
137static int squashfs_read_cache(struct page *target_page, u64 block, int bsize,
138 int pages, struct page **page)
139{
140 struct inode *i = target_page->mapping->host;
141 struct squashfs_cache_entry *buffer = squashfs_get_datablock(i->i_sb,
142 block, bsize);
143 int bytes = buffer->length, res = buffer->error, n, offset = 0;
144 void *pageaddr;
145
146 if (res) {
147 ERROR("Unable to read page, block %llx, size %x\n", block,
148 bsize);
149 goto out;
150 }
151
152 for (n = 0; n < pages && bytes > 0; n++,
153 bytes -= PAGE_CACHE_SIZE, offset += PAGE_CACHE_SIZE) {
154 int avail = min_t(int, bytes, PAGE_CACHE_SIZE);
155
156 if (page[n] == NULL)
157 continue;
158
159 pageaddr = kmap_atomic(page[n]);
160 squashfs_copy_data(pageaddr, buffer, offset, avail);
161 memset(pageaddr + avail, 0, PAGE_CACHE_SIZE - avail);
162 kunmap_atomic(pageaddr);
163 flush_dcache_page(page[n]);
164 SetPageUptodate(page[n]);
165 unlock_page(page[n]);
166 if (page[n] != target_page)
167 page_cache_release(page[n]);
168 }
169
170out:
171 squashfs_cache_put(buffer);
172 return res;
173}
diff --git a/fs/squashfs/lzo_wrapper.c b/fs/squashfs/lzo_wrapper.c
index 00f4dfc5f088..244b9fbfff7b 100644
--- a/fs/squashfs/lzo_wrapper.c
+++ b/fs/squashfs/lzo_wrapper.c
@@ -31,13 +31,14 @@
31#include "squashfs_fs_sb.h" 31#include "squashfs_fs_sb.h"
32#include "squashfs.h" 32#include "squashfs.h"
33#include "decompressor.h" 33#include "decompressor.h"
34#include "page_actor.h"
34 35
35struct squashfs_lzo { 36struct squashfs_lzo {
36 void *input; 37 void *input;
37 void *output; 38 void *output;
38}; 39};
39 40
40static void *lzo_init(struct squashfs_sb_info *msblk, void *buff, int len) 41static void *lzo_init(struct squashfs_sb_info *msblk, void *buff)
41{ 42{
42 int block_size = max_t(int, msblk->block_size, SQUASHFS_METADATA_SIZE); 43 int block_size = max_t(int, msblk->block_size, SQUASHFS_METADATA_SIZE);
43 44
@@ -74,22 +75,16 @@ static void lzo_free(void *strm)
74} 75}
75 76
76 77
77static int lzo_uncompress(struct squashfs_sb_info *msblk, void **buffer, 78static int lzo_uncompress(struct squashfs_sb_info *msblk, void *strm,
78 struct buffer_head **bh, int b, int offset, int length, int srclength, 79 struct buffer_head **bh, int b, int offset, int length,
79 int pages) 80 struct squashfs_page_actor *output)
80{ 81{
81 struct squashfs_lzo *stream = msblk->stream; 82 struct squashfs_lzo *stream = strm;
82 void *buff = stream->input; 83 void *buff = stream->input, *data;
83 int avail, i, bytes = length, res; 84 int avail, i, bytes = length, res;
84 size_t out_len = srclength; 85 size_t out_len = output->length;
85
86 mutex_lock(&msblk->read_data_mutex);
87 86
88 for (i = 0; i < b; i++) { 87 for (i = 0; i < b; i++) {
89 wait_on_buffer(bh[i]);
90 if (!buffer_uptodate(bh[i]))
91 goto block_release;
92
93 avail = min(bytes, msblk->devblksize - offset); 88 avail = min(bytes, msblk->devblksize - offset);
94 memcpy(buff, bh[i]->b_data + offset, avail); 89 memcpy(buff, bh[i]->b_data + offset, avail);
95 buff += avail; 90 buff += avail;
@@ -104,24 +99,24 @@ static int lzo_uncompress(struct squashfs_sb_info *msblk, void **buffer,
104 goto failed; 99 goto failed;
105 100
106 res = bytes = (int)out_len; 101 res = bytes = (int)out_len;
107 for (i = 0, buff = stream->output; bytes && i < pages; i++) { 102 data = squashfs_first_page(output);
108 avail = min_t(int, bytes, PAGE_CACHE_SIZE); 103 buff = stream->output;
109 memcpy(buffer[i], buff, avail); 104 while (data) {
110 buff += avail; 105 if (bytes <= PAGE_CACHE_SIZE) {
111 bytes -= avail; 106 memcpy(data, buff, bytes);
107 break;
108 } else {
109 memcpy(data, buff, PAGE_CACHE_SIZE);
110 buff += PAGE_CACHE_SIZE;
111 bytes -= PAGE_CACHE_SIZE;
112 data = squashfs_next_page(output);
113 }
112 } 114 }
115 squashfs_finish_page(output);
113 116
114 mutex_unlock(&msblk->read_data_mutex);
115 return res; 117 return res;
116 118
117block_release:
118 for (; i < b; i++)
119 put_bh(bh[i]);
120
121failed: 119failed:
122 mutex_unlock(&msblk->read_data_mutex);
123
124 ERROR("lzo decompression failed, data probably corrupt\n");
125 return -EIO; 120 return -EIO;
126} 121}
127 122
diff --git a/fs/squashfs/page_actor.c b/fs/squashfs/page_actor.c
new file mode 100644
index 000000000000..5a1c11f56441
--- /dev/null
+++ b/fs/squashfs/page_actor.c
@@ -0,0 +1,100 @@
1/*
2 * Copyright (c) 2013
3 * Phillip Lougher <phillip@squashfs.org.uk>
4 *
5 * This work is licensed under the terms of the GNU GPL, version 2. See
6 * the COPYING file in the top-level directory.
7 */
8
9#include <linux/kernel.h>
10#include <linux/slab.h>
11#include <linux/pagemap.h>
12#include "page_actor.h"
13
14/*
15 * This file contains implementations of page_actor for decompressing into
16 * an intermediate buffer, and for decompressing directly into the
17 * page cache.
18 *
19 * Calling code should avoid sleeping between calls to squashfs_first_page()
20 * and squashfs_finish_page().
21 */
22
23/* Implementation of page_actor for decompressing into intermediate buffer */
24static void *cache_first_page(struct squashfs_page_actor *actor)
25{
26 actor->next_page = 1;
27 return actor->buffer[0];
28}
29
30static void *cache_next_page(struct squashfs_page_actor *actor)
31{
32 if (actor->next_page == actor->pages)
33 return NULL;
34
35 return actor->buffer[actor->next_page++];
36}
37
38static void cache_finish_page(struct squashfs_page_actor *actor)
39{
40 /* empty */
41}
42
43struct squashfs_page_actor *squashfs_page_actor_init(void **buffer,
44 int pages, int length)
45{
46 struct squashfs_page_actor *actor = kmalloc(sizeof(*actor), GFP_KERNEL);
47
48 if (actor == NULL)
49 return NULL;
50
51 actor->length = length ? : pages * PAGE_CACHE_SIZE;
52 actor->buffer = buffer;
53 actor->pages = pages;
54 actor->next_page = 0;
55 actor->squashfs_first_page = cache_first_page;
56 actor->squashfs_next_page = cache_next_page;
57 actor->squashfs_finish_page = cache_finish_page;
58 return actor;
59}
60
61/* Implementation of page_actor for decompressing directly into page cache. */
62static void *direct_first_page(struct squashfs_page_actor *actor)
63{
64 actor->next_page = 1;
65 return actor->pageaddr = kmap_atomic(actor->page[0]);
66}
67
68static void *direct_next_page(struct squashfs_page_actor *actor)
69{
70 if (actor->pageaddr)
71 kunmap_atomic(actor->pageaddr);
72
73 return actor->pageaddr = actor->next_page == actor->pages ? NULL :
74 kmap_atomic(actor->page[actor->next_page++]);
75}
76
77static void direct_finish_page(struct squashfs_page_actor *actor)
78{
79 if (actor->pageaddr)
80 kunmap_atomic(actor->pageaddr);
81}
82
83struct squashfs_page_actor *squashfs_page_actor_init_special(struct page **page,
84 int pages, int length)
85{
86 struct squashfs_page_actor *actor = kmalloc(sizeof(*actor), GFP_KERNEL);
87
88 if (actor == NULL)
89 return NULL;
90
91 actor->length = length ? : pages * PAGE_CACHE_SIZE;
92 actor->page = page;
93 actor->pages = pages;
94 actor->next_page = 0;
95 actor->pageaddr = NULL;
96 actor->squashfs_first_page = direct_first_page;
97 actor->squashfs_next_page = direct_next_page;
98 actor->squashfs_finish_page = direct_finish_page;
99 return actor;
100}
diff --git a/fs/squashfs/page_actor.h b/fs/squashfs/page_actor.h
new file mode 100644
index 000000000000..26dd82008b82
--- /dev/null
+++ b/fs/squashfs/page_actor.h
@@ -0,0 +1,81 @@
1#ifndef PAGE_ACTOR_H
2#define PAGE_ACTOR_H
3/*
4 * Copyright (c) 2013
5 * Phillip Lougher <phillip@squashfs.org.uk>
6 *
7 * This work is licensed under the terms of the GNU GPL, version 2. See
8 * the COPYING file in the top-level directory.
9 */
10
11#ifndef CONFIG_SQUASHFS_FILE_DIRECT
12struct squashfs_page_actor {
13 void **page;
14 int pages;
15 int length;
16 int next_page;
17};
18
19static inline struct squashfs_page_actor *squashfs_page_actor_init(void **page,
20 int pages, int length)
21{
22 struct squashfs_page_actor *actor = kmalloc(sizeof(*actor), GFP_KERNEL);
23
24 if (actor == NULL)
25 return NULL;
26
27 actor->length = length ? : pages * PAGE_CACHE_SIZE;
28 actor->page = page;
29 actor->pages = pages;
30 actor->next_page = 0;
31 return actor;
32}
33
34static inline void *squashfs_first_page(struct squashfs_page_actor *actor)
35{
36 actor->next_page = 1;
37 return actor->page[0];
38}
39
40static inline void *squashfs_next_page(struct squashfs_page_actor *actor)
41{
42 return actor->next_page == actor->pages ? NULL :
43 actor->page[actor->next_page++];
44}
45
46static inline void squashfs_finish_page(struct squashfs_page_actor *actor)
47{
48 /* empty */
49}
50#else
51struct squashfs_page_actor {
52 union {
53 void **buffer;
54 struct page **page;
55 };
56 void *pageaddr;
57 void *(*squashfs_first_page)(struct squashfs_page_actor *);
58 void *(*squashfs_next_page)(struct squashfs_page_actor *);
59 void (*squashfs_finish_page)(struct squashfs_page_actor *);
60 int pages;
61 int length;
62 int next_page;
63};
64
65extern struct squashfs_page_actor *squashfs_page_actor_init(void **, int, int);
66extern struct squashfs_page_actor *squashfs_page_actor_init_special(struct page
67 **, int, int);
68static inline void *squashfs_first_page(struct squashfs_page_actor *actor)
69{
70 return actor->squashfs_first_page(actor);
71}
72static inline void *squashfs_next_page(struct squashfs_page_actor *actor)
73{
74 return actor->squashfs_next_page(actor);
75}
76static inline void squashfs_finish_page(struct squashfs_page_actor *actor)
77{
78 actor->squashfs_finish_page(actor);
79}
80#endif
81#endif
diff --git a/fs/squashfs/squashfs.h b/fs/squashfs/squashfs.h
index d1266516ed08..9e1bb79f7e6f 100644
--- a/fs/squashfs/squashfs.h
+++ b/fs/squashfs/squashfs.h
@@ -28,8 +28,8 @@
28#define WARNING(s, args...) pr_warning("SQUASHFS: "s, ## args) 28#define WARNING(s, args...) pr_warning("SQUASHFS: "s, ## args)
29 29
30/* block.c */ 30/* block.c */
31extern int squashfs_read_data(struct super_block *, void **, u64, int, u64 *, 31extern int squashfs_read_data(struct super_block *, u64, int, u64 *,
32 int, int); 32 struct squashfs_page_actor *);
33 33
34/* cache.c */ 34/* cache.c */
35extern struct squashfs_cache *squashfs_cache_init(char *, int, int); 35extern struct squashfs_cache *squashfs_cache_init(char *, int, int);
@@ -48,7 +48,14 @@ extern void *squashfs_read_table(struct super_block *, u64, int);
48 48
49/* decompressor.c */ 49/* decompressor.c */
50extern const struct squashfs_decompressor *squashfs_lookup_decompressor(int); 50extern const struct squashfs_decompressor *squashfs_lookup_decompressor(int);
51extern void *squashfs_decompressor_init(struct super_block *, unsigned short); 51extern void *squashfs_decompressor_setup(struct super_block *, unsigned short);
52
53/* decompressor_xxx.c */
54extern void *squashfs_decompressor_create(struct squashfs_sb_info *, void *);
55extern void squashfs_decompressor_destroy(struct squashfs_sb_info *);
56extern int squashfs_decompress(struct squashfs_sb_info *, struct buffer_head **,
57 int, int, int, struct squashfs_page_actor *);
58extern int squashfs_max_decompressors(void);
52 59
53/* export.c */ 60/* export.c */
54extern __le64 *squashfs_read_inode_lookup_table(struct super_block *, u64, u64, 61extern __le64 *squashfs_read_inode_lookup_table(struct super_block *, u64, u64,
@@ -59,6 +66,13 @@ extern int squashfs_frag_lookup(struct super_block *, unsigned int, u64 *);
59extern __le64 *squashfs_read_fragment_index_table(struct super_block *, 66extern __le64 *squashfs_read_fragment_index_table(struct super_block *,
60 u64, u64, unsigned int); 67 u64, u64, unsigned int);
61 68
69/* file.c */
70void squashfs_copy_cache(struct page *, struct squashfs_cache_entry *, int,
71 int);
72
73/* file_xxx.c */
74extern int squashfs_readpage_block(struct page *, u64, int);
75
62/* id.c */ 76/* id.c */
63extern int squashfs_get_id(struct super_block *, unsigned int, unsigned int *); 77extern int squashfs_get_id(struct super_block *, unsigned int, unsigned int *);
64extern __le64 *squashfs_read_id_index_table(struct super_block *, u64, u64, 78extern __le64 *squashfs_read_id_index_table(struct super_block *, u64, u64,
diff --git a/fs/squashfs/squashfs_fs_sb.h b/fs/squashfs/squashfs_fs_sb.h
index 52934a22f296..1da565cb50c3 100644
--- a/fs/squashfs/squashfs_fs_sb.h
+++ b/fs/squashfs/squashfs_fs_sb.h
@@ -50,6 +50,7 @@ struct squashfs_cache_entry {
50 wait_queue_head_t wait_queue; 50 wait_queue_head_t wait_queue;
51 struct squashfs_cache *cache; 51 struct squashfs_cache *cache;
52 void **data; 52 void **data;
53 struct squashfs_page_actor *actor;
53}; 54};
54 55
55struct squashfs_sb_info { 56struct squashfs_sb_info {
@@ -63,10 +64,9 @@ struct squashfs_sb_info {
63 __le64 *id_table; 64 __le64 *id_table;
64 __le64 *fragment_index; 65 __le64 *fragment_index;
65 __le64 *xattr_id_table; 66 __le64 *xattr_id_table;
66 struct mutex read_data_mutex;
67 struct mutex meta_index_mutex; 67 struct mutex meta_index_mutex;
68 struct meta_index *meta_index; 68 struct meta_index *meta_index;
69 void *stream; 69 struct squashfs_stream *stream;
70 __le64 *inode_lookup_table; 70 __le64 *inode_lookup_table;
71 u64 inode_table; 71 u64 inode_table;
72 u64 directory_table; 72 u64 directory_table;
diff --git a/fs/squashfs/super.c b/fs/squashfs/super.c
index 60553a9053ca..202df6312d4e 100644
--- a/fs/squashfs/super.c
+++ b/fs/squashfs/super.c
@@ -98,7 +98,6 @@ static int squashfs_fill_super(struct super_block *sb, void *data, int silent)
98 msblk->devblksize = sb_min_blocksize(sb, SQUASHFS_DEVBLK_SIZE); 98 msblk->devblksize = sb_min_blocksize(sb, SQUASHFS_DEVBLK_SIZE);
99 msblk->devblksize_log2 = ffz(~msblk->devblksize); 99 msblk->devblksize_log2 = ffz(~msblk->devblksize);
100 100
101 mutex_init(&msblk->read_data_mutex);
102 mutex_init(&msblk->meta_index_mutex); 101 mutex_init(&msblk->meta_index_mutex);
103 102
104 /* 103 /*
@@ -206,13 +205,14 @@ static int squashfs_fill_super(struct super_block *sb, void *data, int silent)
206 goto failed_mount; 205 goto failed_mount;
207 206
208 /* Allocate read_page block */ 207 /* Allocate read_page block */
209 msblk->read_page = squashfs_cache_init("data", 1, msblk->block_size); 208 msblk->read_page = squashfs_cache_init("data",
209 squashfs_max_decompressors(), msblk->block_size);
210 if (msblk->read_page == NULL) { 210 if (msblk->read_page == NULL) {
211 ERROR("Failed to allocate read_page block\n"); 211 ERROR("Failed to allocate read_page block\n");
212 goto failed_mount; 212 goto failed_mount;
213 } 213 }
214 214
215 msblk->stream = squashfs_decompressor_init(sb, flags); 215 msblk->stream = squashfs_decompressor_setup(sb, flags);
216 if (IS_ERR(msblk->stream)) { 216 if (IS_ERR(msblk->stream)) {
217 err = PTR_ERR(msblk->stream); 217 err = PTR_ERR(msblk->stream);
218 msblk->stream = NULL; 218 msblk->stream = NULL;
@@ -336,7 +336,7 @@ failed_mount:
336 squashfs_cache_delete(msblk->block_cache); 336 squashfs_cache_delete(msblk->block_cache);
337 squashfs_cache_delete(msblk->fragment_cache); 337 squashfs_cache_delete(msblk->fragment_cache);
338 squashfs_cache_delete(msblk->read_page); 338 squashfs_cache_delete(msblk->read_page);
339 squashfs_decompressor_free(msblk, msblk->stream); 339 squashfs_decompressor_destroy(msblk);
340 kfree(msblk->inode_lookup_table); 340 kfree(msblk->inode_lookup_table);
341 kfree(msblk->fragment_index); 341 kfree(msblk->fragment_index);
342 kfree(msblk->id_table); 342 kfree(msblk->id_table);
@@ -383,7 +383,7 @@ static void squashfs_put_super(struct super_block *sb)
383 squashfs_cache_delete(sbi->block_cache); 383 squashfs_cache_delete(sbi->block_cache);
384 squashfs_cache_delete(sbi->fragment_cache); 384 squashfs_cache_delete(sbi->fragment_cache);
385 squashfs_cache_delete(sbi->read_page); 385 squashfs_cache_delete(sbi->read_page);
386 squashfs_decompressor_free(sbi, sbi->stream); 386 squashfs_decompressor_destroy(sbi);
387 kfree(sbi->id_table); 387 kfree(sbi->id_table);
388 kfree(sbi->fragment_index); 388 kfree(sbi->fragment_index);
389 kfree(sbi->meta_index); 389 kfree(sbi->meta_index);
diff --git a/fs/squashfs/xz_wrapper.c b/fs/squashfs/xz_wrapper.c
index 1760b7d108f6..c609624e4b8a 100644
--- a/fs/squashfs/xz_wrapper.c
+++ b/fs/squashfs/xz_wrapper.c
@@ -32,44 +32,70 @@
32#include "squashfs_fs_sb.h" 32#include "squashfs_fs_sb.h"
33#include "squashfs.h" 33#include "squashfs.h"
34#include "decompressor.h" 34#include "decompressor.h"
35#include "page_actor.h"
35 36
36struct squashfs_xz { 37struct squashfs_xz {
37 struct xz_dec *state; 38 struct xz_dec *state;
38 struct xz_buf buf; 39 struct xz_buf buf;
39}; 40};
40 41
41struct comp_opts { 42struct disk_comp_opts {
42 __le32 dictionary_size; 43 __le32 dictionary_size;
43 __le32 flags; 44 __le32 flags;
44}; 45};
45 46
46static void *squashfs_xz_init(struct squashfs_sb_info *msblk, void *buff, 47struct comp_opts {
47 int len) 48 int dict_size;
49};
50
51static void *squashfs_xz_comp_opts(struct squashfs_sb_info *msblk,
52 void *buff, int len)
48{ 53{
49 struct comp_opts *comp_opts = buff; 54 struct disk_comp_opts *comp_opts = buff;
50 struct squashfs_xz *stream; 55 struct comp_opts *opts;
51 int dict_size = msblk->block_size; 56 int err = 0, n;
52 int err, n; 57
58 opts = kmalloc(sizeof(*opts), GFP_KERNEL);
59 if (opts == NULL) {
60 err = -ENOMEM;
61 goto out2;
62 }
53 63
54 if (comp_opts) { 64 if (comp_opts) {
55 /* check compressor options are the expected length */ 65 /* check compressor options are the expected length */
56 if (len < sizeof(*comp_opts)) { 66 if (len < sizeof(*comp_opts)) {
57 err = -EIO; 67 err = -EIO;
58 goto failed; 68 goto out;
59 } 69 }
60 70
61 dict_size = le32_to_cpu(comp_opts->dictionary_size); 71 opts->dict_size = le32_to_cpu(comp_opts->dictionary_size);
62 72
63 /* the dictionary size should be 2^n or 2^n+2^(n+1) */ 73 /* the dictionary size should be 2^n or 2^n+2^(n+1) */
64 n = ffs(dict_size) - 1; 74 n = ffs(opts->dict_size) - 1;
65 if (dict_size != (1 << n) && dict_size != (1 << n) + 75 if (opts->dict_size != (1 << n) && opts->dict_size != (1 << n) +
66 (1 << (n + 1))) { 76 (1 << (n + 1))) {
67 err = -EIO; 77 err = -EIO;
68 goto failed; 78 goto out;
69 } 79 }
70 } 80 } else
81 /* use defaults */
82 opts->dict_size = max_t(int, msblk->block_size,
83 SQUASHFS_METADATA_SIZE);
84
85 return opts;
86
87out:
88 kfree(opts);
89out2:
90 return ERR_PTR(err);
91}
92
71 93
72 dict_size = max_t(int, dict_size, SQUASHFS_METADATA_SIZE); 94static void *squashfs_xz_init(struct squashfs_sb_info *msblk, void *buff)
95{
96 struct comp_opts *comp_opts = buff;
97 struct squashfs_xz *stream;
98 int err;
73 99
74 stream = kmalloc(sizeof(*stream), GFP_KERNEL); 100 stream = kmalloc(sizeof(*stream), GFP_KERNEL);
75 if (stream == NULL) { 101 if (stream == NULL) {
@@ -77,7 +103,7 @@ static void *squashfs_xz_init(struct squashfs_sb_info *msblk, void *buff,
77 goto failed; 103 goto failed;
78 } 104 }
79 105
80 stream->state = xz_dec_init(XZ_PREALLOC, dict_size); 106 stream->state = xz_dec_init(XZ_PREALLOC, comp_opts->dict_size);
81 if (stream->state == NULL) { 107 if (stream->state == NULL) {
82 kfree(stream); 108 kfree(stream);
83 err = -ENOMEM; 109 err = -ENOMEM;
@@ -103,42 +129,37 @@ static void squashfs_xz_free(void *strm)
103} 129}
104 130
105 131
106static int squashfs_xz_uncompress(struct squashfs_sb_info *msblk, void **buffer, 132static int squashfs_xz_uncompress(struct squashfs_sb_info *msblk, void *strm,
107 struct buffer_head **bh, int b, int offset, int length, int srclength, 133 struct buffer_head **bh, int b, int offset, int length,
108 int pages) 134 struct squashfs_page_actor *output)
109{ 135{
110 enum xz_ret xz_err; 136 enum xz_ret xz_err;
111 int avail, total = 0, k = 0, page = 0; 137 int avail, total = 0, k = 0;
112 struct squashfs_xz *stream = msblk->stream; 138 struct squashfs_xz *stream = strm;
113
114 mutex_lock(&msblk->read_data_mutex);
115 139
116 xz_dec_reset(stream->state); 140 xz_dec_reset(stream->state);
117 stream->buf.in_pos = 0; 141 stream->buf.in_pos = 0;
118 stream->buf.in_size = 0; 142 stream->buf.in_size = 0;
119 stream->buf.out_pos = 0; 143 stream->buf.out_pos = 0;
120 stream->buf.out_size = PAGE_CACHE_SIZE; 144 stream->buf.out_size = PAGE_CACHE_SIZE;
121 stream->buf.out = buffer[page++]; 145 stream->buf.out = squashfs_first_page(output);
122 146
123 do { 147 do {
124 if (stream->buf.in_pos == stream->buf.in_size && k < b) { 148 if (stream->buf.in_pos == stream->buf.in_size && k < b) {
125 avail = min(length, msblk->devblksize - offset); 149 avail = min(length, msblk->devblksize - offset);
126 length -= avail; 150 length -= avail;
127 wait_on_buffer(bh[k]);
128 if (!buffer_uptodate(bh[k]))
129 goto release_mutex;
130
131 stream->buf.in = bh[k]->b_data + offset; 151 stream->buf.in = bh[k]->b_data + offset;
132 stream->buf.in_size = avail; 152 stream->buf.in_size = avail;
133 stream->buf.in_pos = 0; 153 stream->buf.in_pos = 0;
134 offset = 0; 154 offset = 0;
135 } 155 }
136 156
137 if (stream->buf.out_pos == stream->buf.out_size 157 if (stream->buf.out_pos == stream->buf.out_size) {
138 && page < pages) { 158 stream->buf.out = squashfs_next_page(output);
139 stream->buf.out = buffer[page++]; 159 if (stream->buf.out != NULL) {
140 stream->buf.out_pos = 0; 160 stream->buf.out_pos = 0;
141 total += PAGE_CACHE_SIZE; 161 total += PAGE_CACHE_SIZE;
162 }
142 } 163 }
143 164
144 xz_err = xz_dec_run(stream->state, &stream->buf); 165 xz_err = xz_dec_run(stream->state, &stream->buf);
@@ -147,23 +168,14 @@ static int squashfs_xz_uncompress(struct squashfs_sb_info *msblk, void **buffer,
147 put_bh(bh[k++]); 168 put_bh(bh[k++]);
148 } while (xz_err == XZ_OK); 169 } while (xz_err == XZ_OK);
149 170
150 if (xz_err != XZ_STREAM_END) { 171 squashfs_finish_page(output);
151 ERROR("xz_dec_run error, data probably corrupt\n");
152 goto release_mutex;
153 }
154
155 if (k < b) {
156 ERROR("xz_uncompress error, input remaining\n");
157 goto release_mutex;
158 }
159 172
160 total += stream->buf.out_pos; 173 if (xz_err != XZ_STREAM_END || k < b)
161 mutex_unlock(&msblk->read_data_mutex); 174 goto out;
162 return total;
163 175
164release_mutex: 176 return total + stream->buf.out_pos;
165 mutex_unlock(&msblk->read_data_mutex);
166 177
178out:
167 for (; k < b; k++) 179 for (; k < b; k++)
168 put_bh(bh[k]); 180 put_bh(bh[k]);
169 181
@@ -172,6 +184,7 @@ release_mutex:
172 184
173const struct squashfs_decompressor squashfs_xz_comp_ops = { 185const struct squashfs_decompressor squashfs_xz_comp_ops = {
174 .init = squashfs_xz_init, 186 .init = squashfs_xz_init,
187 .comp_opts = squashfs_xz_comp_opts,
175 .free = squashfs_xz_free, 188 .free = squashfs_xz_free,
176 .decompress = squashfs_xz_uncompress, 189 .decompress = squashfs_xz_uncompress,
177 .id = XZ_COMPRESSION, 190 .id = XZ_COMPRESSION,
diff --git a/fs/squashfs/zlib_wrapper.c b/fs/squashfs/zlib_wrapper.c
index 55d918fd2d86..8727caba6882 100644
--- a/fs/squashfs/zlib_wrapper.c
+++ b/fs/squashfs/zlib_wrapper.c
@@ -32,8 +32,9 @@
32#include "squashfs_fs_sb.h" 32#include "squashfs_fs_sb.h"
33#include "squashfs.h" 33#include "squashfs.h"
34#include "decompressor.h" 34#include "decompressor.h"
35#include "page_actor.h"
35 36
36static void *zlib_init(struct squashfs_sb_info *dummy, void *buff, int len) 37static void *zlib_init(struct squashfs_sb_info *dummy, void *buff)
37{ 38{
38 z_stream *stream = kmalloc(sizeof(z_stream), GFP_KERNEL); 39 z_stream *stream = kmalloc(sizeof(z_stream), GFP_KERNEL);
39 if (stream == NULL) 40 if (stream == NULL)
@@ -61,44 +62,37 @@ static void zlib_free(void *strm)
61} 62}
62 63
63 64
64static int zlib_uncompress(struct squashfs_sb_info *msblk, void **buffer, 65static int zlib_uncompress(struct squashfs_sb_info *msblk, void *strm,
65 struct buffer_head **bh, int b, int offset, int length, int srclength, 66 struct buffer_head **bh, int b, int offset, int length,
66 int pages) 67 struct squashfs_page_actor *output)
67{ 68{
68 int zlib_err, zlib_init = 0; 69 int zlib_err, zlib_init = 0, k = 0;
69 int k = 0, page = 0; 70 z_stream *stream = strm;
70 z_stream *stream = msblk->stream;
71
72 mutex_lock(&msblk->read_data_mutex);
73 71
74 stream->avail_out = 0; 72 stream->avail_out = PAGE_CACHE_SIZE;
73 stream->next_out = squashfs_first_page(output);
75 stream->avail_in = 0; 74 stream->avail_in = 0;
76 75
77 do { 76 do {
78 if (stream->avail_in == 0 && k < b) { 77 if (stream->avail_in == 0 && k < b) {
79 int avail = min(length, msblk->devblksize - offset); 78 int avail = min(length, msblk->devblksize - offset);
80 length -= avail; 79 length -= avail;
81 wait_on_buffer(bh[k]);
82 if (!buffer_uptodate(bh[k]))
83 goto release_mutex;
84
85 stream->next_in = bh[k]->b_data + offset; 80 stream->next_in = bh[k]->b_data + offset;
86 stream->avail_in = avail; 81 stream->avail_in = avail;
87 offset = 0; 82 offset = 0;
88 } 83 }
89 84
90 if (stream->avail_out == 0 && page < pages) { 85 if (stream->avail_out == 0) {
91 stream->next_out = buffer[page++]; 86 stream->next_out = squashfs_next_page(output);
92 stream->avail_out = PAGE_CACHE_SIZE; 87 if (stream->next_out != NULL)
88 stream->avail_out = PAGE_CACHE_SIZE;
93 } 89 }
94 90
95 if (!zlib_init) { 91 if (!zlib_init) {
96 zlib_err = zlib_inflateInit(stream); 92 zlib_err = zlib_inflateInit(stream);
97 if (zlib_err != Z_OK) { 93 if (zlib_err != Z_OK) {
98 ERROR("zlib_inflateInit returned unexpected " 94 squashfs_finish_page(output);
99 "result 0x%x, srclength %d\n", 95 goto out;
100 zlib_err, srclength);
101 goto release_mutex;
102 } 96 }
103 zlib_init = 1; 97 zlib_init = 1;
104 } 98 }
@@ -109,29 +103,21 @@ static int zlib_uncompress(struct squashfs_sb_info *msblk, void **buffer,
109 put_bh(bh[k++]); 103 put_bh(bh[k++]);
110 } while (zlib_err == Z_OK); 104 } while (zlib_err == Z_OK);
111 105
112 if (zlib_err != Z_STREAM_END) { 106 squashfs_finish_page(output);
113 ERROR("zlib_inflate error, data probably corrupt\n");
114 goto release_mutex;
115 }
116 107
117 zlib_err = zlib_inflateEnd(stream); 108 if (zlib_err != Z_STREAM_END)
118 if (zlib_err != Z_OK) { 109 goto out;
119 ERROR("zlib_inflate error, data probably corrupt\n");
120 goto release_mutex;
121 }
122 110
123 if (k < b) { 111 zlib_err = zlib_inflateEnd(stream);
124 ERROR("zlib_uncompress error, data remaining\n"); 112 if (zlib_err != Z_OK)
125 goto release_mutex; 113 goto out;
126 }
127 114
128 length = stream->total_out; 115 if (k < b)
129 mutex_unlock(&msblk->read_data_mutex); 116 goto out;
130 return length;
131 117
132release_mutex: 118 return stream->total_out;
133 mutex_unlock(&msblk->read_data_mutex);
134 119
120out:
135 for (; k < b; k++) 121 for (; k < b; k++)
136 put_bh(bh[k]); 122 put_bh(bh[k]);
137 123
diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h
index 89c60b0f6408..7b2de026a4f3 100644
--- a/include/acpi/acpi_bus.h
+++ b/include/acpi/acpi_bus.h
@@ -431,9 +431,9 @@ static inline acpi_handle acpi_get_child(acpi_handle handle, u64 addr)
431{ 431{
432 return acpi_find_child(handle, addr, false); 432 return acpi_find_child(handle, addr, false);
433} 433}
434void acpi_preset_companion(struct device *dev, acpi_handle parent, u64 addr);
434int acpi_is_root_bridge(acpi_handle); 435int acpi_is_root_bridge(acpi_handle);
435struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle); 436struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle);
436#define DEVICE_ACPI_HANDLE(dev) ((acpi_handle)ACPI_HANDLE(dev))
437 437
438int acpi_enable_wakeup_device_power(struct acpi_device *dev, int state); 438int acpi_enable_wakeup_device_power(struct acpi_device *dev, int state);
439int acpi_disable_wakeup_device_power(struct acpi_device *dev); 439int acpi_disable_wakeup_device_power(struct acpi_device *dev);
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index b0972c4ce81c..d9099b15b472 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -44,6 +44,20 @@
44#include <acpi/acpi_numa.h> 44#include <acpi/acpi_numa.h>
45#include <asm/acpi.h> 45#include <asm/acpi.h>
46 46
47static inline acpi_handle acpi_device_handle(struct acpi_device *adev)
48{
49 return adev ? adev->handle : NULL;
50}
51
52#define ACPI_COMPANION(dev) ((dev)->acpi_node.companion)
53#define ACPI_COMPANION_SET(dev, adev) ACPI_COMPANION(dev) = (adev)
54#define ACPI_HANDLE(dev) acpi_device_handle(ACPI_COMPANION(dev))
55
56static inline const char *acpi_dev_name(struct acpi_device *adev)
57{
58 return dev_name(&adev->dev);
59}
60
47enum acpi_irq_model_id { 61enum acpi_irq_model_id {
48 ACPI_IRQ_MODEL_PIC = 0, 62 ACPI_IRQ_MODEL_PIC = 0,
49 ACPI_IRQ_MODEL_IOAPIC, 63 ACPI_IRQ_MODEL_IOAPIC,
@@ -401,6 +415,15 @@ static inline bool acpi_driver_match_device(struct device *dev,
401 415
402#define acpi_disabled 1 416#define acpi_disabled 1
403 417
418#define ACPI_COMPANION(dev) (NULL)
419#define ACPI_COMPANION_SET(dev, adev) do { } while (0)
420#define ACPI_HANDLE(dev) (NULL)
421
422static inline const char *acpi_dev_name(struct acpi_device *adev)
423{
424 return NULL;
425}
426
404static inline void acpi_early_init(void) { } 427static inline void acpi_early_init(void) { }
405 428
406static inline int early_acpi_boot_init(void) 429static inline int early_acpi_boot_init(void)
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index f26ec20f6354..1b135d49b279 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -505,6 +505,9 @@ struct request_queue {
505 (1 << QUEUE_FLAG_SAME_COMP) | \ 505 (1 << QUEUE_FLAG_SAME_COMP) | \
506 (1 << QUEUE_FLAG_ADD_RANDOM)) 506 (1 << QUEUE_FLAG_ADD_RANDOM))
507 507
508#define QUEUE_FLAG_MQ_DEFAULT ((1 << QUEUE_FLAG_IO_STAT) | \
509 (1 << QUEUE_FLAG_SAME_COMP))
510
508static inline void queue_lockdep_assert_held(struct request_queue *q) 511static inline void queue_lockdep_assert_held(struct request_queue *q)
509{ 512{
510 if (q->queue_lock) 513 if (q->queue_lock)
diff --git a/include/linux/device.h b/include/linux/device.h
index b025925df7f7..952b01033c32 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -644,9 +644,11 @@ struct device_dma_parameters {
644 unsigned long segment_boundary_mask; 644 unsigned long segment_boundary_mask;
645}; 645};
646 646
647struct acpi_device;
648
647struct acpi_dev_node { 649struct acpi_dev_node {
648#ifdef CONFIG_ACPI 650#ifdef CONFIG_ACPI
649 void *handle; 651 struct acpi_device *companion;
650#endif 652#endif
651}; 653};
652 654
@@ -790,14 +792,6 @@ static inline struct device *kobj_to_dev(struct kobject *kobj)
790 return container_of(kobj, struct device, kobj); 792 return container_of(kobj, struct device, kobj);
791} 793}
792 794
793#ifdef CONFIG_ACPI
794#define ACPI_HANDLE(dev) ((dev)->acpi_node.handle)
795#define ACPI_HANDLE_SET(dev, _handle_) (dev)->acpi_node.handle = (_handle_)
796#else
797#define ACPI_HANDLE(dev) (NULL)
798#define ACPI_HANDLE_SET(dev, _handle_) do { } while (0)
799#endif
800
801/* Get the wakeup routines, which depend on struct device */ 795/* Get the wakeup routines, which depend on struct device */
802#include <linux/pm_wakeup.h> 796#include <linux/pm_wakeup.h>
803 797
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 0bc727534108..41cf0c399288 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -45,13 +45,13 @@ static inline int dma_submit_error(dma_cookie_t cookie)
45 45
46/** 46/**
47 * enum dma_status - DMA transaction status 47 * enum dma_status - DMA transaction status
48 * @DMA_SUCCESS: transaction completed successfully 48 * @DMA_COMPLETE: transaction completed
49 * @DMA_IN_PROGRESS: transaction not yet processed 49 * @DMA_IN_PROGRESS: transaction not yet processed
50 * @DMA_PAUSED: transaction is paused 50 * @DMA_PAUSED: transaction is paused
51 * @DMA_ERROR: transaction failed 51 * @DMA_ERROR: transaction failed
52 */ 52 */
53enum dma_status { 53enum dma_status {
54 DMA_SUCCESS, 54 DMA_COMPLETE,
55 DMA_IN_PROGRESS, 55 DMA_IN_PROGRESS,
56 DMA_PAUSED, 56 DMA_PAUSED,
57 DMA_ERROR, 57 DMA_ERROR,
@@ -171,12 +171,6 @@ struct dma_interleaved_template {
171 * @DMA_CTRL_ACK - if clear, the descriptor cannot be reused until the client 171 * @DMA_CTRL_ACK - if clear, the descriptor cannot be reused until the client
172 * acknowledges receipt, i.e. has has a chance to establish any dependency 172 * acknowledges receipt, i.e. has has a chance to establish any dependency
173 * chains 173 * chains
174 * @DMA_COMPL_SKIP_SRC_UNMAP - set to disable dma-unmapping the source buffer(s)
175 * @DMA_COMPL_SKIP_DEST_UNMAP - set to disable dma-unmapping the destination(s)
176 * @DMA_COMPL_SRC_UNMAP_SINGLE - set to do the source dma-unmapping as single
177 * (if not set, do the source dma-unmapping as page)
178 * @DMA_COMPL_DEST_UNMAP_SINGLE - set to do the destination dma-unmapping as single
179 * (if not set, do the destination dma-unmapping as page)
180 * @DMA_PREP_PQ_DISABLE_P - prevent generation of P while generating Q 174 * @DMA_PREP_PQ_DISABLE_P - prevent generation of P while generating Q
181 * @DMA_PREP_PQ_DISABLE_Q - prevent generation of Q while generating P 175 * @DMA_PREP_PQ_DISABLE_Q - prevent generation of Q while generating P
182 * @DMA_PREP_CONTINUE - indicate to a driver that it is reusing buffers as 176 * @DMA_PREP_CONTINUE - indicate to a driver that it is reusing buffers as
@@ -188,14 +182,10 @@ struct dma_interleaved_template {
188enum dma_ctrl_flags { 182enum dma_ctrl_flags {
189 DMA_PREP_INTERRUPT = (1 << 0), 183 DMA_PREP_INTERRUPT = (1 << 0),
190 DMA_CTRL_ACK = (1 << 1), 184 DMA_CTRL_ACK = (1 << 1),
191 DMA_COMPL_SKIP_SRC_UNMAP = (1 << 2), 185 DMA_PREP_PQ_DISABLE_P = (1 << 2),
192 DMA_COMPL_SKIP_DEST_UNMAP = (1 << 3), 186 DMA_PREP_PQ_DISABLE_Q = (1 << 3),
193 DMA_COMPL_SRC_UNMAP_SINGLE = (1 << 4), 187 DMA_PREP_CONTINUE = (1 << 4),
194 DMA_COMPL_DEST_UNMAP_SINGLE = (1 << 5), 188 DMA_PREP_FENCE = (1 << 5),
195 DMA_PREP_PQ_DISABLE_P = (1 << 6),
196 DMA_PREP_PQ_DISABLE_Q = (1 << 7),
197 DMA_PREP_CONTINUE = (1 << 8),
198 DMA_PREP_FENCE = (1 << 9),
199}; 189};
200 190
201/** 191/**
@@ -413,6 +403,17 @@ void dma_chan_cleanup(struct kref *kref);
413typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param); 403typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);
414 404
415typedef void (*dma_async_tx_callback)(void *dma_async_param); 405typedef void (*dma_async_tx_callback)(void *dma_async_param);
406
407struct dmaengine_unmap_data {
408 u8 to_cnt;
409 u8 from_cnt;
410 u8 bidi_cnt;
411 struct device *dev;
412 struct kref kref;
413 size_t len;
414 dma_addr_t addr[0];
415};
416
416/** 417/**
417 * struct dma_async_tx_descriptor - async transaction descriptor 418 * struct dma_async_tx_descriptor - async transaction descriptor
418 * ---dma generic offload fields--- 419 * ---dma generic offload fields---
@@ -438,6 +439,7 @@ struct dma_async_tx_descriptor {
438 dma_cookie_t (*tx_submit)(struct dma_async_tx_descriptor *tx); 439 dma_cookie_t (*tx_submit)(struct dma_async_tx_descriptor *tx);
439 dma_async_tx_callback callback; 440 dma_async_tx_callback callback;
440 void *callback_param; 441 void *callback_param;
442 struct dmaengine_unmap_data *unmap;
441#ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH 443#ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
442 struct dma_async_tx_descriptor *next; 444 struct dma_async_tx_descriptor *next;
443 struct dma_async_tx_descriptor *parent; 445 struct dma_async_tx_descriptor *parent;
@@ -445,6 +447,40 @@ struct dma_async_tx_descriptor {
445#endif 447#endif
446}; 448};
447 449
450#ifdef CONFIG_DMA_ENGINE
451static inline void dma_set_unmap(struct dma_async_tx_descriptor *tx,
452 struct dmaengine_unmap_data *unmap)
453{
454 kref_get(&unmap->kref);
455 tx->unmap = unmap;
456}
457
458struct dmaengine_unmap_data *
459dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags);
460void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap);
461#else
462static inline void dma_set_unmap(struct dma_async_tx_descriptor *tx,
463 struct dmaengine_unmap_data *unmap)
464{
465}
466static inline struct dmaengine_unmap_data *
467dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
468{
469 return NULL;
470}
471static inline void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
472{
473}
474#endif
475
476static inline void dma_descriptor_unmap(struct dma_async_tx_descriptor *tx)
477{
478 if (tx->unmap) {
479 dmaengine_unmap_put(tx->unmap);
480 tx->unmap = NULL;
481 }
482}
483
448#ifndef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH 484#ifndef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
449static inline void txd_lock(struct dma_async_tx_descriptor *txd) 485static inline void txd_lock(struct dma_async_tx_descriptor *txd)
450{ 486{
@@ -979,10 +1015,10 @@ static inline enum dma_status dma_async_is_complete(dma_cookie_t cookie,
979{ 1015{
980 if (last_complete <= last_used) { 1016 if (last_complete <= last_used) {
981 if ((cookie <= last_complete) || (cookie > last_used)) 1017 if ((cookie <= last_complete) || (cookie > last_used))
982 return DMA_SUCCESS; 1018 return DMA_COMPLETE;
983 } else { 1019 } else {
984 if ((cookie <= last_complete) && (cookie > last_used)) 1020 if ((cookie <= last_complete) && (cookie > last_used))
985 return DMA_SUCCESS; 1021 return DMA_COMPLETE;
986 } 1022 }
987 return DMA_IN_PROGRESS; 1023 return DMA_IN_PROGRESS;
988} 1024}
@@ -1013,11 +1049,11 @@ static inline struct dma_chan *dma_find_channel(enum dma_transaction_type tx_typ
1013} 1049}
1014static inline enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) 1050static inline enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
1015{ 1051{
1016 return DMA_SUCCESS; 1052 return DMA_COMPLETE;
1017} 1053}
1018static inline enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) 1054static inline enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
1019{ 1055{
1020 return DMA_SUCCESS; 1056 return DMA_COMPLETE;
1021} 1057}
1022static inline void dma_issue_pending_all(void) 1058static inline void dma_issue_pending_all(void)
1023{ 1059{
diff --git a/include/linux/fs.h b/include/linux/fs.h
index bf5d574ebdf4..121f11f001c0 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -2622,7 +2622,9 @@ extern int simple_write_begin(struct file *file, struct address_space *mapping,
2622extern int simple_write_end(struct file *file, struct address_space *mapping, 2622extern int simple_write_end(struct file *file, struct address_space *mapping,
2623 loff_t pos, unsigned len, unsigned copied, 2623 loff_t pos, unsigned len, unsigned copied,
2624 struct page *page, void *fsdata); 2624 struct page *page, void *fsdata);
2625extern int always_delete_dentry(const struct dentry *);
2625extern struct inode *alloc_anon_inode(struct super_block *); 2626extern struct inode *alloc_anon_inode(struct super_block *);
2627extern const struct dentry_operations simple_dentry_operations;
2626 2628
2627extern struct dentry *simple_lookup(struct inode *, struct dentry *, unsigned int flags); 2629extern struct dentry *simple_lookup(struct inode *, struct dentry *, unsigned int flags);
2628extern ssize_t generic_read_dir(struct file *, char __user *, size_t, loff_t *); 2630extern ssize_t generic_read_dir(struct file *, char __user *, size_t, loff_t *);
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 0548eb201e05..1cedd000cf29 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -1318,7 +1318,6 @@ static inline pmd_t *pmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long a
1318 1318
1319#if USE_SPLIT_PTE_PTLOCKS 1319#if USE_SPLIT_PTE_PTLOCKS
1320#if BLOATED_SPINLOCKS 1320#if BLOATED_SPINLOCKS
1321void __init ptlock_cache_init(void);
1322extern bool ptlock_alloc(struct page *page); 1321extern bool ptlock_alloc(struct page *page);
1323extern void ptlock_free(struct page *page); 1322extern void ptlock_free(struct page *page);
1324 1323
@@ -1327,7 +1326,6 @@ static inline spinlock_t *ptlock_ptr(struct page *page)
1327 return page->ptl; 1326 return page->ptl;
1328} 1327}
1329#else /* BLOATED_SPINLOCKS */ 1328#else /* BLOATED_SPINLOCKS */
1330static inline void ptlock_cache_init(void) {}
1331static inline bool ptlock_alloc(struct page *page) 1329static inline bool ptlock_alloc(struct page *page)
1332{ 1330{
1333 return true; 1331 return true;
@@ -1380,17 +1378,10 @@ static inline spinlock_t *pte_lockptr(struct mm_struct *mm, pmd_t *pmd)
1380{ 1378{
1381 return &mm->page_table_lock; 1379 return &mm->page_table_lock;
1382} 1380}
1383static inline void ptlock_cache_init(void) {}
1384static inline bool ptlock_init(struct page *page) { return true; } 1381static inline bool ptlock_init(struct page *page) { return true; }
1385static inline void pte_lock_deinit(struct page *page) {} 1382static inline void pte_lock_deinit(struct page *page) {}
1386#endif /* USE_SPLIT_PTE_PTLOCKS */ 1383#endif /* USE_SPLIT_PTE_PTLOCKS */
1387 1384
1388static inline void pgtable_init(void)
1389{
1390 ptlock_cache_init();
1391 pgtable_cache_init();
1392}
1393
1394static inline bool pgtable_page_ctor(struct page *page) 1385static inline bool pgtable_page_ctor(struct page *page)
1395{ 1386{
1396 inc_zone_page_state(page, NR_PAGETABLE); 1387 inc_zone_page_state(page, NR_PAGETABLE);
diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h
index d006f0ca60f4..5a462c4e5009 100644
--- a/include/linux/pci-acpi.h
+++ b/include/linux/pci-acpi.h
@@ -27,7 +27,7 @@ static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
27 while (!pci_is_root_bus(pbus)) 27 while (!pci_is_root_bus(pbus))
28 pbus = pbus->parent; 28 pbus = pbus->parent;
29 29
30 return DEVICE_ACPI_HANDLE(pbus->bridge); 30 return ACPI_HANDLE(pbus->bridge);
31} 31}
32 32
33static inline acpi_handle acpi_pci_get_bridge_handle(struct pci_bus *pbus) 33static inline acpi_handle acpi_pci_get_bridge_handle(struct pci_bus *pbus)
@@ -39,7 +39,7 @@ static inline acpi_handle acpi_pci_get_bridge_handle(struct pci_bus *pbus)
39 else 39 else
40 dev = &pbus->self->dev; 40 dev = &pbus->self->dev;
41 41
42 return DEVICE_ACPI_HANDLE(dev); 42 return ACPI_HANDLE(dev);
43} 43}
44 44
45void acpi_pci_add_bus(struct pci_bus *bus); 45void acpi_pci_add_bus(struct pci_bus *bus);
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
index 179fb91bb5f2..f50821cb64be 100644
--- a/include/linux/platform_data/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -67,10 +67,10 @@ struct edmacc_param {
67#define ITCCHEN BIT(23) 67#define ITCCHEN BIT(23)
68 68
69/*ch_status paramater of callback function possible values*/ 69/*ch_status paramater of callback function possible values*/
70#define DMA_COMPLETE 1 70#define EDMA_DMA_COMPLETE 1
71#define DMA_CC_ERROR 2 71#define EDMA_DMA_CC_ERROR 2
72#define DMA_TC1_ERROR 3 72#define EDMA_DMA_TC1_ERROR 3
73#define DMA_TC2_ERROR 4 73#define EDMA_DMA_TC2_ERROR 4
74 74
75enum address_mode { 75enum address_mode {
76 INCR = 0, 76 INCR = 0,
diff --git a/include/linux/seqlock.h b/include/linux/seqlock.h
index 1e8a8b6e837d..cf87a24c0f92 100644
--- a/include/linux/seqlock.h
+++ b/include/linux/seqlock.h
@@ -354,6 +354,35 @@ static inline void read_sequnlock_excl(seqlock_t *sl)
354 spin_unlock(&sl->lock); 354 spin_unlock(&sl->lock);
355} 355}
356 356
357/**
358 * read_seqbegin_or_lock - begin a sequence number check or locking block
359 * @lock: sequence lock
360 * @seq : sequence number to be checked
361 *
362 * First try it once optimistically without taking the lock. If that fails,
363 * take the lock. The sequence number is also used as a marker for deciding
364 * whether to be a reader (even) or writer (odd).
365 * N.B. seq must be initialized to an even number to begin with.
366 */
367static inline void read_seqbegin_or_lock(seqlock_t *lock, int *seq)
368{
369 if (!(*seq & 1)) /* Even */
370 *seq = read_seqbegin(lock);
371 else /* Odd */
372 read_seqlock_excl(lock);
373}
374
375static inline int need_seqretry(seqlock_t *lock, int seq)
376{
377 return !(seq & 1) && read_seqretry(lock, seq);
378}
379
380static inline void done_seqretry(seqlock_t *lock, int seq)
381{
382 if (seq & 1)
383 read_sequnlock_excl(lock);
384}
385
357static inline void read_seqlock_excl_bh(seqlock_t *sl) 386static inline void read_seqlock_excl_bh(seqlock_t *sl)
358{ 387{
359 spin_lock_bh(&sl->lock); 388 spin_lock_bh(&sl->lock);
diff --git a/include/linux/wait.h b/include/linux/wait.h
index 61939ba30aa0..eaa00b10abaa 100644
--- a/include/linux/wait.h
+++ b/include/linux/wait.h
@@ -278,6 +278,31 @@ do { \
278 __ret; \ 278 __ret; \
279}) 279})
280 280
281#define __wait_event_cmd(wq, condition, cmd1, cmd2) \
282 (void)___wait_event(wq, condition, TASK_UNINTERRUPTIBLE, 0, 0, \
283 cmd1; schedule(); cmd2)
284
285/**
286 * wait_event_cmd - sleep until a condition gets true
287 * @wq: the waitqueue to wait on
288 * @condition: a C expression for the event to wait for
289 * cmd1: the command will be executed before sleep
290 * cmd2: the command will be executed after sleep
291 *
292 * The process is put to sleep (TASK_UNINTERRUPTIBLE) until the
293 * @condition evaluates to true. The @condition is checked each time
294 * the waitqueue @wq is woken up.
295 *
296 * wake_up() has to be called after changing any variable that could
297 * change the result of the wait condition.
298 */
299#define wait_event_cmd(wq, condition, cmd1, cmd2) \
300do { \
301 if (condition) \
302 break; \
303 __wait_event_cmd(wq, condition, cmd1, cmd2); \
304} while (0)
305
281#define __wait_event_interruptible(wq, condition) \ 306#define __wait_event_interruptible(wq, condition) \
282 ___wait_event(wq, condition, TASK_INTERRUPTIBLE, 0, 0, \ 307 ___wait_event(wq, condition, TASK_INTERRUPTIBLE, 0, 0, \
283 schedule()) 308 schedule())
diff --git a/include/uapi/linux/raid/md_p.h b/include/uapi/linux/raid/md_p.h
index fe1a5406d4d9..f7cf7f351144 100644
--- a/include/uapi/linux/raid/md_p.h
+++ b/include/uapi/linux/raid/md_p.h
@@ -16,6 +16,7 @@
16#define _MD_P_H 16#define _MD_P_H
17 17
18#include <linux/types.h> 18#include <linux/types.h>
19#include <asm/byteorder.h>
19 20
20/* 21/*
21 * RAID superblock. 22 * RAID superblock.
diff --git a/init/main.c b/init/main.c
index 01573fdfa186..febc511e078a 100644
--- a/init/main.c
+++ b/init/main.c
@@ -476,7 +476,7 @@ static void __init mm_init(void)
476 mem_init(); 476 mem_init();
477 kmem_cache_init(); 477 kmem_cache_init();
478 percpu_init_late(); 478 percpu_init_late();
479 pgtable_init(); 479 pgtable_cache_init();
480 vmalloc_init(); 480 vmalloc_init();
481} 481}
482 482
diff --git a/kernel/cgroup.c b/kernel/cgroup.c
index e0839bcd48c8..4c62513fe19f 100644
--- a/kernel/cgroup.c
+++ b/kernel/cgroup.c
@@ -895,11 +895,6 @@ static void cgroup_diput(struct dentry *dentry, struct inode *inode)
895 iput(inode); 895 iput(inode);
896} 896}
897 897
898static int cgroup_delete(const struct dentry *d)
899{
900 return 1;
901}
902
903static void remove_dir(struct dentry *d) 898static void remove_dir(struct dentry *d)
904{ 899{
905 struct dentry *parent = dget(d->d_parent); 900 struct dentry *parent = dget(d->d_parent);
@@ -1486,7 +1481,7 @@ static int cgroup_get_rootdir(struct super_block *sb)
1486{ 1481{
1487 static const struct dentry_operations cgroup_dops = { 1482 static const struct dentry_operations cgroup_dops = {
1488 .d_iput = cgroup_diput, 1483 .d_iput = cgroup_diput,
1489 .d_delete = cgroup_delete, 1484 .d_delete = always_delete_dentry,
1490 }; 1485 };
1491 1486
1492 struct inode *inode = 1487 struct inode *inode =
diff --git a/kernel/power/snapshot.c b/kernel/power/snapshot.c
index 10c22cae83a0..b38109e204af 100644
--- a/kernel/power/snapshot.c
+++ b/kernel/power/snapshot.c
@@ -792,7 +792,8 @@ void free_basic_memory_bitmaps(void)
792{ 792{
793 struct memory_bitmap *bm1, *bm2; 793 struct memory_bitmap *bm1, *bm2;
794 794
795 BUG_ON(!(forbidden_pages_map && free_pages_map)); 795 if (WARN_ON(!(forbidden_pages_map && free_pages_map)))
796 return;
796 797
797 bm1 = forbidden_pages_map; 798 bm1 = forbidden_pages_map;
798 bm2 = free_pages_map; 799 bm2 = free_pages_map;
diff --git a/kernel/power/user.c b/kernel/power/user.c
index 24850270c802..98d357584cd6 100644
--- a/kernel/power/user.c
+++ b/kernel/power/user.c
@@ -70,6 +70,7 @@ static int snapshot_open(struct inode *inode, struct file *filp)
70 data->swap = swsusp_resume_device ? 70 data->swap = swsusp_resume_device ?
71 swap_type_of(swsusp_resume_device, 0, NULL) : -1; 71 swap_type_of(swsusp_resume_device, 0, NULL) : -1;
72 data->mode = O_RDONLY; 72 data->mode = O_RDONLY;
73 data->free_bitmaps = false;
73 error = pm_notifier_call_chain(PM_HIBERNATION_PREPARE); 74 error = pm_notifier_call_chain(PM_HIBERNATION_PREPARE);
74 if (error) 75 if (error)
75 pm_notifier_call_chain(PM_POST_HIBERNATION); 76 pm_notifier_call_chain(PM_POST_HIBERNATION);
diff --git a/mm/memory.c b/mm/memory.c
index 0409e8f43fa0..5d9025f3b3e1 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -4272,13 +4272,6 @@ void copy_user_huge_page(struct page *dst, struct page *src,
4272#endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_HUGETLBFS */ 4272#endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_HUGETLBFS */
4273 4273
4274#if USE_SPLIT_PTE_PTLOCKS && BLOATED_SPINLOCKS 4274#if USE_SPLIT_PTE_PTLOCKS && BLOATED_SPINLOCKS
4275static struct kmem_cache *page_ptl_cachep;
4276void __init ptlock_cache_init(void)
4277{
4278 page_ptl_cachep = kmem_cache_create("page->ptl", sizeof(spinlock_t), 0,
4279 SLAB_PANIC, NULL);
4280}
4281
4282bool ptlock_alloc(struct page *page) 4275bool ptlock_alloc(struct page *page)
4283{ 4276{
4284 spinlock_t *ptl; 4277 spinlock_t *ptl;
diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index 3dc0c6cf02a8..c4638e6f0238 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -1425,7 +1425,7 @@ static void tcp_service_net_dma(struct sock *sk, bool wait)
1425 do { 1425 do {
1426 if (dma_async_is_tx_complete(tp->ucopy.dma_chan, 1426 if (dma_async_is_tx_complete(tp->ucopy.dma_chan,
1427 last_issued, &done, 1427 last_issued, &done,
1428 &used) == DMA_SUCCESS) { 1428 &used) == DMA_COMPLETE) {
1429 /* Safe to free early-copied skbs now */ 1429 /* Safe to free early-copied skbs now */
1430 __skb_queue_purge(&sk->sk_async_wait_queue); 1430 __skb_queue_purge(&sk->sk_async_wait_queue);
1431 break; 1431 break;
@@ -1433,7 +1433,7 @@ static void tcp_service_net_dma(struct sock *sk, bool wait)
1433 struct sk_buff *skb; 1433 struct sk_buff *skb;
1434 while ((skb = skb_peek(&sk->sk_async_wait_queue)) && 1434 while ((skb = skb_peek(&sk->sk_async_wait_queue)) &&
1435 (dma_async_is_complete(skb->dma_cookie, done, 1435 (dma_async_is_complete(skb->dma_cookie, done,
1436 used) == DMA_SUCCESS)) { 1436 used) == DMA_COMPLETE)) {
1437 __skb_dequeue(&sk->sk_async_wait_queue); 1437 __skb_dequeue(&sk->sk_async_wait_queue);
1438 kfree_skb(skb); 1438 kfree_skb(skb);
1439 } 1439 }
diff --git a/net/sunrpc/rpc_pipe.c b/net/sunrpc/rpc_pipe.c
index d0d14a04dce1..bf04b30a788a 100644
--- a/net/sunrpc/rpc_pipe.c
+++ b/net/sunrpc/rpc_pipe.c
@@ -471,15 +471,6 @@ struct rpc_filelist {
471 umode_t mode; 471 umode_t mode;
472}; 472};
473 473
474static int rpc_delete_dentry(const struct dentry *dentry)
475{
476 return 1;
477}
478
479static const struct dentry_operations rpc_dentry_operations = {
480 .d_delete = rpc_delete_dentry,
481};
482
483static struct inode * 474static struct inode *
484rpc_get_inode(struct super_block *sb, umode_t mode) 475rpc_get_inode(struct super_block *sb, umode_t mode)
485{ 476{
@@ -1266,7 +1257,7 @@ rpc_fill_super(struct super_block *sb, void *data, int silent)
1266 sb->s_blocksize_bits = PAGE_CACHE_SHIFT; 1257 sb->s_blocksize_bits = PAGE_CACHE_SHIFT;
1267 sb->s_magic = RPCAUTH_GSSMAGIC; 1258 sb->s_magic = RPCAUTH_GSSMAGIC;
1268 sb->s_op = &s_ops; 1259 sb->s_op = &s_ops;
1269 sb->s_d_op = &rpc_dentry_operations; 1260 sb->s_d_op = &simple_dentry_operations;
1270 sb->s_time_gran = 1; 1261 sb->s_time_gran = 1;
1271 1262
1272 inode = rpc_get_inode(sb, S_IFDIR | S_IRUGO | S_IXUGO); 1263 inode = rpc_get_inode(sb, S_IFDIR | S_IRUGO | S_IXUGO);
diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c
index fa64cd85204f..fb5d107f5603 100644
--- a/sound/soc/davinci/davinci-pcm.c
+++ b/sound/soc/davinci/davinci-pcm.c
@@ -238,7 +238,7 @@ static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data)
238 print_buf_info(prtd->ram_channel, "i ram_channel"); 238 print_buf_info(prtd->ram_channel, "i ram_channel");
239 pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status); 239 pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status);
240 240
241 if (unlikely(ch_status != DMA_COMPLETE)) 241 if (unlikely(ch_status != EDMA_DMA_COMPLETE))
242 return; 242 return;
243 243
244 if (snd_pcm_running(substream)) { 244 if (snd_pcm_running(substream)) {
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index fe702076ca46..9d77f13c2d25 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -2,7 +2,7 @@
2 * turbostat -- show CPU frequency and C-state residency 2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors. 3 * on modern Intel turbo-capable processors.
4 * 4 *
5 * Copyright (c) 2012 Intel Corporation. 5 * Copyright (c) 2013 Intel Corporation.
6 * Len Brown <len.brown@intel.com> 6 * Len Brown <len.brown@intel.com>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
@@ -47,6 +47,8 @@ unsigned int skip_c1;
47unsigned int do_nhm_cstates; 47unsigned int do_nhm_cstates;
48unsigned int do_snb_cstates; 48unsigned int do_snb_cstates;
49unsigned int do_c8_c9_c10; 49unsigned int do_c8_c9_c10;
50unsigned int do_slm_cstates;
51unsigned int use_c1_residency_msr;
50unsigned int has_aperf; 52unsigned int has_aperf;
51unsigned int has_epb; 53unsigned int has_epb;
52unsigned int units = 1000000000; /* Ghz etc */ 54unsigned int units = 1000000000; /* Ghz etc */
@@ -81,6 +83,8 @@ double rapl_joule_counter_range;
81#define RAPL_DRAM (1 << 3) 83#define RAPL_DRAM (1 << 3)
82#define RAPL_PKG_PERF_STATUS (1 << 4) 84#define RAPL_PKG_PERF_STATUS (1 << 4)
83#define RAPL_DRAM_PERF_STATUS (1 << 5) 85#define RAPL_DRAM_PERF_STATUS (1 << 5)
86#define RAPL_PKG_POWER_INFO (1 << 6)
87#define RAPL_CORE_POLICY (1 << 7)
84#define TJMAX_DEFAULT 100 88#define TJMAX_DEFAULT 100
85 89
86#define MAX(a, b) ((a) > (b) ? (a) : (b)) 90#define MAX(a, b) ((a) > (b) ? (a) : (b))
@@ -96,7 +100,7 @@ struct thread_data {
96 unsigned long long tsc; 100 unsigned long long tsc;
97 unsigned long long aperf; 101 unsigned long long aperf;
98 unsigned long long mperf; 102 unsigned long long mperf;
99 unsigned long long c1; /* derived */ 103 unsigned long long c1;
100 unsigned long long extra_msr64; 104 unsigned long long extra_msr64;
101 unsigned long long extra_delta64; 105 unsigned long long extra_delta64;
102 unsigned long long extra_msr32; 106 unsigned long long extra_msr32;
@@ -266,7 +270,7 @@ void print_header(void)
266 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64); 270 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
267 if (do_nhm_cstates) 271 if (do_nhm_cstates)
268 outp += sprintf(outp, " %%c1"); 272 outp += sprintf(outp, " %%c1");
269 if (do_nhm_cstates) 273 if (do_nhm_cstates && !do_slm_cstates)
270 outp += sprintf(outp, " %%c3"); 274 outp += sprintf(outp, " %%c3");
271 if (do_nhm_cstates) 275 if (do_nhm_cstates)
272 outp += sprintf(outp, " %%c6"); 276 outp += sprintf(outp, " %%c6");
@@ -280,9 +284,9 @@ void print_header(void)
280 284
281 if (do_snb_cstates) 285 if (do_snb_cstates)
282 outp += sprintf(outp, " %%pc2"); 286 outp += sprintf(outp, " %%pc2");
283 if (do_nhm_cstates) 287 if (do_nhm_cstates && !do_slm_cstates)
284 outp += sprintf(outp, " %%pc3"); 288 outp += sprintf(outp, " %%pc3");
285 if (do_nhm_cstates) 289 if (do_nhm_cstates && !do_slm_cstates)
286 outp += sprintf(outp, " %%pc6"); 290 outp += sprintf(outp, " %%pc6");
287 if (do_snb_cstates) 291 if (do_snb_cstates)
288 outp += sprintf(outp, " %%pc7"); 292 outp += sprintf(outp, " %%pc7");
@@ -480,7 +484,7 @@ int format_counters(struct thread_data *t, struct core_data *c,
480 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) 484 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
481 goto done; 485 goto done;
482 486
483 if (do_nhm_cstates) 487 if (do_nhm_cstates && !do_slm_cstates)
484 outp += sprintf(outp, " %6.2f", 100.0 * c->c3/t->tsc); 488 outp += sprintf(outp, " %6.2f", 100.0 * c->c3/t->tsc);
485 if (do_nhm_cstates) 489 if (do_nhm_cstates)
486 outp += sprintf(outp, " %6.2f", 100.0 * c->c6/t->tsc); 490 outp += sprintf(outp, " %6.2f", 100.0 * c->c6/t->tsc);
@@ -499,9 +503,9 @@ int format_counters(struct thread_data *t, struct core_data *c,
499 503
500 if (do_snb_cstates) 504 if (do_snb_cstates)
501 outp += sprintf(outp, " %6.2f", 100.0 * p->pc2/t->tsc); 505 outp += sprintf(outp, " %6.2f", 100.0 * p->pc2/t->tsc);
502 if (do_nhm_cstates) 506 if (do_nhm_cstates && !do_slm_cstates)
503 outp += sprintf(outp, " %6.2f", 100.0 * p->pc3/t->tsc); 507 outp += sprintf(outp, " %6.2f", 100.0 * p->pc3/t->tsc);
504 if (do_nhm_cstates) 508 if (do_nhm_cstates && !do_slm_cstates)
505 outp += sprintf(outp, " %6.2f", 100.0 * p->pc6/t->tsc); 509 outp += sprintf(outp, " %6.2f", 100.0 * p->pc6/t->tsc);
506 if (do_snb_cstates) 510 if (do_snb_cstates)
507 outp += sprintf(outp, " %6.2f", 100.0 * p->pc7/t->tsc); 511 outp += sprintf(outp, " %6.2f", 100.0 * p->pc7/t->tsc);
@@ -648,17 +652,24 @@ delta_thread(struct thread_data *new, struct thread_data *old,
648 } 652 }
649 653
650 654
651 /* 655 if (use_c1_residency_msr) {
652 * As counter collection is not atomic, 656 /*
653 * it is possible for mperf's non-halted cycles + idle states 657 * Some models have a dedicated C1 residency MSR,
654 * to exceed TSC's all cycles: show c1 = 0% in that case. 658 * which should be more accurate than the derivation below.
655 */ 659 */
656 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc) 660 } else {
657 old->c1 = 0; 661 /*
658 else { 662 * As counter collection is not atomic,
659 /* normal case, derive c1 */ 663 * it is possible for mperf's non-halted cycles + idle states
660 old->c1 = old->tsc - old->mperf - core_delta->c3 664 * to exceed TSC's all cycles: show c1 = 0% in that case.
665 */
666 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
667 old->c1 = 0;
668 else {
669 /* normal case, derive c1 */
670 old->c1 = old->tsc - old->mperf - core_delta->c3
661 - core_delta->c6 - core_delta->c7; 671 - core_delta->c6 - core_delta->c7;
672 }
662 } 673 }
663 674
664 if (old->mperf == 0) { 675 if (old->mperf == 0) {
@@ -872,13 +883,21 @@ int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
872 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64)) 883 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
873 return -5; 884 return -5;
874 885
886 if (use_c1_residency_msr) {
887 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
888 return -6;
889 }
890
875 /* collect core counters only for 1st thread in core */ 891 /* collect core counters only for 1st thread in core */
876 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) 892 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
877 return 0; 893 return 0;
878 894
879 if (do_nhm_cstates) { 895 if (do_nhm_cstates && !do_slm_cstates) {
880 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3)) 896 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
881 return -6; 897 return -6;
898 }
899
900 if (do_nhm_cstates) {
882 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6)) 901 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
883 return -7; 902 return -7;
884 } 903 }
@@ -898,7 +917,7 @@ int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
898 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) 917 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
899 return 0; 918 return 0;
900 919
901 if (do_nhm_cstates) { 920 if (do_nhm_cstates && !do_slm_cstates) {
902 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3)) 921 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
903 return -9; 922 return -9;
904 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6)) 923 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
@@ -977,7 +996,7 @@ void print_verbose_header(void)
977 ratio, bclk, ratio * bclk); 996 ratio, bclk, ratio * bclk);
978 997
979 get_msr(0, MSR_IA32_POWER_CTL, &msr); 998 get_msr(0, MSR_IA32_POWER_CTL, &msr);
980 fprintf(stderr, "cpu0: MSR_IA32_POWER_CTL: 0x%08llx (C1E: %sabled)\n", 999 fprintf(stderr, "cpu0: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
981 msr, msr & 0x2 ? "EN" : "DIS"); 1000 msr, msr & 0x2 ? "EN" : "DIS");
982 1001
983 if (!do_ivt_turbo_ratio_limit) 1002 if (!do_ivt_turbo_ratio_limit)
@@ -1046,25 +1065,28 @@ print_nhm_turbo_ratio_limits:
1046 1065
1047 switch(msr & 0x7) { 1066 switch(msr & 0x7) {
1048 case 0: 1067 case 0:
1049 fprintf(stderr, "pc0"); 1068 fprintf(stderr, do_slm_cstates ? "no pkg states" : "pc0");
1050 break; 1069 break;
1051 case 1: 1070 case 1:
1052 fprintf(stderr, do_snb_cstates ? "pc2" : "pc0"); 1071 fprintf(stderr, do_slm_cstates ? "no pkg states" : do_snb_cstates ? "pc2" : "pc0");
1053 break; 1072 break;
1054 case 2: 1073 case 2:
1055 fprintf(stderr, do_snb_cstates ? "pc6-noret" : "pc3"); 1074 fprintf(stderr, do_slm_cstates ? "invalid" : do_snb_cstates ? "pc6-noret" : "pc3");
1056 break; 1075 break;
1057 case 3: 1076 case 3:
1058 fprintf(stderr, "pc6"); 1077 fprintf(stderr, do_slm_cstates ? "invalid" : "pc6");
1059 break; 1078 break;
1060 case 4: 1079 case 4:
1061 fprintf(stderr, "pc7"); 1080 fprintf(stderr, do_slm_cstates ? "pc4" : "pc7");
1062 break; 1081 break;
1063 case 5: 1082 case 5:
1064 fprintf(stderr, do_snb_cstates ? "pc7s" : "invalid"); 1083 fprintf(stderr, do_slm_cstates ? "invalid" : do_snb_cstates ? "pc7s" : "invalid");
1084 break;
1085 case 6:
1086 fprintf(stderr, do_slm_cstates ? "pc6" : "invalid");
1065 break; 1087 break;
1066 case 7: 1088 case 7:
1067 fprintf(stderr, "unlimited"); 1089 fprintf(stderr, do_slm_cstates ? "pc7" : "unlimited");
1068 break; 1090 break;
1069 default: 1091 default:
1070 fprintf(stderr, "invalid"); 1092 fprintf(stderr, "invalid");
@@ -1460,6 +1482,8 @@ int has_nehalem_turbo_ratio_limit(unsigned int family, unsigned int model)
1460 case 0x3F: /* HSW */ 1482 case 0x3F: /* HSW */
1461 case 0x45: /* HSW */ 1483 case 0x45: /* HSW */
1462 case 0x46: /* HSW */ 1484 case 0x46: /* HSW */
1485 case 0x37: /* BYT */
1486 case 0x4D: /* AVN */
1463 return 1; 1487 return 1;
1464 case 0x2E: /* Nehalem-EX Xeon - Beckton */ 1488 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1465 case 0x2F: /* Westmere-EX Xeon - Eagleton */ 1489 case 0x2F: /* Westmere-EX Xeon - Eagleton */
@@ -1532,14 +1556,33 @@ int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1532#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */ 1556#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
1533#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */ 1557#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
1534 1558
1559double get_tdp(model)
1560{
1561 unsigned long long msr;
1562
1563 if (do_rapl & RAPL_PKG_POWER_INFO)
1564 if (!get_msr(0, MSR_PKG_POWER_INFO, &msr))
1565 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
1566
1567 switch (model) {
1568 case 0x37:
1569 case 0x4D:
1570 return 30.0;
1571 default:
1572 return 135.0;
1573 }
1574}
1575
1576
1535/* 1577/*
1536 * rapl_probe() 1578 * rapl_probe()
1537 * 1579 *
1538 * sets do_rapl 1580 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
1539 */ 1581 */
1540void rapl_probe(unsigned int family, unsigned int model) 1582void rapl_probe(unsigned int family, unsigned int model)
1541{ 1583{
1542 unsigned long long msr; 1584 unsigned long long msr;
1585 unsigned int time_unit;
1543 double tdp; 1586 double tdp;
1544 1587
1545 if (!genuine_intel) 1588 if (!genuine_intel)
@@ -1555,11 +1598,15 @@ void rapl_probe(unsigned int family, unsigned int model)
1555 case 0x3F: /* HSW */ 1598 case 0x3F: /* HSW */
1556 case 0x45: /* HSW */ 1599 case 0x45: /* HSW */
1557 case 0x46: /* HSW */ 1600 case 0x46: /* HSW */
1558 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_GFX; 1601 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
1559 break; 1602 break;
1560 case 0x2D: 1603 case 0x2D:
1561 case 0x3E: 1604 case 0x3E:
1562 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_DRAM | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS; 1605 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
1606 break;
1607 case 0x37: /* BYT */
1608 case 0x4D: /* AVN */
1609 do_rapl = RAPL_PKG | RAPL_CORES ;
1563 break; 1610 break;
1564 default: 1611 default:
1565 return; 1612 return;
@@ -1570,19 +1617,22 @@ void rapl_probe(unsigned int family, unsigned int model)
1570 return; 1617 return;
1571 1618
1572 rapl_power_units = 1.0 / (1 << (msr & 0xF)); 1619 rapl_power_units = 1.0 / (1 << (msr & 0xF));
1573 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F)); 1620 if (model == 0x37)
1574 rapl_time_units = 1.0 / (1 << (msr >> 16 & 0xF)); 1621 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
1622 else
1623 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
1575 1624
1576 /* get TDP to determine energy counter range */ 1625 time_unit = msr >> 16 & 0xF;
1577 if (get_msr(0, MSR_PKG_POWER_INFO, &msr)) 1626 if (time_unit == 0)
1578 return; 1627 time_unit = 0xA;
1579 1628
1580 tdp = ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units; 1629 rapl_time_units = 1.0 / (1 << (time_unit));
1581 1630
1582 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp; 1631 tdp = get_tdp(model);
1583 1632
1633 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
1584 if (verbose) 1634 if (verbose)
1585 fprintf(stderr, "RAPL: %.0f sec. Joule Counter Range\n", rapl_joule_counter_range); 1635 fprintf(stderr, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
1586 1636
1587 return; 1637 return;
1588} 1638}
@@ -1668,7 +1718,6 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1668{ 1718{
1669 unsigned long long msr; 1719 unsigned long long msr;
1670 int cpu; 1720 int cpu;
1671 double local_rapl_power_units, local_rapl_energy_units, local_rapl_time_units;
1672 1721
1673 if (!do_rapl) 1722 if (!do_rapl)
1674 return 0; 1723 return 0;
@@ -1686,23 +1735,13 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1686 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr)) 1735 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
1687 return -1; 1736 return -1;
1688 1737
1689 local_rapl_power_units = 1.0 / (1 << (msr & 0xF));
1690 local_rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
1691 local_rapl_time_units = 1.0 / (1 << (msr >> 16 & 0xF));
1692
1693 if (local_rapl_power_units != rapl_power_units)
1694 fprintf(stderr, "cpu%d, ERROR: Power units mis-match\n", cpu);
1695 if (local_rapl_energy_units != rapl_energy_units)
1696 fprintf(stderr, "cpu%d, ERROR: Energy units mis-match\n", cpu);
1697 if (local_rapl_time_units != rapl_time_units)
1698 fprintf(stderr, "cpu%d, ERROR: Time units mis-match\n", cpu);
1699
1700 if (verbose) { 1738 if (verbose) {
1701 fprintf(stderr, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx " 1739 fprintf(stderr, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
1702 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr, 1740 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
1703 local_rapl_power_units, local_rapl_energy_units, local_rapl_time_units); 1741 rapl_power_units, rapl_energy_units, rapl_time_units);
1704 } 1742 }
1705 if (do_rapl & RAPL_PKG) { 1743 if (do_rapl & RAPL_PKG_POWER_INFO) {
1744
1706 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr)) 1745 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
1707 return -5; 1746 return -5;
1708 1747
@@ -1714,6 +1753,9 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1714 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units, 1753 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
1715 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units); 1754 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
1716 1755
1756 }
1757 if (do_rapl & RAPL_PKG) {
1758
1717 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr)) 1759 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
1718 return -9; 1760 return -9;
1719 1761
@@ -1749,12 +1791,16 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1749 1791
1750 print_power_limit_msr(cpu, msr, "DRAM Limit"); 1792 print_power_limit_msr(cpu, msr, "DRAM Limit");
1751 } 1793 }
1752 if (do_rapl & RAPL_CORES) { 1794 if (do_rapl & RAPL_CORE_POLICY) {
1753 if (verbose) { 1795 if (verbose) {
1754 if (get_msr(cpu, MSR_PP0_POLICY, &msr)) 1796 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
1755 return -7; 1797 return -7;
1756 1798
1757 fprintf(stderr, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF); 1799 fprintf(stderr, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
1800 }
1801 }
1802 if (do_rapl & RAPL_CORES) {
1803 if (verbose) {
1758 1804
1759 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr)) 1805 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
1760 return -9; 1806 return -9;
@@ -1813,10 +1859,48 @@ int has_c8_c9_c10(unsigned int family, unsigned int model)
1813} 1859}
1814 1860
1815 1861
1862int is_slm(unsigned int family, unsigned int model)
1863{
1864 if (!genuine_intel)
1865 return 0;
1866 switch (model) {
1867 case 0x37: /* BYT */
1868 case 0x4D: /* AVN */
1869 return 1;
1870 }
1871 return 0;
1872}
1873
1874#define SLM_BCLK_FREQS 5
1875double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
1876
1877double slm_bclk(void)
1878{
1879 unsigned long long msr = 3;
1880 unsigned int i;
1881 double freq;
1882
1883 if (get_msr(0, MSR_FSB_FREQ, &msr))
1884 fprintf(stderr, "SLM BCLK: unknown\n");
1885
1886 i = msr & 0xf;
1887 if (i >= SLM_BCLK_FREQS) {
1888 fprintf(stderr, "SLM BCLK[%d] invalid\n", i);
1889 msr = 3;
1890 }
1891 freq = slm_freq_table[i];
1892
1893 fprintf(stderr, "SLM BCLK: %.1f Mhz\n", freq);
1894
1895 return freq;
1896}
1897
1816double discover_bclk(unsigned int family, unsigned int model) 1898double discover_bclk(unsigned int family, unsigned int model)
1817{ 1899{
1818 if (is_snb(family, model)) 1900 if (is_snb(family, model))
1819 return 100.00; 1901 return 100.00;
1902 else if (is_slm(family, model))
1903 return slm_bclk();
1820 else 1904 else
1821 return 133.33; 1905 return 133.33;
1822} 1906}
@@ -1873,7 +1957,7 @@ int set_temperature_target(struct thread_data *t, struct core_data *c, struct pk
1873 fprintf(stderr, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n", 1957 fprintf(stderr, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
1874 cpu, msr, target_c_local); 1958 cpu, msr, target_c_local);
1875 1959
1876 if (target_c_local < 85 || target_c_local > 120) 1960 if (target_c_local < 85 || target_c_local > 127)
1877 goto guess; 1961 goto guess;
1878 1962
1879 tcc_activation_temp = target_c_local; 1963 tcc_activation_temp = target_c_local;
@@ -1970,6 +2054,7 @@ void check_cpuid()
1970 do_smi = do_nhm_cstates; 2054 do_smi = do_nhm_cstates;
1971 do_snb_cstates = is_snb(family, model); 2055 do_snb_cstates = is_snb(family, model);
1972 do_c8_c9_c10 = has_c8_c9_c10(family, model); 2056 do_c8_c9_c10 = has_c8_c9_c10(family, model);
2057 do_slm_cstates = is_slm(family, model);
1973 bclk = discover_bclk(family, model); 2058 bclk = discover_bclk(family, model);
1974 2059
1975 do_nehalem_turbo_ratio_limit = has_nehalem_turbo_ratio_limit(family, model); 2060 do_nehalem_turbo_ratio_limit = has_nehalem_turbo_ratio_limit(family, model);
@@ -2331,7 +2416,7 @@ int main(int argc, char **argv)
2331 cmdline(argc, argv); 2416 cmdline(argc, argv);
2332 2417
2333 if (verbose) 2418 if (verbose)
2334 fprintf(stderr, "turbostat v3.4 April 17, 2013" 2419 fprintf(stderr, "turbostat v3.5 April 26, 2013"
2335 " - Len Brown <lenb@kernel.org>\n"); 2420 " - Len Brown <lenb@kernel.org>\n");
2336 2421
2337 turbostat_init(); 2422 turbostat_init();