diff options
| -rw-r--r-- | sound/soc/codecs/wm8962.c | 150 |
1 files changed, 75 insertions, 75 deletions
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 54379ee1cd0c..2bf9ee7c5407 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c | |||
| @@ -3242,7 +3242,7 @@ static void wm8962_free_beep(struct snd_soc_codec *codec) | |||
| 3242 | } | 3242 | } |
| 3243 | #endif | 3243 | #endif |
| 3244 | 3244 | ||
| 3245 | static void wm8962_set_gpio_mode(struct snd_soc_codec *codec, int gpio) | 3245 | static void wm8962_set_gpio_mode(struct wm8962_priv *wm8962, int gpio) |
| 3246 | { | 3246 | { |
| 3247 | int mask = 0; | 3247 | int mask = 0; |
| 3248 | int val = 0; | 3248 | int val = 0; |
| @@ -3263,8 +3263,8 @@ static void wm8962_set_gpio_mode(struct snd_soc_codec *codec, int gpio) | |||
| 3263 | } | 3263 | } |
| 3264 | 3264 | ||
| 3265 | if (mask) | 3265 | if (mask) |
| 3266 | snd_soc_update_bits(codec, WM8962_ANALOGUE_CLOCKING1, | 3266 | regmap_update_bits(wm8962->regmap, WM8962_ANALOGUE_CLOCKING1, |
| 3267 | mask, val); | 3267 | mask, val); |
| 3268 | } | 3268 | } |
| 3269 | 3269 | ||
| 3270 | #ifdef CONFIG_GPIOLIB | 3270 | #ifdef CONFIG_GPIOLIB |
| @@ -3276,7 +3276,6 @@ static inline struct wm8962_priv *gpio_to_wm8962(struct gpio_chip *chip) | |||
| 3276 | static int wm8962_gpio_request(struct gpio_chip *chip, unsigned offset) | 3276 | static int wm8962_gpio_request(struct gpio_chip *chip, unsigned offset) |
| 3277 | { | 3277 | { |
| 3278 | struct wm8962_priv *wm8962 = gpio_to_wm8962(chip); | 3278 | struct wm8962_priv *wm8962 = gpio_to_wm8962(chip); |
| 3279 | struct snd_soc_codec *codec = wm8962->codec; | ||
| 3280 | 3279 | ||
| 3281 | /* The WM8962 GPIOs aren't linearly numbered. For simplicity | 3280 | /* The WM8962 GPIOs aren't linearly numbered. For simplicity |
| 3282 | * we export linear numbers and error out if the unsupported | 3281 | * we export linear numbers and error out if the unsupported |
| @@ -3292,7 +3291,7 @@ static int wm8962_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
| 3292 | return -EINVAL; | 3291 | return -EINVAL; |
| 3293 | } | 3292 | } |
| 3294 | 3293 | ||
| 3295 | wm8962_set_gpio_mode(codec, offset + 1); | 3294 | wm8962_set_gpio_mode(wm8962, offset + 1); |
| 3296 | 3295 | ||
| 3297 | return 0; | 3296 | return 0; |
| 3298 | } | 3297 | } |
| @@ -3376,7 +3375,6 @@ static int wm8962_probe(struct snd_soc_codec *codec) | |||
| 3376 | { | 3375 | { |
| 3377 | int ret; | 3376 | int ret; |
| 3378 | struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); | 3377 | struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); |
| 3379 | struct wm8962_pdata *pdata = &wm8962->pdata; | ||
| 3380 | int i; | 3378 | int i; |
| 3381 | bool dmicclk, dmicdat; | 3379 | bool dmicclk, dmicdat; |
| 3382 | 3380 | ||
| @@ -3409,75 +3407,6 @@ static int wm8962_probe(struct snd_soc_codec *codec) | |||
| 3409 | } | 3407 | } |
| 3410 | } | 3408 | } |
| 3411 | 3409 | ||
| 3412 | /* SYSCLK defaults to on; make sure it is off so we can safely | ||
| 3413 | * write to registers if the device is declocked. | ||
| 3414 | */ | ||
| 3415 | snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_SYSCLK_ENA, 0); | ||
| 3416 | |||
| 3417 | /* Ensure we have soft control over all registers */ | ||
| 3418 | snd_soc_update_bits(codec, WM8962_CLOCKING2, | ||
| 3419 | WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); | ||
| 3420 | |||
| 3421 | /* Ensure that the oscillator and PLLs are disabled */ | ||
| 3422 | snd_soc_update_bits(codec, WM8962_PLL2, | ||
| 3423 | WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA, | ||
| 3424 | 0); | ||
| 3425 | |||
| 3426 | /* Apply static configuration for GPIOs */ | ||
| 3427 | for (i = 0; i < ARRAY_SIZE(pdata->gpio_init); i++) | ||
| 3428 | if (pdata->gpio_init[i]) { | ||
| 3429 | wm8962_set_gpio_mode(codec, i + 1); | ||
| 3430 | snd_soc_write(codec, 0x200 + i, | ||
| 3431 | pdata->gpio_init[i] & 0xffff); | ||
| 3432 | } | ||
| 3433 | |||
| 3434 | |||
| 3435 | /* Put the speakers into mono mode? */ | ||
| 3436 | if (pdata->spk_mono) | ||
| 3437 | snd_soc_update_bits(codec, WM8962_CLASS_D_CONTROL_2, | ||
| 3438 | WM8962_SPK_MONO_MASK, WM8962_SPK_MONO); | ||
| 3439 | |||
| 3440 | /* Micbias setup, detection enable and detection | ||
| 3441 | * threasholds. */ | ||
| 3442 | if (pdata->mic_cfg) | ||
| 3443 | snd_soc_update_bits(codec, WM8962_ADDITIONAL_CONTROL_4, | ||
| 3444 | WM8962_MICDET_ENA | | ||
| 3445 | WM8962_MICDET_THR_MASK | | ||
| 3446 | WM8962_MICSHORT_THR_MASK | | ||
| 3447 | WM8962_MICBIAS_LVL, | ||
| 3448 | pdata->mic_cfg); | ||
| 3449 | |||
| 3450 | /* Latch volume update bits */ | ||
| 3451 | snd_soc_update_bits(codec, WM8962_LEFT_INPUT_VOLUME, | ||
| 3452 | WM8962_IN_VU, WM8962_IN_VU); | ||
| 3453 | snd_soc_update_bits(codec, WM8962_RIGHT_INPUT_VOLUME, | ||
| 3454 | WM8962_IN_VU, WM8962_IN_VU); | ||
| 3455 | snd_soc_update_bits(codec, WM8962_LEFT_ADC_VOLUME, | ||
| 3456 | WM8962_ADC_VU, WM8962_ADC_VU); | ||
| 3457 | snd_soc_update_bits(codec, WM8962_RIGHT_ADC_VOLUME, | ||
| 3458 | WM8962_ADC_VU, WM8962_ADC_VU); | ||
| 3459 | snd_soc_update_bits(codec, WM8962_LEFT_DAC_VOLUME, | ||
| 3460 | WM8962_DAC_VU, WM8962_DAC_VU); | ||
| 3461 | snd_soc_update_bits(codec, WM8962_RIGHT_DAC_VOLUME, | ||
| 3462 | WM8962_DAC_VU, WM8962_DAC_VU); | ||
| 3463 | snd_soc_update_bits(codec, WM8962_SPKOUTL_VOLUME, | ||
| 3464 | WM8962_SPKOUT_VU, WM8962_SPKOUT_VU); | ||
| 3465 | snd_soc_update_bits(codec, WM8962_SPKOUTR_VOLUME, | ||
| 3466 | WM8962_SPKOUT_VU, WM8962_SPKOUT_VU); | ||
| 3467 | snd_soc_update_bits(codec, WM8962_HPOUTL_VOLUME, | ||
| 3468 | WM8962_HPOUT_VU, WM8962_HPOUT_VU); | ||
| 3469 | snd_soc_update_bits(codec, WM8962_HPOUTR_VOLUME, | ||
| 3470 | WM8962_HPOUT_VU, WM8962_HPOUT_VU); | ||
| 3471 | |||
| 3472 | /* Stereo control for EQ */ | ||
| 3473 | snd_soc_update_bits(codec, WM8962_EQ1, WM8962_EQ_SHARED_COEFF, 0); | ||
| 3474 | |||
| 3475 | /* Don't debouce interrupts so we don't need SYSCLK */ | ||
| 3476 | snd_soc_update_bits(codec, WM8962_IRQ_DEBOUNCE, | ||
| 3477 | WM8962_FLL_LOCK_DB | WM8962_PLL3_LOCK_DB | | ||
| 3478 | WM8962_PLL2_LOCK_DB | WM8962_TEMP_SHUT_DB, | ||
| 3479 | 0); | ||
| 3480 | |||
| 3481 | wm8962_add_widgets(codec); | 3410 | wm8962_add_widgets(codec); |
| 3482 | 3411 | ||
| 3483 | /* Save boards having to disable DMIC when not in use */ | 3412 | /* Save boards having to disable DMIC when not in use */ |
| @@ -3671,6 +3600,77 @@ static int wm8962_i2c_probe(struct i2c_client *i2c, | |||
| 3671 | goto err_enable; | 3600 | goto err_enable; |
| 3672 | } | 3601 | } |
| 3673 | 3602 | ||
| 3603 | /* SYSCLK defaults to on; make sure it is off so we can safely | ||
| 3604 | * write to registers if the device is declocked. | ||
| 3605 | */ | ||
| 3606 | regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2, | ||
| 3607 | WM8962_SYSCLK_ENA, 0); | ||
| 3608 | |||
| 3609 | /* Ensure we have soft control over all registers */ | ||
| 3610 | regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2, | ||
| 3611 | WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); | ||
| 3612 | |||
| 3613 | /* Ensure that the oscillator and PLLs are disabled */ | ||
| 3614 | regmap_update_bits(wm8962->regmap, WM8962_PLL2, | ||
| 3615 | WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA, | ||
| 3616 | 0); | ||
| 3617 | |||
| 3618 | /* Apply static configuration for GPIOs */ | ||
| 3619 | for (i = 0; i < ARRAY_SIZE(pdata->gpio_init); i++) | ||
| 3620 | if (pdata->gpio_init[i]) { | ||
| 3621 | wm8962_set_gpio_mode(wm8962, i + 1); | ||
| 3622 | regmap_write(wm8962->regmap, 0x200 + i, | ||
| 3623 | pdata->gpio_init[i] & 0xffff); | ||
| 3624 | } | ||
| 3625 | |||
| 3626 | |||
| 3627 | /* Put the speakers into mono mode? */ | ||
| 3628 | if (pdata->spk_mono) | ||
| 3629 | regmap_update_bits(wm8962->regmap, WM8962_CLASS_D_CONTROL_2, | ||
| 3630 | WM8962_SPK_MONO_MASK, WM8962_SPK_MONO); | ||
| 3631 | |||
| 3632 | /* Micbias setup, detection enable and detection | ||
| 3633 | * threasholds. */ | ||
| 3634 | if (pdata->mic_cfg) | ||
| 3635 | regmap_update_bits(wm8962->regmap, WM8962_ADDITIONAL_CONTROL_4, | ||
| 3636 | WM8962_MICDET_ENA | | ||
| 3637 | WM8962_MICDET_THR_MASK | | ||
| 3638 | WM8962_MICSHORT_THR_MASK | | ||
| 3639 | WM8962_MICBIAS_LVL, | ||
| 3640 | pdata->mic_cfg); | ||
| 3641 | |||
| 3642 | /* Latch volume update bits */ | ||
| 3643 | regmap_update_bits(wm8962->regmap, WM8962_LEFT_INPUT_VOLUME, | ||
| 3644 | WM8962_IN_VU, WM8962_IN_VU); | ||
| 3645 | regmap_update_bits(wm8962->regmap, WM8962_RIGHT_INPUT_VOLUME, | ||
| 3646 | WM8962_IN_VU, WM8962_IN_VU); | ||
| 3647 | regmap_update_bits(wm8962->regmap, WM8962_LEFT_ADC_VOLUME, | ||
| 3648 | WM8962_ADC_VU, WM8962_ADC_VU); | ||
| 3649 | regmap_update_bits(wm8962->regmap, WM8962_RIGHT_ADC_VOLUME, | ||
| 3650 | WM8962_ADC_VU, WM8962_ADC_VU); | ||
| 3651 | regmap_update_bits(wm8962->regmap, WM8962_LEFT_DAC_VOLUME, | ||
| 3652 | WM8962_DAC_VU, WM8962_DAC_VU); | ||
| 3653 | regmap_update_bits(wm8962->regmap, WM8962_RIGHT_DAC_VOLUME, | ||
| 3654 | WM8962_DAC_VU, WM8962_DAC_VU); | ||
| 3655 | regmap_update_bits(wm8962->regmap, WM8962_SPKOUTL_VOLUME, | ||
| 3656 | WM8962_SPKOUT_VU, WM8962_SPKOUT_VU); | ||
| 3657 | regmap_update_bits(wm8962->regmap, WM8962_SPKOUTR_VOLUME, | ||
| 3658 | WM8962_SPKOUT_VU, WM8962_SPKOUT_VU); | ||
| 3659 | regmap_update_bits(wm8962->regmap, WM8962_HPOUTL_VOLUME, | ||
| 3660 | WM8962_HPOUT_VU, WM8962_HPOUT_VU); | ||
| 3661 | regmap_update_bits(wm8962->regmap, WM8962_HPOUTR_VOLUME, | ||
| 3662 | WM8962_HPOUT_VU, WM8962_HPOUT_VU); | ||
| 3663 | |||
| 3664 | /* Stereo control for EQ */ | ||
| 3665 | regmap_update_bits(wm8962->regmap, WM8962_EQ1, | ||
| 3666 | WM8962_EQ_SHARED_COEFF, 0); | ||
| 3667 | |||
| 3668 | /* Don't debouce interrupts so we don't need SYSCLK */ | ||
| 3669 | regmap_update_bits(wm8962->regmap, WM8962_IRQ_DEBOUNCE, | ||
| 3670 | WM8962_FLL_LOCK_DB | WM8962_PLL3_LOCK_DB | | ||
| 3671 | WM8962_PLL2_LOCK_DB | WM8962_TEMP_SHUT_DB, | ||
| 3672 | 0); | ||
| 3673 | |||
| 3674 | if (wm8962->pdata.in4_dc_measure) { | 3674 | if (wm8962->pdata.in4_dc_measure) { |
| 3675 | ret = regmap_register_patch(wm8962->regmap, | 3675 | ret = regmap_register_patch(wm8962->regmap, |
| 3676 | wm8962_dc_measure, | 3676 | wm8962_dc_measure, |
