diff options
| -rw-r--r-- | arch/arm/boot/dts/sun6i-a31.dtsi | 27 |
1 files changed, 15 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index c1751a64889a..7f5878c2784a 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi | |||
| @@ -193,7 +193,10 @@ | |||
| 193 | pio: pinctrl@01c20800 { | 193 | pio: pinctrl@01c20800 { |
| 194 | compatible = "allwinner,sun6i-a31-pinctrl"; | 194 | compatible = "allwinner,sun6i-a31-pinctrl"; |
| 195 | reg = <0x01c20800 0x400>; | 195 | reg = <0x01c20800 0x400>; |
| 196 | interrupts = <0 11 1>, <0 15 1>, <0 16 1>, <0 17 1>; | 196 | interrupts = <0 11 4>, |
| 197 | <0 15 4>, | ||
| 198 | <0 16 4>, | ||
| 199 | <0 17 4>; | ||
| 197 | clocks = <&apb1_gates 5>; | 200 | clocks = <&apb1_gates 5>; |
| 198 | gpio-controller; | 201 | gpio-controller; |
| 199 | interrupt-controller; | 202 | interrupt-controller; |
| @@ -212,11 +215,11 @@ | |||
| 212 | timer@01c20c00 { | 215 | timer@01c20c00 { |
| 213 | compatible = "allwinner,sun4i-timer"; | 216 | compatible = "allwinner,sun4i-timer"; |
| 214 | reg = <0x01c20c00 0xa0>; | 217 | reg = <0x01c20c00 0xa0>; |
| 215 | interrupts = <0 18 1>, | 218 | interrupts = <0 18 4>, |
| 216 | <0 19 1>, | 219 | <0 19 4>, |
| 217 | <0 20 1>, | 220 | <0 20 4>, |
| 218 | <0 21 1>, | 221 | <0 21 4>, |
| 219 | <0 22 1>; | 222 | <0 22 4>; |
| 220 | clocks = <&osc24M>; | 223 | clocks = <&osc24M>; |
| 221 | }; | 224 | }; |
| 222 | 225 | ||
| @@ -228,7 +231,7 @@ | |||
| 228 | uart0: serial@01c28000 { | 231 | uart0: serial@01c28000 { |
| 229 | compatible = "snps,dw-apb-uart"; | 232 | compatible = "snps,dw-apb-uart"; |
| 230 | reg = <0x01c28000 0x400>; | 233 | reg = <0x01c28000 0x400>; |
| 231 | interrupts = <0 0 1>; | 234 | interrupts = <0 0 4>; |
| 232 | reg-shift = <2>; | 235 | reg-shift = <2>; |
| 233 | reg-io-width = <4>; | 236 | reg-io-width = <4>; |
| 234 | clocks = <&apb2_gates 16>; | 237 | clocks = <&apb2_gates 16>; |
| @@ -238,7 +241,7 @@ | |||
| 238 | uart1: serial@01c28400 { | 241 | uart1: serial@01c28400 { |
| 239 | compatible = "snps,dw-apb-uart"; | 242 | compatible = "snps,dw-apb-uart"; |
| 240 | reg = <0x01c28400 0x400>; | 243 | reg = <0x01c28400 0x400>; |
| 241 | interrupts = <0 1 1>; | 244 | interrupts = <0 1 4>; |
| 242 | reg-shift = <2>; | 245 | reg-shift = <2>; |
| 243 | reg-io-width = <4>; | 246 | reg-io-width = <4>; |
| 244 | clocks = <&apb2_gates 17>; | 247 | clocks = <&apb2_gates 17>; |
| @@ -248,7 +251,7 @@ | |||
| 248 | uart2: serial@01c28800 { | 251 | uart2: serial@01c28800 { |
| 249 | compatible = "snps,dw-apb-uart"; | 252 | compatible = "snps,dw-apb-uart"; |
| 250 | reg = <0x01c28800 0x400>; | 253 | reg = <0x01c28800 0x400>; |
| 251 | interrupts = <0 2 1>; | 254 | interrupts = <0 2 4>; |
| 252 | reg-shift = <2>; | 255 | reg-shift = <2>; |
| 253 | reg-io-width = <4>; | 256 | reg-io-width = <4>; |
| 254 | clocks = <&apb2_gates 18>; | 257 | clocks = <&apb2_gates 18>; |
| @@ -258,7 +261,7 @@ | |||
| 258 | uart3: serial@01c28c00 { | 261 | uart3: serial@01c28c00 { |
| 259 | compatible = "snps,dw-apb-uart"; | 262 | compatible = "snps,dw-apb-uart"; |
| 260 | reg = <0x01c28c00 0x400>; | 263 | reg = <0x01c28c00 0x400>; |
| 261 | interrupts = <0 3 1>; | 264 | interrupts = <0 3 4>; |
| 262 | reg-shift = <2>; | 265 | reg-shift = <2>; |
| 263 | reg-io-width = <4>; | 266 | reg-io-width = <4>; |
| 264 | clocks = <&apb2_gates 19>; | 267 | clocks = <&apb2_gates 19>; |
| @@ -268,7 +271,7 @@ | |||
| 268 | uart4: serial@01c29000 { | 271 | uart4: serial@01c29000 { |
| 269 | compatible = "snps,dw-apb-uart"; | 272 | compatible = "snps,dw-apb-uart"; |
| 270 | reg = <0x01c29000 0x400>; | 273 | reg = <0x01c29000 0x400>; |
| 271 | interrupts = <0 4 1>; | 274 | interrupts = <0 4 4>; |
| 272 | reg-shift = <2>; | 275 | reg-shift = <2>; |
| 273 | reg-io-width = <4>; | 276 | reg-io-width = <4>; |
| 274 | clocks = <&apb2_gates 20>; | 277 | clocks = <&apb2_gates 20>; |
| @@ -278,7 +281,7 @@ | |||
| 278 | uart5: serial@01c29400 { | 281 | uart5: serial@01c29400 { |
| 279 | compatible = "snps,dw-apb-uart"; | 282 | compatible = "snps,dw-apb-uart"; |
| 280 | reg = <0x01c29400 0x400>; | 283 | reg = <0x01c29400 0x400>; |
| 281 | interrupts = <0 5 1>; | 284 | interrupts = <0 5 4>; |
| 282 | reg-shift = <2>; | 285 | reg-shift = <2>; |
| 283 | reg-io-width = <4>; | 286 | reg-io-width = <4>; |
| 284 | clocks = <&apb2_gates 21>; | 287 | clocks = <&apb2_gates 21>; |
