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-rw-r--r--drivers/media/rc/meson-ir.c29
1 files changed, 24 insertions, 5 deletions
diff --git a/drivers/media/rc/meson-ir.c b/drivers/media/rc/meson-ir.c
index fcc3b82d1454..003fff07ade2 100644
--- a/drivers/media/rc/meson-ir.c
+++ b/drivers/media/rc/meson-ir.c
@@ -24,6 +24,7 @@
24 24
25#define DRIVER_NAME "meson-ir" 25#define DRIVER_NAME "meson-ir"
26 26
27/* valid on all Meson platforms */
27#define IR_DEC_LDR_ACTIVE 0x00 28#define IR_DEC_LDR_ACTIVE 0x00
28#define IR_DEC_LDR_IDLE 0x04 29#define IR_DEC_LDR_IDLE 0x04
29#define IR_DEC_LDR_REPEAT 0x08 30#define IR_DEC_LDR_REPEAT 0x08
@@ -32,12 +33,21 @@
32#define IR_DEC_FRAME 0x14 33#define IR_DEC_FRAME 0x14
33#define IR_DEC_STATUS 0x18 34#define IR_DEC_STATUS 0x18
34#define IR_DEC_REG1 0x1c 35#define IR_DEC_REG1 0x1c
36/* only available on Meson 8b and newer */
37#define IR_DEC_REG2 0x20
35 38
36#define REG0_RATE_MASK (BIT(11) - 1) 39#define REG0_RATE_MASK (BIT(11) - 1)
37 40
38#define REG1_MODE_MASK (BIT(7) | BIT(8)) 41#define DECODE_MODE_NEC 0x0
39#define REG1_MODE_NEC (0 << 7) 42#define DECODE_MODE_RAW 0x2
40#define REG1_MODE_GENERAL (2 << 7) 43
44/* Meson 6b uses REG1 to configure the mode */
45#define REG1_MODE_MASK GENMASK(8, 7)
46#define REG1_MODE_SHIFT 7
47
48/* Meson 8b / GXBB use REG2 to configure the mode */
49#define REG2_MODE_MASK GENMASK(3, 0)
50#define REG2_MODE_SHIFT 0
41 51
42#define REG1_TIME_IV_SHIFT 16 52#define REG1_TIME_IV_SHIFT 16
43#define REG1_TIME_IV_MASK ((BIT(13) - 1) << REG1_TIME_IV_SHIFT) 53#define REG1_TIME_IV_MASK ((BIT(13) - 1) << REG1_TIME_IV_SHIFT)
@@ -158,8 +168,15 @@ static int meson_ir_probe(struct platform_device *pdev)
158 /* Reset the decoder */ 168 /* Reset the decoder */
159 meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, REG1_RESET); 169 meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, REG1_RESET);
160 meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, 0); 170 meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, 0);
161 /* Set general operation mode */ 171
162 meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK, REG1_MODE_GENERAL); 172 /* Set general operation mode (= raw/software decoding) */
173 if (of_device_is_compatible(node, "amlogic,meson6-ir"))
174 meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK,
175 DECODE_MODE_RAW << REG1_MODE_SHIFT);
176 else
177 meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK,
178 DECODE_MODE_RAW << REG2_MODE_SHIFT);
179
163 /* Set rate */ 180 /* Set rate */
164 meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, MESON_TRATE - 1); 181 meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, MESON_TRATE - 1);
165 /* IRQ on rising and falling edges */ 182 /* IRQ on rising and falling edges */
@@ -197,6 +214,8 @@ static int meson_ir_remove(struct platform_device *pdev)
197 214
198static const struct of_device_id meson_ir_match[] = { 215static const struct of_device_id meson_ir_match[] = {
199 { .compatible = "amlogic,meson6-ir" }, 216 { .compatible = "amlogic,meson6-ir" },
217 { .compatible = "amlogic,meson8b-ir" },
218 { .compatible = "amlogic,meson-gxbb-ir" },
200 { }, 219 { },
201}; 220};
202 221