2 files changed, 53 insertions, 0 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 90542db1220d..39cd37f29aaf 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1186,6 +1186,32 @@ config ARM_ERRATA_773022
           loop buffer may deliver incorrect instructions. This
           workaround disables the loop buffer to avoid the erratum.
 
+config ARM_ERRATA_818325_852422
+        bool "ARM errata: A12: some seqs of opposed cond code instrs => deadlock or corruption"
+        depends on CPU_V7
+        help
+          This option enables the workaround for:
+          - Cortex-A12 818325: Execution of an UNPREDICTABLE STR or STM
+            instruction might deadlock.  Fixed in r0p1.
+          - Cortex-A12 852422: Execution of a sequence of instructions might
+            lead to either a data corruption or a CPU deadlock.  Not fixed in
+            any Cortex-A12 cores yet.
+          This workaround for all both errata involves setting bit[12] of the
+          Feature Register. This bit disables an optimisation applied to a
+          sequence of 2 instructions that use opposing condition codes.
+
+config ARM_ERRATA_852423
+        bool "ARM errata: A17: some seqs of opposed cond code instrs => deadlock or corruption"
+        depends on CPU_V7
+        help
+          This option enables the workaround for:
+          - Cortex-A17 852423: Execution of a sequence of instructions might
+            lead to either a data corruption or a CPU deadlock.  Not fixed in
+            any Cortex-A17 cores yet.
+          This is identical to Cortex-A12 erratum 852422.  It is a separate
+          config option from the A12 erratum due to the way errata are checked
+          for and handled.
+
 endmenu
 
 source "arch/arm/common/Kconfig"
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 6fcaac8e200f..b20b02e0b727 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -362,6 +362,23 @@ __ca15_errata:
 #endif
         b       __errata_finish
 
+__ca12_errata:
+#ifdef CONFIG_ARM_ERRATA_818325_852422
+        mrc     p15, 0, r10, c15, c0, 1         @ read diagnostic register
+        orr     r10, r10, #1 << 12              @ set bit #12
+        mcr     p15, 0, r10, c15, c0, 1         @ write diagnostic register
+#endif
+        b       __errata_finish
+
+__ca17_errata:
+#ifdef CONFIG_ARM_ERRATA_852423
+        cmp     r6, #0x12                       @ only present up to r1p2
+        mrcle   p15, 0, r10, c15, c0, 1         @ read diagnostic register
+        orrle   r10, r10, #1 << 12              @ set bit #12
+        mcrle   p15, 0, r10, c15, c0, 1         @ write diagnostic register
+#endif
+        b       __errata_finish
+
 __v7_pj4b_setup:
 #ifdef CONFIG_CPU_PJ4B
 
@@ -443,6 +460,16 @@ __v7_setup_cont:
         teq     r0, r10
         beq     __ca9_errata
 
+        /* Cortex-A12 Errata */
+        ldr     r10, =0x00000c0d                @ Cortex-A12 primary part number
+        teq     r0, r10
+        beq     __ca12_errata
+
+        /* Cortex-A17 Errata */
+        ldr     r10, =0x00000c0e                @ Cortex-A17 primary part number
+        teq     r0, r10
+        beq     __ca17_errata
+
         /* Cortex-A15 Errata */
         ldr     r10, =0x00000c0f                @ Cortex-A15 primary part number
         teq     r0, r10