diff options
| -rw-r--r-- | drivers/crypto/cavium/cpt/cptpf.h | 5 | ||||
| -rw-r--r-- | drivers/crypto/cavium/cpt/cptpf_main.c | 58 |
2 files changed, 10 insertions, 53 deletions
diff --git a/drivers/crypto/cavium/cpt/cptpf.h b/drivers/crypto/cavium/cpt/cptpf.h index 8a2a8e538da4..c0556c5f63c9 100644 --- a/drivers/crypto/cavium/cpt/cptpf.h +++ b/drivers/crypto/cavium/cpt/cptpf.h | |||
| @@ -51,11 +51,6 @@ struct cpt_device { | |||
| 51 | struct cpt_vf_info vfinfo[CPT_MAX_VF_NUM]; /* Per VF info */ | 51 | struct cpt_vf_info vfinfo[CPT_MAX_VF_NUM]; /* Per VF info */ |
| 52 | 52 | ||
| 53 | void __iomem *reg_base; /* Register start address */ | 53 | void __iomem *reg_base; /* Register start address */ |
| 54 | /* MSI-X */ | ||
| 55 | u8 num_vec; | ||
| 56 | bool msix_enabled; | ||
| 57 | struct msix_entry msix_entries[CPT_PF_MSIX_VECTORS]; | ||
| 58 | bool irq_allocated[CPT_PF_MSIX_VECTORS]; | ||
| 59 | struct pci_dev *pdev; /* pci device handle */ | 54 | struct pci_dev *pdev; /* pci device handle */ |
| 60 | 55 | ||
| 61 | struct microcode mcode[CPT_MAX_CORE_GROUPS]; | 56 | struct microcode mcode[CPT_MAX_CORE_GROUPS]; |
diff --git a/drivers/crypto/cavium/cpt/cptpf_main.c b/drivers/crypto/cavium/cpt/cptpf_main.c index 682d57a11a75..4119c40e7c4b 100644 --- a/drivers/crypto/cavium/cpt/cptpf_main.c +++ b/drivers/crypto/cavium/cpt/cptpf_main.c | |||
| @@ -332,26 +332,6 @@ static int cpt_ucode_load(struct cpt_device *cpt) | |||
| 332 | return ret; | 332 | return ret; |
| 333 | } | 333 | } |
| 334 | 334 | ||
| 335 | static int cpt_enable_msix(struct cpt_device *cpt) | ||
| 336 | { | ||
| 337 | int i, ret; | ||
| 338 | |||
| 339 | cpt->num_vec = CPT_PF_MSIX_VECTORS; | ||
| 340 | |||
| 341 | for (i = 0; i < cpt->num_vec; i++) | ||
| 342 | cpt->msix_entries[i].entry = i; | ||
| 343 | |||
| 344 | ret = pci_enable_msix(cpt->pdev, cpt->msix_entries, cpt->num_vec); | ||
| 345 | if (ret) { | ||
| 346 | dev_err(&cpt->pdev->dev, "Request for #%d msix vectors failed\n", | ||
| 347 | cpt->num_vec); | ||
| 348 | return ret; | ||
| 349 | } | ||
| 350 | |||
| 351 | cpt->msix_enabled = 1; | ||
| 352 | return 0; | ||
| 353 | } | ||
| 354 | |||
| 355 | static irqreturn_t cpt_mbx0_intr_handler(int irq, void *cpt_irq) | 335 | static irqreturn_t cpt_mbx0_intr_handler(int irq, void *cpt_irq) |
| 356 | { | 336 | { |
| 357 | struct cpt_device *cpt = (struct cpt_device *)cpt_irq; | 337 | struct cpt_device *cpt = (struct cpt_device *)cpt_irq; |
| @@ -361,26 +341,6 @@ static irqreturn_t cpt_mbx0_intr_handler(int irq, void *cpt_irq) | |||
| 361 | return IRQ_HANDLED; | 341 | return IRQ_HANDLED; |
| 362 | } | 342 | } |
| 363 | 343 | ||
| 364 | static void cpt_disable_msix(struct cpt_device *cpt) | ||
| 365 | { | ||
| 366 | if (cpt->msix_enabled) { | ||
| 367 | pci_disable_msix(cpt->pdev); | ||
| 368 | cpt->msix_enabled = 0; | ||
| 369 | cpt->num_vec = 0; | ||
| 370 | } | ||
| 371 | } | ||
| 372 | |||
| 373 | static void cpt_free_all_interrupts(struct cpt_device *cpt) | ||
| 374 | { | ||
| 375 | int irq; | ||
| 376 | |||
| 377 | for (irq = 0; irq < cpt->num_vec; irq++) { | ||
| 378 | if (cpt->irq_allocated[irq]) | ||
| 379 | free_irq(cpt->msix_entries[irq].vector, cpt); | ||
| 380 | cpt->irq_allocated[irq] = false; | ||
| 381 | } | ||
| 382 | } | ||
| 383 | |||
| 384 | static void cpt_reset(struct cpt_device *cpt) | 344 | static void cpt_reset(struct cpt_device *cpt) |
| 385 | { | 345 | { |
| 386 | cpt_write_csr64(cpt->reg_base, CPTX_PF_RESET(0), 1); | 346 | cpt_write_csr64(cpt->reg_base, CPTX_PF_RESET(0), 1); |
| @@ -506,32 +466,34 @@ static int cpt_register_interrupts(struct cpt_device *cpt) | |||
| 506 | struct device *dev = &cpt->pdev->dev; | 466 | struct device *dev = &cpt->pdev->dev; |
| 507 | 467 | ||
| 508 | /* Enable MSI-X */ | 468 | /* Enable MSI-X */ |
| 509 | ret = cpt_enable_msix(cpt); | 469 | ret = pci_alloc_irq_vectors(cpt->pdev, CPT_PF_MSIX_VECTORS, |
| 510 | if (ret) | 470 | CPT_PF_MSIX_VECTORS, PCI_IRQ_MSIX); |
| 471 | if (ret < 0) { | ||
| 472 | dev_err(&cpt->pdev->dev, "Request for #%d msix vectors failed\n", | ||
| 473 | CPT_PF_MSIX_VECTORS); | ||
| 511 | return ret; | 474 | return ret; |
| 475 | } | ||
| 512 | 476 | ||
| 513 | /* Register mailbox interrupt handlers */ | 477 | /* Register mailbox interrupt handlers */ |
| 514 | ret = request_irq(cpt->msix_entries[CPT_PF_INT_VEC_E_MBOXX(0)].vector, | 478 | ret = request_irq(pci_irq_vector(cpt->pdev, CPT_PF_INT_VEC_E_MBOXX(0)), |
| 515 | cpt_mbx0_intr_handler, 0, "CPT Mbox0", cpt); | 479 | cpt_mbx0_intr_handler, 0, "CPT Mbox0", cpt); |
| 516 | if (ret) | 480 | if (ret) |
| 517 | goto fail; | 481 | goto fail; |
| 518 | 482 | ||
| 519 | cpt->irq_allocated[CPT_PF_INT_VEC_E_MBOXX(0)] = true; | ||
| 520 | |||
| 521 | /* Enable mailbox interrupt */ | 483 | /* Enable mailbox interrupt */ |
| 522 | cpt_enable_mbox_interrupts(cpt); | 484 | cpt_enable_mbox_interrupts(cpt); |
| 523 | return 0; | 485 | return 0; |
| 524 | 486 | ||
| 525 | fail: | 487 | fail: |
| 526 | dev_err(dev, "Request irq failed\n"); | 488 | dev_err(dev, "Request irq failed\n"); |
| 527 | cpt_free_all_interrupts(cpt); | 489 | pci_disable_msix(cpt->pdev); |
| 528 | return ret; | 490 | return ret; |
| 529 | } | 491 | } |
| 530 | 492 | ||
| 531 | static void cpt_unregister_interrupts(struct cpt_device *cpt) | 493 | static void cpt_unregister_interrupts(struct cpt_device *cpt) |
| 532 | { | 494 | { |
| 533 | cpt_free_all_interrupts(cpt); | 495 | free_irq(pci_irq_vector(cpt->pdev, CPT_PF_INT_VEC_E_MBOXX(0)), cpt); |
| 534 | cpt_disable_msix(cpt); | 496 | pci_disable_msix(cpt->pdev); |
| 535 | } | 497 | } |
| 536 | 498 | ||
| 537 | static int cpt_sriov_init(struct cpt_device *cpt, int num_vfs) | 499 | static int cpt_sriov_init(struct cpt_device *cpt, int num_vfs) |
