aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/sh/drivers/pci/pcie-sh7786.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c
index 72a1d794a7ba..57abae2f6822 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.c
+++ b/arch/sh/drivers/pci/pcie-sh7786.c
@@ -41,73 +41,73 @@ static struct sh7786_pcie_hwops {
41 41
42static struct resource sh7786_pci0_resources[] = { 42static struct resource sh7786_pci0_resources[] = {
43 { 43 {
44 .name = "PCIe0 IO", 44 .name = "PCIe0 MEM 0",
45 .start = 0xfd000000, 45 .start = 0xfd000000,
46 .end = 0xfd000000 + SZ_8M - 1, 46 .end = 0xfd000000 + SZ_8M - 1,
47 .flags = IORESOURCE_IO, 47 .flags = IORESOURCE_MEM,
48 }, { 48 }, {
49 .name = "PCIe0 MEM 0", 49 .name = "PCIe0 MEM 1",
50 .start = 0xc0000000, 50 .start = 0xc0000000,
51 .end = 0xc0000000 + SZ_512M - 1, 51 .end = 0xc0000000 + SZ_512M - 1,
52 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT, 52 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
53 }, { 53 }, {
54 .name = "PCIe0 MEM 1", 54 .name = "PCIe0 MEM 2",
55 .start = 0x10000000, 55 .start = 0x10000000,
56 .end = 0x10000000 + SZ_64M - 1, 56 .end = 0x10000000 + SZ_64M - 1,
57 .flags = IORESOURCE_MEM, 57 .flags = IORESOURCE_MEM,
58 }, { 58 }, {
59 .name = "PCIe0 MEM 2", 59 .name = "PCIe0 IO",
60 .start = 0xfe100000, 60 .start = 0xfe100000,
61 .end = 0xfe100000 + SZ_1M - 1, 61 .end = 0xfe100000 + SZ_1M - 1,
62 .flags = IORESOURCE_MEM, 62 .flags = IORESOURCE_IO,
63 }, 63 },
64}; 64};
65 65
66static struct resource sh7786_pci1_resources[] = { 66static struct resource sh7786_pci1_resources[] = {
67 { 67 {
68 .name = "PCIe1 IO", 68 .name = "PCIe1 MEM 0",
69 .start = 0xfd800000, 69 .start = 0xfd800000,
70 .end = 0xfd800000 + SZ_8M - 1, 70 .end = 0xfd800000 + SZ_8M - 1,
71 .flags = IORESOURCE_IO, 71 .flags = IORESOURCE_MEM,
72 }, { 72 }, {
73 .name = "PCIe1 MEM 0", 73 .name = "PCIe1 MEM 1",
74 .start = 0xa0000000, 74 .start = 0xa0000000,
75 .end = 0xa0000000 + SZ_512M - 1, 75 .end = 0xa0000000 + SZ_512M - 1,
76 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT, 76 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
77 }, { 77 }, {
78 .name = "PCIe1 MEM 1", 78 .name = "PCIe1 MEM 2",
79 .start = 0x30000000, 79 .start = 0x30000000,
80 .end = 0x30000000 + SZ_256M - 1, 80 .end = 0x30000000 + SZ_256M - 1,
81 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT, 81 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
82 }, { 82 }, {
83 .name = "PCIe1 MEM 2", 83 .name = "PCIe1 IO",
84 .start = 0xfe300000, 84 .start = 0xfe300000,
85 .end = 0xfe300000 + SZ_1M - 1, 85 .end = 0xfe300000 + SZ_1M - 1,
86 .flags = IORESOURCE_MEM, 86 .flags = IORESOURCE_IO,
87 }, 87 },
88}; 88};
89 89
90static struct resource sh7786_pci2_resources[] = { 90static struct resource sh7786_pci2_resources[] = {
91 { 91 {
92 .name = "PCIe2 IO", 92 .name = "PCIe2 MEM 0",
93 .start = 0xfc800000, 93 .start = 0xfc800000,
94 .end = 0xfc800000 + SZ_4M - 1, 94 .end = 0xfc800000 + SZ_4M - 1,
95 .flags = IORESOURCE_IO, 95 .flags = IORESOURCE_MEM,
96 }, { 96 }, {
97 .name = "PCIe2 MEM 0", 97 .name = "PCIe2 MEM 1",
98 .start = 0x80000000, 98 .start = 0x80000000,
99 .end = 0x80000000 + SZ_512M - 1, 99 .end = 0x80000000 + SZ_512M - 1,
100 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT, 100 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
101 }, { 101 }, {
102 .name = "PCIe2 MEM 1", 102 .name = "PCIe2 MEM 2",
103 .start = 0x20000000, 103 .start = 0x20000000,
104 .end = 0x20000000 + SZ_256M - 1, 104 .end = 0x20000000 + SZ_256M - 1,
105 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT, 105 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
106 }, { 106 }, {
107 .name = "PCIe2 MEM 2", 107 .name = "PCIe2 IO",
108 .start = 0xfcd00000, 108 .start = 0xfcd00000,
109 .end = 0xfcd00000 + SZ_1M - 1, 109 .end = 0xfcd00000 + SZ_1M - 1,
110 .flags = IORESOURCE_MEM, 110 .flags = IORESOURCE_IO,
111 }, 111 },
112}; 112};
113 113