diff options
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.c | 16 | ||||
| -rw-r--r-- | drivers/clk/ti/adpll.c | 2 | ||||
| -rw-r--r-- | drivers/clk/ti/apll.c | 4 | ||||
| -rw-r--r-- | drivers/clk/ti/autoidle.c | 101 | ||||
| -rw-r--r-- | drivers/clk/ti/clk.c | 72 | ||||
| -rw-r--r-- | drivers/clk/ti/clkctrl.c | 2 | ||||
| -rw-r--r-- | drivers/clk/ti/clock.h | 5 | ||||
| -rw-r--r-- | drivers/clk/ti/clockdomain.c | 2 | ||||
| -rw-r--r-- | drivers/clk/ti/divider.c | 2 | ||||
| -rw-r--r-- | drivers/clk/ti/dpll.c | 11 | ||||
| -rw-r--r-- | drivers/clk/ti/dpll3xxx.c | 2 | ||||
| -rw-r--r-- | drivers/clk/ti/gate.c | 2 | ||||
| -rw-r--r-- | drivers/clk/ti/interface.c | 4 | ||||
| -rw-r--r-- | drivers/clk/ti/mux.c | 2 | ||||
| -rw-r--r-- | include/linux/clk/ti.h | 1 |
15 files changed, 165 insertions, 63 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index b5531dd3ae9c..3a04c73ac03c 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
| @@ -1002,8 +1002,10 @@ static int _enable_clocks(struct omap_hwmod *oh) | |||
| 1002 | clk_enable(oh->_clk); | 1002 | clk_enable(oh->_clk); |
| 1003 | 1003 | ||
| 1004 | list_for_each_entry(os, &oh->slave_ports, node) { | 1004 | list_for_each_entry(os, &oh->slave_ports, node) { |
| 1005 | if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) | 1005 | if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) { |
| 1006 | omap2_clk_deny_idle(os->_clk); | ||
| 1006 | clk_enable(os->_clk); | 1007 | clk_enable(os->_clk); |
| 1008 | } | ||
| 1007 | } | 1009 | } |
| 1008 | 1010 | ||
| 1009 | /* The opt clocks are controlled by the device driver. */ | 1011 | /* The opt clocks are controlled by the device driver. */ |
| @@ -1055,8 +1057,10 @@ static int _disable_clocks(struct omap_hwmod *oh) | |||
| 1055 | clk_disable(oh->_clk); | 1057 | clk_disable(oh->_clk); |
| 1056 | 1058 | ||
| 1057 | list_for_each_entry(os, &oh->slave_ports, node) { | 1059 | list_for_each_entry(os, &oh->slave_ports, node) { |
| 1058 | if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) | 1060 | if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) { |
| 1059 | clk_disable(os->_clk); | 1061 | clk_disable(os->_clk); |
| 1062 | omap2_clk_allow_idle(os->_clk); | ||
| 1063 | } | ||
| 1060 | } | 1064 | } |
| 1061 | 1065 | ||
| 1062 | if (oh->flags & HWMOD_OPT_CLKS_NEEDED) | 1066 | if (oh->flags & HWMOD_OPT_CLKS_NEEDED) |
| @@ -2436,9 +2440,13 @@ static void _setup_iclk_autoidle(struct omap_hwmod *oh) | |||
| 2436 | continue; | 2440 | continue; |
| 2437 | 2441 | ||
| 2438 | if (os->flags & OCPIF_SWSUP_IDLE) { | 2442 | if (os->flags & OCPIF_SWSUP_IDLE) { |
| 2439 | /* XXX omap_iclk_deny_idle(c); */ | 2443 | /* |
| 2444 | * we might have multiple users of one iclk with | ||
| 2445 | * different requirements, disable autoidle when | ||
| 2446 | * the module is enabled, e.g. dss iclk | ||
| 2447 | */ | ||
| 2440 | } else { | 2448 | } else { |
| 2441 | /* XXX omap_iclk_allow_idle(c); */ | 2449 | /* we are enabling autoidle afterwards anyways */ |
| 2442 | clk_enable(os->_clk); | 2450 | clk_enable(os->_clk); |
| 2443 | } | 2451 | } |
| 2444 | } | 2452 | } |
diff --git a/drivers/clk/ti/adpll.c b/drivers/clk/ti/adpll.c index 688e403333b9..0c210984765a 100644 --- a/drivers/clk/ti/adpll.c +++ b/drivers/clk/ti/adpll.c | |||
| @@ -614,7 +614,7 @@ static int ti_adpll_init_clkout(struct ti_adpll_data *d, | |||
| 614 | 614 | ||
| 615 | init.name = child_name; | 615 | init.name = child_name; |
| 616 | init.ops = ops; | 616 | init.ops = ops; |
| 617 | init.flags = CLK_IS_BASIC; | 617 | init.flags = 0; |
| 618 | co->hw.init = &init; | 618 | co->hw.init = &init; |
| 619 | parent_names[0] = __clk_get_name(clk0); | 619 | parent_names[0] = __clk_get_name(clk0); |
| 620 | parent_names[1] = __clk_get_name(clk1); | 620 | parent_names[1] = __clk_get_name(clk1); |
diff --git a/drivers/clk/ti/apll.c b/drivers/clk/ti/apll.c index 222f68bc3f2a..015a657d3382 100644 --- a/drivers/clk/ti/apll.c +++ b/drivers/clk/ti/apll.c | |||
| @@ -165,7 +165,7 @@ static void __init omap_clk_register_apll(void *user, | |||
| 165 | 165 | ||
| 166 | ad->clk_bypass = __clk_get_hw(clk); | 166 | ad->clk_bypass = __clk_get_hw(clk); |
| 167 | 167 | ||
| 168 | clk = ti_clk_register(NULL, &clk_hw->hw, node->name); | 168 | clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, node->name); |
| 169 | if (!IS_ERR(clk)) { | 169 | if (!IS_ERR(clk)) { |
| 170 | of_clk_add_provider(node, of_clk_src_simple_get, clk); | 170 | of_clk_add_provider(node, of_clk_src_simple_get, clk); |
| 171 | kfree(clk_hw->hw.init->parent_names); | 171 | kfree(clk_hw->hw.init->parent_names); |
| @@ -402,7 +402,7 @@ static void __init of_omap2_apll_setup(struct device_node *node) | |||
| 402 | if (ret) | 402 | if (ret) |
| 403 | goto cleanup; | 403 | goto cleanup; |
| 404 | 404 | ||
| 405 | clk = clk_register(NULL, &clk_hw->hw); | 405 | clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, node->name); |
| 406 | if (!IS_ERR(clk)) { | 406 | if (!IS_ERR(clk)) { |
| 407 | of_clk_add_provider(node, of_clk_src_simple_get, clk); | 407 | of_clk_add_provider(node, of_clk_src_simple_get, clk); |
| 408 | kfree(init); | 408 | kfree(init); |
diff --git a/drivers/clk/ti/autoidle.c b/drivers/clk/ti/autoidle.c index 7bb9afbe4058..1cae226759dd 100644 --- a/drivers/clk/ti/autoidle.c +++ b/drivers/clk/ti/autoidle.c | |||
| @@ -35,7 +35,44 @@ struct clk_ti_autoidle { | |||
| 35 | #define AUTOIDLE_LOW 0x1 | 35 | #define AUTOIDLE_LOW 0x1 |
| 36 | 36 | ||
| 37 | static LIST_HEAD(autoidle_clks); | 37 | static LIST_HEAD(autoidle_clks); |
| 38 | static LIST_HEAD(clk_hw_omap_clocks); | 38 | |
| 39 | /* | ||
| 40 | * we have some non-atomic read/write | ||
| 41 | * operations behind it, so lets | ||
| 42 | * take one lock for handling autoidle | ||
| 43 | * of all clocks | ||
| 44 | */ | ||
| 45 | static DEFINE_SPINLOCK(autoidle_spinlock); | ||
| 46 | |||
| 47 | static int _omap2_clk_deny_idle(struct clk_hw_omap *clk) | ||
| 48 | { | ||
| 49 | if (clk->ops && clk->ops->deny_idle) { | ||
| 50 | unsigned long irqflags; | ||
| 51 | |||
| 52 | spin_lock_irqsave(&autoidle_spinlock, irqflags); | ||
| 53 | clk->autoidle_count++; | ||
| 54 | if (clk->autoidle_count == 1) | ||
| 55 | clk->ops->deny_idle(clk); | ||
| 56 | |||
| 57 | spin_unlock_irqrestore(&autoidle_spinlock, irqflags); | ||
| 58 | } | ||
| 59 | return 0; | ||
| 60 | } | ||
| 61 | |||
| 62 | static int _omap2_clk_allow_idle(struct clk_hw_omap *clk) | ||
| 63 | { | ||
| 64 | if (clk->ops && clk->ops->allow_idle) { | ||
| 65 | unsigned long irqflags; | ||
| 66 | |||
| 67 | spin_lock_irqsave(&autoidle_spinlock, irqflags); | ||
| 68 | clk->autoidle_count--; | ||
| 69 | if (clk->autoidle_count == 0) | ||
| 70 | clk->ops->allow_idle(clk); | ||
| 71 | |||
| 72 | spin_unlock_irqrestore(&autoidle_spinlock, irqflags); | ||
| 73 | } | ||
| 74 | return 0; | ||
| 75 | } | ||
| 39 | 76 | ||
| 40 | /** | 77 | /** |
| 41 | * omap2_clk_deny_idle - disable autoidle on an OMAP clock | 78 | * omap2_clk_deny_idle - disable autoidle on an OMAP clock |
| @@ -45,12 +82,15 @@ static LIST_HEAD(clk_hw_omap_clocks); | |||
| 45 | */ | 82 | */ |
| 46 | int omap2_clk_deny_idle(struct clk *clk) | 83 | int omap2_clk_deny_idle(struct clk *clk) |
| 47 | { | 84 | { |
| 48 | struct clk_hw_omap *c; | 85 | struct clk_hw *hw = __clk_get_hw(clk); |
| 49 | 86 | ||
| 50 | c = to_clk_hw_omap(__clk_get_hw(clk)); | 87 | if (omap2_clk_is_hw_omap(hw)) { |
| 51 | if (c->ops && c->ops->deny_idle) | 88 | struct clk_hw_omap *c = to_clk_hw_omap(hw); |
| 52 | c->ops->deny_idle(c); | 89 | |
| 53 | return 0; | 90 | return _omap2_clk_deny_idle(c); |
| 91 | } | ||
| 92 | |||
| 93 | return -EINVAL; | ||
| 54 | } | 94 | } |
| 55 | 95 | ||
| 56 | /** | 96 | /** |
| @@ -61,12 +101,15 @@ int omap2_clk_deny_idle(struct clk *clk) | |||
| 61 | */ | 101 | */ |
| 62 | int omap2_clk_allow_idle(struct clk *clk) | 102 | int omap2_clk_allow_idle(struct clk *clk) |
| 63 | { | 103 | { |
| 64 | struct clk_hw_omap *c; | 104 | struct clk_hw *hw = __clk_get_hw(clk); |
| 65 | 105 | ||
| 66 | c = to_clk_hw_omap(__clk_get_hw(clk)); | 106 | if (omap2_clk_is_hw_omap(hw)) { |
| 67 | if (c->ops && c->ops->allow_idle) | 107 | struct clk_hw_omap *c = to_clk_hw_omap(hw); |
| 68 | c->ops->allow_idle(c); | 108 | |
| 69 | return 0; | 109 | return _omap2_clk_allow_idle(c); |
| 110 | } | ||
| 111 | |||
| 112 | return -EINVAL; | ||
| 70 | } | 113 | } |
| 71 | 114 | ||
| 72 | static void _allow_autoidle(struct clk_ti_autoidle *clk) | 115 | static void _allow_autoidle(struct clk_ti_autoidle *clk) |
| @@ -168,26 +211,6 @@ int __init of_ti_clk_autoidle_setup(struct device_node *node) | |||
| 168 | } | 211 | } |
| 169 | 212 | ||
| 170 | /** | 213 | /** |
| 171 | * omap2_init_clk_hw_omap_clocks - initialize an OMAP clock | ||
| 172 | * @hw: struct clk_hw * to initialize | ||
| 173 | * | ||
| 174 | * Add an OMAP clock @clk to the internal list of OMAP clocks. Used | ||
| 175 | * temporarily for autoidle handling, until this support can be | ||
| 176 | * integrated into the common clock framework code in some way. No | ||
| 177 | * return value. | ||
| 178 | */ | ||
| 179 | void omap2_init_clk_hw_omap_clocks(struct clk_hw *hw) | ||
| 180 | { | ||
| 181 | struct clk_hw_omap *c; | ||
| 182 | |||
| 183 | if (clk_hw_get_flags(hw) & CLK_IS_BASIC) | ||
| 184 | return; | ||
| 185 | |||
| 186 | c = to_clk_hw_omap(hw); | ||
| 187 | list_add(&c->node, &clk_hw_omap_clocks); | ||
| 188 | } | ||
| 189 | |||
| 190 | /** | ||
| 191 | * omap2_clk_enable_autoidle_all - enable autoidle on all OMAP clocks that | 214 | * omap2_clk_enable_autoidle_all - enable autoidle on all OMAP clocks that |
| 192 | * support it | 215 | * support it |
| 193 | * | 216 | * |
| @@ -198,11 +221,11 @@ void omap2_init_clk_hw_omap_clocks(struct clk_hw *hw) | |||
| 198 | */ | 221 | */ |
| 199 | int omap2_clk_enable_autoidle_all(void) | 222 | int omap2_clk_enable_autoidle_all(void) |
| 200 | { | 223 | { |
| 201 | struct clk_hw_omap *c; | 224 | int ret; |
| 202 | 225 | ||
| 203 | list_for_each_entry(c, &clk_hw_omap_clocks, node) | 226 | ret = omap2_clk_for_each(_omap2_clk_allow_idle); |
| 204 | if (c->ops && c->ops->allow_idle) | 227 | if (ret) |
| 205 | c->ops->allow_idle(c); | 228 | return ret; |
| 206 | 229 | ||
| 207 | _clk_generic_allow_autoidle_all(); | 230 | _clk_generic_allow_autoidle_all(); |
| 208 | 231 | ||
| @@ -220,11 +243,11 @@ int omap2_clk_enable_autoidle_all(void) | |||
| 220 | */ | 243 | */ |
| 221 | int omap2_clk_disable_autoidle_all(void) | 244 | int omap2_clk_disable_autoidle_all(void) |
| 222 | { | 245 | { |
| 223 | struct clk_hw_omap *c; | 246 | int ret; |
| 224 | 247 | ||
| 225 | list_for_each_entry(c, &clk_hw_omap_clocks, node) | 248 | ret = omap2_clk_for_each(_omap2_clk_deny_idle); |
| 226 | if (c->ops && c->ops->deny_idle) | 249 | if (ret) |
| 227 | c->ops->deny_idle(c); | 250 | return ret; |
| 228 | 251 | ||
| 229 | _clk_generic_deny_autoidle_all(); | 252 | _clk_generic_deny_autoidle_all(); |
| 230 | 253 | ||
diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c index d0cd58534781..d1f948163d6a 100644 --- a/drivers/clk/ti/clk.c +++ b/drivers/clk/ti/clk.c | |||
| @@ -31,6 +31,7 @@ | |||
| 31 | #undef pr_fmt | 31 | #undef pr_fmt |
| 32 | #define pr_fmt(fmt) "%s: " fmt, __func__ | 32 | #define pr_fmt(fmt) "%s: " fmt, __func__ |
| 33 | 33 | ||
| 34 | static LIST_HEAD(clk_hw_omap_clocks); | ||
| 34 | struct ti_clk_ll_ops *ti_clk_ll_ops; | 35 | struct ti_clk_ll_ops *ti_clk_ll_ops; |
| 35 | static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS]; | 36 | static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS]; |
| 36 | 37 | ||
| @@ -517,3 +518,74 @@ struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw, | |||
| 517 | 518 | ||
| 518 | return clk; | 519 | return clk; |
| 519 | } | 520 | } |
| 521 | |||
| 522 | /** | ||
| 523 | * ti_clk_register_omap_hw - register a clk_hw_omap to the clock framework | ||
| 524 | * @dev: device for this clock | ||
| 525 | * @hw: hardware clock handle | ||
| 526 | * @con: connection ID for this clock | ||
| 527 | * | ||
| 528 | * Registers a clk_hw_omap clock to the clock framewor, adds a clock alias | ||
| 529 | * for it, and adds the list to the available clk_hw_omap type clocks. | ||
| 530 | * Returns a handle to the registered clock if successful, ERR_PTR value | ||
| 531 | * in failure. | ||
| 532 | */ | ||
| 533 | struct clk *ti_clk_register_omap_hw(struct device *dev, struct clk_hw *hw, | ||
| 534 | const char *con) | ||
| 535 | { | ||
| 536 | struct clk *clk; | ||
| 537 | struct clk_hw_omap *oclk; | ||
| 538 | |||
| 539 | clk = ti_clk_register(dev, hw, con); | ||
| 540 | if (IS_ERR(clk)) | ||
| 541 | return clk; | ||
| 542 | |||
| 543 | oclk = to_clk_hw_omap(hw); | ||
| 544 | |||
| 545 | list_add(&oclk->node, &clk_hw_omap_clocks); | ||
| 546 | |||
| 547 | return clk; | ||
| 548 | } | ||
| 549 | |||
| 550 | /** | ||
| 551 | * omap2_clk_for_each - call function for each registered clk_hw_omap | ||
| 552 | * @fn: pointer to a callback function | ||
| 553 | * | ||
| 554 | * Call @fn for each registered clk_hw_omap, passing @hw to each | ||
| 555 | * function. @fn must return 0 for success or any other value for | ||
| 556 | * failure. If @fn returns non-zero, the iteration across clocks | ||
| 557 | * will stop and the non-zero return value will be passed to the | ||
| 558 | * caller of omap2_clk_for_each(). | ||
| 559 | */ | ||
| 560 | int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw)) | ||
| 561 | { | ||
| 562 | int ret; | ||
| 563 | struct clk_hw_omap *hw; | ||
| 564 | |||
| 565 | list_for_each_entry(hw, &clk_hw_omap_clocks, node) { | ||
| 566 | ret = (*fn)(hw); | ||
| 567 | if (ret) | ||
| 568 | break; | ||
| 569 | } | ||
| 570 | |||
| 571 | return ret; | ||
| 572 | } | ||
| 573 | |||
| 574 | /** | ||
| 575 | * omap2_clk_is_hw_omap - check if the provided clk_hw is OMAP clock | ||
| 576 | * @hw: clk_hw to check if it is an omap clock or not | ||
| 577 | * | ||
| 578 | * Checks if the provided clk_hw is OMAP clock or not. Returns true if | ||
| 579 | * it is, false otherwise. | ||
| 580 | */ | ||
| 581 | bool omap2_clk_is_hw_omap(struct clk_hw *hw) | ||
| 582 | { | ||
| 583 | struct clk_hw_omap *oclk; | ||
| 584 | |||
| 585 | list_for_each_entry(oclk, &clk_hw_omap_clocks, node) { | ||
| 586 | if (&oclk->hw == hw) | ||
| 587 | return true; | ||
| 588 | } | ||
| 589 | |||
| 590 | return false; | ||
| 591 | } | ||
diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c index 40630eb950fc..bf32d996177f 100644 --- a/drivers/clk/ti/clkctrl.c +++ b/drivers/clk/ti/clkctrl.c | |||
| @@ -276,7 +276,7 @@ _ti_clkctrl_clk_register(struct omap_clkctrl_provider *provider, | |||
| 276 | init.parent_names = parents; | 276 | init.parent_names = parents; |
| 277 | init.num_parents = num_parents; | 277 | init.num_parents = num_parents; |
| 278 | init.ops = ops; | 278 | init.ops = ops; |
| 279 | init.flags = CLK_IS_BASIC; | 279 | init.flags = 0; |
| 280 | 280 | ||
| 281 | clk = ti_clk_register(NULL, clk_hw, init.name); | 281 | clk = ti_clk_register(NULL, clk_hw, init.name); |
| 282 | if (IS_ERR_OR_NULL(clk)) { | 282 | if (IS_ERR_OR_NULL(clk)) { |
diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h index 9f312a219510..1c0fac59d809 100644 --- a/drivers/clk/ti/clock.h +++ b/drivers/clk/ti/clock.h | |||
| @@ -203,6 +203,8 @@ typedef void (*ti_of_clk_init_cb_t)(void *, struct device_node *); | |||
| 203 | 203 | ||
| 204 | struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw, | 204 | struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw, |
| 205 | const char *con); | 205 | const char *con); |
| 206 | struct clk *ti_clk_register_omap_hw(struct device *dev, struct clk_hw *hw, | ||
| 207 | const char *con); | ||
| 206 | int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con); | 208 | int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con); |
| 207 | void ti_clk_add_aliases(void); | 209 | void ti_clk_add_aliases(void); |
| 208 | 210 | ||
| @@ -221,7 +223,6 @@ int ti_clk_retry_init(struct device_node *node, void *user, | |||
| 221 | ti_of_clk_init_cb_t func); | 223 | ti_of_clk_init_cb_t func); |
| 222 | int ti_clk_add_component(struct device_node *node, struct clk_hw *hw, int type); | 224 | int ti_clk_add_component(struct device_node *node, struct clk_hw *hw, int type); |
| 223 | 225 | ||
| 224 | void omap2_init_clk_hw_omap_clocks(struct clk_hw *hw); | ||
| 225 | int of_ti_clk_autoidle_setup(struct device_node *node); | 226 | int of_ti_clk_autoidle_setup(struct device_node *node); |
| 226 | void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks); | 227 | void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks); |
| 227 | 228 | ||
| @@ -301,6 +302,8 @@ long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw, | |||
| 301 | unsigned long *parent_rate); | 302 | unsigned long *parent_rate); |
| 302 | int omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw, | 303 | int omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw, |
| 303 | struct clk_rate_request *req); | 304 | struct clk_rate_request *req); |
| 305 | int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw)); | ||
| 306 | bool omap2_clk_is_hw_omap(struct clk_hw *hw); | ||
| 304 | 307 | ||
| 305 | extern struct ti_clk_ll_ops *ti_clk_ll_ops; | 308 | extern struct ti_clk_ll_ops *ti_clk_ll_ops; |
| 306 | 309 | ||
diff --git a/drivers/clk/ti/clockdomain.c b/drivers/clk/ti/clockdomain.c index 07a805125e98..423a99b9f10c 100644 --- a/drivers/clk/ti/clockdomain.c +++ b/drivers/clk/ti/clockdomain.c | |||
| @@ -143,7 +143,7 @@ static void __init of_ti_clockdomain_setup(struct device_node *node) | |||
| 143 | continue; | 143 | continue; |
| 144 | } | 144 | } |
| 145 | clk_hw = __clk_get_hw(clk); | 145 | clk_hw = __clk_get_hw(clk); |
| 146 | if (clk_hw_get_flags(clk_hw) & CLK_IS_BASIC) { | 146 | if (!omap2_clk_is_hw_omap(clk_hw)) { |
| 147 | pr_warn("can't setup clkdm for basic clk %s\n", | 147 | pr_warn("can't setup clkdm for basic clk %s\n", |
| 148 | __clk_get_name(clk)); | 148 | __clk_get_name(clk)); |
| 149 | continue; | 149 | continue; |
diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c index 8d77090ad94a..cb5a81963ba9 100644 --- a/drivers/clk/ti/divider.c +++ b/drivers/clk/ti/divider.c | |||
| @@ -336,7 +336,7 @@ static struct clk *_register_divider(struct device *dev, const char *name, | |||
| 336 | 336 | ||
| 337 | init.name = name; | 337 | init.name = name; |
| 338 | init.ops = &ti_clk_divider_ops; | 338 | init.ops = &ti_clk_divider_ops; |
| 339 | init.flags = flags | CLK_IS_BASIC; | 339 | init.flags = flags; |
| 340 | init.parent_names = (parent_name ? &parent_name : NULL); | 340 | init.parent_names = (parent_name ? &parent_name : NULL); |
| 341 | init.num_parents = (parent_name ? 1 : 0); | 341 | init.num_parents = (parent_name ? 1 : 0); |
| 342 | 342 | ||
diff --git a/drivers/clk/ti/dpll.c b/drivers/clk/ti/dpll.c index 6c3329bc116f..659dadb23279 100644 --- a/drivers/clk/ti/dpll.c +++ b/drivers/clk/ti/dpll.c | |||
| @@ -192,10 +192,9 @@ static void __init _register_dpll(void *user, | |||
| 192 | dd->clk_bypass = __clk_get_hw(clk); | 192 | dd->clk_bypass = __clk_get_hw(clk); |
| 193 | 193 | ||
| 194 | /* register the clock */ | 194 | /* register the clock */ |
| 195 | clk = ti_clk_register(NULL, &clk_hw->hw, node->name); | 195 | clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, node->name); |
| 196 | 196 | ||
| 197 | if (!IS_ERR(clk)) { | 197 | if (!IS_ERR(clk)) { |
| 198 | omap2_init_clk_hw_omap_clocks(&clk_hw->hw); | ||
| 199 | of_clk_add_provider(node, of_clk_src_simple_get, clk); | 198 | of_clk_add_provider(node, of_clk_src_simple_get, clk); |
| 200 | kfree(clk_hw->hw.init->parent_names); | 199 | kfree(clk_hw->hw.init->parent_names); |
| 201 | kfree(clk_hw->hw.init); | 200 | kfree(clk_hw->hw.init); |
| @@ -265,14 +264,12 @@ static void _register_dpll_x2(struct device_node *node, | |||
| 265 | #endif | 264 | #endif |
| 266 | 265 | ||
| 267 | /* register the clock */ | 266 | /* register the clock */ |
| 268 | clk = ti_clk_register(NULL, &clk_hw->hw, name); | 267 | clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name); |
| 269 | 268 | ||
| 270 | if (IS_ERR(clk)) { | 269 | if (IS_ERR(clk)) |
| 271 | kfree(clk_hw); | 270 | kfree(clk_hw); |
| 272 | } else { | 271 | else |
| 273 | omap2_init_clk_hw_omap_clocks(&clk_hw->hw); | ||
| 274 | of_clk_add_provider(node, of_clk_src_simple_get, clk); | 272 | of_clk_add_provider(node, of_clk_src_simple_get, clk); |
| 275 | } | ||
| 276 | } | 273 | } |
| 277 | #endif | 274 | #endif |
| 278 | 275 | ||
diff --git a/drivers/clk/ti/dpll3xxx.c b/drivers/clk/ti/dpll3xxx.c index 44b6b6403753..3dde6c8c3354 100644 --- a/drivers/clk/ti/dpll3xxx.c +++ b/drivers/clk/ti/dpll3xxx.c | |||
| @@ -731,7 +731,7 @@ static struct clk_hw_omap *omap3_find_clkoutx2_dpll(struct clk_hw *hw) | |||
| 731 | do { | 731 | do { |
| 732 | do { | 732 | do { |
| 733 | hw = clk_hw_get_parent(hw); | 733 | hw = clk_hw_get_parent(hw); |
| 734 | } while (hw && (clk_hw_get_flags(hw) & CLK_IS_BASIC)); | 734 | } while (hw && (!omap2_clk_is_hw_omap(hw))); |
| 735 | if (!hw) | 735 | if (!hw) |
| 736 | break; | 736 | break; |
| 737 | pclk = to_clk_hw_omap(hw); | 737 | pclk = to_clk_hw_omap(hw); |
diff --git a/drivers/clk/ti/gate.c b/drivers/clk/ti/gate.c index 1c78fff5513c..504c0e91cdc7 100644 --- a/drivers/clk/ti/gate.c +++ b/drivers/clk/ti/gate.c | |||
| @@ -123,7 +123,7 @@ static struct clk *_register_gate(struct device *dev, const char *name, | |||
| 123 | 123 | ||
| 124 | init.flags = flags; | 124 | init.flags = flags; |
| 125 | 125 | ||
| 126 | clk = ti_clk_register(NULL, &clk_hw->hw, name); | 126 | clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name); |
| 127 | 127 | ||
| 128 | if (IS_ERR(clk)) | 128 | if (IS_ERR(clk)) |
| 129 | kfree(clk_hw); | 129 | kfree(clk_hw); |
diff --git a/drivers/clk/ti/interface.c b/drivers/clk/ti/interface.c index 87e00c2ee957..83e34429d3b1 100644 --- a/drivers/clk/ti/interface.c +++ b/drivers/clk/ti/interface.c | |||
| @@ -57,12 +57,10 @@ static struct clk *_register_interface(struct device *dev, const char *name, | |||
| 57 | init.num_parents = 1; | 57 | init.num_parents = 1; |
| 58 | init.parent_names = &parent_name; | 58 | init.parent_names = &parent_name; |
| 59 | 59 | ||
| 60 | clk = ti_clk_register(NULL, &clk_hw->hw, name); | 60 | clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name); |
| 61 | 61 | ||
| 62 | if (IS_ERR(clk)) | 62 | if (IS_ERR(clk)) |
| 63 | kfree(clk_hw); | 63 | kfree(clk_hw); |
| 64 | else | ||
| 65 | omap2_init_clk_hw_omap_clocks(&clk_hw->hw); | ||
| 66 | 64 | ||
| 67 | return clk; | 65 | return clk; |
| 68 | } | 66 | } |
diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c index 883bdde94d04..b7f9a4f068bf 100644 --- a/drivers/clk/ti/mux.c +++ b/drivers/clk/ti/mux.c | |||
| @@ -143,7 +143,7 @@ static struct clk *_register_mux(struct device *dev, const char *name, | |||
| 143 | 143 | ||
| 144 | init.name = name; | 144 | init.name = name; |
| 145 | init.ops = &ti_clk_mux_ops; | 145 | init.ops = &ti_clk_mux_ops; |
| 146 | init.flags = flags | CLK_IS_BASIC; | 146 | init.flags = flags; |
| 147 | init.parent_names = parent_names; | 147 | init.parent_names = parent_names; |
| 148 | init.num_parents = num_parents; | 148 | init.num_parents = num_parents; |
| 149 | 149 | ||
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index eacc5df57b99..78872efc7be0 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h | |||
| @@ -160,6 +160,7 @@ struct clk_hw_omap { | |||
| 160 | struct clockdomain *clkdm; | 160 | struct clockdomain *clkdm; |
| 161 | const struct clk_hw_omap_ops *ops; | 161 | const struct clk_hw_omap_ops *ops; |
| 162 | u32 context; | 162 | u32 context; |
| 163 | int autoidle_count; | ||
| 163 | }; | 164 | }; |
| 164 | 165 | ||
| 165 | /* | 166 | /* |
