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-rw-r--r--Documentation/arm/kernel_mode_neon.txt4
-rw-r--r--arch/arm/Kconfig4
-rw-r--r--arch/arm/Kconfig-nommu2
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/boot/bootp/Makefile2
-rw-r--r--arch/arm/boot/bootp/init.S2
-rw-r--r--arch/arm/boot/compressed/Makefile2
-rw-r--r--arch/arm/boot/compressed/ll_char_wr.S4
-rw-r--r--arch/arm/common/mcpm_entry.c2
-rw-r--r--arch/arm/include/asm/assembler.h12
-rw-r--r--arch/arm/include/asm/barrier.h2
-rw-r--r--arch/arm/include/asm/hardware/entry-macro-iomd.S10
-rw-r--r--arch/arm/include/asm/irq.h1
-rw-r--r--arch/arm/include/asm/pgtable.h3
-rw-r--r--arch/arm/include/asm/processor.h6
-rw-r--r--arch/arm/include/asm/smp_twd.h16
-rw-r--r--arch/arm/include/asm/spinlock.h3
-rw-r--r--arch/arm/include/asm/suspend.h1
-rw-r--r--arch/arm/include/asm/uaccess.h3
-rw-r--r--arch/arm/include/asm/v7m.h2
-rw-r--r--arch/arm/include/asm/vfpmacros.h8
-rw-r--r--arch/arm/include/debug/tegra.S2
-rw-r--r--arch/arm/kernel/debug.S2
-rw-r--r--arch/arm/kernel/entry-armv.S12
-rw-r--r--arch/arm/kernel/entry-common.S2
-rw-r--r--arch/arm/kernel/entry-header.S11
-rw-r--r--arch/arm/kernel/entry-v7m.S4
-rw-r--r--arch/arm/kernel/head-nommu.S4
-rw-r--r--arch/arm/kernel/hyp-stub.S4
-rw-r--r--arch/arm/kernel/irq.c62
-rw-r--r--arch/arm/kernel/machine_kexec.c5
-rw-r--r--arch/arm/kernel/patch.c6
-rw-r--r--arch/arm/kernel/sleep.S12
-rw-r--r--arch/arm/kernel/smp.c6
-rw-r--r--arch/arm/kernel/smp_twd.c66
-rw-r--r--arch/arm/kernel/unwind.c14
-rw-r--r--arch/arm/lib/Makefile2
-rw-r--r--arch/arm/lib/bitops.h8
-rw-r--r--arch/arm/lib/clear_user.S2
-rw-r--r--arch/arm/lib/copy_from_user.S2
-rw-r--r--arch/arm/lib/copy_page.S4
-rw-r--r--arch/arm/lib/copy_template.S6
-rw-r--r--arch/arm/lib/copy_to_user.S2
-rw-r--r--arch/arm/lib/csumpartial.S20
-rw-r--r--arch/arm/lib/csumpartialcopygeneric.S4
-rw-r--r--arch/arm/lib/csumpartialcopyuser.S2
-rw-r--r--arch/arm/lib/div64.S4
-rw-r--r--arch/arm/lib/floppydma.S10
-rw-r--r--arch/arm/lib/io-readsb.S20
-rw-r--r--arch/arm/lib/io-readsl.S2
-rw-r--r--arch/arm/lib/io-readsw-armv3.S6
-rw-r--r--arch/arm/lib/io-readsw-armv4.S12
-rw-r--r--arch/arm/lib/io-writesb.S20
-rw-r--r--arch/arm/lib/io-writesl.S2
-rw-r--r--arch/arm/lib/io-writesw-armv3.S2
-rw-r--r--arch/arm/lib/io-writesw-armv4.S6
-rw-r--r--arch/arm/lib/lib1funcs.S4
-rw-r--r--arch/arm/lib/memcpy.S4
-rw-r--r--arch/arm/lib/memmove.S24
-rw-r--r--arch/arm/lib/memset.S42
-rw-r--r--arch/arm/lib/xor-neon.c2
-rw-r--r--arch/arm/mach-ks8695/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-omap2/prm_common.c4
-rw-r--r--arch/arm/mach-tegra/reset-handler.S2
-rw-r--r--arch/arm/mm/cache-v6.S8
-rw-r--r--arch/arm/mm/copypage-v4mc.c3
-rw-r--r--arch/arm/mm/copypage-v4wb.c3
-rw-r--r--arch/arm/mm/copypage-v4wt.c3
-rw-r--r--arch/arm/mm/dma-mapping.c4
-rw-r--r--arch/arm/mm/idmap.c4
-rw-r--r--arch/arm/mm/init.c69
-rw-r--r--arch/arm/mm/pmsa-v8.c4
-rw-r--r--arch/arm/mm/proc-v7m.S7
-rw-r--r--arch/arm/probes/kprobes/opt-arm.c2
-rw-r--r--drivers/amba/bus.c45
-rw-r--r--drivers/hwtracing/coresight/coresight-etm3x.c44
-rw-r--r--drivers/hwtracing/coresight/coresight-etm4x.c21
-rw-r--r--drivers/hwtracing/coresight/coresight-priv.h40
-rw-r--r--drivers/hwtracing/coresight/coresight-stm.c14
-rw-r--r--drivers/hwtracing/coresight/coresight-tmc.c30
-rw-r--r--include/linux/amba/bus.h39
-rw-r--r--lib/raid6/Makefile2
82 files changed, 389 insertions, 476 deletions
diff --git a/Documentation/arm/kernel_mode_neon.txt b/Documentation/arm/kernel_mode_neon.txt
index 525452726d31..b9e060c5b61e 100644
--- a/Documentation/arm/kernel_mode_neon.txt
+++ b/Documentation/arm/kernel_mode_neon.txt
@@ -6,7 +6,7 @@ TL;DR summary
6* Use only NEON instructions, or VFP instructions that don't rely on support 6* Use only NEON instructions, or VFP instructions that don't rely on support
7 code 7 code
8* Isolate your NEON code in a separate compilation unit, and compile it with 8* Isolate your NEON code in a separate compilation unit, and compile it with
9 '-mfpu=neon -mfloat-abi=softfp' 9 '-march=armv7-a -mfpu=neon -mfloat-abi=softfp'
10* Put kernel_neon_begin() and kernel_neon_end() calls around the calls into your 10* Put kernel_neon_begin() and kernel_neon_end() calls around the calls into your
11 NEON code 11 NEON code
12* Don't sleep in your NEON code, and be aware that it will be executed with 12* Don't sleep in your NEON code, and be aware that it will be executed with
@@ -87,7 +87,7 @@ instructions appearing in unexpected places if no special care is taken.
87Therefore, the recommended and only supported way of using NEON/VFP in the 87Therefore, the recommended and only supported way of using NEON/VFP in the
88kernel is by adhering to the following rules: 88kernel is by adhering to the following rules:
89* isolate the NEON code in a separate compilation unit and compile it with 89* isolate the NEON code in a separate compilation unit and compile it with
90 '-mfpu=neon -mfloat-abi=softfp'; 90 '-march=armv7-a -mfpu=neon -mfloat-abi=softfp';
91* issue the calls to kernel_neon_begin(), kernel_neon_end() as well as the calls 91* issue the calls to kernel_neon_begin(), kernel_neon_end() as well as the calls
92 into the unit containing the NEON code from a compilation unit which is *not* 92 into the unit containing the NEON code from a compilation unit which is *not*
93 built with the GCC flag '-mfpu=neon' set. 93 built with the GCC flag '-mfpu=neon' set.
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 664e918e2624..813d0428b37b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1304,7 +1304,7 @@ config SCHED_SMT
1304config HAVE_ARM_SCU 1304config HAVE_ARM_SCU
1305 bool 1305 bool
1306 help 1306 help
1307 This option enables support for the ARM system coherency unit 1307 This option enables support for the ARM snoop control unit
1308 1308
1309config HAVE_ARM_ARCH_TIMER 1309config HAVE_ARM_ARCH_TIMER
1310 bool "Architected timer support" 1310 bool "Architected timer support"
@@ -1316,7 +1316,6 @@ config HAVE_ARM_ARCH_TIMER
1316 1316
1317config HAVE_ARM_TWD 1317config HAVE_ARM_TWD
1318 bool 1318 bool
1319 select TIMER_OF if OF
1320 help 1319 help
1321 This options enables support for the ARM timer and watchdog unit 1320 This options enables support for the ARM timer and watchdog unit
1322 1321
@@ -1400,6 +1399,7 @@ config NR_CPUS
1400config HOTPLUG_CPU 1399config HOTPLUG_CPU
1401 bool "Support for hot-pluggable CPUs" 1400 bool "Support for hot-pluggable CPUs"
1402 depends on SMP 1401 depends on SMP
1402 select GENERIC_IRQ_MIGRATION
1403 help 1403 help
1404 Say Y here to experiment with turning CPUs off and on. CPUs 1404 Say Y here to experiment with turning CPUs off and on. CPUs
1405 can be controlled through /sys/devices/system/cpu. 1405 can be controlled through /sys/devices/system/cpu.
diff --git a/arch/arm/Kconfig-nommu b/arch/arm/Kconfig-nommu
index 1168a03c8525..36c80d3dd93f 100644
--- a/arch/arm/Kconfig-nommu
+++ b/arch/arm/Kconfig-nommu
@@ -20,10 +20,12 @@ config DRAM_SIZE
20 20
21config FLASH_MEM_BASE 21config FLASH_MEM_BASE
22 hex 'FLASH Base Address' if SET_MEM_PARAM 22 hex 'FLASH Base Address' if SET_MEM_PARAM
23 depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T
23 default 0x00400000 24 default 0x00400000
24 25
25config FLASH_SIZE 26config FLASH_SIZE
26 hex 'FLASH Size' if SET_MEM_PARAM 27 hex 'FLASH Size' if SET_MEM_PARAM
28 depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T
27 default 0x00400000 29 default 0x00400000
28 30
29config PROCESSOR_ID 31config PROCESSOR_ID
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 9db3c584b2cb..ac0187c8d258 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -10,7 +10,7 @@
10# 10#
11# Copyright (C) 1995-2001 by Russell King 11# Copyright (C) 1995-2001 by Russell King
12 12
13LDFLAGS_vmlinux :=-p --no-undefined -X --pic-veneer 13LDFLAGS_vmlinux := --no-undefined -X --pic-veneer
14ifeq ($(CONFIG_CPU_ENDIAN_BE8),y) 14ifeq ($(CONFIG_CPU_ENDIAN_BE8),y)
15LDFLAGS_vmlinux += --be8 15LDFLAGS_vmlinux += --be8
16KBUILD_LDFLAGS_MODULE += --be8 16KBUILD_LDFLAGS_MODULE += --be8
diff --git a/arch/arm/boot/bootp/Makefile b/arch/arm/boot/bootp/Makefile
index 83e1a076a5d6..981a8d03f064 100644
--- a/arch/arm/boot/bootp/Makefile
+++ b/arch/arm/boot/bootp/Makefile
@@ -8,7 +8,7 @@
8 8
9GCOV_PROFILE := n 9GCOV_PROFILE := n
10 10
11LDFLAGS_bootp :=-p --no-undefined -X \ 11LDFLAGS_bootp := --no-undefined -X \
12 --defsym initrd_phys=$(INITRD_PHYS) \ 12 --defsym initrd_phys=$(INITRD_PHYS) \
13 --defsym params_phys=$(PARAMS_PHYS) -T 13 --defsym params_phys=$(PARAMS_PHYS) -T
14AFLAGS_initrd.o :=-DINITRD=\"$(INITRD)\" 14AFLAGS_initrd.o :=-DINITRD=\"$(INITRD)\"
diff --git a/arch/arm/boot/bootp/init.S b/arch/arm/boot/bootp/init.S
index 78b508075161..142927e5f485 100644
--- a/arch/arm/boot/bootp/init.S
+++ b/arch/arm/boot/bootp/init.S
@@ -44,7 +44,7 @@ _start: add lr, pc, #-0x8 @ lr = current load addr
44 */ 44 */
45 movne r10, #0 @ terminator 45 movne r10, #0 @ terminator
46 movne r4, #2 @ Size of this entry (2 words) 46 movne r4, #2 @ Size of this entry (2 words)
47 stmneia r9, {r4, r5, r10} @ Size, ATAG_CORE, terminator 47 stmiane r9, {r4, r5, r10} @ Size, ATAG_CORE, terminator
48 48
49/* 49/*
50 * find the end of the tag list, and then add an INITRD tag on the end. 50 * find the end of the tag list, and then add an INITRD tag on the end.
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 6114ae6ea466..9219389bbe61 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -132,8 +132,6 @@ endif
132ifeq ($(CONFIG_CPU_ENDIAN_BE8),y) 132ifeq ($(CONFIG_CPU_ENDIAN_BE8),y)
133LDFLAGS_vmlinux += --be8 133LDFLAGS_vmlinux += --be8
134endif 134endif
135# ?
136LDFLAGS_vmlinux += -p
137# Report unresolved symbol references 135# Report unresolved symbol references
138LDFLAGS_vmlinux += --no-undefined 136LDFLAGS_vmlinux += --no-undefined
139# Delete all temporary local symbols 137# Delete all temporary local symbols
diff --git a/arch/arm/boot/compressed/ll_char_wr.S b/arch/arm/boot/compressed/ll_char_wr.S
index 8517c8606b4a..b1dcdb9f4030 100644
--- a/arch/arm/boot/compressed/ll_char_wr.S
+++ b/arch/arm/boot/compressed/ll_char_wr.S
@@ -75,7 +75,7 @@ Lrow4bpplp:
75 tst r1, #7 @ avoid using r7 directly after 75 tst r1, #7 @ avoid using r7 directly after
76 str r7, [r0, -r5]! 76 str r7, [r0, -r5]!
77 subne r1, r1, #1 77 subne r1, r1, #1
78 ldrneb r7, [r6, r1] 78 ldrbne r7, [r6, r1]
79 bne Lrow4bpplp 79 bne Lrow4bpplp
80 ldmfd sp!, {r4 - r7, pc} 80 ldmfd sp!, {r4 - r7, pc}
81 81
@@ -103,7 +103,7 @@ Lrow8bpplp:
103 sub r0, r0, r5 @ avoid ip 103 sub r0, r0, r5 @ avoid ip
104 stmia r0, {r4, ip} 104 stmia r0, {r4, ip}
105 subne r1, r1, #1 105 subne r1, r1, #1
106 ldrneb r7, [r6, r1] 106 ldrbne r7, [r6, r1]
107 bne Lrow8bpplp 107 bne Lrow8bpplp
108 ldmfd sp!, {r4 - r7, pc} 108 ldmfd sp!, {r4 - r7, pc}
109 109
diff --git a/arch/arm/common/mcpm_entry.c b/arch/arm/common/mcpm_entry.c
index ad574d20415c..1b1b82b37ce0 100644
--- a/arch/arm/common/mcpm_entry.c
+++ b/arch/arm/common/mcpm_entry.c
@@ -381,7 +381,7 @@ static int __init nocache_trampoline(unsigned long _arg)
381 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); 381 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
382 phys_reset_t phys_reset; 382 phys_reset_t phys_reset;
383 383
384 mcpm_set_entry_vector(cpu, cluster, cpu_resume); 384 mcpm_set_entry_vector(cpu, cluster, cpu_resume_no_hyp);
385 setup_mm_for_reboot(); 385 setup_mm_for_reboot();
386 386
387 __mcpm_cpu_going_down(cpu, cluster); 387 __mcpm_cpu_going_down(cpu, cluster);
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 28a48e0d4cca..b59921a560da 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -376,9 +376,9 @@ THUMB( orr \reg , \reg , #PSR_T_BIT )
376 .macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=TUSER() 376 .macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=TUSER()
3779999: 3779999:
378 .if \inc == 1 378 .if \inc == 1
379 \instr\cond\()b\()\t\().w \reg, [\ptr, #\off] 379 \instr\()b\t\cond\().w \reg, [\ptr, #\off]
380 .elseif \inc == 4 380 .elseif \inc == 4
381 \instr\cond\()\t\().w \reg, [\ptr, #\off] 381 \instr\t\cond\().w \reg, [\ptr, #\off]
382 .else 382 .else
383 .error "Unsupported inc macro argument" 383 .error "Unsupported inc macro argument"
384 .endif 384 .endif
@@ -417,9 +417,9 @@ THUMB( orr \reg , \reg , #PSR_T_BIT )
417 .rept \rept 417 .rept \rept
4189999: 4189999:
419 .if \inc == 1 419 .if \inc == 1
420 \instr\cond\()b\()\t \reg, [\ptr], #\inc 420 \instr\()b\t\cond \reg, [\ptr], #\inc
421 .elseif \inc == 4 421 .elseif \inc == 4
422 \instr\cond\()\t \reg, [\ptr], #\inc 422 \instr\t\cond \reg, [\ptr], #\inc
423 .else 423 .else
424 .error "Unsupported inc macro argument" 424 .error "Unsupported inc macro argument"
425 .endif 425 .endif
@@ -460,7 +460,7 @@ THUMB( orr \reg , \reg , #PSR_T_BIT )
460 .macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req 460 .macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req
461#ifndef CONFIG_CPU_USE_DOMAINS 461#ifndef CONFIG_CPU_USE_DOMAINS
462 adds \tmp, \addr, #\size - 1 462 adds \tmp, \addr, #\size - 1
463 sbcccs \tmp, \tmp, \limit 463 sbcscc \tmp, \tmp, \limit
464 bcs \bad 464 bcs \bad
465#ifdef CONFIG_CPU_SPECTRE 465#ifdef CONFIG_CPU_SPECTRE
466 movcs \addr, #0 466 movcs \addr, #0
@@ -474,7 +474,7 @@ THUMB( orr \reg , \reg , #PSR_T_BIT )
474 sub \tmp, \limit, #1 474 sub \tmp, \limit, #1
475 subs \tmp, \tmp, \addr @ tmp = limit - 1 - addr 475 subs \tmp, \tmp, \addr @ tmp = limit - 1 - addr
476 addhs \tmp, \tmp, #1 @ if (tmp >= 0) { 476 addhs \tmp, \tmp, #1 @ if (tmp >= 0) {
477 subhss \tmp, \tmp, \size @ tmp = limit - (addr + size) } 477 subshs \tmp, \tmp, \size @ tmp = limit - (addr + size) }
478 movlo \addr, #0 @ if (tmp < 0) addr = NULL 478 movlo \addr, #0 @ if (tmp < 0) addr = NULL
479 csdb 479 csdb
480#endif 480#endif
diff --git a/arch/arm/include/asm/barrier.h b/arch/arm/include/asm/barrier.h
index 69772e742a0a..83ae97c049d9 100644
--- a/arch/arm/include/asm/barrier.h
+++ b/arch/arm/include/asm/barrier.h
@@ -11,6 +11,8 @@
11#define sev() __asm__ __volatile__ ("sev" : : : "memory") 11#define sev() __asm__ __volatile__ ("sev" : : : "memory")
12#define wfe() __asm__ __volatile__ ("wfe" : : : "memory") 12#define wfe() __asm__ __volatile__ ("wfe" : : : "memory")
13#define wfi() __asm__ __volatile__ ("wfi" : : : "memory") 13#define wfi() __asm__ __volatile__ ("wfi" : : : "memory")
14#else
15#define wfe() do { } while (0)
14#endif 16#endif
15 17
16#if __LINUX_ARM_ARCH__ >= 7 18#if __LINUX_ARM_ARCH__ >= 7
diff --git a/arch/arm/include/asm/hardware/entry-macro-iomd.S b/arch/arm/include/asm/hardware/entry-macro-iomd.S
index 8c215acd9b57..f7692731e514 100644
--- a/arch/arm/include/asm/hardware/entry-macro-iomd.S
+++ b/arch/arm/include/asm/hardware/entry-macro-iomd.S
@@ -16,25 +16,25 @@
16 ldr \tmp, =irq_prio_h 16 ldr \tmp, =irq_prio_h
17 teq \irqstat, #0 17 teq \irqstat, #0
18#ifdef IOMD_BASE 18#ifdef IOMD_BASE
19 ldreqb \irqstat, [\base, #IOMD_DMAREQ] @ get dma 19 ldrbeq \irqstat, [\base, #IOMD_DMAREQ] @ get dma
20 addeq \tmp, \tmp, #256 @ irq_prio_h table size 20 addeq \tmp, \tmp, #256 @ irq_prio_h table size
21 teqeq \irqstat, #0 21 teqeq \irqstat, #0
22 bne 2406f 22 bne 2406f
23#endif 23#endif
24 ldreqb \irqstat, [\base, #IOMD_IRQREQA] @ get low priority 24 ldrbeq \irqstat, [\base, #IOMD_IRQREQA] @ get low priority
25 addeq \tmp, \tmp, #256 @ irq_prio_d table size 25 addeq \tmp, \tmp, #256 @ irq_prio_d table size
26 teqeq \irqstat, #0 26 teqeq \irqstat, #0
27#ifdef IOMD_IRQREQC 27#ifdef IOMD_IRQREQC
28 ldreqb \irqstat, [\base, #IOMD_IRQREQC] 28 ldrbeq \irqstat, [\base, #IOMD_IRQREQC]
29 addeq \tmp, \tmp, #256 @ irq_prio_l table size 29 addeq \tmp, \tmp, #256 @ irq_prio_l table size
30 teqeq \irqstat, #0 30 teqeq \irqstat, #0
31#endif 31#endif
32#ifdef IOMD_IRQREQD 32#ifdef IOMD_IRQREQD
33 ldreqb \irqstat, [\base, #IOMD_IRQREQD] 33 ldrbeq \irqstat, [\base, #IOMD_IRQREQD]
34 addeq \tmp, \tmp, #256 @ irq_prio_lc table size 34 addeq \tmp, \tmp, #256 @ irq_prio_lc table size
35 teqeq \irqstat, #0 35 teqeq \irqstat, #0
36#endif 36#endif
372406: ldrneb \irqnr, [\tmp, \irqstat] @ get IRQ number 372406: ldrbne \irqnr, [\tmp, \irqstat] @ get IRQ number
38 .endm 38 .endm
39 39
40/* 40/*
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h
index c883fcbe93b6..46d41140df27 100644
--- a/arch/arm/include/asm/irq.h
+++ b/arch/arm/include/asm/irq.h
@@ -25,7 +25,6 @@
25#ifndef __ASSEMBLY__ 25#ifndef __ASSEMBLY__
26struct irqaction; 26struct irqaction;
27struct pt_regs; 27struct pt_regs;
28extern void migrate_irqs(void);
29 28
30extern void asm_do_IRQ(unsigned int, struct pt_regs *); 29extern void asm_do_IRQ(unsigned int, struct pt_regs *);
31void handle_IRQ(unsigned int, struct pt_regs *); 30void handle_IRQ(unsigned int, struct pt_regs *);
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index a757401129f9..48ce1b19069b 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -125,6 +125,9 @@ extern pgprot_t pgprot_s2_device;
125#define pgprot_stronglyordered(prot) \ 125#define pgprot_stronglyordered(prot) \
126 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED) 126 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
127 127
128#define pgprot_device(prot) \
129 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_DEV_SHARED | L_PTE_SHARED | L_PTE_DIRTY | L_PTE_XN)
130
128#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE 131#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
129#define pgprot_dmacoherent(prot) \ 132#define pgprot_dmacoherent(prot) \
130 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE | L_PTE_XN) 133 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE | L_PTE_XN)
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 120f4c9bbfde..57fe73ea0f72 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -89,7 +89,11 @@ extern void release_thread(struct task_struct *);
89unsigned long get_wchan(struct task_struct *p); 89unsigned long get_wchan(struct task_struct *p);
90 90
91#if __LINUX_ARM_ARCH__ == 6 || defined(CONFIG_ARM_ERRATA_754327) 91#if __LINUX_ARM_ARCH__ == 6 || defined(CONFIG_ARM_ERRATA_754327)
92#define cpu_relax() smp_mb() 92#define cpu_relax() \
93 do { \
94 smp_mb(); \
95 __asm__ __volatile__("nop; nop; nop; nop; nop; nop; nop; nop; nop; nop;"); \
96 } while (0)
93#else 97#else
94#define cpu_relax() barrier() 98#define cpu_relax() barrier()
95#endif 99#endif
diff --git a/arch/arm/include/asm/smp_twd.h b/arch/arm/include/asm/smp_twd.h
index 312784ee9936..c729d2113a24 100644
--- a/arch/arm/include/asm/smp_twd.h
+++ b/arch/arm/include/asm/smp_twd.h
@@ -19,20 +19,4 @@
19#define TWD_TIMER_CONTROL_PERIODIC (1 << 1) 19#define TWD_TIMER_CONTROL_PERIODIC (1 << 1)
20#define TWD_TIMER_CONTROL_IT_ENABLE (1 << 2) 20#define TWD_TIMER_CONTROL_IT_ENABLE (1 << 2)
21 21
22#include <linux/ioport.h>
23
24struct twd_local_timer {
25 struct resource res[2];
26};
27
28#define DEFINE_TWD_LOCAL_TIMER(name,base,irq) \
29struct twd_local_timer name __initdata = { \
30 .res = { \
31 DEFINE_RES_MEM(base, 0x10), \
32 DEFINE_RES_IRQ(irq), \
33 }, \
34};
35
36int twd_local_timer_register(struct twd_local_timer *);
37
38#endif 22#endif
diff --git a/arch/arm/include/asm/spinlock.h b/arch/arm/include/asm/spinlock.h
index 099c78fcf62d..8f009e788ad4 100644
--- a/arch/arm/include/asm/spinlock.h
+++ b/arch/arm/include/asm/spinlock.h
@@ -210,11 +210,12 @@ static inline void arch_read_lock(arch_rwlock_t *rw)
210 210
211 prefetchw(&rw->lock); 211 prefetchw(&rw->lock);
212 __asm__ __volatile__( 212 __asm__ __volatile__(
213" .syntax unified\n"
213"1: ldrex %0, [%2]\n" 214"1: ldrex %0, [%2]\n"
214" adds %0, %0, #1\n" 215" adds %0, %0, #1\n"
215" strexpl %1, %0, [%2]\n" 216" strexpl %1, %0, [%2]\n"
216 WFE("mi") 217 WFE("mi")
217" rsbpls %0, %1, #0\n" 218" rsbspl %0, %1, #0\n"
218" bmi 1b" 219" bmi 1b"
219 : "=&r" (tmp), "=&r" (tmp2) 220 : "=&r" (tmp), "=&r" (tmp2)
220 : "r" (&rw->lock) 221 : "r" (&rw->lock)
diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h
index 452bbdcbcc83..506314265c6f 100644
--- a/arch/arm/include/asm/suspend.h
+++ b/arch/arm/include/asm/suspend.h
@@ -10,6 +10,7 @@ struct sleep_save_sp {
10}; 10};
11 11
12extern void cpu_resume(void); 12extern void cpu_resume(void);
13extern void cpu_resume_no_hyp(void);
13extern void cpu_resume_arm(void); 14extern void cpu_resume_arm(void);
14extern int cpu_suspend(unsigned long, int (*)(unsigned long)); 15extern int cpu_suspend(unsigned long, int (*)(unsigned long));
15 16
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 42aa4a22803c..89a28680934b 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -86,7 +86,8 @@ static inline void set_fs(mm_segment_t fs)
86#define __range_ok(addr, size) ({ \ 86#define __range_ok(addr, size) ({ \
87 unsigned long flag, roksum; \ 87 unsigned long flag, roksum; \
88 __chk_user_ptr(addr); \ 88 __chk_user_ptr(addr); \
89 __asm__("adds %1, %2, %3; sbcccs %1, %1, %0; movcc %0, #0" \ 89 __asm__(".syntax unified\n" \
90 "adds %1, %2, %3; sbcscc %1, %1, %0; movcc %0, #0" \
90 : "=&r" (flag), "=&r" (roksum) \ 91 : "=&r" (flag), "=&r" (roksum) \
91 : "r" (addr), "Ir" (size), "0" (current_thread_info()->addr_limit) \ 92 : "r" (addr), "Ir" (size), "0" (current_thread_info()->addr_limit) \
92 : "cc"); \ 93 : "cc"); \
diff --git a/arch/arm/include/asm/v7m.h b/arch/arm/include/asm/v7m.h
index 187ccf6496ad..2cb00d15831b 100644
--- a/arch/arm/include/asm/v7m.h
+++ b/arch/arm/include/asm/v7m.h
@@ -49,7 +49,7 @@
49 * (0 -> msp; 1 -> psp). Bits [1:0] are fixed to 0b01. 49 * (0 -> msp; 1 -> psp). Bits [1:0] are fixed to 0b01.
50 */ 50 */
51#define EXC_RET_STACK_MASK 0x00000004 51#define EXC_RET_STACK_MASK 0x00000004
52#define EXC_RET_THREADMODE_PROCESSSTACK 0xfffffffd 52#define EXC_RET_THREADMODE_PROCESSSTACK (3 << 2)
53 53
54/* Cache related definitions */ 54/* Cache related definitions */
55 55
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
index ef5dfedacd8d..628c336e8e3b 100644
--- a/arch/arm/include/asm/vfpmacros.h
+++ b/arch/arm/include/asm/vfpmacros.h
@@ -29,13 +29,13 @@
29 ldr \tmp, =elf_hwcap @ may not have MVFR regs 29 ldr \tmp, =elf_hwcap @ may not have MVFR regs
30 ldr \tmp, [\tmp, #0] 30 ldr \tmp, [\tmp, #0]
31 tst \tmp, #HWCAP_VFPD32 31 tst \tmp, #HWCAP_VFPD32
32 ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} 32 ldclne p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
33 addeq \base, \base, #32*4 @ step over unused register space 33 addeq \base, \base, #32*4 @ step over unused register space
34#else 34#else
35 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 35 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
36 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field 36 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
37 cmp \tmp, #2 @ 32 x 64bit registers? 37 cmp \tmp, #2 @ 32 x 64bit registers?
38 ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} 38 ldcleq p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
39 addne \base, \base, #32*4 @ step over unused register space 39 addne \base, \base, #32*4 @ step over unused register space
40#endif 40#endif
41#endif 41#endif
@@ -53,13 +53,13 @@
53 ldr \tmp, =elf_hwcap @ may not have MVFR regs 53 ldr \tmp, =elf_hwcap @ may not have MVFR regs
54 ldr \tmp, [\tmp, #0] 54 ldr \tmp, [\tmp, #0]
55 tst \tmp, #HWCAP_VFPD32 55 tst \tmp, #HWCAP_VFPD32
56 stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} 56 stclne p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
57 addeq \base, \base, #32*4 @ step over unused register space 57 addeq \base, \base, #32*4 @ step over unused register space
58#else 58#else
59 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 59 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
60 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field 60 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
61 cmp \tmp, #2 @ 32 x 64bit registers? 61 cmp \tmp, #2 @ 32 x 64bit registers?
62 stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} 62 stcleq p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
63 addne \base, \base, #32*4 @ step over unused register space 63 addne \base, \base, #32*4 @ step over unused register space
64#endif 64#endif
65#endif 65#endif
diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S
index 3bc80599c022..4a5a645c76e2 100644
--- a/arch/arm/include/debug/tegra.S
+++ b/arch/arm/include/debug/tegra.S
@@ -173,7 +173,7 @@
173 173
174 .macro senduart, rd, rx 174 .macro senduart, rd, rx
175 cmp \rx, #0 175 cmp \rx, #0
176 strneb \rd, [\rx, #UART_TX << UART_SHIFT] 176 strbne \rd, [\rx, #UART_TX << UART_SHIFT]
1771001: 1771001:
178 .endm 178 .endm
179 179
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index b795dc2408c0..b9f94e03d916 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -86,7 +86,7 @@ hexbuf_rel: .long hexbuf_addr - .
86ENTRY(printascii) 86ENTRY(printascii)
87 addruart_current r3, r1, r2 87 addruart_current r3, r1, r2
881: teq r0, #0 881: teq r0, #0
89 ldrneb r1, [r0], #1 89 ldrbne r1, [r0], #1
90 teqne r1, #0 90 teqne r1, #0
91 reteq lr 91 reteq lr
922: teq r1, #'\n' 922: teq r1, #'\n'
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index e85a3af9ddeb..ce4aea57130a 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -636,7 +636,7 @@ call_fpe:
636 @ Test if we need to give access to iWMMXt coprocessors 636 @ Test if we need to give access to iWMMXt coprocessors
637 ldr r5, [r10, #TI_FLAGS] 637 ldr r5, [r10, #TI_FLAGS]
638 rsbs r7, r8, #(1 << 8) @ CP 0 or 1 only 638 rsbs r7, r8, #(1 << 8) @ CP 0 or 1 only
639 movcss r7, r5, lsr #(TIF_USING_IWMMXT + 1) 639 movscs r7, r5, lsr #(TIF_USING_IWMMXT + 1)
640 bcs iwmmxt_task_enable 640 bcs iwmmxt_task_enable
641#endif 641#endif
642 ARM( add pc, pc, r8, lsr #6 ) 642 ARM( add pc, pc, r8, lsr #6 )
@@ -872,7 +872,7 @@ __kuser_cmpxchg64: @ 0xffff0f60
872 smp_dmb arm 872 smp_dmb arm
8731: ldrexd r0, r1, [r2] @ load current val 8731: ldrexd r0, r1, [r2] @ load current val
874 eors r3, r0, r4 @ compare with oldval (1) 874 eors r3, r0, r4 @ compare with oldval (1)
875 eoreqs r3, r1, r5 @ compare with oldval (2) 875 eorseq r3, r1, r5 @ compare with oldval (2)
876 strexdeq r3, r6, r7, [r2] @ store newval if eq 876 strexdeq r3, r6, r7, [r2] @ store newval if eq
877 teqeq r3, #1 @ success? 877 teqeq r3, #1 @ success?
878 beq 1b @ if no then retry 878 beq 1b @ if no then retry
@@ -896,8 +896,8 @@ __kuser_cmpxchg64: @ 0xffff0f60
896 ldmia r1, {r6, lr} @ load new val 896 ldmia r1, {r6, lr} @ load new val
8971: ldmia r2, {r0, r1} @ load current val 8971: ldmia r2, {r0, r1} @ load current val
898 eors r3, r0, r4 @ compare with oldval (1) 898 eors r3, r0, r4 @ compare with oldval (1)
899 eoreqs r3, r1, r5 @ compare with oldval (2) 899 eorseq r3, r1, r5 @ compare with oldval (2)
9002: stmeqia r2, {r6, lr} @ store newval if eq 9002: stmiaeq r2, {r6, lr} @ store newval if eq
901 rsbs r0, r3, #0 @ set return val and C flag 901 rsbs r0, r3, #0 @ set return val and C flag
902 ldmfd sp!, {r4, r5, r6, pc} 902 ldmfd sp!, {r4, r5, r6, pc}
903 903
@@ -911,7 +911,7 @@ kuser_cmpxchg64_fixup:
911 mov r7, #0xffff0fff 911 mov r7, #0xffff0fff
912 sub r7, r7, #(0xffff0fff - (0xffff0f60 + (1b - __kuser_cmpxchg64))) 912 sub r7, r7, #(0xffff0fff - (0xffff0f60 + (1b - __kuser_cmpxchg64)))
913 subs r8, r4, r7 913 subs r8, r4, r7
914 rsbcss r8, r8, #(2b - 1b) 914 rsbscs r8, r8, #(2b - 1b)
915 strcs r7, [sp, #S_PC] 915 strcs r7, [sp, #S_PC]
916#if __LINUX_ARM_ARCH__ < 6 916#if __LINUX_ARM_ARCH__ < 6
917 bcc kuser_cmpxchg32_fixup 917 bcc kuser_cmpxchg32_fixup
@@ -969,7 +969,7 @@ kuser_cmpxchg32_fixup:
969 mov r7, #0xffff0fff 969 mov r7, #0xffff0fff
970 sub r7, r7, #(0xffff0fff - (0xffff0fc0 + (1b - __kuser_cmpxchg))) 970 sub r7, r7, #(0xffff0fff - (0xffff0fc0 + (1b - __kuser_cmpxchg)))
971 subs r8, r4, r7 971 subs r8, r4, r7
972 rsbcss r8, r8, #(2b - 1b) 972 rsbscs r8, r8, #(2b - 1b)
973 strcs r7, [sp, #S_PC] 973 strcs r7, [sp, #S_PC]
974 ret lr 974 ret lr
975 .previous 975 .previous
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 0465d65d23de..f7649adef505 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -373,7 +373,7 @@ sys_syscall:
373 movhs scno, #0 373 movhs scno, #0
374 csdb 374 csdb
375#endif 375#endif
376 stmloia sp, {r5, r6} @ shuffle args 376 stmialo sp, {r5, r6} @ shuffle args
377 movlo r0, r1 377 movlo r0, r1
378 movlo r1, r2 378 movlo r1, r2
379 movlo r2, r3 379 movlo r2, r3
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 773424843d6e..32051ec5b33f 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -127,7 +127,8 @@
127 */ 127 */
128 .macro v7m_exception_slow_exit ret_r0 128 .macro v7m_exception_slow_exit ret_r0
129 cpsid i 129 cpsid i
130 ldr lr, =EXC_RET_THREADMODE_PROCESSSTACK 130 ldr lr, =exc_ret
131 ldr lr, [lr]
131 132
132 @ read original r12, sp, lr, pc and xPSR 133 @ read original r12, sp, lr, pc and xPSR
133 add r12, sp, #S_IP 134 add r12, sp, #S_IP
@@ -387,8 +388,8 @@
387 badr lr, \ret @ return address 388 badr lr, \ret @ return address
388 .if \reload 389 .if \reload
389 add r1, sp, #S_R0 + S_OFF @ pointer to regs 390 add r1, sp, #S_R0 + S_OFF @ pointer to regs
390 ldmccia r1, {r0 - r6} @ reload r0-r6 391 ldmiacc r1, {r0 - r6} @ reload r0-r6
391 stmccia sp, {r4, r5} @ update stack arguments 392 stmiacc sp, {r4, r5} @ update stack arguments
392 .endif 393 .endif
393 ldrcc pc, [\table, \tmp, lsl #2] @ call sys_* routine 394 ldrcc pc, [\table, \tmp, lsl #2] @ call sys_* routine
394#else 395#else
@@ -396,8 +397,8 @@
396 badr lr, \ret @ return address 397 badr lr, \ret @ return address
397 .if \reload 398 .if \reload
398 add r1, sp, #S_R0 + S_OFF @ pointer to regs 399 add r1, sp, #S_R0 + S_OFF @ pointer to regs
399 ldmccia r1, {r0 - r6} @ reload r0-r6 400 ldmiacc r1, {r0 - r6} @ reload r0-r6
400 stmccia sp, {r4, r5} @ update stack arguments 401 stmiacc sp, {r4, r5} @ update stack arguments
401 .endif 402 .endif
402 ldrcc pc, [\table, \nr, lsl #2] @ call sys_* routine 403 ldrcc pc, [\table, \nr, lsl #2] @ call sys_* routine
403#endif 404#endif
diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S
index abcf47848525..19d2dcd6530d 100644
--- a/arch/arm/kernel/entry-v7m.S
+++ b/arch/arm/kernel/entry-v7m.S
@@ -146,3 +146,7 @@ ENTRY(vector_table)
146 .rept CONFIG_CPU_V7M_NUM_IRQ 146 .rept CONFIG_CPU_V7M_NUM_IRQ
147 .long __irq_entry @ External Interrupts 147 .long __irq_entry @ External Interrupts
148 .endr 148 .endr
149 .align 2
150 .globl exc_ret
151exc_ret:
152 .space 4
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index ec29de250076..c08d2d890f7b 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -439,8 +439,8 @@ M_CLASS(str r6, [r12, #PMSAv8_RLAR_A(3)])
439 str r5, [r12, #PMSAv8_RBAR_A(0)] 439 str r5, [r12, #PMSAv8_RBAR_A(0)]
440 str r6, [r12, #PMSAv8_RLAR_A(0)] 440 str r6, [r12, #PMSAv8_RLAR_A(0)]
441#else 441#else
442 mcr p15, 0, r5, c6, c10, 1 @ PRBAR4 442 mcr p15, 0, r5, c6, c10, 0 @ PRBAR4
443 mcr p15, 0, r6, c6, c10, 2 @ PRLAR4 443 mcr p15, 0, r6, c6, c10, 1 @ PRLAR4
444#endif 444#endif
445#endif 445#endif
446 ret lr 446 ret lr
diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
index 60146e32619a..82a942894fc0 100644
--- a/arch/arm/kernel/hyp-stub.S
+++ b/arch/arm/kernel/hyp-stub.S
@@ -180,8 +180,8 @@ ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE
180 @ Check whether GICv3 system registers are available 180 @ Check whether GICv3 system registers are available
181 mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1 181 mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1
182 ubfx r7, r7, #28, #4 182 ubfx r7, r7, #28, #4
183 cmp r7, #1 183 teq r7, #0
184 bne 2f 184 beq 2f
185 185
186 @ Enable system register accesses 186 @ Enable system register accesses
187 mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE 187 mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 9908dacf9229..844861368cd5 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -31,7 +31,6 @@
31#include <linux/smp.h> 31#include <linux/smp.h>
32#include <linux/init.h> 32#include <linux/init.h>
33#include <linux/seq_file.h> 33#include <linux/seq_file.h>
34#include <linux/ratelimit.h>
35#include <linux/errno.h> 34#include <linux/errno.h>
36#include <linux/list.h> 35#include <linux/list.h>
37#include <linux/kallsyms.h> 36#include <linux/kallsyms.h>
@@ -109,64 +108,3 @@ int __init arch_probe_nr_irqs(void)
109 return nr_irqs; 108 return nr_irqs;
110} 109}
111#endif 110#endif
112
113#ifdef CONFIG_HOTPLUG_CPU
114static bool migrate_one_irq(struct irq_desc *desc)
115{
116 struct irq_data *d = irq_desc_get_irq_data(desc);
117 const struct cpumask *affinity = irq_data_get_affinity_mask(d);
118 struct irq_chip *c;
119 bool ret = false;
120
121 /*
122 * If this is a per-CPU interrupt, or the affinity does not
123 * include this CPU, then we have nothing to do.
124 */
125 if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity))
126 return false;
127
128 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
129 affinity = cpu_online_mask;
130 ret = true;
131 }
132
133 c = irq_data_get_irq_chip(d);
134 if (!c->irq_set_affinity)
135 pr_debug("IRQ%u: unable to set affinity\n", d->irq);
136 else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret)
137 cpumask_copy(irq_data_get_affinity_mask(d), affinity);
138
139 return ret;
140}
141
142/*
143 * The current CPU has been marked offline. Migrate IRQs off this CPU.
144 * If the affinity settings do not allow other CPUs, force them onto any
145 * available CPU.
146 *
147 * Note: we must iterate over all IRQs, whether they have an attached
148 * action structure or not, as we need to get chained interrupts too.
149 */
150void migrate_irqs(void)
151{
152 unsigned int i;
153 struct irq_desc *desc;
154 unsigned long flags;
155
156 local_irq_save(flags);
157
158 for_each_irq_desc(i, desc) {
159 bool affinity_broken;
160
161 raw_spin_lock(&desc->lock);
162 affinity_broken = migrate_one_irq(desc);
163 raw_spin_unlock(&desc->lock);
164
165 if (affinity_broken)
166 pr_warn_ratelimited("IRQ%u no longer affine to CPU%u\n",
167 i, smp_processor_id());
168 }
169
170 local_irq_restore(flags);
171}
172#endif /* CONFIG_HOTPLUG_CPU */
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index dd2eb5f76b9f..76300f3813e8 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -91,8 +91,11 @@ void machine_crash_nonpanic_core(void *unused)
91 91
92 set_cpu_online(smp_processor_id(), false); 92 set_cpu_online(smp_processor_id(), false);
93 atomic_dec(&waiting_for_crash_ipi); 93 atomic_dec(&waiting_for_crash_ipi);
94 while (1) 94
95 while (1) {
95 cpu_relax(); 96 cpu_relax();
97 wfe();
98 }
96} 99}
97 100
98void crash_smp_send_stop(void) 101void crash_smp_send_stop(void)
diff --git a/arch/arm/kernel/patch.c b/arch/arm/kernel/patch.c
index a50dc00d79a2..d0a05a3bdb96 100644
--- a/arch/arm/kernel/patch.c
+++ b/arch/arm/kernel/patch.c
@@ -16,7 +16,7 @@ struct patch {
16 unsigned int insn; 16 unsigned int insn;
17}; 17};
18 18
19static DEFINE_SPINLOCK(patch_lock); 19static DEFINE_RAW_SPINLOCK(patch_lock);
20 20
21static void __kprobes *patch_map(void *addr, int fixmap, unsigned long *flags) 21static void __kprobes *patch_map(void *addr, int fixmap, unsigned long *flags)
22 __acquires(&patch_lock) 22 __acquires(&patch_lock)
@@ -33,7 +33,7 @@ static void __kprobes *patch_map(void *addr, int fixmap, unsigned long *flags)
33 return addr; 33 return addr;
34 34
35 if (flags) 35 if (flags)
36 spin_lock_irqsave(&patch_lock, *flags); 36 raw_spin_lock_irqsave(&patch_lock, *flags);
37 else 37 else
38 __acquire(&patch_lock); 38 __acquire(&patch_lock);
39 39
@@ -48,7 +48,7 @@ static void __kprobes patch_unmap(int fixmap, unsigned long *flags)
48 clear_fixmap(fixmap); 48 clear_fixmap(fixmap);
49 49
50 if (flags) 50 if (flags)
51 spin_unlock_irqrestore(&patch_lock, *flags); 51 raw_spin_unlock_irqrestore(&patch_lock, *flags);
52 else 52 else
53 __release(&patch_lock); 53 __release(&patch_lock);
54} 54}
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index a8257fc9cf2a..5dc8b80bb693 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -120,6 +120,14 @@ ENDPROC(cpu_resume_after_mmu)
120 .text 120 .text
121 .align 121 .align
122 122
123#ifdef CONFIG_MCPM
124 .arm
125THUMB( .thumb )
126ENTRY(cpu_resume_no_hyp)
127ARM_BE8(setend be) @ ensure we are in BE mode
128 b no_hyp
129#endif
130
123#ifdef CONFIG_MMU 131#ifdef CONFIG_MMU
124 .arm 132 .arm
125ENTRY(cpu_resume_arm) 133ENTRY(cpu_resume_arm)
@@ -135,6 +143,7 @@ ARM_BE8(setend be) @ ensure we are in BE mode
135 bl __hyp_stub_install_secondary 143 bl __hyp_stub_install_secondary
136#endif 144#endif
137 safe_svcmode_maskall r1 145 safe_svcmode_maskall r1
146no_hyp:
138 mov r1, #0 147 mov r1, #0
139 ALT_SMP(mrc p15, 0, r0, c0, c0, 5) 148 ALT_SMP(mrc p15, 0, r0, c0, c0, 5)
140 ALT_UP_B(1f) 149 ALT_UP_B(1f)
@@ -164,6 +173,9 @@ ENDPROC(cpu_resume)
164#ifdef CONFIG_MMU 173#ifdef CONFIG_MMU
165ENDPROC(cpu_resume_arm) 174ENDPROC(cpu_resume_arm)
166#endif 175#endif
176#ifdef CONFIG_MCPM
177ENDPROC(cpu_resume_no_hyp)
178#endif
167 179
168 .align 2 180 .align 2
169_sleep_save_sp: 181_sleep_save_sp:
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 051b0e8e7d30..facd4240ca02 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -248,7 +248,7 @@ int __cpu_disable(void)
248 /* 248 /*
249 * OK - migrate IRQs away from this CPU 249 * OK - migrate IRQs away from this CPU
250 */ 250 */
251 migrate_irqs(); 251 irq_migrate_all_off_this_cpu();
252 252
253 /* 253 /*
254 * Flush user cache and TLB mappings, and then remove this CPU 254 * Flush user cache and TLB mappings, and then remove this CPU
@@ -598,8 +598,10 @@ static void ipi_cpu_stop(unsigned int cpu)
598 local_fiq_disable(); 598 local_fiq_disable();
599 local_irq_disable(); 599 local_irq_disable();
600 600
601 while (1) 601 while (1) {
602 cpu_relax(); 602 cpu_relax();
603 wfe();
604 }
603} 605}
604 606
605static DEFINE_PER_CPU(struct completion *, cpu_completion); 607static DEFINE_PER_CPU(struct completion *, cpu_completion);
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index b30eafeef096..3cdc399b9fc3 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -100,8 +100,6 @@ static void twd_timer_stop(void)
100 disable_percpu_irq(clk->irq); 100 disable_percpu_irq(clk->irq);
101} 101}
102 102
103#ifdef CONFIG_COMMON_CLK
104
105/* 103/*
106 * Updates clockevent frequency when the cpu frequency changes. 104 * Updates clockevent frequency when the cpu frequency changes.
107 * Called on the cpu that is changing frequency with interrupts disabled. 105 * Called on the cpu that is changing frequency with interrupts disabled.
@@ -143,54 +141,6 @@ static int twd_clk_init(void)
143} 141}
144core_initcall(twd_clk_init); 142core_initcall(twd_clk_init);
145 143
146#elif defined (CONFIG_CPU_FREQ)
147
148#include <linux/cpufreq.h>
149
150/*
151 * Updates clockevent frequency when the cpu frequency changes.
152 * Called on the cpu that is changing frequency with interrupts disabled.
153 */
154static void twd_update_frequency(void *data)
155{
156 twd_timer_rate = clk_get_rate(twd_clk);
157
158 clockevents_update_freq(raw_cpu_ptr(twd_evt), twd_timer_rate);
159}
160
161static int twd_cpufreq_transition(struct notifier_block *nb,
162 unsigned long state, void *data)
163{
164 struct cpufreq_freqs *freqs = data;
165
166 /*
167 * The twd clock events must be reprogrammed to account for the new
168 * frequency. The timer is local to a cpu, so cross-call to the
169 * changing cpu.
170 */
171 if (state == CPUFREQ_POSTCHANGE)
172 smp_call_function_single(freqs->cpu, twd_update_frequency,
173 NULL, 1);
174
175 return NOTIFY_OK;
176}
177
178static struct notifier_block twd_cpufreq_nb = {
179 .notifier_call = twd_cpufreq_transition,
180};
181
182static int twd_cpufreq_init(void)
183{
184 if (twd_evt && raw_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
185 return cpufreq_register_notifier(&twd_cpufreq_nb,
186 CPUFREQ_TRANSITION_NOTIFIER);
187
188 return 0;
189}
190core_initcall(twd_cpufreq_init);
191
192#endif
193
194static void twd_calibrate_rate(void) 144static void twd_calibrate_rate(void)
195{ 145{
196 unsigned long count; 146 unsigned long count;
@@ -366,21 +316,6 @@ out_free:
366 return err; 316 return err;
367} 317}
368 318
369int __init twd_local_timer_register(struct twd_local_timer *tlt)
370{
371 if (twd_base || twd_evt)
372 return -EBUSY;
373
374 twd_ppi = tlt->res[1].start;
375
376 twd_base = ioremap(tlt->res[0].start, resource_size(&tlt->res[0]));
377 if (!twd_base)
378 return -ENOMEM;
379
380 return twd_local_timer_common_register(NULL);
381}
382
383#ifdef CONFIG_OF
384static int __init twd_local_timer_of_register(struct device_node *np) 319static int __init twd_local_timer_of_register(struct device_node *np)
385{ 320{
386 int err; 321 int err;
@@ -406,4 +341,3 @@ out:
406TIMER_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register); 341TIMER_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
407TIMER_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register); 342TIMER_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
408TIMER_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register); 343TIMER_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
409#endif
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index 0bee233fef9a..314cfb232a63 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -93,7 +93,7 @@ extern const struct unwind_idx __start_unwind_idx[];
93static const struct unwind_idx *__origin_unwind_idx; 93static const struct unwind_idx *__origin_unwind_idx;
94extern const struct unwind_idx __stop_unwind_idx[]; 94extern const struct unwind_idx __stop_unwind_idx[];
95 95
96static DEFINE_SPINLOCK(unwind_lock); 96static DEFINE_RAW_SPINLOCK(unwind_lock);
97static LIST_HEAD(unwind_tables); 97static LIST_HEAD(unwind_tables);
98 98
99/* Convert a prel31 symbol to an absolute address */ 99/* Convert a prel31 symbol to an absolute address */
@@ -201,7 +201,7 @@ static const struct unwind_idx *unwind_find_idx(unsigned long addr)
201 /* module unwind tables */ 201 /* module unwind tables */
202 struct unwind_table *table; 202 struct unwind_table *table;
203 203
204 spin_lock_irqsave(&unwind_lock, flags); 204 raw_spin_lock_irqsave(&unwind_lock, flags);
205 list_for_each_entry(table, &unwind_tables, list) { 205 list_for_each_entry(table, &unwind_tables, list) {
206 if (addr >= table->begin_addr && 206 if (addr >= table->begin_addr &&
207 addr < table->end_addr) { 207 addr < table->end_addr) {
@@ -213,7 +213,7 @@ static const struct unwind_idx *unwind_find_idx(unsigned long addr)
213 break; 213 break;
214 } 214 }
215 } 215 }
216 spin_unlock_irqrestore(&unwind_lock, flags); 216 raw_spin_unlock_irqrestore(&unwind_lock, flags);
217 } 217 }
218 218
219 pr_debug("%s: idx = %p\n", __func__, idx); 219 pr_debug("%s: idx = %p\n", __func__, idx);
@@ -529,9 +529,9 @@ struct unwind_table *unwind_table_add(unsigned long start, unsigned long size,
529 tab->begin_addr = text_addr; 529 tab->begin_addr = text_addr;
530 tab->end_addr = text_addr + text_size; 530 tab->end_addr = text_addr + text_size;
531 531
532 spin_lock_irqsave(&unwind_lock, flags); 532 raw_spin_lock_irqsave(&unwind_lock, flags);
533 list_add_tail(&tab->list, &unwind_tables); 533 list_add_tail(&tab->list, &unwind_tables);
534 spin_unlock_irqrestore(&unwind_lock, flags); 534 raw_spin_unlock_irqrestore(&unwind_lock, flags);
535 535
536 return tab; 536 return tab;
537} 537}
@@ -543,9 +543,9 @@ void unwind_table_del(struct unwind_table *tab)
543 if (!tab) 543 if (!tab)
544 return; 544 return;
545 545
546 spin_lock_irqsave(&unwind_lock, flags); 546 raw_spin_lock_irqsave(&unwind_lock, flags);
547 list_del(&tab->list); 547 list_del(&tab->list);
548 spin_unlock_irqrestore(&unwind_lock, flags); 548 raw_spin_unlock_irqrestore(&unwind_lock, flags);
549 549
550 kfree(tab); 550 kfree(tab);
551} 551}
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index ad25fd1872c7..0bff0176db2c 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -39,7 +39,7 @@ $(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S
39$(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S 39$(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S
40 40
41ifeq ($(CONFIG_KERNEL_MODE_NEON),y) 41ifeq ($(CONFIG_KERNEL_MODE_NEON),y)
42 NEON_FLAGS := -mfloat-abi=softfp -mfpu=neon 42 NEON_FLAGS := -march=armv7-a -mfloat-abi=softfp -mfpu=neon
43 CFLAGS_xor-neon.o += $(NEON_FLAGS) 43 CFLAGS_xor-neon.o += $(NEON_FLAGS)
44 obj-$(CONFIG_XOR_BLOCKS) += xor-neon.o 44 obj-$(CONFIG_XOR_BLOCKS) += xor-neon.o
45endif 45endif
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index 93cddab73072..95bd35991288 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -7,7 +7,7 @@
7ENTRY( \name ) 7ENTRY( \name )
8UNWIND( .fnstart ) 8UNWIND( .fnstart )
9 ands ip, r1, #3 9 ands ip, r1, #3
10 strneb r1, [ip] @ assert word-aligned 10 strbne r1, [ip] @ assert word-aligned
11 mov r2, #1 11 mov r2, #1
12 and r3, r0, #31 @ Get bit offset 12 and r3, r0, #31 @ Get bit offset
13 mov r0, r0, lsr #5 13 mov r0, r0, lsr #5
@@ -32,7 +32,7 @@ ENDPROC(\name )
32ENTRY( \name ) 32ENTRY( \name )
33UNWIND( .fnstart ) 33UNWIND( .fnstart )
34 ands ip, r1, #3 34 ands ip, r1, #3
35 strneb r1, [ip] @ assert word-aligned 35 strbne r1, [ip] @ assert word-aligned
36 mov r2, #1 36 mov r2, #1
37 and r3, r0, #31 @ Get bit offset 37 and r3, r0, #31 @ Get bit offset
38 mov r0, r0, lsr #5 38 mov r0, r0, lsr #5
@@ -62,7 +62,7 @@ ENDPROC(\name )
62ENTRY( \name ) 62ENTRY( \name )
63UNWIND( .fnstart ) 63UNWIND( .fnstart )
64 ands ip, r1, #3 64 ands ip, r1, #3
65 strneb r1, [ip] @ assert word-aligned 65 strbne r1, [ip] @ assert word-aligned
66 and r2, r0, #31 66 and r2, r0, #31
67 mov r0, r0, lsr #5 67 mov r0, r0, lsr #5
68 mov r3, #1 68 mov r3, #1
@@ -89,7 +89,7 @@ ENDPROC(\name )
89ENTRY( \name ) 89ENTRY( \name )
90UNWIND( .fnstart ) 90UNWIND( .fnstart )
91 ands ip, r1, #3 91 ands ip, r1, #3
92 strneb r1, [ip] @ assert word-aligned 92 strbne r1, [ip] @ assert word-aligned
93 and r3, r0, #31 93 and r3, r0, #31
94 mov r0, r0, lsr #5 94 mov r0, r0, lsr #5
95 save_and_disable_irqs ip 95 save_and_disable_irqs ip
diff --git a/arch/arm/lib/clear_user.S b/arch/arm/lib/clear_user.S
index e936352ccb00..55946e3fa2ba 100644
--- a/arch/arm/lib/clear_user.S
+++ b/arch/arm/lib/clear_user.S
@@ -44,7 +44,7 @@ UNWIND(.save {r1, lr})
44 strusr r2, r0, 1, ne, rept=2 44 strusr r2, r0, 1, ne, rept=2
45 tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1 45 tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1
46 it ne @ explicit IT needed for the label 46 it ne @ explicit IT needed for the label
47USER( strnebt r2, [r0]) 47USER( strbtne r2, [r0])
48 mov r0, #0 48 mov r0, #0
49 ldmfd sp!, {r1, pc} 49 ldmfd sp!, {r1, pc}
50UNWIND(.fnend) 50UNWIND(.fnend)
diff --git a/arch/arm/lib/copy_from_user.S b/arch/arm/lib/copy_from_user.S
index 0d4c189c7f4f..6a3419e2c6d8 100644
--- a/arch/arm/lib/copy_from_user.S
+++ b/arch/arm/lib/copy_from_user.S
@@ -91,7 +91,7 @@
91 .endm 91 .endm
92 92
93 .macro str1b ptr reg cond=al abort 93 .macro str1b ptr reg cond=al abort
94 str\cond\()b \reg, [\ptr], #1 94 strb\cond \reg, [\ptr], #1
95 .endm 95 .endm
96 96
97 .macro enter reg1 reg2 97 .macro enter reg1 reg2
diff --git a/arch/arm/lib/copy_page.S b/arch/arm/lib/copy_page.S
index 6ee2f6706f86..b84ce1792043 100644
--- a/arch/arm/lib/copy_page.S
+++ b/arch/arm/lib/copy_page.S
@@ -39,9 +39,9 @@ ENTRY(copy_page)
39 .endr 39 .endr
40 subs r2, r2, #1 @ 1 40 subs r2, r2, #1 @ 1
41 stmia r0!, {r3, r4, ip, lr} @ 4 41 stmia r0!, {r3, r4, ip, lr} @ 4
42 ldmgtia r1!, {r3, r4, ip, lr} @ 4 42 ldmiagt r1!, {r3, r4, ip, lr} @ 4
43 bgt 1b @ 1 43 bgt 1b @ 1
44 PLD( ldmeqia r1!, {r3, r4, ip, lr} ) 44 PLD( ldmiaeq r1!, {r3, r4, ip, lr} )
45 PLD( beq 2b ) 45 PLD( beq 2b )
46 ldmfd sp!, {r4, pc} @ 3 46 ldmfd sp!, {r4, pc} @ 3
47ENDPROC(copy_page) 47ENDPROC(copy_page)
diff --git a/arch/arm/lib/copy_template.S b/arch/arm/lib/copy_template.S
index 652e4d98cd47..a11f2c25e03a 100644
--- a/arch/arm/lib/copy_template.S
+++ b/arch/arm/lib/copy_template.S
@@ -99,7 +99,7 @@
99 99
100 CALGN( ands ip, r0, #31 ) 100 CALGN( ands ip, r0, #31 )
101 CALGN( rsb r3, ip, #32 ) 101 CALGN( rsb r3, ip, #32 )
102 CALGN( sbcnes r4, r3, r2 ) @ C is always set here 102 CALGN( sbcsne r4, r3, r2 ) @ C is always set here
103 CALGN( bcs 2f ) 103 CALGN( bcs 2f )
104 CALGN( adr r4, 6f ) 104 CALGN( adr r4, 6f )
105 CALGN( subs r2, r2, r3 ) @ C gets set 105 CALGN( subs r2, r2, r3 ) @ C gets set
@@ -204,7 +204,7 @@
204 204
205 CALGN( ands ip, r0, #31 ) 205 CALGN( ands ip, r0, #31 )
206 CALGN( rsb ip, ip, #32 ) 206 CALGN( rsb ip, ip, #32 )
207 CALGN( sbcnes r4, ip, r2 ) @ C is always set here 207 CALGN( sbcsne r4, ip, r2 ) @ C is always set here
208 CALGN( subcc r2, r2, ip ) 208 CALGN( subcc r2, r2, ip )
209 CALGN( bcc 15f ) 209 CALGN( bcc 15f )
210 210
@@ -241,7 +241,7 @@
241 orr r9, r9, ip, lspush #\push 241 orr r9, r9, ip, lspush #\push
242 mov ip, ip, lspull #\pull 242 mov ip, ip, lspull #\pull
243 orr ip, ip, lr, lspush #\push 243 orr ip, ip, lr, lspush #\push
244 str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f 244 str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, abort=19f
245 bge 12b 245 bge 12b
246 PLD( cmn r2, #96 ) 246 PLD( cmn r2, #96 )
247 PLD( bge 13b ) 247 PLD( bge 13b )
diff --git a/arch/arm/lib/copy_to_user.S b/arch/arm/lib/copy_to_user.S
index 97a6ff4b7e3c..c7d08096e354 100644
--- a/arch/arm/lib/copy_to_user.S
+++ b/arch/arm/lib/copy_to_user.S
@@ -49,7 +49,7 @@
49 .endm 49 .endm
50 50
51 .macro ldr1b ptr reg cond=al abort 51 .macro ldr1b ptr reg cond=al abort
52 ldr\cond\()b \reg, [\ptr], #1 52 ldrb\cond \reg, [\ptr], #1
53 .endm 53 .endm
54 54
55#ifdef CONFIG_CPU_USE_DOMAINS 55#ifdef CONFIG_CPU_USE_DOMAINS
diff --git a/arch/arm/lib/csumpartial.S b/arch/arm/lib/csumpartial.S
index 984e0f29d548..bd84e2db353b 100644
--- a/arch/arm/lib/csumpartial.S
+++ b/arch/arm/lib/csumpartial.S
@@ -40,9 +40,9 @@ td3 .req lr
40 /* we must have at least one byte. */ 40 /* we must have at least one byte. */
41 tst buf, #1 @ odd address? 41 tst buf, #1 @ odd address?
42 movne sum, sum, ror #8 42 movne sum, sum, ror #8
43 ldrneb td0, [buf], #1 43 ldrbne td0, [buf], #1
44 subne len, len, #1 44 subne len, len, #1
45 adcnes sum, sum, td0, put_byte_1 45 adcsne sum, sum, td0, put_byte_1
46 46
47.Lless4: tst len, #6 47.Lless4: tst len, #6
48 beq .Lless8_byte 48 beq .Lless8_byte
@@ -68,8 +68,8 @@ td3 .req lr
68 bne .Lless8_wordlp 68 bne .Lless8_wordlp
69 69
70.Lless8_byte: tst len, #1 @ odd number of bytes 70.Lless8_byte: tst len, #1 @ odd number of bytes
71 ldrneb td0, [buf], #1 @ include last byte 71 ldrbne td0, [buf], #1 @ include last byte
72 adcnes sum, sum, td0, put_byte_0 @ update checksum 72 adcsne sum, sum, td0, put_byte_0 @ update checksum
73 73
74.Ldone: adc r0, sum, #0 @ collect up the last carry 74.Ldone: adc r0, sum, #0 @ collect up the last carry
75 ldr td0, [sp], #4 75 ldr td0, [sp], #4
@@ -78,17 +78,17 @@ td3 .req lr
78 ldr pc, [sp], #4 @ return 78 ldr pc, [sp], #4 @ return
79 79
80.Lnot_aligned: tst buf, #1 @ odd address 80.Lnot_aligned: tst buf, #1 @ odd address
81 ldrneb td0, [buf], #1 @ make even 81 ldrbne td0, [buf], #1 @ make even
82 subne len, len, #1 82 subne len, len, #1
83 adcnes sum, sum, td0, put_byte_1 @ update checksum 83 adcsne sum, sum, td0, put_byte_1 @ update checksum
84 84
85 tst buf, #2 @ 32-bit aligned? 85 tst buf, #2 @ 32-bit aligned?
86#if __LINUX_ARM_ARCH__ >= 4 86#if __LINUX_ARM_ARCH__ >= 4
87 ldrneh td0, [buf], #2 @ make 32-bit aligned 87 ldrhne td0, [buf], #2 @ make 32-bit aligned
88 subne len, len, #2 88 subne len, len, #2
89#else 89#else
90 ldrneb td0, [buf], #1 90 ldrbne td0, [buf], #1
91 ldrneb ip, [buf], #1 91 ldrbne ip, [buf], #1
92 subne len, len, #2 92 subne len, len, #2
93#ifndef __ARMEB__ 93#ifndef __ARMEB__
94 orrne td0, td0, ip, lsl #8 94 orrne td0, td0, ip, lsl #8
@@ -96,7 +96,7 @@ td3 .req lr
96 orrne td0, ip, td0, lsl #8 96 orrne td0, ip, td0, lsl #8
97#endif 97#endif
98#endif 98#endif
99 adcnes sum, sum, td0 @ update checksum 99 adcsne sum, sum, td0 @ update checksum
100 ret lr 100 ret lr
101 101
102ENTRY(csum_partial) 102ENTRY(csum_partial)
diff --git a/arch/arm/lib/csumpartialcopygeneric.S b/arch/arm/lib/csumpartialcopygeneric.S
index 10b45909610c..08e17758cbea 100644
--- a/arch/arm/lib/csumpartialcopygeneric.S
+++ b/arch/arm/lib/csumpartialcopygeneric.S
@@ -148,9 +148,9 @@ FN_ENTRY
148 strb r5, [dst], #1 148 strb r5, [dst], #1
149 mov r5, r4, get_byte_2 149 mov r5, r4, get_byte_2
150.Lexit: tst len, #1 150.Lexit: tst len, #1
151 strneb r5, [dst], #1 151 strbne r5, [dst], #1
152 andne r5, r5, #255 152 andne r5, r5, #255
153 adcnes sum, sum, r5, put_byte_0 153 adcsne sum, sum, r5, put_byte_0
154 154
155 /* 155 /*
156 * If the dst pointer was not 16-bit aligned, we 156 * If the dst pointer was not 16-bit aligned, we
diff --git a/arch/arm/lib/csumpartialcopyuser.S b/arch/arm/lib/csumpartialcopyuser.S
index b83fdc06286a..f4716d98e0b4 100644
--- a/arch/arm/lib/csumpartialcopyuser.S
+++ b/arch/arm/lib/csumpartialcopyuser.S
@@ -95,7 +95,7 @@
95 add r2, r2, r1 95 add r2, r2, r1
96 mov r0, #0 @ zero the buffer 96 mov r0, #0 @ zero the buffer
979002: teq r2, r1 979002: teq r2, r1
98 strneb r0, [r1], #1 98 strbne r0, [r1], #1
99 bne 9002b 99 bne 9002b
100 load_regs 100 load_regs
101 .popsection 101 .popsection
diff --git a/arch/arm/lib/div64.S b/arch/arm/lib/div64.S
index a9eafe4981eb..4d80f690c48b 100644
--- a/arch/arm/lib/div64.S
+++ b/arch/arm/lib/div64.S
@@ -88,8 +88,8 @@ UNWIND(.fnstart)
88 @ Break out early if dividend reaches 0. 88 @ Break out early if dividend reaches 0.
892: cmp xh, yl 892: cmp xh, yl
90 orrcs yh, yh, ip 90 orrcs yh, yh, ip
91 subcss xh, xh, yl 91 subscs xh, xh, yl
92 movnes ip, ip, lsr #1 92 movsne ip, ip, lsr #1
93 mov yl, yl, lsr #1 93 mov yl, yl, lsr #1
94 bne 2b 94 bne 2b
95 95
diff --git a/arch/arm/lib/floppydma.S b/arch/arm/lib/floppydma.S
index 617150b1baef..de68d3b343e3 100644
--- a/arch/arm/lib/floppydma.S
+++ b/arch/arm/lib/floppydma.S
@@ -14,8 +14,8 @@
14 .global floppy_fiqin_end 14 .global floppy_fiqin_end
15ENTRY(floppy_fiqin_start) 15ENTRY(floppy_fiqin_start)
16 subs r9, r9, #1 16 subs r9, r9, #1
17 ldrgtb r12, [r11, #-4] 17 ldrbgt r12, [r11, #-4]
18 ldrleb r12, [r11], #0 18 ldrble r12, [r11], #0
19 strb r12, [r10], #1 19 strb r12, [r10], #1
20 subs pc, lr, #4 20 subs pc, lr, #4
21floppy_fiqin_end: 21floppy_fiqin_end:
@@ -23,10 +23,10 @@ floppy_fiqin_end:
23 .global floppy_fiqout_end 23 .global floppy_fiqout_end
24ENTRY(floppy_fiqout_start) 24ENTRY(floppy_fiqout_start)
25 subs r9, r9, #1 25 subs r9, r9, #1
26 ldrgeb r12, [r10], #1 26 ldrbge r12, [r10], #1
27 movlt r12, #0 27 movlt r12, #0
28 strleb r12, [r11], #0 28 strble r12, [r11], #0
29 subles pc, lr, #4 29 subsle pc, lr, #4
30 strb r12, [r11, #-4] 30 strb r12, [r11, #-4]
31 subs pc, lr, #4 31 subs pc, lr, #4
32floppy_fiqout_end: 32floppy_fiqout_end:
diff --git a/arch/arm/lib/io-readsb.S b/arch/arm/lib/io-readsb.S
index c31b2f3153f1..91038a0a77b5 100644
--- a/arch/arm/lib/io-readsb.S
+++ b/arch/arm/lib/io-readsb.S
@@ -16,10 +16,10 @@
16 cmp ip, #2 16 cmp ip, #2
17 ldrb r3, [r0] 17 ldrb r3, [r0]
18 strb r3, [r1], #1 18 strb r3, [r1], #1
19 ldrgeb r3, [r0] 19 ldrbge r3, [r0]
20 strgeb r3, [r1], #1 20 strbge r3, [r1], #1
21 ldrgtb r3, [r0] 21 ldrbgt r3, [r0]
22 strgtb r3, [r1], #1 22 strbgt r3, [r1], #1
23 subs r2, r2, ip 23 subs r2, r2, ip
24 bne .Linsb_aligned 24 bne .Linsb_aligned
25 25
@@ -72,7 +72,7 @@ ENTRY(__raw_readsb)
72 bpl .Linsb_16_lp 72 bpl .Linsb_16_lp
73 73
74 tst r2, #15 74 tst r2, #15
75 ldmeqfd sp!, {r4 - r6, pc} 75 ldmfdeq sp!, {r4 - r6, pc}
76 76
77.Linsb_no_16: tst r2, #8 77.Linsb_no_16: tst r2, #8
78 beq .Linsb_no_8 78 beq .Linsb_no_8
@@ -109,15 +109,15 @@ ENTRY(__raw_readsb)
109 str r3, [r1], #4 109 str r3, [r1], #4
110 110
111.Linsb_no_4: ands r2, r2, #3 111.Linsb_no_4: ands r2, r2, #3
112 ldmeqfd sp!, {r4 - r6, pc} 112 ldmfdeq sp!, {r4 - r6, pc}
113 113
114 cmp r2, #2 114 cmp r2, #2
115 ldrb r3, [r0] 115 ldrb r3, [r0]
116 strb r3, [r1], #1 116 strb r3, [r1], #1
117 ldrgeb r3, [r0] 117 ldrbge r3, [r0]
118 strgeb r3, [r1], #1 118 strbge r3, [r1], #1
119 ldrgtb r3, [r0] 119 ldrbgt r3, [r0]
120 strgtb r3, [r1] 120 strbgt r3, [r1]
121 121
122 ldmfd sp!, {r4 - r6, pc} 122 ldmfd sp!, {r4 - r6, pc}
123ENDPROC(__raw_readsb) 123ENDPROC(__raw_readsb)
diff --git a/arch/arm/lib/io-readsl.S b/arch/arm/lib/io-readsl.S
index 2ed86fa5465f..f2e2064318d2 100644
--- a/arch/arm/lib/io-readsl.S
+++ b/arch/arm/lib/io-readsl.S
@@ -30,7 +30,7 @@ ENTRY(__raw_readsl)
302: movs r2, r2, lsl #31 302: movs r2, r2, lsl #31
31 ldrcs r3, [r0, #0] 31 ldrcs r3, [r0, #0]
32 ldrcs ip, [r0, #0] 32 ldrcs ip, [r0, #0]
33 stmcsia r1!, {r3, ip} 33 stmiacs r1!, {r3, ip}
34 ldrne r3, [r0, #0] 34 ldrne r3, [r0, #0]
35 strne r3, [r1, #0] 35 strne r3, [r1, #0]
36 ret lr 36 ret lr
diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S
index 413da9914529..8b25b69c516e 100644
--- a/arch/arm/lib/io-readsw-armv3.S
+++ b/arch/arm/lib/io-readsw-armv3.S
@@ -68,7 +68,7 @@ ENTRY(__raw_readsw)
68 bpl .Linsw_8_lp 68 bpl .Linsw_8_lp
69 69
70 tst r2, #7 70 tst r2, #7
71 ldmeqfd sp!, {r4, r5, r6, pc} 71 ldmfdeq sp!, {r4, r5, r6, pc}
72 72
73.Lno_insw_8: tst r2, #4 73.Lno_insw_8: tst r2, #4
74 beq .Lno_insw_4 74 beq .Lno_insw_4
@@ -97,9 +97,9 @@ ENTRY(__raw_readsw)
97 97
98.Lno_insw_2: tst r2, #1 98.Lno_insw_2: tst r2, #1
99 ldrne r3, [r0] 99 ldrne r3, [r0]
100 strneb r3, [r1], #1 100 strbne r3, [r1], #1
101 movne r3, r3, lsr #8 101 movne r3, r3, lsr #8
102 strneb r3, [r1] 102 strbne r3, [r1]
103 103
104 ldmfd sp!, {r4, r5, r6, pc} 104 ldmfd sp!, {r4, r5, r6, pc}
105 105
diff --git a/arch/arm/lib/io-readsw-armv4.S b/arch/arm/lib/io-readsw-armv4.S
index d9a45e9692ae..5efdd66f5dcd 100644
--- a/arch/arm/lib/io-readsw-armv4.S
+++ b/arch/arm/lib/io-readsw-armv4.S
@@ -76,8 +76,8 @@ ENTRY(__raw_readsw)
76 pack r3, r3, ip 76 pack r3, r3, ip
77 str r3, [r1], #4 77 str r3, [r1], #4
78 78
79.Lno_insw_2: ldrneh r3, [r0] 79.Lno_insw_2: ldrhne r3, [r0]
80 strneh r3, [r1] 80 strhne r3, [r1]
81 81
82 ldmfd sp!, {r4, r5, pc} 82 ldmfd sp!, {r4, r5, pc}
83 83
@@ -94,7 +94,7 @@ ENTRY(__raw_readsw)
94#endif 94#endif
95 95
96.Linsw_noalign: stmfd sp!, {r4, lr} 96.Linsw_noalign: stmfd sp!, {r4, lr}
97 ldrccb ip, [r1, #-1]! 97 ldrbcc ip, [r1, #-1]!
98 bcc 1f 98 bcc 1f
99 99
100 ldrh ip, [r0] 100 ldrh ip, [r0]
@@ -121,11 +121,11 @@ ENTRY(__raw_readsw)
121 121
1223: tst r2, #1 1223: tst r2, #1
123 strb ip, [r1], #1 123 strb ip, [r1], #1
124 ldrneh ip, [r0] 124 ldrhne ip, [r0]
125 _BE_ONLY_( movne ip, ip, ror #8 ) 125 _BE_ONLY_( movne ip, ip, ror #8 )
126 strneb ip, [r1], #1 126 strbne ip, [r1], #1
127 _LE_ONLY_( movne ip, ip, lsr #8 ) 127 _LE_ONLY_( movne ip, ip, lsr #8 )
128 _BE_ONLY_( movne ip, ip, lsr #24 ) 128 _BE_ONLY_( movne ip, ip, lsr #24 )
129 strneb ip, [r1] 129 strbne ip, [r1]
130 ldmfd sp!, {r4, pc} 130 ldmfd sp!, {r4, pc}
131ENDPROC(__raw_readsw) 131ENDPROC(__raw_readsw)
diff --git a/arch/arm/lib/io-writesb.S b/arch/arm/lib/io-writesb.S
index a46bbc9b168b..7d2881a2381e 100644
--- a/arch/arm/lib/io-writesb.S
+++ b/arch/arm/lib/io-writesb.S
@@ -36,10 +36,10 @@
36 cmp ip, #2 36 cmp ip, #2
37 ldrb r3, [r1], #1 37 ldrb r3, [r1], #1
38 strb r3, [r0] 38 strb r3, [r0]
39 ldrgeb r3, [r1], #1 39 ldrbge r3, [r1], #1
40 strgeb r3, [r0] 40 strbge r3, [r0]
41 ldrgtb r3, [r1], #1 41 ldrbgt r3, [r1], #1
42 strgtb r3, [r0] 42 strbgt r3, [r0]
43 subs r2, r2, ip 43 subs r2, r2, ip
44 bne .Loutsb_aligned 44 bne .Loutsb_aligned
45 45
@@ -64,7 +64,7 @@ ENTRY(__raw_writesb)
64 bpl .Loutsb_16_lp 64 bpl .Loutsb_16_lp
65 65
66 tst r2, #15 66 tst r2, #15
67 ldmeqfd sp!, {r4, r5, pc} 67 ldmfdeq sp!, {r4, r5, pc}
68 68
69.Loutsb_no_16: tst r2, #8 69.Loutsb_no_16: tst r2, #8
70 beq .Loutsb_no_8 70 beq .Loutsb_no_8
@@ -80,15 +80,15 @@ ENTRY(__raw_writesb)
80 outword r3 80 outword r3
81 81
82.Loutsb_no_4: ands r2, r2, #3 82.Loutsb_no_4: ands r2, r2, #3
83 ldmeqfd sp!, {r4, r5, pc} 83 ldmfdeq sp!, {r4, r5, pc}
84 84
85 cmp r2, #2 85 cmp r2, #2
86 ldrb r3, [r1], #1 86 ldrb r3, [r1], #1
87 strb r3, [r0] 87 strb r3, [r0]
88 ldrgeb r3, [r1], #1 88 ldrbge r3, [r1], #1
89 strgeb r3, [r0] 89 strbge r3, [r0]
90 ldrgtb r3, [r1] 90 ldrbgt r3, [r1]
91 strgtb r3, [r0] 91 strbgt r3, [r0]
92 92
93 ldmfd sp!, {r4, r5, pc} 93 ldmfd sp!, {r4, r5, pc}
94ENDPROC(__raw_writesb) 94ENDPROC(__raw_writesb)
diff --git a/arch/arm/lib/io-writesl.S b/arch/arm/lib/io-writesl.S
index 4ea2435988c1..7596ac0c90b0 100644
--- a/arch/arm/lib/io-writesl.S
+++ b/arch/arm/lib/io-writesl.S
@@ -28,7 +28,7 @@ ENTRY(__raw_writesl)
28 bpl 1b 28 bpl 1b
29 ldmfd sp!, {r4, lr} 29 ldmfd sp!, {r4, lr}
302: movs r2, r2, lsl #31 302: movs r2, r2, lsl #31
31 ldmcsia r1!, {r3, ip} 31 ldmiacs r1!, {r3, ip}
32 strcs r3, [r0, #0] 32 strcs r3, [r0, #0]
33 ldrne r3, [r1, #0] 33 ldrne r3, [r1, #0]
34 strcs ip, [r0, #0] 34 strcs ip, [r0, #0]
diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S
index 121789eb6802..cb94b9b49405 100644
--- a/arch/arm/lib/io-writesw-armv3.S
+++ b/arch/arm/lib/io-writesw-armv3.S
@@ -79,7 +79,7 @@ ENTRY(__raw_writesw)
79 bpl .Loutsw_8_lp 79 bpl .Loutsw_8_lp
80 80
81 tst r2, #7 81 tst r2, #7
82 ldmeqfd sp!, {r4, r5, r6, pc} 82 ldmfdeq sp!, {r4, r5, r6, pc}
83 83
84.Lno_outsw_8: tst r2, #4 84.Lno_outsw_8: tst r2, #4
85 beq .Lno_outsw_4 85 beq .Lno_outsw_4
diff --git a/arch/arm/lib/io-writesw-armv4.S b/arch/arm/lib/io-writesw-armv4.S
index 269f90c51ad2..e6645b2f249e 100644
--- a/arch/arm/lib/io-writesw-armv4.S
+++ b/arch/arm/lib/io-writesw-armv4.S
@@ -61,8 +61,8 @@ ENTRY(__raw_writesw)
61 ldr r3, [r1], #4 61 ldr r3, [r1], #4
62 outword r3 62 outword r3
63 63
64.Lno_outsw_2: ldrneh r3, [r1] 64.Lno_outsw_2: ldrhne r3, [r1]
65 strneh r3, [r0] 65 strhne r3, [r0]
66 66
67 ldmfd sp!, {r4, r5, pc} 67 ldmfd sp!, {r4, r5, pc}
68 68
@@ -95,6 +95,6 @@ ENTRY(__raw_writesw)
95 95
96 tst r2, #1 96 tst r2, #1
973: movne ip, r3, lsr #8 973: movne ip, r3, lsr #8
98 strneh ip, [r0] 98 strhne ip, [r0]
99 ret lr 99 ret lr
100ENDPROC(__raw_writesw) 100ENDPROC(__raw_writesw)
diff --git a/arch/arm/lib/lib1funcs.S b/arch/arm/lib/lib1funcs.S
index 9397b2e532af..c23f9d9e2970 100644
--- a/arch/arm/lib/lib1funcs.S
+++ b/arch/arm/lib/lib1funcs.S
@@ -96,7 +96,7 @@ Boston, MA 02111-1307, USA. */
96 subhs \dividend, \dividend, \divisor, lsr #3 96 subhs \dividend, \dividend, \divisor, lsr #3
97 orrhs \result, \result, \curbit, lsr #3 97 orrhs \result, \result, \curbit, lsr #3
98 cmp \dividend, #0 @ Early termination? 98 cmp \dividend, #0 @ Early termination?
99 movnes \curbit, \curbit, lsr #4 @ No, any more bits to do? 99 movsne \curbit, \curbit, lsr #4 @ No, any more bits to do?
100 movne \divisor, \divisor, lsr #4 100 movne \divisor, \divisor, lsr #4
101 bne 1b 101 bne 1b
102 102
@@ -182,7 +182,7 @@ Boston, MA 02111-1307, USA. */
182 subhs \dividend, \dividend, \divisor, lsr #3 182 subhs \dividend, \dividend, \divisor, lsr #3
183 cmp \dividend, #1 183 cmp \dividend, #1
184 mov \divisor, \divisor, lsr #4 184 mov \divisor, \divisor, lsr #4
185 subges \order, \order, #4 185 subsge \order, \order, #4
186 bge 1b 186 bge 1b
187 187
188 tst \order, #3 188 tst \order, #3
diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S
index 64111bd4440b..4a6997bb4404 100644
--- a/arch/arm/lib/memcpy.S
+++ b/arch/arm/lib/memcpy.S
@@ -30,7 +30,7 @@
30 .endm 30 .endm
31 31
32 .macro ldr1b ptr reg cond=al abort 32 .macro ldr1b ptr reg cond=al abort
33 ldr\cond\()b \reg, [\ptr], #1 33 ldrb\cond \reg, [\ptr], #1
34 .endm 34 .endm
35 35
36 .macro str1w ptr reg abort 36 .macro str1w ptr reg abort
@@ -42,7 +42,7 @@
42 .endm 42 .endm
43 43
44 .macro str1b ptr reg cond=al abort 44 .macro str1b ptr reg cond=al abort
45 str\cond\()b \reg, [\ptr], #1 45 strb\cond \reg, [\ptr], #1
46 .endm 46 .endm
47 47
48 .macro enter reg1 reg2 48 .macro enter reg1 reg2
diff --git a/arch/arm/lib/memmove.S b/arch/arm/lib/memmove.S
index 69a9d47fc5ab..d70304cb2cd0 100644
--- a/arch/arm/lib/memmove.S
+++ b/arch/arm/lib/memmove.S
@@ -59,7 +59,7 @@ ENTRY(memmove)
59 blt 5f 59 blt 5f
60 60
61 CALGN( ands ip, r0, #31 ) 61 CALGN( ands ip, r0, #31 )
62 CALGN( sbcnes r4, ip, r2 ) @ C is always set here 62 CALGN( sbcsne r4, ip, r2 ) @ C is always set here
63 CALGN( bcs 2f ) 63 CALGN( bcs 2f )
64 CALGN( adr r4, 6f ) 64 CALGN( adr r4, 6f )
65 CALGN( subs r2, r2, ip ) @ C is set here 65 CALGN( subs r2, r2, ip ) @ C is set here
@@ -114,20 +114,20 @@ ENTRY(memmove)
114 UNWIND( .save {r0, r4, lr} ) @ still in first stmfd block 114 UNWIND( .save {r0, r4, lr} ) @ still in first stmfd block
115 115
1168: movs r2, r2, lsl #31 1168: movs r2, r2, lsl #31
117 ldrneb r3, [r1, #-1]! 117 ldrbne r3, [r1, #-1]!
118 ldrcsb r4, [r1, #-1]! 118 ldrbcs r4, [r1, #-1]!
119 ldrcsb ip, [r1, #-1] 119 ldrbcs ip, [r1, #-1]
120 strneb r3, [r0, #-1]! 120 strbne r3, [r0, #-1]!
121 strcsb r4, [r0, #-1]! 121 strbcs r4, [r0, #-1]!
122 strcsb ip, [r0, #-1] 122 strbcs ip, [r0, #-1]
123 ldmfd sp!, {r0, r4, pc} 123 ldmfd sp!, {r0, r4, pc}
124 124
1259: cmp ip, #2 1259: cmp ip, #2
126 ldrgtb r3, [r1, #-1]! 126 ldrbgt r3, [r1, #-1]!
127 ldrgeb r4, [r1, #-1]! 127 ldrbge r4, [r1, #-1]!
128 ldrb lr, [r1, #-1]! 128 ldrb lr, [r1, #-1]!
129 strgtb r3, [r0, #-1]! 129 strbgt r3, [r0, #-1]!
130 strgeb r4, [r0, #-1]! 130 strbge r4, [r0, #-1]!
131 subs r2, r2, ip 131 subs r2, r2, ip
132 strb lr, [r0, #-1]! 132 strb lr, [r0, #-1]!
133 blt 8b 133 blt 8b
@@ -150,7 +150,7 @@ ENTRY(memmove)
150 blt 14f 150 blt 14f
151 151
152 CALGN( ands ip, r0, #31 ) 152 CALGN( ands ip, r0, #31 )
153 CALGN( sbcnes r4, ip, r2 ) @ C is always set here 153 CALGN( sbcsne r4, ip, r2 ) @ C is always set here
154 CALGN( subcc r2, r2, ip ) 154 CALGN( subcc r2, r2, ip )
155 CALGN( bcc 15f ) 155 CALGN( bcc 15f )
156 156
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index ed6d35d9cdb5..5593a45e0a8c 100644
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -44,20 +44,20 @@ UNWIND( .save {r8, lr} )
44 mov lr, r3 44 mov lr, r3
45 45
462: subs r2, r2, #64 462: subs r2, r2, #64
47 stmgeia ip!, {r1, r3, r8, lr} @ 64 bytes at a time. 47 stmiage ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
48 stmgeia ip!, {r1, r3, r8, lr} 48 stmiage ip!, {r1, r3, r8, lr}
49 stmgeia ip!, {r1, r3, r8, lr} 49 stmiage ip!, {r1, r3, r8, lr}
50 stmgeia ip!, {r1, r3, r8, lr} 50 stmiage ip!, {r1, r3, r8, lr}
51 bgt 2b 51 bgt 2b
52 ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go. 52 ldmfdeq sp!, {r8, pc} @ Now <64 bytes to go.
53/* 53/*
54 * No need to correct the count; we're only testing bits from now on 54 * No need to correct the count; we're only testing bits from now on
55 */ 55 */
56 tst r2, #32 56 tst r2, #32
57 stmneia ip!, {r1, r3, r8, lr} 57 stmiane ip!, {r1, r3, r8, lr}
58 stmneia ip!, {r1, r3, r8, lr} 58 stmiane ip!, {r1, r3, r8, lr}
59 tst r2, #16 59 tst r2, #16
60 stmneia ip!, {r1, r3, r8, lr} 60 stmiane ip!, {r1, r3, r8, lr}
61 ldmfd sp!, {r8, lr} 61 ldmfd sp!, {r8, lr}
62UNWIND( .fnend ) 62UNWIND( .fnend )
63 63
@@ -87,22 +87,22 @@ UNWIND( .save {r4-r8, lr} )
87 rsb r8, r8, #32 87 rsb r8, r8, #32
88 sub r2, r2, r8 88 sub r2, r2, r8
89 movs r8, r8, lsl #(32 - 4) 89 movs r8, r8, lsl #(32 - 4)
90 stmcsia ip!, {r4, r5, r6, r7} 90 stmiacs ip!, {r4, r5, r6, r7}
91 stmmiia ip!, {r4, r5} 91 stmiami ip!, {r4, r5}
92 tst r8, #(1 << 30) 92 tst r8, #(1 << 30)
93 mov r8, r1 93 mov r8, r1
94 strne r1, [ip], #4 94 strne r1, [ip], #4
95 95
963: subs r2, r2, #64 963: subs r2, r2, #64
97 stmgeia ip!, {r1, r3-r8, lr} 97 stmiage ip!, {r1, r3-r8, lr}
98 stmgeia ip!, {r1, r3-r8, lr} 98 stmiage ip!, {r1, r3-r8, lr}
99 bgt 3b 99 bgt 3b
100 ldmeqfd sp!, {r4-r8, pc} 100 ldmfdeq sp!, {r4-r8, pc}
101 101
102 tst r2, #32 102 tst r2, #32
103 stmneia ip!, {r1, r3-r8, lr} 103 stmiane ip!, {r1, r3-r8, lr}
104 tst r2, #16 104 tst r2, #16
105 stmneia ip!, {r4-r7} 105 stmiane ip!, {r4-r7}
106 ldmfd sp!, {r4-r8, lr} 106 ldmfd sp!, {r4-r8, lr}
107UNWIND( .fnend ) 107UNWIND( .fnend )
108 108
@@ -110,7 +110,7 @@ UNWIND( .fnend )
110 110
111UNWIND( .fnstart ) 111UNWIND( .fnstart )
1124: tst r2, #8 1124: tst r2, #8
113 stmneia ip!, {r1, r3} 113 stmiane ip!, {r1, r3}
114 tst r2, #4 114 tst r2, #4
115 strne r1, [ip], #4 115 strne r1, [ip], #4
116/* 116/*
@@ -118,17 +118,17 @@ UNWIND( .fnstart )
118 * may have an unaligned pointer as well. 118 * may have an unaligned pointer as well.
119 */ 119 */
1205: tst r2, #2 1205: tst r2, #2
121 strneb r1, [ip], #1 121 strbne r1, [ip], #1
122 strneb r1, [ip], #1 122 strbne r1, [ip], #1
123 tst r2, #1 123 tst r2, #1
124 strneb r1, [ip], #1 124 strbne r1, [ip], #1
125 ret lr 125 ret lr
126 126
1276: subs r2, r2, #4 @ 1 do we have enough 1276: subs r2, r2, #4 @ 1 do we have enough
128 blt 5b @ 1 bytes to align with? 128 blt 5b @ 1 bytes to align with?
129 cmp r3, #2 @ 1 129 cmp r3, #2 @ 1
130 strltb r1, [ip], #1 @ 1 130 strblt r1, [ip], #1 @ 1
131 strleb r1, [ip], #1 @ 1 131 strble r1, [ip], #1 @ 1
132 strb r1, [ip], #1 @ 1 132 strb r1, [ip], #1 @ 1
133 add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3)) 133 add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
134 b 1b 134 b 1b
diff --git a/arch/arm/lib/xor-neon.c b/arch/arm/lib/xor-neon.c
index 2c40aeab3eaa..c691b901092f 100644
--- a/arch/arm/lib/xor-neon.c
+++ b/arch/arm/lib/xor-neon.c
@@ -14,7 +14,7 @@
14MODULE_LICENSE("GPL"); 14MODULE_LICENSE("GPL");
15 15
16#ifndef __ARM_NEON__ 16#ifndef __ARM_NEON__
17#error You should compile this file with '-mfloat-abi=softfp -mfpu=neon' 17#error You should compile this file with '-march=armv7-a -mfloat-abi=softfp -mfpu=neon'
18#endif 18#endif
19 19
20/* 20/*
diff --git a/arch/arm/mach-ks8695/include/mach/entry-macro.S b/arch/arm/mach-ks8695/include/mach/entry-macro.S
index 8315b34f32ff..7ff812cb010b 100644
--- a/arch/arm/mach-ks8695/include/mach/entry-macro.S
+++ b/arch/arm/mach-ks8695/include/mach/entry-macro.S
@@ -42,6 +42,6 @@
42 moveq \irqstat, \irqstat, lsr #2 42 moveq \irqstat, \irqstat, lsr #2
43 addeq \irqnr, \irqnr, #2 43 addeq \irqnr, \irqnr, #2
44 tst \irqstat, #0x01 44 tst \irqstat, #0x01
45 addeqs \irqnr, \irqnr, #1 45 addseq \irqnr, \irqnr, #1
461001: 461001:
47 .endm 47 .endm
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 058a37e6d11c..fd6e0671f957 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -523,8 +523,10 @@ void omap_prm_reset_system(void)
523 523
524 prm_ll_data->reset_system(); 524 prm_ll_data->reset_system();
525 525
526 while (1) 526 while (1) {
527 cpu_relax(); 527 cpu_relax();
528 wfe();
529 }
528} 530}
529 531
530/** 532/**
diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
index 805f306fa6f7..e22ccf87eded 100644
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -172,7 +172,7 @@ after_errata:
172 mov32 r5, TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET 172 mov32 r5, TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET
173 mov r0, #CPU_NOT_RESETTABLE 173 mov r0, #CPU_NOT_RESETTABLE
174 cmp r10, #0 174 cmp r10, #0
175 strneb r0, [r5, #__tegra20_cpu1_resettable_status_offset] 175 strbne r0, [r5, #__tegra20_cpu1_resettable_status_offset]
1761: 1761:
177#endif 177#endif
178 178
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index 24659952c278..be68d62566c7 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -215,8 +215,8 @@ v6_dma_inv_range:
215#endif 215#endif
216 tst r1, #D_CACHE_LINE_SIZE - 1 216 tst r1, #D_CACHE_LINE_SIZE - 1
217#ifdef CONFIG_DMA_CACHE_RWFO 217#ifdef CONFIG_DMA_CACHE_RWFO
218 ldrneb r2, [r1, #-1] @ read for ownership 218 ldrbne r2, [r1, #-1] @ read for ownership
219 strneb r2, [r1, #-1] @ write for ownership 219 strbne r2, [r1, #-1] @ write for ownership
220#endif 220#endif
221 bic r1, r1, #D_CACHE_LINE_SIZE - 1 221 bic r1, r1, #D_CACHE_LINE_SIZE - 1
222#ifdef HARVARD_CACHE 222#ifdef HARVARD_CACHE
@@ -284,8 +284,8 @@ ENTRY(v6_dma_flush_range)
284 add r0, r0, #D_CACHE_LINE_SIZE 284 add r0, r0, #D_CACHE_LINE_SIZE
285 cmp r0, r1 285 cmp r0, r1
286#ifdef CONFIG_DMA_CACHE_RWFO 286#ifdef CONFIG_DMA_CACHE_RWFO
287 ldrlob r2, [r0] @ read for ownership 287 ldrblo r2, [r0] @ read for ownership
288 strlob r2, [r0] @ write for ownership 288 strblo r2, [r0] @ write for ownership
289#endif 289#endif
290 blo 1b 290 blo 1b
291 mov r0, #0 291 mov r0, #0
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index b03202cddddb..f74cdce6d4da 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -45,6 +45,7 @@ static void mc_copy_user_page(void *from, void *to)
45 int tmp; 45 int tmp;
46 46
47 asm volatile ("\ 47 asm volatile ("\
48 .syntax unified\n\
48 ldmia %0!, {r2, r3, ip, lr} @ 4\n\ 49 ldmia %0!, {r2, r3, ip, lr} @ 4\n\
491: mcr p15, 0, %1, c7, c6, 1 @ 1 invalidate D line\n\ 501: mcr p15, 0, %1, c7, c6, 1 @ 1 invalidate D line\n\
50 stmia %1!, {r2, r3, ip, lr} @ 4\n\ 51 stmia %1!, {r2, r3, ip, lr} @ 4\n\
@@ -56,7 +57,7 @@ static void mc_copy_user_page(void *from, void *to)
56 ldmia %0!, {r2, r3, ip, lr} @ 4\n\ 57 ldmia %0!, {r2, r3, ip, lr} @ 4\n\
57 subs %2, %2, #1 @ 1\n\ 58 subs %2, %2, #1 @ 1\n\
58 stmia %1!, {r2, r3, ip, lr} @ 4\n\ 59 stmia %1!, {r2, r3, ip, lr} @ 4\n\
59 ldmneia %0!, {r2, r3, ip, lr} @ 4\n\ 60 ldmiane %0!, {r2, r3, ip, lr} @ 4\n\
60 bne 1b @ " 61 bne 1b @ "
61 : "+&r" (from), "+&r" (to), "=&r" (tmp) 62 : "+&r" (from), "+&r" (to), "=&r" (tmp)
62 : "2" (PAGE_SIZE / 64) 63 : "2" (PAGE_SIZE / 64)
diff --git a/arch/arm/mm/copypage-v4wb.c b/arch/arm/mm/copypage-v4wb.c
index cd3e165afeed..6d336740aae4 100644
--- a/arch/arm/mm/copypage-v4wb.c
+++ b/arch/arm/mm/copypage-v4wb.c
@@ -27,6 +27,7 @@ static void v4wb_copy_user_page(void *kto, const void *kfrom)
27 int tmp; 27 int tmp;
28 28
29 asm volatile ("\ 29 asm volatile ("\
30 .syntax unified\n\
30 ldmia %1!, {r3, r4, ip, lr} @ 4\n\ 31 ldmia %1!, {r3, r4, ip, lr} @ 4\n\
311: mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\ 321: mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\
32 stmia %0!, {r3, r4, ip, lr} @ 4\n\ 33 stmia %0!, {r3, r4, ip, lr} @ 4\n\
@@ -38,7 +39,7 @@ static void v4wb_copy_user_page(void *kto, const void *kfrom)
38 ldmia %1!, {r3, r4, ip, lr} @ 4\n\ 39 ldmia %1!, {r3, r4, ip, lr} @ 4\n\
39 subs %2, %2, #1 @ 1\n\ 40 subs %2, %2, #1 @ 1\n\
40 stmia %0!, {r3, r4, ip, lr} @ 4\n\ 41 stmia %0!, {r3, r4, ip, lr} @ 4\n\
41 ldmneia %1!, {r3, r4, ip, lr} @ 4\n\ 42 ldmiane %1!, {r3, r4, ip, lr} @ 4\n\
42 bne 1b @ 1\n\ 43 bne 1b @ 1\n\
43 mcr p15, 0, %1, c7, c10, 4 @ 1 drain WB" 44 mcr p15, 0, %1, c7, c10, 4 @ 1 drain WB"
44 : "+&r" (kto), "+&r" (kfrom), "=&r" (tmp) 45 : "+&r" (kto), "+&r" (kfrom), "=&r" (tmp)
diff --git a/arch/arm/mm/copypage-v4wt.c b/arch/arm/mm/copypage-v4wt.c
index 8614572e1296..3851bb396442 100644
--- a/arch/arm/mm/copypage-v4wt.c
+++ b/arch/arm/mm/copypage-v4wt.c
@@ -25,6 +25,7 @@ static void v4wt_copy_user_page(void *kto, const void *kfrom)
25 int tmp; 25 int tmp;
26 26
27 asm volatile ("\ 27 asm volatile ("\
28 .syntax unified\n\
28 ldmia %1!, {r3, r4, ip, lr} @ 4\n\ 29 ldmia %1!, {r3, r4, ip, lr} @ 4\n\
291: stmia %0!, {r3, r4, ip, lr} @ 4\n\ 301: stmia %0!, {r3, r4, ip, lr} @ 4\n\
30 ldmia %1!, {r3, r4, ip, lr} @ 4+1\n\ 31 ldmia %1!, {r3, r4, ip, lr} @ 4+1\n\
@@ -34,7 +35,7 @@ static void v4wt_copy_user_page(void *kto, const void *kfrom)
34 ldmia %1!, {r3, r4, ip, lr} @ 4\n\ 35 ldmia %1!, {r3, r4, ip, lr} @ 4\n\
35 subs %2, %2, #1 @ 1\n\ 36 subs %2, %2, #1 @ 1\n\
36 stmia %0!, {r3, r4, ip, lr} @ 4\n\ 37 stmia %0!, {r3, r4, ip, lr} @ 4\n\
37 ldmneia %1!, {r3, r4, ip, lr} @ 4\n\ 38 ldmiane %1!, {r3, r4, ip, lr} @ 4\n\
38 bne 1b @ 1\n\ 39 bne 1b @ 1\n\
39 mcr p15, 0, %2, c7, c7, 0 @ flush ID cache" 40 mcr p15, 0, %2, c7, c7, 0 @ flush ID cache"
40 : "+&r" (kto), "+&r" (kfrom), "=&r" (tmp) 41 : "+&r" (kto), "+&r" (kfrom), "=&r" (tmp)
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index f1e2922e447c..9376f853d917 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -2277,7 +2277,7 @@ EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
2277 * @dev: valid struct device pointer 2277 * @dev: valid struct device pointer
2278 * 2278 *
2279 * Detaches the provided device from a previously attached map. 2279 * Detaches the provided device from a previously attached map.
2280 * This voids the dma operations (dma_map_ops pointer) 2280 * This overwrites the dma_ops pointer with appropriate non-IOMMU ops.
2281 */ 2281 */
2282void arm_iommu_detach_device(struct device *dev) 2282void arm_iommu_detach_device(struct device *dev)
2283{ 2283{
@@ -2390,4 +2390,6 @@ void arch_teardown_dma_ops(struct device *dev)
2390 return; 2390 return;
2391 2391
2392 arm_teardown_iommu_dma_ops(dev); 2392 arm_teardown_iommu_dma_ops(dev);
2393 /* Let arch_setup_dma_ops() start again from scratch upon re-probe */
2394 set_dma_ops(dev, NULL);
2393} 2395}
diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
index 1d1edd064199..a033f6134a64 100644
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@ -6,6 +6,7 @@
6 6
7#include <asm/cputype.h> 7#include <asm/cputype.h>
8#include <asm/idmap.h> 8#include <asm/idmap.h>
9#include <asm/hwcap.h>
9#include <asm/pgalloc.h> 10#include <asm/pgalloc.h>
10#include <asm/pgtable.h> 11#include <asm/pgtable.h>
11#include <asm/sections.h> 12#include <asm/sections.h>
@@ -110,7 +111,8 @@ static int __init init_static_idmap(void)
110 __idmap_text_end, 0); 111 __idmap_text_end, 0);
111 112
112 /* Flush L1 for the hardware to see this page table content */ 113 /* Flush L1 for the hardware to see this page table content */
113 flush_cache_louis(); 114 if (!(elf_hwcap & HWCAP_LPAE))
115 flush_cache_louis();
114 116
115 return 0; 117 return 0;
116} 118}
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 478ea8b7db87..a6b0805b7977 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -278,15 +278,12 @@ void __init arm_memblock_init(const struct machine_desc *mdesc)
278 278
279void __init bootmem_init(void) 279void __init bootmem_init(void)
280{ 280{
281 unsigned long min, max_low, max_high;
282
283 memblock_allow_resize(); 281 memblock_allow_resize();
284 max_low = max_high = 0;
285 282
286 find_limits(&min, &max_low, &max_high); 283 find_limits(&min_low_pfn, &max_low_pfn, &max_pfn);
287 284
288 early_memtest((phys_addr_t)min << PAGE_SHIFT, 285 early_memtest((phys_addr_t)min_low_pfn << PAGE_SHIFT,
289 (phys_addr_t)max_low << PAGE_SHIFT); 286 (phys_addr_t)max_low_pfn << PAGE_SHIFT);
290 287
291 /* 288 /*
292 * Sparsemem tries to allocate bootmem in memory_present(), 289 * Sparsemem tries to allocate bootmem in memory_present(),
@@ -304,16 +301,7 @@ void __init bootmem_init(void)
304 * the sparse mem_map arrays initialized by sparse_init() 301 * the sparse mem_map arrays initialized by sparse_init()
305 * for memmap_init_zone(), otherwise all PFNs are invalid. 302 * for memmap_init_zone(), otherwise all PFNs are invalid.
306 */ 303 */
307 zone_sizes_init(min, max_low, max_high); 304 zone_sizes_init(min_low_pfn, max_low_pfn, max_pfn);
308
309 /*
310 * This doesn't seem to be used by the Linux memory manager any
311 * more, but is used by ll_rw_block. If we can get rid of it, we
312 * also get rid of some of the stuff above as well.
313 */
314 min_low_pfn = min;
315 max_low_pfn = max_low;
316 max_pfn = max_high;
317} 305}
318 306
319/* 307/*
@@ -494,55 +482,6 @@ void __init mem_init(void)
494 482
495 mem_init_print_info(NULL); 483 mem_init_print_info(NULL);
496 484
497#define MLK(b, t) b, t, ((t) - (b)) >> 10
498#define MLM(b, t) b, t, ((t) - (b)) >> 20
499#define MLK_ROUNDUP(b, t) b, t, DIV_ROUND_UP(((t) - (b)), SZ_1K)
500
501 pr_notice("Virtual kernel memory layout:\n"
502 " vector : 0x%08lx - 0x%08lx (%4ld kB)\n"
503#ifdef CONFIG_HAVE_TCM
504 " DTCM : 0x%08lx - 0x%08lx (%4ld kB)\n"
505 " ITCM : 0x%08lx - 0x%08lx (%4ld kB)\n"
506#endif
507 " fixmap : 0x%08lx - 0x%08lx (%4ld kB)\n"
508 " vmalloc : 0x%08lx - 0x%08lx (%4ld MB)\n"
509 " lowmem : 0x%08lx - 0x%08lx (%4ld MB)\n"
510#ifdef CONFIG_HIGHMEM
511 " pkmap : 0x%08lx - 0x%08lx (%4ld MB)\n"
512#endif
513#ifdef CONFIG_MODULES
514 " modules : 0x%08lx - 0x%08lx (%4ld MB)\n"
515#endif
516 " .text : 0x%p" " - 0x%p" " (%4td kB)\n"
517 " .init : 0x%p" " - 0x%p" " (%4td kB)\n"
518 " .data : 0x%p" " - 0x%p" " (%4td kB)\n"
519 " .bss : 0x%p" " - 0x%p" " (%4td kB)\n",
520
521 MLK(VECTORS_BASE, VECTORS_BASE + PAGE_SIZE),
522#ifdef CONFIG_HAVE_TCM
523 MLK(DTCM_OFFSET, (unsigned long) dtcm_end),
524 MLK(ITCM_OFFSET, (unsigned long) itcm_end),
525#endif
526 MLK(FIXADDR_START, FIXADDR_END),
527 MLM(VMALLOC_START, VMALLOC_END),
528 MLM(PAGE_OFFSET, (unsigned long)high_memory),
529#ifdef CONFIG_HIGHMEM
530 MLM(PKMAP_BASE, (PKMAP_BASE) + (LAST_PKMAP) *
531 (PAGE_SIZE)),
532#endif
533#ifdef CONFIG_MODULES
534 MLM(MODULES_VADDR, MODULES_END),
535#endif
536
537 MLK_ROUNDUP(_text, _etext),
538 MLK_ROUNDUP(__init_begin, __init_end),
539 MLK_ROUNDUP(_sdata, _edata),
540 MLK_ROUNDUP(__bss_start, __bss_stop));
541
542#undef MLK
543#undef MLM
544#undef MLK_ROUNDUP
545
546 /* 485 /*
547 * Check boundaries twice: Some fundamental inconsistencies can 486 * Check boundaries twice: Some fundamental inconsistencies can
548 * be detected at build time already. 487 * be detected at build time already.
diff --git a/arch/arm/mm/pmsa-v8.c b/arch/arm/mm/pmsa-v8.c
index 617a83def88a..0d7d5fb59247 100644
--- a/arch/arm/mm/pmsa-v8.c
+++ b/arch/arm/mm/pmsa-v8.c
@@ -165,7 +165,7 @@ static int __init pmsav8_setup_ram(unsigned int number, phys_addr_t start,phys_a
165 return -EINVAL; 165 return -EINVAL;
166 166
167 bar = start; 167 bar = start;
168 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);; 168 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
169 169
170 bar |= PMSAv8_AP_PL1RW_PL0RW | PMSAv8_RGN_SHARED; 170 bar |= PMSAv8_AP_PL1RW_PL0RW | PMSAv8_RGN_SHARED;
171 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN; 171 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN;
@@ -181,7 +181,7 @@ static int __init pmsav8_setup_io(unsigned int number, phys_addr_t start,phys_ad
181 return -EINVAL; 181 return -EINVAL;
182 182
183 bar = start; 183 bar = start;
184 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);; 184 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
185 185
186 bar |= PMSAv8_AP_PL1RW_PL0RW | PMSAv8_RGN_SHARED | PMSAv8_BAR_XN; 186 bar |= PMSAv8_AP_PL1RW_PL0RW | PMSAv8_RGN_SHARED | PMSAv8_BAR_XN;
187 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_DEVICE_nGnRnE) | PMSAv8_LAR_EN; 187 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_DEVICE_nGnRnE) | PMSAv8_LAR_EN;
diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
index 47a5acc64433..acd5a66dfc23 100644
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -139,6 +139,9 @@ __v7m_setup_cont:
139 cpsie i 139 cpsie i
140 svc #0 140 svc #0
1411: cpsid i 1411: cpsid i
142 ldr r0, =exc_ret
143 orr lr, lr, #EXC_RET_THREADMODE_PROCESSSTACK
144 str lr, [r0]
142 ldmia sp, {r0-r3, r12} 145 ldmia sp, {r0-r3, r12}
143 str r5, [r12, #11 * 4] @ restore the original SVC vector entry 146 str r5, [r12, #11 * 4] @ restore the original SVC vector entry
144 mov lr, r6 @ restore LR 147 mov lr, r6 @ restore LR
@@ -149,10 +152,10 @@ __v7m_setup_cont:
149 152
150 @ Configure caches (if implemented) 153 @ Configure caches (if implemented)
151 teq r8, #0 154 teq r8, #0
152 stmneia sp, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6 155 stmiane sp, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6
153 blne v7m_invalidate_l1 156 blne v7m_invalidate_l1
154 teq r8, #0 @ re-evalutae condition 157 teq r8, #0 @ re-evalutae condition
155 ldmneia sp, {r0-r6, lr} 158 ldmiane sp, {r0-r6, lr}
156 159
157 @ Configure the System Control Register to ensure 8-byte stack alignment 160 @ Configure the System Control Register to ensure 8-byte stack alignment
158 @ Note the STKALIGN bit is either RW or RAO. 161 @ Note the STKALIGN bit is either RW or RAO.
diff --git a/arch/arm/probes/kprobes/opt-arm.c b/arch/arm/probes/kprobes/opt-arm.c
index 2c118a6ab358..0dc23fc227ed 100644
--- a/arch/arm/probes/kprobes/opt-arm.c
+++ b/arch/arm/probes/kprobes/opt-arm.c
@@ -247,7 +247,7 @@ int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *or
247 } 247 }
248 248
249 /* Copy arch-dep-instance from template. */ 249 /* Copy arch-dep-instance from template. */
250 memcpy(code, (unsigned char *)optprobe_template_entry, 250 memcpy(code, (unsigned long *)&optprobe_template_entry,
251 TMPL_END_IDX * sizeof(kprobe_opcode_t)); 251 TMPL_END_IDX * sizeof(kprobe_opcode_t));
252 252
253 /* Adjust buffer according to instruction. */ 253 /* Adjust buffer according to instruction. */
diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c
index 41b706403ef7..b4dae624b9af 100644
--- a/drivers/amba/bus.c
+++ b/drivers/amba/bus.c
@@ -26,19 +26,36 @@
26 26
27#define to_amba_driver(d) container_of(d, struct amba_driver, drv) 27#define to_amba_driver(d) container_of(d, struct amba_driver, drv)
28 28
29static const struct amba_id * 29/* called on periphid match and class 0x9 coresight device. */
30amba_lookup(const struct amba_id *table, struct amba_device *dev) 30static int
31amba_cs_uci_id_match(const struct amba_id *table, struct amba_device *dev)
31{ 32{
32 int ret = 0; 33 int ret = 0;
34 struct amba_cs_uci_id *uci;
35
36 uci = table->data;
33 37
38 /* no table data or zero mask - return match on periphid */
39 if (!uci || (uci->devarch_mask == 0))
40 return 1;
41
42 /* test against read devtype and masked devarch value */
43 ret = (dev->uci.devtype == uci->devtype) &&
44 ((dev->uci.devarch & uci->devarch_mask) == uci->devarch);
45 return ret;
46}
47
48static const struct amba_id *
49amba_lookup(const struct amba_id *table, struct amba_device *dev)
50{
34 while (table->mask) { 51 while (table->mask) {
35 ret = (dev->periphid & table->mask) == table->id; 52 if (((dev->periphid & table->mask) == table->id) &&
36 if (ret) 53 ((dev->cid != CORESIGHT_CID) ||
37 break; 54 (amba_cs_uci_id_match(table, dev))))
55 return table;
38 table++; 56 table++;
39 } 57 }
40 58 return NULL;
41 return ret ? table : NULL;
42} 59}
43 60
44static int amba_match(struct device *dev, struct device_driver *drv) 61static int amba_match(struct device *dev, struct device_driver *drv)
@@ -399,10 +416,22 @@ static int amba_device_try_add(struct amba_device *dev, struct resource *parent)
399 cid |= (readl(tmp + size - 0x10 + 4 * i) & 255) << 416 cid |= (readl(tmp + size - 0x10 + 4 * i) & 255) <<
400 (i * 8); 417 (i * 8);
401 418
419 if (cid == CORESIGHT_CID) {
420 /* set the base to the start of the last 4k block */
421 void __iomem *csbase = tmp + size - 4096;
422
423 dev->uci.devarch =
424 readl(csbase + UCI_REG_DEVARCH_OFFSET);
425 dev->uci.devtype =
426 readl(csbase + UCI_REG_DEVTYPE_OFFSET) & 0xff;
427 }
428
402 amba_put_disable_pclk(dev); 429 amba_put_disable_pclk(dev);
403 430
404 if (cid == AMBA_CID || cid == CORESIGHT_CID) 431 if (cid == AMBA_CID || cid == CORESIGHT_CID) {
405 dev->periphid = pid; 432 dev->periphid = pid;
433 dev->cid = cid;
434 }
406 435
407 if (!dev->periphid) 436 if (!dev->periphid)
408 ret = -ENODEV; 437 ret = -ENODEV;
diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index 9a63e87ea5f3..be302ec5f66b 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -871,7 +871,7 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id)
871 } 871 }
872 872
873 pm_runtime_put(&adev->dev); 873 pm_runtime_put(&adev->dev);
874 dev_info(dev, "%s initialized\n", (char *)id->data); 874 dev_info(dev, "%s initialized\n", (char *)coresight_get_uci_data(id));
875 if (boot_enable) { 875 if (boot_enable) {
876 coresight_enable(drvdata->csdev); 876 coresight_enable(drvdata->csdev);
877 drvdata->boot_enable = true; 877 drvdata->boot_enable = true;
@@ -915,36 +915,18 @@ static const struct dev_pm_ops etm_dev_pm_ops = {
915}; 915};
916 916
917static const struct amba_id etm_ids[] = { 917static const struct amba_id etm_ids[] = {
918 { /* ETM 3.3 */ 918 /* ETM 3.3 */
919 .id = 0x000bb921, 919 CS_AMBA_ID_DATA(0x000bb921, "ETM 3.3"),
920 .mask = 0x000fffff, 920 /* ETM 3.5 - Cortex-A5 */
921 .data = "ETM 3.3", 921 CS_AMBA_ID_DATA(0x000bb955, "ETM 3.5"),
922 }, 922 /* ETM 3.5 */
923 { /* ETM 3.5 - Cortex-A5 */ 923 CS_AMBA_ID_DATA(0x000bb956, "ETM 3.5"),
924 .id = 0x000bb955, 924 /* PTM 1.0 */
925 .mask = 0x000fffff, 925 CS_AMBA_ID_DATA(0x000bb950, "PTM 1.0"),
926 .data = "ETM 3.5", 926 /* PTM 1.1 */
927 }, 927 CS_AMBA_ID_DATA(0x000bb95f, "PTM 1.1"),
928 { /* ETM 3.5 */ 928 /* PTM 1.1 Qualcomm */
929 .id = 0x000bb956, 929 CS_AMBA_ID_DATA(0x000b006f, "PTM 1.1"),
930 .mask = 0x000fffff,
931 .data = "ETM 3.5",
932 },
933 { /* PTM 1.0 */
934 .id = 0x000bb950,
935 .mask = 0x000fffff,
936 .data = "PTM 1.0",
937 },
938 { /* PTM 1.1 */
939 .id = 0x000bb95f,
940 .mask = 0x000fffff,
941 .data = "PTM 1.1",
942 },
943 { /* PTM 1.1 Qualcomm */
944 .id = 0x000b006f,
945 .mask = 0x000fffff,
946 .data = "PTM 1.1",
947 },
948 { 0, 0}, 930 { 0, 0},
949}; 931};
950 932
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 53e2fb6e86f6..dd9b9b5ebb84 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -1067,18 +1067,21 @@ err_arch_supported:
1067 return ret; 1067 return ret;
1068} 1068}
1069 1069
1070#define ETM4x_AMBA_ID(pid) \ 1070static struct amba_cs_uci_id uci_id_etm4[] = {
1071 { \ 1071 {
1072 .id = pid, \ 1072 /* ETMv4 UCI data */
1073 .mask = 0x000fffff, \ 1073 .devarch = 0x47704a13,
1074 .devarch_mask = 0xfff0ffff,
1075 .devtype = 0x00000013,
1074 } 1076 }
1077};
1075 1078
1076static const struct amba_id etm4_ids[] = { 1079static const struct amba_id etm4_ids[] = {
1077 ETM4x_AMBA_ID(0x000bb95d), /* Cortex-A53 */ 1080 CS_AMBA_ID(0x000bb95d), /* Cortex-A53 */
1078 ETM4x_AMBA_ID(0x000bb95e), /* Cortex-A57 */ 1081 CS_AMBA_ID(0x000bb95e), /* Cortex-A57 */
1079 ETM4x_AMBA_ID(0x000bb95a), /* Cortex-A72 */ 1082 CS_AMBA_ID(0x000bb95a), /* Cortex-A72 */
1080 ETM4x_AMBA_ID(0x000bb959), /* Cortex-A73 */ 1083 CS_AMBA_ID(0x000bb959), /* Cortex-A73 */
1081 ETM4x_AMBA_ID(0x000bb9da), /* Cortex-A35 */ 1084 CS_AMBA_UCI_ID(0x000bb9da, uci_id_etm4), /* Cortex-A35 */
1082 {}, 1085 {},
1083}; 1086};
1084 1087
diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
index 579f34943bf1..fd69ad24432a 100644
--- a/drivers/hwtracing/coresight/coresight-priv.h
+++ b/drivers/hwtracing/coresight/coresight-priv.h
@@ -6,6 +6,7 @@
6#ifndef _CORESIGHT_PRIV_H 6#ifndef _CORESIGHT_PRIV_H
7#define _CORESIGHT_PRIV_H 7#define _CORESIGHT_PRIV_H
8 8
9#include <linux/amba/bus.h>
9#include <linux/bitops.h> 10#include <linux/bitops.h>
10#include <linux/io.h> 11#include <linux/io.h>
11#include <linux/coresight.h> 12#include <linux/coresight.h>
@@ -159,4 +160,43 @@ static inline int etm_readl_cp14(u32 off, unsigned int *val) { return 0; }
159static inline int etm_writel_cp14(u32 off, u32 val) { return 0; } 160static inline int etm_writel_cp14(u32 off, u32 val) { return 0; }
160#endif 161#endif
161 162
163/*
164 * Macros and inline functions to handle CoreSight UCI data and driver
165 * private data in AMBA ID table entries, and extract data values.
166 */
167
168/* coresight AMBA ID, no UCI, no driver data: id table entry */
169#define CS_AMBA_ID(pid) \
170 { \
171 .id = pid, \
172 .mask = 0x000fffff, \
173 }
174
175/* coresight AMBA ID, UCI with driver data only: id table entry. */
176#define CS_AMBA_ID_DATA(pid, dval) \
177 { \
178 .id = pid, \
179 .mask = 0x000fffff, \
180 .data = (void *)&(struct amba_cs_uci_id) \
181 { \
182 .data = (void *)dval, \
183 } \
184 }
185
186/* coresight AMBA ID, full UCI structure: id table entry. */
187#define CS_AMBA_UCI_ID(pid, uci_ptr) \
188 { \
189 .id = pid, \
190 .mask = 0x000fffff, \
191 .data = uci_ptr \
192 }
193
194/* extract the data value from a UCI structure given amba_id pointer. */
195static inline void *coresight_get_uci_data(const struct amba_id *id)
196{
197 if (id->data)
198 return ((struct amba_cs_uci_id *)(id->data))->data;
199 return 0;
200}
201
162#endif 202#endif
diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c
index ef339ff22090..2a70cdd68a7b 100644
--- a/drivers/hwtracing/coresight/coresight-stm.c
+++ b/drivers/hwtracing/coresight/coresight-stm.c
@@ -874,7 +874,7 @@ static int stm_probe(struct amba_device *adev, const struct amba_id *id)
874 874
875 pm_runtime_put(&adev->dev); 875 pm_runtime_put(&adev->dev);
876 876
877 dev_info(dev, "%s initialized\n", (char *)id->data); 877 dev_info(dev, "%s initialized\n", (char *)coresight_get_uci_data(id));
878 return 0; 878 return 0;
879 879
880stm_unregister: 880stm_unregister:
@@ -909,16 +909,8 @@ static const struct dev_pm_ops stm_dev_pm_ops = {
909}; 909};
910 910
911static const struct amba_id stm_ids[] = { 911static const struct amba_id stm_ids[] = {
912 { 912 CS_AMBA_ID_DATA(0x000bb962, "STM32"),
913 .id = 0x000bb962, 913 CS_AMBA_ID_DATA(0x000bb963, "STM500"),
914 .mask = 0x000fffff,
915 .data = "STM32",
916 },
917 {
918 .id = 0x000bb963,
919 .mask = 0x000fffff,
920 .data = "STM500",
921 },
922 { 0, 0}, 914 { 0, 0},
923}; 915};
924 916
diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
index ea249f0bcd73..2a02da3d630f 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.c
+++ b/drivers/hwtracing/coresight/coresight-tmc.c
@@ -443,7 +443,8 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
443 desc.type = CORESIGHT_DEV_TYPE_SINK; 443 desc.type = CORESIGHT_DEV_TYPE_SINK;
444 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; 444 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
445 desc.ops = &tmc_etr_cs_ops; 445 desc.ops = &tmc_etr_cs_ops;
446 ret = tmc_etr_setup_caps(drvdata, devid, id->data); 446 ret = tmc_etr_setup_caps(drvdata, devid,
447 coresight_get_uci_data(id));
447 if (ret) 448 if (ret)
448 goto out; 449 goto out;
449 break; 450 break;
@@ -475,26 +476,13 @@ out:
475} 476}
476 477
477static const struct amba_id tmc_ids[] = { 478static const struct amba_id tmc_ids[] = {
478 { 479 CS_AMBA_ID(0x000bb961),
479 .id = 0x000bb961, 480 /* Coresight SoC 600 TMC-ETR/ETS */
480 .mask = 0x000fffff, 481 CS_AMBA_ID_DATA(0x000bb9e8, (unsigned long)CORESIGHT_SOC_600_ETR_CAPS),
481 }, 482 /* Coresight SoC 600 TMC-ETB */
482 { 483 CS_AMBA_ID(0x000bb9e9),
483 /* Coresight SoC 600 TMC-ETR/ETS */ 484 /* Coresight SoC 600 TMC-ETF */
484 .id = 0x000bb9e8, 485 CS_AMBA_ID(0x000bb9ea),
485 .mask = 0x000fffff,
486 .data = (void *)(unsigned long)CORESIGHT_SOC_600_ETR_CAPS,
487 },
488 {
489 /* Coresight SoC 600 TMC-ETB */
490 .id = 0x000bb9e9,
491 .mask = 0x000fffff,
492 },
493 {
494 /* Coresight SoC 600 TMC-ETF */
495 .id = 0x000bb9ea,
496 .mask = 0x000fffff,
497 },
498 { 0, 0}, 486 { 0, 0},
499}; 487};
500 488
diff --git a/include/linux/amba/bus.h b/include/linux/amba/bus.h
index d143c13bed26..f99b74a6e4ca 100644
--- a/include/linux/amba/bus.h
+++ b/include/linux/amba/bus.h
@@ -25,6 +25,43 @@
25#define AMBA_CID 0xb105f00d 25#define AMBA_CID 0xb105f00d
26#define CORESIGHT_CID 0xb105900d 26#define CORESIGHT_CID 0xb105900d
27 27
28/*
29 * CoreSight Architecture specification updates the ID specification
30 * for components on the AMBA bus. (ARM IHI 0029E)
31 *
32 * Bits 15:12 of the CID are the device class.
33 *
34 * Class 0xF remains for PrimeCell and legacy components. (AMBA_CID above)
35 * Class 0x9 defines the component as CoreSight (CORESIGHT_CID above)
36 * Class 0x0, 0x1, 0xB, 0xE define components that do not have driver support
37 * at present.
38 * Class 0x2-0x8,0xA and 0xD-0xD are presently reserved.
39 *
40 * Remaining CID bits stay as 0xb105-00d
41 */
42
43/**
44 * Class 0x9 components use additional values to form a Unique Component
45 * Identifier (UCI), where peripheral ID values are identical for different
46 * components. Passed to the amba bus code from the component driver via
47 * the amba_id->data pointer.
48 * @devarch : coresight devarch register value
49 * @devarch_mask: mask bits used for matching. 0 indicates UCI not used.
50 * @devtype : coresight device type value
51 * @data : additional driver data. As we have usurped the original
52 * pointer some devices may still need additional data
53 */
54struct amba_cs_uci_id {
55 unsigned int devarch;
56 unsigned int devarch_mask;
57 unsigned int devtype;
58 void *data;
59};
60
61/* define offsets for registers used by UCI */
62#define UCI_REG_DEVTYPE_OFFSET 0xFCC
63#define UCI_REG_DEVARCH_OFFSET 0xFBC
64
28struct clk; 65struct clk;
29 66
30struct amba_device { 67struct amba_device {
@@ -32,6 +69,8 @@ struct amba_device {
32 struct resource res; 69 struct resource res;
33 struct clk *pclk; 70 struct clk *pclk;
34 unsigned int periphid; 71 unsigned int periphid;
72 unsigned int cid;
73 struct amba_cs_uci_id uci;
35 unsigned int irq[AMBA_NR_IRQS]; 74 unsigned int irq[AMBA_NR_IRQS];
36 char *driver_override; 75 char *driver_override;
37}; 76};
diff --git a/lib/raid6/Makefile b/lib/raid6/Makefile
index 4e90d443d1b0..e723eacf7868 100644
--- a/lib/raid6/Makefile
+++ b/lib/raid6/Makefile
@@ -39,7 +39,7 @@ endif
39ifeq ($(CONFIG_KERNEL_MODE_NEON),y) 39ifeq ($(CONFIG_KERNEL_MODE_NEON),y)
40NEON_FLAGS := -ffreestanding 40NEON_FLAGS := -ffreestanding
41ifeq ($(ARCH),arm) 41ifeq ($(ARCH),arm)
42NEON_FLAGS += -mfloat-abi=softfp -mfpu=neon 42NEON_FLAGS += -march=armv7-a -mfloat-abi=softfp -mfpu=neon
43endif 43endif
44CFLAGS_recov_neon_inner.o += $(NEON_FLAGS) 44CFLAGS_recov_neon_inner.o += $(NEON_FLAGS)
45ifeq ($(ARCH),arm64) 45ifeq ($(ARCH),arm64)
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-24 18:39:35 -0500