8 files changed, 166 insertions, 58 deletions

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 3e5f52110ea1..213fb837e1c4 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -1208,3 +1208,86 @@ int drm_dp_stop_crc(struct drm_dp_aux *aux)
         return 0;
 }
 EXPORT_SYMBOL(drm_dp_stop_crc);
+
+struct dpcd_quirk {
+        u8 oui[3];
+        bool is_branch;
+        u32 quirks;
+};
+
+#define OUI(first, second, third) { (first), (second), (third) }
+
+static const struct dpcd_quirk dpcd_quirk_list[] = {
+        /* Analogix 7737 needs reduced M and N at HBR2 link rates */
+        { OUI(0x00, 0x22, 0xb9), true, BIT(DP_DPCD_QUIRK_LIMITED_M_N) },
+};
+
+#undef OUI
+
+/*
+ * Get a bit mask of DPCD quirks for the sink/branch device identified by
+ * ident. The quirk data is shared but it's up to the drivers to act on the
+ * data.
+ *
+ * For now, only the OUI (first three bytes) is used, but this may be extended
+ * to device identification string and hardware/firmware revisions later.
+ */
+static u32
+drm_dp_get_quirks(const struct drm_dp_dpcd_ident *ident, bool is_branch)
+{
+        const struct dpcd_quirk *quirk;
+        u32 quirks = 0;
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(dpcd_quirk_list); i++) {
+                quirk = &dpcd_quirk_list[i];
+
+                if (quirk->is_branch != is_branch)
+                        continue;
+
+                if (memcmp(quirk->oui, ident->oui, sizeof(ident->oui)) != 0)
+                        continue;
+
+                quirks |= quirk->quirks;
+        }
+
+        return quirks;
+}
+
+/**
+ * drm_dp_read_desc - read sink/branch descriptor from DPCD
+ * @aux: DisplayPort AUX channel
+ * @desc: Device decriptor to fill from DPCD
+ * @is_branch: true for branch devices, false for sink devices
+ *
+ * Read DPCD 0x400 (sink) or 0x500 (branch) into @desc. Also debug log the
+ * identification.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc,
+                     bool is_branch)
+{
+        struct drm_dp_dpcd_ident *ident = &desc->ident;
+        unsigned int offset = is_branch ? DP_BRANCH_OUI : DP_SINK_OUI;
+        int ret, dev_id_len;
+
+        ret = drm_dp_dpcd_read(aux, offset, ident, sizeof(*ident));
+        if (ret < 0)
+                return ret;
+
+        desc->quirks = drm_dp_get_quirks(ident, is_branch);
+
+        dev_id_len = strnlen(ident->device_id, sizeof(ident->device_id));
+
+        DRM_DEBUG_KMS("DP %s: OUI %*phD dev-ID %*pE HW-rev %d.%d SW-rev %d.%d quirks 0x%04x\n",
+                      is_branch ? "branch" : "sink",
+                      (int)sizeof(ident->oui), ident->oui,
+                      dev_id_len, ident->device_id,
+                      ident->hw_rev >> 4, ident->hw_rev & 0xf,
+                      ident->sw_major_rev, ident->sw_minor_rev,
+                      desc->quirks);
+
+        return 0;
+}
+EXPORT_SYMBOL(drm_dp_read_desc);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c9b0949f6c1a..963f6d4481f7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -562,7 +562,8 @@ struct intel_link_m_n {
 
 void intel_link_compute_m_n(int bpp, int nlanes,
                             int pixel_clock, int link_clock,
-                            struct intel_link_m_n *m_n);
+                            struct intel_link_m_n *m_n,
+                            bool reduce_m_n);
 
 /* Interface history:
  *
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3617927af269..3cabe52a4e3b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6101,7 +6101,7 @@ retry:
         pipe_config->fdi_lanes = lane;
 
         intel_link_compute_m_n(pipe_config->pipe_bpp, lane, fdi_dotclock,
-                               link_bw, &pipe_config->fdi_m_n);
+                               link_bw, &pipe_config->fdi_m_n, false);
 
         ret = ironlake_check_fdi_lanes(dev, intel_crtc->pipe, pipe_config);
         if (ret == -EINVAL && pipe_config->pipe_bpp > 6*3) {
@@ -6277,7 +6277,8 @@ intel_reduce_m_n_ratio(uint32_t *num, uint32_t *den)
 }
 
 static void compute_m_n(unsigned int m, unsigned int n,
-                        uint32_t *ret_m, uint32_t *ret_n)
+                        uint32_t *ret_m, uint32_t *ret_n,
+                        bool reduce_m_n)
 {
         /*
          * Reduce M/N as much as possible without loss in precision. Several DP
@@ -6285,9 +6286,11 @@ static void compute_m_n(unsigned int m, unsigned int n,
          * values. The passed in values are more likely to have the least
          * significant bits zero than M after rounding below, so do this first.
          */
-        while ((m & 1) == 0 && (n & 1) == 0) {
-                m >>= 1;
-                n >>= 1;
+        if (reduce_m_n) {
+                while ((m & 1) == 0 && (n & 1) == 0) {
+                        m >>= 1;
+                        n >>= 1;
+                }
         }
 
         *ret_n = min_t(unsigned int, roundup_pow_of_two(n), DATA_LINK_N_MAX);
@@ -6298,16 +6301,19 @@ static void compute_m_n(unsigned int m, unsigned int n,
 void
 intel_link_compute_m_n(int bits_per_pixel, int nlanes,
                        int pixel_clock, int link_clock,
-                       struct intel_link_m_n *m_n)
+                       struct intel_link_m_n *m_n,
+                       bool reduce_m_n)
 {
         m_n->tu = 64;
 
         compute_m_n(bits_per_pixel * pixel_clock,
                     link_clock * nlanes * 8,
-                    &m_n->gmch_m, &m_n->gmch_n);
+                    &m_n->gmch_m, &m_n->gmch_n,
+                    reduce_m_n);
 
         compute_m_n(pixel_clock, link_clock,
-                    &m_n->link_m, &m_n->link_n);
+                    &m_n->link_m, &m_n->link_n,
+                    reduce_m_n);
 }
 
 static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index ee77b519835c..fc691b8b317c 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1507,37 +1507,6 @@ static void intel_dp_print_rates(struct intel_dp *intel_dp)
         DRM_DEBUG_KMS("common rates: %s\n", str);
 }
 
-bool
-__intel_dp_read_desc(struct intel_dp *intel_dp, struct intel_dp_desc *desc)
-{
-        u32 base = drm_dp_is_branch(intel_dp->dpcd) ? DP_BRANCH_OUI :
-                                                      DP_SINK_OUI;
-
-        return drm_dp_dpcd_read(&intel_dp->aux, base, desc, sizeof(*desc)) ==
-               sizeof(*desc);
-}
-
-bool intel_dp_read_desc(struct intel_dp *intel_dp)
-{
-        struct intel_dp_desc *desc = &intel_dp->desc;
-        bool oui_sup = intel_dp->dpcd[DP_DOWN_STREAM_PORT_COUNT] &
-                       DP_OUI_SUPPORT;
-        int dev_id_len;
-
-        if (!__intel_dp_read_desc(intel_dp, desc))
-                return false;
-
-        dev_id_len = strnlen(desc->device_id, sizeof(desc->device_id));
-        DRM_DEBUG_KMS("DP %s: OUI %*phD%s dev-ID %*pE HW-rev %d.%d SW-rev %d.%d\n",
-                      drm_dp_is_branch(intel_dp->dpcd) ? "branch" : "sink",
-                      (int)sizeof(desc->oui), desc->oui, oui_sup ? "" : "(NS)",
-                      dev_id_len, desc->device_id,
-                      desc->hw_rev >> 4, desc->hw_rev & 0xf,
-                      desc->sw_major_rev, desc->sw_minor_rev);
-
-        return true;
-}
-
 static int rate_to_index(int find, const int *rates)
 {
         int i = 0;
@@ -1624,6 +1593,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
         int common_rates[DP_MAX_SUPPORTED_RATES] = {};
         int common_len;
         uint8_t link_bw, rate_select;
+        bool reduce_m_n = drm_dp_has_quirk(&intel_dp->desc,
+                                           DP_DPCD_QUIRK_LIMITED_M_N);
 
         common_len = intel_dp_common_rates(intel_dp, common_rates);
 
@@ -1753,7 +1724,8 @@ found:
         intel_link_compute_m_n(bpp, lane_count,
                                adjusted_mode->crtc_clock,
                                pipe_config->port_clock,
-                               &pipe_config->dp_m_n);
+                               &pipe_config->dp_m_n,
+                               reduce_m_n);
 
         if (intel_connector->panel.downclock_mode != NULL &&
                 dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
@@ -1761,7 +1733,8 @@ found:
                         intel_link_compute_m_n(bpp, lane_count,
                                 intel_connector->panel.downclock_mode->clock,
                                 pipe_config->port_clock,
-                                &pipe_config->dp_m2_n2);
+                                &pipe_config->dp_m2_n2,
+                                reduce_m_n);
         }
 
         /*
@@ -3622,7 +3595,8 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
         if (!intel_dp_read_dpcd(intel_dp))
                 return false;
 
-        intel_dp_read_desc(intel_dp);
+        drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc,
+                         drm_dp_is_branch(intel_dp->dpcd));
 
         if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11)
                 dev_priv->no_aux_handshake = intel_dp->dpcd[DP_MAX_DOWNSPREAD] &
@@ -4624,7 +4598,8 @@ intel_dp_long_pulse(struct intel_connector *intel_connector)
 
         intel_dp_print_rates(intel_dp);
 
-        intel_dp_read_desc(intel_dp);
+        drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc,
+                         drm_dp_is_branch(intel_dp->dpcd));
 
         intel_dp_configure_mst(intel_dp);
 
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index c1f62eb07c07..989e25577ac0 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -44,6 +44,8 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
         int lane_count, slots;
         const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
         int mst_pbn;
+        bool reduce_m_n = drm_dp_has_quirk(&intel_dp->desc,
+                                           DP_DPCD_QUIRK_LIMITED_M_N);
 
         pipe_config->has_pch_encoder = false;
         bpp = 24;
@@ -75,7 +77,8 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
         intel_link_compute_m_n(bpp, lane_count,
                                adjusted_mode->crtc_clock,
                                pipe_config->port_clock,
-                               &pipe_config->dp_m_n);
+                               &pipe_config->dp_m_n,
+                               reduce_m_n);
 
         pipe_config->dp_m_n.tu = slots;
 
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index aaee3949a422..f630c7af5020 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -906,14 +906,6 @@ enum link_m_n_set {
         M2_N2
 };
 
-struct intel_dp_desc {
-        u8 oui[3];
-        u8 device_id[6];
-        u8 hw_rev;
-        u8 sw_major_rev;
-        u8 sw_minor_rev;
-} __packed;
-
 struct intel_dp_compliance_data {
         unsigned long edid;
         uint8_t video_pattern;
@@ -957,7 +949,7 @@ struct intel_dp {
         /* Max link BW for the sink as per DPCD registers */
         int max_sink_link_bw;
         /* sink or branch descriptor */
-        struct intel_dp_desc desc;
+        struct drm_dp_desc desc;
         struct drm_dp_aux aux;
         enum intel_display_power_domain aux_power_domain;
         uint8_t train_set[4];
@@ -1532,9 +1524,6 @@ static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
 }
 
 bool intel_dp_read_dpcd(struct intel_dp *intel_dp);
-bool __intel_dp_read_desc(struct intel_dp *intel_dp,
-                          struct intel_dp_desc *desc);
-bool intel_dp_read_desc(struct intel_dp *intel_dp);
 int intel_dp_link_required(int pixel_clock, int bpp);
 int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
 bool intel_digital_port_connected(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/intel_lspcon.c b/drivers/gpu/drm/i915/intel_lspcon.c
index 71cbe9c08932..5abef482eacf 100644
--- a/drivers/gpu/drm/i915/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/intel_lspcon.c
@@ -240,7 +240,7 @@ bool lspcon_init(struct intel_digital_port *intel_dig_port)
                 return false;
         }
 
-        intel_dp_read_desc(dp);
+        drm_dp_read_desc(&dp->aux, &dp->desc, drm_dp_is_branch(dp->dpcd));
 
         DRM_DEBUG_KMS("Success: LSPCON init\n");
         return true;
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index c0bd0d7651a9..bb837310c07e 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -913,4 +913,55 @@ void drm_dp_aux_unregister(struct drm_dp_aux *aux);
 int drm_dp_start_crc(struct drm_dp_aux *aux, struct drm_crtc *crtc);
 int drm_dp_stop_crc(struct drm_dp_aux *aux);
 
+struct drm_dp_dpcd_ident {
+        u8 oui[3];
+        u8 device_id[6];
+        u8 hw_rev;
+        u8 sw_major_rev;
+        u8 sw_minor_rev;
+} __packed;
+
+/**
+ * struct drm_dp_desc - DP branch/sink device descriptor
+ * @ident: DP device identification from DPCD 0x400 (sink) or 0x500 (branch).
+ * @quirks: Quirks; use drm_dp_has_quirk() to query for the quirks.
+ */
+struct drm_dp_desc {
+        struct drm_dp_dpcd_ident ident;
+        u32 quirks;
+};
+
+int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc,
+                     bool is_branch);
+
+/**
+ * enum drm_dp_quirk - Display Port sink/branch device specific quirks
+ *
+ * Display Port sink and branch devices in the wild have a variety of bugs, try
+ * to collect them here. The quirks are shared, but it's up to the drivers to
+ * implement workarounds for them.
+ */
+enum drm_dp_quirk {
+        /**
+         * @DP_DPCD_QUIRK_LIMITED_M_N:
+         *
+         * The device requires main link attributes Mvid and Nvid to be limited
+         * to 16 bits.
+         */
+        DP_DPCD_QUIRK_LIMITED_M_N,
+};
+
+/**
+ * drm_dp_has_quirk() - does the DP device have a specific quirk
+ * @desc: Device decriptor filled by drm_dp_read_desc()
+ * @quirk: Quirk to query for
+ *
+ * Return true if DP device identified by @desc has @quirk.
+ */
+static inline bool
+drm_dp_has_quirk(const struct drm_dp_desc *desc, enum drm_dp_quirk quirk)
+{
+        return desc->quirks & BIT(quirk);
+}
+
 #endif /* _DRM_DP_HELPER_H_ */