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-rw-r--r--Documentation/devicetree/bindings/power/supply/axp20x_usb_power.txt5
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt2
-rw-r--r--arch/arm/boot/dts/Makefile6
-rw-r--r--arch/arm/boot/dts/axp223.dtsi58
-rw-r--r--arch/arm/boot/dts/sun4i-a10-a1000.dts31
-rw-r--r--arch/arm/boot/dts/sun4i-a10.dtsi1
-rw-r--r--arch/arm/boot/dts/sun5i-a13-licheepi-one.dts224
-rw-r--r--arch/arm/boot/dts/sun5i.dtsi9
-rw-r--r--arch/arm/boot/dts/sun6i-a31-hummingbird.dts19
-rw-r--r--arch/arm/boot/dts/sun6i-a31-i7.dts30
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi22
-rw-r--r--arch/arm/boot/dts/sun6i-a31s-sina31s.dts5
-rw-r--r--arch/arm/boot/dts/sun7i-a20-bananapro.dts33
-rw-r--r--arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts38
-rw-r--r--arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts90
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi6
-rw-r--r--arch/arm/boot/dts/sun8i-a23-a33.dtsi24
-rw-r--r--arch/arm/boot/dts/sun8i-a23-q8-tablet.dts23
-rw-r--r--arch/arm/boot/dts/sun8i-a23.dtsi16
-rw-r--r--arch/arm/boot/dts/sun8i-a33-olinuxino.dts2
-rw-r--r--arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts36
-rw-r--r--arch/arm/boot/dts/sun8i-a33.dtsi35
-rw-r--r--arch/arm/boot/dts/sun8i-a83t.dtsi1
-rw-r--r--arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts160
-rw-r--r--arch/arm/boot/dts/sun8i-h3-beelink-x2.dts160
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts8
-rw-r--r--arch/arm/boot/dts/sun8i-h3.dtsi40
-rw-r--r--arch/arm/boot/dts/sun8i-r16-parrot.dts2
-rw-r--r--arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi6
-rw-r--r--arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts103
-rw-r--r--arch/arm/boot/dts/sun8i-v3s.dtsi309
-rw-r--r--arch/arm/boot/dts/sun9i-a80.dtsi3
32 files changed, 1436 insertions, 71 deletions
diff --git a/Documentation/devicetree/bindings/power/supply/axp20x_usb_power.txt b/Documentation/devicetree/bindings/power/supply/axp20x_usb_power.txt
index f1d7beec45bf..ba8d35f66cbe 100644
--- a/Documentation/devicetree/bindings/power/supply/axp20x_usb_power.txt
+++ b/Documentation/devicetree/bindings/power/supply/axp20x_usb_power.txt
@@ -3,6 +3,11 @@ AXP20x USB power supply
3Required Properties: 3Required Properties:
4-compatible: One of: "x-powers,axp202-usb-power-supply" 4-compatible: One of: "x-powers,axp202-usb-power-supply"
5 "x-powers,axp221-usb-power-supply" 5 "x-powers,axp221-usb-power-supply"
6 "x-powers,axp223-usb-power-supply"
7
8The AXP223 PMIC shares most of its behaviour with the AXP221 but has slight
9variations such as the former being able to set the VBUS power supply max
10current to 100mA, unlike the latter.
6 11
7This node is a subnode of the axp20x PMIC. 12This node is a subnode of the axp20x PMIC.
8 13
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 8800b43d707b..c1ccfd4c41d8 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -162,6 +162,7 @@ lantiq Lantiq Semiconductor
162lego LEGO Systems A/S 162lego LEGO Systems A/S
163lenovo Lenovo Group Ltd. 163lenovo Lenovo Group Ltd.
164lg LG Corporation 164lg LG Corporation
165licheepi Lichee Pi
165linux Linux-specific binding 166linux Linux-specific binding
166lltc Linear Technology Corporation 167lltc Linear Technology Corporation
167lsi LSI Corp. (LSI Logic) 168lsi LSI Corp. (LSI Logic)
@@ -331,6 +332,7 @@ x-powers X-Powers
331xes Extreme Engineering Solutions (X-ES) 332xes Extreme Engineering Solutions (X-ES)
332xillybus Xillybus Ltd. 333xillybus Xillybus Ltd.
333xlnx Xilinx 334xlnx Xilinx
335xunlong Shenzhen Xunlong Software CO.,Limited
334zarlink Zarlink Semiconductor 336zarlink Zarlink Semiconductor
335zii Zodiac Inflight Innovations 337zii Zodiac Inflight Innovations
336zte ZTE Corp. 338zte ZTE Corp.
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d064854d6378..06d281bc3a67 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -798,6 +798,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \
798 sun5i-a13-empire-electronix-m712.dtb \ 798 sun5i-a13-empire-electronix-m712.dtb \
799 sun5i-a13-hsg-h702.dtb \ 799 sun5i-a13-hsg-h702.dtb \
800 sun5i-a13-inet-98v-rev2.dtb \ 800 sun5i-a13-inet-98v-rev2.dtb \
801 sun5i-a13-licheepi-one.dtb \
801 sun5i-a13-olinuxino.dtb \ 802 sun5i-a13-olinuxino.dtb \
802 sun5i-a13-olinuxino-micro.dtb \ 803 sun5i-a13-olinuxino-micro.dtb \
803 sun5i-a13-q8-tablet.dtb \ 804 sun5i-a13-q8-tablet.dtb \
@@ -861,7 +862,9 @@ dtb-$(CONFIG_MACH_SUN8I) += \
861 sun8i-a33-sinlinx-sina33.dtb \ 862 sun8i-a33-sinlinx-sina33.dtb \
862 sun8i-a83t-allwinner-h8homlet-v2.dtb \ 863 sun8i-a83t-allwinner-h8homlet-v2.dtb \
863 sun8i-a83t-cubietruck-plus.dtb \ 864 sun8i-a83t-cubietruck-plus.dtb \
865 sun8i-h2-plus-orangepi-zero.dtb \
864 sun8i-h3-bananapi-m2-plus.dtb \ 866 sun8i-h3-bananapi-m2-plus.dtb \
867 sun8i-h3-beelink-x2.dtb \
865 sun8i-h3-nanopi-neo.dtb \ 868 sun8i-h3-nanopi-neo.dtb \
866 sun8i-h3-orangepi-2.dtb \ 869 sun8i-h3-orangepi-2.dtb \
867 sun8i-h3-orangepi-lite.dtb \ 870 sun8i-h3-orangepi-lite.dtb \
@@ -870,7 +873,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \
870 sun8i-h3-orangepi-pc-plus.dtb \ 873 sun8i-h3-orangepi-pc-plus.dtb \
871 sun8i-h3-orangepi-plus.dtb \ 874 sun8i-h3-orangepi-plus.dtb \
872 sun8i-h3-orangepi-plus2e.dtb \ 875 sun8i-h3-orangepi-plus2e.dtb \
873 sun8i-r16-parrot.dtb 876 sun8i-r16-parrot.dtb \
877 sun8i-v3s-licheepi-zero.dtb
874dtb-$(CONFIG_MACH_SUN9I) += \ 878dtb-$(CONFIG_MACH_SUN9I) += \
875 sun9i-a80-optimus.dtb \ 879 sun9i-a80-optimus.dtb \
876 sun9i-a80-cubieboard4.dtb 880 sun9i-a80-cubieboard4.dtb
diff --git a/arch/arm/boot/dts/axp223.dtsi b/arch/arm/boot/dts/axp223.dtsi
new file mode 100644
index 000000000000..b91b6c1278c7
--- /dev/null
+++ b/arch/arm/boot/dts/axp223.dtsi
@@ -0,0 +1,58 @@
1/*
2 * Copyright 2016 Free Electrons
3 *
4 * Quentin Schulz <quentin.schulz@free-electrons.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45/*
46 * AXP223 Integrated Power Management Chip
47 * http://www.x-powers.com/product/AXP22X.php
48 * http://dl.linux-sunxi.org/AXP/AXP223-en.pdf
49 *
50 * The AXP223 shares most of its logic with the AXP221 but it has some
51 * differences, for the VBUS driver for example.
52 */
53
54#include "axp22x.dtsi"
55
56&usb_power_supply {
57 compatible = "x-powers,axp223-usb-power-supply";
58};
diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts
index 68c6bdb2cf7c..f3fc27412a67 100644
--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
@@ -117,6 +117,10 @@
117 status = "okay"; 117 status = "okay";
118}; 118};
119 119
120&cpu0 {
121 cpu-supply = <&reg_dcdc2>;
122};
123
120&ehci0 { 124&ehci0 {
121 status = "okay"; 125 status = "okay";
122}; 126};
@@ -196,6 +200,33 @@
196 }; 200 };
197}; 201};
198 202
203#include "axp209.dtsi"
204
205&reg_dcdc2 {
206 regulator-always-on;
207 regulator-min-microvolt = <1000000>;
208 regulator-max-microvolt = <1400000>;
209 regulator-name = "vdd-cpu";
210};
211
212&reg_dcdc3 {
213 regulator-always-on;
214 regulator-min-microvolt = <1000000>;
215 regulator-max-microvolt = <1250000>;
216 regulator-name = "vdd-int-dll";
217};
218
219&reg_ldo1 {
220 regulator-name = "vdd-rtc";
221};
222
223&reg_ldo2 {
224 regulator-always-on;
225 regulator-min-microvolt = <3000000>;
226 regulator-max-microvolt = <3000000>;
227 regulator-name = "avcc";
228};
229
199&reg_usb1_vbus { 230&reg_usb1_vbus {
200 status = "okay"; 231 status = "okay";
201}; 232};
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index dae838e4dd9e..ba20b48c0702 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -1023,6 +1023,7 @@
1023 "PF3", "PF4", "PF5"; 1023 "PF3", "PF4", "PF5";
1024 function = "mmc0"; 1024 function = "mmc0";
1025 drive-strength = <30>; 1025 drive-strength = <30>;
1026 bias-pull-up;
1026 }; 1027 };
1027 1028
1028 mmc0_cd_pin_reference_design: mmc0_cd_pin@0 { 1029 mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
diff --git a/arch/arm/boot/dts/sun5i-a13-licheepi-one.dts b/arch/arm/boot/dts/sun5i-a13-licheepi-one.dts
new file mode 100644
index 000000000000..566cda91a66b
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-a13-licheepi-one.dts
@@ -0,0 +1,224 @@
1/*
2 * Copyright 2016 Icenowy Zheng <icenowy@aosc.xyz>
3 *
4 * Based on sun5i-a13-olinuxino.dts, which is
5 * Copyright 2012 Maxime Ripard <maxime.ripard@free-electrons.com>
6 * Copyright 2013 Hans de Goede <hdegoede@redhat.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPL or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 * a) This file is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of the
16 * License, or (at your option) any later version.
17 *
18 * This file is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * Or, alternatively,
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use,
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47/dts-v1/;
48#include "sun5i-a13.dtsi"
49#include "sunxi-common-regulators.dtsi"
50
51#include <dt-bindings/gpio/gpio.h>
52#include <dt-bindings/input/input.h>
53#include <dt-bindings/pinctrl/sun4i-a10.h>
54
55/ {
56 model = "Lichee Pi One";
57 compatible = "licheepi,licheepi-one", "allwinner,sun5i-a13";
58
59 aliases {
60 serial0 = &uart1;
61 };
62
63 chosen {
64 stdout-path = "serial0:115200n8";
65 };
66
67 leds {
68 compatible = "gpio-leds";
69
70 red {
71 label ="licheepi:red:usr";
72 gpios = <&pio 2 5 GPIO_ACTIVE_LOW>;
73 };
74
75 green {
76 label ="licheepi:green:usr";
77 gpios = <&pio 2 19 GPIO_ACTIVE_LOW>;
78 default-state = "on";
79 };
80
81 blue {
82 label ="licheepi:blue:usr";
83 gpios = <&pio 2 4 GPIO_ACTIVE_LOW>;
84 };
85
86 };
87};
88
89&cpu0 {
90 cpu-supply = <&reg_dcdc2>;
91};
92
93&ehci0 {
94 status = "okay";
95};
96
97&i2c0 {
98 pinctrl-names = "default";
99 pinctrl-0 = <&i2c0_pins_a>;
100 status = "okay";
101
102 axp209: pmic@34 {
103 compatible = "x-powers,axp209";
104 reg = <0x34>;
105 interrupts = <0>;
106
107 interrupt-controller;
108 #interrupt-cells = <1>;
109 };
110};
111
112&i2c1 {
113 pinctrl-names = "default";
114 pinctrl-0 = <&i2c1_pins_a>;
115 status = "disabled";
116};
117
118&i2c2 {
119 pinctrl-names = "default";
120 pinctrl-0 = <&i2c2_pins_a>;
121 status = "disabled";
122};
123
124&lradc {
125 vref-supply = <&reg_ldo2>;
126 status = "okay";
127
128 button@984 {
129 label = "Home";
130 linux,code = <KEY_HOMEPAGE>;
131 channel = <0>;
132 voltage = <984126>;
133 };
134};
135
136&mmc0 {
137 pinctrl-names = "default";
138 pinctrl-0 = <&mmc0_pins_a>;
139 vmmc-supply = <&reg_vcc3v3>;
140 bus-width = <4>;
141 broken-cd;
142 status = "okay";
143};
144
145&mmc2 {
146 pinctrl-names = "default";
147 pinctrl-0 = <&mmc2_4bit_pins_a>;
148 vmmc-supply = <&reg_vcc3v3>;
149 bus-width = <4>;
150 broken-cd;
151 status = "okay";
152};
153
154&ohci0 {
155 status = "okay";
156};
157
158&otg_sram {
159 status = "okay";
160};
161
162#include "axp209.dtsi"
163
164&reg_dcdc2 {
165 regulator-always-on;
166 regulator-min-microvolt = <1000000>;
167 regulator-max-microvolt = <1500000>;
168 regulator-name = "vdd-cpu";
169};
170
171&reg_dcdc3 {
172 regulator-always-on;
173 regulator-min-microvolt = <1000000>;
174 regulator-max-microvolt = <1400000>;
175 regulator-name = "vdd-int-dll";
176};
177
178&reg_ldo1 {
179 regulator-name = "vdd-rtc";
180};
181
182&reg_ldo2 {
183 regulator-always-on;
184 regulator-min-microvolt = <3000000>;
185 regulator-max-microvolt = <3000000>;
186 regulator-name = "avcc";
187};
188
189&reg_ldo3 {
190 regulator-min-microvolt = <1800000>;
191 regulator-max-microvolt = <1800000>;
192 regulator-name = "csi-1.8v";
193};
194
195&reg_ldo4 {
196 regulator-min-microvolt = <2800000>;
197 regulator-max-microvolt = <2800000>;
198 regulator-name = "csi-2.8v";
199};
200
201&reg_usb0_vbus {
202 gpio = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
203 status = "okay";
204};
205
206&uart1 {
207 pinctrl-names = "default";
208 pinctrl-0 = <&uart1_pins_b>;
209 status = "okay";
210};
211
212&usb_otg {
213 dr_mode = "otg";
214 status = "okay";
215};
216
217&usbphy {
218 pinctrl-names = "default";
219 usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
220 usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
221 usb0_vbus-supply = <&reg_usb0_vbus>;
222 usb1_vbus-supply = <&reg_vcc5v0>;
223 status = "okay";
224};
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 7ab6b336533e..c058d37d5433 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -582,6 +582,7 @@
582 "PF4", "PF5"; 582 "PF4", "PF5";
583 function = "mmc0"; 583 function = "mmc0";
584 drive-strength = <30>; 584 drive-strength = <30>;
585 bias-pull-up;
585 }; 586 };
586 587
587 mmc2_pins_a: mmc2@0 { 588 mmc2_pins_a: mmc2@0 {
@@ -593,6 +594,14 @@
593 bias-pull-up; 594 bias-pull-up;
594 }; 595 };
595 596
597 mmc2_4bit_pins_a: mmc2-4bit@0 {
598 pins = "PC6", "PC7", "PC8", "PC9",
599 "PC10", "PC11";
600 function = "mmc2";
601 drive-strength = <30>;
602 bias-pull-up;
603 };
604
596 spi2_pins_a: spi2@0 { 605 spi2_pins_a: spi2@0 {
597 pins = "PE1", "PE2", "PE3"; 606 pins = "PE1", "PE2", "PE3";
598 function = "spi2"; 607 function = "spi2";
diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index b168d6df2b30..9062d0f61133 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -244,6 +244,7 @@
244 reg = <0x68>; 244 reg = <0x68>;
245 interrupt-parent = <&nmi_intc>; 245 interrupt-parent = <&nmi_intc>;
246 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 246 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
247 x-powers,drive-vbus-en;
247 }; 248 };
248}; 249};
249 250
@@ -302,6 +303,11 @@
302 regulator-name = "vcc-dram"; 303 regulator-name = "vcc-dram";
303}; 304};
304 305
306&reg_drivevbus {
307 regulator-name = "usb0-vbus";
308 status = "okay";
309};
310
305&reg_usb1_vbus { 311&reg_usb1_vbus {
306 gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; /* PH24 */ 312 gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; /* PH24 */
307 status = "okay"; 313 status = "okay";
@@ -326,12 +332,25 @@
326 status = "okay"; 332 status = "okay";
327}; 333};
328 334
335&usb_otg {
336 dr_mode = "otg";
337 status = "okay";
338};
339
340&usb_power_supply {
341 status = "okay";
342};
343
329&usb1_vbus_pin_a { 344&usb1_vbus_pin_a {
330 /* different pin from sunxi-common-regulators */ 345 /* different pin from sunxi-common-regulators */
331 pins = "PH24"; 346 pins = "PH24";
332}; 347};
333 348
334&usbphy { 349&usbphy {
350 usb0_id_det-gpio = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
351 usb0_vbus_det-gpio = <&pio 0 16 GPIO_ACTIVE_HIGH>; /* PA16 */
352 usb0_vbus_power-supply = <&usb_power_supply>;
353 usb0_vbus-supply = <&reg_drivevbus>;
335 usb1_vbus-supply = <&reg_usb1_vbus>; 354 usb1_vbus-supply = <&reg_usb1_vbus>;
336 status = "okay"; 355 status = "okay";
337}; 356};
diff --git a/arch/arm/boot/dts/sun6i-a31-i7.dts b/arch/arm/boot/dts/sun6i-a31-i7.dts
index f3468a14596e..2bc57d2dcd80 100644
--- a/arch/arm/boot/dts/sun6i-a31-i7.dts
+++ b/arch/arm/boot/dts/sun6i-a31-i7.dts
@@ -69,6 +69,29 @@
69 gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; 69 gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>;
70 }; 70 };
71 }; 71 };
72
73 sound {
74 compatible = "simple-audio-card";
75 simple-audio-card,name = "On-board SPDIF";
76 simple-audio-card,cpu {
77 sound-dai = <&spdif>;
78 };
79
80 simple-audio-card,codec {
81 sound-dai = <&spdif_out>;
82 };
83 };
84
85 spdif_out: spdif-out {
86 #sound-dai-cells = <0>;
87 compatible = "linux,spdif-dit";
88 };
89};
90
91&codec {
92 allwinner,audio-routing =
93 "Headphone", "HP";
94 status = "okay";
72}; 95};
73 96
74&ehci0 { 97&ehci0 {
@@ -132,6 +155,13 @@
132 status = "okay"; 155 status = "okay";
133}; 156};
134 157
158&spdif {
159 pinctrl-names = "default";
160 pinctrl-0 = <&spdif_pins_a>;
161 spdif-out = "okay";
162 status = "okay";
163};
164
135&uart0 { 165&uart0 {
136 pinctrl-names = "default"; 166 pinctrl-names = "default";
137 pinctrl-0 = <&uart0_pins_a>; 167 pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 53e940738c7f..8b0b6a2dafba 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -547,6 +547,7 @@
547 "PF3", "PF4", "PF5"; 547 "PF3", "PF4", "PF5";
548 function = "mmc0"; 548 function = "mmc0";
549 drive-strength = <30>; 549 drive-strength = <30>;
550 bias-pull-up;
550 }; 551 };
551 552
552 mmc1_pins_a: mmc1@0 { 553 mmc1_pins_a: mmc1@0 {
@@ -554,6 +555,7 @@
554 "PG4", "PG5"; 555 "PG4", "PG5";
555 function = "mmc1"; 556 function = "mmc1";
556 drive-strength = <30>; 557 drive-strength = <30>;
558 bias-pull-up;
557 }; 559 };
558 560
559 mmc2_pins_a: mmc2@0 { 561 mmc2_pins_a: mmc2@0 {
@@ -571,6 +573,7 @@
571 "PC24"; 573 "PC24";
572 function = "mmc2"; 574 function = "mmc2";
573 drive-strength = <30>; 575 drive-strength = <30>;
576 bias-pull-up;
574 }; 577 };
575 578
576 mmc3_8bit_emmc_pins: mmc3@1 { 579 mmc3_8bit_emmc_pins: mmc3@1 {
@@ -580,6 +583,12 @@
580 "PC24"; 583 "PC24";
581 function = "mmc3"; 584 function = "mmc3";
582 drive-strength = <40>; 585 drive-strength = <40>;
586 bias-pull-up;
587 };
588
589 spdif_pins_a: spdif@0 {
590 pins = "PH28";
591 function = "spdif";
583 }; 592 };
584 593
585 uart0_pins_a: uart0@0 { 594 uart0_pins_a: uart0@0 {
@@ -604,6 +613,19 @@
604 reg = <0x01c20ca0 0x20>; 613 reg = <0x01c20ca0 0x20>;
605 }; 614 };
606 615
616 spdif: spdif@01c21000 {
617 #sound-dai-cells = <0>;
618 compatible = "allwinner,sun6i-a31-spdif";
619 reg = <0x01c21000 0x400>;
620 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
621 clocks = <&ccu CLK_APB1_SPDIF>, <&ccu CLK_SPDIF>;
622 resets = <&ccu RST_APB1_SPDIF>;
623 clock-names = "apb", "spdif";
624 dmas = <&dma 2>, <&dma 2>;
625 dma-names = "rx", "tx";
626 status = "disabled";
627 };
628
607 lradc: lradc@01c22800 { 629 lradc: lradc@01c22800 {
608 compatible = "allwinner,sun4i-a10-lradc-keys"; 630 compatible = "allwinner,sun4i-a10-lradc-keys";
609 reg = <0x01c22800 0x100>; 631 reg = <0x01c22800 0x100>;
diff --git a/arch/arm/boot/dts/sun6i-a31s-sina31s.dts b/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
index 8743aeed1275..7ff68bdd7109 100644
--- a/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
@@ -153,6 +153,11 @@
153 regulator-name = "vcc-gmac-phy"; 153 regulator-name = "vcc-gmac-phy";
154}; 154};
155 155
156&usb_otg {
157 dr_mode = "peripheral";
158 status = "okay";
159};
160
156&usbphy { 161&usbphy {
157 status = "okay"; 162 status = "okay";
158}; 163};
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
index 19d63d4049de..83516bc81225 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
@@ -76,6 +76,13 @@
76 }; 76 };
77 }; 77 };
78 78
79 wifi_pwrseq: wifi-pwrseq {
80 compatible = "mmc-pwrseq-simple";
81 pinctrl-names = "default";
82 pinctrl-0 = <&vmmc3_pin_bananapro>;
83 reset-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>;
84 };
85
79 reg_gmac_3v3: gmac-3v3 { 86 reg_gmac_3v3: gmac-3v3 {
80 compatible = "regulator-fixed"; 87 compatible = "regulator-fixed";
81 pinctrl-names = "default"; 88 pinctrl-names = "default";
@@ -87,23 +94,16 @@
87 enable-active-high; 94 enable-active-high;
88 gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; 95 gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>;
89 }; 96 };
90
91 reg_vmmc3: vmmc3 {
92 compatible = "regulator-fixed";
93 pinctrl-names = "default";
94 pinctrl-0 = <&vmmc3_pin_bananapro>;
95 regulator-name = "vmmc3";
96 regulator-min-microvolt = <3300000>;
97 regulator-max-microvolt = <3300000>;
98 enable-active-high;
99 gpio = <&pio 7 22 GPIO_ACTIVE_HIGH>;
100 };
101}; 97};
102 98
103&ahci { 99&ahci {
104 status = "okay"; 100 status = "okay";
105}; 101};
106 102
103&codec {
104 status = "okay";
105};
106
107&ehci0 { 107&ehci0 {
108 status = "okay"; 108 status = "okay";
109}; 109};
@@ -166,10 +166,19 @@
166&mmc3 { 166&mmc3 {
167 pinctrl-names = "default"; 167 pinctrl-names = "default";
168 pinctrl-0 = <&mmc3_pins_a>; 168 pinctrl-0 = <&mmc3_pins_a>;
169 vmmc-supply = <&reg_vmmc3>; 169 vmmc-supply = <&reg_vcc3v3>;
170 mmc-pwrseq = <&wifi_pwrseq>;
170 bus-width = <4>; 171 bus-width = <4>;
171 non-removable; 172 non-removable;
172 status = "okay"; 173 status = "okay";
174
175 brcmf: bcrmf@1 {
176 reg = <1>;
177 compatible = "brcm,bcm4329-fmac";
178 interrupt-parent = <&pio>;
179 interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>;
180 interrupt-names = "host-wake";
181 };
173}; 182};
174 183
175&ohci0 { 184&ohci0 {
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
index 7af954142132..a1450c10b08e 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
@@ -120,6 +120,18 @@
120 }; 120 };
121}; 121};
122 122
123&i2c1 {
124 pinctrl-names = "default";
125 pinctrl-0 = <&i2c1_pins_a>;
126 status = "okay";
127};
128
129&i2c2 {
130 pinctrl-names = "default";
131 pinctrl-0 = <&i2c2_pins_a>;
132 status = "okay";
133};
134
123&lradc { 135&lradc {
124 vref-supply = <&reg_vcc3v0>; 136 vref-supply = <&reg_vcc3v0>;
125 status = "okay"; 137 status = "okay";
@@ -280,12 +292,38 @@
280 status = "okay"; 292 status = "okay";
281}; 293};
282 294
295&spi1 {
296 pinctrl-names = "default";
297 pinctrl-0 = <&spi1_pins_a>,
298 <&spi1_cs0_pins_a>;
299 status = "okay";
300};
301
302&spi2 {
303 pinctrl-names = "default";
304 pinctrl-0 = <&spi2_pins_a>,
305 <&spi2_cs0_pins_a>;
306 status = "okay";
307};
308
283&uart0 { 309&uart0 {
284 pinctrl-names = "default"; 310 pinctrl-names = "default";
285 pinctrl-0 = <&uart0_pins_a>; 311 pinctrl-0 = <&uart0_pins_a>;
286 status = "okay"; 312 status = "okay";
287}; 313};
288 314
315&uart6 {
316 pinctrl-names = "default";
317 pinctrl-0 = <&uart6_pins_a>;
318 status = "okay";
319};
320
321&uart7 {
322 pinctrl-names = "default";
323 pinctrl-0 = <&uart7_pins_a>;
324 status = "okay";
325};
326
289&usb_otg { 327&usb_otg {
290 dr_mode = "otg"; 328 dr_mode = "otg";
291 status = "okay"; 329 status = "okay";
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index b421d5170e0a..71cca5360728 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
@@ -112,57 +112,9 @@
112 status = "okay"; 112 status = "okay";
113 113
114 axp209: pmic@34 { 114 axp209: pmic@34 {
115 compatible = "x-powers,axp209";
116 reg = <0x34>; 115 reg = <0x34>;
117 interrupt-parent = <&nmi_intc>; 116 interrupt-parent = <&nmi_intc>;
118 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 117 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
119
120 interrupt-controller;
121 #interrupt-cells = <1>;
122
123 acin-supply = <&reg_axp_ipsout>;
124 vin2-supply = <&reg_axp_ipsout>;
125 vin3-supply = <&reg_axp_ipsout>;
126 ldo24in-supply = <&reg_axp_ipsout>;
127 ldo3in-supply = <&reg_axp_ipsout>;
128
129 regulators {
130 vdd_rtc: ldo1 {
131 regulator-min-microvolt = <1300000>;
132 regulator-max-microvolt = <1300000>;
133 regulator-always-on;
134 };
135
136 avcc: ldo2 {
137 regulator-min-microvolt = <1800000>;
138 regulator-max-microvolt = <3300000>;
139 regulator-always-on;
140 };
141
142 vcc_csi0: ldo3 {
143 regulator-min-microvolt = <700000>;
144 regulator-max-microvolt = <3500000>;
145 regulator-always-on;
146 };
147
148 vcc_csi1: ldo4 {
149 regulator-min-microvolt = <1250000>;
150 regulator-max-microvolt = <3300000>;
151 regulator-always-on;
152 };
153
154 vdd_cpu: dcdc2 {
155 regulator-min-microvolt = <700000>;
156 regulator-max-microvolt = <2275000>;
157 regulator-always-on;
158 };
159
160 vdd_int: dcdc3 {
161 regulator-min-microvolt = <700000>;
162 regulator-max-microvolt = <3500000>;
163 regulator-always-on;
164 };
165 };
166 }; 118 };
167}; 119};
168 120
@@ -236,6 +188,48 @@
236 status = "okay"; 188 status = "okay";
237}; 189};
238 190
191#include "axp209.dtsi"
192
193&reg_dcdc2 {
194 regulator-always-on;
195 regulator-min-microvolt = <1000000>;
196 regulator-max-microvolt = <1400000>;
197 regulator-name = "vdd-cpu";
198};
199
200&reg_dcdc3 {
201 regulator-always-on;
202 regulator-min-microvolt = <1000000>;
203 regulator-max-microvolt = <1400000>;
204 regulator-name = "vdd-int-dll";
205};
206
207&reg_ldo1 {
208 regulator-always-on;
209 regulator-min-microvolt = <1300000>;
210 regulator-max-microvolt = <1300000>;
211 regulator-name = "vdd-rtc";
212};
213
214&reg_ldo2 {
215 regulator-always-on;
216 regulator-min-microvolt = <3000000>;
217 regulator-max-microvolt = <3000000>;
218 regulator-name = "avcc";
219};
220
221&reg_ldo3 {
222 regulator-min-microvolt = <2800000>;
223 regulator-max-microvolt = <2800000>;
224 regulator-name = "vddio-csi0";
225};
226
227&reg_ldo4 {
228 regulator-min-microvolt = <2800000>;
229 regulator-max-microvolt = <2800000>;
230 regulator-name = "vddio-csi1";
231};
232
239&reg_usb0_vbus { 233&reg_usb0_vbus {
240 pinctrl-0 = <&usb0_vbus_pin_lime2>; 234 pinctrl-0 = <&usb0_vbus_pin_lime2>;
241 gpio = <&pio 2 17 GPIO_ACTIVE_HIGH>; 235 gpio = <&pio 2 17 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 8e970c40f236..2db97fc820dd 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -871,6 +871,7 @@
871 status = "disabled"; 871 status = "disabled";
872 #address-cells = <1>; 872 #address-cells = <1>;
873 #size-cells = <0>; 873 #size-cells = <0>;
874 num-cs = <4>;
874 }; 875 };
875 876
876 spi1: spi@01c06000 { 877 spi1: spi@01c06000 {
@@ -885,6 +886,7 @@
885 status = "disabled"; 886 status = "disabled";
886 #address-cells = <1>; 887 #address-cells = <1>;
887 #size-cells = <0>; 888 #size-cells = <0>;
889 num-cs = <1>;
888 }; 890 };
889 891
890 emac: ethernet@01c0b000 { 892 emac: ethernet@01c0b000 {
@@ -1037,6 +1039,7 @@
1037 status = "disabled"; 1039 status = "disabled";
1038 #address-cells = <1>; 1040 #address-cells = <1>;
1039 #size-cells = <0>; 1041 #size-cells = <0>;
1042 num-cs = <1>;
1040 }; 1043 };
1041 1044
1042 ahci: sata@01c18000 { 1045 ahci: sata@01c18000 {
@@ -1079,6 +1082,7 @@
1079 status = "disabled"; 1082 status = "disabled";
1080 #address-cells = <1>; 1083 #address-cells = <1>;
1081 #size-cells = <0>; 1084 #size-cells = <0>;
1085 num-cs = <1>;
1082 }; 1086 };
1083 1087
1084 pio: pinctrl@01c20800 { 1088 pio: pinctrl@01c20800 {
@@ -1179,6 +1183,7 @@
1179 "PF3", "PF4", "PF5"; 1183 "PF3", "PF4", "PF5";
1180 function = "mmc0"; 1184 function = "mmc0";
1181 drive-strength = <30>; 1185 drive-strength = <30>;
1186 bias-pull-up;
1182 }; 1187 };
1183 1188
1184 mmc0_cd_pin_reference_design: mmc0_cd_pin@0 { 1189 mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
@@ -1200,6 +1205,7 @@
1200 "PI7", "PI8", "PI9"; 1205 "PI7", "PI8", "PI9";
1201 function = "mmc3"; 1206 function = "mmc3";
1202 drive-strength = <30>; 1207 drive-strength = <30>;
1208 bias-pull-up;
1203 }; 1209 };
1204 1210
1205 ps20_pins_a: ps20@0 { 1211 ps20_pins_a: ps20@0 {
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 58055c39901f..9f9bc2c5ac97 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -84,7 +84,7 @@
84 #address-cells = <1>; 84 #address-cells = <1>;
85 #size-cells = <0>; 85 #size-cells = <0>;
86 86
87 cpu@0 { 87 cpu0: cpu@0 {
88 compatible = "arm,cortex-a7"; 88 compatible = "arm,cortex-a7";
89 device_type = "cpu"; 89 device_type = "cpu";
90 reg = <0>; 90 reg = <0>;
@@ -106,14 +106,16 @@
106 #clock-cells = <0>; 106 #clock-cells = <0>;
107 compatible = "fixed-clock"; 107 compatible = "fixed-clock";
108 clock-frequency = <24000000>; 108 clock-frequency = <24000000>;
109 clock-accuracy = <50000>;
109 clock-output-names = "osc24M"; 110 clock-output-names = "osc24M";
110 }; 111 };
111 112
112 osc32k: osc32k_clk { 113 ext_osc32k: ext_osc32k_clk {
113 #clock-cells = <0>; 114 #clock-cells = <0>;
114 compatible = "fixed-clock"; 115 compatible = "fixed-clock";
115 clock-frequency = <32768>; 116 clock-frequency = <32768>;
116 clock-output-names = "osc32k"; 117 clock-accuracy = <50000>;
118 clock-output-names = "ext-osc32k";
117 }; 119 };
118 }; 120 };
119 121
@@ -256,7 +258,7 @@
256 258
257 ccu: clock@01c20000 { 259 ccu: clock@01c20000 {
258 reg = <0x01c20000 0x400>; 260 reg = <0x01c20000 0x400>;
259 clocks = <&osc24M>, <&osc32k>; 261 clocks = <&osc24M>, <&rtc 0>;
260 clock-names = "hosc", "losc"; 262 clock-names = "hosc", "losc";
261 #clock-cells = <1>; 263 #clock-cells = <1>;
262 #reset-cells = <1>; 264 #reset-cells = <1>;
@@ -266,7 +268,7 @@
266 /* compatible gets set in SoC specific dtsi file */ 268 /* compatible gets set in SoC specific dtsi file */
267 reg = <0x01c20800 0x400>; 269 reg = <0x01c20800 0x400>;
268 /* interrupts get set in SoC specific dtsi file */ 270 /* interrupts get set in SoC specific dtsi file */
269 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; 271 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
270 clock-names = "apb", "hosc", "losc"; 272 clock-names = "apb", "hosc", "losc";
271 gpio-controller; 273 gpio-controller;
272 interrupt-controller; 274 interrupt-controller;
@@ -293,6 +295,7 @@
293 "PF3", "PF4", "PF5"; 295 "PF3", "PF4", "PF5";
294 function = "mmc0"; 296 function = "mmc0";
295 drive-strength = <30>; 297 drive-strength = <30>;
298 bias-pull-up;
296 }; 299 };
297 300
298 mmc1_pins_a: mmc1@0 { 301 mmc1_pins_a: mmc1@0 {
@@ -300,6 +303,7 @@
300 "PG3", "PG4", "PG5"; 303 "PG3", "PG4", "PG5";
301 function = "mmc1"; 304 function = "mmc1";
302 drive-strength = <30>; 305 drive-strength = <30>;
306 bias-pull-up;
303 }; 307 };
304 308
305 mmc2_8bit_pins: mmc2_8bit { 309 mmc2_8bit_pins: mmc2_8bit {
@@ -309,6 +313,7 @@
309 "PC15", "PC16"; 313 "PC15", "PC16";
310 function = "mmc2"; 314 function = "mmc2";
311 drive-strength = <30>; 315 drive-strength = <30>;
316 bias-pull-up;
312 }; 317 };
313 318
314 pwm0_pins: pwm0 { 319 pwm0_pins: pwm0 {
@@ -483,6 +488,9 @@
483 reg = <0x01f00000 0x54>; 488 reg = <0x01f00000 0x54>;
484 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 489 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
485 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 490 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
491 clock-output-names = "osc32k";
492 clocks = <&ext_osc32k>;
493 #clock-cells = <1>;
486 }; 494 };
487 495
488 nmi_intc: interrupt-controller@01f00c0c { 496 nmi_intc: interrupt-controller@01f00c0c {
@@ -535,6 +543,10 @@
535 compatible = "allwinner,sun6i-a31-clock-reset"; 543 compatible = "allwinner,sun6i-a31-clock-reset";
536 #reset-cells = <1>; 544 #reset-cells = <1>;
537 }; 545 };
546
547 codec_analog: codec-analog {
548 compatible = "allwinner,sun8i-a23-codec-analog";
549 };
538 }; 550 };
539 551
540 cpucfg@01f01c00 { 552 cpucfg@01f01c00 {
@@ -557,7 +569,7 @@
557 compatible = "allwinner,sun8i-a23-r-pinctrl"; 569 compatible = "allwinner,sun8i-a23-r-pinctrl";
558 reg = <0x01f02c00 0x400>; 570 reg = <0x01f02c00 0x400>;
559 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 571 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
560 clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>; 572 clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
561 clock-names = "apb", "hosc", "losc"; 573 clock-names = "apb", "hosc", "losc";
562 resets = <&apb0_rst 0>; 574 resets = <&apb0_rst 0>;
563 gpio-controller; 575 gpio-controller;
diff --git a/arch/arm/boot/dts/sun8i-a23-q8-tablet.dts b/arch/arm/boot/dts/sun8i-a23-q8-tablet.dts
index 956320a6cc78..3ab5c0c09d93 100644
--- a/arch/arm/boot/dts/sun8i-a23-q8-tablet.dts
+++ b/arch/arm/boot/dts/sun8i-a23-q8-tablet.dts
@@ -48,3 +48,26 @@
48 model = "Q8 A23 Tablet"; 48 model = "Q8 A23 Tablet";
49 compatible = "allwinner,q8-a23", "allwinner,sun8i-a23"; 49 compatible = "allwinner,q8-a23", "allwinner,sun8i-a23";
50}; 50};
51
52&codec {
53 pinctrl-0 = <&codec_pa_pin>;
54 allwinner,pa-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
55 allwinner,audio-routing =
56 "Headphone", "HP",
57 "Headphone", "HPCOM",
58 "Speaker", "HP",
59 "MIC1", "Mic",
60 "MIC2", "Headset Mic",
61 "Mic", "MBIAS",
62 "Headset Mic", "HBIAS";
63 status = "okay";
64};
65
66&pio {
67 codec_pa_pin: codec_pa_pin@0 {
68 allwinner,pins = "PH9";
69 allwinner,function = "gpio_out";
70 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
71 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
72 };
73};
diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 54d045dab825..4d1f929780a8 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -48,6 +48,22 @@
48 memory { 48 memory {
49 reg = <0x40000000 0x40000000>; 49 reg = <0x40000000 0x40000000>;
50 }; 50 };
51
52 soc@01c00000 {
53 codec: codec@01c22c00 {
54 #sound-dai-cells = <0>;
55 compatible = "allwinner,sun8i-a23-codec";
56 reg = <0x01c22c00 0x400>;
57 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
58 clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
59 clock-names = "apb", "codec";
60 resets = <&ccu RST_BUS_CODEC>;
61 dmas = <&dma 15>, <&dma 15>;
62 dma-names = "rx", "tx";
63 allwinner,codec-analog-controls = <&codec_analog>;
64 status = "disabled";
65 };
66 };
51}; 67};
52 68
53&ccu { 69&ccu {
diff --git a/arch/arm/boot/dts/sun8i-a33-olinuxino.dts b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
index 231d115d1997..be9a6b8d7a1e 100644
--- a/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
+++ b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
@@ -120,7 +120,7 @@
120 }; 120 };
121}; 121};
122 122
123#include "axp22x.dtsi" 123#include "axp223.dtsi"
124 124
125&reg_aldo1 { 125&reg_aldo1 {
126 regulator-always-on; 126 regulator-always-on;
diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
index 370ee82882de..c206ed693aa2 100644
--- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
+++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
@@ -61,6 +61,27 @@
61 chosen { 61 chosen {
62 stdout-path = "serial0:115200n8"; 62 stdout-path = "serial0:115200n8";
63 }; 63 };
64
65 panel {
66 compatible = "netron-dy,e231732";
67 #address-cells = <1>;
68 #size-cells = <0>;
69
70 port@0 {
71 reg = <0>;
72 #address-cells = <1>;
73 #size-cells = <0>;
74
75 panel_input: endpoint@0 {
76 reg = <0>;
77 remote-endpoint = <&tcon0_out_panel>;
78 };
79 };
80 };
81};
82
83&de {
84 status = "okay";
64}; 85};
65 86
66&ehci0 { 87&ehci0 {
@@ -144,7 +165,7 @@
144 }; 165 };
145}; 166};
146 167
147#include "axp22x.dtsi" 168#include "axp223.dtsi"
148 169
149&reg_aldo1 { 170&reg_aldo1 {
150 regulator-always-on; 171 regulator-always-on;
@@ -206,6 +227,19 @@
206 regulator-name = "vcc-rtc"; 227 regulator-name = "vcc-rtc";
207}; 228};
208 229
230&tcon0 {
231 pinctrl-names = "default";
232 pinctrl-0 = <&lcd_rgb666_pins>;
233 status = "okay";
234};
235
236&tcon0_out {
237 tcon0_out_panel: endpoint@0 {
238 reg = <0>;
239 remote-endpoint = <&panel_input>;
240 };
241};
242
209&uart0 { 243&uart0 {
210 pinctrl-names = "default"; 244 pinctrl-names = "default";
211 pinctrl-0 = <&uart0_pins_b>; 245 pinctrl-0 = <&uart0_pins_b>;
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index 63d5181ffff8..5a9ba43ccb07 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -45,7 +45,42 @@
45#include "sun8i-a23-a33.dtsi" 45#include "sun8i-a23-a33.dtsi"
46 46
47/ { 47/ {
48 cpu0_opp_table: opp_table0 {
49 compatible = "operating-points-v2";
50 opp-shared;
51
52 opp@648000000 {
53 opp-hz = /bits/ 64 <648000000>;
54 opp-microvolt = <1040000>;
55 clock-latency-ns = <244144>; /* 8 32k periods */
56 };
57
58 opp@816000000 {
59 opp-hz = /bits/ 64 <816000000>;
60 opp-microvolt = <1100000>;
61 clock-latency-ns = <244144>; /* 8 32k periods */
62 };
63
64 opp@1008000000 {
65 opp-hz = /bits/ 64 <1008000000>;
66 opp-microvolt = <1200000>;
67 clock-latency-ns = <244144>; /* 8 32k periods */
68 };
69
70 opp@1200000000 {
71 opp-hz = /bits/ 64 <1200000000>;
72 opp-microvolt = <1320000>;
73 clock-latency-ns = <244144>; /* 8 32k periods */
74 };
75 };
76
48 cpus { 77 cpus {
78 cpu@0 {
79 clocks = <&ccu CLK_CPUX>;
80 clock-names = "cpu";
81 operating-points-v2 = <&cpu0_opp_table>;
82 };
83
49 cpu@2 { 84 cpu@2 {
50 compatible = "arm,cortex-a7"; 85 compatible = "arm,cortex-a7";
51 device_type = "cpu"; 86 device_type = "cpu";
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index efbafd2a7329..a789a7caf217 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -171,6 +171,7 @@
171 "PF3", "PF4", "PF5"; 171 "PF3", "PF4", "PF5";
172 function = "mmc0"; 172 function = "mmc0";
173 drive-strength = <30>; 173 drive-strength = <30>;
174 bias-pull-up;
174 }; 175 };
175 176
176 uart0_pins_a: uart0@0 { 177 uart0_pins_a: uart0@0 {
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
new file mode 100644
index 000000000000..b7ca916d871d
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -0,0 +1,160 @@
1/*
2 * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
3 *
4 * Based on sun8i-h3-orangepi-one.dts, which is:
5 * Copyright (C) 2016 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45
46/dts-v1/;
47#include "sun8i-h3.dtsi"
48#include "sunxi-common-regulators.dtsi"
49
50#include <dt-bindings/gpio/gpio.h>
51#include <dt-bindings/input/input.h>
52#include <dt-bindings/pinctrl/sun4i-a10.h>
53
54/ {
55 model = "Xunlong Orange Pi Zero";
56 compatible = "xunlong,orangepi-zero", "allwinner,sun8i-h2-plus";
57
58 aliases {
59 serial0 = &uart0;
60 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
61 ethernet1 = &xr819;
62 };
63
64 chosen {
65 stdout-path = "serial0:115200n8";
66 };
67
68 leds {
69 compatible = "gpio-leds";
70
71 pwr_led {
72 label = "orangepi:green:pwr";
73 gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
74 default-state = "on";
75 };
76
77 status_led {
78 label = "orangepi:red:status";
79 gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
80 };
81 };
82
83 reg_vcc_wifi: reg_vcc_wifi {
84 compatible = "regulator-fixed";
85 regulator-min-microvolt = <3300000>;
86 regulator-max-microvolt = <3300000>;
87 regulator-name = "vcc-wifi";
88 enable-active-high;
89 gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>;
90 };
91
92 wifi_pwrseq: wifi_pwrseq {
93 compatible = "mmc-pwrseq-simple";
94 reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
95 post-power-on-delay-ms = <200>;
96 };
97};
98
99&ehci1 {
100 status = "okay";
101};
102
103&mmc0 {
104 pinctrl-names = "default";
105 pinctrl-0 = <&mmc0_pins_a>;
106 vmmc-supply = <&reg_vcc3v3>;
107 bus-width = <4>;
108 cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
109 cd-inverted;
110 status = "okay";
111};
112
113&mmc1 {
114 pinctrl-names = "default";
115 pinctrl-0 = <&mmc1_pins_a>;
116 vmmc-supply = <&reg_vcc_wifi>;
117 mmc-pwrseq = <&wifi_pwrseq>;
118 bus-width = <4>;
119 non-removable;
120 status = "okay";
121
122 /*
123 * Explicitly define the sdio device, so that we can add an ethernet
124 * alias for it (which e.g. makes u-boot set a mac-address).
125 */
126 xr819: sdio_wifi@1 {
127 reg = <1>;
128 };
129};
130
131&mmc1_pins_a {
132 bias-pull-up;
133};
134
135&ohci1 {
136 status = "okay";
137};
138
139&uart0 {
140 pinctrl-names = "default";
141 pinctrl-0 = <&uart0_pins_a>;
142 status = "okay";
143};
144
145&uart1 {
146 pinctrl-names = "default";
147 pinctrl-0 = <&uart1_pins>;
148 status = "disabled";
149};
150
151&uart2 {
152 pinctrl-names = "default";
153 pinctrl-0 = <&uart2_pins>;
154 status = "disabled";
155};
156
157&usbphy {
158 /* USB VBUS is always on */
159 status = "okay";
160};
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
new file mode 100644
index 000000000000..25b225b7dfd6
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
@@ -0,0 +1,160 @@
1/*
2 * Copyright (C) 2017 Marcus Cooper <codekipper@gmail.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun8i-h3.dtsi"
45#include "sunxi-common-regulators.dtsi"
46
47#include <dt-bindings/gpio/gpio.h>
48#include <dt-bindings/input/input.h>
49#include <dt-bindings/pinctrl/sun4i-a10.h>
50
51/ {
52 model = "Beelink X2";
53 compatible = "roofull,beelink-x2", "allwinner,sun8i-h3";
54
55 aliases {
56 serial0 = &uart0;
57 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
58 ethernet1 = &sdiowifi;
59 };
60
61 chosen {
62 stdout-path = "serial0:115200n8";
63 };
64
65 leds {
66 compatible = "gpio-leds";
67
68 blue {
69 label = "beelink-x2:blue:pwr";
70 gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
71 default-state = "on";
72 };
73
74 red {
75 label = "beelink-x2:red:standby";
76 gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
77 };
78 };
79
80 wifi_pwrseq: wifi_pwrseq {
81 compatible = "mmc-pwrseq-simple";
82 reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
83 };
84
85 sound_spdif {
86 compatible = "simple-audio-card";
87 simple-audio-card,name = "On-board SPDIF";
88
89 simple-audio-card,cpu {
90 sound-dai = <&spdif>;
91 };
92
93 simple-audio-card,codec {
94 sound-dai = <&spdif_out>;
95 };
96 };
97
98 spdif_out: spdif-out {
99 #sound-dai-cells = <0>;
100 compatible = "linux,spdif-dit";
101 };
102};
103
104&ehci1 {
105 status = "okay";
106};
107
108&ir {
109 pinctrl-names = "default";
110 pinctrl-0 = <&ir_pins_a>;
111 status = "okay";
112};
113
114&mmc0 {
115 pinctrl-names = "default";
116 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
117 vmmc-supply = <&reg_vcc3v3>;
118 bus-width = <4>;
119 cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
120 cd-inverted;
121 status = "okay";
122};
123
124&mmc1 {
125 pinctrl-names = "default";
126 pinctrl-0 = <&mmc1_pins_a>;
127 vmmc-supply = <&reg_vcc3v3>;
128 bus-width = <4>;
129 non-removable;
130 status = "okay";
131
132 /*
133 * Explicitly define the sdio device, so that we can add an ethernet
134 * alias for it (which e.g. makes u-boot set a mac-address).
135 */
136 sdiowifi: sdio_wifi@1 {
137 reg = <1>;
138 };
139};
140
141&ohci1 {
142 status = "okay";
143};
144
145&spdif {
146 pinctrl-names = "default";
147 pinctrl-0 = <&spdif_tx_pins_a>;
148 status = "okay";
149};
150
151&uart0 {
152 pinctrl-names = "default";
153 pinctrl-0 = <&uart0_pins_a>;
154 status = "okay";
155};
156
157&usbphy {
158 /* USB VBUS is on as long as VCC-IO is on */
159 status = "okay";
160};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 98b85be61e17..d43978d3294e 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -90,6 +90,14 @@
90 }; 90 };
91}; 91};
92 92
93&codec {
94 allwinner,audio-routing =
95 "Line Out", "LINEOUT",
96 "MIC1", "Mic",
97 "Mic", "MBIAS";
98 status = "okay";
99};
100
93&ehci1 { 101&ehci1 {
94 status = "okay"; 102 status = "okay";
95}; 103};
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 4e97378e1b28..27780b97c863 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -348,6 +348,7 @@
348 "PF4", "PF5"; 348 "PF4", "PF5";
349 function = "mmc0"; 349 function = "mmc0";
350 drive-strength = <30>; 350 drive-strength = <30>;
351 bias-pull-up;
351 }; 352 };
352 353
353 mmc0_cd_pin: mmc0_cd_pin@0 { 354 mmc0_cd_pin: mmc0_cd_pin@0 {
@@ -361,6 +362,7 @@
361 "PG4", "PG5"; 362 "PG4", "PG5";
362 function = "mmc1"; 363 function = "mmc1";
363 drive-strength = <30>; 364 drive-strength = <30>;
365 bias-pull-up;
364 }; 366 };
365 367
366 mmc2_8bit_pins: mmc2_8bit { 368 mmc2_8bit_pins: mmc2_8bit {
@@ -370,6 +372,12 @@
370 "PC15", "PC16"; 372 "PC15", "PC16";
371 function = "mmc2"; 373 function = "mmc2";
372 drive-strength = <30>; 374 drive-strength = <30>;
375 bias-pull-up;
376 };
377
378 spdif_tx_pins_a: spdif@0 {
379 pins = "PA17";
380 function = "spdif";
373 }; 381 };
374 382
375 spi0_pins: spi0 { 383 spi0_pins: spi0 {
@@ -454,6 +462,19 @@
454 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 462 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
455 }; 463 };
456 464
465 spdif: spdif@01c21000 {
466 #sound-dai-cells = <0>;
467 compatible = "allwinner,sun8i-h3-spdif";
468 reg = <0x01c21000 0x400>;
469 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
470 clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
471 resets = <&ccu RST_BUS_SPDIF>;
472 clock-names = "apb", "spdif";
473 dmas = <&dma 2>;
474 dma-names = "tx";
475 status = "disabled";
476 };
477
457 pwm: pwm@01c21400 { 478 pwm: pwm@01c21400 {
458 compatible = "allwinner,sun8i-h3-pwm"; 479 compatible = "allwinner,sun8i-h3-pwm";
459 reg = <0x01c21400 0x8>; 480 reg = <0x01c21400 0x8>;
@@ -462,6 +483,20 @@
462 status = "disabled"; 483 status = "disabled";
463 }; 484 };
464 485
486 codec: codec@01c22c00 {
487 #sound-dai-cells = <0>;
488 compatible = "allwinner,sun8i-h3-codec";
489 reg = <0x01c22c00 0x400>;
490 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
491 clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
492 clock-names = "apb", "codec";
493 resets = <&ccu RST_BUS_CODEC>;
494 dmas = <&dma 15>, <&dma 15>;
495 dma-names = "rx", "tx";
496 allwinner,codec-analog-controls = <&codec_analog>;
497 status = "disabled";
498 };
499
465 uart0: serial@01c28000 { 500 uart0: serial@01c28000 {
466 compatible = "snps,dw-apb-uart"; 501 compatible = "snps,dw-apb-uart";
467 reg = <0x01c28000 0x400>; 502 reg = <0x01c28000 0x400>;
@@ -577,6 +612,11 @@
577 #reset-cells = <1>; 612 #reset-cells = <1>;
578 }; 613 };
579 614
615 codec_analog: codec-analog@01f015c0 {
616 compatible = "allwinner,sun8i-h3-codec-analog";
617 reg = <0x01f015c0 0x4>;
618 };
619
580 ir: ir@01f02000 { 620 ir: ir@01f02000 {
581 compatible = "allwinner,sun5i-a13-ir"; 621 compatible = "allwinner,sun5i-a13-ir";
582 clocks = <&apb0_gates 1>, <&ir_clk>; 622 clocks = <&apb0_gates 1>, <&ir_clk>;
diff --git a/arch/arm/boot/dts/sun8i-r16-parrot.dts b/arch/arm/boot/dts/sun8i-r16-parrot.dts
index 6e42adbde60b..e4da572427b1 100644
--- a/arch/arm/boot/dts/sun8i-r16-parrot.dts
+++ b/arch/arm/boot/dts/sun8i-r16-parrot.dts
@@ -201,7 +201,7 @@
201 }; 201 };
202}; 202};
203 203
204#include "axp22x.dtsi" 204#include "axp223.dtsi"
205 205
206&reg_aldo1 { 206&reg_aldo1 {
207 regulator-always-on; 207 regulator-always-on;
diff --git a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
index 1493516e01d9..7097c18ff487 100644
--- a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
+++ b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
@@ -130,7 +130,7 @@
130 }; 130 };
131}; 131};
132 132
133#include "axp22x.dtsi" 133#include "axp223.dtsi"
134 134
135&reg_aldo1 { 135&reg_aldo1 {
136 regulator-always-on; 136 regulator-always-on;
@@ -214,6 +214,10 @@
214 regulator-name = "vcc-rtc"; 214 regulator-name = "vcc-rtc";
215}; 215};
216 216
217&cpu0 {
218 cpu-supply = <&reg_dcdc2>;
219};
220
217&r_uart { 221&r_uart {
218 pinctrl-names = "default"; 222 pinctrl-names = "default";
219 pinctrl-0 = <&r_uart_pins_a>; 223 pinctrl-0 = <&r_uart_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
new file mode 100644
index 000000000000..387fc2aa546d
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
@@ -0,0 +1,103 @@
1/*
2 * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun8i-v3s.dtsi"
45#include "sunxi-common-regulators.dtsi"
46
47/ {
48 model = "Lichee Pi Zero";
49 compatible = "licheepi,licheepi-zero", "allwinner,sun8i-v3s";
50
51 aliases {
52 serial0 = &uart0;
53 };
54
55 chosen {
56 stdout-path = "serial0:115200n8";
57 };
58
59 leds {
60 compatible = "gpio-leds";
61
62 blue_led {
63 label = "licheepi:blue:usr";
64 gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
65 };
66
67 green_led {
68 label = "licheepi:green:usr";
69 gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
70 default-state = "on";
71 };
72
73 red_led {
74 label = "licheepi:red:usr";
75 gpios = <&pio 6 2 GPIO_ACTIVE_LOW>; /* PG2 */
76 };
77 };
78};
79
80&mmc0 {
81 pinctrl-0 = <&mmc0_pins_a>;
82 pinctrl-names = "default";
83 broken-cd;
84 bus-width = <4>;
85 vmmc-supply = <&reg_vcc3v3>;
86 status = "okay";
87};
88
89&uart0 {
90 pinctrl-0 = <&uart0_pins_a>;
91 pinctrl-names = "default";
92 status = "okay";
93};
94
95&usb_otg {
96 dr_mode = "otg";
97 status = "okay";
98};
99
100&usbphy {
101 usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>;
102 status = "okay";
103};
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
new file mode 100644
index 000000000000..71075969e5e6
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -0,0 +1,309 @@
1/*
2 * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43#include <dt-bindings/interrupt-controller/arm-gic.h>
44
45/ {
46 #address-cells = <1>;
47 #size-cells = <1>;
48 interrupt-parent = <&gic>;
49
50 cpus {
51 #address-cells = <1>;
52 #size-cells = <0>;
53
54 cpu@0 {
55 compatible = "arm,cortex-a7";
56 device_type = "cpu";
57 reg = <0>;
58 clocks = <&ccu 14>;
59 };
60 };
61
62 timer {
63 compatible = "arm,armv7-timer";
64 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
65 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
66 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
67 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
68 };
69
70 clocks {
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges;
74
75 osc24M: osc24M_clk {
76 #clock-cells = <0>;
77 compatible = "fixed-clock";
78 clock-frequency = <24000000>;
79 clock-output-names = "osc24M";
80 };
81
82 osc32k: osc32k_clk {
83 #clock-cells = <0>;
84 compatible = "fixed-clock";
85 clock-frequency = <32768>;
86 clock-output-names = "osc32k";
87 };
88 };
89
90 soc {
91 compatible = "simple-bus";
92 #address-cells = <1>;
93 #size-cells = <1>;
94 ranges;
95
96 mmc0: mmc@01c0f000 {
97 compatible = "allwinner,sun7i-a20-mmc";
98 reg = <0x01c0f000 0x1000>;
99 clocks = <&ccu 22>,
100 <&ccu 45>,
101 <&ccu 47>,
102 <&ccu 46>;
103 clock-names = "ahb",
104 "mmc",
105 "output",
106 "sample";
107 resets = <&ccu 7>;
108 reset-names = "ahb";
109 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
110 status = "disabled";
111 #address-cells = <1>;
112 #size-cells = <0>;
113 };
114
115 mmc1: mmc@01c10000 {
116 compatible = "allwinner,sun7i-a20-mmc";
117 reg = <0x01c10000 0x1000>;
118 clocks = <&ccu 23>,
119 <&ccu 48>,
120 <&ccu 50>,
121 <&ccu 49>;
122 clock-names = "ahb",
123 "mmc",
124 "output",
125 "sample";
126 resets = <&ccu 8>;
127 reset-names = "ahb";
128 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
129 status = "disabled";
130 #address-cells = <1>;
131 #size-cells = <0>;
132 };
133
134 mmc2: mmc@01c11000 {
135 compatible = "allwinner,sun7i-a20-mmc";
136 reg = <0x01c11000 0x1000>;
137 clocks = <&ccu 24>,
138 <&ccu 51>,
139 <&ccu 53>,
140 <&ccu 52>;
141 clock-names = "ahb",
142 "mmc",
143 "output",
144 "sample";
145 resets = <&ccu 9>;
146 reset-names = "ahb";
147 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
148 status = "disabled";
149 #address-cells = <1>;
150 #size-cells = <0>;
151 };
152
153 usb_otg: usb@01c19000 {
154 compatible = "allwinner,sun8i-h3-musb";
155 reg = <0x01c19000 0x0400>;
156 clocks = <&ccu 29>;
157 resets = <&ccu 17>;
158 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
159 interrupt-names = "mc";
160 phys = <&usbphy 0>;
161 phy-names = "usb";
162 extcon = <&usbphy 0>;
163 status = "disabled";
164 };
165
166 usbphy: phy@01c19400 {
167 compatible = "allwinner,sun8i-v3s-usb-phy";
168 reg = <0x01c19400 0x2c>,
169 <0x01c1a800 0x4>;
170 reg-names = "phy_ctrl",
171 "pmu0";
172 clocks = <&ccu 56>;
173 clock-names = "usb0_phy";
174 resets = <&ccu 0>;
175 reset-names = "usb0_reset";
176 status = "disabled";
177 #phy-cells = <1>;
178 };
179
180 ccu: clock@01c20000 {
181 compatible = "allwinner,sun8i-v3s-ccu";
182 reg = <0x01c20000 0x400>;
183 clocks = <&osc24M>, <&osc32k>;
184 clock-names = "hosc", "losc";
185 #clock-cells = <1>;
186 #reset-cells = <1>;
187 };
188
189 rtc: rtc@01c20400 {
190 compatible = "allwinner,sun6i-a31-rtc";
191 reg = <0x01c20400 0x54>;
192 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
193 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
194 };
195
196 pio: pinctrl@01c20800 {
197 compatible = "allwinner,sun8i-v3s-pinctrl";
198 reg = <0x01c20800 0x400>;
199 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
200 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
201 clocks = <&ccu 37>, <&osc24M>, <&osc32k>;
202 clock-names = "apb", "hosc", "losc";
203 gpio-controller;
204 #gpio-cells = <3>;
205 interrupt-controller;
206 #interrupt-cells = <3>;
207
208 i2c0_pins: i2c0 {
209 pins = "PB6", "PB7";
210 function = "i2c0";
211 };
212
213 uart0_pins_a: uart0@0 {
214 pins = "PB8", "PB9";
215 function = "uart0";
216 };
217
218 mmc0_pins_a: mmc0@0 {
219 pins = "PF0", "PF1", "PF2", "PF3",
220 "PF4", "PF5";
221 function = "mmc0";
222 drive-strength = <30>;
223 bias-pull-up;
224 };
225 };
226
227 timer@01c20c00 {
228 compatible = "allwinner,sun4i-a10-timer";
229 reg = <0x01c20c00 0xa0>;
230 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
231 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
232 clocks = <&osc24M>;
233 };
234
235 wdt0: watchdog@01c20ca0 {
236 compatible = "allwinner,sun6i-a31-wdt";
237 reg = <0x01c20ca0 0x20>;
238 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
239 };
240
241 uart0: serial@01c28000 {
242 compatible = "snps,dw-apb-uart";
243 reg = <0x01c28000 0x400>;
244 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
245 reg-shift = <2>;
246 reg-io-width = <4>;
247 clocks = <&ccu 40>;
248 resets = <&ccu 49>;
249 status = "disabled";
250 };
251
252 uart1: serial@01c28400 {
253 compatible = "snps,dw-apb-uart";
254 reg = <0x01c28400 0x400>;
255 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
256 reg-shift = <2>;
257 reg-io-width = <4>;
258 clocks = <&ccu 41>;
259 resets = <&ccu 50>;
260 status = "disabled";
261 };
262
263 uart2: serial@01c28800 {
264 compatible = "snps,dw-apb-uart";
265 reg = <0x01c28800 0x400>;
266 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
267 reg-shift = <2>;
268 reg-io-width = <4>;
269 clocks = <&ccu 42>;
270 resets = <&ccu 51>;
271 status = "disabled";
272 };
273
274 i2c0: i2c@01c2ac00 {
275 compatible = "allwinner,sun6i-a31-i2c";
276 reg = <0x01c2ac00 0x400>;
277 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
278 clocks = <&ccu 38>;
279 resets = <&ccu 46>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&i2c0_pins>;
282 status = "disabled";
283 #address-cells = <1>;
284 #size-cells = <0>;
285 };
286
287 i2c1: i2c@01c2b000 {
288 compatible = "allwinner,sun6i-a31-i2c";
289 reg = <0x01c2b000 0x400>;
290 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
291 clocks = <&ccu 39>;
292 resets = <&ccu 47>;
293 status = "disabled";
294 #address-cells = <1>;
295 #size-cells = <0>;
296 };
297
298 gic: interrupt-controller@01c81000 {
299 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
300 reg = <0x01c81000 0x1000>,
301 <0x01c82000 0x1000>,
302 <0x01c84000 0x2000>,
303 <0x01c86000 0x2000>;
304 interrupt-controller;
305 #interrupt-cells = <3>;
306 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
307 };
308 };
309};
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index ac695fb57a43..03f2ab47ece0 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -696,6 +696,7 @@
696 "PF4", "PF5"; 696 "PF4", "PF5";
697 function = "mmc0"; 697 function = "mmc0";
698 drive-strength = <30>; 698 drive-strength = <30>;
699 bias-pull-up;
699 }; 700 };
700 701
701 mmc1_pins: mmc1 { 702 mmc1_pins: mmc1 {
@@ -703,6 +704,7 @@
703 "PG4", "PG5"; 704 "PG4", "PG5";
704 function = "mmc1"; 705 function = "mmc1";
705 drive-strength = <30>; 706 drive-strength = <30>;
707 bias-pull-up;
706 }; 708 };
707 709
708 mmc2_8bit_pins: mmc2_8bit { 710 mmc2_8bit_pins: mmc2_8bit {
@@ -712,6 +714,7 @@
712 "PC16"; 714 "PC16";
713 function = "mmc2"; 715 function = "mmc2";
714 drive-strength = <30>; 716 drive-strength = <30>;
717 bias-pull-up;
715 }; 718 };
716 719
717 uart0_pins_a: uart0@0 { 720 uart0_pins_a: uart0@0 {
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-26 10:46:45 -0400