diff options
-rw-r--r-- | drivers/crypto/ccree/cc_debugfs.c | 7 | ||||
-rw-r--r-- | drivers/crypto/ccree/cc_driver.c | 8 | ||||
-rw-r--r-- | drivers/crypto/ccree/cc_driver.h | 2 | ||||
-rw-r--r-- | drivers/crypto/ccree/cc_host_regs.h | 6 |
4 files changed, 17 insertions, 6 deletions
diff --git a/drivers/crypto/ccree/cc_debugfs.c b/drivers/crypto/ccree/cc_debugfs.c index 08f8db489cf0..5ca184e42483 100644 --- a/drivers/crypto/ccree/cc_debugfs.c +++ b/drivers/crypto/ccree/cc_debugfs.c | |||
@@ -26,7 +26,8 @@ struct cc_debugfs_ctx { | |||
26 | static struct dentry *cc_debugfs_dir; | 26 | static struct dentry *cc_debugfs_dir; |
27 | 27 | ||
28 | static struct debugfs_reg32 debug_regs[] = { | 28 | static struct debugfs_reg32 debug_regs[] = { |
29 | CC_DEBUG_REG(HOST_SIGNATURE), | 29 | { .name = "SIGNATURE" }, /* Must be 0th */ |
30 | { .name = "VERSION" }, /* Must be 1st */ | ||
30 | CC_DEBUG_REG(HOST_IRR), | 31 | CC_DEBUG_REG(HOST_IRR), |
31 | CC_DEBUG_REG(HOST_POWER_DOWN_EN), | 32 | CC_DEBUG_REG(HOST_POWER_DOWN_EN), |
32 | CC_DEBUG_REG(AXIM_MON_ERR), | 33 | CC_DEBUG_REG(AXIM_MON_ERR), |
@@ -34,7 +35,6 @@ static struct debugfs_reg32 debug_regs[] = { | |||
34 | CC_DEBUG_REG(HOST_IMR), | 35 | CC_DEBUG_REG(HOST_IMR), |
35 | CC_DEBUG_REG(AXIM_CFG), | 36 | CC_DEBUG_REG(AXIM_CFG), |
36 | CC_DEBUG_REG(AXIM_CACHE_PARAMS), | 37 | CC_DEBUG_REG(AXIM_CACHE_PARAMS), |
37 | CC_DEBUG_REG(HOST_VERSION), | ||
38 | CC_DEBUG_REG(GPR_HOST), | 38 | CC_DEBUG_REG(GPR_HOST), |
39 | CC_DEBUG_REG(AXIM_MON_COMP), | 39 | CC_DEBUG_REG(AXIM_MON_COMP), |
40 | }; | 40 | }; |
@@ -58,6 +58,9 @@ int cc_debugfs_init(struct cc_drvdata *drvdata) | |||
58 | struct debugfs_regset32 *regset; | 58 | struct debugfs_regset32 *regset; |
59 | struct dentry *file; | 59 | struct dentry *file; |
60 | 60 | ||
61 | debug_regs[0].offset = drvdata->sig_offset; | ||
62 | debug_regs[1].offset = drvdata->ver_offset; | ||
63 | |||
61 | ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); | 64 | ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); |
62 | if (!ctx) | 65 | if (!ctx) |
63 | return -ENOMEM; | 66 | return -ENOMEM; |
diff --git a/drivers/crypto/ccree/cc_driver.c b/drivers/crypto/ccree/cc_driver.c index 37f2e6ec0e88..444fc5542598 100644 --- a/drivers/crypto/ccree/cc_driver.c +++ b/drivers/crypto/ccree/cc_driver.c | |||
@@ -207,9 +207,13 @@ static int init_cc_resources(struct platform_device *plat_dev) | |||
207 | if (hw_rev->rev >= CC_HW_REV_712) { | 207 | if (hw_rev->rev >= CC_HW_REV_712) { |
208 | new_drvdata->hash_len_sz = HASH_LEN_SIZE_712; | 208 | new_drvdata->hash_len_sz = HASH_LEN_SIZE_712; |
209 | new_drvdata->axim_mon_offset = CC_REG(AXIM_MON_COMP); | 209 | new_drvdata->axim_mon_offset = CC_REG(AXIM_MON_COMP); |
210 | new_drvdata->sig_offset = CC_REG(HOST_SIGNATURE_712); | ||
211 | new_drvdata->ver_offset = CC_REG(HOST_VERSION_712); | ||
210 | } else { | 212 | } else { |
211 | new_drvdata->hash_len_sz = HASH_LEN_SIZE_630; | 213 | new_drvdata->hash_len_sz = HASH_LEN_SIZE_630; |
212 | new_drvdata->axim_mon_offset = CC_REG(AXIM_MON_COMP8); | 214 | new_drvdata->axim_mon_offset = CC_REG(AXIM_MON_COMP8); |
215 | new_drvdata->sig_offset = CC_REG(HOST_SIGNATURE_630); | ||
216 | new_drvdata->ver_offset = CC_REG(HOST_VERSION_630); | ||
213 | } | 217 | } |
214 | 218 | ||
215 | platform_set_drvdata(plat_dev, new_drvdata); | 219 | platform_set_drvdata(plat_dev, new_drvdata); |
@@ -276,7 +280,7 @@ static int init_cc_resources(struct platform_device *plat_dev) | |||
276 | } | 280 | } |
277 | 281 | ||
278 | /* Verify correct mapping */ | 282 | /* Verify correct mapping */ |
279 | signature_val = cc_ioread(new_drvdata, CC_REG(HOST_SIGNATURE)); | 283 | signature_val = cc_ioread(new_drvdata, new_drvdata->sig_offset); |
280 | if (signature_val != hw_rev->sig) { | 284 | if (signature_val != hw_rev->sig) { |
281 | dev_err(dev, "Invalid CC signature: SIGNATURE=0x%08X != expected=0x%08X\n", | 285 | dev_err(dev, "Invalid CC signature: SIGNATURE=0x%08X != expected=0x%08X\n", |
282 | signature_val, hw_rev->sig); | 286 | signature_val, hw_rev->sig); |
@@ -287,7 +291,7 @@ static int init_cc_resources(struct platform_device *plat_dev) | |||
287 | 291 | ||
288 | /* Display HW versions */ | 292 | /* Display HW versions */ |
289 | dev_info(dev, "ARM CryptoCell %s Driver: HW version 0x%08X, Driver version %s\n", | 293 | dev_info(dev, "ARM CryptoCell %s Driver: HW version 0x%08X, Driver version %s\n", |
290 | hw_rev->name, cc_ioread(new_drvdata, CC_REG(HOST_VERSION)), | 294 | hw_rev->name, cc_ioread(new_drvdata, new_drvdata->ver_offset), |
291 | DRV_MODULE_VERSION); | 295 | DRV_MODULE_VERSION); |
292 | 296 | ||
293 | rc = init_cc_regs(new_drvdata, true); | 297 | rc = init_cc_regs(new_drvdata, true); |
diff --git a/drivers/crypto/ccree/cc_driver.h b/drivers/crypto/ccree/cc_driver.h index 2048fdeb9579..95f82b2d1e70 100644 --- a/drivers/crypto/ccree/cc_driver.h +++ b/drivers/crypto/ccree/cc_driver.h | |||
@@ -129,6 +129,8 @@ struct cc_drvdata { | |||
129 | enum cc_hw_rev hw_rev; | 129 | enum cc_hw_rev hw_rev; |
130 | u32 hash_len_sz; | 130 | u32 hash_len_sz; |
131 | u32 axim_mon_offset; | 131 | u32 axim_mon_offset; |
132 | u32 sig_offset; | ||
133 | u32 ver_offset; | ||
132 | }; | 134 | }; |
133 | 135 | ||
134 | struct cc_crypto_alg { | 136 | struct cc_crypto_alg { |
diff --git a/drivers/crypto/ccree/cc_host_regs.h b/drivers/crypto/ccree/cc_host_regs.h index f51001898ca1..616b2e1c41ba 100644 --- a/drivers/crypto/ccree/cc_host_regs.h +++ b/drivers/crypto/ccree/cc_host_regs.h | |||
@@ -45,7 +45,8 @@ | |||
45 | #define CC_HOST_ICR_DSCRPTR_WATERMARK_QUEUE0_CLEAR_BIT_SIZE 0x1UL | 45 | #define CC_HOST_ICR_DSCRPTR_WATERMARK_QUEUE0_CLEAR_BIT_SIZE 0x1UL |
46 | #define CC_HOST_ICR_AXIM_COMP_INT_CLEAR_BIT_SHIFT 0x17UL | 46 | #define CC_HOST_ICR_AXIM_COMP_INT_CLEAR_BIT_SHIFT 0x17UL |
47 | #define CC_HOST_ICR_AXIM_COMP_INT_CLEAR_BIT_SIZE 0x1UL | 47 | #define CC_HOST_ICR_AXIM_COMP_INT_CLEAR_BIT_SIZE 0x1UL |
48 | #define CC_HOST_SIGNATURE_REG_OFFSET 0xA24UL | 48 | #define CC_HOST_SIGNATURE_712_REG_OFFSET 0xA24UL |
49 | #define CC_HOST_SIGNATURE_630_REG_OFFSET 0xAC8UL | ||
49 | #define CC_HOST_SIGNATURE_VALUE_BIT_SHIFT 0x0UL | 50 | #define CC_HOST_SIGNATURE_VALUE_BIT_SHIFT 0x0UL |
50 | #define CC_HOST_SIGNATURE_VALUE_BIT_SIZE 0x20UL | 51 | #define CC_HOST_SIGNATURE_VALUE_BIT_SIZE 0x20UL |
51 | #define CC_HOST_BOOT_REG_OFFSET 0xA28UL | 52 | #define CC_HOST_BOOT_REG_OFFSET 0xA28UL |
@@ -105,7 +106,8 @@ | |||
105 | #define CC_HOST_BOOT_ONLY_ENCRYPT_LOCAL_BIT_SIZE 0x1UL | 106 | #define CC_HOST_BOOT_ONLY_ENCRYPT_LOCAL_BIT_SIZE 0x1UL |
106 | #define CC_HOST_BOOT_AES_EXISTS_LOCAL_BIT_SHIFT 0x1EUL | 107 | #define CC_HOST_BOOT_AES_EXISTS_LOCAL_BIT_SHIFT 0x1EUL |
107 | #define CC_HOST_BOOT_AES_EXISTS_LOCAL_BIT_SIZE 0x1UL | 108 | #define CC_HOST_BOOT_AES_EXISTS_LOCAL_BIT_SIZE 0x1UL |
108 | #define CC_HOST_VERSION_REG_OFFSET 0xA40UL | 109 | #define CC_HOST_VERSION_712_REG_OFFSET 0xA40UL |
110 | #define CC_HOST_VERSION_630_REG_OFFSET 0xAD8UL | ||
109 | #define CC_HOST_VERSION_VALUE_BIT_SHIFT 0x0UL | 111 | #define CC_HOST_VERSION_VALUE_BIT_SHIFT 0x0UL |
110 | #define CC_HOST_VERSION_VALUE_BIT_SIZE 0x20UL | 112 | #define CC_HOST_VERSION_VALUE_BIT_SIZE 0x20UL |
111 | #define CC_HOST_KFDE0_VALID_REG_OFFSET 0xA60UL | 113 | #define CC_HOST_KFDE0_VALID_REG_OFFSET 0xA60UL |