2 files changed, 21 insertions, 20 deletions

diff --git a/arch/arm/boot/dts/am57xx-idk-common.dtsi b/arch/arm/boot/dts/am57xx-idk-common.dtsi
index f7bd26458915..42e433da79ec 100644
--- a/arch/arm/boot/dts/am57xx-idk-common.dtsi
+++ b/arch/arm/boot/dts/am57xx-idk-common.dtsi
@@ -420,6 +420,7 @@
         vqmmc-supply = <&ldo1_reg>;
         bus-width = <4>;
         cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
+        no-1-8-v;
 };
 
 &mmc2 {
diff --git a/arch/arm/boot/dts/dra76x-mmc-iodelay.dtsi b/arch/arm/boot/dts/dra76x-mmc-iodelay.dtsi
index baba7b00eca7..fdca48186916 100644
--- a/arch/arm/boot/dts/dra76x-mmc-iodelay.dtsi
+++ b/arch/arm/boot/dts/dra76x-mmc-iodelay.dtsi
@@ -22,7 +22,7 @@
  *
  * Datamanual Revisions:
  *
- * DRA76x Silicon Revision 1.0: SPRS993A, Revised July 2017
+ * DRA76x Silicon Revision 1.0: SPRS993E, Revised December 2018
  *
  */
 
@@ -169,25 +169,25 @@
         /* Corresponds to MMC2_HS200_MANUAL1 in datamanual */
         mmc2_iodelay_hs200_conf: mmc2_iodelay_hs200_conf {
                 pinctrl-pin-array = <
-                        0x190 A_DELAY_PS(384) G_DELAY_PS(0)       /* CFG_GPMC_A19_OEN */
-                        0x194 A_DELAY_PS(0) G_DELAY_PS(174)       /* CFG_GPMC_A19_OUT */
-                        0x1a8 A_DELAY_PS(410) G_DELAY_PS(0)       /* CFG_GPMC_A20_OEN */
-                        0x1ac A_DELAY_PS(85) G_DELAY_PS(0)        /* CFG_GPMC_A20_OUT */
-                        0x1b4 A_DELAY_PS(468) G_DELAY_PS(0)       /* CFG_GPMC_A21_OEN */
-                        0x1b8 A_DELAY_PS(139) G_DELAY_PS(0)       /* CFG_GPMC_A21_OUT */
-                        0x1c0 A_DELAY_PS(676) G_DELAY_PS(0)       /* CFG_GPMC_A22_OEN */
-                        0x1c4 A_DELAY_PS(69) G_DELAY_PS(0)        /* CFG_GPMC_A22_OUT */
-                        0x1d0 A_DELAY_PS(1062) G_DELAY_PS(154)    /* CFG_GPMC_A23_OUT */
-                        0x1d8 A_DELAY_PS(640) G_DELAY_PS(0)       /* CFG_GPMC_A24_OEN */
-                        0x1dc A_DELAY_PS(0) G_DELAY_PS(0)         /* CFG_GPMC_A24_OUT */
-                        0x1e4 A_DELAY_PS(356) G_DELAY_PS(0)       /* CFG_GPMC_A25_OEN */
-                        0x1e8 A_DELAY_PS(0) G_DELAY_PS(0)         /* CFG_GPMC_A25_OUT */
-                        0x1f0 A_DELAY_PS(579) G_DELAY_PS(0)       /* CFG_GPMC_A26_OEN */
-                        0x1f4 A_DELAY_PS(0) G_DELAY_PS(0)         /* CFG_GPMC_A26_OUT */
-                        0x1fc A_DELAY_PS(435) G_DELAY_PS(0)       /* CFG_GPMC_A27_OEN */
-                        0x200 A_DELAY_PS(36) G_DELAY_PS(0)        /* CFG_GPMC_A27_OUT */
-                        0x364 A_DELAY_PS(759) G_DELAY_PS(0)       /* CFG_GPMC_CS1_OEN */
-                        0x368 A_DELAY_PS(72) G_DELAY_PS(0)        /* CFG_GPMC_CS1_OUT */
+                        0x190 A_DELAY_PS(384) G_DELAY_PS(0)     /* CFG_GPMC_A19_OEN */
+                        0x194 A_DELAY_PS(350) G_DELAY_PS(174)   /* CFG_GPMC_A19_OUT */
+                        0x1a8 A_DELAY_PS(410) G_DELAY_PS(0)     /* CFG_GPMC_A20_OEN */
+                        0x1ac A_DELAY_PS(335) G_DELAY_PS(0)     /* CFG_GPMC_A20_OUT */
+                        0x1b4 A_DELAY_PS(468) G_DELAY_PS(0)     /* CFG_GPMC_A21_OEN */
+                        0x1b8 A_DELAY_PS(339) G_DELAY_PS(0)     /* CFG_GPMC_A21_OUT */
+                        0x1c0 A_DELAY_PS(676) G_DELAY_PS(0)     /* CFG_GPMC_A22_OEN */
+                        0x1c4 A_DELAY_PS(219) G_DELAY_PS(0)     /* CFG_GPMC_A22_OUT */
+                        0x1d0 A_DELAY_PS(1062) G_DELAY_PS(154)  /* CFG_GPMC_A23_OUT */
+                        0x1d8 A_DELAY_PS(640) G_DELAY_PS(0)     /* CFG_GPMC_A24_OEN */
+                        0x1dc A_DELAY_PS(150) G_DELAY_PS(0)     /* CFG_GPMC_A24_OUT */
+                        0x1e4 A_DELAY_PS(356) G_DELAY_PS(0)     /* CFG_GPMC_A25_OEN */
+                        0x1e8 A_DELAY_PS(150) G_DELAY_PS(0)     /* CFG_GPMC_A25_OUT */
+                        0x1f0 A_DELAY_PS(579) G_DELAY_PS(0)     /* CFG_GPMC_A26_OEN */
+                        0x1f4 A_DELAY_PS(200) G_DELAY_PS(0)     /* CFG_GPMC_A26_OUT */
+                        0x1fc A_DELAY_PS(435) G_DELAY_PS(0)     /* CFG_GPMC_A27_OEN */
+                        0x200 A_DELAY_PS(236) G_DELAY_PS(0)     /* CFG_GPMC_A27_OUT */
+                        0x364 A_DELAY_PS(759) G_DELAY_PS(0)     /* CFG_GPMC_CS1_OEN */
+                        0x368 A_DELAY_PS(372) G_DELAY_PS(0)     /* CFG_GPMC_CS1_OUT */
               >;
         };