aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt5
-rw-r--r--Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt2
-rw-r--r--MAINTAINERS2
-rw-r--r--arch/arm/boot/dts/omap3-overo-base.dtsi11
-rw-r--r--drivers/mmc/core/Kconfig18
-rw-r--r--drivers/mmc/core/block.c269
-rw-r--r--drivers/mmc/core/core.c214
-rw-r--r--drivers/mmc/core/host.c74
-rw-r--r--drivers/mmc/core/mmc.c18
-rw-r--r--drivers/mmc/core/mmc_ops.c260
-rw-r--r--drivers/mmc/core/mmc_ops.h5
-rw-r--r--drivers/mmc/core/mmc_test.c2
-rw-r--r--drivers/mmc/core/pwrseq.c8
-rw-r--r--drivers/mmc/core/pwrseq.h3
-rw-r--r--drivers/mmc/core/pwrseq_emmc.c2
-rw-r--r--drivers/mmc/core/queue.c242
-rw-r--r--drivers/mmc/core/queue.h47
-rw-r--r--drivers/mmc/core/sd.c22
-rw-r--r--drivers/mmc/core/sdio.c24
-rw-r--r--drivers/mmc/core/sdio_irq.c22
-rw-r--r--drivers/mmc/core/sdio_ops.h2
-rw-r--r--drivers/mmc/core/slot-gpio.c2
-rw-r--r--drivers/mmc/host/Kconfig12
-rw-r--r--drivers/mmc/host/Makefile4
-rw-r--r--drivers/mmc/host/atmel-mci.c28
-rw-r--r--drivers/mmc/host/bcm2835.c12
-rw-r--r--drivers/mmc/host/cavium.c4
-rw-r--r--drivers/mmc/host/dw_mmc-exynos.c4
-rw-r--r--drivers/mmc/host/dw_mmc-rockchip.c48
-rw-r--r--drivers/mmc/host/dw_mmc.c225
-rw-r--r--drivers/mmc/host/dw_mmc.h7
-rw-r--r--drivers/mmc/host/mtk-sd.c2
-rw-r--r--drivers/mmc/host/omap_hsmmc.c55
-rw-r--r--drivers/mmc/host/pxamci.c6
-rw-r--r--drivers/mmc/host/renesas_sdhi.h39
-rw-r--r--drivers/mmc/host/renesas_sdhi_core.c (renamed from drivers/mmc/host/sh_mobile_sdhi.c)273
-rw-r--r--drivers/mmc/host/renesas_sdhi_sys_dmac.c (renamed from drivers/mmc/host/tmio_mmc_dma.c)186
-rw-r--r--drivers/mmc/host/sdhci-acpi.c4
-rw-r--r--drivers/mmc/host/sdhci-brcmstb.c3
-rw-r--r--drivers/mmc/host/sdhci-esdhc-imx.c192
-rw-r--r--drivers/mmc/host/sdhci-esdhc.h1
-rw-r--r--drivers/mmc/host/sdhci-of-arasan.c2
-rw-r--r--drivers/mmc/host/sdhci-pci-core.c668
-rw-r--r--drivers/mmc/host/sdhci-pci.h46
-rw-r--r--drivers/mmc/host/sdricoh_cs.c3
-rw-r--r--drivers/mmc/host/tmio_mmc.c20
-rw-r--r--drivers/mmc/host/tmio_mmc.h75
-rw-r--r--drivers/mmc/host/tmio_mmc_core.c (renamed from drivers/mmc/host/tmio_mmc_pio.c)282
-rw-r--r--drivers/mmc/host/vub300.c3
-rw-r--r--include/linux/mfd/tmio.h35
-rw-r--r--include/linux/mmc/card.h2
-rw-r--r--include/linux/mmc/host.h7
52 files changed, 1565 insertions, 1937 deletions
diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
index 520d61dad6dd..49ed3ad2524a 100644
--- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
@@ -15,6 +15,7 @@ Required Properties:
15 - "rockchip,rk3288-dw-mshc": for Rockchip RK3288 15 - "rockchip,rk3288-dw-mshc": for Rockchip RK3288
16 - "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108 16 - "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108
17 - "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036 17 - "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036
18 - "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3328
18 - "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368 19 - "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368
19 - "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399 20 - "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399
20 21
@@ -31,6 +32,10 @@ Optional Properties:
31 probing, low speeds or in case where all phases work at tuning time. 32 probing, low speeds or in case where all phases work at tuning time.
32 If not specified 0 deg will be used. 33 If not specified 0 deg will be used.
33 34
35* rockchip,desired-num-phases: The desired number of times that the host
36 execute tuning when needed. If not specified, the host will do tuning
37 for 360 times, namely tuning for each degree.
38
34Example: 39Example:
35 40
36 rkdwmmc0@12200000 { 41 rkdwmmc0@12200000 {
diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
index 74166a0d460d..0e026c151c1c 100644
--- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
+++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
@@ -18,7 +18,7 @@ Required properties:
18Optional properties: 18Optional properties:
19ti,dual-volt: boolean, supports dual voltage cards 19ti,dual-volt: boolean, supports dual voltage cards
20<supply-name>-supply: phandle to the regulator device tree node 20<supply-name>-supply: phandle to the regulator device tree node
21"supply-name" examples are "vmmc", "vmmc_aux" etc 21"supply-name" examples are "vmmc", "vmmc_aux"(deprecated)/"vqmmc" etc
22ti,non-removable: non-removable slot (like eMMC) 22ti,non-removable: non-removable slot (like eMMC)
23ti,needs-special-reset: Requires a special softreset sequence 23ti,needs-special-reset: Requires a special softreset sequence
24ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed 24ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
diff --git a/MAINTAINERS b/MAINTAINERS
index 867366bb67f1..9a55295e5efc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12915,7 +12915,7 @@ M: Wolfram Sang <wsa+renesas@sang-engineering.com>
12915L: linux-mmc@vger.kernel.org 12915L: linux-mmc@vger.kernel.org
12916S: Supported 12916S: Supported
12917F: drivers/mmc/host/tmio_mmc* 12917F: drivers/mmc/host/tmio_mmc*
12918F: drivers/mmc/host/sh_mobile_sdhi.c 12918F: drivers/mmc/host/renesas_sdhi*
12919F: include/linux/mfd/tmio.h 12919F: include/linux/mfd/tmio.h
12920 12920
12921TMP401 HARDWARE MONITOR DRIVER 12921TMP401 HARDWARE MONITOR DRIVER
diff --git a/arch/arm/boot/dts/omap3-overo-base.dtsi b/arch/arm/boot/dts/omap3-overo-base.dtsi
index 401fae838fe9..cd220342a805 100644
--- a/arch/arm/boot/dts/omap3-overo-base.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-base.dtsi
@@ -74,16 +74,6 @@
74 gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* gpio_16: WiFi nReset */ 74 gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* gpio_16: WiFi nReset */
75 startup-delay-us = <10000>; 75 startup-delay-us = <10000>;
76 }; 76 };
77
78 /* Regulator to trigger the nReset signal of the Bluetooth module */
79 w3cbw003c_bt_nreset: regulator-w3cbw003c-bt-nreset {
80 compatible = "regulator-fixed";
81 regulator-name = "regulator-w3cbw003c-bt-nreset";
82 regulator-min-microvolt = <3300000>;
83 regulator-max-microvolt = <3300000>;
84 gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio_164: BT nReset */
85 startup-delay-us = <10000>;
86 };
87}; 77};
88 78
89&omap3_pmx_core { 79&omap3_pmx_core {
@@ -191,7 +181,6 @@
191 pinctrl-names = "default"; 181 pinctrl-names = "default";
192 pinctrl-0 = <&mmc2_pins>; 182 pinctrl-0 = <&mmc2_pins>;
193 vmmc-supply = <&w3cbw003c_npoweron>; 183 vmmc-supply = <&w3cbw003c_npoweron>;
194 vqmmc-supply = <&w3cbw003c_bt_nreset>;
195 vmmc_aux-supply = <&w3cbw003c_wifi_nreset>; 184 vmmc_aux-supply = <&w3cbw003c_wifi_nreset>;
196 bus-width = <4>; 185 bus-width = <4>;
197 cap-sdio-irq; 186 cap-sdio-irq;
diff --git a/drivers/mmc/core/Kconfig b/drivers/mmc/core/Kconfig
index fc1ecdaaa9ca..42e89060cd41 100644
--- a/drivers/mmc/core/Kconfig
+++ b/drivers/mmc/core/Kconfig
@@ -61,24 +61,6 @@ config MMC_BLOCK_MINORS
61 61
62 If unsure, say 8 here. 62 If unsure, say 8 here.
63 63
64config MMC_BLOCK_BOUNCE
65 bool "Use bounce buffer for simple hosts"
66 depends on MMC_BLOCK
67 default y
68 help
69 SD/MMC is a high latency protocol where it is crucial to
70 send large requests in order to get high performance. Many
71 controllers, however, are restricted to continuous memory
72 (i.e. they can't do scatter-gather), something the kernel
73 rarely can provide.
74
75 Say Y here to help these restricted hosts by bouncing
76 requests back and forth from a large buffer. You will get
77 a big performance gain at the cost of up to 64 KiB of
78 physical memory.
79
80 If unsure, say Y here.
81
82config SDIO_UART 64config SDIO_UART
83 tristate "SDIO UART/GPS class support" 65 tristate "SDIO UART/GPS class support"
84 depends on TTY 66 depends on TTY
diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c
index 6ff94a948a4b..0cfac2d39107 100644
--- a/drivers/mmc/core/block.c
+++ b/drivers/mmc/core/block.c
@@ -127,14 +127,6 @@ MODULE_PARM_DESC(perdev_minors, "Minors numbers to allocate per device");
127 127
128static inline int mmc_blk_part_switch(struct mmc_card *card, 128static inline int mmc_blk_part_switch(struct mmc_card *card,
129 struct mmc_blk_data *md); 129 struct mmc_blk_data *md);
130static int get_card_status(struct mmc_card *card, u32 *status, int retries);
131
132static void mmc_blk_requeue(struct request_queue *q, struct request *req)
133{
134 spin_lock_irq(q->queue_lock);
135 blk_requeue_request(q, req);
136 spin_unlock_irq(q->queue_lock);
137}
138 130
139static struct mmc_blk_data *mmc_blk_get(struct gendisk *disk) 131static struct mmc_blk_data *mmc_blk_get(struct gendisk *disk)
140{ 132{
@@ -197,6 +189,8 @@ static ssize_t power_ro_lock_store(struct device *dev,
197 int ret; 189 int ret;
198 struct mmc_blk_data *md, *part_md; 190 struct mmc_blk_data *md, *part_md;
199 struct mmc_card *card; 191 struct mmc_card *card;
192 struct mmc_queue *mq;
193 struct request *req;
200 unsigned long set; 194 unsigned long set;
201 195
202 if (kstrtoul(buf, 0, &set)) 196 if (kstrtoul(buf, 0, &set))
@@ -206,20 +200,14 @@ static ssize_t power_ro_lock_store(struct device *dev,
206 return count; 200 return count;
207 201
208 md = mmc_blk_get(dev_to_disk(dev)); 202 md = mmc_blk_get(dev_to_disk(dev));
203 mq = &md->queue;
209 card = md->queue.card; 204 card = md->queue.card;
210 205
211 mmc_get_card(card); 206 /* Dispatch locking to the block layer */
212 207 req = blk_get_request(mq->queue, REQ_OP_DRV_OUT, __GFP_RECLAIM);
213 ret = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_WP, 208 req_to_mmc_queue_req(req)->drv_op = MMC_DRV_OP_BOOT_WP;
214 card->ext_csd.boot_ro_lock | 209 blk_execute_rq(mq->queue, NULL, req, 0);
215 EXT_CSD_BOOT_WP_B_PWR_WP_EN, 210 ret = req_to_mmc_queue_req(req)->drv_op_result;
216 card->ext_csd.part_time);
217 if (ret)
218 pr_err("%s: Locking boot partition ro until next power on failed: %d\n", md->disk->disk_name, ret);
219 else
220 card->ext_csd.boot_ro_lock |= EXT_CSD_BOOT_WP_B_PWR_WP_EN;
221
222 mmc_put_card(card);
223 211
224 if (!ret) { 212 if (!ret) {
225 pr_info("%s: Locking boot partition ro until next power on\n", 213 pr_info("%s: Locking boot partition ro until next power on\n",
@@ -392,7 +380,7 @@ static int ioctl_rpmb_card_status_poll(struct mmc_card *card, u32 *status,
392 return -EINVAL; 380 return -EINVAL;
393 381
394 do { 382 do {
395 err = get_card_status(card, status, 5); 383 err = __mmc_send_status(card, status, 5);
396 if (err) 384 if (err)
397 break; 385 break;
398 386
@@ -450,7 +438,7 @@ static int __mmc_blk_ioctl_cmd(struct mmc_card *card, struct mmc_blk_data *md,
450 struct mmc_request mrq = {}; 438 struct mmc_request mrq = {};
451 struct scatterlist sg; 439 struct scatterlist sg;
452 int err; 440 int err;
453 int is_rpmb = false; 441 bool is_rpmb = false;
454 u32 status = 0; 442 u32 status = 0;
455 443
456 if (!card || !md || !idata) 444 if (!card || !md || !idata)
@@ -570,9 +558,12 @@ static int mmc_blk_ioctl_cmd(struct block_device *bdev,
570 struct mmc_ioc_cmd __user *ic_ptr) 558 struct mmc_ioc_cmd __user *ic_ptr)
571{ 559{
572 struct mmc_blk_ioc_data *idata; 560 struct mmc_blk_ioc_data *idata;
561 struct mmc_blk_ioc_data *idatas[1];
573 struct mmc_blk_data *md; 562 struct mmc_blk_data *md;
563 struct mmc_queue *mq;
574 struct mmc_card *card; 564 struct mmc_card *card;
575 int err = 0, ioc_err = 0; 565 int err = 0, ioc_err = 0;
566 struct request *req;
576 567
577 /* 568 /*
578 * The caller must have CAP_SYS_RAWIO, and must be calling this on the 569 * The caller must have CAP_SYS_RAWIO, and must be calling this on the
@@ -598,17 +589,21 @@ static int mmc_blk_ioctl_cmd(struct block_device *bdev,
598 goto cmd_done; 589 goto cmd_done;
599 } 590 }
600 591
601 mmc_get_card(card); 592 /*
602 593 * Dispatch the ioctl() into the block request queue.
603 ioc_err = __mmc_blk_ioctl_cmd(card, md, idata); 594 */
604 595 mq = &md->queue;
605 /* Always switch back to main area after RPMB access */ 596 req = blk_get_request(mq->queue,
606 if (md->area_type & MMC_BLK_DATA_AREA_RPMB) 597 idata->ic.write_flag ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN,
607 mmc_blk_part_switch(card, dev_get_drvdata(&card->dev)); 598 __GFP_RECLAIM);
608 599 idatas[0] = idata;
609 mmc_put_card(card); 600 req_to_mmc_queue_req(req)->drv_op = MMC_DRV_OP_IOCTL;
610 601 req_to_mmc_queue_req(req)->idata = idatas;
602 req_to_mmc_queue_req(req)->ioc_count = 1;
603 blk_execute_rq(mq->queue, NULL, req, 0);
604 ioc_err = req_to_mmc_queue_req(req)->drv_op_result;
611 err = mmc_blk_ioctl_copy_to_user(ic_ptr, idata); 605 err = mmc_blk_ioctl_copy_to_user(ic_ptr, idata);
606 blk_put_request(req);
612 607
613cmd_done: 608cmd_done:
614 mmc_blk_put(md); 609 mmc_blk_put(md);
@@ -625,8 +620,10 @@ static int mmc_blk_ioctl_multi_cmd(struct block_device *bdev,
625 struct mmc_ioc_cmd __user *cmds = user->cmds; 620 struct mmc_ioc_cmd __user *cmds = user->cmds;
626 struct mmc_card *card; 621 struct mmc_card *card;
627 struct mmc_blk_data *md; 622 struct mmc_blk_data *md;
623 struct mmc_queue *mq;
628 int i, err = 0, ioc_err = 0; 624 int i, err = 0, ioc_err = 0;
629 __u64 num_of_cmds; 625 __u64 num_of_cmds;
626 struct request *req;
630 627
631 /* 628 /*
632 * The caller must have CAP_SYS_RAWIO, and must be calling this on the 629 * The caller must have CAP_SYS_RAWIO, and must be calling this on the
@@ -668,21 +665,26 @@ static int mmc_blk_ioctl_multi_cmd(struct block_device *bdev,
668 goto cmd_done; 665 goto cmd_done;
669 } 666 }
670 667
671 mmc_get_card(card);
672 668
673 for (i = 0; i < num_of_cmds && !ioc_err; i++) 669 /*
674 ioc_err = __mmc_blk_ioctl_cmd(card, md, idata[i]); 670 * Dispatch the ioctl()s into the block request queue.
675 671 */
676 /* Always switch back to main area after RPMB access */ 672 mq = &md->queue;
677 if (md->area_type & MMC_BLK_DATA_AREA_RPMB) 673 req = blk_get_request(mq->queue,
678 mmc_blk_part_switch(card, dev_get_drvdata(&card->dev)); 674 idata[0]->ic.write_flag ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN,
679 675 __GFP_RECLAIM);
680 mmc_put_card(card); 676 req_to_mmc_queue_req(req)->drv_op = MMC_DRV_OP_IOCTL;
677 req_to_mmc_queue_req(req)->idata = idata;
678 req_to_mmc_queue_req(req)->ioc_count = num_of_cmds;
679 blk_execute_rq(mq->queue, NULL, req, 0);
680 ioc_err = req_to_mmc_queue_req(req)->drv_op_result;
681 681
682 /* copy to user if data and response */ 682 /* copy to user if data and response */
683 for (i = 0; i < num_of_cmds && !err; i++) 683 for (i = 0; i < num_of_cmds && !err; i++)
684 err = mmc_blk_ioctl_copy_to_user(&cmds[i], idata[i]); 684 err = mmc_blk_ioctl_copy_to_user(&cmds[i], idata[i]);
685 685
686 blk_put_request(req);
687
686cmd_done: 688cmd_done:
687 mmc_blk_put(md); 689 mmc_blk_put(md);
688cmd_err: 690cmd_err:
@@ -852,21 +854,6 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks)
852 return 0; 854 return 0;
853} 855}
854 856
855static int get_card_status(struct mmc_card *card, u32 *status, int retries)
856{
857 struct mmc_command cmd = {};
858 int err;
859
860 cmd.opcode = MMC_SEND_STATUS;
861 if (!mmc_host_is_spi(card->host))
862 cmd.arg = card->rca << 16;
863 cmd.flags = MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC;
864 err = mmc_wait_for_cmd(card->host, &cmd, retries);
865 if (err == 0)
866 *status = cmd.resp[0];
867 return err;
868}
869
870static int card_busy_detect(struct mmc_card *card, unsigned int timeout_ms, 857static int card_busy_detect(struct mmc_card *card, unsigned int timeout_ms,
871 bool hw_busy_detect, struct request *req, bool *gen_err) 858 bool hw_busy_detect, struct request *req, bool *gen_err)
872{ 859{
@@ -875,7 +862,7 @@ static int card_busy_detect(struct mmc_card *card, unsigned int timeout_ms,
875 u32 status; 862 u32 status;
876 863
877 do { 864 do {
878 err = get_card_status(card, &status, 5); 865 err = __mmc_send_status(card, &status, 5);
879 if (err) { 866 if (err) {
880 pr_err("%s: error %d requesting status\n", 867 pr_err("%s: error %d requesting status\n",
881 req->rq_disk->disk_name, err); 868 req->rq_disk->disk_name, err);
@@ -1043,7 +1030,7 @@ static int mmc_blk_cmd_recovery(struct mmc_card *card, struct request *req,
1043 * we can't be sure the returned status is for the r/w command. 1030 * we can't be sure the returned status is for the r/w command.
1044 */ 1031 */
1045 for (retry = 2; retry >= 0; retry--) { 1032 for (retry = 2; retry >= 0; retry--) {
1046 err = get_card_status(card, &status, 0); 1033 err = __mmc_send_status(card, &status, 0);
1047 if (!err) 1034 if (!err)
1048 break; 1035 break;
1049 1036
@@ -1178,6 +1165,54 @@ int mmc_access_rpmb(struct mmc_queue *mq)
1178 return false; 1165 return false;
1179} 1166}
1180 1167
1168/*
1169 * The non-block commands come back from the block layer after it queued it and
1170 * processed it with all other requests and then they get issued in this
1171 * function.
1172 */
1173static void mmc_blk_issue_drv_op(struct mmc_queue *mq, struct request *req)
1174{
1175 struct mmc_queue_req *mq_rq;
1176 struct mmc_card *card = mq->card;
1177 struct mmc_blk_data *md = mq->blkdata;
1178 int ret;
1179 int i;
1180
1181 mq_rq = req_to_mmc_queue_req(req);
1182
1183 switch (mq_rq->drv_op) {
1184 case MMC_DRV_OP_IOCTL:
1185 for (i = 0; i < mq_rq->ioc_count; i++) {
1186 ret = __mmc_blk_ioctl_cmd(card, md, mq_rq->idata[i]);
1187 if (ret)
1188 break;
1189 }
1190 /* Always switch back to main area after RPMB access */
1191 if (md->area_type & MMC_BLK_DATA_AREA_RPMB)
1192 mmc_blk_part_switch(card, dev_get_drvdata(&card->dev));
1193 break;
1194 case MMC_DRV_OP_BOOT_WP:
1195 ret = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_WP,
1196 card->ext_csd.boot_ro_lock |
1197 EXT_CSD_BOOT_WP_B_PWR_WP_EN,
1198 card->ext_csd.part_time);
1199 if (ret)
1200 pr_err("%s: Locking boot partition ro until next power on failed: %d\n",
1201 md->disk->disk_name, ret);
1202 else
1203 card->ext_csd.boot_ro_lock |=
1204 EXT_CSD_BOOT_WP_B_PWR_WP_EN;
1205 break;
1206 default:
1207 pr_err("%s: unknown driver specific operation\n",
1208 md->disk->disk_name);
1209 ret = -EINVAL;
1210 break;
1211 }
1212 mq_rq->drv_op_result = ret;
1213 blk_end_request_all(req, ret);
1214}
1215
1181static void mmc_blk_issue_discard_rq(struct mmc_queue *mq, struct request *req) 1216static void mmc_blk_issue_discard_rq(struct mmc_queue *mq, struct request *req)
1182{ 1217{
1183 struct mmc_blk_data *md = mq->blkdata; 1218 struct mmc_blk_data *md = mq->blkdata;
@@ -1329,16 +1364,25 @@ static inline void mmc_apply_rel_rw(struct mmc_blk_request *brq,
1329 R1_ADDRESS_ERROR | /* Misaligned address */ \ 1364 R1_ADDRESS_ERROR | /* Misaligned address */ \
1330 R1_BLOCK_LEN_ERROR | /* Transferred block length incorrect */\ 1365 R1_BLOCK_LEN_ERROR | /* Transferred block length incorrect */\
1331 R1_WP_VIOLATION | /* Tried to write to protected block */ \ 1366 R1_WP_VIOLATION | /* Tried to write to protected block */ \
1367 R1_CARD_ECC_FAILED | /* Card ECC failed */ \
1332 R1_CC_ERROR | /* Card controller error */ \ 1368 R1_CC_ERROR | /* Card controller error */ \
1333 R1_ERROR) /* General/unknown error */ 1369 R1_ERROR) /* General/unknown error */
1334 1370
1371static bool mmc_blk_has_cmd_err(struct mmc_command *cmd)
1372{
1373 if (!cmd->error && cmd->resp[0] & CMD_ERRORS)
1374 cmd->error = -EIO;
1375
1376 return cmd->error;
1377}
1378
1335static enum mmc_blk_status mmc_blk_err_check(struct mmc_card *card, 1379static enum mmc_blk_status mmc_blk_err_check(struct mmc_card *card,
1336 struct mmc_async_req *areq) 1380 struct mmc_async_req *areq)
1337{ 1381{
1338 struct mmc_queue_req *mq_mrq = container_of(areq, struct mmc_queue_req, 1382 struct mmc_queue_req *mq_mrq = container_of(areq, struct mmc_queue_req,
1339 areq); 1383 areq);
1340 struct mmc_blk_request *brq = &mq_mrq->brq; 1384 struct mmc_blk_request *brq = &mq_mrq->brq;
1341 struct request *req = mq_mrq->req; 1385 struct request *req = mmc_queue_req_to_req(mq_mrq);
1342 int need_retune = card->host->need_retune; 1386 int need_retune = card->host->need_retune;
1343 bool ecc_err = false; 1387 bool ecc_err = false;
1344 bool gen_err = false; 1388 bool gen_err = false;
@@ -1353,7 +1397,7 @@ static enum mmc_blk_status mmc_blk_err_check(struct mmc_card *card,
1353 * stop.error indicates a problem with the stop command. Data 1397 * stop.error indicates a problem with the stop command. Data
1354 * may have been transferred, or may still be transferring. 1398 * may have been transferred, or may still be transferring.
1355 */ 1399 */
1356 if (brq->sbc.error || brq->cmd.error || brq->stop.error || 1400 if (brq->sbc.error || brq->cmd.error || mmc_blk_has_cmd_err(&brq->stop) ||
1357 brq->data.error) { 1401 brq->data.error) {
1358 switch (mmc_blk_cmd_recovery(card, req, brq, &ecc_err, &gen_err)) { 1402 switch (mmc_blk_cmd_recovery(card, req, brq, &ecc_err, &gen_err)) {
1359 case ERR_RETRY: 1403 case ERR_RETRY:
@@ -1407,7 +1451,8 @@ static enum mmc_blk_status mmc_blk_err_check(struct mmc_card *card,
1407 return MMC_BLK_RETRY; 1451 return MMC_BLK_RETRY;
1408 } 1452 }
1409 1453
1410 if (brq->data.error) { 1454 /* Some errors (ECC) are flagged on the next commmand, so check stop, too */
1455 if (brq->data.error || brq->stop.error) {
1411 if (need_retune && !brq->retune_retry_done) { 1456 if (need_retune && !brq->retune_retry_done) {
1412 pr_debug("%s: retrying because a re-tune was needed\n", 1457 pr_debug("%s: retrying because a re-tune was needed\n",
1413 req->rq_disk->disk_name); 1458 req->rq_disk->disk_name);
@@ -1415,7 +1460,7 @@ static enum mmc_blk_status mmc_blk_err_check(struct mmc_card *card,
1415 return MMC_BLK_RETRY; 1460 return MMC_BLK_RETRY;
1416 } 1461 }
1417 pr_err("%s: error %d transferring data, sector %u, nr %u, cmd response %#x, card status %#x\n", 1462 pr_err("%s: error %d transferring data, sector %u, nr %u, cmd response %#x, card status %#x\n",
1418 req->rq_disk->disk_name, brq->data.error, 1463 req->rq_disk->disk_name, brq->data.error ?: brq->stop.error,
1419 (unsigned)blk_rq_pos(req), 1464 (unsigned)blk_rq_pos(req),
1420 (unsigned)blk_rq_sectors(req), 1465 (unsigned)blk_rq_sectors(req),
1421 brq->cmd.resp[0], brq->stop.resp[0]); 1466 brq->cmd.resp[0], brq->stop.resp[0]);
@@ -1445,7 +1490,7 @@ static void mmc_blk_data_prep(struct mmc_queue *mq, struct mmc_queue_req *mqrq,
1445 struct mmc_blk_data *md = mq->blkdata; 1490 struct mmc_blk_data *md = mq->blkdata;
1446 struct mmc_card *card = md->queue.card; 1491 struct mmc_card *card = md->queue.card;
1447 struct mmc_blk_request *brq = &mqrq->brq; 1492 struct mmc_blk_request *brq = &mqrq->brq;
1448 struct request *req = mqrq->req; 1493 struct request *req = mmc_queue_req_to_req(mqrq);
1449 1494
1450 /* 1495 /*
1451 * Reliable writes are used to implement Forced Unit Access and 1496 * Reliable writes are used to implement Forced Unit Access and
@@ -1550,7 +1595,7 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq,
1550{ 1595{
1551 u32 readcmd, writecmd; 1596 u32 readcmd, writecmd;
1552 struct mmc_blk_request *brq = &mqrq->brq; 1597 struct mmc_blk_request *brq = &mqrq->brq;
1553 struct request *req = mqrq->req; 1598 struct request *req = mmc_queue_req_to_req(mqrq);
1554 struct mmc_blk_data *md = mq->blkdata; 1599 struct mmc_blk_data *md = mq->blkdata;
1555 bool do_rel_wr, do_data_tag; 1600 bool do_rel_wr, do_data_tag;
1556 1601
@@ -1647,7 +1692,7 @@ static void mmc_blk_rw_cmd_abort(struct mmc_queue *mq, struct mmc_card *card,
1647 if (mmc_card_removed(card)) 1692 if (mmc_card_removed(card))
1648 req->rq_flags |= RQF_QUIET; 1693 req->rq_flags |= RQF_QUIET;
1649 while (blk_end_request(req, BLK_STS_IOERR, blk_rq_cur_bytes(req))); 1694 while (blk_end_request(req, BLK_STS_IOERR, blk_rq_cur_bytes(req)));
1650 mmc_queue_req_free(mq, mqrq); 1695 mq->qcnt--;
1651} 1696}
1652 1697
1653/** 1698/**
@@ -1667,7 +1712,7 @@ static void mmc_blk_rw_try_restart(struct mmc_queue *mq, struct request *req,
1667 if (mmc_card_removed(mq->card)) { 1712 if (mmc_card_removed(mq->card)) {
1668 req->rq_flags |= RQF_QUIET; 1713 req->rq_flags |= RQF_QUIET;
1669 blk_end_request_all(req, BLK_STS_IOERR); 1714 blk_end_request_all(req, BLK_STS_IOERR);
1670 mmc_queue_req_free(mq, mqrq); 1715 mq->qcnt--; /* FIXME: just set to 0? */
1671 return; 1716 return;
1672 } 1717 }
1673 /* Else proceed and try to restart the current async request */ 1718 /* Else proceed and try to restart the current async request */
@@ -1690,12 +1735,8 @@ static void mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *new_req)
1690 bool req_pending = true; 1735 bool req_pending = true;
1691 1736
1692 if (new_req) { 1737 if (new_req) {
1693 mqrq_cur = mmc_queue_req_find(mq, new_req); 1738 mqrq_cur = req_to_mmc_queue_req(new_req);
1694 if (!mqrq_cur) { 1739 mq->qcnt++;
1695 WARN_ON(1);
1696 mmc_blk_requeue(mq->queue, new_req);
1697 new_req = NULL;
1698 }
1699 } 1740 }
1700 1741
1701 if (!mq->qcnt) 1742 if (!mq->qcnt)
@@ -1736,7 +1777,7 @@ static void mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *new_req)
1736 */ 1777 */
1737 mq_rq = container_of(old_areq, struct mmc_queue_req, areq); 1778 mq_rq = container_of(old_areq, struct mmc_queue_req, areq);
1738 brq = &mq_rq->brq; 1779 brq = &mq_rq->brq;
1739 old_req = mq_rq->req; 1780 old_req = mmc_queue_req_to_req(mq_rq);
1740 type = rq_data_dir(old_req) == READ ? MMC_BLK_READ : MMC_BLK_WRITE; 1781 type = rq_data_dir(old_req) == READ ? MMC_BLK_READ : MMC_BLK_WRITE;
1741 mmc_queue_bounce_post(mq_rq); 1782 mmc_queue_bounce_post(mq_rq);
1742 1783
@@ -1769,12 +1810,12 @@ static void mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *new_req)
1769 if (req_pending) 1810 if (req_pending)
1770 mmc_blk_rw_cmd_abort(mq, card, old_req, mq_rq); 1811 mmc_blk_rw_cmd_abort(mq, card, old_req, mq_rq);
1771 else 1812 else
1772 mmc_queue_req_free(mq, mq_rq); 1813 mq->qcnt--;
1773 mmc_blk_rw_try_restart(mq, new_req, mqrq_cur); 1814 mmc_blk_rw_try_restart(mq, new_req, mqrq_cur);
1774 return; 1815 return;
1775 } 1816 }
1776 if (!req_pending) { 1817 if (!req_pending) {
1777 mmc_queue_req_free(mq, mq_rq); 1818 mq->qcnt--;
1778 mmc_blk_rw_try_restart(mq, new_req, mqrq_cur); 1819 mmc_blk_rw_try_restart(mq, new_req, mqrq_cur);
1779 return; 1820 return;
1780 } 1821 }
@@ -1819,7 +1860,7 @@ static void mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *new_req)
1819 req_pending = blk_end_request(old_req, BLK_STS_IOERR, 1860 req_pending = blk_end_request(old_req, BLK_STS_IOERR,
1820 brq->data.blksz); 1861 brq->data.blksz);
1821 if (!req_pending) { 1862 if (!req_pending) {
1822 mmc_queue_req_free(mq, mq_rq); 1863 mq->qcnt--;
1823 mmc_blk_rw_try_restart(mq, new_req, mqrq_cur); 1864 mmc_blk_rw_try_restart(mq, new_req, mqrq_cur);
1824 return; 1865 return;
1825 } 1866 }
@@ -1849,7 +1890,7 @@ static void mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *new_req)
1849 } 1890 }
1850 } while (req_pending); 1891 } while (req_pending);
1851 1892
1852 mmc_queue_req_free(mq, mq_rq); 1893 mq->qcnt--;
1853} 1894}
1854 1895
1855void mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) 1896void mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
@@ -1870,23 +1911,54 @@ void mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
1870 goto out; 1911 goto out;
1871 } 1912 }
1872 1913
1873 if (req && req_op(req) == REQ_OP_DISCARD) { 1914 if (req) {
1874 /* complete ongoing async transfer before issuing discard */ 1915 switch (req_op(req)) {
1875 if (mq->qcnt) 1916 case REQ_OP_DRV_IN:
1876 mmc_blk_issue_rw_rq(mq, NULL); 1917 case REQ_OP_DRV_OUT:
1877 mmc_blk_issue_discard_rq(mq, req); 1918 /*
1878 } else if (req && req_op(req) == REQ_OP_SECURE_ERASE) { 1919 * Complete ongoing async transfer before issuing
1879 /* complete ongoing async transfer before issuing secure erase*/ 1920 * ioctl()s
1880 if (mq->qcnt) 1921 */
1881 mmc_blk_issue_rw_rq(mq, NULL); 1922 if (mq->qcnt)
1882 mmc_blk_issue_secdiscard_rq(mq, req); 1923 mmc_blk_issue_rw_rq(mq, NULL);
1883 } else if (req && req_op(req) == REQ_OP_FLUSH) { 1924 mmc_blk_issue_drv_op(mq, req);
1884 /* complete ongoing async transfer before issuing flush */ 1925 break;
1885 if (mq->qcnt) 1926 case REQ_OP_DISCARD:
1886 mmc_blk_issue_rw_rq(mq, NULL); 1927 /*
1887 mmc_blk_issue_flush(mq, req); 1928 * Complete ongoing async transfer before issuing
1929 * discard.
1930 */
1931 if (mq->qcnt)
1932 mmc_blk_issue_rw_rq(mq, NULL);
1933 mmc_blk_issue_discard_rq(mq, req);
1934 break;
1935 case REQ_OP_SECURE_ERASE:
1936 /*
1937 * Complete ongoing async transfer before issuing
1938 * secure erase.
1939 */
1940 if (mq->qcnt)
1941 mmc_blk_issue_rw_rq(mq, NULL);
1942 mmc_blk_issue_secdiscard_rq(mq, req);
1943 break;
1944 case REQ_OP_FLUSH:
1945 /*
1946 * Complete ongoing async transfer before issuing
1947 * flush.
1948 */
1949 if (mq->qcnt)
1950 mmc_blk_issue_rw_rq(mq, NULL);
1951 mmc_blk_issue_flush(mq, req);
1952 break;
1953 default:
1954 /* Normal request, just issue it */
1955 mmc_blk_issue_rw_rq(mq, req);
1956 card->host->context_info.is_waiting_last_req = false;
1957 break;
1958 }
1888 } else { 1959 } else {
1889 mmc_blk_issue_rw_rq(mq, req); 1960 /* No request, flushing the pipeline with NULL */
1961 mmc_blk_issue_rw_rq(mq, NULL);
1890 card->host->context_info.is_waiting_last_req = false; 1962 card->host->context_info.is_waiting_last_req = false;
1891 } 1963 }
1892 1964
@@ -2171,7 +2243,6 @@ static int mmc_blk_probe(struct mmc_card *card)
2171{ 2243{
2172 struct mmc_blk_data *md, *part_md; 2244 struct mmc_blk_data *md, *part_md;
2173 char cap_str[10]; 2245 char cap_str[10];
2174 int ret;
2175 2246
2176 /* 2247 /*
2177 * Check that the card supports the command class(es) we need. 2248 * Check that the card supports the command class(es) we need.
@@ -2181,15 +2252,9 @@ static int mmc_blk_probe(struct mmc_card *card)
2181 2252
2182 mmc_fixup_device(card, mmc_blk_fixups); 2253 mmc_fixup_device(card, mmc_blk_fixups);
2183 2254
2184 ret = mmc_queue_alloc_shared_queue(card);
2185 if (ret)
2186 return ret;
2187
2188 md = mmc_blk_alloc(card); 2255 md = mmc_blk_alloc(card);
2189 if (IS_ERR(md)) { 2256 if (IS_ERR(md))
2190 mmc_queue_free_shared_queue(card);
2191 return PTR_ERR(md); 2257 return PTR_ERR(md);
2192 }
2193 2258
2194 string_get_size((u64)get_capacity(md->disk), 512, STRING_UNITS_2, 2259 string_get_size((u64)get_capacity(md->disk), 512, STRING_UNITS_2,
2195 cap_str, sizeof(cap_str)); 2260 cap_str, sizeof(cap_str));
@@ -2227,7 +2292,6 @@ static int mmc_blk_probe(struct mmc_card *card)
2227 out: 2292 out:
2228 mmc_blk_remove_parts(card, md); 2293 mmc_blk_remove_parts(card, md);
2229 mmc_blk_remove_req(md); 2294 mmc_blk_remove_req(md);
2230 mmc_queue_free_shared_queue(card);
2231 return 0; 2295 return 0;
2232} 2296}
2233 2297
@@ -2245,7 +2309,6 @@ static void mmc_blk_remove(struct mmc_card *card)
2245 pm_runtime_put_noidle(&card->dev); 2309 pm_runtime_put_noidle(&card->dev);
2246 mmc_blk_remove_req(md); 2310 mmc_blk_remove_req(md);
2247 dev_set_drvdata(&card->dev, NULL); 2311 dev_set_drvdata(&card->dev, NULL);
2248 mmc_queue_free_shared_queue(card);
2249} 2312}
2250 2313
2251static int _mmc_blk_suspend(struct mmc_card *card) 2314static int _mmc_blk_suspend(struct mmc_card *card)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 82c45ddfa202..26431267a3e2 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -53,12 +53,6 @@
53/* If the device is not responding */ 53/* If the device is not responding */
54#define MMC_CORE_TIMEOUT_MS (10 * 60 * 1000) /* 10 minute timeout */ 54#define MMC_CORE_TIMEOUT_MS (10 * 60 * 1000) /* 10 minute timeout */
55 55
56/*
57 * Background operations can take a long time, depending on the housekeeping
58 * operations the card has to perform.
59 */
60#define MMC_BKOPS_MAX_TIMEOUT (4 * 60 * 1000) /* max time to wait in ms */
61
62/* The max erase timeout, used when host->max_busy_timeout isn't specified */ 56/* The max erase timeout, used when host->max_busy_timeout isn't specified */
63#define MMC_ERASE_TIMEOUT_MS (60 * 1000) /* 60 s */ 57#define MMC_ERASE_TIMEOUT_MS (60 * 1000) /* 60 s */
64 58
@@ -362,74 +356,6 @@ static int mmc_start_request(struct mmc_host *host, struct mmc_request *mrq)
362 return 0; 356 return 0;
363} 357}
364 358
365/**
366 * mmc_start_bkops - start BKOPS for supported cards
367 * @card: MMC card to start BKOPS
368 * @form_exception: A flag to indicate if this function was
369 * called due to an exception raised by the card
370 *
371 * Start background operations whenever requested.
372 * When the urgent BKOPS bit is set in a R1 command response
373 * then background operations should be started immediately.
374*/
375void mmc_start_bkops(struct mmc_card *card, bool from_exception)
376{
377 int err;
378 int timeout;
379 bool use_busy_signal;
380
381 if (!card->ext_csd.man_bkops_en || mmc_card_doing_bkops(card))
382 return;
383
384 err = mmc_read_bkops_status(card);
385 if (err) {
386 pr_err("%s: Failed to read bkops status: %d\n",
387 mmc_hostname(card->host), err);
388 return;
389 }
390
391 if (!card->ext_csd.raw_bkops_status)
392 return;
393
394 if (card->ext_csd.raw_bkops_status < EXT_CSD_BKOPS_LEVEL_2 &&
395 from_exception)
396 return;
397
398 mmc_claim_host(card->host);
399 if (card->ext_csd.raw_bkops_status >= EXT_CSD_BKOPS_LEVEL_2) {
400 timeout = MMC_BKOPS_MAX_TIMEOUT;
401 use_busy_signal = true;
402 } else {
403 timeout = 0;
404 use_busy_signal = false;
405 }
406
407 mmc_retune_hold(card->host);
408
409 err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
410 EXT_CSD_BKOPS_START, 1, timeout, 0,
411 use_busy_signal, true, false);
412 if (err) {
413 pr_warn("%s: Error %d starting bkops\n",
414 mmc_hostname(card->host), err);
415 mmc_retune_release(card->host);
416 goto out;
417 }
418
419 /*
420 * For urgent bkops status (LEVEL_2 and more)
421 * bkops executed synchronously, otherwise
422 * the operation is in progress
423 */
424 if (!use_busy_signal)
425 mmc_card_set_doing_bkops(card);
426 else
427 mmc_retune_release(card->host);
428out:
429 mmc_release_host(card->host);
430}
431EXPORT_SYMBOL(mmc_start_bkops);
432
433/* 359/*
434 * mmc_wait_data_done() - done callback for data request 360 * mmc_wait_data_done() - done callback for data request
435 * @mrq: done data request 361 * @mrq: done data request
@@ -749,71 +675,6 @@ void mmc_wait_for_req(struct mmc_host *host, struct mmc_request *mrq)
749EXPORT_SYMBOL(mmc_wait_for_req); 675EXPORT_SYMBOL(mmc_wait_for_req);
750 676
751/** 677/**
752 * mmc_interrupt_hpi - Issue for High priority Interrupt
753 * @card: the MMC card associated with the HPI transfer
754 *
755 * Issued High Priority Interrupt, and check for card status
756 * until out-of prg-state.
757 */
758int mmc_interrupt_hpi(struct mmc_card *card)
759{
760 int err;
761 u32 status;
762 unsigned long prg_wait;
763
764 if (!card->ext_csd.hpi_en) {
765 pr_info("%s: HPI enable bit unset\n", mmc_hostname(card->host));
766 return 1;
767 }
768
769 mmc_claim_host(card->host);
770 err = mmc_send_status(card, &status);
771 if (err) {
772 pr_err("%s: Get card status fail\n", mmc_hostname(card->host));
773 goto out;
774 }
775
776 switch (R1_CURRENT_STATE(status)) {
777 case R1_STATE_IDLE:
778 case R1_STATE_READY:
779 case R1_STATE_STBY:
780 case R1_STATE_TRAN:
781 /*
782 * In idle and transfer states, HPI is not needed and the caller
783 * can issue the next intended command immediately
784 */
785 goto out;
786 case R1_STATE_PRG:
787 break;
788 default:
789 /* In all other states, it's illegal to issue HPI */
790 pr_debug("%s: HPI cannot be sent. Card state=%d\n",
791 mmc_hostname(card->host), R1_CURRENT_STATE(status));
792 err = -EINVAL;
793 goto out;
794 }
795
796 err = mmc_send_hpi_cmd(card, &status);
797 if (err)
798 goto out;
799
800 prg_wait = jiffies + msecs_to_jiffies(card->ext_csd.out_of_int_time);
801 do {
802 err = mmc_send_status(card, &status);
803
804 if (!err && R1_CURRENT_STATE(status) == R1_STATE_TRAN)
805 break;
806 if (time_after(jiffies, prg_wait))
807 err = -ETIMEDOUT;
808 } while (!err);
809
810out:
811 mmc_release_host(card->host);
812 return err;
813}
814EXPORT_SYMBOL(mmc_interrupt_hpi);
815
816/**
817 * mmc_wait_for_cmd - start a command and wait for completion 678 * mmc_wait_for_cmd - start a command and wait for completion
818 * @host: MMC host to start command 679 * @host: MMC host to start command
819 * @cmd: MMC command to start 680 * @cmd: MMC command to start
@@ -843,53 +704,6 @@ int mmc_wait_for_cmd(struct mmc_host *host, struct mmc_command *cmd, int retries
843EXPORT_SYMBOL(mmc_wait_for_cmd); 704EXPORT_SYMBOL(mmc_wait_for_cmd);
844 705
845/** 706/**
846 * mmc_stop_bkops - stop ongoing BKOPS
847 * @card: MMC card to check BKOPS
848 *
849 * Send HPI command to stop ongoing background operations to
850 * allow rapid servicing of foreground operations, e.g. read/
851 * writes. Wait until the card comes out of the programming state
852 * to avoid errors in servicing read/write requests.
853 */
854int mmc_stop_bkops(struct mmc_card *card)
855{
856 int err = 0;
857
858 err = mmc_interrupt_hpi(card);
859
860 /*
861 * If err is EINVAL, we can't issue an HPI.
862 * It should complete the BKOPS.
863 */
864 if (!err || (err == -EINVAL)) {
865 mmc_card_clr_doing_bkops(card);
866 mmc_retune_release(card->host);
867 err = 0;
868 }
869
870 return err;
871}
872EXPORT_SYMBOL(mmc_stop_bkops);
873
874int mmc_read_bkops_status(struct mmc_card *card)
875{
876 int err;
877 u8 *ext_csd;
878
879 mmc_claim_host(card->host);
880 err = mmc_get_ext_csd(card, &ext_csd);
881 mmc_release_host(card->host);
882 if (err)
883 return err;
884
885 card->ext_csd.raw_bkops_status = ext_csd[EXT_CSD_BKOPS_STATUS];
886 card->ext_csd.raw_exception_status = ext_csd[EXT_CSD_EXP_EVENTS_STATUS];
887 kfree(ext_csd);
888 return 0;
889}
890EXPORT_SYMBOL(mmc_read_bkops_status);
891
892/**
893 * mmc_set_data_timeout - set the timeout for a data command 707 * mmc_set_data_timeout - set the timeout for a data command
894 * @data: data phase for command 708 * @data: data phase for command
895 * @card: the MMC card associated with the data transfer 709 * @card: the MMC card associated with the data transfer
@@ -2597,6 +2411,8 @@ EXPORT_SYMBOL(mmc_set_blockcount);
2597 2411
2598static void mmc_hw_reset_for_init(struct mmc_host *host) 2412static void mmc_hw_reset_for_init(struct mmc_host *host)
2599{ 2413{
2414 mmc_pwrseq_reset(host);
2415
2600 if (!(host->caps & MMC_CAP_HW_RESET) || !host->ops->hw_reset) 2416 if (!(host->caps & MMC_CAP_HW_RESET) || !host->ops->hw_reset)
2601 return; 2417 return;
2602 host->ops->hw_reset(host); 2418 host->ops->hw_reset(host);
@@ -2836,8 +2652,11 @@ void mmc_stop_host(struct mmc_host *host)
2836 host->removed = 1; 2652 host->removed = 1;
2837 spin_unlock_irqrestore(&host->lock, flags); 2653 spin_unlock_irqrestore(&host->lock, flags);
2838#endif 2654#endif
2839 if (host->slot.cd_irq >= 0) 2655 if (host->slot.cd_irq >= 0) {
2656 if (host->slot.cd_wake_enabled)
2657 disable_irq_wake(host->slot.cd_irq);
2840 disable_irq(host->slot.cd_irq); 2658 disable_irq(host->slot.cd_irq);
2659 }
2841 2660
2842 host->rescan_disable = 1; 2661 host->rescan_disable = 1;
2843 cancel_delayed_work_sync(&host->detect); 2662 cancel_delayed_work_sync(&host->detect);
@@ -2913,27 +2732,6 @@ int mmc_power_restore_host(struct mmc_host *host)
2913} 2732}
2914EXPORT_SYMBOL(mmc_power_restore_host); 2733EXPORT_SYMBOL(mmc_power_restore_host);
2915 2734
2916/*
2917 * Flush the cache to the non-volatile storage.
2918 */
2919int mmc_flush_cache(struct mmc_card *card)
2920{
2921 int err = 0;
2922
2923 if (mmc_card_mmc(card) &&
2924 (card->ext_csd.cache_size > 0) &&
2925 (card->ext_csd.cache_ctrl & 1)) {
2926 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
2927 EXT_CSD_FLUSH_CACHE, 1, 0);
2928 if (err)
2929 pr_err("%s: cache flush error %d\n",
2930 mmc_hostname(card->host), err);
2931 }
2932
2933 return err;
2934}
2935EXPORT_SYMBOL(mmc_flush_cache);
2936
2937#ifdef CONFIG_PM_SLEEP 2735#ifdef CONFIG_PM_SLEEP
2938/* Do the card removal on suspend if card is assumed removeable 2736/* Do the card removal on suspend if card is assumed removeable
2939 * Do that in pm notifier while userspace isn't yet frozen, so we will be able 2737 * Do that in pm notifier while userspace isn't yet frozen, so we will be able
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
index 3f8c85d5aa09..1503412f826c 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -30,6 +30,7 @@
30#include "host.h" 30#include "host.h"
31#include "slot-gpio.h" 31#include "slot-gpio.h"
32#include "pwrseq.h" 32#include "pwrseq.h"
33#include "sdio_ops.h"
33 34
34#define cls_dev_to_mmc_host(d) container_of(d, struct mmc_host, class_dev) 35#define cls_dev_to_mmc_host(d) container_of(d, struct mmc_host, class_dev)
35 36
@@ -176,19 +177,17 @@ static void mmc_retune_timer(unsigned long data)
176 */ 177 */
177int mmc_of_parse(struct mmc_host *host) 178int mmc_of_parse(struct mmc_host *host)
178{ 179{
179 struct device_node *np; 180 struct device *dev = host->parent;
180 u32 bus_width; 181 u32 bus_width;
181 int ret; 182 int ret;
182 bool cd_cap_invert, cd_gpio_invert = false; 183 bool cd_cap_invert, cd_gpio_invert = false;
183 bool ro_cap_invert, ro_gpio_invert = false; 184 bool ro_cap_invert, ro_gpio_invert = false;
184 185
185 if (!host->parent || !host->parent->of_node) 186 if (!dev || !dev_fwnode(dev))
186 return 0; 187 return 0;
187 188
188 np = host->parent->of_node;
189
190 /* "bus-width" is translated to MMC_CAP_*_BIT_DATA flags */ 189 /* "bus-width" is translated to MMC_CAP_*_BIT_DATA flags */
191 if (of_property_read_u32(np, "bus-width", &bus_width) < 0) { 190 if (device_property_read_u32(dev, "bus-width", &bus_width) < 0) {
192 dev_dbg(host->parent, 191 dev_dbg(host->parent,
193 "\"bus-width\" property is missing, assuming 1 bit.\n"); 192 "\"bus-width\" property is missing, assuming 1 bit.\n");
194 bus_width = 1; 193 bus_width = 1;
@@ -210,7 +209,7 @@ int mmc_of_parse(struct mmc_host *host)
210 } 209 }
211 210
212 /* f_max is obtained from the optional "max-frequency" property */ 211 /* f_max is obtained from the optional "max-frequency" property */
213 of_property_read_u32(np, "max-frequency", &host->f_max); 212 device_property_read_u32(dev, "max-frequency", &host->f_max);
214 213
215 /* 214 /*
216 * Configure CD and WP pins. They are both by default active low to 215 * Configure CD and WP pins. They are both by default active low to
@@ -225,12 +224,12 @@ int mmc_of_parse(struct mmc_host *host)
225 */ 224 */
226 225
227 /* Parse Card Detection */ 226 /* Parse Card Detection */
228 if (of_property_read_bool(np, "non-removable")) { 227 if (device_property_read_bool(dev, "non-removable")) {
229 host->caps |= MMC_CAP_NONREMOVABLE; 228 host->caps |= MMC_CAP_NONREMOVABLE;
230 } else { 229 } else {
231 cd_cap_invert = of_property_read_bool(np, "cd-inverted"); 230 cd_cap_invert = device_property_read_bool(dev, "cd-inverted");
232 231
233 if (of_property_read_bool(np, "broken-cd")) 232 if (device_property_read_bool(dev, "broken-cd"))
234 host->caps |= MMC_CAP_NEEDS_POLL; 233 host->caps |= MMC_CAP_NEEDS_POLL;
235 234
236 ret = mmc_gpiod_request_cd(host, "cd", 0, true, 235 ret = mmc_gpiod_request_cd(host, "cd", 0, true,
@@ -256,7 +255,7 @@ int mmc_of_parse(struct mmc_host *host)
256 } 255 }
257 256
258 /* Parse Write Protection */ 257 /* Parse Write Protection */
259 ro_cap_invert = of_property_read_bool(np, "wp-inverted"); 258 ro_cap_invert = device_property_read_bool(dev, "wp-inverted");
260 259
261 ret = mmc_gpiod_request_ro(host, "wp", 0, false, 0, &ro_gpio_invert); 260 ret = mmc_gpiod_request_ro(host, "wp", 0, false, 0, &ro_gpio_invert);
262 if (!ret) 261 if (!ret)
@@ -264,64 +263,64 @@ int mmc_of_parse(struct mmc_host *host)
264 else if (ret != -ENOENT && ret != -ENOSYS) 263 else if (ret != -ENOENT && ret != -ENOSYS)
265 return ret; 264 return ret;
266 265
267 if (of_property_read_bool(np, "disable-wp")) 266 if (device_property_read_bool(dev, "disable-wp"))
268 host->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 267 host->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
269 268
270 /* See the comment on CD inversion above */ 269 /* See the comment on CD inversion above */
271 if (ro_cap_invert ^ ro_gpio_invert) 270 if (ro_cap_invert ^ ro_gpio_invert)
272 host->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH; 271 host->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH;
273 272
274 if (of_property_read_bool(np, "cap-sd-highspeed")) 273 if (device_property_read_bool(dev, "cap-sd-highspeed"))
275 host->caps |= MMC_CAP_SD_HIGHSPEED; 274 host->caps |= MMC_CAP_SD_HIGHSPEED;
276 if (of_property_read_bool(np, "cap-mmc-highspeed")) 275 if (device_property_read_bool(dev, "cap-mmc-highspeed"))
277 host->caps |= MMC_CAP_MMC_HIGHSPEED; 276 host->caps |= MMC_CAP_MMC_HIGHSPEED;
278 if (of_property_read_bool(np, "sd-uhs-sdr12")) 277 if (device_property_read_bool(dev, "sd-uhs-sdr12"))
279 host->caps |= MMC_CAP_UHS_SDR12; 278 host->caps |= MMC_CAP_UHS_SDR12;
280 if (of_property_read_bool(np, "sd-uhs-sdr25")) 279 if (device_property_read_bool(dev, "sd-uhs-sdr25"))
281 host->caps |= MMC_CAP_UHS_SDR25; 280 host->caps |= MMC_CAP_UHS_SDR25;
282 if (of_property_read_bool(np, "sd-uhs-sdr50")) 281 if (device_property_read_bool(dev, "sd-uhs-sdr50"))
283 host->caps |= MMC_CAP_UHS_SDR50; 282 host->caps |= MMC_CAP_UHS_SDR50;
284 if (of_property_read_bool(np, "sd-uhs-sdr104")) 283 if (device_property_read_bool(dev, "sd-uhs-sdr104"))
285 host->caps |= MMC_CAP_UHS_SDR104; 284 host->caps |= MMC_CAP_UHS_SDR104;
286 if (of_property_read_bool(np, "sd-uhs-ddr50")) 285 if (device_property_read_bool(dev, "sd-uhs-ddr50"))
287 host->caps |= MMC_CAP_UHS_DDR50; 286 host->caps |= MMC_CAP_UHS_DDR50;
288 if (of_property_read_bool(np, "cap-power-off-card")) 287 if (device_property_read_bool(dev, "cap-power-off-card"))
289 host->caps |= MMC_CAP_POWER_OFF_CARD; 288 host->caps |= MMC_CAP_POWER_OFF_CARD;
290 if (of_property_read_bool(np, "cap-mmc-hw-reset")) 289 if (device_property_read_bool(dev, "cap-mmc-hw-reset"))
291 host->caps |= MMC_CAP_HW_RESET; 290 host->caps |= MMC_CAP_HW_RESET;
292 if (of_property_read_bool(np, "cap-sdio-irq")) 291 if (device_property_read_bool(dev, "cap-sdio-irq"))
293 host->caps |= MMC_CAP_SDIO_IRQ; 292 host->caps |= MMC_CAP_SDIO_IRQ;
294 if (of_property_read_bool(np, "full-pwr-cycle")) 293 if (device_property_read_bool(dev, "full-pwr-cycle"))
295 host->caps2 |= MMC_CAP2_FULL_PWR_CYCLE; 294 host->caps2 |= MMC_CAP2_FULL_PWR_CYCLE;
296 if (of_property_read_bool(np, "keep-power-in-suspend")) 295 if (device_property_read_bool(dev, "keep-power-in-suspend"))
297 host->pm_caps |= MMC_PM_KEEP_POWER; 296 host->pm_caps |= MMC_PM_KEEP_POWER;
298 if (of_property_read_bool(np, "wakeup-source") || 297 if (device_property_read_bool(dev, "wakeup-source") ||
299 of_property_read_bool(np, "enable-sdio-wakeup")) /* legacy */ 298 device_property_read_bool(dev, "enable-sdio-wakeup")) /* legacy */
300 host->pm_caps |= MMC_PM_WAKE_SDIO_IRQ; 299 host->pm_caps |= MMC_PM_WAKE_SDIO_IRQ;
301 if (of_property_read_bool(np, "mmc-ddr-3_3v")) 300 if (device_property_read_bool(dev, "mmc-ddr-3_3v"))
302 host->caps |= MMC_CAP_3_3V_DDR; 301 host->caps |= MMC_CAP_3_3V_DDR;
303 if (of_property_read_bool(np, "mmc-ddr-1_8v")) 302 if (device_property_read_bool(dev, "mmc-ddr-1_8v"))
304 host->caps |= MMC_CAP_1_8V_DDR; 303 host->caps |= MMC_CAP_1_8V_DDR;
305 if (of_property_read_bool(np, "mmc-ddr-1_2v")) 304 if (device_property_read_bool(dev, "mmc-ddr-1_2v"))
306 host->caps |= MMC_CAP_1_2V_DDR; 305 host->caps |= MMC_CAP_1_2V_DDR;
307 if (of_property_read_bool(np, "mmc-hs200-1_8v")) 306 if (device_property_read_bool(dev, "mmc-hs200-1_8v"))
308 host->caps2 |= MMC_CAP2_HS200_1_8V_SDR; 307 host->caps2 |= MMC_CAP2_HS200_1_8V_SDR;
309 if (of_property_read_bool(np, "mmc-hs200-1_2v")) 308 if (device_property_read_bool(dev, "mmc-hs200-1_2v"))
310 host->caps2 |= MMC_CAP2_HS200_1_2V_SDR; 309 host->caps2 |= MMC_CAP2_HS200_1_2V_SDR;
311 if (of_property_read_bool(np, "mmc-hs400-1_8v")) 310 if (device_property_read_bool(dev, "mmc-hs400-1_8v"))
312 host->caps2 |= MMC_CAP2_HS400_1_8V | MMC_CAP2_HS200_1_8V_SDR; 311 host->caps2 |= MMC_CAP2_HS400_1_8V | MMC_CAP2_HS200_1_8V_SDR;
313 if (of_property_read_bool(np, "mmc-hs400-1_2v")) 312 if (device_property_read_bool(dev, "mmc-hs400-1_2v"))
314 host->caps2 |= MMC_CAP2_HS400_1_2V | MMC_CAP2_HS200_1_2V_SDR; 313 host->caps2 |= MMC_CAP2_HS400_1_2V | MMC_CAP2_HS200_1_2V_SDR;
315 if (of_property_read_bool(np, "mmc-hs400-enhanced-strobe")) 314 if (device_property_read_bool(dev, "mmc-hs400-enhanced-strobe"))
316 host->caps2 |= MMC_CAP2_HS400_ES; 315 host->caps2 |= MMC_CAP2_HS400_ES;
317 if (of_property_read_bool(np, "no-sdio")) 316 if (device_property_read_bool(dev, "no-sdio"))
318 host->caps2 |= MMC_CAP2_NO_SDIO; 317 host->caps2 |= MMC_CAP2_NO_SDIO;
319 if (of_property_read_bool(np, "no-sd")) 318 if (device_property_read_bool(dev, "no-sd"))
320 host->caps2 |= MMC_CAP2_NO_SD; 319 host->caps2 |= MMC_CAP2_NO_SD;
321 if (of_property_read_bool(np, "no-mmc")) 320 if (device_property_read_bool(dev, "no-mmc"))
322 host->caps2 |= MMC_CAP2_NO_MMC; 321 host->caps2 |= MMC_CAP2_NO_MMC;
323 322
324 host->dsr_req = !of_property_read_u32(np, "dsr", &host->dsr); 323 host->dsr_req = !device_property_read_u32(dev, "dsr", &host->dsr);
325 if (host->dsr_req && (host->dsr & ~0xffff)) { 324 if (host->dsr_req && (host->dsr & ~0xffff)) {
326 dev_err(host->parent, 325 dev_err(host->parent,
327 "device tree specified broken value for DSR: 0x%x, ignoring\n", 326 "device tree specified broken value for DSR: 0x%x, ignoring\n",
@@ -379,6 +378,7 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *dev)
379 spin_lock_init(&host->lock); 378 spin_lock_init(&host->lock);
380 init_waitqueue_head(&host->wq); 379 init_waitqueue_head(&host->wq);
381 INIT_DELAYED_WORK(&host->detect, mmc_rescan); 380 INIT_DELAYED_WORK(&host->detect, mmc_rescan);
381 INIT_DELAYED_WORK(&host->sdio_irq_work, sdio_irq_work);
382 setup_timer(&host->retune_timer, mmc_retune_timer, (unsigned long)host); 382 setup_timer(&host->retune_timer, mmc_retune_timer, (unsigned long)host);
383 383
384 /* 384 /*
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 2c87dede5841..4ffea14b7eb6 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -27,6 +27,7 @@
27#include "mmc_ops.h" 27#include "mmc_ops.h"
28#include "quirks.h" 28#include "quirks.h"
29#include "sd_ops.h" 29#include "sd_ops.h"
30#include "pwrseq.h"
30 31
31#define DEFAULT_CMD6_TIMEOUT_MS 500 32#define DEFAULT_CMD6_TIMEOUT_MS 500
32 33
@@ -1555,10 +1556,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
1555 /* 1556 /*
1556 * Fetch CID from card. 1557 * Fetch CID from card.
1557 */ 1558 */
1558 if (mmc_host_is_spi(host)) 1559 err = mmc_send_cid(host, cid);
1559 err = mmc_send_cid(host, cid);
1560 else
1561 err = mmc_all_send_cid(host, cid);
1562 if (err) 1560 if (err)
1563 goto err; 1561 goto err;
1564 1562
@@ -1653,12 +1651,8 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
1653 mmc_set_erase_size(card); 1651 mmc_set_erase_size(card);
1654 } 1652 }
1655 1653
1656 /* 1654 /* Enable ERASE_GRP_DEF. This bit is lost after a reset or power off. */
1657 * If enhanced_area_en is TRUE, host needs to enable ERASE_GRP_DEF 1655 if (card->ext_csd.rev >= 3) {
1658 * bit. This bit will be lost every time after a reset or power off.
1659 */
1660 if (card->ext_csd.partition_setting_completed ||
1661 (card->ext_csd.rev >= 3 && (host->caps2 & MMC_CAP2_HC_ERASE_SZ))) {
1662 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, 1656 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
1663 EXT_CSD_ERASE_GROUP_DEF, 1, 1657 EXT_CSD_ERASE_GROUP_DEF, 1,
1664 card->ext_csd.generic_cmd6_time); 1658 card->ext_csd.generic_cmd6_time);
@@ -2096,7 +2090,7 @@ static int mmc_runtime_resume(struct mmc_host *host)
2096 return 0; 2090 return 0;
2097} 2091}
2098 2092
2099int mmc_can_reset(struct mmc_card *card) 2093static int mmc_can_reset(struct mmc_card *card)
2100{ 2094{
2101 u8 rst_n_function; 2095 u8 rst_n_function;
2102 2096
@@ -2105,7 +2099,6 @@ int mmc_can_reset(struct mmc_card *card)
2105 return 0; 2099 return 0;
2106 return 1; 2100 return 1;
2107} 2101}
2108EXPORT_SYMBOL(mmc_can_reset);
2109 2102
2110static int mmc_reset(struct mmc_host *host) 2103static int mmc_reset(struct mmc_host *host)
2111{ 2104{
@@ -2127,6 +2120,7 @@ static int mmc_reset(struct mmc_host *host)
2127 } else { 2120 } else {
2128 /* Do a brute force power cycle */ 2121 /* Do a brute force power cycle */
2129 mmc_power_cycle(host, card->ocr); 2122 mmc_power_cycle(host, card->ocr);
2123 mmc_pwrseq_reset(host);
2130 } 2124 }
2131 return mmc_init_card(host, card->ocr, card); 2125 return mmc_init_card(host, card->ocr, card);
2132} 2126}
diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c
index 78f75f00efc5..5f7c5920231a 100644
--- a/drivers/mmc/core/mmc_ops.c
+++ b/drivers/mmc/core/mmc_ops.c
@@ -19,6 +19,7 @@
19#include <linux/mmc/mmc.h> 19#include <linux/mmc/mmc.h>
20 20
21#include "core.h" 21#include "core.h"
22#include "card.h"
22#include "host.h" 23#include "host.h"
23#include "mmc_ops.h" 24#include "mmc_ops.h"
24 25
@@ -54,7 +55,7 @@ static const u8 tuning_blk_pattern_8bit[] = {
54 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 55 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
55}; 56};
56 57
57int mmc_send_status(struct mmc_card *card, u32 *status) 58int __mmc_send_status(struct mmc_card *card, u32 *status, unsigned int retries)
58{ 59{
59 int err; 60 int err;
60 struct mmc_command cmd = {}; 61 struct mmc_command cmd = {};
@@ -64,7 +65,7 @@ int mmc_send_status(struct mmc_card *card, u32 *status)
64 cmd.arg = card->rca << 16; 65 cmd.arg = card->rca << 16;
65 cmd.flags = MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC; 66 cmd.flags = MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC;
66 67
67 err = mmc_wait_for_cmd(card->host, &cmd, MMC_CMD_RETRIES); 68 err = mmc_wait_for_cmd(card->host, &cmd, retries);
68 if (err) 69 if (err)
69 return err; 70 return err;
70 71
@@ -76,6 +77,12 @@ int mmc_send_status(struct mmc_card *card, u32 *status)
76 77
77 return 0; 78 return 0;
78} 79}
80EXPORT_SYMBOL_GPL(__mmc_send_status);
81
82int mmc_send_status(struct mmc_card *card, u32 *status)
83{
84 return __mmc_send_status(card, status, MMC_CMD_RETRIES);
85}
79 86
80static int _mmc_select_card(struct mmc_host *host, struct mmc_card *card) 87static int _mmc_select_card(struct mmc_host *host, struct mmc_card *card)
81{ 88{
@@ -200,24 +207,6 @@ int mmc_send_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr)
200 return err; 207 return err;
201} 208}
202 209
203int mmc_all_send_cid(struct mmc_host *host, u32 *cid)
204{
205 int err;
206 struct mmc_command cmd = {};
207
208 cmd.opcode = MMC_ALL_SEND_CID;
209 cmd.arg = 0;
210 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
211
212 err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES);
213 if (err)
214 return err;
215
216 memcpy(cid, cmd.resp, sizeof(u32) * 4);
217
218 return 0;
219}
220
221int mmc_set_relative_addr(struct mmc_card *card) 210int mmc_set_relative_addr(struct mmc_card *card)
222{ 211{
223 struct mmc_command cmd = {}; 212 struct mmc_command cmd = {};
@@ -302,15 +291,11 @@ mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host,
302 return 0; 291 return 0;
303} 292}
304 293
305int mmc_send_csd(struct mmc_card *card, u32 *csd) 294static int mmc_spi_send_csd(struct mmc_card *card, u32 *csd)
306{ 295{
307 int ret, i; 296 int ret, i;
308 __be32 *csd_tmp; 297 __be32 *csd_tmp;
309 298
310 if (!mmc_host_is_spi(card->host))
311 return mmc_send_cxd_native(card->host, card->rca << 16,
312 csd, MMC_SEND_CSD);
313
314 csd_tmp = kzalloc(16, GFP_KERNEL); 299 csd_tmp = kzalloc(16, GFP_KERNEL);
315 if (!csd_tmp) 300 if (!csd_tmp)
316 return -ENOMEM; 301 return -ENOMEM;
@@ -327,18 +312,20 @@ err:
327 return ret; 312 return ret;
328} 313}
329 314
330int mmc_send_cid(struct mmc_host *host, u32 *cid) 315int mmc_send_csd(struct mmc_card *card, u32 *csd)
316{
317 if (mmc_host_is_spi(card->host))
318 return mmc_spi_send_csd(card, csd);
319
320 return mmc_send_cxd_native(card->host, card->rca << 16, csd,
321 MMC_SEND_CSD);
322}
323
324static int mmc_spi_send_cid(struct mmc_host *host, u32 *cid)
331{ 325{
332 int ret, i; 326 int ret, i;
333 __be32 *cid_tmp; 327 __be32 *cid_tmp;
334 328
335 if (!mmc_host_is_spi(host)) {
336 if (!host->card)
337 return -EINVAL;
338 return mmc_send_cxd_native(host, host->card->rca << 16,
339 cid, MMC_SEND_CID);
340 }
341
342 cid_tmp = kzalloc(16, GFP_KERNEL); 329 cid_tmp = kzalloc(16, GFP_KERNEL);
343 if (!cid_tmp) 330 if (!cid_tmp)
344 return -ENOMEM; 331 return -ENOMEM;
@@ -355,6 +342,14 @@ err:
355 return ret; 342 return ret;
356} 343}
357 344
345int mmc_send_cid(struct mmc_host *host, u32 *cid)
346{
347 if (mmc_host_is_spi(host))
348 return mmc_spi_send_cid(host, cid);
349
350 return mmc_send_cxd_native(host, 0, cid, MMC_ALL_SEND_CID);
351}
352
358int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd) 353int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd)
359{ 354{
360 int err; 355 int err;
@@ -800,7 +795,7 @@ int mmc_bus_test(struct mmc_card *card, u8 bus_width)
800 return mmc_send_bus_test(card, card->host, MMC_BUS_TEST_R, width); 795 return mmc_send_bus_test(card, card->host, MMC_BUS_TEST_R, width);
801} 796}
802 797
803int mmc_send_hpi_cmd(struct mmc_card *card, u32 *status) 798static int mmc_send_hpi_cmd(struct mmc_card *card, u32 *status)
804{ 799{
805 struct mmc_command cmd = {}; 800 struct mmc_command cmd = {};
806 unsigned int opcode; 801 unsigned int opcode;
@@ -834,11 +829,208 @@ int mmc_send_hpi_cmd(struct mmc_card *card, u32 *status)
834 return 0; 829 return 0;
835} 830}
836 831
832/**
833 * mmc_interrupt_hpi - Issue for High priority Interrupt
834 * @card: the MMC card associated with the HPI transfer
835 *
836 * Issued High Priority Interrupt, and check for card status
837 * until out-of prg-state.
838 */
839int mmc_interrupt_hpi(struct mmc_card *card)
840{
841 int err;
842 u32 status;
843 unsigned long prg_wait;
844
845 if (!card->ext_csd.hpi_en) {
846 pr_info("%s: HPI enable bit unset\n", mmc_hostname(card->host));
847 return 1;
848 }
849
850 mmc_claim_host(card->host);
851 err = mmc_send_status(card, &status);
852 if (err) {
853 pr_err("%s: Get card status fail\n", mmc_hostname(card->host));
854 goto out;
855 }
856
857 switch (R1_CURRENT_STATE(status)) {
858 case R1_STATE_IDLE:
859 case R1_STATE_READY:
860 case R1_STATE_STBY:
861 case R1_STATE_TRAN:
862 /*
863 * In idle and transfer states, HPI is not needed and the caller
864 * can issue the next intended command immediately
865 */
866 goto out;
867 case R1_STATE_PRG:
868 break;
869 default:
870 /* In all other states, it's illegal to issue HPI */
871 pr_debug("%s: HPI cannot be sent. Card state=%d\n",
872 mmc_hostname(card->host), R1_CURRENT_STATE(status));
873 err = -EINVAL;
874 goto out;
875 }
876
877 err = mmc_send_hpi_cmd(card, &status);
878 if (err)
879 goto out;
880
881 prg_wait = jiffies + msecs_to_jiffies(card->ext_csd.out_of_int_time);
882 do {
883 err = mmc_send_status(card, &status);
884
885 if (!err && R1_CURRENT_STATE(status) == R1_STATE_TRAN)
886 break;
887 if (time_after(jiffies, prg_wait))
888 err = -ETIMEDOUT;
889 } while (!err);
890
891out:
892 mmc_release_host(card->host);
893 return err;
894}
895
837int mmc_can_ext_csd(struct mmc_card *card) 896int mmc_can_ext_csd(struct mmc_card *card)
838{ 897{
839 return (card && card->csd.mmca_vsn > CSD_SPEC_VER_3); 898 return (card && card->csd.mmca_vsn > CSD_SPEC_VER_3);
840} 899}
841 900
901/**
902 * mmc_stop_bkops - stop ongoing BKOPS
903 * @card: MMC card to check BKOPS
904 *
905 * Send HPI command to stop ongoing background operations to
906 * allow rapid servicing of foreground operations, e.g. read/
907 * writes. Wait until the card comes out of the programming state
908 * to avoid errors in servicing read/write requests.
909 */
910int mmc_stop_bkops(struct mmc_card *card)
911{
912 int err = 0;
913
914 err = mmc_interrupt_hpi(card);
915
916 /*
917 * If err is EINVAL, we can't issue an HPI.
918 * It should complete the BKOPS.
919 */
920 if (!err || (err == -EINVAL)) {
921 mmc_card_clr_doing_bkops(card);
922 mmc_retune_release(card->host);
923 err = 0;
924 }
925
926 return err;
927}
928
929static int mmc_read_bkops_status(struct mmc_card *card)
930{
931 int err;
932 u8 *ext_csd;
933
934 mmc_claim_host(card->host);
935 err = mmc_get_ext_csd(card, &ext_csd);
936 mmc_release_host(card->host);
937 if (err)
938 return err;
939
940 card->ext_csd.raw_bkops_status = ext_csd[EXT_CSD_BKOPS_STATUS];
941 card->ext_csd.raw_exception_status = ext_csd[EXT_CSD_EXP_EVENTS_STATUS];
942 kfree(ext_csd);
943 return 0;
944}
945
946/**
947 * mmc_start_bkops - start BKOPS for supported cards
948 * @card: MMC card to start BKOPS
949 * @form_exception: A flag to indicate if this function was
950 * called due to an exception raised by the card
951 *
952 * Start background operations whenever requested.
953 * When the urgent BKOPS bit is set in a R1 command response
954 * then background operations should be started immediately.
955*/
956void mmc_start_bkops(struct mmc_card *card, bool from_exception)
957{
958 int err;
959 int timeout;
960 bool use_busy_signal;
961
962 if (!card->ext_csd.man_bkops_en || mmc_card_doing_bkops(card))
963 return;
964
965 err = mmc_read_bkops_status(card);
966 if (err) {
967 pr_err("%s: Failed to read bkops status: %d\n",
968 mmc_hostname(card->host), err);
969 return;
970 }
971
972 if (!card->ext_csd.raw_bkops_status)
973 return;
974
975 if (card->ext_csd.raw_bkops_status < EXT_CSD_BKOPS_LEVEL_2 &&
976 from_exception)
977 return;
978
979 mmc_claim_host(card->host);
980 if (card->ext_csd.raw_bkops_status >= EXT_CSD_BKOPS_LEVEL_2) {
981 timeout = MMC_OPS_TIMEOUT_MS;
982 use_busy_signal = true;
983 } else {
984 timeout = 0;
985 use_busy_signal = false;
986 }
987
988 mmc_retune_hold(card->host);
989
990 err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
991 EXT_CSD_BKOPS_START, 1, timeout, 0,
992 use_busy_signal, true, false);
993 if (err) {
994 pr_warn("%s: Error %d starting bkops\n",
995 mmc_hostname(card->host), err);
996 mmc_retune_release(card->host);
997 goto out;
998 }
999
1000 /*
1001 * For urgent bkops status (LEVEL_2 and more)
1002 * bkops executed synchronously, otherwise
1003 * the operation is in progress
1004 */
1005 if (!use_busy_signal)
1006 mmc_card_set_doing_bkops(card);
1007 else
1008 mmc_retune_release(card->host);
1009out:
1010 mmc_release_host(card->host);
1011}
1012
1013/*
1014 * Flush the cache to the non-volatile storage.
1015 */
1016int mmc_flush_cache(struct mmc_card *card)
1017{
1018 int err = 0;
1019
1020 if (mmc_card_mmc(card) &&
1021 (card->ext_csd.cache_size > 0) &&
1022 (card->ext_csd.cache_ctrl & 1)) {
1023 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
1024 EXT_CSD_FLUSH_CACHE, 1, 0);
1025 if (err)
1026 pr_err("%s: cache flush error %d\n",
1027 mmc_hostname(card->host), err);
1028 }
1029
1030 return err;
1031}
1032EXPORT_SYMBOL(mmc_flush_cache);
1033
842static int mmc_cmdq_switch(struct mmc_card *card, bool enable) 1034static int mmc_cmdq_switch(struct mmc_card *card, bool enable)
843{ 1035{
844 u8 val = enable ? EXT_CSD_CMDQ_MODE_ENABLED : 0; 1036 u8 val = enable ? EXT_CSD_CMDQ_MODE_ENABLED : 0;
diff --git a/drivers/mmc/core/mmc_ops.h b/drivers/mmc/core/mmc_ops.h
index 978bd2e60f8a..a1390d486381 100644
--- a/drivers/mmc/core/mmc_ops.h
+++ b/drivers/mmc/core/mmc_ops.h
@@ -22,15 +22,14 @@ int mmc_deselect_cards(struct mmc_host *host);
22int mmc_set_dsr(struct mmc_host *host); 22int mmc_set_dsr(struct mmc_host *host);
23int mmc_go_idle(struct mmc_host *host); 23int mmc_go_idle(struct mmc_host *host);
24int mmc_send_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr); 24int mmc_send_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr);
25int mmc_all_send_cid(struct mmc_host *host, u32 *cid);
26int mmc_set_relative_addr(struct mmc_card *card); 25int mmc_set_relative_addr(struct mmc_card *card);
27int mmc_send_csd(struct mmc_card *card, u32 *csd); 26int mmc_send_csd(struct mmc_card *card, u32 *csd);
27int __mmc_send_status(struct mmc_card *card, u32 *status, unsigned int retries);
28int mmc_send_status(struct mmc_card *card, u32 *status); 28int mmc_send_status(struct mmc_card *card, u32 *status);
29int mmc_send_cid(struct mmc_host *host, u32 *cid); 29int mmc_send_cid(struct mmc_host *host, u32 *cid);
30int mmc_spi_read_ocr(struct mmc_host *host, int highcap, u32 *ocrp); 30int mmc_spi_read_ocr(struct mmc_host *host, int highcap, u32 *ocrp);
31int mmc_spi_set_crc(struct mmc_host *host, int use_crc); 31int mmc_spi_set_crc(struct mmc_host *host, int use_crc);
32int mmc_bus_test(struct mmc_card *card, u8 bus_width); 32int mmc_bus_test(struct mmc_card *card, u8 bus_width);
33int mmc_send_hpi_cmd(struct mmc_card *card, u32 *status);
34int mmc_interrupt_hpi(struct mmc_card *card); 33int mmc_interrupt_hpi(struct mmc_card *card);
35int mmc_can_ext_csd(struct mmc_card *card); 34int mmc_can_ext_csd(struct mmc_card *card);
36int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd); 35int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd);
@@ -42,9 +41,7 @@ int __mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value,
42int mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value, 41int mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value,
43 unsigned int timeout_ms); 42 unsigned int timeout_ms);
44int mmc_stop_bkops(struct mmc_card *card); 43int mmc_stop_bkops(struct mmc_card *card);
45int mmc_read_bkops_status(struct mmc_card *card);
46void mmc_start_bkops(struct mmc_card *card, bool from_exception); 44void mmc_start_bkops(struct mmc_card *card, bool from_exception);
47int mmc_can_reset(struct mmc_card *card);
48int mmc_flush_cache(struct mmc_card *card); 45int mmc_flush_cache(struct mmc_card *card);
49int mmc_cmdq_enable(struct mmc_card *card); 46int mmc_cmdq_enable(struct mmc_card *card);
50int mmc_cmdq_disable(struct mmc_card *card); 47int mmc_cmdq_disable(struct mmc_card *card);
diff --git a/drivers/mmc/core/mmc_test.c b/drivers/mmc/core/mmc_test.c
index fd1b4b8510b9..7a304a6e5bf1 100644
--- a/drivers/mmc/core/mmc_test.c
+++ b/drivers/mmc/core/mmc_test.c
@@ -3220,8 +3220,6 @@ static int __mmc_test_register_dbgfs_file(struct mmc_card *card,
3220 df = kmalloc(sizeof(*df), GFP_KERNEL); 3220 df = kmalloc(sizeof(*df), GFP_KERNEL);
3221 if (!df) { 3221 if (!df) {
3222 debugfs_remove(file); 3222 debugfs_remove(file);
3223 dev_err(&card->dev,
3224 "Can't allocate memory for internal usage.\n");
3225 return -ENOMEM; 3223 return -ENOMEM;
3226 } 3224 }
3227 3225
diff --git a/drivers/mmc/core/pwrseq.c b/drivers/mmc/core/pwrseq.c
index 9386c4771814..e3ad30fa8307 100644
--- a/drivers/mmc/core/pwrseq.c
+++ b/drivers/mmc/core/pwrseq.c
@@ -76,6 +76,14 @@ void mmc_pwrseq_power_off(struct mmc_host *host)
76 pwrseq->ops->power_off(host); 76 pwrseq->ops->power_off(host);
77} 77}
78 78
79void mmc_pwrseq_reset(struct mmc_host *host)
80{
81 struct mmc_pwrseq *pwrseq = host->pwrseq;
82
83 if (pwrseq && pwrseq->ops->reset)
84 pwrseq->ops->reset(host);
85}
86
79void mmc_pwrseq_free(struct mmc_host *host) 87void mmc_pwrseq_free(struct mmc_host *host)
80{ 88{
81 struct mmc_pwrseq *pwrseq = host->pwrseq; 89 struct mmc_pwrseq *pwrseq = host->pwrseq;
diff --git a/drivers/mmc/core/pwrseq.h b/drivers/mmc/core/pwrseq.h
index 39c911aa6ebb..819386f4ec61 100644
--- a/drivers/mmc/core/pwrseq.h
+++ b/drivers/mmc/core/pwrseq.h
@@ -18,6 +18,7 @@ struct mmc_pwrseq_ops {
18 void (*pre_power_on)(struct mmc_host *host); 18 void (*pre_power_on)(struct mmc_host *host);
19 void (*post_power_on)(struct mmc_host *host); 19 void (*post_power_on)(struct mmc_host *host);
20 void (*power_off)(struct mmc_host *host); 20 void (*power_off)(struct mmc_host *host);
21 void (*reset)(struct mmc_host *host);
21}; 22};
22 23
23struct mmc_pwrseq { 24struct mmc_pwrseq {
@@ -36,6 +37,7 @@ int mmc_pwrseq_alloc(struct mmc_host *host);
36void mmc_pwrseq_pre_power_on(struct mmc_host *host); 37void mmc_pwrseq_pre_power_on(struct mmc_host *host);
37void mmc_pwrseq_post_power_on(struct mmc_host *host); 38void mmc_pwrseq_post_power_on(struct mmc_host *host);
38void mmc_pwrseq_power_off(struct mmc_host *host); 39void mmc_pwrseq_power_off(struct mmc_host *host);
40void mmc_pwrseq_reset(struct mmc_host *host);
39void mmc_pwrseq_free(struct mmc_host *host); 41void mmc_pwrseq_free(struct mmc_host *host);
40 42
41#else 43#else
@@ -49,6 +51,7 @@ static inline int mmc_pwrseq_alloc(struct mmc_host *host) { return 0; }
49static inline void mmc_pwrseq_pre_power_on(struct mmc_host *host) {} 51static inline void mmc_pwrseq_pre_power_on(struct mmc_host *host) {}
50static inline void mmc_pwrseq_post_power_on(struct mmc_host *host) {} 52static inline void mmc_pwrseq_post_power_on(struct mmc_host *host) {}
51static inline void mmc_pwrseq_power_off(struct mmc_host *host) {} 53static inline void mmc_pwrseq_power_off(struct mmc_host *host) {}
54static inline void mmc_pwrseq_reset(struct mmc_host *host) {}
52static inline void mmc_pwrseq_free(struct mmc_host *host) {} 55static inline void mmc_pwrseq_free(struct mmc_host *host) {}
53 56
54#endif 57#endif
diff --git a/drivers/mmc/core/pwrseq_emmc.c b/drivers/mmc/core/pwrseq_emmc.c
index adc9c0c614fb..efb8a7965dd4 100644
--- a/drivers/mmc/core/pwrseq_emmc.c
+++ b/drivers/mmc/core/pwrseq_emmc.c
@@ -56,7 +56,7 @@ static int mmc_pwrseq_emmc_reset_nb(struct notifier_block *this,
56} 56}
57 57
58static const struct mmc_pwrseq_ops mmc_pwrseq_emmc_ops = { 58static const struct mmc_pwrseq_ops mmc_pwrseq_emmc_ops = {
59 .post_power_on = mmc_pwrseq_emmc_reset, 59 .reset = mmc_pwrseq_emmc_reset,
60}; 60};
61 61
62static int mmc_pwrseq_emmc_probe(struct platform_device *pdev) 62static int mmc_pwrseq_emmc_probe(struct platform_device *pdev)
diff --git a/drivers/mmc/core/queue.c b/drivers/mmc/core/queue.c
index b659a28c8018..affa7370ba82 100644
--- a/drivers/mmc/core/queue.c
+++ b/drivers/mmc/core/queue.c
@@ -40,35 +40,6 @@ static int mmc_prep_request(struct request_queue *q, struct request *req)
40 return BLKPREP_OK; 40 return BLKPREP_OK;
41} 41}
42 42
43struct mmc_queue_req *mmc_queue_req_find(struct mmc_queue *mq,
44 struct request *req)
45{
46 struct mmc_queue_req *mqrq;
47 int i = ffz(mq->qslots);
48
49 if (i >= mq->qdepth)
50 return NULL;
51
52 mqrq = &mq->mqrq[i];
53 WARN_ON(mqrq->req || mq->qcnt >= mq->qdepth ||
54 test_bit(mqrq->task_id, &mq->qslots));
55 mqrq->req = req;
56 mq->qcnt += 1;
57 __set_bit(mqrq->task_id, &mq->qslots);
58
59 return mqrq;
60}
61
62void mmc_queue_req_free(struct mmc_queue *mq,
63 struct mmc_queue_req *mqrq)
64{
65 WARN_ON(!mqrq->req || mq->qcnt < 1 ||
66 !test_bit(mqrq->task_id, &mq->qslots));
67 mqrq->req = NULL;
68 mq->qcnt -= 1;
69 __clear_bit(mqrq->task_id, &mq->qslots);
70}
71
72static int mmc_queue_thread(void *d) 43static int mmc_queue_thread(void *d)
73{ 44{
74 struct mmc_queue *mq = d; 45 struct mmc_queue *mq = d;
@@ -149,11 +120,11 @@ static void mmc_request_fn(struct request_queue *q)
149 wake_up_process(mq->thread); 120 wake_up_process(mq->thread);
150} 121}
151 122
152static struct scatterlist *mmc_alloc_sg(int sg_len) 123static struct scatterlist *mmc_alloc_sg(int sg_len, gfp_t gfp)
153{ 124{
154 struct scatterlist *sg; 125 struct scatterlist *sg;
155 126
156 sg = kmalloc_array(sg_len, sizeof(*sg), GFP_KERNEL); 127 sg = kmalloc_array(sg_len, sizeof(*sg), gfp);
157 if (sg) 128 if (sg)
158 sg_init_table(sg, sg_len); 129 sg_init_table(sg, sg_len);
159 130
@@ -179,86 +150,11 @@ static void mmc_queue_setup_discard(struct request_queue *q,
179 queue_flag_set_unlocked(QUEUE_FLAG_SECERASE, q); 150 queue_flag_set_unlocked(QUEUE_FLAG_SECERASE, q);
180} 151}
181 152
182static void mmc_queue_req_free_bufs(struct mmc_queue_req *mqrq)
183{
184 kfree(mqrq->bounce_sg);
185 mqrq->bounce_sg = NULL;
186
187 kfree(mqrq->sg);
188 mqrq->sg = NULL;
189
190 kfree(mqrq->bounce_buf);
191 mqrq->bounce_buf = NULL;
192}
193
194static void mmc_queue_reqs_free_bufs(struct mmc_queue_req *mqrq, int qdepth)
195{
196 int i;
197
198 for (i = 0; i < qdepth; i++)
199 mmc_queue_req_free_bufs(&mqrq[i]);
200}
201
202static void mmc_queue_free_mqrqs(struct mmc_queue_req *mqrq, int qdepth)
203{
204 mmc_queue_reqs_free_bufs(mqrq, qdepth);
205 kfree(mqrq);
206}
207
208static struct mmc_queue_req *mmc_queue_alloc_mqrqs(int qdepth)
209{
210 struct mmc_queue_req *mqrq;
211 int i;
212
213 mqrq = kcalloc(qdepth, sizeof(*mqrq), GFP_KERNEL);
214 if (mqrq) {
215 for (i = 0; i < qdepth; i++)
216 mqrq[i].task_id = i;
217 }
218
219 return mqrq;
220}
221
222#ifdef CONFIG_MMC_BLOCK_BOUNCE
223static int mmc_queue_alloc_bounce_bufs(struct mmc_queue_req *mqrq, int qdepth,
224 unsigned int bouncesz)
225{
226 int i;
227
228 for (i = 0; i < qdepth; i++) {
229 mqrq[i].bounce_buf = kmalloc(bouncesz, GFP_KERNEL);
230 if (!mqrq[i].bounce_buf)
231 return -ENOMEM;
232
233 mqrq[i].sg = mmc_alloc_sg(1);
234 if (!mqrq[i].sg)
235 return -ENOMEM;
236
237 mqrq[i].bounce_sg = mmc_alloc_sg(bouncesz / 512);
238 if (!mqrq[i].bounce_sg)
239 return -ENOMEM;
240 }
241
242 return 0;
243}
244
245static bool mmc_queue_alloc_bounce(struct mmc_queue_req *mqrq, int qdepth,
246 unsigned int bouncesz)
247{
248 int ret;
249
250 ret = mmc_queue_alloc_bounce_bufs(mqrq, qdepth, bouncesz);
251 if (ret)
252 mmc_queue_reqs_free_bufs(mqrq, qdepth);
253
254 return !ret;
255}
256
257static unsigned int mmc_queue_calc_bouncesz(struct mmc_host *host) 153static unsigned int mmc_queue_calc_bouncesz(struct mmc_host *host)
258{ 154{
259 unsigned int bouncesz = MMC_QUEUE_BOUNCESZ; 155 unsigned int bouncesz = MMC_QUEUE_BOUNCESZ;
260 156
261 if (host->max_segs != 1) 157 if (host->max_segs != 1 || (host->caps & MMC_CAP_NO_BOUNCE_BUFF))
262 return 0; 158 return 0;
263 159
264 if (bouncesz > host->max_req_size) 160 if (bouncesz > host->max_req_size)
@@ -273,84 +169,58 @@ static unsigned int mmc_queue_calc_bouncesz(struct mmc_host *host)
273 169
274 return bouncesz; 170 return bouncesz;
275} 171}
276#else
277static inline bool mmc_queue_alloc_bounce(struct mmc_queue_req *mqrq,
278 int qdepth, unsigned int bouncesz)
279{
280 return false;
281}
282 172
283static unsigned int mmc_queue_calc_bouncesz(struct mmc_host *host) 173/**
284{ 174 * mmc_init_request() - initialize the MMC-specific per-request data
285 return 0; 175 * @q: the request queue
286} 176 * @req: the request
287#endif 177 * @gfp: memory allocation policy
288 178 */
289static int mmc_queue_alloc_sgs(struct mmc_queue_req *mqrq, int qdepth, 179static int mmc_init_request(struct request_queue *q, struct request *req,
290 int max_segs) 180 gfp_t gfp)
291{ 181{
292 int i; 182 struct mmc_queue_req *mq_rq = req_to_mmc_queue_req(req);
183 struct mmc_queue *mq = q->queuedata;
184 struct mmc_card *card = mq->card;
185 struct mmc_host *host = card->host;
293 186
294 for (i = 0; i < qdepth; i++) { 187 if (card->bouncesz) {
295 mqrq[i].sg = mmc_alloc_sg(max_segs); 188 mq_rq->bounce_buf = kmalloc(card->bouncesz, gfp);
296 if (!mqrq[i].sg) 189 if (!mq_rq->bounce_buf)
190 return -ENOMEM;
191 if (card->bouncesz > 512) {
192 mq_rq->sg = mmc_alloc_sg(1, gfp);
193 if (!mq_rq->sg)
194 return -ENOMEM;
195 mq_rq->bounce_sg = mmc_alloc_sg(card->bouncesz / 512,
196 gfp);
197 if (!mq_rq->bounce_sg)
198 return -ENOMEM;
199 }
200 } else {
201 mq_rq->bounce_buf = NULL;
202 mq_rq->bounce_sg = NULL;
203 mq_rq->sg = mmc_alloc_sg(host->max_segs, gfp);
204 if (!mq_rq->sg)
297 return -ENOMEM; 205 return -ENOMEM;
298 } 206 }
299 207
300 return 0; 208 return 0;
301} 209}
302 210
303void mmc_queue_free_shared_queue(struct mmc_card *card) 211static void mmc_exit_request(struct request_queue *q, struct request *req)
304{ 212{
305 if (card->mqrq) { 213 struct mmc_queue_req *mq_rq = req_to_mmc_queue_req(req);
306 mmc_queue_free_mqrqs(card->mqrq, card->qdepth);
307 card->mqrq = NULL;
308 }
309}
310
311static int __mmc_queue_alloc_shared_queue(struct mmc_card *card, int qdepth)
312{
313 struct mmc_host *host = card->host;
314 struct mmc_queue_req *mqrq;
315 unsigned int bouncesz;
316 int ret = 0;
317
318 if (card->mqrq)
319 return -EINVAL;
320 214
321 mqrq = mmc_queue_alloc_mqrqs(qdepth); 215 /* It is OK to kfree(NULL) so this will be smooth */
322 if (!mqrq) 216 kfree(mq_rq->bounce_sg);
323 return -ENOMEM; 217 mq_rq->bounce_sg = NULL;
324
325 card->mqrq = mqrq;
326 card->qdepth = qdepth;
327
328 bouncesz = mmc_queue_calc_bouncesz(host);
329
330 if (bouncesz && !mmc_queue_alloc_bounce(mqrq, qdepth, bouncesz)) {
331 bouncesz = 0;
332 pr_warn("%s: unable to allocate bounce buffers\n",
333 mmc_card_name(card));
334 }
335 218
336 card->bouncesz = bouncesz; 219 kfree(mq_rq->bounce_buf);
220 mq_rq->bounce_buf = NULL;
337 221
338 if (!bouncesz) { 222 kfree(mq_rq->sg);
339 ret = mmc_queue_alloc_sgs(mqrq, qdepth, host->max_segs); 223 mq_rq->sg = NULL;
340 if (ret)
341 goto out_err;
342 }
343
344 return ret;
345
346out_err:
347 mmc_queue_free_shared_queue(card);
348 return ret;
349}
350
351int mmc_queue_alloc_shared_queue(struct mmc_card *card)
352{
353 return __mmc_queue_alloc_shared_queue(card, 2);
354} 224}
355 225
356/** 226/**
@@ -373,13 +243,21 @@ int mmc_init_queue(struct mmc_queue *mq, struct mmc_card *card,
373 limit = (u64)dma_max_pfn(mmc_dev(host)) << PAGE_SHIFT; 243 limit = (u64)dma_max_pfn(mmc_dev(host)) << PAGE_SHIFT;
374 244
375 mq->card = card; 245 mq->card = card;
376 mq->queue = blk_init_queue(mmc_request_fn, lock); 246 mq->queue = blk_alloc_queue(GFP_KERNEL);
377 if (!mq->queue) 247 if (!mq->queue)
378 return -ENOMEM; 248 return -ENOMEM;
379 249 mq->queue->queue_lock = lock;
380 mq->mqrq = card->mqrq; 250 mq->queue->request_fn = mmc_request_fn;
381 mq->qdepth = card->qdepth; 251 mq->queue->init_rq_fn = mmc_init_request;
252 mq->queue->exit_rq_fn = mmc_exit_request;
253 mq->queue->cmd_size = sizeof(struct mmc_queue_req);
382 mq->queue->queuedata = mq; 254 mq->queue->queuedata = mq;
255 mq->qcnt = 0;
256 ret = blk_init_allocated_queue(mq->queue);
257 if (ret) {
258 blk_cleanup_queue(mq->queue);
259 return ret;
260 }
383 261
384 blk_queue_prep_rq(mq->queue, mmc_prep_request); 262 blk_queue_prep_rq(mq->queue, mmc_prep_request);
385 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, mq->queue); 263 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, mq->queue);
@@ -387,6 +265,7 @@ int mmc_init_queue(struct mmc_queue *mq, struct mmc_card *card,
387 if (mmc_can_erase(card)) 265 if (mmc_can_erase(card))
388 mmc_queue_setup_discard(mq->queue, card); 266 mmc_queue_setup_discard(mq->queue, card);
389 267
268 card->bouncesz = mmc_queue_calc_bouncesz(host);
390 if (card->bouncesz) { 269 if (card->bouncesz) {
391 blk_queue_max_hw_sectors(mq->queue, card->bouncesz / 512); 270 blk_queue_max_hw_sectors(mq->queue, card->bouncesz / 512);
392 blk_queue_max_segments(mq->queue, card->bouncesz / 512); 271 blk_queue_max_segments(mq->queue, card->bouncesz / 512);
@@ -412,7 +291,6 @@ int mmc_init_queue(struct mmc_queue *mq, struct mmc_card *card,
412 return 0; 291 return 0;
413 292
414cleanup_queue: 293cleanup_queue:
415 mq->mqrq = NULL;
416 blk_cleanup_queue(mq->queue); 294 blk_cleanup_queue(mq->queue);
417 return ret; 295 return ret;
418} 296}
@@ -434,7 +312,6 @@ void mmc_cleanup_queue(struct mmc_queue *mq)
434 blk_start_queue(q); 312 blk_start_queue(q);
435 spin_unlock_irqrestore(q->queue_lock, flags); 313 spin_unlock_irqrestore(q->queue_lock, flags);
436 314
437 mq->mqrq = NULL;
438 mq->card = NULL; 315 mq->card = NULL;
439} 316}
440EXPORT_SYMBOL(mmc_cleanup_queue); 317EXPORT_SYMBOL(mmc_cleanup_queue);
@@ -491,12 +368,13 @@ unsigned int mmc_queue_map_sg(struct mmc_queue *mq, struct mmc_queue_req *mqrq)
491 unsigned int sg_len; 368 unsigned int sg_len;
492 size_t buflen; 369 size_t buflen;
493 struct scatterlist *sg; 370 struct scatterlist *sg;
371 struct request *req = mmc_queue_req_to_req(mqrq);
494 int i; 372 int i;
495 373
496 if (!mqrq->bounce_buf) 374 if (!mqrq->bounce_buf)
497 return blk_rq_map_sg(mq->queue, mqrq->req, mqrq->sg); 375 return blk_rq_map_sg(mq->queue, req, mqrq->sg);
498 376
499 sg_len = blk_rq_map_sg(mq->queue, mqrq->req, mqrq->bounce_sg); 377 sg_len = blk_rq_map_sg(mq->queue, req, mqrq->bounce_sg);
500 378
501 mqrq->bounce_sg_len = sg_len; 379 mqrq->bounce_sg_len = sg_len;
502 380
@@ -518,7 +396,7 @@ void mmc_queue_bounce_pre(struct mmc_queue_req *mqrq)
518 if (!mqrq->bounce_buf) 396 if (!mqrq->bounce_buf)
519 return; 397 return;
520 398
521 if (rq_data_dir(mqrq->req) != WRITE) 399 if (rq_data_dir(mmc_queue_req_to_req(mqrq)) != WRITE)
522 return; 400 return;
523 401
524 sg_copy_to_buffer(mqrq->bounce_sg, mqrq->bounce_sg_len, 402 sg_copy_to_buffer(mqrq->bounce_sg, mqrq->bounce_sg_len,
@@ -534,7 +412,7 @@ void mmc_queue_bounce_post(struct mmc_queue_req *mqrq)
534 if (!mqrq->bounce_buf) 412 if (!mqrq->bounce_buf)
535 return; 413 return;
536 414
537 if (rq_data_dir(mqrq->req) != READ) 415 if (rq_data_dir(mmc_queue_req_to_req(mqrq)) != READ)
538 return; 416 return;
539 417
540 sg_copy_from_buffer(mqrq->bounce_sg, mqrq->bounce_sg_len, 418 sg_copy_from_buffer(mqrq->bounce_sg, mqrq->bounce_sg_len,
diff --git a/drivers/mmc/core/queue.h b/drivers/mmc/core/queue.h
index 871796c3f406..361b46408e0f 100644
--- a/drivers/mmc/core/queue.h
+++ b/drivers/mmc/core/queue.h
@@ -3,19 +3,25 @@
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <linux/blkdev.h> 5#include <linux/blkdev.h>
6#include <linux/blk-mq.h>
6#include <linux/mmc/core.h> 7#include <linux/mmc/core.h>
7#include <linux/mmc/host.h> 8#include <linux/mmc/host.h>
8 9
9static inline bool mmc_req_is_special(struct request *req) 10static inline struct mmc_queue_req *req_to_mmc_queue_req(struct request *rq)
10{ 11{
11 return req && 12 return blk_mq_rq_to_pdu(rq);
12 (req_op(req) == REQ_OP_FLUSH || 13}
13 req_op(req) == REQ_OP_DISCARD || 14
14 req_op(req) == REQ_OP_SECURE_ERASE); 15struct mmc_queue_req;
16
17static inline struct request *mmc_queue_req_to_req(struct mmc_queue_req *mqr)
18{
19 return blk_mq_rq_from_pdu(mqr);
15} 20}
16 21
17struct task_struct; 22struct task_struct;
18struct mmc_blk_data; 23struct mmc_blk_data;
24struct mmc_blk_ioc_data;
19 25
20struct mmc_blk_request { 26struct mmc_blk_request {
21 struct mmc_request mrq; 27 struct mmc_request mrq;
@@ -26,15 +32,27 @@ struct mmc_blk_request {
26 int retune_retry_done; 32 int retune_retry_done;
27}; 33};
28 34
35/**
36 * enum mmc_drv_op - enumerates the operations in the mmc_queue_req
37 * @MMC_DRV_OP_IOCTL: ioctl operation
38 * @MMC_DRV_OP_BOOT_WP: write protect boot partitions
39 */
40enum mmc_drv_op {
41 MMC_DRV_OP_IOCTL,
42 MMC_DRV_OP_BOOT_WP,
43};
44
29struct mmc_queue_req { 45struct mmc_queue_req {
30 struct request *req;
31 struct mmc_blk_request brq; 46 struct mmc_blk_request brq;
32 struct scatterlist *sg; 47 struct scatterlist *sg;
33 char *bounce_buf; 48 char *bounce_buf;
34 struct scatterlist *bounce_sg; 49 struct scatterlist *bounce_sg;
35 unsigned int bounce_sg_len; 50 unsigned int bounce_sg_len;
36 struct mmc_async_req areq; 51 struct mmc_async_req areq;
37 int task_id; 52 enum mmc_drv_op drv_op;
53 int drv_op_result;
54 struct mmc_blk_ioc_data **idata;
55 unsigned int ioc_count;
38}; 56};
39 57
40struct mmc_queue { 58struct mmc_queue {
@@ -45,14 +63,15 @@ struct mmc_queue {
45 bool asleep; 63 bool asleep;
46 struct mmc_blk_data *blkdata; 64 struct mmc_blk_data *blkdata;
47 struct request_queue *queue; 65 struct request_queue *queue;
48 struct mmc_queue_req *mqrq; 66 /*
49 int qdepth; 67 * FIXME: this counter is not a very reliable way of keeping
68 * track of how many requests that are ongoing. Switch to just
69 * letting the block core keep track of requests and per-request
70 * associated mmc_queue_req data.
71 */
50 int qcnt; 72 int qcnt;
51 unsigned long qslots;
52}; 73};
53 74
54extern int mmc_queue_alloc_shared_queue(struct mmc_card *card);
55extern void mmc_queue_free_shared_queue(struct mmc_card *card);
56extern int mmc_init_queue(struct mmc_queue *, struct mmc_card *, spinlock_t *, 75extern int mmc_init_queue(struct mmc_queue *, struct mmc_card *, spinlock_t *,
57 const char *); 76 const char *);
58extern void mmc_cleanup_queue(struct mmc_queue *); 77extern void mmc_cleanup_queue(struct mmc_queue *);
@@ -66,8 +85,4 @@ extern void mmc_queue_bounce_post(struct mmc_queue_req *);
66 85
67extern int mmc_access_rpmb(struct mmc_queue *); 86extern int mmc_access_rpmb(struct mmc_queue *);
68 87
69extern struct mmc_queue_req *mmc_queue_req_find(struct mmc_queue *,
70 struct request *);
71extern void mmc_queue_req_free(struct mmc_queue *, struct mmc_queue_req *);
72
73#endif 88#endif
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index d109634fbfce..a1b0aa14d5e3 100644
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -294,12 +294,8 @@ static int mmc_read_switch(struct mmc_card *card)
294 err = -EIO; 294 err = -EIO;
295 295
296 status = kmalloc(64, GFP_KERNEL); 296 status = kmalloc(64, GFP_KERNEL);
297 if (!status) { 297 if (!status)
298 pr_err("%s: could not allocate a buffer for "
299 "switch capabilities.\n",
300 mmc_hostname(card->host));
301 return -ENOMEM; 298 return -ENOMEM;
302 }
303 299
304 /* 300 /*
305 * Find out the card's support bits with a mode 0 operation. 301 * Find out the card's support bits with a mode 0 operation.
@@ -359,11 +355,8 @@ int mmc_sd_switch_hs(struct mmc_card *card)
359 return 0; 355 return 0;
360 356
361 status = kmalloc(64, GFP_KERNEL); 357 status = kmalloc(64, GFP_KERNEL);
362 if (!status) { 358 if (!status)
363 pr_err("%s: could not allocate a buffer for "
364 "switch capabilities.\n", mmc_hostname(card->host));
365 return -ENOMEM; 359 return -ENOMEM;
366 }
367 360
368 err = mmc_sd_switch(card, 1, 0, 1, status); 361 err = mmc_sd_switch(card, 1, 0, 1, status);
369 if (err) 362 if (err)
@@ -596,11 +589,8 @@ static int mmc_sd_init_uhs_card(struct mmc_card *card)
596 return 0; 589 return 0;
597 590
598 status = kmalloc(64, GFP_KERNEL); 591 status = kmalloc(64, GFP_KERNEL);
599 if (!status) { 592 if (!status)
600 pr_err("%s: could not allocate a buffer for "
601 "switch capabilities.\n", mmc_hostname(card->host));
602 return -ENOMEM; 593 return -ENOMEM;
603 }
604 594
605 /* Set 4-bit bus width */ 595 /* Set 4-bit bus width */
606 if ((card->host->caps & MMC_CAP_4_BIT_DATA) && 596 if ((card->host->caps & MMC_CAP_4_BIT_DATA) &&
@@ -798,11 +788,7 @@ try_again:
798 } 788 }
799 } 789 }
800 790
801 if (mmc_host_is_spi(host)) 791 err = mmc_send_cid(host, cid);
802 err = mmc_send_cid(host, cid);
803 else
804 err = mmc_all_send_cid(host, cid);
805
806 return err; 792 return err;
807} 793}
808 794
diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c
index fae732c870a9..cc43687ca241 100644
--- a/drivers/mmc/core/sdio.c
+++ b/drivers/mmc/core/sdio.c
@@ -1104,6 +1104,12 @@ int mmc_attach_sdio(struct mmc_host *host)
1104 */ 1104 */
1105 if (host->caps & MMC_CAP_POWER_OFF_CARD) { 1105 if (host->caps & MMC_CAP_POWER_OFF_CARD) {
1106 /* 1106 /*
1107 * Do not allow runtime suspend until after SDIO function
1108 * devices are added.
1109 */
1110 pm_runtime_get_noresume(&card->dev);
1111
1112 /*
1107 * Let runtime PM core know our card is active 1113 * Let runtime PM core know our card is active
1108 */ 1114 */
1109 err = pm_runtime_set_active(&card->dev); 1115 err = pm_runtime_set_active(&card->dev);
@@ -1155,19 +1161,23 @@ int mmc_attach_sdio(struct mmc_host *host)
1155 goto remove_added; 1161 goto remove_added;
1156 } 1162 }
1157 1163
1164 if (host->caps & MMC_CAP_POWER_OFF_CARD)
1165 pm_runtime_put(&card->dev);
1166
1158 mmc_claim_host(host); 1167 mmc_claim_host(host);
1159 return 0; 1168 return 0;
1160 1169
1161 1170
1162remove_added:
1163 /* Remove without lock if the device has been added. */
1164 mmc_sdio_remove(host);
1165 mmc_claim_host(host);
1166remove: 1171remove:
1167 /* And with lock if it hasn't been added. */
1168 mmc_release_host(host); 1172 mmc_release_host(host);
1169 if (host->card) 1173remove_added:
1170 mmc_sdio_remove(host); 1174 /*
1175 * The devices are being deleted so it is not necessary to disable
1176 * runtime PM. Similarly we also don't pm_runtime_put() the SDIO card
1177 * because it needs to be active to remove any function devices that
1178 * were probed, and after that it gets deleted.
1179 */
1180 mmc_sdio_remove(host);
1171 mmc_claim_host(host); 1181 mmc_claim_host(host);
1172err: 1182err:
1173 mmc_detach_bus(host); 1183 mmc_detach_bus(host);
diff --git a/drivers/mmc/core/sdio_irq.c b/drivers/mmc/core/sdio_irq.c
index 6d4b72080d51..c771843e4c15 100644
--- a/drivers/mmc/core/sdio_irq.c
+++ b/drivers/mmc/core/sdio_irq.c
@@ -95,12 +95,30 @@ static int process_sdio_pending_irqs(struct mmc_host *host)
95void sdio_run_irqs(struct mmc_host *host) 95void sdio_run_irqs(struct mmc_host *host)
96{ 96{
97 mmc_claim_host(host); 97 mmc_claim_host(host);
98 host->sdio_irq_pending = true; 98 if (host->sdio_irqs) {
99 process_sdio_pending_irqs(host); 99 host->sdio_irq_pending = true;
100 process_sdio_pending_irqs(host);
101 if (host->ops->ack_sdio_irq)
102 host->ops->ack_sdio_irq(host);
103 }
100 mmc_release_host(host); 104 mmc_release_host(host);
101} 105}
102EXPORT_SYMBOL_GPL(sdio_run_irqs); 106EXPORT_SYMBOL_GPL(sdio_run_irqs);
103 107
108void sdio_irq_work(struct work_struct *work)
109{
110 struct mmc_host *host =
111 container_of(work, struct mmc_host, sdio_irq_work.work);
112
113 sdio_run_irqs(host);
114}
115
116void sdio_signal_irq(struct mmc_host *host)
117{
118 queue_delayed_work(system_wq, &host->sdio_irq_work, 0);
119}
120EXPORT_SYMBOL_GPL(sdio_signal_irq);
121
104static int sdio_irq_thread(void *_host) 122static int sdio_irq_thread(void *_host)
105{ 123{
106 struct mmc_host *host = _host; 124 struct mmc_host *host = _host;
diff --git a/drivers/mmc/core/sdio_ops.h b/drivers/mmc/core/sdio_ops.h
index ee35cb4d170e..96945cafbf0b 100644
--- a/drivers/mmc/core/sdio_ops.h
+++ b/drivers/mmc/core/sdio_ops.h
@@ -17,6 +17,7 @@
17 17
18struct mmc_host; 18struct mmc_host;
19struct mmc_card; 19struct mmc_card;
20struct work_struct;
20 21
21int mmc_send_io_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr); 22int mmc_send_io_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr);
22int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn, 23int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
@@ -25,6 +26,7 @@ int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
25 unsigned addr, int incr_addr, u8 *buf, unsigned blocks, unsigned blksz); 26 unsigned addr, int incr_addr, u8 *buf, unsigned blocks, unsigned blksz);
26int sdio_reset(struct mmc_host *host); 27int sdio_reset(struct mmc_host *host);
27unsigned int mmc_align_data_size(struct mmc_card *card, unsigned int sz); 28unsigned int mmc_align_data_size(struct mmc_card *card, unsigned int sz);
29void sdio_irq_work(struct work_struct *work);
28 30
29static inline bool sdio_is_io_busy(u32 opcode, u32 arg) 31static inline bool sdio_is_io_busy(u32 opcode, u32 arg)
30{ 32{
diff --git a/drivers/mmc/core/slot-gpio.c b/drivers/mmc/core/slot-gpio.c
index a8450a8701e4..863f1dbbfc1b 100644
--- a/drivers/mmc/core/slot-gpio.c
+++ b/drivers/mmc/core/slot-gpio.c
@@ -151,6 +151,8 @@ void mmc_gpiod_request_cd_irq(struct mmc_host *host)
151 151
152 if (irq < 0) 152 if (irq < 0)
153 host->caps |= MMC_CAP_NEEDS_POLL; 153 host->caps |= MMC_CAP_NEEDS_POLL;
154 else if ((host->caps & MMC_CAP_CD_WAKE) && !enable_irq_wake(irq))
155 host->slot.cd_wake_enabled = true;
154} 156}
155EXPORT_SYMBOL(mmc_gpiod_request_cd_irq); 157EXPORT_SYMBOL(mmc_gpiod_request_cd_irq);
156 158
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 2db84dd664d7..5755b69f2f72 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -408,11 +408,11 @@ config MMC_AU1X
408 408
409config MMC_ATMELMCI 409config MMC_ATMELMCI
410 tristate "Atmel SD/MMC Driver (Multimedia Card Interface)" 410 tristate "Atmel SD/MMC Driver (Multimedia Card Interface)"
411 depends on AVR32 || ARCH_AT91 411 depends on ARCH_AT91
412 help 412 help
413 This selects the Atmel Multimedia Card Interface driver. If 413 This selects the Atmel Multimedia Card Interface driver.
414 you have an AT32 (AVR32) or AT91 platform with a Multimedia 414 If you have an AT91 platform with a Multimedia Card slot,
415 Card slot, say Y or M here. 415 say Y or M here.
416 416
417 If unsure, say N. 417 If unsure, say N.
418 418
@@ -571,13 +571,13 @@ config MMC_TMIO
571 T7L66XB and also HTC ASIC3 571 T7L66XB and also HTC ASIC3
572 572
573config MMC_SDHI 573config MMC_SDHI
574 tristate "SH-Mobile SDHI SD/SDIO controller support" 574 tristate "Renesas SDHI SD/SDIO controller support"
575 depends on SUPERH || ARM || ARM64 575 depends on SUPERH || ARM || ARM64
576 depends on SUPERH || ARCH_RENESAS || COMPILE_TEST 576 depends on SUPERH || ARCH_RENESAS || COMPILE_TEST
577 select MMC_TMIO_CORE 577 select MMC_TMIO_CORE
578 help 578 help
579 This provides support for the SDHI SD/SDIO controller found in 579 This provides support for the SDHI SD/SDIO controller found in
580 SuperH and ARM SH-Mobile SoCs 580 Renesas SuperH, ARM and ARM64 based SoCs
581 581
582config MMC_CB710 582config MMC_CB710
583 tristate "ENE CB710 MMC/SD Interface support" 583 tristate "ENE CB710 MMC/SD Interface support"
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 926347c2eeb4..4d4547116311 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -36,9 +36,7 @@ obj-$(CONFIG_MMC_S3C) += s3cmci.o
36obj-$(CONFIG_MMC_SDRICOH_CS) += sdricoh_cs.o 36obj-$(CONFIG_MMC_SDRICOH_CS) += sdricoh_cs.o
37obj-$(CONFIG_MMC_TMIO) += tmio_mmc.o 37obj-$(CONFIG_MMC_TMIO) += tmio_mmc.o
38obj-$(CONFIG_MMC_TMIO_CORE) += tmio_mmc_core.o 38obj-$(CONFIG_MMC_TMIO_CORE) += tmio_mmc_core.o
39tmio_mmc_core-y := tmio_mmc_pio.o 39obj-$(CONFIG_MMC_SDHI) += renesas_sdhi_core.o renesas_sdhi_sys_dmac.o
40tmio_mmc_core-$(subst m,y,$(CONFIG_MMC_SDHI)) += tmio_mmc_dma.o
41obj-$(CONFIG_MMC_SDHI) += sh_mobile_sdhi.o
42obj-$(CONFIG_MMC_CB710) += cb710-mmc.o 40obj-$(CONFIG_MMC_CB710) += cb710-mmc.o
43obj-$(CONFIG_MMC_VIA_SDMMC) += via-sdmmc.o 41obj-$(CONFIG_MMC_VIA_SDMMC) += via-sdmmc.o
44obj-$(CONFIG_SDH_BFIN) += bfin_sdh.o 42obj-$(CONFIG_SDH_BFIN) += bfin_sdh.o
diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
index 388e4a3f13e6..97de2d32ba84 100644
--- a/drivers/mmc/host/atmel-mci.c
+++ b/drivers/mmc/host/atmel-mci.c
@@ -44,7 +44,7 @@
44#include <asm/unaligned.h> 44#include <asm/unaligned.h>
45 45
46/* 46/*
47 * Superset of MCI IP registers integrated in Atmel AVR32 and AT91 Processors 47 * Superset of MCI IP registers integrated in Atmel AT91 Processor
48 * Registers and bitfields marked with [2] are only available in MCI2 48 * Registers and bitfields marked with [2] are only available in MCI2
49 */ 49 */
50 50
@@ -172,13 +172,6 @@
172#define atmci_writel(port, reg, value) \ 172#define atmci_writel(port, reg, value) \
173 __raw_writel((value), (port)->regs + reg) 173 __raw_writel((value), (port)->regs + reg)
174 174
175/* On AVR chips the Peripheral DMA Controller is not connected to MCI. */
176#ifdef CONFIG_AVR32
177# define ATMCI_PDC_CONNECTED 0
178#else
179# define ATMCI_PDC_CONNECTED 1
180#endif
181
182#define AUTOSUSPEND_DELAY 50 175#define AUTOSUSPEND_DELAY 50
183 176
184#define ATMCI_DATA_ERROR_FLAGS (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE) 177#define ATMCI_DATA_ERROR_FLAGS (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE)
@@ -667,10 +660,8 @@ atmci_of_init(struct platform_device *pdev)
667 } 660 }
668 661
669 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 662 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
670 if (!pdata) { 663 if (!pdata)
671 dev_err(&pdev->dev, "could not allocate memory for pdata\n");
672 return ERR_PTR(-ENOMEM); 664 return ERR_PTR(-ENOMEM);
673 }
674 665
675 for_each_child_of_node(np, cnp) { 666 for_each_child_of_node(np, cnp) {
676 if (of_property_read_u32(cnp, "reg", &slot_id)) { 667 if (of_property_read_u32(cnp, "reg", &slot_id)) {
@@ -1549,21 +1540,8 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1549 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); 1540 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd);
1550 break; 1541 break;
1551 default: 1542 default:
1552 /*
1553 * TODO: None of the currently available AVR32-based
1554 * boards allow MMC power to be turned off. Implement
1555 * power control when this can be tested properly.
1556 *
1557 * We also need to hook this into the clock management
1558 * somehow so that newly inserted cards aren't
1559 * subjected to a fast clock before we have a chance
1560 * to figure out what the maximum rate is. Currently,
1561 * there's no way to avoid this, and there never will
1562 * be for boards that don't support power control.
1563 */
1564 break; 1543 break;
1565 } 1544 }
1566
1567} 1545}
1568 1546
1569static int atmci_get_ro(struct mmc_host *mmc) 1547static int atmci_get_ro(struct mmc_host *mmc)
@@ -2464,7 +2442,7 @@ static void atmci_get_cap(struct atmel_mci *host)
2464 "version: 0x%x\n", version); 2442 "version: 0x%x\n", version);
2465 2443
2466 host->caps.has_dma_conf_reg = 0; 2444 host->caps.has_dma_conf_reg = 0;
2467 host->caps.has_pdc = ATMCI_PDC_CONNECTED; 2445 host->caps.has_pdc = 1;
2468 host->caps.has_cfg_reg = 0; 2446 host->caps.has_cfg_reg = 0;
2469 host->caps.has_cstor_reg = 0; 2447 host->caps.has_cstor_reg = 0;
2470 host->caps.has_highspeed = 0; 2448 host->caps.has_highspeed = 0;
diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c
index 1f343a477b3d..abba9a2a78b8 100644
--- a/drivers/mmc/host/bcm2835.c
+++ b/drivers/mmc/host/bcm2835.c
@@ -1172,7 +1172,10 @@ static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq)
1172 if (mrq->data && !is_power_of_2(mrq->data->blksz)) { 1172 if (mrq->data && !is_power_of_2(mrq->data->blksz)) {
1173 dev_err(dev, "unsupported block size (%d bytes)\n", 1173 dev_err(dev, "unsupported block size (%d bytes)\n",
1174 mrq->data->blksz); 1174 mrq->data->blksz);
1175 mrq->cmd->error = -EINVAL; 1175
1176 if (mrq->cmd)
1177 mrq->cmd->error = -EINVAL;
1178
1176 mmc_request_done(mmc, mrq); 1179 mmc_request_done(mmc, mrq);
1177 return; 1180 return;
1178 } 1181 }
@@ -1194,7 +1197,10 @@ static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq)
1194 readl(host->ioaddr + SDCMD) & SDCMD_CMD_MASK, 1197 readl(host->ioaddr + SDCMD) & SDCMD_CMD_MASK,
1195 edm); 1198 edm);
1196 bcm2835_dumpregs(host); 1199 bcm2835_dumpregs(host);
1197 mrq->cmd->error = -EILSEQ; 1200
1201 if (mrq->cmd)
1202 mrq->cmd->error = -EILSEQ;
1203
1198 bcm2835_finish_request(host); 1204 bcm2835_finish_request(host);
1199 mutex_unlock(&host->mutex); 1205 mutex_unlock(&host->mutex);
1200 return; 1206 return;
@@ -1207,7 +1213,7 @@ static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq)
1207 if (!host->use_busy) 1213 if (!host->use_busy)
1208 bcm2835_finish_command(host); 1214 bcm2835_finish_command(host);
1209 } 1215 }
1210 } else if (bcm2835_send_command(host, mrq->cmd)) { 1216 } else if (mrq->cmd && bcm2835_send_command(host, mrq->cmd)) {
1211 if (host->data && host->dma_desc) { 1217 if (host->data && host->dma_desc) {
1212 /* DMA transfer starts now, PIO starts after irq */ 1218 /* DMA transfer starts now, PIO starts after irq */
1213 bcm2835_start_dma(host); 1219 bcm2835_start_dma(host);
diff --git a/drivers/mmc/host/cavium.c b/drivers/mmc/host/cavium.c
index b8aaf0fdb77c..3686d77c717b 100644
--- a/drivers/mmc/host/cavium.c
+++ b/drivers/mmc/host/cavium.c
@@ -1035,10 +1035,12 @@ int cvm_mmc_of_slot_probe(struct device *dev, struct cvm_mmc_host *host)
1035 * We only have a 3.3v supply, we cannot support any 1035 * We only have a 3.3v supply, we cannot support any
1036 * of the UHS modes. We do support the high speed DDR 1036 * of the UHS modes. We do support the high speed DDR
1037 * modes up to 52MHz. 1037 * modes up to 52MHz.
1038 *
1039 * Disable bounce buffers for max_segs = 1
1038 */ 1040 */
1039 mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 1041 mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
1040 MMC_CAP_ERASE | MMC_CAP_CMD23 | MMC_CAP_POWER_OFF_CARD | 1042 MMC_CAP_ERASE | MMC_CAP_CMD23 | MMC_CAP_POWER_OFF_CARD |
1041 MMC_CAP_3_3V_DDR; 1043 MMC_CAP_3_3V_DDR | MMC_CAP_NO_BOUNCE_BUFF;
1042 1044
1043 if (host->use_sg) 1045 if (host->use_sg)
1044 mmc->max_segs = 16; 1046 mmc->max_segs = 16;
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
index 25691cca1881..35026795be28 100644
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -157,8 +157,8 @@ static void dw_mci_exynos_set_clksel_timing(struct dw_mci *host, u32 timing)
157 * HOLD register should be bypassed in case there is no phase shift 157 * HOLD register should be bypassed in case there is no phase shift
158 * applied on CMD/DATA that is sent to the card. 158 * applied on CMD/DATA that is sent to the card.
159 */ 159 */
160 if (!SDMMC_CLKSEL_GET_DRV_WD3(clksel) && host->cur_slot) 160 if (!SDMMC_CLKSEL_GET_DRV_WD3(clksel) && host->slot)
161 set_bit(DW_MMC_CARD_NO_USE_HOLD, &host->cur_slot->flags); 161 set_bit(DW_MMC_CARD_NO_USE_HOLD, &host->slot->flags);
162} 162}
163 163
164#ifdef CONFIG_PM 164#ifdef CONFIG_PM
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index 372fb6e948c1..a3f1c2b30145 100644
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -25,6 +25,7 @@ struct dw_mci_rockchip_priv_data {
25 struct clk *drv_clk; 25 struct clk *drv_clk;
26 struct clk *sample_clk; 26 struct clk *sample_clk;
27 int default_sample_phase; 27 int default_sample_phase;
28 int num_phases;
28}; 29};
29 30
30static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) 31static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios)
@@ -133,8 +134,8 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios)
133 } 134 }
134} 135}
135 136
136#define NUM_PHASES 360 137#define TUNING_ITERATION_TO_PHASE(i, num_phases) \
137#define TUNING_ITERATION_TO_PHASE(i) (DIV_ROUND_UP((i) * 360, NUM_PHASES)) 138 (DIV_ROUND_UP((i) * 360, num_phases))
138 139
139static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) 140static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
140{ 141{
@@ -159,13 +160,15 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
159 return -EIO; 160 return -EIO;
160 } 161 }
161 162
162 ranges = kmalloc_array(NUM_PHASES / 2 + 1, sizeof(*ranges), GFP_KERNEL); 163 ranges = kmalloc_array(priv->num_phases / 2 + 1,
164 sizeof(*ranges), GFP_KERNEL);
163 if (!ranges) 165 if (!ranges)
164 return -ENOMEM; 166 return -ENOMEM;
165 167
166 /* Try each phase and extract good ranges */ 168 /* Try each phase and extract good ranges */
167 for (i = 0; i < NUM_PHASES; ) { 169 for (i = 0; i < priv->num_phases; ) {
168 clk_set_phase(priv->sample_clk, TUNING_ITERATION_TO_PHASE(i)); 170 clk_set_phase(priv->sample_clk,
171 TUNING_ITERATION_TO_PHASE(i, priv->num_phases));
169 172
170 v = !mmc_send_tuning(mmc, opcode, NULL); 173 v = !mmc_send_tuning(mmc, opcode, NULL);
171 174
@@ -179,7 +182,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
179 if (v) { 182 if (v) {
180 ranges[range_count-1].end = i; 183 ranges[range_count-1].end = i;
181 i++; 184 i++;
182 } else if (i == NUM_PHASES - 1) { 185 } else if (i == priv->num_phases - 1) {
183 /* No extra skipping rules if we're at the end */ 186 /* No extra skipping rules if we're at the end */
184 i++; 187 i++;
185 } else { 188 } else {
@@ -188,11 +191,11 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
188 * one since testing bad phases is slow. Skip 191 * one since testing bad phases is slow. Skip
189 * 20 degrees. 192 * 20 degrees.
190 */ 193 */
191 i += DIV_ROUND_UP(20 * NUM_PHASES, 360); 194 i += DIV_ROUND_UP(20 * priv->num_phases, 360);
192 195
193 /* Always test the last one */ 196 /* Always test the last one */
194 if (i >= NUM_PHASES) 197 if (i >= priv->num_phases)
195 i = NUM_PHASES - 1; 198 i = priv->num_phases - 1;
196 } 199 }
197 200
198 prev_v = v; 201 prev_v = v;
@@ -210,7 +213,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
210 range_count--; 213 range_count--;
211 } 214 }
212 215
213 if (ranges[0].start == 0 && ranges[0].end == NUM_PHASES - 1) { 216 if (ranges[0].start == 0 && ranges[0].end == priv->num_phases - 1) {
214 clk_set_phase(priv->sample_clk, priv->default_sample_phase); 217 clk_set_phase(priv->sample_clk, priv->default_sample_phase);
215 dev_info(host->dev, "All phases work, using default phase %d.", 218 dev_info(host->dev, "All phases work, using default phase %d.",
216 priv->default_sample_phase); 219 priv->default_sample_phase);
@@ -222,7 +225,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
222 int len = (ranges[i].end - ranges[i].start + 1); 225 int len = (ranges[i].end - ranges[i].start + 1);
223 226
224 if (len < 0) 227 if (len < 0)
225 len += NUM_PHASES; 228 len += priv->num_phases;
226 229
227 if (longest_range_len < len) { 230 if (longest_range_len < len) {
228 longest_range_len = len; 231 longest_range_len = len;
@@ -230,25 +233,30 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
230 } 233 }
231 234
232 dev_dbg(host->dev, "Good phase range %d-%d (%d len)\n", 235 dev_dbg(host->dev, "Good phase range %d-%d (%d len)\n",
233 TUNING_ITERATION_TO_PHASE(ranges[i].start), 236 TUNING_ITERATION_TO_PHASE(ranges[i].start,
234 TUNING_ITERATION_TO_PHASE(ranges[i].end), 237 priv->num_phases),
238 TUNING_ITERATION_TO_PHASE(ranges[i].end,
239 priv->num_phases),
235 len 240 len
236 ); 241 );
237 } 242 }
238 243
239 dev_dbg(host->dev, "Best phase range %d-%d (%d len)\n", 244 dev_dbg(host->dev, "Best phase range %d-%d (%d len)\n",
240 TUNING_ITERATION_TO_PHASE(ranges[longest_range].start), 245 TUNING_ITERATION_TO_PHASE(ranges[longest_range].start,
241 TUNING_ITERATION_TO_PHASE(ranges[longest_range].end), 246 priv->num_phases),
247 TUNING_ITERATION_TO_PHASE(ranges[longest_range].end,
248 priv->num_phases),
242 longest_range_len 249 longest_range_len
243 ); 250 );
244 251
245 middle_phase = ranges[longest_range].start + longest_range_len / 2; 252 middle_phase = ranges[longest_range].start + longest_range_len / 2;
246 middle_phase %= NUM_PHASES; 253 middle_phase %= priv->num_phases;
247 dev_info(host->dev, "Successfully tuned phase to %d\n", 254 dev_info(host->dev, "Successfully tuned phase to %d\n",
248 TUNING_ITERATION_TO_PHASE(middle_phase)); 255 TUNING_ITERATION_TO_PHASE(middle_phase, priv->num_phases));
249 256
250 clk_set_phase(priv->sample_clk, 257 clk_set_phase(priv->sample_clk,
251 TUNING_ITERATION_TO_PHASE(middle_phase)); 258 TUNING_ITERATION_TO_PHASE(middle_phase,
259 priv->num_phases));
252 260
253free: 261free:
254 kfree(ranges); 262 kfree(ranges);
@@ -264,6 +272,10 @@ static int dw_mci_rk3288_parse_dt(struct dw_mci *host)
264 if (!priv) 272 if (!priv)
265 return -ENOMEM; 273 return -ENOMEM;
266 274
275 if (of_property_read_u32(np, "rockchip,desired-num-phases",
276 &priv->num_phases))
277 priv->num_phases = 360;
278
267 if (of_property_read_u32(np, "rockchip,default-sample-phase", 279 if (of_property_read_u32(np, "rockchip,default-sample-phase",
268 &priv->default_sample_phase)) 280 &priv->default_sample_phase))
269 priv->default_sample_phase = 0; 281 priv->default_sample_phase = 0;
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index e45129f48174..a9dfb26972f2 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -392,7 +392,7 @@ static u32 dw_mci_prep_stop_abort(struct dw_mci *host, struct mmc_command *cmd)
392 cmdr = stop->opcode | SDMMC_CMD_STOP | 392 cmdr = stop->opcode | SDMMC_CMD_STOP |
393 SDMMC_CMD_RESP_CRC | SDMMC_CMD_RESP_EXP; 393 SDMMC_CMD_RESP_CRC | SDMMC_CMD_RESP_EXP;
394 394
395 if (!test_bit(DW_MMC_CARD_NO_USE_HOLD, &host->cur_slot->flags)) 395 if (!test_bit(DW_MMC_CARD_NO_USE_HOLD, &host->slot->flags))
396 cmdr |= SDMMC_CMD_USE_HOLD_REG; 396 cmdr |= SDMMC_CMD_USE_HOLD_REG;
397 397
398 return cmdr; 398 return cmdr;
@@ -480,7 +480,7 @@ static void dw_mci_dmac_complete_dma(void *arg)
480 if ((host->use_dma == TRANS_MODE_EDMAC) && 480 if ((host->use_dma == TRANS_MODE_EDMAC) &&
481 data && (data->flags & MMC_DATA_READ)) 481 data && (data->flags & MMC_DATA_READ))
482 /* Invalidate cache after read */ 482 /* Invalidate cache after read */
483 dma_sync_sg_for_cpu(mmc_dev(host->cur_slot->mmc), 483 dma_sync_sg_for_cpu(mmc_dev(host->slot->mmc),
484 data->sg, 484 data->sg,
485 data->sg_len, 485 data->sg_len,
486 DMA_FROM_DEVICE); 486 DMA_FROM_DEVICE);
@@ -820,7 +820,7 @@ static int dw_mci_edmac_start_dma(struct dw_mci *host,
820 820
821 /* Flush cache before write */ 821 /* Flush cache before write */
822 if (host->data->flags & MMC_DATA_WRITE) 822 if (host->data->flags & MMC_DATA_WRITE)
823 dma_sync_sg_for_device(mmc_dev(host->cur_slot->mmc), sgl, 823 dma_sync_sg_for_device(mmc_dev(host->slot->mmc), sgl,
824 sg_elems, DMA_TO_DEVICE); 824 sg_elems, DMA_TO_DEVICE);
825 825
826 dma_async_issue_pending(host->dms->ch); 826 dma_async_issue_pending(host->dms->ch);
@@ -1282,7 +1282,6 @@ static void __dw_mci_start_request(struct dw_mci *host,
1282 1282
1283 mrq = slot->mrq; 1283 mrq = slot->mrq;
1284 1284
1285 host->cur_slot = slot;
1286 host->mrq = mrq; 1285 host->mrq = mrq;
1287 1286
1288 host->pending_events = 0; 1287 host->pending_events = 0;
@@ -1621,16 +1620,10 @@ static void dw_mci_init_card(struct mmc_host *mmc, struct mmc_card *card)
1621 1620
1622 if (card->type == MMC_TYPE_SDIO || 1621 if (card->type == MMC_TYPE_SDIO ||
1623 card->type == MMC_TYPE_SD_COMBO) { 1622 card->type == MMC_TYPE_SD_COMBO) {
1624 if (!test_bit(DW_MMC_CARD_NO_LOW_PWR, &slot->flags)) { 1623 set_bit(DW_MMC_CARD_NO_LOW_PWR, &slot->flags);
1625 pm_runtime_get_noresume(mmc->parent);
1626 set_bit(DW_MMC_CARD_NO_LOW_PWR, &slot->flags);
1627 }
1628 clk_en_a = clk_en_a_old & ~clken_low_pwr; 1624 clk_en_a = clk_en_a_old & ~clken_low_pwr;
1629 } else { 1625 } else {
1630 if (test_bit(DW_MMC_CARD_NO_LOW_PWR, &slot->flags)) { 1626 clear_bit(DW_MMC_CARD_NO_LOW_PWR, &slot->flags);
1631 pm_runtime_put_noidle(mmc->parent);
1632 clear_bit(DW_MMC_CARD_NO_LOW_PWR, &slot->flags);
1633 }
1634 clk_en_a = clk_en_a_old | clken_low_pwr; 1627 clk_en_a = clk_en_a_old | clken_low_pwr;
1635 } 1628 }
1636 1629
@@ -1642,9 +1635,8 @@ static void dw_mci_init_card(struct mmc_host *mmc, struct mmc_card *card)
1642 } 1635 }
1643} 1636}
1644 1637
1645static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) 1638static void __dw_mci_enable_sdio_irq(struct dw_mci_slot *slot, int enb)
1646{ 1639{
1647 struct dw_mci_slot *slot = mmc_priv(mmc);
1648 struct dw_mci *host = slot->host; 1640 struct dw_mci *host = slot->host;
1649 unsigned long irqflags; 1641 unsigned long irqflags;
1650 u32 int_mask; 1642 u32 int_mask;
@@ -1662,6 +1654,27 @@ static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb)
1662 spin_unlock_irqrestore(&host->irq_lock, irqflags); 1654 spin_unlock_irqrestore(&host->irq_lock, irqflags);
1663} 1655}
1664 1656
1657static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb)
1658{
1659 struct dw_mci_slot *slot = mmc_priv(mmc);
1660 struct dw_mci *host = slot->host;
1661
1662 __dw_mci_enable_sdio_irq(slot, enb);
1663
1664 /* Avoid runtime suspending the device when SDIO IRQ is enabled */
1665 if (enb)
1666 pm_runtime_get_noresume(host->dev);
1667 else
1668 pm_runtime_put_noidle(host->dev);
1669}
1670
1671static void dw_mci_ack_sdio_irq(struct mmc_host *mmc)
1672{
1673 struct dw_mci_slot *slot = mmc_priv(mmc);
1674
1675 __dw_mci_enable_sdio_irq(slot, 1);
1676}
1677
1665static int dw_mci_execute_tuning(struct mmc_host *mmc, u32 opcode) 1678static int dw_mci_execute_tuning(struct mmc_host *mmc, u32 opcode)
1666{ 1679{
1667 struct dw_mci_slot *slot = mmc_priv(mmc); 1680 struct dw_mci_slot *slot = mmc_priv(mmc);
@@ -1749,7 +1762,7 @@ static bool dw_mci_reset(struct dw_mci *host)
1749 1762
1750ciu_out: 1763ciu_out:
1751 /* After a CTRL reset we need to have CIU set clock registers */ 1764 /* After a CTRL reset we need to have CIU set clock registers */
1752 mci_send_cmd(host->cur_slot, SDMMC_CMD_UPD_CLK, 0); 1765 mci_send_cmd(host->slot, SDMMC_CMD_UPD_CLK, 0);
1753 1766
1754 return ret; 1767 return ret;
1755} 1768}
@@ -1763,6 +1776,7 @@ static const struct mmc_host_ops dw_mci_ops = {
1763 .get_cd = dw_mci_get_cd, 1776 .get_cd = dw_mci_get_cd,
1764 .hw_reset = dw_mci_hw_reset, 1777 .hw_reset = dw_mci_hw_reset,
1765 .enable_sdio_irq = dw_mci_enable_sdio_irq, 1778 .enable_sdio_irq = dw_mci_enable_sdio_irq,
1779 .ack_sdio_irq = dw_mci_ack_sdio_irq,
1766 .execute_tuning = dw_mci_execute_tuning, 1780 .execute_tuning = dw_mci_execute_tuning,
1767 .card_busy = dw_mci_card_busy, 1781 .card_busy = dw_mci_card_busy,
1768 .start_signal_voltage_switch = dw_mci_switch_voltage, 1782 .start_signal_voltage_switch = dw_mci_switch_voltage,
@@ -1775,11 +1789,11 @@ static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq)
1775 __acquires(&host->lock) 1789 __acquires(&host->lock)
1776{ 1790{
1777 struct dw_mci_slot *slot; 1791 struct dw_mci_slot *slot;
1778 struct mmc_host *prev_mmc = host->cur_slot->mmc; 1792 struct mmc_host *prev_mmc = host->slot->mmc;
1779 1793
1780 WARN_ON(host->cmd || host->data); 1794 WARN_ON(host->cmd || host->data);
1781 1795
1782 host->cur_slot->mrq = NULL; 1796 host->slot->mrq = NULL;
1783 host->mrq = NULL; 1797 host->mrq = NULL;
1784 if (!list_empty(&host->queue)) { 1798 if (!list_empty(&host->queue)) {
1785 slot = list_entry(host->queue.next, 1799 slot = list_entry(host->queue.next,
@@ -1929,7 +1943,7 @@ static void dw_mci_tasklet_func(unsigned long priv)
1929 err = dw_mci_command_complete(host, cmd); 1943 err = dw_mci_command_complete(host, cmd);
1930 if (cmd == mrq->sbc && !err) { 1944 if (cmd == mrq->sbc && !err) {
1931 prev_state = state = STATE_SENDING_CMD; 1945 prev_state = state = STATE_SENDING_CMD;
1932 __dw_mci_start_request(host, host->cur_slot, 1946 __dw_mci_start_request(host, host->slot,
1933 mrq->cmd); 1947 mrq->cmd);
1934 goto unlock; 1948 goto unlock;
1935 } 1949 }
@@ -2548,26 +2562,19 @@ static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status)
2548 2562
2549static void dw_mci_handle_cd(struct dw_mci *host) 2563static void dw_mci_handle_cd(struct dw_mci *host)
2550{ 2564{
2551 int i; 2565 struct dw_mci_slot *slot = host->slot;
2552 2566
2553 for (i = 0; i < host->num_slots; i++) { 2567 if (slot->mmc->ops->card_event)
2554 struct dw_mci_slot *slot = host->slot[i]; 2568 slot->mmc->ops->card_event(slot->mmc);
2555 2569 mmc_detect_change(slot->mmc,
2556 if (!slot) 2570 msecs_to_jiffies(host->pdata->detect_delay_ms));
2557 continue;
2558
2559 if (slot->mmc->ops->card_event)
2560 slot->mmc->ops->card_event(slot->mmc);
2561 mmc_detect_change(slot->mmc,
2562 msecs_to_jiffies(host->pdata->detect_delay_ms));
2563 }
2564} 2571}
2565 2572
2566static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) 2573static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
2567{ 2574{
2568 struct dw_mci *host = dev_id; 2575 struct dw_mci *host = dev_id;
2569 u32 pending; 2576 u32 pending;
2570 int i; 2577 struct dw_mci_slot *slot = host->slot;
2571 2578
2572 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ 2579 pending = mci_readl(host, MINTSTS); /* read-only mask reg */
2573 2580
@@ -2644,18 +2651,11 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
2644 dw_mci_handle_cd(host); 2651 dw_mci_handle_cd(host);
2645 } 2652 }
2646 2653
2647 /* Handle SDIO Interrupts */ 2654 if (pending & SDMMC_INT_SDIO(slot->sdio_id)) {
2648 for (i = 0; i < host->num_slots; i++) { 2655 mci_writel(host, RINTSTS,
2649 struct dw_mci_slot *slot = host->slot[i]; 2656 SDMMC_INT_SDIO(slot->sdio_id));
2650 2657 __dw_mci_enable_sdio_irq(slot, 0);
2651 if (!slot) 2658 sdio_signal_irq(slot->mmc);
2652 continue;
2653
2654 if (pending & SDMMC_INT_SDIO(slot->sdio_id)) {
2655 mci_writel(host, RINTSTS,
2656 SDMMC_INT_SDIO(slot->sdio_id));
2657 mmc_signal_sdio_irq(slot->mmc);
2658 }
2659 } 2659 }
2660 2660
2661 } 2661 }
@@ -2687,7 +2687,7 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
2687 return IRQ_HANDLED; 2687 return IRQ_HANDLED;
2688} 2688}
2689 2689
2690static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) 2690static int dw_mci_init_slot(struct dw_mci *host)
2691{ 2691{
2692 struct mmc_host *mmc; 2692 struct mmc_host *mmc;
2693 struct dw_mci_slot *slot; 2693 struct dw_mci_slot *slot;
@@ -2700,15 +2700,15 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
2700 return -ENOMEM; 2700 return -ENOMEM;
2701 2701
2702 slot = mmc_priv(mmc); 2702 slot = mmc_priv(mmc);
2703 slot->id = id; 2703 slot->id = 0;
2704 slot->sdio_id = host->sdio_id0 + id; 2704 slot->sdio_id = host->sdio_id0 + slot->id;
2705 slot->mmc = mmc; 2705 slot->mmc = mmc;
2706 slot->host = host; 2706 slot->host = host;
2707 host->slot[id] = slot; 2707 host->slot = slot;
2708 2708
2709 mmc->ops = &dw_mci_ops; 2709 mmc->ops = &dw_mci_ops;
2710 if (of_property_read_u32_array(host->dev->of_node, 2710 if (device_property_read_u32_array(host->dev, "clock-freq-min-max",
2711 "clock-freq-min-max", freq, 2)) { 2711 freq, 2)) {
2712 mmc->f_min = DW_MCI_FREQ_MIN; 2712 mmc->f_min = DW_MCI_FREQ_MIN;
2713 mmc->f_max = DW_MCI_FREQ_MAX; 2713 mmc->f_max = DW_MCI_FREQ_MAX;
2714 } else { 2714 } else {
@@ -2755,6 +2755,10 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
2755 if (ret) 2755 if (ret)
2756 goto err_host_allocated; 2756 goto err_host_allocated;
2757 2757
2758 /* Process SDIO IRQs through the sdio_irq_work. */
2759 if (mmc->caps & MMC_CAP_SDIO_IRQ)
2760 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD;
2761
2758 /* Useful defaults if platform data is unset. */ 2762 /* Useful defaults if platform data is unset. */
2759 if (host->use_dma == TRANS_MODE_IDMAC) { 2763 if (host->use_dma == TRANS_MODE_IDMAC) {
2760 mmc->max_segs = host->ring_size; 2764 mmc->max_segs = host->ring_size;
@@ -2796,11 +2800,11 @@ err_host_allocated:
2796 return ret; 2800 return ret;
2797} 2801}
2798 2802
2799static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) 2803static void dw_mci_cleanup_slot(struct dw_mci_slot *slot)
2800{ 2804{
2801 /* Debugfs stuff is cleaned up by mmc core */ 2805 /* Debugfs stuff is cleaned up by mmc core */
2802 mmc_remove_host(slot->mmc); 2806 mmc_remove_host(slot->mmc);
2803 slot->host->slot[id] = NULL; 2807 slot->host->slot = NULL;
2804 mmc_free_host(slot->mmc); 2808 mmc_free_host(slot->mmc);
2805} 2809}
2806 2810
@@ -2808,7 +2812,6 @@ static void dw_mci_init_dma(struct dw_mci *host)
2808{ 2812{
2809 int addr_config; 2813 int addr_config;
2810 struct device *dev = host->dev; 2814 struct device *dev = host->dev;
2811 struct device_node *np = dev->of_node;
2812 2815
2813 /* 2816 /*
2814 * Check tansfer mode from HCON[17:16] 2817 * Check tansfer mode from HCON[17:16]
@@ -2869,8 +2872,9 @@ static void dw_mci_init_dma(struct dw_mci *host)
2869 dev_info(host->dev, "Using internal DMA controller.\n"); 2872 dev_info(host->dev, "Using internal DMA controller.\n");
2870 } else { 2873 } else {
2871 /* TRANS_MODE_EDMAC: check dma bindings again */ 2874 /* TRANS_MODE_EDMAC: check dma bindings again */
2872 if ((of_property_count_strings(np, "dma-names") < 0) || 2875 if ((device_property_read_string_array(dev, "dma-names",
2873 (!of_find_property(np, "dmas", NULL))) { 2876 NULL, 0) < 0) ||
2877 !device_property_present(dev, "dmas")) {
2874 goto no_dma; 2878 goto no_dma;
2875 } 2879 }
2876 host->dma_ops = &dw_mci_edmac_ops; 2880 host->dma_ops = &dw_mci_edmac_ops;
@@ -2937,7 +2941,6 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host)
2937{ 2941{
2938 struct dw_mci_board *pdata; 2942 struct dw_mci_board *pdata;
2939 struct device *dev = host->dev; 2943 struct device *dev = host->dev;
2940 struct device_node *np = dev->of_node;
2941 const struct dw_mci_drv_data *drv_data = host->drv_data; 2944 const struct dw_mci_drv_data *drv_data = host->drv_data;
2942 int ret; 2945 int ret;
2943 u32 clock_frequency; 2946 u32 clock_frequency;
@@ -2954,20 +2957,22 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host)
2954 } 2957 }
2955 2958
2956 /* find out number of slots supported */ 2959 /* find out number of slots supported */
2957 of_property_read_u32(np, "num-slots", &pdata->num_slots); 2960 if (device_property_read_u32(dev, "num-slots", &pdata->num_slots))
2961 dev_info(dev, "'num-slots' was deprecated.\n");
2958 2962
2959 if (of_property_read_u32(np, "fifo-depth", &pdata->fifo_depth)) 2963 if (device_property_read_u32(dev, "fifo-depth", &pdata->fifo_depth))
2960 dev_info(dev, 2964 dev_info(dev,
2961 "fifo-depth property not found, using value of FIFOTH register as default\n"); 2965 "fifo-depth property not found, using value of FIFOTH register as default\n");
2962 2966
2963 of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms); 2967 device_property_read_u32(dev, "card-detect-delay",
2968 &pdata->detect_delay_ms);
2964 2969
2965 of_property_read_u32(np, "data-addr", &host->data_addr_override); 2970 device_property_read_u32(dev, "data-addr", &host->data_addr_override);
2966 2971
2967 if (of_get_property(np, "fifo-watermark-aligned", NULL)) 2972 if (device_property_present(dev, "fifo-watermark-aligned"))
2968 host->wm_aligned = true; 2973 host->wm_aligned = true;
2969 2974
2970 if (!of_property_read_u32(np, "clock-frequency", &clock_frequency)) 2975 if (!device_property_read_u32(dev, "clock-frequency", &clock_frequency))
2971 pdata->bus_hz = clock_frequency; 2976 pdata->bus_hz = clock_frequency;
2972 2977
2973 if (drv_data && drv_data->parse_dt) { 2978 if (drv_data && drv_data->parse_dt) {
@@ -2990,29 +2995,21 @@ static void dw_mci_enable_cd(struct dw_mci *host)
2990{ 2995{
2991 unsigned long irqflags; 2996 unsigned long irqflags;
2992 u32 temp; 2997 u32 temp;
2993 int i;
2994 struct dw_mci_slot *slot;
2995 2998
2996 /* 2999 /*
2997 * No need for CD if all slots have a non-error GPIO 3000 * No need for CD if all slots have a non-error GPIO
2998 * as well as broken card detection is found. 3001 * as well as broken card detection is found.
2999 */ 3002 */
3000 for (i = 0; i < host->num_slots; i++) { 3003 if (host->slot->mmc->caps & MMC_CAP_NEEDS_POLL)
3001 slot = host->slot[i];
3002 if (slot->mmc->caps & MMC_CAP_NEEDS_POLL)
3003 return;
3004
3005 if (mmc_gpio_get_cd(slot->mmc) < 0)
3006 break;
3007 }
3008 if (i == host->num_slots)
3009 return; 3004 return;
3010 3005
3011 spin_lock_irqsave(&host->irq_lock, irqflags); 3006 if (mmc_gpio_get_cd(host->slot->mmc) < 0) {
3012 temp = mci_readl(host, INTMASK); 3007 spin_lock_irqsave(&host->irq_lock, irqflags);
3013 temp |= SDMMC_INT_CD; 3008 temp = mci_readl(host, INTMASK);
3014 mci_writel(host, INTMASK, temp); 3009 temp |= SDMMC_INT_CD;
3015 spin_unlock_irqrestore(&host->irq_lock, irqflags); 3010 mci_writel(host, INTMASK, temp);
3011 spin_unlock_irqrestore(&host->irq_lock, irqflags);
3012 }
3016} 3013}
3017 3014
3018int dw_mci_probe(struct dw_mci *host) 3015int dw_mci_probe(struct dw_mci *host)
@@ -3020,7 +3017,6 @@ int dw_mci_probe(struct dw_mci *host)
3020 const struct dw_mci_drv_data *drv_data = host->drv_data; 3017 const struct dw_mci_drv_data *drv_data = host->drv_data;
3021 int width, i, ret = 0; 3018 int width, i, ret = 0;
3022 u32 fifo_size; 3019 u32 fifo_size;
3023 int init_slots = 0;
3024 3020
3025 if (!host->pdata) { 3021 if (!host->pdata) {
3026 host->pdata = dw_mci_parse_dt(host); 3022 host->pdata = dw_mci_parse_dt(host);
@@ -3183,19 +3179,6 @@ int dw_mci_probe(struct dw_mci *host)
3183 if (ret) 3179 if (ret)
3184 goto err_dmaunmap; 3180 goto err_dmaunmap;
3185 3181
3186 if (host->pdata->num_slots)
3187 host->num_slots = host->pdata->num_slots;
3188 else
3189 host->num_slots = 1;
3190
3191 if (host->num_slots < 1 ||
3192 host->num_slots > SDMMC_GET_SLOT_NUM(mci_readl(host, HCON))) {
3193 dev_err(host->dev,
3194 "Platform data must supply correct num_slots.\n");
3195 ret = -ENODEV;
3196 goto err_clk_ciu;
3197 }
3198
3199 /* 3182 /*
3200 * Enable interrupts for command done, data over, data empty, 3183 * Enable interrupts for command done, data over, data empty,
3201 * receive ready and error such as transmit, receive timeout, crc error 3184 * receive ready and error such as transmit, receive timeout, crc error
@@ -3211,20 +3194,9 @@ int dw_mci_probe(struct dw_mci *host)
3211 host->irq, width, fifo_size); 3194 host->irq, width, fifo_size);
3212 3195
3213 /* We need at least one slot to succeed */ 3196 /* We need at least one slot to succeed */
3214 for (i = 0; i < host->num_slots; i++) { 3197 ret = dw_mci_init_slot(host);
3215 ret = dw_mci_init_slot(host, i); 3198 if (ret) {
3216 if (ret) 3199 dev_dbg(host->dev, "slot %d init failed\n", i);
3217 dev_dbg(host->dev, "slot %d init failed\n", i);
3218 else
3219 init_slots++;
3220 }
3221
3222 if (init_slots) {
3223 dev_info(host->dev, "%d slots initialized\n", init_slots);
3224 } else {
3225 dev_dbg(host->dev,
3226 "attempted to initialize %d slots, but failed on all\n",
3227 host->num_slots);
3228 goto err_dmaunmap; 3200 goto err_dmaunmap;
3229 } 3201 }
3230 3202
@@ -3252,13 +3224,9 @@ EXPORT_SYMBOL(dw_mci_probe);
3252 3224
3253void dw_mci_remove(struct dw_mci *host) 3225void dw_mci_remove(struct dw_mci *host)
3254{ 3226{
3255 int i; 3227 dev_dbg(host->dev, "remove slot\n");
3256 3228 if (host->slot)
3257 for (i = 0; i < host->num_slots; i++) { 3229 dw_mci_cleanup_slot(host->slot);
3258 dev_dbg(host->dev, "remove slot %d\n", i);
3259 if (host->slot[i])
3260 dw_mci_cleanup_slot(host->slot[i], i);
3261 }
3262 3230
3263 mci_writel(host, RINTSTS, 0xFFFFFFFF); 3231 mci_writel(host, RINTSTS, 0xFFFFFFFF);
3264 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 3232 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */
@@ -3290,9 +3258,9 @@ int dw_mci_runtime_suspend(struct device *dev)
3290 3258
3291 clk_disable_unprepare(host->ciu_clk); 3259 clk_disable_unprepare(host->ciu_clk);
3292 3260
3293 if (host->cur_slot && 3261 if (host->slot &&
3294 (mmc_can_gpio_cd(host->cur_slot->mmc) || 3262 (mmc_can_gpio_cd(host->slot->mmc) ||
3295 !mmc_card_is_removable(host->cur_slot->mmc))) 3263 !mmc_card_is_removable(host->slot->mmc)))
3296 clk_disable_unprepare(host->biu_clk); 3264 clk_disable_unprepare(host->biu_clk);
3297 3265
3298 return 0; 3266 return 0;
@@ -3301,12 +3269,12 @@ EXPORT_SYMBOL(dw_mci_runtime_suspend);
3301 3269
3302int dw_mci_runtime_resume(struct device *dev) 3270int dw_mci_runtime_resume(struct device *dev)
3303{ 3271{
3304 int i, ret = 0; 3272 int ret = 0;
3305 struct dw_mci *host = dev_get_drvdata(dev); 3273 struct dw_mci *host = dev_get_drvdata(dev);
3306 3274
3307 if (host->cur_slot && 3275 if (host->slot &&
3308 (mmc_can_gpio_cd(host->cur_slot->mmc) || 3276 (mmc_can_gpio_cd(host->slot->mmc) ||
3309 !mmc_card_is_removable(host->cur_slot->mmc))) { 3277 !mmc_card_is_removable(host->slot->mmc))) {
3310 ret = clk_prepare_enable(host->biu_clk); 3278 ret = clk_prepare_enable(host->biu_clk);
3311 if (ret) 3279 if (ret)
3312 return ret; 3280 return ret;
@@ -3341,17 +3309,12 @@ int dw_mci_runtime_resume(struct device *dev)
3341 DW_MCI_ERROR_FLAGS); 3309 DW_MCI_ERROR_FLAGS);
3342 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); 3310 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE);
3343 3311
3344 for (i = 0; i < host->num_slots; i++) {
3345 struct dw_mci_slot *slot = host->slot[i];
3346 3312
3347 if (!slot) 3313 if (host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER)
3348 continue; 3314 dw_mci_set_ios(host->slot->mmc, &host->slot->mmc->ios);
3349 if (slot->mmc->pm_flags & MMC_PM_KEEP_POWER)
3350 dw_mci_set_ios(slot->mmc, &slot->mmc->ios);
3351 3315
3352 /* Force setup bus to guarantee available clock output */ 3316 /* Force setup bus to guarantee available clock output */
3353 dw_mci_setup_bus(slot, true); 3317 dw_mci_setup_bus(host->slot, true);
3354 }
3355 3318
3356 /* Now that slots are all setup, we can enable card detect */ 3319 /* Now that slots are all setup, we can enable card detect */
3357 dw_mci_enable_cd(host); 3320 dw_mci_enable_cd(host);
@@ -3359,9 +3322,9 @@ int dw_mci_runtime_resume(struct device *dev)
3359 return 0; 3322 return 0;
3360 3323
3361err: 3324err:
3362 if (host->cur_slot && 3325 if (host->slot &&
3363 (mmc_can_gpio_cd(host->cur_slot->mmc) || 3326 (mmc_can_gpio_cd(host->slot->mmc) ||
3364 !mmc_card_is_removable(host->cur_slot->mmc))) 3327 !mmc_card_is_removable(host->slot->mmc)))
3365 clk_disable_unprepare(host->biu_clk); 3328 clk_disable_unprepare(host->biu_clk);
3366 3329
3367 return ret; 3330 return ret;
diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
index ce347361f3dc..75da3756955d 100644
--- a/drivers/mmc/host/dw_mmc.h
+++ b/drivers/mmc/host/dw_mmc.h
@@ -20,8 +20,6 @@
20#include <linux/reset.h> 20#include <linux/reset.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22 22
23#define MAX_MCI_SLOTS 2
24
25enum dw_mci_state { 23enum dw_mci_state {
26 STATE_IDLE = 0, 24 STATE_IDLE = 0,
27 STATE_SENDING_CMD, 25 STATE_SENDING_CMD,
@@ -134,7 +132,6 @@ struct dw_mci_dma_slave {
134 * ======= 132 * =======
135 * 133 *
136 * @lock is a softirq-safe spinlock protecting @queue as well as 134 * @lock is a softirq-safe spinlock protecting @queue as well as
137 * @cur_slot, @mrq and @state. These must always be updated
138 * at the same time while holding @lock. 135 * at the same time while holding @lock.
139 * 136 *
140 * @irq_lock is an irq-safe spinlock protecting the INTMASK register 137 * @irq_lock is an irq-safe spinlock protecting the INTMASK register
@@ -170,7 +167,6 @@ struct dw_mci {
170 struct scatterlist *sg; 167 struct scatterlist *sg;
171 struct sg_mapping_iter sg_miter; 168 struct sg_mapping_iter sg_miter;
172 169
173 struct dw_mci_slot *cur_slot;
174 struct mmc_request *mrq; 170 struct mmc_request *mrq;
175 struct mmc_command *cmd; 171 struct mmc_command *cmd;
176 struct mmc_data *data; 172 struct mmc_data *data;
@@ -206,7 +202,6 @@ struct dw_mci {
206 202
207 u32 bus_hz; 203 u32 bus_hz;
208 u32 current_speed; 204 u32 current_speed;
209 u32 num_slots;
210 u32 fifoth_val; 205 u32 fifoth_val;
211 u16 verid; 206 u16 verid;
212 struct device *dev; 207 struct device *dev;
@@ -215,7 +210,7 @@ struct dw_mci {
215 void *priv; 210 void *priv;
216 struct clk *biu_clk; 211 struct clk *biu_clk;
217 struct clk *ciu_clk; 212 struct clk *ciu_clk;
218 struct dw_mci_slot *slot[MAX_MCI_SLOTS]; 213 struct dw_mci_slot *slot;
219 214
220 /* FIFO push and pull */ 215 /* FIFO push and pull */
221 int fifo_depth; 216 int fifo_depth;
diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
index 5c1e178fc5f9..5a672a5218ad 100644
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -1774,7 +1774,7 @@ static int msdc_drv_remove(struct platform_device *pdev)
1774 pm_runtime_disable(host->dev); 1774 pm_runtime_disable(host->dev);
1775 pm_runtime_put_noidle(host->dev); 1775 pm_runtime_put_noidle(host->dev);
1776 dma_free_coherent(&pdev->dev, 1776 dma_free_coherent(&pdev->dev,
1777 sizeof(struct mt_gpdma_desc), 1777 2 * sizeof(struct mt_gpdma_desc),
1778 host->dma.gpd, host->dma.gpd_addr); 1778 host->dma.gpd, host->dma.gpd_addr);
1779 dma_free_coherent(&pdev->dev, MAX_BD_NUM * sizeof(struct mt_bdma_desc), 1779 dma_free_coherent(&pdev->dev, MAX_BD_NUM * sizeof(struct mt_bdma_desc),
1780 host->dma.bd, host->dma.bd_addr); 1780 host->dma.bd, host->dma.bd_addr);
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 8c39dccacf39..7c12f3715676 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -250,14 +250,14 @@ static int omap_hsmmc_enable_supply(struct mmc_host *mmc)
250 struct omap_hsmmc_host *host = mmc_priv(mmc); 250 struct omap_hsmmc_host *host = mmc_priv(mmc);
251 struct mmc_ios *ios = &mmc->ios; 251 struct mmc_ios *ios = &mmc->ios;
252 252
253 if (mmc->supply.vmmc) { 253 if (!IS_ERR(mmc->supply.vmmc)) {
254 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); 254 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd);
255 if (ret) 255 if (ret)
256 return ret; 256 return ret;
257 } 257 }
258 258
259 /* Enable interface voltage rail, if needed */ 259 /* Enable interface voltage rail, if needed */
260 if (mmc->supply.vqmmc && !host->vqmmc_enabled) { 260 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) {
261 ret = regulator_enable(mmc->supply.vqmmc); 261 ret = regulator_enable(mmc->supply.vqmmc);
262 if (ret) { 262 if (ret) {
263 dev_err(mmc_dev(mmc), "vmmc_aux reg enable failed\n"); 263 dev_err(mmc_dev(mmc), "vmmc_aux reg enable failed\n");
@@ -269,7 +269,7 @@ static int omap_hsmmc_enable_supply(struct mmc_host *mmc)
269 return 0; 269 return 0;
270 270
271err_vqmmc: 271err_vqmmc:
272 if (mmc->supply.vmmc) 272 if (!IS_ERR(mmc->supply.vmmc))
273 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); 273 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
274 274
275 return ret; 275 return ret;
@@ -281,7 +281,7 @@ static int omap_hsmmc_disable_supply(struct mmc_host *mmc)
281 int status; 281 int status;
282 struct omap_hsmmc_host *host = mmc_priv(mmc); 282 struct omap_hsmmc_host *host = mmc_priv(mmc);
283 283
284 if (mmc->supply.vqmmc && host->vqmmc_enabled) { 284 if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) {
285 ret = regulator_disable(mmc->supply.vqmmc); 285 ret = regulator_disable(mmc->supply.vqmmc);
286 if (ret) { 286 if (ret) {
287 dev_err(mmc_dev(mmc), "vmmc_aux reg disable failed\n"); 287 dev_err(mmc_dev(mmc), "vmmc_aux reg disable failed\n");
@@ -290,7 +290,7 @@ static int omap_hsmmc_disable_supply(struct mmc_host *mmc)
290 host->vqmmc_enabled = 0; 290 host->vqmmc_enabled = 0;
291 } 291 }
292 292
293 if (mmc->supply.vmmc) { 293 if (!IS_ERR(mmc->supply.vmmc)) {
294 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); 294 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
295 if (ret) 295 if (ret)
296 goto err_set_ocr; 296 goto err_set_ocr;
@@ -299,7 +299,7 @@ static int omap_hsmmc_disable_supply(struct mmc_host *mmc)
299 return 0; 299 return 0;
300 300
301err_set_ocr: 301err_set_ocr:
302 if (mmc->supply.vqmmc) { 302 if (!IS_ERR(mmc->supply.vqmmc)) {
303 status = regulator_enable(mmc->supply.vqmmc); 303 status = regulator_enable(mmc->supply.vqmmc);
304 if (status) 304 if (status)
305 dev_err(mmc_dev(mmc), "vmmc_aux re-enable failed\n"); 305 dev_err(mmc_dev(mmc), "vmmc_aux re-enable failed\n");
@@ -313,7 +313,7 @@ static int omap_hsmmc_set_pbias(struct omap_hsmmc_host *host, bool power_on,
313{ 313{
314 int ret; 314 int ret;
315 315
316 if (!host->pbias) 316 if (IS_ERR(host->pbias))
317 return 0; 317 return 0;
318 318
319 if (power_on) { 319 if (power_on) {
@@ -363,7 +363,7 @@ static int omap_hsmmc_set_power(struct omap_hsmmc_host *host, int power_on,
363 * If we don't see a Vcc regulator, assume it's a fixed 363 * If we don't see a Vcc regulator, assume it's a fixed
364 * voltage always-on regulator. 364 * voltage always-on regulator.
365 */ 365 */
366 if (!mmc->supply.vmmc) 366 if (IS_ERR(mmc->supply.vmmc))
367 return 0; 367 return 0;
368 368
369 if (mmc_pdata(host)->before_set_reg) 369 if (mmc_pdata(host)->before_set_reg)
@@ -415,7 +415,7 @@ static int omap_hsmmc_disable_boot_regulator(struct regulator *reg)
415{ 415{
416 int ret; 416 int ret;
417 417
418 if (!reg) 418 if (IS_ERR(reg))
419 return 0; 419 return 0;
420 420
421 if (regulator_is_enabled(reg)) { 421 if (regulator_is_enabled(reg)) {
@@ -466,36 +466,27 @@ static int omap_hsmmc_disable_boot_regulators(struct omap_hsmmc_host *host)
466 466
467static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 467static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
468{ 468{
469 int ocr_value = 0;
470 int ret; 469 int ret;
471 struct mmc_host *mmc = host->mmc; 470 struct mmc_host *mmc = host->mmc;
472 471
473 if (mmc_pdata(host)->set_power) 472 if (mmc_pdata(host)->set_power)
474 return 0; 473 return 0;
475 474
476 mmc->supply.vmmc = devm_regulator_get_optional(host->dev, "vmmc"); 475 ret = mmc_regulator_get_supply(mmc);
477 if (IS_ERR(mmc->supply.vmmc)) { 476 if (ret == -EPROBE_DEFER)
478 ret = PTR_ERR(mmc->supply.vmmc); 477 return ret;
479 if ((ret != -ENODEV) && host->dev->of_node)
480 return ret;
481 dev_dbg(host->dev, "unable to get vmmc regulator %ld\n",
482 PTR_ERR(mmc->supply.vmmc));
483 mmc->supply.vmmc = NULL;
484 } else {
485 ocr_value = mmc_regulator_get_ocrmask(mmc->supply.vmmc);
486 if (ocr_value > 0)
487 mmc_pdata(host)->ocr_mask = ocr_value;
488 }
489 478
490 /* Allow an aux regulator */ 479 /* Allow an aux regulator */
491 mmc->supply.vqmmc = devm_regulator_get_optional(host->dev, "vmmc_aux");
492 if (IS_ERR(mmc->supply.vqmmc)) { 480 if (IS_ERR(mmc->supply.vqmmc)) {
493 ret = PTR_ERR(mmc->supply.vqmmc); 481 mmc->supply.vqmmc = devm_regulator_get_optional(host->dev,
494 if ((ret != -ENODEV) && host->dev->of_node) 482 "vmmc_aux");
495 return ret; 483 if (IS_ERR(mmc->supply.vqmmc)) {
496 dev_dbg(host->dev, "unable to get vmmc_aux regulator %ld\n", 484 ret = PTR_ERR(mmc->supply.vqmmc);
497 PTR_ERR(mmc->supply.vqmmc)); 485 if ((ret != -ENODEV) && host->dev->of_node)
498 mmc->supply.vqmmc = NULL; 486 return ret;
487 dev_dbg(host->dev, "unable to get vmmc_aux regulator %ld\n",
488 PTR_ERR(mmc->supply.vqmmc));
489 }
499 } 490 }
500 491
501 host->pbias = devm_regulator_get_optional(host->dev, "pbias"); 492 host->pbias = devm_regulator_get_optional(host->dev, "pbias");
@@ -508,7 +499,6 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
508 } 499 }
509 dev_dbg(host->dev, "unable to get pbias regulator %ld\n", 500 dev_dbg(host->dev, "unable to get pbias regulator %ld\n",
510 PTR_ERR(host->pbias)); 501 PTR_ERR(host->pbias));
511 host->pbias = NULL;
512 } 502 }
513 503
514 /* For eMMC do not power off when not in sleep state */ 504 /* For eMMC do not power off when not in sleep state */
@@ -2146,7 +2136,8 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
2146 if (ret) 2136 if (ret)
2147 goto err_irq; 2137 goto err_irq;
2148 2138
2149 mmc->ocr_avail = mmc_pdata(host)->ocr_mask; 2139 if (!mmc->ocr_avail)
2140 mmc->ocr_avail = mmc_pdata(host)->ocr_mask;
2150 2141
2151 omap_hsmmc_disable_irq(host); 2142 omap_hsmmc_disable_irq(host);
2152 2143
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index c763b404510f..59ab194cb009 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -702,7 +702,11 @@ static int pxamci_probe(struct platform_device *pdev)
702 702
703 pxamci_init_ocr(host); 703 pxamci_init_ocr(host);
704 704
705 mmc->caps = 0; 705 /*
706 * This architecture used to disable bounce buffers through its
707 * defconfig, now it is done at runtime as a host property.
708 */
709 mmc->caps = MMC_CAP_NO_BOUNCE_BUFF;
706 host->cmdat = 0; 710 host->cmdat = 0;
707 if (!cpu_is_pxa25x()) { 711 if (!cpu_is_pxa25x()) {
708 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; 712 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h
new file mode 100644
index 000000000000..ca83acc113b8
--- /dev/null
+++ b/drivers/mmc/host/renesas_sdhi.h
@@ -0,0 +1,39 @@
1/*
2 * Renesas Mobile SDHI
3 *
4 * Copyright (C) 2017 Horms Solutions Ltd., Simon Horman
5 * Copyright (C) 2017 Renesas Electronics Corporation
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef RENESAS_SDHI_H
13#define RENESAS_SDHI_H
14
15#include <linux/platform_device.h>
16#include "tmio_mmc.h"
17
18struct renesas_sdhi_scc {
19 unsigned long clk_rate; /* clock rate for SDR104 */
20 u32 tap; /* sampling clock position for SDR104 */
21};
22
23struct renesas_sdhi_of_data {
24 unsigned long tmio_flags;
25 u32 tmio_ocr_mask;
26 unsigned long capabilities;
27 unsigned long capabilities2;
28 enum dma_slave_buswidth dma_buswidth;
29 dma_addr_t dma_rx_offset;
30 unsigned int bus_shift;
31 int scc_offset;
32 struct renesas_sdhi_scc *taps;
33 int taps_num;
34};
35
36int renesas_sdhi_probe(struct platform_device *pdev,
37 const struct tmio_mmc_dma_ops *dma_ops);
38int renesas_sdhi_remove(struct platform_device *pdev);
39#endif
diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/renesas_sdhi_core.c
index bc6be0dbea39..a4fb07d0ea91 100644
--- a/drivers/mmc/host/sh_mobile_sdhi.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -1,8 +1,9 @@
1/* 1/*
2 * SuperH Mobile SDHI 2 * Renesas SDHI
3 * 3 *
4 * Copyright (C) 2016 Sang Engineering, Wolfram Sang 4 * Copyright (C) 2015-17 Renesas Electronics Corporation
5 * Copyright (C) 2015-16 Renesas Electronics Corporation 5 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
6 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
6 * Copyright (C) 2009 Magnus Damm 7 * Copyright (C) 2009 Magnus Damm
7 * 8 *
8 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
@@ -23,8 +24,6 @@
23#include <linux/kernel.h> 24#include <linux/kernel.h>
24#include <linux/clk.h> 25#include <linux/clk.h>
25#include <linux/slab.h> 26#include <linux/slab.h>
26#include <linux/mod_devicetable.h>
27#include <linux/module.h>
28#include <linux/of_device.h> 27#include <linux/of_device.h>
29#include <linux/platform_device.h> 28#include <linux/platform_device.h>
30#include <linux/mmc/host.h> 29#include <linux/mmc/host.h>
@@ -35,6 +34,7 @@
35#include <linux/pinctrl/pinctrl-state.h> 34#include <linux/pinctrl/pinctrl-state.h>
36#include <linux/regulator/consumer.h> 35#include <linux/regulator/consumer.h>
37 36
37#include "renesas_sdhi.h"
38#include "tmio_mmc.h" 38#include "tmio_mmc.h"
39 39
40#define EXT_ACC 0xe4 40#define EXT_ACC 0xe4
@@ -45,103 +45,10 @@
45#define SDHI_VER_GEN3_SD 0xcc10 45#define SDHI_VER_GEN3_SD 0xcc10
46#define SDHI_VER_GEN3_SDMMC 0xcd10 46#define SDHI_VER_GEN3_SDMMC 0xcd10
47 47
48#define host_to_priv(host) container_of((host)->pdata, struct sh_mobile_sdhi, mmc_data) 48#define host_to_priv(host) \
49 container_of((host)->pdata, struct renesas_sdhi, mmc_data)
49 50
50struct sh_mobile_sdhi_scc { 51struct renesas_sdhi {
51 unsigned long clk_rate; /* clock rate for SDR104 */
52 u32 tap; /* sampling clock position for SDR104 */
53};
54
55struct sh_mobile_sdhi_of_data {
56 unsigned long tmio_flags;
57 u32 tmio_ocr_mask;
58 unsigned long capabilities;
59 unsigned long capabilities2;
60 enum dma_slave_buswidth dma_buswidth;
61 dma_addr_t dma_rx_offset;
62 unsigned bus_shift;
63 int scc_offset;
64 struct sh_mobile_sdhi_scc *taps;
65 int taps_num;
66};
67
68static const struct sh_mobile_sdhi_of_data of_default_cfg = {
69 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
70};
71
72static const struct sh_mobile_sdhi_of_data of_rz_compatible = {
73 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT,
74 .tmio_ocr_mask = MMC_VDD_32_33,
75 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
76};
77
78static const struct sh_mobile_sdhi_of_data of_rcar_gen1_compatible = {
79 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
80 TMIO_MMC_CLK_ACTUAL,
81 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
82};
83
84/* Definitions for sampling clocks */
85static struct sh_mobile_sdhi_scc rcar_gen2_scc_taps[] = {
86 {
87 .clk_rate = 156000000,
88 .tap = 0x00000703,
89 },
90 {
91 .clk_rate = 0,
92 .tap = 0x00000300,
93 },
94};
95
96static const struct sh_mobile_sdhi_of_data of_rcar_gen2_compatible = {
97 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
98 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
99 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
100 .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
101 .dma_rx_offset = 0x2000,
102 .scc_offset = 0x0300,
103 .taps = rcar_gen2_scc_taps,
104 .taps_num = ARRAY_SIZE(rcar_gen2_scc_taps),
105};
106
107/* Definitions for sampling clocks */
108static struct sh_mobile_sdhi_scc rcar_gen3_scc_taps[] = {
109 {
110 .clk_rate = 0,
111 .tap = 0x00000300,
112 },
113};
114
115static const struct sh_mobile_sdhi_of_data of_rcar_gen3_compatible = {
116 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
117 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
118 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
119 .bus_shift = 2,
120 .scc_offset = 0x1000,
121 .taps = rcar_gen3_scc_taps,
122 .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps),
123};
124
125static const struct of_device_id sh_mobile_sdhi_of_match[] = {
126 { .compatible = "renesas,sdhi-shmobile" },
127 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
128 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
129 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
130 { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
131 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
132 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
133 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
134 { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
135 { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
136 { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
137 { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
138 { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
139 { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
140 {},
141};
142MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match);
143
144struct sh_mobile_sdhi {
145 struct clk *clk; 52 struct clk *clk;
146 struct clk *clk_cd; 53 struct clk *clk_cd;
147 struct tmio_mmc_data mmc_data; 54 struct tmio_mmc_data mmc_data;
@@ -151,13 +58,13 @@ struct sh_mobile_sdhi {
151 void __iomem *scc_ctl; 58 void __iomem *scc_ctl;
152}; 59};
153 60
154static void sh_mobile_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width) 61static void renesas_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
155{ 62{
156 u32 val; 63 u32 val;
157 64
158 /* 65 /*
159 * see also 66 * see also
160 * sh_mobile_sdhi_of_data :: dma_buswidth 67 * renesas_sdhi_of_data :: dma_buswidth
161 */ 68 */
162 switch (sd_ctrl_read16(host, CTL_VERSION)) { 69 switch (sd_ctrl_read16(host, CTL_VERSION)) {
163 case SDHI_VER_GEN2_SDR50: 70 case SDHI_VER_GEN2_SDR50:
@@ -183,11 +90,12 @@ static void sh_mobile_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
183 sd_ctrl_write16(host, EXT_ACC, val); 90 sd_ctrl_write16(host, EXT_ACC, val);
184} 91}
185 92
186static int sh_mobile_sdhi_clk_enable(struct tmio_mmc_host *host) 93static int renesas_sdhi_clk_enable(struct tmio_mmc_host *host)
187{ 94{
188 struct mmc_host *mmc = host->mmc; 95 struct mmc_host *mmc = host->mmc;
189 struct sh_mobile_sdhi *priv = host_to_priv(host); 96 struct renesas_sdhi *priv = host_to_priv(host);
190 int ret = clk_prepare_enable(priv->clk); 97 int ret = clk_prepare_enable(priv->clk);
98
191 if (ret < 0) 99 if (ret < 0)
192 return ret; 100 return ret;
193 101
@@ -213,19 +121,19 @@ static int sh_mobile_sdhi_clk_enable(struct tmio_mmc_host *host)
213 mmc->f_min = max(clk_round_rate(priv->clk, 1) / 512, 1L); 121 mmc->f_min = max(clk_round_rate(priv->clk, 1) / 512, 1L);
214 122
215 /* enable 16bit data access on SDBUF as default */ 123 /* enable 16bit data access on SDBUF as default */
216 sh_mobile_sdhi_sdbuf_width(host, 16); 124 renesas_sdhi_sdbuf_width(host, 16);
217 125
218 return 0; 126 return 0;
219} 127}
220 128
221static unsigned int sh_mobile_sdhi_clk_update(struct tmio_mmc_host *host, 129static unsigned int renesas_sdhi_clk_update(struct tmio_mmc_host *host,
222 unsigned int new_clock) 130 unsigned int new_clock)
223{ 131{
224 struct sh_mobile_sdhi *priv = host_to_priv(host); 132 struct renesas_sdhi *priv = host_to_priv(host);
225 unsigned int freq, diff, best_freq = 0, diff_min = ~0; 133 unsigned int freq, diff, best_freq = 0, diff_min = ~0;
226 int i, ret; 134 int i, ret;
227 135
228 /* tested only on RCar Gen2+ currently; may work for others */ 136 /* tested only on R-Car Gen2+ currently; may work for others */
229 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2)) 137 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
230 return clk_get_rate(priv->clk); 138 return clk_get_rate(priv->clk);
231 139
@@ -257,26 +165,27 @@ static unsigned int sh_mobile_sdhi_clk_update(struct tmio_mmc_host *host,
257 return ret == 0 ? best_freq : clk_get_rate(priv->clk); 165 return ret == 0 ? best_freq : clk_get_rate(priv->clk);
258} 166}
259 167
260static void sh_mobile_sdhi_clk_disable(struct tmio_mmc_host *host) 168static void renesas_sdhi_clk_disable(struct tmio_mmc_host *host)
261{ 169{
262 struct sh_mobile_sdhi *priv = host_to_priv(host); 170 struct renesas_sdhi *priv = host_to_priv(host);
263 171
264 clk_disable_unprepare(priv->clk); 172 clk_disable_unprepare(priv->clk);
265 clk_disable_unprepare(priv->clk_cd); 173 clk_disable_unprepare(priv->clk_cd);
266} 174}
267 175
268static int sh_mobile_sdhi_card_busy(struct mmc_host *mmc) 176static int renesas_sdhi_card_busy(struct mmc_host *mmc)
269{ 177{
270 struct tmio_mmc_host *host = mmc_priv(mmc); 178 struct tmio_mmc_host *host = mmc_priv(mmc);
271 179
272 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_DAT0); 180 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
181 TMIO_STAT_DAT0);
273} 182}
274 183
275static int sh_mobile_sdhi_start_signal_voltage_switch(struct mmc_host *mmc, 184static int renesas_sdhi_start_signal_voltage_switch(struct mmc_host *mmc,
276 struct mmc_ios *ios) 185 struct mmc_ios *ios)
277{ 186{
278 struct tmio_mmc_host *host = mmc_priv(mmc); 187 struct tmio_mmc_host *host = mmc_priv(mmc);
279 struct sh_mobile_sdhi *priv = host_to_priv(host); 188 struct renesas_sdhi *priv = host_to_priv(host);
280 struct pinctrl_state *pin_state; 189 struct pinctrl_state *pin_state;
281 int ret; 190 int ret;
282 191
@@ -327,21 +236,21 @@ static int sh_mobile_sdhi_start_signal_voltage_switch(struct mmc_host *mmc,
327#define SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR BIT(2) 236#define SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR BIT(2)
328 237
329static inline u32 sd_scc_read32(struct tmio_mmc_host *host, 238static inline u32 sd_scc_read32(struct tmio_mmc_host *host,
330 struct sh_mobile_sdhi *priv, int addr) 239 struct renesas_sdhi *priv, int addr)
331{ 240{
332 return readl(priv->scc_ctl + (addr << host->bus_shift)); 241 return readl(priv->scc_ctl + (addr << host->bus_shift));
333} 242}
334 243
335static inline void sd_scc_write32(struct tmio_mmc_host *host, 244static inline void sd_scc_write32(struct tmio_mmc_host *host,
336 struct sh_mobile_sdhi *priv, 245 struct renesas_sdhi *priv,
337 int addr, u32 val) 246 int addr, u32 val)
338{ 247{
339 writel(val, priv->scc_ctl + (addr << host->bus_shift)); 248 writel(val, priv->scc_ctl + (addr << host->bus_shift));
340} 249}
341 250
342static unsigned int sh_mobile_sdhi_init_tuning(struct tmio_mmc_host *host) 251static unsigned int renesas_sdhi_init_tuning(struct tmio_mmc_host *host)
343{ 252{
344 struct sh_mobile_sdhi *priv; 253 struct renesas_sdhi *priv;
345 254
346 priv = host_to_priv(host); 255 priv = host_to_priv(host);
347 256
@@ -378,10 +287,10 @@ static unsigned int sh_mobile_sdhi_init_tuning(struct tmio_mmc_host *host)
378 SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_MASK; 287 SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_MASK;
379} 288}
380 289
381static void sh_mobile_sdhi_prepare_tuning(struct tmio_mmc_host *host, 290static void renesas_sdhi_prepare_tuning(struct tmio_mmc_host *host,
382 unsigned long tap) 291 unsigned long tap)
383{ 292{
384 struct sh_mobile_sdhi *priv = host_to_priv(host); 293 struct renesas_sdhi *priv = host_to_priv(host);
385 294
386 /* Set sampling clock position */ 295 /* Set sampling clock position */
387 sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TAPSET, tap); 296 sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TAPSET, tap);
@@ -389,9 +298,9 @@ static void sh_mobile_sdhi_prepare_tuning(struct tmio_mmc_host *host,
389 298
390#define SH_MOBILE_SDHI_MAX_TAP 3 299#define SH_MOBILE_SDHI_MAX_TAP 3
391 300
392static int sh_mobile_sdhi_select_tuning(struct tmio_mmc_host *host) 301static int renesas_sdhi_select_tuning(struct tmio_mmc_host *host)
393{ 302{
394 struct sh_mobile_sdhi *priv = host_to_priv(host); 303 struct renesas_sdhi *priv = host_to_priv(host);
395 unsigned long tap_cnt; /* counter of tuning success */ 304 unsigned long tap_cnt; /* counter of tuning success */
396 unsigned long tap_set; /* tap position */ 305 unsigned long tap_set; /* tap position */
397 unsigned long tap_start;/* start position of tuning success */ 306 unsigned long tap_start;/* start position of tuning success */
@@ -412,9 +321,9 @@ static int sh_mobile_sdhi_select_tuning(struct tmio_mmc_host *host)
412 tap_start = 0; 321 tap_start = 0;
413 tap_end = 0; 322 tap_end = 0;
414 for (i = 0; i < host->tap_num * 2; i++) { 323 for (i = 0; i < host->tap_num * 2; i++) {
415 if (test_bit(i, host->taps)) 324 if (test_bit(i, host->taps)) {
416 ntap++; 325 ntap++;
417 else { 326 } else {
418 if (ntap > tap_cnt) { 327 if (ntap > tap_cnt) {
419 tap_start = i - ntap; 328 tap_start = i - ntap;
420 tap_end = i - 1; 329 tap_end = i - 1;
@@ -446,10 +355,9 @@ static int sh_mobile_sdhi_select_tuning(struct tmio_mmc_host *host)
446 return 0; 355 return 0;
447} 356}
448 357
449 358static bool renesas_sdhi_check_scc_error(struct tmio_mmc_host *host)
450static bool sh_mobile_sdhi_check_scc_error(struct tmio_mmc_host *host)
451{ 359{
452 struct sh_mobile_sdhi *priv = host_to_priv(host); 360 struct renesas_sdhi *priv = host_to_priv(host);
453 361
454 /* Check SCC error */ 362 /* Check SCC error */
455 if (sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL) & 363 if (sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL) &
@@ -464,9 +372,9 @@ static bool sh_mobile_sdhi_check_scc_error(struct tmio_mmc_host *host)
464 return false; 372 return false;
465} 373}
466 374
467static void sh_mobile_sdhi_hw_reset(struct tmio_mmc_host *host) 375static void renesas_sdhi_hw_reset(struct tmio_mmc_host *host)
468{ 376{
469 struct sh_mobile_sdhi *priv; 377 struct renesas_sdhi *priv;
470 378
471 priv = host_to_priv(host); 379 priv = host_to_priv(host);
472 380
@@ -490,7 +398,7 @@ static void sh_mobile_sdhi_hw_reset(struct tmio_mmc_host *host)
490 sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL)); 398 sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
491} 399}
492 400
493static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host) 401static int renesas_sdhi_wait_idle(struct tmio_mmc_host *host)
494{ 402{
495 int timeout = 1000; 403 int timeout = 1000;
496 404
@@ -506,10 +414,9 @@ static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host)
506 return 0; 414 return 0;
507} 415}
508 416
509static int sh_mobile_sdhi_write16_hook(struct tmio_mmc_host *host, int addr) 417static int renesas_sdhi_write16_hook(struct tmio_mmc_host *host, int addr)
510{ 418{
511 switch (addr) 419 switch (addr) {
512 {
513 case CTL_SD_CMD: 420 case CTL_SD_CMD:
514 case CTL_STOP_INTERNAL_ACTION: 421 case CTL_STOP_INTERNAL_ACTION:
515 case CTL_XFER_BLK_COUNT: 422 case CTL_XFER_BLK_COUNT:
@@ -519,14 +426,14 @@ static int sh_mobile_sdhi_write16_hook(struct tmio_mmc_host *host, int addr)
519 case CTL_TRANSACTION_CTL: 426 case CTL_TRANSACTION_CTL:
520 case CTL_DMA_ENABLE: 427 case CTL_DMA_ENABLE:
521 case EXT_ACC: 428 case EXT_ACC:
522 return sh_mobile_sdhi_wait_idle(host); 429 return renesas_sdhi_wait_idle(host);
523 } 430 }
524 431
525 return 0; 432 return 0;
526} 433}
527 434
528static int sh_mobile_sdhi_multi_io_quirk(struct mmc_card *card, 435static int renesas_sdhi_multi_io_quirk(struct mmc_card *card,
529 unsigned int direction, int blk_size) 436 unsigned int direction, int blk_size)
530{ 437{
531 /* 438 /*
532 * In Renesas controllers, when performing a 439 * In Renesas controllers, when performing a
@@ -543,30 +450,34 @@ static int sh_mobile_sdhi_multi_io_quirk(struct mmc_card *card,
543 return blk_size; 450 return blk_size;
544} 451}
545 452
546static void sh_mobile_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable) 453static void renesas_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable)
547{ 454{
548 sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0); 455 sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0);
549 456
550 /* enable 32bit access if DMA mode if possibile */ 457 /* enable 32bit access if DMA mode if possibile */
551 sh_mobile_sdhi_sdbuf_width(host, enable ? 32 : 16); 458 renesas_sdhi_sdbuf_width(host, enable ? 32 : 16);
552} 459}
553 460
554static int sh_mobile_sdhi_probe(struct platform_device *pdev) 461int renesas_sdhi_probe(struct platform_device *pdev,
462 const struct tmio_mmc_dma_ops *dma_ops)
555{ 463{
556 const struct sh_mobile_sdhi_of_data *of_data = of_device_get_match_data(&pdev->dev);
557 struct sh_mobile_sdhi *priv;
558 struct tmio_mmc_data *mmc_data;
559 struct tmio_mmc_data *mmd = pdev->dev.platform_data; 464 struct tmio_mmc_data *mmd = pdev->dev.platform_data;
465 const struct renesas_sdhi_of_data *of_data;
466 struct tmio_mmc_data *mmc_data;
467 struct tmio_mmc_dma *dma_priv;
560 struct tmio_mmc_host *host; 468 struct tmio_mmc_host *host;
469 struct renesas_sdhi *priv;
561 struct resource *res; 470 struct resource *res;
562 int irq, ret, i; 471 int irq, ret, i;
563 struct tmio_mmc_dma *dma_priv; 472
473 of_data = of_device_get_match_data(&pdev->dev);
564 474
565 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 475 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
566 if (!res) 476 if (!res)
567 return -EINVAL; 477 return -EINVAL;
568 478
569 priv = devm_kzalloc(&pdev->dev, sizeof(struct sh_mobile_sdhi), GFP_KERNEL); 479 priv = devm_kzalloc(&pdev->dev, sizeof(struct renesas_sdhi),
480 GFP_KERNEL);
570 if (!priv) 481 if (!priv)
571 return -ENOMEM; 482 return -ENOMEM;
572 483
@@ -609,7 +520,6 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
609 goto eprobe; 520 goto eprobe;
610 } 521 }
611 522
612
613 if (of_data) { 523 if (of_data) {
614 mmc_data->flags |= of_data->tmio_flags; 524 mmc_data->flags |= of_data->tmio_flags;
615 mmc_data->ocr_mask = of_data->tmio_ocr_mask; 525 mmc_data->ocr_mask = of_data->tmio_ocr_mask;
@@ -621,18 +531,18 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
621 } 531 }
622 532
623 host->dma = dma_priv; 533 host->dma = dma_priv;
624 host->write16_hook = sh_mobile_sdhi_write16_hook; 534 host->write16_hook = renesas_sdhi_write16_hook;
625 host->clk_enable = sh_mobile_sdhi_clk_enable; 535 host->clk_enable = renesas_sdhi_clk_enable;
626 host->clk_update = sh_mobile_sdhi_clk_update; 536 host->clk_update = renesas_sdhi_clk_update;
627 host->clk_disable = sh_mobile_sdhi_clk_disable; 537 host->clk_disable = renesas_sdhi_clk_disable;
628 host->multi_io_quirk = sh_mobile_sdhi_multi_io_quirk; 538 host->multi_io_quirk = renesas_sdhi_multi_io_quirk;
629 539
630 /* SDR speeds are only available on Gen2+ */ 540 /* SDR speeds are only available on Gen2+ */
631 if (mmc_data->flags & TMIO_MMC_MIN_RCAR2) { 541 if (mmc_data->flags & TMIO_MMC_MIN_RCAR2) {
632 /* card_busy caused issues on r8a73a4 (pre-Gen2) CD-less SDHI */ 542 /* card_busy caused issues on r8a73a4 (pre-Gen2) CD-less SDHI */
633 host->card_busy = sh_mobile_sdhi_card_busy; 543 host->card_busy = renesas_sdhi_card_busy;
634 host->start_signal_voltage_switch = 544 host->start_signal_voltage_switch =
635 sh_mobile_sdhi_start_signal_voltage_switch; 545 renesas_sdhi_start_signal_voltage_switch;
636 } 546 }
637 547
638 /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */ 548 /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
@@ -643,7 +553,7 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
643 *mmc_data = *mmd; 553 *mmc_data = *mmd;
644 554
645 dma_priv->filter = shdma_chan_filter; 555 dma_priv->filter = shdma_chan_filter;
646 dma_priv->enable = sh_mobile_sdhi_enable_dma; 556 dma_priv->enable = renesas_sdhi_enable_dma;
647 557
648 mmc_data->alignment_shift = 1; /* 2-byte alignment */ 558 mmc_data->alignment_shift = 1; /* 2-byte alignment */
649 mmc_data->capabilities |= MMC_CAP_MMC_HIGHSPEED; 559 mmc_data->capabilities |= MMC_CAP_MMC_HIGHSPEED;
@@ -659,15 +569,13 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
659 */ 569 */
660 mmc_data->flags |= TMIO_MMC_SDIO_IRQ; 570 mmc_data->flags |= TMIO_MMC_SDIO_IRQ;
661 571
662 /* 572 /* All SDHI have CMD12 control bit */
663 * All SDHI have CMD12 controll bit
664 */
665 mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL; 573 mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL;
666 574
667 /* All SDHI have SDIO status bits which must be 1 */ 575 /* All SDHI have SDIO status bits which must be 1 */
668 mmc_data->flags |= TMIO_MMC_SDIO_STATUS_SETBITS; 576 mmc_data->flags |= TMIO_MMC_SDIO_STATUS_SETBITS;
669 577
670 ret = tmio_mmc_host_probe(host, mmc_data); 578 ret = tmio_mmc_host_probe(host, mmc_data, dma_ops);
671 if (ret < 0) 579 if (ret < 0)
672 goto efree; 580 goto efree;
673 581
@@ -675,7 +583,7 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
675 if (of_data && of_data->scc_offset && 583 if (of_data && of_data->scc_offset &&
676 (host->mmc->caps & MMC_CAP_UHS_SDR104 || 584 (host->mmc->caps & MMC_CAP_UHS_SDR104 ||
677 host->mmc->caps2 & MMC_CAP2_HS200_1_8V_SDR)) { 585 host->mmc->caps2 & MMC_CAP2_HS200_1_8V_SDR)) {
678 const struct sh_mobile_sdhi_scc *taps = of_data->taps; 586 const struct renesas_sdhi_scc *taps = of_data->taps;
679 bool hit = false; 587 bool hit = false;
680 588
681 host->mmc->caps |= MMC_CAP_HW_RESET; 589 host->mmc->caps |= MMC_CAP_HW_RESET;
@@ -693,11 +601,11 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
693 dev_warn(&host->pdev->dev, "Unknown clock rate for SDR104\n"); 601 dev_warn(&host->pdev->dev, "Unknown clock rate for SDR104\n");
694 602
695 priv->scc_ctl = host->ctl + of_data->scc_offset; 603 priv->scc_ctl = host->ctl + of_data->scc_offset;
696 host->init_tuning = sh_mobile_sdhi_init_tuning; 604 host->init_tuning = renesas_sdhi_init_tuning;
697 host->prepare_tuning = sh_mobile_sdhi_prepare_tuning; 605 host->prepare_tuning = renesas_sdhi_prepare_tuning;
698 host->select_tuning = sh_mobile_sdhi_select_tuning; 606 host->select_tuning = renesas_sdhi_select_tuning;
699 host->check_scc_error = sh_mobile_sdhi_check_scc_error; 607 host->check_scc_error = renesas_sdhi_check_scc_error;
700 host->hw_reset = sh_mobile_sdhi_hw_reset; 608 host->hw_reset = renesas_sdhi_hw_reset;
701 } 609 }
702 610
703 i = 0; 611 i = 0;
@@ -707,7 +615,7 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
707 break; 615 break;
708 i++; 616 i++;
709 ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, 0, 617 ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, 0,
710 dev_name(&pdev->dev), host); 618 dev_name(&pdev->dev), host);
711 if (ret) 619 if (ret)
712 goto eirq; 620 goto eirq;
713 } 621 }
@@ -732,8 +640,9 @@ efree:
732eprobe: 640eprobe:
733 return ret; 641 return ret;
734} 642}
643EXPORT_SYMBOL_GPL(renesas_sdhi_probe);
735 644
736static int sh_mobile_sdhi_remove(struct platform_device *pdev) 645int renesas_sdhi_remove(struct platform_device *pdev)
737{ 646{
738 struct mmc_host *mmc = platform_get_drvdata(pdev); 647 struct mmc_host *mmc = platform_get_drvdata(pdev);
739 struct tmio_mmc_host *host = mmc_priv(mmc); 648 struct tmio_mmc_host *host = mmc_priv(mmc);
@@ -742,28 +651,4 @@ static int sh_mobile_sdhi_remove(struct platform_device *pdev)
742 651
743 return 0; 652 return 0;
744} 653}
745 654EXPORT_SYMBOL_GPL(renesas_sdhi_remove);
746static const struct dev_pm_ops tmio_mmc_dev_pm_ops = {
747 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
748 pm_runtime_force_resume)
749 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
750 tmio_mmc_host_runtime_resume,
751 NULL)
752};
753
754static struct platform_driver sh_mobile_sdhi_driver = {
755 .driver = {
756 .name = "sh_mobile_sdhi",
757 .pm = &tmio_mmc_dev_pm_ops,
758 .of_match_table = sh_mobile_sdhi_of_match,
759 },
760 .probe = sh_mobile_sdhi_probe,
761 .remove = sh_mobile_sdhi_remove,
762};
763
764module_platform_driver(sh_mobile_sdhi_driver);
765
766MODULE_DESCRIPTION("SuperH Mobile SDHI driver");
767MODULE_AUTHOR("Magnus Damm");
768MODULE_LICENSE("GPL v2");
769MODULE_ALIAS("platform:sh_mobile_sdhi");
diff --git a/drivers/mmc/host/tmio_mmc_dma.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
index e2093db2b7ff..642a0dcc8c5c 100644
--- a/drivers/mmc/host/tmio_mmc_dma.c
+++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
@@ -1,13 +1,14 @@
1/* 1/*
2 * linux/drivers/mmc/tmio_mmc_dma.c 2 * DMA function for TMIO MMC implementations
3 * 3 *
4 * Copyright (C) 2016-17 Renesas Electronics Corporation
5 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
6 * Copyright (C) 2017 Horms Solutions, Simon Horman
4 * Copyright (C) 2010-2011 Guennadi Liakhovetski 7 * Copyright (C) 2010-2011 Guennadi Liakhovetski
5 * 8 *
6 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
9 *
10 * DMA function for TMIO MMC implementations
11 */ 12 */
12 13
13#include <linux/device.h> 14#include <linux/device.h>
@@ -15,14 +16,96 @@
15#include <linux/dmaengine.h> 16#include <linux/dmaengine.h>
16#include <linux/mfd/tmio.h> 17#include <linux/mfd/tmio.h>
17#include <linux/mmc/host.h> 18#include <linux/mmc/host.h>
19#include <linux/mod_devicetable.h>
20#include <linux/module.h>
18#include <linux/pagemap.h> 21#include <linux/pagemap.h>
19#include <linux/scatterlist.h> 22#include <linux/scatterlist.h>
20 23
24#include "renesas_sdhi.h"
21#include "tmio_mmc.h" 25#include "tmio_mmc.h"
22 26
23#define TMIO_MMC_MIN_DMA_LEN 8 27#define TMIO_MMC_MIN_DMA_LEN 8
24 28
25void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) 29static const struct renesas_sdhi_of_data of_default_cfg = {
30 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
31};
32
33static const struct renesas_sdhi_of_data of_rz_compatible = {
34 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT,
35 .tmio_ocr_mask = MMC_VDD_32_33,
36 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
37};
38
39static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
40 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
41 TMIO_MMC_CLK_ACTUAL,
42 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
43};
44
45/* Definitions for sampling clocks */
46static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = {
47 {
48 .clk_rate = 156000000,
49 .tap = 0x00000703,
50 },
51 {
52 .clk_rate = 0,
53 .tap = 0x00000300,
54 },
55};
56
57static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
58 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
59 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
60 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
61 MMC_CAP_CMD23,
62 .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
63 .dma_rx_offset = 0x2000,
64 .scc_offset = 0x0300,
65 .taps = rcar_gen2_scc_taps,
66 .taps_num = ARRAY_SIZE(rcar_gen2_scc_taps),
67};
68
69/* Definitions for sampling clocks */
70static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
71 {
72 .clk_rate = 0,
73 .tap = 0x00000300,
74 },
75};
76
77static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
78 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
79 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
80 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
81 MMC_CAP_CMD23,
82 .bus_shift = 2,
83 .scc_offset = 0x1000,
84 .taps = rcar_gen3_scc_taps,
85 .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps),
86};
87
88static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
89 { .compatible = "renesas,sdhi-shmobile" },
90 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
91 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
92 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
93 { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
94 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
95 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
96 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
97 { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
98 { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
99 { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
100 { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
101 { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
102 { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
103 {},
104};
105MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match);
106
107static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host,
108 bool enable)
26{ 109{
27 if (!host->chan_tx || !host->chan_rx) 110 if (!host->chan_tx || !host->chan_rx)
28 return; 111 return;
@@ -31,19 +114,19 @@ void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
31 host->dma->enable(host, enable); 114 host->dma->enable(host, enable);
32} 115}
33 116
34void tmio_mmc_abort_dma(struct tmio_mmc_host *host) 117static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host)
35{ 118{
36 tmio_mmc_enable_dma(host, false); 119 renesas_sdhi_sys_dmac_enable_dma(host, false);
37 120
38 if (host->chan_rx) 121 if (host->chan_rx)
39 dmaengine_terminate_all(host->chan_rx); 122 dmaengine_terminate_all(host->chan_rx);
40 if (host->chan_tx) 123 if (host->chan_tx)
41 dmaengine_terminate_all(host->chan_tx); 124 dmaengine_terminate_all(host->chan_tx);
42 125
43 tmio_mmc_enable_dma(host, true); 126 renesas_sdhi_sys_dmac_enable_dma(host, true);
44} 127}
45 128
46static void tmio_mmc_dma_callback(void *arg) 129static void renesas_sdhi_sys_dmac_dma_callback(void *arg)
47{ 130{
48 struct tmio_mmc_host *host = arg; 131 struct tmio_mmc_host *host = arg;
49 132
@@ -71,7 +154,7 @@ out:
71 spin_unlock_irq(&host->lock); 154 spin_unlock_irq(&host->lock);
72} 155}
73 156
74static void tmio_mmc_start_dma_rx(struct tmio_mmc_host *host) 157static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host)
75{ 158{
76 struct scatterlist *sg = host->sg_ptr, *sg_tmp; 159 struct scatterlist *sg = host->sg_ptr, *sg_tmp;
77 struct dma_async_tx_descriptor *desc = NULL; 160 struct dma_async_tx_descriptor *desc = NULL;
@@ -112,12 +195,12 @@ static void tmio_mmc_start_dma_rx(struct tmio_mmc_host *host)
112 195
113 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE); 196 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE);
114 if (ret > 0) 197 if (ret > 0)
115 desc = dmaengine_prep_slave_sg(chan, sg, ret, 198 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_DEV_TO_MEM,
116 DMA_DEV_TO_MEM, DMA_CTRL_ACK); 199 DMA_CTRL_ACK);
117 200
118 if (desc) { 201 if (desc) {
119 reinit_completion(&host->dma_dataend); 202 reinit_completion(&host->dma_dataend);
120 desc->callback = tmio_mmc_dma_callback; 203 desc->callback = renesas_sdhi_sys_dmac_dma_callback;
121 desc->callback_param = host; 204 desc->callback_param = host;
122 205
123 cookie = dmaengine_submit(desc); 206 cookie = dmaengine_submit(desc);
@@ -129,7 +212,7 @@ static void tmio_mmc_start_dma_rx(struct tmio_mmc_host *host)
129pio: 212pio:
130 if (!desc) { 213 if (!desc) {
131 /* DMA failed, fall back to PIO */ 214 /* DMA failed, fall back to PIO */
132 tmio_mmc_enable_dma(host, false); 215 renesas_sdhi_sys_dmac_enable_dma(host, false);
133 if (ret >= 0) 216 if (ret >= 0)
134 ret = -EIO; 217 ret = -EIO;
135 host->chan_rx = NULL; 218 host->chan_rx = NULL;
@@ -145,7 +228,7 @@ pio:
145 } 228 }
146} 229}
147 230
148static void tmio_mmc_start_dma_tx(struct tmio_mmc_host *host) 231static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host)
149{ 232{
150 struct scatterlist *sg = host->sg_ptr, *sg_tmp; 233 struct scatterlist *sg = host->sg_ptr, *sg_tmp;
151 struct dma_async_tx_descriptor *desc = NULL; 234 struct dma_async_tx_descriptor *desc = NULL;
@@ -181,6 +264,7 @@ static void tmio_mmc_start_dma_tx(struct tmio_mmc_host *host)
181 if (!aligned) { 264 if (!aligned) {
182 unsigned long flags; 265 unsigned long flags;
183 void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags); 266 void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags);
267
184 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length); 268 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
185 memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length); 269 memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length);
186 tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr); 270 tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr);
@@ -190,12 +274,12 @@ static void tmio_mmc_start_dma_tx(struct tmio_mmc_host *host)
190 274
191 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE); 275 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE);
192 if (ret > 0) 276 if (ret > 0)
193 desc = dmaengine_prep_slave_sg(chan, sg, ret, 277 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_MEM_TO_DEV,
194 DMA_MEM_TO_DEV, DMA_CTRL_ACK); 278 DMA_CTRL_ACK);
195 279
196 if (desc) { 280 if (desc) {
197 reinit_completion(&host->dma_dataend); 281 reinit_completion(&host->dma_dataend);
198 desc->callback = tmio_mmc_dma_callback; 282 desc->callback = renesas_sdhi_sys_dmac_dma_callback;
199 desc->callback_param = host; 283 desc->callback_param = host;
200 284
201 cookie = dmaengine_submit(desc); 285 cookie = dmaengine_submit(desc);
@@ -207,7 +291,7 @@ static void tmio_mmc_start_dma_tx(struct tmio_mmc_host *host)
207pio: 291pio:
208 if (!desc) { 292 if (!desc) {
209 /* DMA failed, fall back to PIO */ 293 /* DMA failed, fall back to PIO */
210 tmio_mmc_enable_dma(host, false); 294 renesas_sdhi_sys_dmac_enable_dma(host, false);
211 if (ret >= 0) 295 if (ret >= 0)
212 ret = -EIO; 296 ret = -EIO;
213 host->chan_tx = NULL; 297 host->chan_tx = NULL;
@@ -223,19 +307,19 @@ pio:
223 } 307 }
224} 308}
225 309
226void tmio_mmc_start_dma(struct tmio_mmc_host *host, 310static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host,
227 struct mmc_data *data) 311 struct mmc_data *data)
228{ 312{
229 if (data->flags & MMC_DATA_READ) { 313 if (data->flags & MMC_DATA_READ) {
230 if (host->chan_rx) 314 if (host->chan_rx)
231 tmio_mmc_start_dma_rx(host); 315 renesas_sdhi_sys_dmac_start_dma_rx(host);
232 } else { 316 } else {
233 if (host->chan_tx) 317 if (host->chan_tx)
234 tmio_mmc_start_dma_tx(host); 318 renesas_sdhi_sys_dmac_start_dma_tx(host);
235 } 319 }
236} 320}
237 321
238static void tmio_mmc_issue_tasklet_fn(unsigned long priv) 322static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv)
239{ 323{
240 struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv; 324 struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv;
241 struct dma_chan *chan = NULL; 325 struct dma_chan *chan = NULL;
@@ -257,11 +341,12 @@ static void tmio_mmc_issue_tasklet_fn(unsigned long priv)
257 dma_async_issue_pending(chan); 341 dma_async_issue_pending(chan);
258} 342}
259 343
260void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata) 344static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
345 struct tmio_mmc_data *pdata)
261{ 346{
262 /* We can only either use DMA for both Tx and Rx or not use it at all */ 347 /* We can only either use DMA for both Tx and Rx or not use it at all */
263 if (!host->dma || (!host->pdev->dev.of_node && 348 if (!host->dma || (!host->pdev->dev.of_node &&
264 (!pdata->chan_priv_tx || !pdata->chan_priv_rx))) 349 (!pdata->chan_priv_tx || !pdata->chan_priv_rx)))
265 return; 350 return;
266 351
267 if (!host->chan_tx && !host->chan_rx) { 352 if (!host->chan_tx && !host->chan_rx) {
@@ -287,7 +372,8 @@ void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdat
287 return; 372 return;
288 373
289 cfg.direction = DMA_MEM_TO_DEV; 374 cfg.direction = DMA_MEM_TO_DEV;
290 cfg.dst_addr = res->start + (CTL_SD_DATA_PORT << host->bus_shift); 375 cfg.dst_addr = res->start +
376 (CTL_SD_DATA_PORT << host->bus_shift);
291 cfg.dst_addr_width = host->dma->dma_buswidth; 377 cfg.dst_addr_width = host->dma->dma_buswidth;
292 if (!cfg.dst_addr_width) 378 if (!cfg.dst_addr_width)
293 cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 379 cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
@@ -320,10 +406,12 @@ void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdat
320 goto ebouncebuf; 406 goto ebouncebuf;
321 407
322 init_completion(&host->dma_dataend); 408 init_completion(&host->dma_dataend);
323 tasklet_init(&host->dma_issue, tmio_mmc_issue_tasklet_fn, (unsigned long)host); 409 tasklet_init(&host->dma_issue,
410 renesas_sdhi_sys_dmac_issue_tasklet_fn,
411 (unsigned long)host);
324 } 412 }
325 413
326 tmio_mmc_enable_dma(host, true); 414 renesas_sdhi_sys_dmac_enable_dma(host, true);
327 415
328 return; 416 return;
329 417
@@ -337,15 +425,17 @@ ecfgtx:
337 host->chan_tx = NULL; 425 host->chan_tx = NULL;
338} 426}
339 427
340void tmio_mmc_release_dma(struct tmio_mmc_host *host) 428static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host)
341{ 429{
342 if (host->chan_tx) { 430 if (host->chan_tx) {
343 struct dma_chan *chan = host->chan_tx; 431 struct dma_chan *chan = host->chan_tx;
432
344 host->chan_tx = NULL; 433 host->chan_tx = NULL;
345 dma_release_channel(chan); 434 dma_release_channel(chan);
346 } 435 }
347 if (host->chan_rx) { 436 if (host->chan_rx) {
348 struct dma_chan *chan = host->chan_rx; 437 struct dma_chan *chan = host->chan_rx;
438
349 host->chan_rx = NULL; 439 host->chan_rx = NULL;
350 dma_release_channel(chan); 440 dma_release_channel(chan);
351 } 441 }
@@ -354,3 +444,41 @@ void tmio_mmc_release_dma(struct tmio_mmc_host *host)
354 host->bounce_buf = NULL; 444 host->bounce_buf = NULL;
355 } 445 }
356} 446}
447
448static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = {
449 .start = renesas_sdhi_sys_dmac_start_dma,
450 .enable = renesas_sdhi_sys_dmac_enable_dma,
451 .request = renesas_sdhi_sys_dmac_request_dma,
452 .release = renesas_sdhi_sys_dmac_release_dma,
453 .abort = renesas_sdhi_sys_dmac_abort_dma,
454};
455
456static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev)
457{
458 return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops);
459}
460
461static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = {
462 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
463 pm_runtime_force_resume)
464 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
465 tmio_mmc_host_runtime_resume,
466 NULL)
467};
468
469static struct platform_driver renesas_sys_dmac_sdhi_driver = {
470 .driver = {
471 .name = "sh_mobile_sdhi",
472 .pm = &renesas_sdhi_sys_dmac_dev_pm_ops,
473 .of_match_table = renesas_sdhi_sys_dmac_of_match,
474 },
475 .probe = renesas_sdhi_sys_dmac_probe,
476 .remove = renesas_sdhi_remove,
477};
478
479module_platform_driver(renesas_sys_dmac_sdhi_driver);
480
481MODULE_DESCRIPTION("Renesas SDHI driver");
482MODULE_AUTHOR("Magnus Damm");
483MODULE_LICENSE("GPL v2");
484MODULE_ALIAS("platform:sh_mobile_sdhi");
diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c
index c6a9a1bfaa22..cf66a3db71b8 100644
--- a/drivers/mmc/host/sdhci-acpi.c
+++ b/drivers/mmc/host/sdhci-acpi.c
@@ -274,7 +274,6 @@ static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
274 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | 274 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
275 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR | 275 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
276 MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY, 276 MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
277 .caps2 = MMC_CAP2_HC_ERASE_SZ,
278 .flags = SDHCI_ACPI_RUNTIME_PM, 277 .flags = SDHCI_ACPI_RUNTIME_PM,
279 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 278 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
280 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 279 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
@@ -396,9 +395,6 @@ static int sdhci_acpi_probe(struct platform_device *pdev)
396 if (child->status.present && child->status.enabled) 395 if (child->status.present && child->status.enabled)
397 acpi_device_fix_up_power(child); 396 acpi_device_fix_up_power(child);
398 397
399 if (acpi_bus_get_status(device) || !device->status.present)
400 return -ENODEV;
401
402 if (sdhci_acpi_byt_defer(dev)) 398 if (sdhci_acpi_byt_defer(dev))
403 return -EPROBE_DEFER; 399 return -EPROBE_DEFER;
404 400
diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c
index 242c5dc7a81e..e2f638338e8f 100644
--- a/drivers/mmc/host/sdhci-brcmstb.c
+++ b/drivers/mmc/host/sdhci-brcmstb.c
@@ -89,9 +89,6 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
89 goto err_clk; 89 goto err_clk;
90 } 90 }
91 91
92 /* Enable MMC_CAP2_HC_ERASE_SZ for better max discard calculations */
93 host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
94
95 sdhci_get_of_property(pdev); 92 sdhci_get_of_property(pdev);
96 mmc_of_parse(host->mmc); 93 mmc_of_parse(host->mmc);
97 94
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 23d8b8a73ae9..85140c9af581 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -95,7 +95,7 @@
95#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1) 95#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
96 96
97/* 97/*
98 * There is an INT DMA ERR mis-match between eSDHC and STD SDHC SPEC: 98 * There is an INT DMA ERR mismatch between eSDHC and STD SDHC SPEC:
99 * Bit25 is used in STD SPEC, and is reserved in fsl eSDHC design, 99 * Bit25 is used in STD SPEC, and is reserved in fsl eSDHC design,
100 * but bit28 is used as the INT DMA ERR in fsl eSDHC design. 100 * but bit28 is used as the INT DMA ERR in fsl eSDHC design.
101 * Define this macro DMA error INT for fsl eSDHC 101 * Define this macro DMA error INT for fsl eSDHC
@@ -110,16 +110,11 @@
110 * In exact block transfer, the controller doesn't complete the 110 * In exact block transfer, the controller doesn't complete the
111 * operations automatically as required at the end of the 111 * operations automatically as required at the end of the
112 * transfer and remains on hold if the abort command is not sent. 112 * transfer and remains on hold if the abort command is not sent.
113 * As a result, the TC flag is not asserted and SW received timeout 113 * As a result, the TC flag is not asserted and SW received timeout
114 * exeception. Bit1 of Vendor Spec registor is used to fix it. 114 * exception. Bit1 of Vendor Spec register is used to fix it.
115 */ 115 */
116#define ESDHC_FLAG_MULTIBLK_NO_INT BIT(1) 116#define ESDHC_FLAG_MULTIBLK_NO_INT BIT(1)
117/* 117/*
118 * The flag enables the workaround for ESDHC errata ENGcm07207 which
119 * affects i.MX25 and i.MX35.
120 */
121#define ESDHC_FLAG_ENGCM07207 BIT(2)
122/*
123 * The flag tells that the ESDHC controller is an USDHC block that is 118 * The flag tells that the ESDHC controller is an USDHC block that is
124 * integrated on the i.MX6 series. 119 * integrated on the i.MX6 series.
125 */ 120 */
@@ -131,9 +126,11 @@
131/* The IP has SDHCI_CAPABILITIES_1 register */ 126/* The IP has SDHCI_CAPABILITIES_1 register */
132#define ESDHC_FLAG_HAVE_CAP1 BIT(6) 127#define ESDHC_FLAG_HAVE_CAP1 BIT(6)
133/* 128/*
134 * The IP has errata ERR004536 129 * The IP has erratum ERR004536
135 * uSDHC: ADMA Length Mismatch Error occurs if the AHB read access is slow, 130 * uSDHC: ADMA Length Mismatch Error occurs if the AHB read access is slow,
136 * when reading data from the card 131 * when reading data from the card
132 * This flag is also set for i.MX25 and i.MX35 in order to get
133 * SDHCI_QUIRK_BROKEN_ADMA, but for different reasons (ADMA capability bits).
137 */ 134 */
138#define ESDHC_FLAG_ERR004536 BIT(7) 135#define ESDHC_FLAG_ERR004536 BIT(7)
139/* The IP supports HS200 mode */ 136/* The IP supports HS200 mode */
@@ -141,7 +138,7 @@
141/* The IP supports HS400 mode */ 138/* The IP supports HS400 mode */
142#define ESDHC_FLAG_HS400 BIT(9) 139#define ESDHC_FLAG_HS400 BIT(9)
143 140
144/* A higher clock ferquency than this rate requires strobell dll control */ 141/* A clock frequency higher than this rate requires strobe dll control */
145#define ESDHC_STROBE_DLL_CLK_FREQ 100000000 142#define ESDHC_STROBE_DLL_CLK_FREQ 100000000
146 143
147struct esdhc_soc_data { 144struct esdhc_soc_data {
@@ -149,11 +146,11 @@ struct esdhc_soc_data {
149}; 146};
150 147
151static struct esdhc_soc_data esdhc_imx25_data = { 148static struct esdhc_soc_data esdhc_imx25_data = {
152 .flags = ESDHC_FLAG_ENGCM07207, 149 .flags = ESDHC_FLAG_ERR004536,
153}; 150};
154 151
155static struct esdhc_soc_data esdhc_imx35_data = { 152static struct esdhc_soc_data esdhc_imx35_data = {
156 .flags = ESDHC_FLAG_ENGCM07207, 153 .flags = ESDHC_FLAG_ERR004536,
157}; 154};
158 155
159static struct esdhc_soc_data esdhc_imx51_data = { 156static struct esdhc_soc_data esdhc_imx51_data = {
@@ -197,7 +194,7 @@ struct pltfm_imx_data {
197 struct clk *clk_ahb; 194 struct clk *clk_ahb;
198 struct clk *clk_per; 195 struct clk *clk_per;
199 enum { 196 enum {
200 NO_CMD_PENDING, /* no multiblock command pending*/ 197 NO_CMD_PENDING, /* no multiblock command pending */
201 MULTIBLK_IN_PROCESS, /* exact multiblock cmd in process */ 198 MULTIBLK_IN_PROCESS, /* exact multiblock cmd in process */
202 WAIT_FOR_INT, /* sent CMD12, waiting for response INT */ 199 WAIT_FOR_INT, /* sent CMD12, waiting for response INT */
203 } multiblock_status; 200 } multiblock_status;
@@ -286,7 +283,7 @@ static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
286 * ADMA2 capability of esdhc, but this bit is messed up on 283 * ADMA2 capability of esdhc, but this bit is messed up on
287 * some SOCs (e.g. on MX25, MX35 this bit is set, but they 284 * some SOCs (e.g. on MX25, MX35 this bit is set, but they
288 * don't actually support ADMA2). So set the BROKEN_ADMA 285 * don't actually support ADMA2). So set the BROKEN_ADMA
289 * uirk on MX25/35 platforms. 286 * quirk on MX25/35 platforms.
290 */ 287 */
291 288
292 if (val & SDHCI_CAN_DO_ADMA1) { 289 if (val & SDHCI_CAN_DO_ADMA1) {
@@ -351,7 +348,7 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
351 if ((val & SDHCI_INT_CARD_INT) && !esdhc_is_usdhc(imx_data)) { 348 if ((val & SDHCI_INT_CARD_INT) && !esdhc_is_usdhc(imx_data)) {
352 /* 349 /*
353 * Clear and then set D3CD bit to avoid missing the 350 * Clear and then set D3CD bit to avoid missing the
354 * card interrupt. This is a eSDHC controller problem 351 * card interrupt. This is an eSDHC controller problem
355 * so we need to apply the following workaround: clear 352 * so we need to apply the following workaround: clear
356 * and set D3CD bit will make eSDHC re-sample the card 353 * and set D3CD bit will make eSDHC re-sample the card
357 * interrupt. In case a card interrupt was lost, 354 * interrupt. In case a card interrupt was lost,
@@ -579,7 +576,7 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
579{ 576{
580 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 577 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
581 struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); 578 struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
582 u32 new_val; 579 u32 new_val = 0;
583 u32 mask; 580 u32 mask;
584 581
585 switch (reg) { 582 switch (reg) {
@@ -604,35 +601,52 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
604 * Do not touch buswidth bits here. This is done in 601 * Do not touch buswidth bits here. This is done in
605 * esdhc_pltfm_bus_width. 602 * esdhc_pltfm_bus_width.
606 * Do not touch the D3CD bit either which is used for the 603 * Do not touch the D3CD bit either which is used for the
607 * SDIO interrupt errata workaround. 604 * SDIO interrupt erratum workaround.
608 */ 605 */
609 mask = 0xffff & ~(ESDHC_CTRL_BUSWIDTH_MASK | ESDHC_CTRL_D3CD); 606 mask = 0xffff & ~(ESDHC_CTRL_BUSWIDTH_MASK | ESDHC_CTRL_D3CD);
610 607
611 esdhc_clrset_le(host, mask, new_val, reg); 608 esdhc_clrset_le(host, mask, new_val, reg);
612 return; 609 return;
610 case SDHCI_SOFTWARE_RESET:
611 if (val & SDHCI_RESET_DATA)
612 new_val = readl(host->ioaddr + SDHCI_HOST_CONTROL);
613 break;
613 } 614 }
614 esdhc_clrset_le(host, 0xff, val, reg); 615 esdhc_clrset_le(host, 0xff, val, reg);
615 616
616 /* 617 if (reg == SDHCI_SOFTWARE_RESET) {
617 * The esdhc has a design violation to SDHC spec which tells 618 if (val & SDHCI_RESET_ALL) {
618 * that software reset should not affect card detection circuit. 619 /*
619 * But esdhc clears its SYSCTL register bits [0..2] during the 620 * The esdhc has a design violation to SDHC spec which
620 * software reset. This will stop those clocks that card detection 621 * tells that software reset should not affect card
621 * circuit relies on. To work around it, we turn the clocks on back 622 * detection circuit. But esdhc clears its SYSCTL
622 * to keep card detection circuit functional. 623 * register bits [0..2] during the software reset. This
623 */ 624 * will stop those clocks that card detection circuit
624 if ((reg == SDHCI_SOFTWARE_RESET) && (val & 1)) { 625 * relies on. To work around it, we turn the clocks on
625 esdhc_clrset_le(host, 0x7, 0x7, ESDHC_SYSTEM_CONTROL); 626 * back to keep card detection circuit functional.
626 /* 627 */
627 * The reset on usdhc fails to clear MIX_CTRL register. 628 esdhc_clrset_le(host, 0x7, 0x7, ESDHC_SYSTEM_CONTROL);
628 * Do it manually here. 629 /*
629 */ 630 * The reset on usdhc fails to clear MIX_CTRL register.
630 if (esdhc_is_usdhc(imx_data)) { 631 * Do it manually here.
631 /* the tuning bits should be kept during reset */ 632 */
632 new_val = readl(host->ioaddr + ESDHC_MIX_CTRL); 633 if (esdhc_is_usdhc(imx_data)) {
633 writel(new_val & ESDHC_MIX_CTRL_TUNING_MASK, 634 /*
634 host->ioaddr + ESDHC_MIX_CTRL); 635 * the tuning bits should be kept during reset
635 imx_data->is_ddr = 0; 636 */
637 new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);
638 writel(new_val & ESDHC_MIX_CTRL_TUNING_MASK,
639 host->ioaddr + ESDHC_MIX_CTRL);
640 imx_data->is_ddr = 0;
641 }
642 } else if (val & SDHCI_RESET_DATA) {
643 /*
644 * The eSDHC DAT line software reset clears at least the
645 * data transfer width on i.MX25, so make sure that the
646 * Host Control register is unaffected.
647 */
648 esdhc_clrset_le(host, 0xff, new_val,
649 SDHCI_HOST_CONTROL);
636 } 650 }
637 } 651 }
638} 652}
@@ -657,7 +671,8 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host,
657 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 671 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
658 struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); 672 struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
659 unsigned int host_clock = pltfm_host->clock; 673 unsigned int host_clock = pltfm_host->clock;
660 int pre_div = 2; 674 int ddr_pre_div = imx_data->is_ddr ? 2 : 1;
675 int pre_div = 1;
661 int div = 1; 676 int div = 1;
662 u32 temp, val; 677 u32 temp, val;
663 678
@@ -672,28 +687,23 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host,
672 return; 687 return;
673 } 688 }
674 689
675 if (esdhc_is_usdhc(imx_data) && !imx_data->is_ddr)
676 pre_div = 1;
677
678 temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL); 690 temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL);
679 temp &= ~(ESDHC_CLOCK_IPGEN | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN 691 temp &= ~(ESDHC_CLOCK_IPGEN | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN
680 | ESDHC_CLOCK_MASK); 692 | ESDHC_CLOCK_MASK);
681 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); 693 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
682 694
683 while (host_clock / pre_div / 16 > clock && pre_div < 256) 695 while (host_clock / (16 * pre_div * ddr_pre_div) > clock &&
696 pre_div < 256)
684 pre_div *= 2; 697 pre_div *= 2;
685 698
686 while (host_clock / pre_div / div > clock && div < 16) 699 while (host_clock / (div * pre_div * ddr_pre_div) > clock && div < 16)
687 div++; 700 div++;
688 701
689 host->mmc->actual_clock = host_clock / pre_div / div; 702 host->mmc->actual_clock = host_clock / (div * pre_div * ddr_pre_div);
690 dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n", 703 dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",
691 clock, host->mmc->actual_clock); 704 clock, host->mmc->actual_clock);
692 705
693 if (imx_data->is_ddr) 706 pre_div >>= 1;
694 pre_div >>= 2;
695 else
696 pre_div >>= 1;
697 div--; 707 div--;
698 708
699 temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL); 709 temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL);
@@ -763,7 +773,7 @@ static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val)
763 writel(reg, host->ioaddr + ESDHC_MIX_CTRL); 773 writel(reg, host->ioaddr + ESDHC_MIX_CTRL);
764 writel(val << 8, host->ioaddr + ESDHC_TUNE_CTRL_STATUS); 774 writel(val << 8, host->ioaddr + ESDHC_TUNE_CTRL_STATUS);
765 dev_dbg(mmc_dev(host->mmc), 775 dev_dbg(mmc_dev(host->mmc),
766 "tunning with delay 0x%x ESDHC_TUNE_CTRL_STATUS 0x%x\n", 776 "tuning with delay 0x%x ESDHC_TUNE_CTRL_STATUS 0x%x\n",
767 val, readl(host->ioaddr + ESDHC_TUNE_CTRL_STATUS)); 777 val, readl(host->ioaddr + ESDHC_TUNE_CTRL_STATUS));
768} 778}
769 779
@@ -807,7 +817,7 @@ static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode)
807 ret = mmc_send_tuning(host->mmc, opcode, NULL); 817 ret = mmc_send_tuning(host->mmc, opcode, NULL);
808 esdhc_post_tuning(host); 818 esdhc_post_tuning(host);
809 819
810 dev_dbg(mmc_dev(host->mmc), "tunning %s at 0x%x ret %d\n", 820 dev_dbg(mmc_dev(host->mmc), "tuning %s at 0x%x ret %d\n",
811 ret ? "failed" : "passed", avg, ret); 821 ret ? "failed" : "passed", avg, ret);
812 822
813 return ret; 823 return ret;
@@ -847,15 +857,15 @@ static int esdhc_change_pinstate(struct sdhci_host *host,
847} 857}
848 858
849/* 859/*
850 * For HS400 eMMC, there is a data_strobe line, this signal is generated 860 * For HS400 eMMC, there is a data_strobe line. This signal is generated
851 * by the device and used for data output and CRC status response output 861 * by the device and used for data output and CRC status response output
852 * in HS400 mode. The frequency of this signal follows the frequency of 862 * in HS400 mode. The frequency of this signal follows the frequency of
853 * CLK generated by host. Host receive the data which is aligned to the 863 * CLK generated by host. The host receives the data which is aligned to the
854 * edge of data_strobe line. Due to the time delay between CLK line and 864 * edge of data_strobe line. Due to the time delay between CLK line and
855 * data_strobe line, if the delay time is larger than one clock cycle, 865 * data_strobe line, if the delay time is larger than one clock cycle,
856 * then CLK and data_strobe line will misaligned, read error shows up. 866 * then CLK and data_strobe line will be misaligned, read error shows up.
857 * So when the CLK is higher than 100MHz, each clock cycle is short enough, 867 * So when the CLK is higher than 100MHz, each clock cycle is short enough,
858 * host should config the delay target. 868 * host should configure the delay target.
859 */ 869 */
860static void esdhc_set_strobe_dll(struct sdhci_host *host) 870static void esdhc_set_strobe_dll(struct sdhci_host *host)
861{ 871{
@@ -895,7 +905,7 @@ static void esdhc_reset_tuning(struct sdhci_host *host)
895 struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); 905 struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
896 u32 ctrl; 906 u32 ctrl;
897 907
898 /* Rest the tuning circurt */ 908 /* Reset the tuning circuit */
899 if (esdhc_is_usdhc(imx_data)) { 909 if (esdhc_is_usdhc(imx_data)) {
900 if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) { 910 if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) {
901 ctrl = readl(host->ioaddr + ESDHC_MIX_CTRL); 911 ctrl = readl(host->ioaddr + ESDHC_MIX_CTRL);
@@ -976,7 +986,7 @@ static unsigned int esdhc_get_max_timeout_count(struct sdhci_host *host)
976 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 986 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
977 struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); 987 struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
978 988
979 /* Doc Errata: the uSDHC actual maximum timeout count is 1 << 29 */ 989 /* Doc Erratum: the uSDHC actual maximum timeout count is 1 << 29 */
980 return esdhc_is_usdhc(imx_data) ? 1 << 29 : 1 << 27; 990 return esdhc_is_usdhc(imx_data) ? 1 << 29 : 1 << 27;
981} 991}
982 992
@@ -1032,10 +1042,10 @@ static void sdhci_esdhc_imx_hwinit(struct sdhci_host *host)
1032 1042
1033 /* 1043 /*
1034 * ROM code will change the bit burst_length_enable setting 1044 * ROM code will change the bit burst_length_enable setting
1035 * to zero if this usdhc is choosed to boot system. Change 1045 * to zero if this usdhc is chosen to boot system. Change
1036 * it back here, otherwise it will impact the performance a 1046 * it back here, otherwise it will impact the performance a
1037 * lot. This bit is used to enable/disable the burst length 1047 * lot. This bit is used to enable/disable the burst length
1038 * for the external AHB2AXI bridge, it's usefully especially 1048 * for the external AHB2AXI bridge. It's useful especially
1039 * for INCR transfer because without burst length indicator, 1049 * for INCR transfer because without burst length indicator,
1040 * the AHB2AXI bridge does not know the burst length in 1050 * the AHB2AXI bridge does not know the burst length in
1041 * advance. And without burst length indicator, AHB INCR 1051 * advance. And without burst length indicator, AHB INCR
@@ -1045,7 +1055,7 @@ static void sdhci_esdhc_imx_hwinit(struct sdhci_host *host)
1045 | ESDHC_BURST_LEN_EN_INCR, 1055 | ESDHC_BURST_LEN_EN_INCR,
1046 host->ioaddr + SDHCI_HOST_CONTROL); 1056 host->ioaddr + SDHCI_HOST_CONTROL);
1047 /* 1057 /*
1048 * errata ESDHC_FLAG_ERR004536 fix for MX6Q TO1.2 and MX6DL 1058 * erratum ESDHC_FLAG_ERR004536 fix for MX6Q TO1.2 and MX6DL
1049 * TO1.1, it's harmless for MX6SL 1059 * TO1.1, it's harmless for MX6SL
1050 */ 1060 */
1051 writel(readl(host->ioaddr + 0x6c) | BIT(7), 1061 writel(readl(host->ioaddr + 0x6c) | BIT(7),
@@ -1104,7 +1114,7 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
1104 1114
1105 mmc_of_parse_voltage(np, &host->ocr_mask); 1115 mmc_of_parse_voltage(np, &host->ocr_mask);
1106 1116
1107 /* sdr50 and sdr104 needs work on 1.8v signal voltage */ 1117 /* sdr50 and sdr104 need work on 1.8v signal voltage */
1108 if ((boarddata->support_vsel) && esdhc_is_usdhc(imx_data) && 1118 if ((boarddata->support_vsel) && esdhc_is_usdhc(imx_data) &&
1109 !IS_ERR(imx_data->pins_default)) { 1119 !IS_ERR(imx_data->pins_default)) {
1110 imx_data->pins_100mhz = pinctrl_lookup_state(imx_data->pinctrl, 1120 imx_data->pins_100mhz = pinctrl_lookup_state(imx_data->pinctrl,
@@ -1116,7 +1126,8 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
1116 dev_warn(mmc_dev(host->mmc), 1126 dev_warn(mmc_dev(host->mmc),
1117 "could not get ultra high speed state, work on normal mode\n"); 1127 "could not get ultra high speed state, work on normal mode\n");
1118 /* 1128 /*
1119 * fall back to not support uhs by specify no 1.8v quirk 1129 * fall back to not supporting uhs by specifying no
1130 * 1.8v quirk
1120 */ 1131 */
1121 host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; 1132 host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
1122 } 1133 }
@@ -1250,14 +1261,20 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
1250 1261
1251 pltfm_host->clk = imx_data->clk_per; 1262 pltfm_host->clk = imx_data->clk_per;
1252 pltfm_host->clock = clk_get_rate(pltfm_host->clk); 1263 pltfm_host->clock = clk_get_rate(pltfm_host->clk);
1253 clk_prepare_enable(imx_data->clk_per); 1264 err = clk_prepare_enable(imx_data->clk_per);
1254 clk_prepare_enable(imx_data->clk_ipg); 1265 if (err)
1255 clk_prepare_enable(imx_data->clk_ahb); 1266 goto free_sdhci;
1267 err = clk_prepare_enable(imx_data->clk_ipg);
1268 if (err)
1269 goto disable_per_clk;
1270 err = clk_prepare_enable(imx_data->clk_ahb);
1271 if (err)
1272 goto disable_ipg_clk;
1256 1273
1257 imx_data->pinctrl = devm_pinctrl_get(&pdev->dev); 1274 imx_data->pinctrl = devm_pinctrl_get(&pdev->dev);
1258 if (IS_ERR(imx_data->pinctrl)) { 1275 if (IS_ERR(imx_data->pinctrl)) {
1259 err = PTR_ERR(imx_data->pinctrl); 1276 err = PTR_ERR(imx_data->pinctrl);
1260 goto disable_clk; 1277 goto disable_ahb_clk;
1261 } 1278 }
1262 1279
1263 imx_data->pins_default = pinctrl_lookup_state(imx_data->pinctrl, 1280 imx_data->pins_default = pinctrl_lookup_state(imx_data->pinctrl,
@@ -1265,11 +1282,6 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
1265 if (IS_ERR(imx_data->pins_default)) 1282 if (IS_ERR(imx_data->pins_default))
1266 dev_warn(mmc_dev(host->mmc), "could not get default state\n"); 1283 dev_warn(mmc_dev(host->mmc), "could not get default state\n");
1267 1284
1268 if (imx_data->socdata->flags & ESDHC_FLAG_ENGCM07207)
1269 /* Fix errata ENGcm07207 present on i.MX25 and i.MX35 */
1270 host->quirks |= SDHCI_QUIRK_NO_MULTIBLOCK
1271 | SDHCI_QUIRK_BROKEN_ADMA;
1272
1273 if (esdhc_is_usdhc(imx_data)) { 1285 if (esdhc_is_usdhc(imx_data)) {
1274 host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN; 1286 host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
1275 host->mmc->caps |= MMC_CAP_1_8V_DDR; 1287 host->mmc->caps |= MMC_CAP_1_8V_DDR;
@@ -1297,13 +1309,13 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
1297 else 1309 else
1298 err = sdhci_esdhc_imx_probe_nondt(pdev, host, imx_data); 1310 err = sdhci_esdhc_imx_probe_nondt(pdev, host, imx_data);
1299 if (err) 1311 if (err)
1300 goto disable_clk; 1312 goto disable_ahb_clk;
1301 1313
1302 sdhci_esdhc_imx_hwinit(host); 1314 sdhci_esdhc_imx_hwinit(host);
1303 1315
1304 err = sdhci_add_host(host); 1316 err = sdhci_add_host(host);
1305 if (err) 1317 if (err)
1306 goto disable_clk; 1318 goto disable_ahb_clk;
1307 1319
1308 pm_runtime_set_active(&pdev->dev); 1320 pm_runtime_set_active(&pdev->dev);
1309 pm_runtime_set_autosuspend_delay(&pdev->dev, 50); 1321 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
@@ -1313,10 +1325,12 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
1313 1325
1314 return 0; 1326 return 0;
1315 1327
1316disable_clk: 1328disable_ahb_clk:
1317 clk_disable_unprepare(imx_data->clk_per);
1318 clk_disable_unprepare(imx_data->clk_ipg);
1319 clk_disable_unprepare(imx_data->clk_ahb); 1329 clk_disable_unprepare(imx_data->clk_ahb);
1330disable_ipg_clk:
1331 clk_disable_unprepare(imx_data->clk_ipg);
1332disable_per_clk:
1333 clk_disable_unprepare(imx_data->clk_per);
1320free_sdhci: 1334free_sdhci:
1321 sdhci_pltfm_free(pdev); 1335 sdhci_pltfm_free(pdev);
1322 return err; 1336 return err;
@@ -1393,14 +1407,34 @@ static int sdhci_esdhc_runtime_resume(struct device *dev)
1393 struct sdhci_host *host = dev_get_drvdata(dev); 1407 struct sdhci_host *host = dev_get_drvdata(dev);
1394 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 1408 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
1395 struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); 1409 struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
1410 int err;
1396 1411
1397 if (!sdhci_sdio_irq_enabled(host)) { 1412 if (!sdhci_sdio_irq_enabled(host)) {
1398 clk_prepare_enable(imx_data->clk_per); 1413 err = clk_prepare_enable(imx_data->clk_per);
1399 clk_prepare_enable(imx_data->clk_ipg); 1414 if (err)
1415 return err;
1416 err = clk_prepare_enable(imx_data->clk_ipg);
1417 if (err)
1418 goto disable_per_clk;
1400 } 1419 }
1401 clk_prepare_enable(imx_data->clk_ahb); 1420 err = clk_prepare_enable(imx_data->clk_ahb);
1421 if (err)
1422 goto disable_ipg_clk;
1423 err = sdhci_runtime_resume_host(host);
1424 if (err)
1425 goto disable_ahb_clk;
1426
1427 return 0;
1402 1428
1403 return sdhci_runtime_resume_host(host); 1429disable_ahb_clk:
1430 clk_disable_unprepare(imx_data->clk_ahb);
1431disable_ipg_clk:
1432 if (!sdhci_sdio_irq_enabled(host))
1433 clk_disable_unprepare(imx_data->clk_ipg);
1434disable_per_clk:
1435 if (!sdhci_sdio_irq_enabled(host))
1436 clk_disable_unprepare(imx_data->clk_per);
1437 return err;
1404} 1438}
1405#endif 1439#endif
1406 1440
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index c4bbd7485987..e7893f21b65e 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -19,6 +19,7 @@
19 */ 19 */
20 20
21#define ESDHC_DEFAULT_QUIRKS (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \ 21#define ESDHC_DEFAULT_QUIRKS (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \
22 SDHCI_QUIRK_32BIT_DMA_ADDR | \
22 SDHCI_QUIRK_NO_BUSY_IRQ | \ 23 SDHCI_QUIRK_NO_BUSY_IRQ | \
23 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \ 24 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \
24 SDHCI_QUIRK_PIO_NEEDS_DELAY | \ 25 SDHCI_QUIRK_PIO_NEEDS_DELAY | \
diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
index ea6b36c88ae7..b13c0a7d50e4 100644
--- a/drivers/mmc/host/sdhci-of-arasan.c
+++ b/drivers/mmc/host/sdhci-of-arasan.c
@@ -638,7 +638,7 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
638 638
639 ret = mmc_of_parse(host->mmc); 639 ret = mmc_of_parse(host->mmc);
640 if (ret) { 640 if (ret) {
641 dev_err(&pdev->dev, "parsing dt failed (%u)\n", ret); 641 dev_err(&pdev->dev, "parsing dt failed (%d)\n", ret);
642 goto unreg_clk; 642 goto unreg_clk;
643 } 643 }
644 644
diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c
index 18957fea82ff..e1721ac37919 100644
--- a/drivers/mmc/host/sdhci-pci-core.c
+++ b/drivers/mmc/host/sdhci-pci-core.c
@@ -347,8 +347,7 @@ static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
347static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot) 347static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
348{ 348{
349 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE; 349 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
350 slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC | 350 slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC;
351 MMC_CAP2_HC_ERASE_SZ;
352 return 0; 351 return 0;
353} 352}
354 353
@@ -542,6 +541,23 @@ static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode,
542 } 541 }
543} 542}
544 543
544#define INTEL_HS400_ES_REG 0x78
545#define INTEL_HS400_ES_BIT BIT(0)
546
547static void intel_hs400_enhanced_strobe(struct mmc_host *mmc,
548 struct mmc_ios *ios)
549{
550 struct sdhci_host *host = mmc_priv(mmc);
551 u32 val;
552
553 val = sdhci_readl(host, INTEL_HS400_ES_REG);
554 if (ios->enhanced_strobe)
555 val |= INTEL_HS400_ES_BIT;
556 else
557 val &= ~INTEL_HS400_ES_BIT;
558 sdhci_writel(host, val, INTEL_HS400_ES_REG);
559}
560
545static const struct sdhci_ops sdhci_intel_byt_ops = { 561static const struct sdhci_ops sdhci_intel_byt_ops = {
546 .set_clock = sdhci_set_clock, 562 .set_clock = sdhci_set_clock,
547 .set_power = sdhci_intel_set_power, 563 .set_power = sdhci_intel_set_power,
@@ -569,7 +585,6 @@ static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
569 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR | 585 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
570 MMC_CAP_CMD_DURING_TFR | 586 MMC_CAP_CMD_DURING_TFR |
571 MMC_CAP_WAIT_WHILE_BUSY; 587 MMC_CAP_WAIT_WHILE_BUSY;
572 slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
573 slot->hw_reset = sdhci_pci_int_hw_reset; 588 slot->hw_reset = sdhci_pci_int_hw_reset;
574 if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC) 589 if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC)
575 slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */ 590 slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
@@ -578,6 +593,19 @@ static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
578 return 0; 593 return 0;
579} 594}
580 595
596static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot)
597{
598 int ret = byt_emmc_probe_slot(slot);
599
600 if (slot->chip->pdev->device != PCI_DEVICE_ID_INTEL_GLK_EMMC) {
601 slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES,
602 slot->host->mmc_host_ops.hs400_enhanced_strobe =
603 intel_hs400_enhanced_strobe;
604 }
605
606 return ret;
607}
608
581#ifdef CONFIG_ACPI 609#ifdef CONFIG_ACPI
582static int ni_set_max_freq(struct sdhci_pci_slot *slot) 610static int ni_set_max_freq(struct sdhci_pci_slot *slot)
583{ 611{
@@ -630,7 +658,7 @@ static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
630{ 658{
631 byt_read_dsm(slot); 659 byt_read_dsm(slot);
632 slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | 660 slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY |
633 MMC_CAP_AGGRESSIVE_PM; 661 MMC_CAP_AGGRESSIVE_PM | MMC_CAP_CD_WAKE;
634 slot->cd_idx = 0; 662 slot->cd_idx = 0;
635 slot->cd_override_level = true; 663 slot->cd_override_level = true;
636 if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD || 664 if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD ||
@@ -653,6 +681,17 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
653 .priv_size = sizeof(struct intel_host), 681 .priv_size = sizeof(struct intel_host),
654}; 682};
655 683
684static const struct sdhci_pci_fixes sdhci_intel_glk_emmc = {
685 .allow_runtime_pm = true,
686 .probe_slot = glk_emmc_probe_slot,
687 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
688 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
689 SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
690 SDHCI_QUIRK2_STOP_WITH_TC,
691 .ops = &sdhci_intel_byt_ops,
692 .priv_size = sizeof(struct intel_host),
693};
694
656static const struct sdhci_pci_fixes sdhci_ni_byt_sdio = { 695static const struct sdhci_pci_fixes sdhci_ni_byt_sdio = {
657 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 696 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
658 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON | 697 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON |
@@ -1170,554 +1209,79 @@ static const struct sdhci_pci_fixes sdhci_amd = {
1170}; 1209};
1171 1210
1172static const struct pci_device_id pci_ids[] = { 1211static const struct pci_device_id pci_ids[] = {
1173 { 1212 SDHCI_PCI_DEVICE(RICOH, R5C822, ricoh),
1174 .vendor = PCI_VENDOR_ID_RICOH, 1213 SDHCI_PCI_DEVICE(RICOH, R5C843, ricoh_mmc),
1175 .device = PCI_DEVICE_ID_RICOH_R5C822, 1214 SDHCI_PCI_DEVICE(RICOH, R5CE822, ricoh_mmc),
1176 .subvendor = PCI_ANY_ID, 1215 SDHCI_PCI_DEVICE(RICOH, R5CE823, ricoh_mmc),
1177 .subdevice = PCI_ANY_ID, 1216 SDHCI_PCI_DEVICE(ENE, CB712_SD, ene_712),
1178 .driver_data = (kernel_ulong_t)&sdhci_ricoh, 1217 SDHCI_PCI_DEVICE(ENE, CB712_SD_2, ene_712),
1179 }, 1218 SDHCI_PCI_DEVICE(ENE, CB714_SD, ene_714),
1180 1219 SDHCI_PCI_DEVICE(ENE, CB714_SD_2, ene_714),
1181 { 1220 SDHCI_PCI_DEVICE(MARVELL, 88ALP01_SD, cafe),
1182 .vendor = PCI_VENDOR_ID_RICOH, 1221 SDHCI_PCI_DEVICE(JMICRON, JMB38X_SD, jmicron),
1183 .device = 0x843, 1222 SDHCI_PCI_DEVICE(JMICRON, JMB38X_MMC, jmicron),
1184 .subvendor = PCI_ANY_ID, 1223 SDHCI_PCI_DEVICE(JMICRON, JMB388_SD, jmicron),
1185 .subdevice = PCI_ANY_ID, 1224 SDHCI_PCI_DEVICE(JMICRON, JMB388_ESD, jmicron),
1186 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc, 1225 SDHCI_PCI_DEVICE(SYSKONNECT, 8000, syskt),
1187 }, 1226 SDHCI_PCI_DEVICE(VIA, 95D0, via),
1188 1227 SDHCI_PCI_DEVICE(REALTEK, 5250, rtsx),
1189 { 1228 SDHCI_PCI_DEVICE(INTEL, QRK_SD, intel_qrk),
1190 .vendor = PCI_VENDOR_ID_RICOH, 1229 SDHCI_PCI_DEVICE(INTEL, MRST_SD0, intel_mrst_hc0),
1191 .device = 0xe822, 1230 SDHCI_PCI_DEVICE(INTEL, MRST_SD1, intel_mrst_hc1_hc2),
1192 .subvendor = PCI_ANY_ID, 1231 SDHCI_PCI_DEVICE(INTEL, MRST_SD2, intel_mrst_hc1_hc2),
1193 .subdevice = PCI_ANY_ID, 1232 SDHCI_PCI_DEVICE(INTEL, MFD_SD, intel_mfd_sd),
1194 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc, 1233 SDHCI_PCI_DEVICE(INTEL, MFD_SDIO1, intel_mfd_sdio),
1195 }, 1234 SDHCI_PCI_DEVICE(INTEL, MFD_SDIO2, intel_mfd_sdio),
1196 1235 SDHCI_PCI_DEVICE(INTEL, MFD_EMMC0, intel_mfd_emmc),
1197 { 1236 SDHCI_PCI_DEVICE(INTEL, MFD_EMMC1, intel_mfd_emmc),
1198 .vendor = PCI_VENDOR_ID_RICOH, 1237 SDHCI_PCI_DEVICE(INTEL, PCH_SDIO0, intel_pch_sdio),
1199 .device = 0xe823, 1238 SDHCI_PCI_DEVICE(INTEL, PCH_SDIO1, intel_pch_sdio),
1200 .subvendor = PCI_ANY_ID, 1239 SDHCI_PCI_DEVICE(INTEL, BYT_EMMC, intel_byt_emmc),
1201 .subdevice = PCI_ANY_ID, 1240 SDHCI_PCI_SUBDEVICE(INTEL, BYT_SDIO, NI, 7884, ni_byt_sdio),
1202 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc, 1241 SDHCI_PCI_DEVICE(INTEL, BYT_SDIO, intel_byt_sdio),
1203 }, 1242 SDHCI_PCI_DEVICE(INTEL, BYT_SD, intel_byt_sd),
1204 1243 SDHCI_PCI_DEVICE(INTEL, BYT_EMMC2, intel_byt_emmc),
1205 { 1244 SDHCI_PCI_DEVICE(INTEL, BSW_EMMC, intel_byt_emmc),
1206 .vendor = PCI_VENDOR_ID_ENE, 1245 SDHCI_PCI_DEVICE(INTEL, BSW_SDIO, intel_byt_sdio),
1207 .device = PCI_DEVICE_ID_ENE_CB712_SD, 1246 SDHCI_PCI_DEVICE(INTEL, BSW_SD, intel_byt_sd),
1208 .subvendor = PCI_ANY_ID, 1247 SDHCI_PCI_DEVICE(INTEL, CLV_SDIO0, intel_mfd_sd),
1209 .subdevice = PCI_ANY_ID, 1248 SDHCI_PCI_DEVICE(INTEL, CLV_SDIO1, intel_mfd_sdio),
1210 .driver_data = (kernel_ulong_t)&sdhci_ene_712, 1249 SDHCI_PCI_DEVICE(INTEL, CLV_SDIO2, intel_mfd_sdio),
1211 }, 1250 SDHCI_PCI_DEVICE(INTEL, CLV_EMMC0, intel_mfd_emmc),
1212 1251 SDHCI_PCI_DEVICE(INTEL, CLV_EMMC1, intel_mfd_emmc),
1213 { 1252 SDHCI_PCI_DEVICE(INTEL, MRFLD_MMC, intel_mrfld_mmc),
1214 .vendor = PCI_VENDOR_ID_ENE, 1253 SDHCI_PCI_DEVICE(INTEL, SPT_EMMC, intel_byt_emmc),
1215 .device = PCI_DEVICE_ID_ENE_CB712_SD_2, 1254 SDHCI_PCI_DEVICE(INTEL, SPT_SDIO, intel_byt_sdio),
1216 .subvendor = PCI_ANY_ID, 1255 SDHCI_PCI_DEVICE(INTEL, SPT_SD, intel_byt_sd),
1217 .subdevice = PCI_ANY_ID, 1256 SDHCI_PCI_DEVICE(INTEL, DNV_EMMC, intel_byt_emmc),
1218 .driver_data = (kernel_ulong_t)&sdhci_ene_712, 1257 SDHCI_PCI_DEVICE(INTEL, BXT_EMMC, intel_byt_emmc),
1219 }, 1258 SDHCI_PCI_DEVICE(INTEL, BXT_SDIO, intel_byt_sdio),
1220 1259 SDHCI_PCI_DEVICE(INTEL, BXT_SD, intel_byt_sd),
1221 { 1260 SDHCI_PCI_DEVICE(INTEL, BXTM_EMMC, intel_byt_emmc),
1222 .vendor = PCI_VENDOR_ID_ENE, 1261 SDHCI_PCI_DEVICE(INTEL, BXTM_SDIO, intel_byt_sdio),
1223 .device = PCI_DEVICE_ID_ENE_CB714_SD, 1262 SDHCI_PCI_DEVICE(INTEL, BXTM_SD, intel_byt_sd),
1224 .subvendor = PCI_ANY_ID, 1263 SDHCI_PCI_DEVICE(INTEL, APL_EMMC, intel_byt_emmc),
1225 .subdevice = PCI_ANY_ID, 1264 SDHCI_PCI_DEVICE(INTEL, APL_SDIO, intel_byt_sdio),
1226 .driver_data = (kernel_ulong_t)&sdhci_ene_714, 1265 SDHCI_PCI_DEVICE(INTEL, APL_SD, intel_byt_sd),
1227 }, 1266 SDHCI_PCI_DEVICE(INTEL, GLK_EMMC, intel_glk_emmc),
1228 1267 SDHCI_PCI_DEVICE(INTEL, GLK_SDIO, intel_byt_sdio),
1229 { 1268 SDHCI_PCI_DEVICE(INTEL, GLK_SD, intel_byt_sd),
1230 .vendor = PCI_VENDOR_ID_ENE, 1269 SDHCI_PCI_DEVICE(INTEL, CNP_EMMC, intel_glk_emmc),
1231 .device = PCI_DEVICE_ID_ENE_CB714_SD_2, 1270 SDHCI_PCI_DEVICE(INTEL, CNP_SD, intel_byt_sd),
1232 .subvendor = PCI_ANY_ID, 1271 SDHCI_PCI_DEVICE(INTEL, CNPH_SD, intel_byt_sd),
1233 .subdevice = PCI_ANY_ID, 1272 SDHCI_PCI_DEVICE(O2, 8120, o2),
1234 .driver_data = (kernel_ulong_t)&sdhci_ene_714, 1273 SDHCI_PCI_DEVICE(O2, 8220, o2),
1235 }, 1274 SDHCI_PCI_DEVICE(O2, 8221, o2),
1236 1275 SDHCI_PCI_DEVICE(O2, 8320, o2),
1237 { 1276 SDHCI_PCI_DEVICE(O2, 8321, o2),
1238 .vendor = PCI_VENDOR_ID_MARVELL, 1277 SDHCI_PCI_DEVICE(O2, FUJIN2, o2),
1239 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD, 1278 SDHCI_PCI_DEVICE(O2, SDS0, o2),
1240 .subvendor = PCI_ANY_ID, 1279 SDHCI_PCI_DEVICE(O2, SDS1, o2),
1241 .subdevice = PCI_ANY_ID, 1280 SDHCI_PCI_DEVICE(O2, SEABIRD0, o2),
1242 .driver_data = (kernel_ulong_t)&sdhci_cafe, 1281 SDHCI_PCI_DEVICE(O2, SEABIRD1, o2),
1243 }, 1282 SDHCI_PCI_DEVICE_CLASS(AMD, SYSTEM_SDHCI, PCI_CLASS_MASK, amd),
1244 1283 /* Generic SD host controller */
1245 { 1284 {PCI_DEVICE_CLASS(SYSTEM_SDHCI, PCI_CLASS_MASK)},
1246 .vendor = PCI_VENDOR_ID_JMICRON,
1247 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
1248 .subvendor = PCI_ANY_ID,
1249 .subdevice = PCI_ANY_ID,
1250 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
1251 },
1252
1253 {
1254 .vendor = PCI_VENDOR_ID_JMICRON,
1255 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
1256 .subvendor = PCI_ANY_ID,
1257 .subdevice = PCI_ANY_ID,
1258 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
1259 },
1260
1261 {
1262 .vendor = PCI_VENDOR_ID_JMICRON,
1263 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
1264 .subvendor = PCI_ANY_ID,
1265 .subdevice = PCI_ANY_ID,
1266 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
1267 },
1268
1269 {
1270 .vendor = PCI_VENDOR_ID_JMICRON,
1271 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
1272 .subvendor = PCI_ANY_ID,
1273 .subdevice = PCI_ANY_ID,
1274 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
1275 },
1276
1277 {
1278 .vendor = PCI_VENDOR_ID_SYSKONNECT,
1279 .device = 0x8000,
1280 .subvendor = PCI_ANY_ID,
1281 .subdevice = PCI_ANY_ID,
1282 .driver_data = (kernel_ulong_t)&sdhci_syskt,
1283 },
1284
1285 {
1286 .vendor = PCI_VENDOR_ID_VIA,
1287 .device = 0x95d0,
1288 .subvendor = PCI_ANY_ID,
1289 .subdevice = PCI_ANY_ID,
1290 .driver_data = (kernel_ulong_t)&sdhci_via,
1291 },
1292
1293 {
1294 .vendor = PCI_VENDOR_ID_REALTEK,
1295 .device = 0x5250,
1296 .subvendor = PCI_ANY_ID,
1297 .subdevice = PCI_ANY_ID,
1298 .driver_data = (kernel_ulong_t)&sdhci_rtsx,
1299 },
1300
1301 {
1302 .vendor = PCI_VENDOR_ID_INTEL,
1303 .device = PCI_DEVICE_ID_INTEL_QRK_SD,
1304 .subvendor = PCI_ANY_ID,
1305 .subdevice = PCI_ANY_ID,
1306 .driver_data = (kernel_ulong_t)&sdhci_intel_qrk,
1307 },
1308
1309 {
1310 .vendor = PCI_VENDOR_ID_INTEL,
1311 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
1312 .subvendor = PCI_ANY_ID,
1313 .subdevice = PCI_ANY_ID,
1314 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
1315 },
1316
1317 {
1318 .vendor = PCI_VENDOR_ID_INTEL,
1319 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
1320 .subvendor = PCI_ANY_ID,
1321 .subdevice = PCI_ANY_ID,
1322 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
1323 },
1324
1325 {
1326 .vendor = PCI_VENDOR_ID_INTEL,
1327 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
1328 .subvendor = PCI_ANY_ID,
1329 .subdevice = PCI_ANY_ID,
1330 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
1331 },
1332
1333 {
1334 .vendor = PCI_VENDOR_ID_INTEL,
1335 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
1336 .subvendor = PCI_ANY_ID,
1337 .subdevice = PCI_ANY_ID,
1338 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
1339 },
1340
1341 {
1342 .vendor = PCI_VENDOR_ID_INTEL,
1343 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
1344 .subvendor = PCI_ANY_ID,
1345 .subdevice = PCI_ANY_ID,
1346 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1347 },
1348
1349 {
1350 .vendor = PCI_VENDOR_ID_INTEL,
1351 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
1352 .subvendor = PCI_ANY_ID,
1353 .subdevice = PCI_ANY_ID,
1354 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1355 },
1356
1357 {
1358 .vendor = PCI_VENDOR_ID_INTEL,
1359 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
1360 .subvendor = PCI_ANY_ID,
1361 .subdevice = PCI_ANY_ID,
1362 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1363 },
1364
1365 {
1366 .vendor = PCI_VENDOR_ID_INTEL,
1367 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
1368 .subvendor = PCI_ANY_ID,
1369 .subdevice = PCI_ANY_ID,
1370 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1371 },
1372
1373 {
1374 .vendor = PCI_VENDOR_ID_INTEL,
1375 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
1376 .subvendor = PCI_ANY_ID,
1377 .subdevice = PCI_ANY_ID,
1378 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
1379 },
1380
1381 {
1382 .vendor = PCI_VENDOR_ID_INTEL,
1383 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
1384 .subvendor = PCI_ANY_ID,
1385 .subdevice = PCI_ANY_ID,
1386 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
1387 },
1388
1389 {
1390 .vendor = PCI_VENDOR_ID_INTEL,
1391 .device = PCI_DEVICE_ID_INTEL_BYT_EMMC,
1392 .subvendor = PCI_ANY_ID,
1393 .subdevice = PCI_ANY_ID,
1394 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1395 },
1396
1397 {
1398 .vendor = PCI_VENDOR_ID_INTEL,
1399 .device = PCI_DEVICE_ID_INTEL_BYT_SDIO,
1400 .subvendor = PCI_VENDOR_ID_NI,
1401 .subdevice = 0x7884,
1402 .driver_data = (kernel_ulong_t)&sdhci_ni_byt_sdio,
1403 },
1404
1405 {
1406 .vendor = PCI_VENDOR_ID_INTEL,
1407 .device = PCI_DEVICE_ID_INTEL_BYT_SDIO,
1408 .subvendor = PCI_ANY_ID,
1409 .subdevice = PCI_ANY_ID,
1410 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1411 },
1412
1413 {
1414 .vendor = PCI_VENDOR_ID_INTEL,
1415 .device = PCI_DEVICE_ID_INTEL_BYT_SD,
1416 .subvendor = PCI_ANY_ID,
1417 .subdevice = PCI_ANY_ID,
1418 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
1419 },
1420
1421 {
1422 .vendor = PCI_VENDOR_ID_INTEL,
1423 .device = PCI_DEVICE_ID_INTEL_BYT_EMMC2,
1424 .subvendor = PCI_ANY_ID,
1425 .subdevice = PCI_ANY_ID,
1426 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1427 },
1428
1429 {
1430 .vendor = PCI_VENDOR_ID_INTEL,
1431 .device = PCI_DEVICE_ID_INTEL_BSW_EMMC,
1432 .subvendor = PCI_ANY_ID,
1433 .subdevice = PCI_ANY_ID,
1434 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1435 },
1436
1437 {
1438 .vendor = PCI_VENDOR_ID_INTEL,
1439 .device = PCI_DEVICE_ID_INTEL_BSW_SDIO,
1440 .subvendor = PCI_ANY_ID,
1441 .subdevice = PCI_ANY_ID,
1442 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1443 },
1444
1445 {
1446 .vendor = PCI_VENDOR_ID_INTEL,
1447 .device = PCI_DEVICE_ID_INTEL_BSW_SD,
1448 .subvendor = PCI_ANY_ID,
1449 .subdevice = PCI_ANY_ID,
1450 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
1451 },
1452
1453 {
1454 .vendor = PCI_VENDOR_ID_INTEL,
1455 .device = PCI_DEVICE_ID_INTEL_CLV_SDIO0,
1456 .subvendor = PCI_ANY_ID,
1457 .subdevice = PCI_ANY_ID,
1458 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
1459 },
1460
1461 {
1462 .vendor = PCI_VENDOR_ID_INTEL,
1463 .device = PCI_DEVICE_ID_INTEL_CLV_SDIO1,
1464 .subvendor = PCI_ANY_ID,
1465 .subdevice = PCI_ANY_ID,
1466 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1467 },
1468
1469 {
1470 .vendor = PCI_VENDOR_ID_INTEL,
1471 .device = PCI_DEVICE_ID_INTEL_CLV_SDIO2,
1472 .subvendor = PCI_ANY_ID,
1473 .subdevice = PCI_ANY_ID,
1474 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1475 },
1476
1477 {
1478 .vendor = PCI_VENDOR_ID_INTEL,
1479 .device = PCI_DEVICE_ID_INTEL_CLV_EMMC0,
1480 .subvendor = PCI_ANY_ID,
1481 .subdevice = PCI_ANY_ID,
1482 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1483 },
1484
1485 {
1486 .vendor = PCI_VENDOR_ID_INTEL,
1487 .device = PCI_DEVICE_ID_INTEL_CLV_EMMC1,
1488 .subvendor = PCI_ANY_ID,
1489 .subdevice = PCI_ANY_ID,
1490 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1491 },
1492
1493 {
1494 .vendor = PCI_VENDOR_ID_INTEL,
1495 .device = PCI_DEVICE_ID_INTEL_MRFLD_MMC,
1496 .subvendor = PCI_ANY_ID,
1497 .subdevice = PCI_ANY_ID,
1498 .driver_data = (kernel_ulong_t)&sdhci_intel_mrfld_mmc,
1499 },
1500
1501 {
1502 .vendor = PCI_VENDOR_ID_INTEL,
1503 .device = PCI_DEVICE_ID_INTEL_SPT_EMMC,
1504 .subvendor = PCI_ANY_ID,
1505 .subdevice = PCI_ANY_ID,
1506 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1507 },
1508
1509 {
1510 .vendor = PCI_VENDOR_ID_INTEL,
1511 .device = PCI_DEVICE_ID_INTEL_SPT_SDIO,
1512 .subvendor = PCI_ANY_ID,
1513 .subdevice = PCI_ANY_ID,
1514 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1515 },
1516
1517 {
1518 .vendor = PCI_VENDOR_ID_INTEL,
1519 .device = PCI_DEVICE_ID_INTEL_SPT_SD,
1520 .subvendor = PCI_ANY_ID,
1521 .subdevice = PCI_ANY_ID,
1522 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
1523 },
1524
1525 {
1526 .vendor = PCI_VENDOR_ID_INTEL,
1527 .device = PCI_DEVICE_ID_INTEL_DNV_EMMC,
1528 .subvendor = PCI_ANY_ID,
1529 .subdevice = PCI_ANY_ID,
1530 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1531 },
1532
1533 {
1534 .vendor = PCI_VENDOR_ID_INTEL,
1535 .device = PCI_DEVICE_ID_INTEL_BXT_EMMC,
1536 .subvendor = PCI_ANY_ID,
1537 .subdevice = PCI_ANY_ID,
1538 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1539 },
1540
1541 {
1542 .vendor = PCI_VENDOR_ID_INTEL,
1543 .device = PCI_DEVICE_ID_INTEL_BXT_SDIO,
1544 .subvendor = PCI_ANY_ID,
1545 .subdevice = PCI_ANY_ID,
1546 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1547 },
1548
1549 {
1550 .vendor = PCI_VENDOR_ID_INTEL,
1551 .device = PCI_DEVICE_ID_INTEL_BXT_SD,
1552 .subvendor = PCI_ANY_ID,
1553 .subdevice = PCI_ANY_ID,
1554 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
1555 },
1556
1557 {
1558 .vendor = PCI_VENDOR_ID_INTEL,
1559 .device = PCI_DEVICE_ID_INTEL_BXTM_EMMC,
1560 .subvendor = PCI_ANY_ID,
1561 .subdevice = PCI_ANY_ID,
1562 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1563 },
1564
1565 {
1566 .vendor = PCI_VENDOR_ID_INTEL,
1567 .device = PCI_DEVICE_ID_INTEL_BXTM_SDIO,
1568 .subvendor = PCI_ANY_ID,
1569 .subdevice = PCI_ANY_ID,
1570 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1571 },
1572
1573 {
1574 .vendor = PCI_VENDOR_ID_INTEL,
1575 .device = PCI_DEVICE_ID_INTEL_BXTM_SD,
1576 .subvendor = PCI_ANY_ID,
1577 .subdevice = PCI_ANY_ID,
1578 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
1579 },
1580
1581 {
1582 .vendor = PCI_VENDOR_ID_INTEL,
1583 .device = PCI_DEVICE_ID_INTEL_APL_EMMC,
1584 .subvendor = PCI_ANY_ID,
1585 .subdevice = PCI_ANY_ID,
1586 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1587 },
1588
1589 {
1590 .vendor = PCI_VENDOR_ID_INTEL,
1591 .device = PCI_DEVICE_ID_INTEL_APL_SDIO,
1592 .subvendor = PCI_ANY_ID,
1593 .subdevice = PCI_ANY_ID,
1594 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1595 },
1596
1597 {
1598 .vendor = PCI_VENDOR_ID_INTEL,
1599 .device = PCI_DEVICE_ID_INTEL_APL_SD,
1600 .subvendor = PCI_ANY_ID,
1601 .subdevice = PCI_ANY_ID,
1602 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
1603 },
1604
1605 {
1606 .vendor = PCI_VENDOR_ID_INTEL,
1607 .device = PCI_DEVICE_ID_INTEL_GLK_EMMC,
1608 .subvendor = PCI_ANY_ID,
1609 .subdevice = PCI_ANY_ID,
1610 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1611 },
1612
1613 {
1614 .vendor = PCI_VENDOR_ID_INTEL,
1615 .device = PCI_DEVICE_ID_INTEL_GLK_SDIO,
1616 .subvendor = PCI_ANY_ID,
1617 .subdevice = PCI_ANY_ID,
1618 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1619 },
1620
1621 {
1622 .vendor = PCI_VENDOR_ID_INTEL,
1623 .device = PCI_DEVICE_ID_INTEL_GLK_SD,
1624 .subvendor = PCI_ANY_ID,
1625 .subdevice = PCI_ANY_ID,
1626 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
1627 },
1628
1629 {
1630 .vendor = PCI_VENDOR_ID_O2,
1631 .device = PCI_DEVICE_ID_O2_8120,
1632 .subvendor = PCI_ANY_ID,
1633 .subdevice = PCI_ANY_ID,
1634 .driver_data = (kernel_ulong_t)&sdhci_o2,
1635 },
1636
1637 {
1638 .vendor = PCI_VENDOR_ID_O2,
1639 .device = PCI_DEVICE_ID_O2_8220,
1640 .subvendor = PCI_ANY_ID,
1641 .subdevice = PCI_ANY_ID,
1642 .driver_data = (kernel_ulong_t)&sdhci_o2,
1643 },
1644
1645 {
1646 .vendor = PCI_VENDOR_ID_O2,
1647 .device = PCI_DEVICE_ID_O2_8221,
1648 .subvendor = PCI_ANY_ID,
1649 .subdevice = PCI_ANY_ID,
1650 .driver_data = (kernel_ulong_t)&sdhci_o2,
1651 },
1652
1653 {
1654 .vendor = PCI_VENDOR_ID_O2,
1655 .device = PCI_DEVICE_ID_O2_8320,
1656 .subvendor = PCI_ANY_ID,
1657 .subdevice = PCI_ANY_ID,
1658 .driver_data = (kernel_ulong_t)&sdhci_o2,
1659 },
1660
1661 {
1662 .vendor = PCI_VENDOR_ID_O2,
1663 .device = PCI_DEVICE_ID_O2_8321,
1664 .subvendor = PCI_ANY_ID,
1665 .subdevice = PCI_ANY_ID,
1666 .driver_data = (kernel_ulong_t)&sdhci_o2,
1667 },
1668
1669 {
1670 .vendor = PCI_VENDOR_ID_O2,
1671 .device = PCI_DEVICE_ID_O2_FUJIN2,
1672 .subvendor = PCI_ANY_ID,
1673 .subdevice = PCI_ANY_ID,
1674 .driver_data = (kernel_ulong_t)&sdhci_o2,
1675 },
1676
1677 {
1678 .vendor = PCI_VENDOR_ID_O2,
1679 .device = PCI_DEVICE_ID_O2_SDS0,
1680 .subvendor = PCI_ANY_ID,
1681 .subdevice = PCI_ANY_ID,
1682 .driver_data = (kernel_ulong_t)&sdhci_o2,
1683 },
1684
1685 {
1686 .vendor = PCI_VENDOR_ID_O2,
1687 .device = PCI_DEVICE_ID_O2_SDS1,
1688 .subvendor = PCI_ANY_ID,
1689 .subdevice = PCI_ANY_ID,
1690 .driver_data = (kernel_ulong_t)&sdhci_o2,
1691 },
1692
1693 {
1694 .vendor = PCI_VENDOR_ID_O2,
1695 .device = PCI_DEVICE_ID_O2_SEABIRD0,
1696 .subvendor = PCI_ANY_ID,
1697 .subdevice = PCI_ANY_ID,
1698 .driver_data = (kernel_ulong_t)&sdhci_o2,
1699 },
1700
1701 {
1702 .vendor = PCI_VENDOR_ID_O2,
1703 .device = PCI_DEVICE_ID_O2_SEABIRD1,
1704 .subvendor = PCI_ANY_ID,
1705 .subdevice = PCI_ANY_ID,
1706 .driver_data = (kernel_ulong_t)&sdhci_o2,
1707 },
1708 {
1709 .vendor = PCI_VENDOR_ID_AMD,
1710 .device = PCI_ANY_ID,
1711 .class = PCI_CLASS_SYSTEM_SDHCI << 8,
1712 .class_mask = 0xFFFF00,
1713 .subvendor = PCI_ANY_ID,
1714 .subdevice = PCI_ANY_ID,
1715 .driver_data = (kernel_ulong_t)&sdhci_amd,
1716 },
1717 { /* Generic SD host controller */
1718 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
1719 },
1720
1721 { /* end: all zeroes */ }, 1285 { /* end: all zeroes */ },
1722}; 1286};
1723 1287
diff --git a/drivers/mmc/host/sdhci-pci.h b/drivers/mmc/host/sdhci-pci.h
index 37766d20a600..75196a2b5289 100644
--- a/drivers/mmc/host/sdhci-pci.h
+++ b/drivers/mmc/host/sdhci-pci.h
@@ -2,7 +2,7 @@
2#define __SDHCI_PCI_H 2#define __SDHCI_PCI_H
3 3
4/* 4/*
5 * PCI device IDs 5 * PCI device IDs, sub IDs
6 */ 6 */
7 7
8#define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809 8#define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809
@@ -37,6 +37,50 @@
37#define PCI_DEVICE_ID_INTEL_GLK_SD 0x31ca 37#define PCI_DEVICE_ID_INTEL_GLK_SD 0x31ca
38#define PCI_DEVICE_ID_INTEL_GLK_EMMC 0x31cc 38#define PCI_DEVICE_ID_INTEL_GLK_EMMC 0x31cc
39#define PCI_DEVICE_ID_INTEL_GLK_SDIO 0x31d0 39#define PCI_DEVICE_ID_INTEL_GLK_SDIO 0x31d0
40#define PCI_DEVICE_ID_INTEL_CNP_EMMC 0x9dc4
41#define PCI_DEVICE_ID_INTEL_CNP_SD 0x9df5
42#define PCI_DEVICE_ID_INTEL_CNPH_SD 0xa375
43
44#define PCI_DEVICE_ID_SYSKONNECT_8000 0x8000
45#define PCI_DEVICE_ID_VIA_95D0 0x95d0
46#define PCI_DEVICE_ID_REALTEK_5250 0x5250
47
48#define PCI_SUBDEVICE_ID_NI_7884 0x7884
49
50/*
51 * PCI device class and mask
52 */
53
54#define SYSTEM_SDHCI (PCI_CLASS_SYSTEM_SDHCI << 8)
55#define PCI_CLASS_MASK 0xFFFF00
56
57/*
58 * Macros for PCI device-description
59 */
60
61#define _PCI_VEND(vend) PCI_VENDOR_ID_##vend
62#define _PCI_DEV(vend, dev) PCI_DEVICE_ID_##vend##_##dev
63#define _PCI_SUBDEV(subvend, subdev) PCI_SUBDEVICE_ID_##subvend##_##subdev
64
65#define SDHCI_PCI_DEVICE(vend, dev, cfg) { \
66 .vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \
67 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
68 .driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
69}
70
71#define SDHCI_PCI_SUBDEVICE(vend, dev, subvend, subdev, cfg) { \
72 .vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \
73 .subvendor = _PCI_VEND(subvend), \
74 .subdevice = _PCI_SUBDEV(subvend, subdev), \
75 .driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
76}
77
78#define SDHCI_PCI_DEVICE_CLASS(vend, cl, cl_msk, cfg) { \
79 .vendor = _PCI_VEND(vend), .device = PCI_ANY_ID, \
80 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
81 .class = (cl), .class_mask = (cl_msk), \
82 .driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
83}
40 84
41/* 85/*
42 * PCI registers 86 * PCI registers
diff --git a/drivers/mmc/host/sdricoh_cs.c b/drivers/mmc/host/sdricoh_cs.c
index 5ff26ab81eb1..70cb00aa79a0 100644
--- a/drivers/mmc/host/sdricoh_cs.c
+++ b/drivers/mmc/host/sdricoh_cs.c
@@ -256,9 +256,6 @@ static int sdricoh_blockio(struct sdricoh_host *host, int read,
256 } 256 }
257 } 257 }
258 258
259 if (len)
260 return -EIO;
261
262 return 0; 259 return 0;
263} 260}
264 261
diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c
index e897e7fc3b14..64b7e9f18361 100644
--- a/drivers/mmc/host/tmio_mmc.c
+++ b/drivers/mmc/host/tmio_mmc.c
@@ -1,16 +1,16 @@
1/* 1/*
2 * linux/drivers/mmc/host/tmio_mmc.c 2 * Driver for the MMC / SD / SDIO cell found in:
3 *
4 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
3 * 5 *
6 * Copyright (C) 2017 Renesas Electronics Corporation
7 * Copyright (C) 2017 Horms Solutions, Simon Horman
4 * Copyright (C) 2007 Ian Molton 8 * Copyright (C) 2007 Ian Molton
5 * Copyright (C) 2004 Ian Molton 9 * Copyright (C) 2004 Ian Molton
6 * 10 *
7 * This program is free software; you can redistribute it and/or modify 11 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 12 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
10 *
11 * Driver for the MMC / SD / SDIO cell found in:
12 *
13 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
14 */ 14 */
15 15
16#include <linux/device.h> 16#include <linux/device.h>
@@ -99,13 +99,13 @@ static int tmio_mmc_probe(struct platform_device *pdev)
99 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */ 99 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
100 host->bus_shift = resource_size(res) >> 10; 100 host->bus_shift = resource_size(res) >> 10;
101 101
102 ret = tmio_mmc_host_probe(host, pdata); 102 ret = tmio_mmc_host_probe(host, pdata, NULL);
103 if (ret) 103 if (ret)
104 goto host_free; 104 goto host_free;
105 105
106 ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, 106 ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq,
107 IRQF_TRIGGER_FALLING, 107 IRQF_TRIGGER_FALLING,
108 dev_name(&pdev->dev), host); 108 dev_name(&pdev->dev), host);
109 if (ret) 109 if (ret)
110 goto host_remove; 110 goto host_remove;
111 111
@@ -132,6 +132,7 @@ static int tmio_mmc_remove(struct platform_device *pdev)
132 132
133 if (mmc) { 133 if (mmc) {
134 struct tmio_mmc_host *host = mmc_priv(mmc); 134 struct tmio_mmc_host *host = mmc_priv(mmc);
135
135 tmio_mmc_host_remove(host); 136 tmio_mmc_host_remove(host);
136 if (cell->disable) 137 if (cell->disable)
137 cell->disable(pdev); 138 cell->disable(pdev);
@@ -145,8 +146,7 @@ static int tmio_mmc_remove(struct platform_device *pdev)
145static const struct dev_pm_ops tmio_mmc_dev_pm_ops = { 146static const struct dev_pm_ops tmio_mmc_dev_pm_ops = {
146 SET_SYSTEM_SLEEP_PM_OPS(tmio_mmc_suspend, tmio_mmc_resume) 147 SET_SYSTEM_SLEEP_PM_OPS(tmio_mmc_suspend, tmio_mmc_resume)
147 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, 148 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
148 tmio_mmc_host_runtime_resume, 149 tmio_mmc_host_runtime_resume, NULL)
149 NULL)
150}; 150};
151 151
152static struct platform_driver tmio_mmc_driver = { 152static struct platform_driver tmio_mmc_driver = {
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index d0edb5730d3f..6ad6704175dc 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -1,8 +1,11 @@
1/* 1/*
2 * linux/drivers/mmc/host/tmio_mmc.h 2 * Driver for the MMC / SD / SDIO cell found in:
3 *
4 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
3 * 5 *
4 * Copyright (C) 2016 Sang Engineering, Wolfram Sang 6 * Copyright (C) 2015-17 Renesas Electronics Corporation
5 * Copyright (C) 2015-16 Renesas Electronics Corporation 7 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
8 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
6 * Copyright (C) 2007 Ian Molton 9 * Copyright (C) 2007 Ian Molton
7 * Copyright (C) 2004 Ian Molton 10 * Copyright (C) 2004 Ian Molton
8 * 11 *
@@ -10,9 +13,6 @@
10 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
12 * 15 *
13 * Driver for the MMC / SD / SDIO cell found in:
14 *
15 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
16 */ 16 */
17 17
18#ifndef TMIO_MMC_H 18#ifndef TMIO_MMC_H
@@ -115,6 +115,15 @@ struct tmio_mmc_dma {
115 void (*enable)(struct tmio_mmc_host *host, bool enable); 115 void (*enable)(struct tmio_mmc_host *host, bool enable);
116}; 116};
117 117
118struct tmio_mmc_dma_ops {
119 void (*start)(struct tmio_mmc_host *host, struct mmc_data *data);
120 void (*enable)(struct tmio_mmc_host *host, bool enable);
121 void (*request)(struct tmio_mmc_host *host,
122 struct tmio_mmc_data *pdata);
123 void (*release)(struct tmio_mmc_host *host);
124 void (*abort)(struct tmio_mmc_host *host);
125};
126
118struct tmio_mmc_host { 127struct tmio_mmc_host {
119 void __iomem *ctl; 128 void __iomem *ctl;
120 struct mmc_command *cmd; 129 struct mmc_command *cmd;
@@ -189,12 +198,15 @@ struct tmio_mmc_host {
189 /* Tuning values: 1 for success, 0 for failure */ 198 /* Tuning values: 1 for success, 0 for failure */
190 DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long)); 199 DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long));
191 unsigned int tap_num; 200 unsigned int tap_num;
201
202 const struct tmio_mmc_dma_ops *dma_ops;
192}; 203};
193 204
194struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev); 205struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
195void tmio_mmc_host_free(struct tmio_mmc_host *host); 206void tmio_mmc_host_free(struct tmio_mmc_host *host);
196int tmio_mmc_host_probe(struct tmio_mmc_host *host, 207int tmio_mmc_host_probe(struct tmio_mmc_host *host,
197 struct tmio_mmc_data *pdata); 208 struct tmio_mmc_data *pdata,
209 const struct tmio_mmc_dma_ops *dma_ops);
198void tmio_mmc_host_remove(struct tmio_mmc_host *host); 210void tmio_mmc_host_remove(struct tmio_mmc_host *host);
199void tmio_mmc_do_data_irq(struct tmio_mmc_host *host); 211void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
200 212
@@ -216,38 +228,6 @@ static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
216 local_irq_restore(*flags); 228 local_irq_restore(*flags);
217} 229}
218 230
219#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
220void tmio_mmc_start_dma(struct tmio_mmc_host *host, struct mmc_data *data);
221void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable);
222void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata);
223void tmio_mmc_release_dma(struct tmio_mmc_host *host);
224void tmio_mmc_abort_dma(struct tmio_mmc_host *host);
225#else
226static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
227 struct mmc_data *data)
228{
229}
230
231static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
232{
233}
234
235static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
236 struct tmio_mmc_data *pdata)
237{
238 host->chan_tx = NULL;
239 host->chan_rx = NULL;
240}
241
242static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
243{
244}
245
246static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
247{
248}
249#endif
250
251#ifdef CONFIG_PM 231#ifdef CONFIG_PM
252int tmio_mmc_host_runtime_suspend(struct device *dev); 232int tmio_mmc_host_runtime_suspend(struct device *dev);
253int tmio_mmc_host_runtime_resume(struct device *dev); 233int tmio_mmc_host_runtime_resume(struct device *dev);
@@ -259,24 +239,26 @@ static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
259} 239}
260 240
261static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr, 241static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
262 u16 *buf, int count) 242 u16 *buf, int count)
263{ 243{
264 readsw(host->ctl + (addr << host->bus_shift), buf, count); 244 readsw(host->ctl + (addr << host->bus_shift), buf, count);
265} 245}
266 246
267static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, int addr) 247static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host,
248 int addr)
268{ 249{
269 return readw(host->ctl + (addr << host->bus_shift)) | 250 return readw(host->ctl + (addr << host->bus_shift)) |
270 readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16; 251 readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
271} 252}
272 253
273static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr, 254static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
274 u32 *buf, int count) 255 u32 *buf, int count)
275{ 256{
276 readsl(host->ctl + (addr << host->bus_shift), buf, count); 257 readsl(host->ctl + (addr << host->bus_shift), buf, count);
277} 258}
278 259
279static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val) 260static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
261 u16 val)
280{ 262{
281 /* If there is a hook and it returns non-zero then there 263 /* If there is a hook and it returns non-zero then there
282 * is an error and the write should be skipped 264 * is an error and the write should be skipped
@@ -287,19 +269,20 @@ static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val
287} 269}
288 270
289static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr, 271static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
290 u16 *buf, int count) 272 u16 *buf, int count)
291{ 273{
292 writesw(host->ctl + (addr << host->bus_shift), buf, count); 274 writesw(host->ctl + (addr << host->bus_shift), buf, count);
293} 275}
294 276
295static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int addr, u32 val) 277static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host,
278 int addr, u32 val)
296{ 279{
297 writew(val & 0xffff, host->ctl + (addr << host->bus_shift)); 280 writew(val & 0xffff, host->ctl + (addr << host->bus_shift));
298 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); 281 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
299} 282}
300 283
301static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr, 284static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
302 const u32 *buf, int count) 285 const u32 *buf, int count)
303{ 286{
304 writesl(host->ctl + (addr << host->bus_shift), buf, count); 287 writesl(host->ctl + (addr << host->bus_shift), buf, count);
305} 288}
diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_core.c
index a2d92f10501b..82b80d42f7ae 100644
--- a/drivers/mmc/host/tmio_mmc_pio.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -1,8 +1,11 @@
1/* 1/*
2 * linux/drivers/mmc/host/tmio_mmc_pio.c 2 * Driver for the MMC / SD / SDIO IP found in:
3 *
4 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
3 * 5 *
4 * Copyright (C) 2016 Sang Engineering, Wolfram Sang 6 * Copyright (C) 2015-17 Renesas Electronics Corporation
5 * Copyright (C) 2015-16 Renesas Electronics Corporation 7 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
8 * Copyright (C) 2017 Horms Solutions, Simon Horman
6 * Copyright (C) 2011 Guennadi Liakhovetski 9 * Copyright (C) 2011 Guennadi Liakhovetski
7 * Copyright (C) 2007 Ian Molton 10 * Copyright (C) 2007 Ian Molton
8 * Copyright (C) 2004 Ian Molton 11 * Copyright (C) 2004 Ian Molton
@@ -11,10 +14,6 @@
11 * it under the terms of the GNU General Public License version 2 as 14 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. 15 * published by the Free Software Foundation.
13 * 16 *
14 * Driver for the MMC / SD / SDIO IP found in:
15 *
16 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
17 *
18 * This driver draws mainly on scattered spec sheets, Reverse engineering 17 * This driver draws mainly on scattered spec sheets, Reverse engineering
19 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit 18 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
20 * support). (Further 4 bit support from a later datasheet). 19 * support). (Further 4 bit support from a later datasheet).
@@ -52,17 +51,55 @@
52 51
53#include "tmio_mmc.h" 52#include "tmio_mmc.h"
54 53
54static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
55 struct mmc_data *data)
56{
57 if (host->dma_ops)
58 host->dma_ops->start(host, data);
59}
60
61static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
62{
63 if (host->dma_ops)
64 host->dma_ops->enable(host, enable);
65}
66
67static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
68 struct tmio_mmc_data *pdata)
69{
70 if (host->dma_ops) {
71 host->dma_ops->request(host, pdata);
72 } else {
73 host->chan_tx = NULL;
74 host->chan_rx = NULL;
75 }
76}
77
78static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
79{
80 if (host->dma_ops)
81 host->dma_ops->release(host);
82}
83
84static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
85{
86 if (host->dma_ops)
87 host->dma_ops->abort(host);
88}
89
55void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 90void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
56{ 91{
57 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); 92 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
58 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 93 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
59} 94}
95EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
60 96
61void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 97void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
62{ 98{
63 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); 99 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
64 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 100 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
65} 101}
102EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
66 103
67static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) 104static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
68{ 105{
@@ -90,16 +127,17 @@ static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
90 127
91#define STATUS_TO_TEXT(a, status, i) \ 128#define STATUS_TO_TEXT(a, status, i) \
92 do { \ 129 do { \
93 if (status & TMIO_STAT_##a) { \ 130 if ((status) & TMIO_STAT_##a) { \
94 if (i++) \ 131 if ((i)++) \
95 printk(" | "); \ 132 printk(KERN_DEBUG " | "); \
96 printk(#a); \ 133 printk(KERN_DEBUG #a); \
97 } \ 134 } \
98 } while (0) 135 } while (0)
99 136
100static void pr_debug_status(u32 status) 137static void pr_debug_status(u32 status)
101{ 138{
102 int i = 0; 139 int i = 0;
140
103 pr_debug("status: %08x = ", status); 141 pr_debug("status: %08x = ", status);
104 STATUS_TO_TEXT(CARD_REMOVE, status, i); 142 STATUS_TO_TEXT(CARD_REMOVE, status, i);
105 STATUS_TO_TEXT(CARD_INSERT, status, i); 143 STATUS_TO_TEXT(CARD_INSERT, status, i);
@@ -140,8 +178,7 @@ static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
140 pm_runtime_get_sync(mmc_dev(mmc)); 178 pm_runtime_get_sync(mmc_dev(mmc));
141 179
142 host->sdio_irq_enabled = true; 180 host->sdio_irq_enabled = true;
143 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & 181 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
144 ~TMIO_SDIO_STAT_IOIRQ;
145 182
146 /* Clear obsolete interrupts before enabling */ 183 /* Clear obsolete interrupts before enabling */
147 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL; 184 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
@@ -185,7 +222,7 @@ static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
185} 222}
186 223
187static void tmio_mmc_set_clock(struct tmio_mmc_host *host, 224static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
188 unsigned int new_clock) 225 unsigned int new_clock)
189{ 226{
190 u32 clk = 0, clock; 227 u32 clk = 0, clock;
191 228
@@ -229,6 +266,12 @@ static void tmio_mmc_reset(struct tmio_mmc_host *host)
229 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) 266 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
230 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001); 267 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
231 msleep(10); 268 msleep(10);
269
270 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
271 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
272 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
273 }
274
232} 275}
233 276
234static void tmio_mmc_reset_work(struct work_struct *work) 277static void tmio_mmc_reset_work(struct work_struct *work)
@@ -246,16 +289,16 @@ static void tmio_mmc_reset_work(struct work_struct *work)
246 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts 289 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
247 * us, so, have to check for IS_ERR(host->mrq) 290 * us, so, have to check for IS_ERR(host->mrq)
248 */ 291 */
249 if (IS_ERR_OR_NULL(mrq) 292 if (IS_ERR_OR_NULL(mrq) ||
250 || time_is_after_jiffies(host->last_req_ts + 293 time_is_after_jiffies(host->last_req_ts +
251 msecs_to_jiffies(CMDREQ_TIMEOUT))) { 294 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
252 spin_unlock_irqrestore(&host->lock, flags); 295 spin_unlock_irqrestore(&host->lock, flags);
253 return; 296 return;
254 } 297 }
255 298
256 dev_warn(&host->pdev->dev, 299 dev_warn(&host->pdev->dev,
257 "timeout waiting for hardware interrupt (CMD%u)\n", 300 "timeout waiting for hardware interrupt (CMD%u)\n",
258 mrq->cmd->opcode); 301 mrq->cmd->opcode);
259 302
260 if (host->data) 303 if (host->data)
261 host->data->error = -ETIMEDOUT; 304 host->data->error = -ETIMEDOUT;
@@ -279,45 +322,6 @@ static void tmio_mmc_reset_work(struct work_struct *work)
279 mmc_request_done(host->mmc, mrq); 322 mmc_request_done(host->mmc, mrq);
280} 323}
281 324
282/* called with host->lock held, interrupts disabled */
283static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
284{
285 struct mmc_request *mrq;
286 unsigned long flags;
287
288 spin_lock_irqsave(&host->lock, flags);
289
290 mrq = host->mrq;
291 if (IS_ERR_OR_NULL(mrq)) {
292 spin_unlock_irqrestore(&host->lock, flags);
293 return;
294 }
295
296 host->cmd = NULL;
297 host->data = NULL;
298 host->force_pio = false;
299
300 cancel_delayed_work(&host->delayed_reset_work);
301
302 host->mrq = NULL;
303 spin_unlock_irqrestore(&host->lock, flags);
304
305 if (mrq->cmd->error || (mrq->data && mrq->data->error))
306 tmio_mmc_abort_dma(host);
307
308 if (host->check_scc_error)
309 host->check_scc_error(host);
310
311 mmc_request_done(host->mmc, mrq);
312}
313
314static void tmio_mmc_done_work(struct work_struct *work)
315{
316 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
317 done);
318 tmio_mmc_finish_request(host);
319}
320
321/* These are the bitmasks the tmio chip requires to implement the MMC response 325/* These are the bitmasks the tmio chip requires to implement the MMC response
322 * types. Note that R1 and R6 are the same in this scheme. */ 326 * types. Note that R1 and R6 are the same in this scheme. */
323#define APP_CMD 0x0040 327#define APP_CMD 0x0040
@@ -332,7 +336,8 @@ static void tmio_mmc_done_work(struct work_struct *work)
332#define SECURITY_CMD 0x4000 336#define SECURITY_CMD 0x4000
333#define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */ 337#define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
334 338
335static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd) 339static int tmio_mmc_start_command(struct tmio_mmc_host *host,
340 struct mmc_command *cmd)
336{ 341{
337 struct mmc_data *data = host->data; 342 struct mmc_data *data = host->data;
338 int c = cmd->opcode; 343 int c = cmd->opcode;
@@ -371,11 +376,11 @@ static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command
371 c |= TRANSFER_MULTI; 376 c |= TRANSFER_MULTI;
372 377
373 /* 378 /*
374 * Disable auto CMD12 at IO_RW_EXTENDED when 379 * Disable auto CMD12 at IO_RW_EXTENDED and
375 * multiple block transfer 380 * SET_BLOCK_COUNT when doing multiple block transfer
376 */ 381 */
377 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) && 382 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
378 (cmd->opcode == SD_IO_RW_EXTENDED)) 383 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
379 c |= NO_CMD12_ISSUE; 384 c |= NO_CMD12_ISSUE;
380 } 385 }
381 if (data->flags & MMC_DATA_READ) 386 if (data->flags & MMC_DATA_READ)
@@ -497,8 +502,6 @@ static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
497 502
498 if (host->sg_off == host->sg_ptr->length) 503 if (host->sg_off == host->sg_ptr->length)
499 tmio_mmc_next_sg(host); 504 tmio_mmc_next_sg(host);
500
501 return;
502} 505}
503 506
504static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host) 507static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
@@ -506,6 +509,7 @@ static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
506 if (host->sg_ptr == &host->bounce_sg) { 509 if (host->sg_ptr == &host->bounce_sg) {
507 unsigned long flags; 510 unsigned long flags;
508 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags); 511 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
512
509 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length); 513 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
510 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr); 514 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
511 } 515 }
@@ -552,7 +556,7 @@ void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
552 host->mrq); 556 host->mrq);
553 } 557 }
554 558
555 if (stop) { 559 if (stop && !host->mrq->sbc) {
556 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg) 560 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
557 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n", 561 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
558 stop->opcode, stop->arg); 562 stop->opcode, stop->arg);
@@ -565,10 +569,12 @@ void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
565 569
566 schedule_work(&host->done); 570 schedule_work(&host->done);
567} 571}
572EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
568 573
569static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat) 574static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
570{ 575{
571 struct mmc_data *data; 576 struct mmc_data *data;
577
572 spin_lock(&host->lock); 578 spin_lock(&host->lock);
573 data = host->data; 579 data = host->data;
574 580
@@ -613,8 +619,7 @@ out:
613 spin_unlock(&host->lock); 619 spin_unlock(&host->lock);
614} 620}
615 621
616static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, 622static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
617 unsigned int stat)
618{ 623{
619 struct mmc_command *cmd = host->cmd; 624 struct mmc_command *cmd = host->cmd;
620 int i, addr; 625 int i, addr;
@@ -675,7 +680,7 @@ out:
675} 680}
676 681
677static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, 682static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
678 int ireg, int status) 683 int ireg, int status)
679{ 684{
680 struct mmc_host *mmc = host->mmc; 685 struct mmc_host *mmc = host->mmc;
681 686
@@ -693,14 +698,13 @@ static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
693 return false; 698 return false;
694} 699}
695 700
696static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, 701static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
697 int ireg, int status) 702 int status)
698{ 703{
699 /* Command completion */ 704 /* Command completion */
700 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) { 705 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
701 tmio_mmc_ack_mmc_irqs(host, 706 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
702 TMIO_STAT_CMDRESPEND | 707 TMIO_STAT_CMDTIMEOUT);
703 TMIO_STAT_CMDTIMEOUT);
704 tmio_mmc_cmd_irq(host, status); 708 tmio_mmc_cmd_irq(host, status);
705 return true; 709 return true;
706 } 710 }
@@ -768,10 +772,10 @@ irqreturn_t tmio_mmc_irq(int irq, void *devid)
768 772
769 return IRQ_HANDLED; 773 return IRQ_HANDLED;
770} 774}
771EXPORT_SYMBOL(tmio_mmc_irq); 775EXPORT_SYMBOL_GPL(tmio_mmc_irq);
772 776
773static int tmio_mmc_start_data(struct tmio_mmc_host *host, 777static int tmio_mmc_start_data(struct tmio_mmc_host *host,
774 struct mmc_data *data) 778 struct mmc_data *data)
775{ 779{
776 struct tmio_mmc_data *pdata = host->pdata; 780 struct tmio_mmc_data *pdata = host->pdata;
777 781
@@ -826,7 +830,7 @@ static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
826 830
827 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) { 831 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
828 dev_warn_once(&host->pdev->dev, 832 dev_warn_once(&host->pdev->dev,
829 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n"); 833 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
830 goto out; 834 goto out;
831 } 835 }
832 836
@@ -857,12 +861,43 @@ out:
857 return ret; 861 return ret;
858} 862}
859 863
864static void tmio_process_mrq(struct tmio_mmc_host *host,
865 struct mmc_request *mrq)
866{
867 struct mmc_command *cmd;
868 int ret;
869
870 if (mrq->sbc && host->cmd != mrq->sbc) {
871 cmd = mrq->sbc;
872 } else {
873 cmd = mrq->cmd;
874 if (mrq->data) {
875 ret = tmio_mmc_start_data(host, mrq->data);
876 if (ret)
877 goto fail;
878 }
879 }
880
881 ret = tmio_mmc_start_command(host, cmd);
882 if (ret)
883 goto fail;
884
885 schedule_delayed_work(&host->delayed_reset_work,
886 msecs_to_jiffies(CMDREQ_TIMEOUT));
887 return;
888
889fail:
890 host->force_pio = false;
891 host->mrq = NULL;
892 mrq->cmd->error = ret;
893 mmc_request_done(host->mmc, mrq);
894}
895
860/* Process requests from the MMC layer */ 896/* Process requests from the MMC layer */
861static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 897static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
862{ 898{
863 struct tmio_mmc_host *host = mmc_priv(mmc); 899 struct tmio_mmc_host *host = mmc_priv(mmc);
864 unsigned long flags; 900 unsigned long flags;
865 int ret;
866 901
867 spin_lock_irqsave(&host->lock, flags); 902 spin_lock_irqsave(&host->lock, flags);
868 903
@@ -882,24 +917,54 @@ static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
882 917
883 spin_unlock_irqrestore(&host->lock, flags); 918 spin_unlock_irqrestore(&host->lock, flags);
884 919
885 if (mrq->data) { 920 tmio_process_mrq(host, mrq);
886 ret = tmio_mmc_start_data(host, mrq->data); 921}
887 if (ret) 922
888 goto fail; 923static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
924{
925 struct mmc_request *mrq;
926 unsigned long flags;
927
928 spin_lock_irqsave(&host->lock, flags);
929
930 mrq = host->mrq;
931 if (IS_ERR_OR_NULL(mrq)) {
932 spin_unlock_irqrestore(&host->lock, flags);
933 return;
934 }
935
936 /* If not SET_BLOCK_COUNT, clear old data */
937 if (host->cmd != mrq->sbc) {
938 host->cmd = NULL;
939 host->data = NULL;
940 host->force_pio = false;
941 host->mrq = NULL;
889 } 942 }
890 943
891 ret = tmio_mmc_start_command(host, mrq->cmd); 944 cancel_delayed_work(&host->delayed_reset_work);
892 if (!ret) { 945
893 schedule_delayed_work(&host->delayed_reset_work, 946 spin_unlock_irqrestore(&host->lock, flags);
894 msecs_to_jiffies(CMDREQ_TIMEOUT)); 947
948 if (mrq->cmd->error || (mrq->data && mrq->data->error))
949 tmio_mmc_abort_dma(host);
950
951 if (host->check_scc_error)
952 host->check_scc_error(host);
953
954 /* If SET_BLOCK_COUNT, continue with main command */
955 if (host->mrq) {
956 tmio_process_mrq(host, mrq);
895 return; 957 return;
896 } 958 }
897 959
898fail: 960 mmc_request_done(host->mmc, mrq);
899 host->force_pio = false; 961}
900 host->mrq = NULL; 962
901 mrq->cmd->error = ret; 963static void tmio_mmc_done_work(struct work_struct *work)
902 mmc_request_done(mmc, mrq); 964{
965 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
966 done);
967 tmio_mmc_finish_request(host);
903} 968}
904 969
905static int tmio_mmc_clk_enable(struct tmio_mmc_host *host) 970static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
@@ -965,7 +1030,7 @@ static void tmio_mmc_power_off(struct tmio_mmc_host *host)
965} 1030}
966 1031
967static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host, 1032static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
968 unsigned char bus_width) 1033 unsigned char bus_width)
969{ 1034{
970 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT) 1035 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
971 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8); 1036 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
@@ -1005,7 +1070,8 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1005 dev_dbg(dev, 1070 dev_dbg(dev,
1006 "%s.%d: CMD%u active since %lu, now %lu!\n", 1071 "%s.%d: CMD%u active since %lu, now %lu!\n",
1007 current->comm, task_pid_nr(current), 1072 current->comm, task_pid_nr(current),
1008 host->mrq->cmd->opcode, host->last_req_ts, jiffies); 1073 host->mrq->cmd->opcode, host->last_req_ts,
1074 jiffies);
1009 } 1075 }
1010 spin_unlock_irqrestore(&host->lock, flags); 1076 spin_unlock_irqrestore(&host->lock, flags);
1011 1077
@@ -1052,6 +1118,7 @@ static int tmio_mmc_get_ro(struct mmc_host *mmc)
1052 struct tmio_mmc_host *host = mmc_priv(mmc); 1118 struct tmio_mmc_host *host = mmc_priv(mmc);
1053 struct tmio_mmc_data *pdata = host->pdata; 1119 struct tmio_mmc_data *pdata = host->pdata;
1054 int ret = mmc_gpio_get_ro(mmc); 1120 int ret = mmc_gpio_get_ro(mmc);
1121
1055 if (ret >= 0) 1122 if (ret >= 0)
1056 return ret; 1123 return ret;
1057 1124
@@ -1108,6 +1175,7 @@ static void tmio_mmc_of_parse(struct platform_device *pdev,
1108 struct tmio_mmc_data *pdata) 1175 struct tmio_mmc_data *pdata)
1109{ 1176{
1110 const struct device_node *np = pdev->dev.of_node; 1177 const struct device_node *np = pdev->dev.of_node;
1178
1111 if (!np) 1179 if (!np)
1112 return; 1180 return;
1113 1181
@@ -1131,16 +1199,17 @@ tmio_mmc_host_alloc(struct platform_device *pdev)
1131 1199
1132 return host; 1200 return host;
1133} 1201}
1134EXPORT_SYMBOL(tmio_mmc_host_alloc); 1202EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1135 1203
1136void tmio_mmc_host_free(struct tmio_mmc_host *host) 1204void tmio_mmc_host_free(struct tmio_mmc_host *host)
1137{ 1205{
1138 mmc_free_host(host->mmc); 1206 mmc_free_host(host->mmc);
1139} 1207}
1140EXPORT_SYMBOL(tmio_mmc_host_free); 1208EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1141 1209
1142int tmio_mmc_host_probe(struct tmio_mmc_host *_host, 1210int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1143 struct tmio_mmc_data *pdata) 1211 struct tmio_mmc_data *pdata,
1212 const struct tmio_mmc_dma_ops *dma_ops)
1144{ 1213{
1145 struct platform_device *pdev = _host->pdev; 1214 struct platform_device *pdev = _host->pdev;
1146 struct mmc_host *mmc = _host->mmc; 1215 struct mmc_host *mmc = _host->mmc;
@@ -1177,7 +1246,8 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1177 return -ENOMEM; 1246 return -ENOMEM;
1178 1247
1179 tmio_mmc_ops.card_busy = _host->card_busy; 1248 tmio_mmc_ops.card_busy = _host->card_busy;
1180 tmio_mmc_ops.start_signal_voltage_switch = _host->start_signal_voltage_switch; 1249 tmio_mmc_ops.start_signal_voltage_switch =
1250 _host->start_signal_voltage_switch;
1181 mmc->ops = &tmio_mmc_ops; 1251 mmc->ops = &tmio_mmc_ops;
1182 1252
1183 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities; 1253 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
@@ -1221,6 +1291,10 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1221 if (_host->native_hotplug) 1291 if (_host->native_hotplug)
1222 pm_runtime_get_noresume(&pdev->dev); 1292 pm_runtime_get_noresume(&pdev->dev);
1223 1293
1294 _host->sdio_irq_enabled = false;
1295 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1296 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1297
1224 tmio_mmc_clk_stop(_host); 1298 tmio_mmc_clk_stop(_host);
1225 tmio_mmc_reset(_host); 1299 tmio_mmc_reset(_host);
1226 1300
@@ -1237,13 +1311,6 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1237 1311
1238 _host->sdcard_irq_mask &= ~irq_mask; 1312 _host->sdcard_irq_mask &= ~irq_mask;
1239 1313
1240 _host->sdio_irq_enabled = false;
1241 if (pdata->flags & TMIO_MMC_SDIO_IRQ) {
1242 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1243 sd_ctrl_write16(_host, CTL_SDIO_IRQ_MASK, _host->sdio_irq_mask);
1244 sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0001);
1245 }
1246
1247 spin_lock_init(&_host->lock); 1314 spin_lock_init(&_host->lock);
1248 mutex_init(&_host->ios_lock); 1315 mutex_init(&_host->ios_lock);
1249 1316
@@ -1252,6 +1319,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1252 INIT_WORK(&_host->done, tmio_mmc_done_work); 1319 INIT_WORK(&_host->done, tmio_mmc_done_work);
1253 1320
1254 /* See if we also get DMA */ 1321 /* See if we also get DMA */
1322 _host->dma_ops = dma_ops;
1255 tmio_mmc_request_dma(_host, pdata); 1323 tmio_mmc_request_dma(_host, pdata);
1256 1324
1257 pm_runtime_set_active(&pdev->dev); 1325 pm_runtime_set_active(&pdev->dev);
@@ -1278,7 +1346,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1278 1346
1279 return 0; 1347 return 0;
1280} 1348}
1281EXPORT_SYMBOL(tmio_mmc_host_probe); 1349EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1282 1350
1283void tmio_mmc_host_remove(struct tmio_mmc_host *host) 1351void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1284{ 1352{
@@ -1303,7 +1371,7 @@ void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1303 1371
1304 tmio_mmc_clk_disable(host); 1372 tmio_mmc_clk_disable(host);
1305} 1373}
1306EXPORT_SYMBOL(tmio_mmc_host_remove); 1374EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1307 1375
1308#ifdef CONFIG_PM 1376#ifdef CONFIG_PM
1309int tmio_mmc_host_runtime_suspend(struct device *dev) 1377int tmio_mmc_host_runtime_suspend(struct device *dev)
@@ -1320,7 +1388,7 @@ int tmio_mmc_host_runtime_suspend(struct device *dev)
1320 1388
1321 return 0; 1389 return 0;
1322} 1390}
1323EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend); 1391EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1324 1392
1325static bool tmio_mmc_can_retune(struct tmio_mmc_host *host) 1393static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1326{ 1394{
@@ -1345,7 +1413,7 @@ int tmio_mmc_host_runtime_resume(struct device *dev)
1345 1413
1346 return 0; 1414 return 0;
1347} 1415}
1348EXPORT_SYMBOL(tmio_mmc_host_runtime_resume); 1416EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1349#endif 1417#endif
1350 1418
1351MODULE_LICENSE("GPL v2"); 1419MODULE_LICENSE("GPL v2");
diff --git a/drivers/mmc/host/vub300.c b/drivers/mmc/host/vub300.c
index c061e7c704be..fbeea1a491a6 100644
--- a/drivers/mmc/host/vub300.c
+++ b/drivers/mmc/host/vub300.c
@@ -2107,7 +2107,8 @@ static int vub300_probe(struct usb_interface *interface,
2107 usb_string(udev, udev->descriptor.iSerialNumber, serial_number, 2107 usb_string(udev, udev->descriptor.iSerialNumber, serial_number,
2108 sizeof(serial_number)); 2108 sizeof(serial_number));
2109 dev_info(&udev->dev, "probing VID:PID(%04X:%04X) %s %s %s\n", 2109 dev_info(&udev->dev, "probing VID:PID(%04X:%04X) %s %s %s\n",
2110 udev->descriptor.idVendor, udev->descriptor.idProduct, 2110 le16_to_cpu(udev->descriptor.idVendor),
2111 le16_to_cpu(udev->descriptor.idProduct),
2111 manufacturer, product, serial_number); 2112 manufacturer, product, serial_number);
2112 command_out_urb = usb_alloc_urb(0, GFP_KERNEL); 2113 command_out_urb = usb_alloc_urb(0, GFP_KERNEL);
2113 if (!command_out_urb) { 2114 if (!command_out_urb) {
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index a1520d88ebf3..26e8f8c0a6db 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -13,15 +13,15 @@
13#define tmio_ioread16(addr) readw(addr) 13#define tmio_ioread16(addr) readw(addr)
14#define tmio_ioread16_rep(r, b, l) readsw(r, b, l) 14#define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
15#define tmio_ioread32(addr) \ 15#define tmio_ioread32(addr) \
16 (((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16)) 16 (((u32)readw((addr))) | (((u32)readw((addr) + 2)) << 16))
17 17
18#define tmio_iowrite8(val, addr) writeb((val), (addr)) 18#define tmio_iowrite8(val, addr) writeb((val), (addr))
19#define tmio_iowrite16(val, addr) writew((val), (addr)) 19#define tmio_iowrite16(val, addr) writew((val), (addr))
20#define tmio_iowrite16_rep(r, b, l) writesw(r, b, l) 20#define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
21#define tmio_iowrite32(val, addr) \ 21#define tmio_iowrite32(val, addr) \
22 do { \ 22 do { \
23 writew((val), (addr)); \ 23 writew((val), (addr)); \
24 writew((val) >> 16, (addr) + 2); \ 24 writew((val) >> 16, (addr) + 2); \
25 } while (0) 25 } while (0)
26 26
27#define CNF_CMD 0x04 27#define CNF_CMD 0x04
@@ -55,57 +55,57 @@
55 } while (0) 55 } while (0)
56 56
57/* tmio MMC platform flags */ 57/* tmio MMC platform flags */
58#define TMIO_MMC_WRPROTECT_DISABLE (1 << 0) 58#define TMIO_MMC_WRPROTECT_DISABLE BIT(0)
59/* 59/*
60 * Some controllers can support a 2-byte block size when the bus width 60 * Some controllers can support a 2-byte block size when the bus width
61 * is configured in 4-bit mode. 61 * is configured in 4-bit mode.
62 */ 62 */
63#define TMIO_MMC_BLKSZ_2BYTES (1 << 1) 63#define TMIO_MMC_BLKSZ_2BYTES BIT(1)
64/* 64/*
65 * Some controllers can support SDIO IRQ signalling. 65 * Some controllers can support SDIO IRQ signalling.
66 */ 66 */
67#define TMIO_MMC_SDIO_IRQ (1 << 2) 67#define TMIO_MMC_SDIO_IRQ BIT(2)
68 68
69/* Some features are only available or tested on RCar Gen2 or later */ 69/* Some features are only available or tested on R-Car Gen2 or later */
70#define TMIO_MMC_MIN_RCAR2 (1 << 3) 70#define TMIO_MMC_MIN_RCAR2 BIT(3)
71 71
72/* 72/*
73 * Some controllers require waiting for the SD bus to become 73 * Some controllers require waiting for the SD bus to become
74 * idle before writing to some registers. 74 * idle before writing to some registers.
75 */ 75 */
76#define TMIO_MMC_HAS_IDLE_WAIT (1 << 4) 76#define TMIO_MMC_HAS_IDLE_WAIT BIT(4)
77/* 77/*
78 * A GPIO is used for card hotplug detection. We need an extra flag for this, 78 * A GPIO is used for card hotplug detection. We need an extra flag for this,
79 * because 0 is a valid GPIO number too, and requiring users to specify 79 * because 0 is a valid GPIO number too, and requiring users to specify
80 * cd_gpio < 0 to disable GPIO hotplug would break backwards compatibility. 80 * cd_gpio < 0 to disable GPIO hotplug would break backwards compatibility.
81 */ 81 */
82#define TMIO_MMC_USE_GPIO_CD (1 << 5) 82#define TMIO_MMC_USE_GPIO_CD BIT(5)
83 83
84/* 84/*
85 * Some controllers doesn't have over 0x100 register. 85 * Some controllers doesn't have over 0x100 register.
86 * it is used to checking accessibility of 86 * it is used to checking accessibility of
87 * CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL 87 * CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL
88 */ 88 */
89#define TMIO_MMC_HAVE_HIGH_REG (1 << 6) 89#define TMIO_MMC_HAVE_HIGH_REG BIT(6)
90 90
91/* 91/*
92 * Some controllers have CMD12 automatically 92 * Some controllers have CMD12 automatically
93 * issue/non-issue register 93 * issue/non-issue register
94 */ 94 */
95#define TMIO_MMC_HAVE_CMD12_CTRL (1 << 7) 95#define TMIO_MMC_HAVE_CMD12_CTRL BIT(7)
96 96
97/* Controller has some SDIO status bits which must be 1 */ 97/* Controller has some SDIO status bits which must be 1 */
98#define TMIO_MMC_SDIO_STATUS_SETBITS (1 << 8) 98#define TMIO_MMC_SDIO_STATUS_SETBITS BIT(8)
99 99
100/* 100/*
101 * Some controllers have a 32-bit wide data port register 101 * Some controllers have a 32-bit wide data port register
102 */ 102 */
103#define TMIO_MMC_32BIT_DATA_PORT (1 << 9) 103#define TMIO_MMC_32BIT_DATA_PORT BIT(9)
104 104
105/* 105/*
106 * Some controllers allows to set SDx actual clock 106 * Some controllers allows to set SDx actual clock
107 */ 107 */
108#define TMIO_MMC_CLK_ACTUAL (1 << 10) 108#define TMIO_MMC_CLK_ACTUAL BIT(10)
109 109
110int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base); 110int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
111int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base); 111int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
@@ -146,9 +146,9 @@ struct tmio_nand_data {
146 146
147struct tmio_fb_data { 147struct tmio_fb_data {
148 int (*lcd_set_power)(struct platform_device *fb_dev, 148 int (*lcd_set_power)(struct platform_device *fb_dev,
149 bool on); 149 bool on);
150 int (*lcd_mode)(struct platform_device *fb_dev, 150 int (*lcd_mode)(struct platform_device *fb_dev,
151 const struct fb_videomode *mode); 151 const struct fb_videomode *mode);
152 int num_modes; 152 int num_modes;
153 struct fb_videomode *modes; 153 struct fb_videomode *modes;
154 154
@@ -157,5 +157,4 @@ struct tmio_fb_data {
157 int width; 157 int width;
158}; 158};
159 159
160
161#endif 160#endif
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index aad015e0152b..46c73e97e61f 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -305,9 +305,7 @@ struct mmc_card {
305 struct mmc_part part[MMC_NUM_PHY_PARTITION]; /* physical partitions */ 305 struct mmc_part part[MMC_NUM_PHY_PARTITION]; /* physical partitions */
306 unsigned int nr_parts; 306 unsigned int nr_parts;
307 307
308 struct mmc_queue_req *mqrq; /* Shared queue structure */
309 unsigned int bouncesz; /* Bounce buffer size */ 308 unsigned int bouncesz; /* Bounce buffer size */
310 int qdepth; /* Shared queue depth */
311}; 309};
312 310
313static inline bool mmc_large_sector(struct mmc_card *card) 311static inline bool mmc_large_sector(struct mmc_card *card)
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 21385ac0c9b1..ebd1cebbef0c 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -130,6 +130,7 @@ struct mmc_host_ops {
130 int (*get_cd)(struct mmc_host *host); 130 int (*get_cd)(struct mmc_host *host);
131 131
132 void (*enable_sdio_irq)(struct mmc_host *host, int enable); 132 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
133 void (*ack_sdio_irq)(struct mmc_host *host);
133 134
134 /* optional callback for HC quirks */ 135 /* optional callback for HC quirks */
135 void (*init_card)(struct mmc_host *host, struct mmc_card *card); 136 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
@@ -184,6 +185,7 @@ struct mmc_async_req {
184 */ 185 */
185struct mmc_slot { 186struct mmc_slot {
186 int cd_irq; 187 int cd_irq;
188 bool cd_wake_enabled;
187 void *handler_priv; 189 void *handler_priv;
188}; 190};
189 191
@@ -270,9 +272,11 @@ struct mmc_host {
270#define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */ 272#define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */
271#define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */ 273#define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */
272#define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */ 274#define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */
275#define MMC_CAP_NO_BOUNCE_BUFF (1 << 21) /* Disable bounce buffers on host */
273#define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */ 276#define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
274#define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */ 277#define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
275#define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */ 278#define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
279#define MMC_CAP_CD_WAKE (1 << 28) /* Enable card detect wake */
276#define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */ 280#define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */
277#define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */ 281#define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
278#define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */ 282#define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */
@@ -285,7 +289,6 @@ struct mmc_host {
285#define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */ 289#define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
286#define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \ 290#define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
287 MMC_CAP2_HS200_1_2V_SDR) 291 MMC_CAP2_HS200_1_2V_SDR)
288#define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */
289#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */ 292#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */
290#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */ 293#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */
291#define MMC_CAP2_PACKED_RD (1 << 12) /* Allow packed read */ 294#define MMC_CAP2_PACKED_RD (1 << 12) /* Allow packed read */
@@ -358,6 +361,7 @@ struct mmc_host {
358 361
359 unsigned int sdio_irqs; 362 unsigned int sdio_irqs;
360 struct task_struct *sdio_irq_thread; 363 struct task_struct *sdio_irq_thread;
364 struct delayed_work sdio_irq_work;
361 bool sdio_irq_pending; 365 bool sdio_irq_pending;
362 atomic_t sdio_irq_thread_abort; 366 atomic_t sdio_irq_thread_abort;
363 367
@@ -428,6 +432,7 @@ static inline void mmc_signal_sdio_irq(struct mmc_host *host)
428} 432}
429 433
430void sdio_run_irqs(struct mmc_host *host); 434void sdio_run_irqs(struct mmc_host *host);
435void sdio_signal_irq(struct mmc_host *host);
431 436
432#ifdef CONFIG_REGULATOR 437#ifdef CONFIG_REGULATOR
433int mmc_regulator_get_ocrmask(struct regulator *supply); 438int mmc_regulator_get_ocrmask(struct regulator *supply);