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-rw-r--r--arch/arm64/boot/dts/broadcom/ns2.dtsi104
1 files changed, 80 insertions, 24 deletions
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index 4fcdeca3a983..69775a8ccff3 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -115,7 +115,7 @@
115 115
116 #interrupt-cells = <1>; 116 #interrupt-cells = <1>;
117 interrupt-map-mask = <0 0 0 0>; 117 interrupt-map-mask = <0 0 0 0>;
118 interrupt-map = <0 0 0 0 &gic GIC_SPI 281 IRQ_TYPE_NONE>; 118 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 281 IRQ_TYPE_NONE>;
119 119
120 linux,pci-domain = <0>; 120 linux,pci-domain = <0>;
121 121
@@ -136,18 +136,7 @@
136 phys = <&pci_phy0>; 136 phys = <&pci_phy0>;
137 phy-names = "pcie-phy"; 137 phy-names = "pcie-phy";
138 138
139 msi-parent = <&msi0>; 139 msi-parent = <&v2m0>;
140 msi0: msi@20020000 {
141 compatible = "brcm,iproc-msi";
142 msi-controller;
143 interrupt-parent = <&gic>;
144 interrupts = <GIC_SPI 277 IRQ_TYPE_NONE>,
145 <GIC_SPI 278 IRQ_TYPE_NONE>,
146 <GIC_SPI 279 IRQ_TYPE_NONE>,
147 <GIC_SPI 280 IRQ_TYPE_NONE>;
148 brcm,num-eq-region = <1>;
149 brcm,num-msi-msg-region = <1>;
150 };
151 }; 140 };
152 141
153 pcie4: pcie@50020000 { 142 pcie4: pcie@50020000 {
@@ -156,7 +145,7 @@
156 145
157 #interrupt-cells = <1>; 146 #interrupt-cells = <1>;
158 interrupt-map-mask = <0 0 0 0>; 147 interrupt-map-mask = <0 0 0 0>;
159 interrupt-map = <0 0 0 0 &gic GIC_SPI 305 IRQ_TYPE_NONE>; 148 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 305 IRQ_TYPE_NONE>;
160 149
161 linux,pci-domain = <4>; 150 linux,pci-domain = <4>;
162 151
@@ -177,16 +166,7 @@
177 phys = <&pci_phy1>; 166 phys = <&pci_phy1>;
178 phy-names = "pcie-phy"; 167 phy-names = "pcie-phy";
179 168
180 msi-parent = <&msi4>; 169 msi-parent = <&v2m0>;
181 msi4: msi@50020000 {
182 compatible = "brcm,iproc-msi";
183 msi-controller;
184 interrupt-parent = <&gic>;
185 interrupts = <GIC_SPI 301 IRQ_TYPE_NONE>,
186 <GIC_SPI 302 IRQ_TYPE_NONE>,
187 <GIC_SPI 303 IRQ_TYPE_NONE>,
188 <GIC_SPI 304 IRQ_TYPE_NONE>;
189 };
190 }; 170 };
191 171
192 soc: soc { 172 soc: soc {
@@ -331,6 +311,82 @@
331 <0x65260000 0x1000>; 311 <0x65260000 0x1000>;
332 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) | 312 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
333 IRQ_TYPE_LEVEL_HIGH)>; 313 IRQ_TYPE_LEVEL_HIGH)>;
314
315 #address-cells = <1>;
316 #size-cells = <1>;
317 ranges = <0 0x652e0000 0x80000>;
318
319 v2m0: v2m@00000 {
320 compatible = "arm,gic-v2m-frame";
321 interrupt-parent = <&gic>;
322 msi-controller;
323 reg = <0x00000 0x1000>;
324 arm,msi-base-spi = <72>;
325 arm,msi-num-spis = <16>;
326 };
327
328 v2m1: v2m@10000 {
329 compatible = "arm,gic-v2m-frame";
330 interrupt-parent = <&gic>;
331 msi-controller;
332 reg = <0x10000 0x1000>;
333 arm,msi-base-spi = <88>;
334 arm,msi-num-spis = <16>;
335 };
336
337 v2m2: v2m@20000 {
338 compatible = "arm,gic-v2m-frame";
339 interrupt-parent = <&gic>;
340 msi-controller;
341 reg = <0x20000 0x1000>;
342 arm,msi-base-spi = <104>;
343 arm,msi-num-spis = <16>;
344 };
345
346 v2m3: v2m@30000 {
347 compatible = "arm,gic-v2m-frame";
348 interrupt-parent = <&gic>;
349 msi-controller;
350 reg = <0x30000 0x1000>;
351 arm,msi-base-spi = <120>;
352 arm,msi-num-spis = <16>;
353 };
354
355 v2m4: v2m@40000 {
356 compatible = "arm,gic-v2m-frame";
357 interrupt-parent = <&gic>;
358 msi-controller;
359 reg = <0x40000 0x1000>;
360 arm,msi-base-spi = <136>;
361 arm,msi-num-spis = <16>;
362 };
363
364 v2m5: v2m@50000 {
365 compatible = "arm,gic-v2m-frame";
366 interrupt-parent = <&gic>;
367 msi-controller;
368 reg = <0x50000 0x1000>;
369 arm,msi-base-spi = <152>;
370 arm,msi-num-spis = <16>;
371 };
372
373 v2m6: v2m@60000 {
374 compatible = "arm,gic-v2m-frame";
375 interrupt-parent = <&gic>;
376 msi-controller;
377 reg = <0x60000 0x1000>;
378 arm,msi-base-spi = <168>;
379 arm,msi-num-spis = <16>;
380 };
381
382 v2m7: v2m@70000 {
383 compatible = "arm,gic-v2m-frame";
384 interrupt-parent = <&gic>;
385 msi-controller;
386 reg = <0x70000 0x1000>;
387 arm,msi-base-spi = <184>;
388 arm,msi-num-spis = <16>;
389 };
334 }; 390 };
335 391
336 cci@65590000 { 392 cci@65590000 {