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-rw-r--r--drivers/net/ethernet/broadcom/bgmac-platform.c27
-rw-r--r--drivers/net/ethernet/broadcom/bgmac.h16
2 files changed, 34 insertions, 9 deletions
diff --git a/drivers/net/ethernet/broadcom/bgmac-platform.c b/drivers/net/ethernet/broadcom/bgmac-platform.c
index 7b1af950f312..da1b8b225eb9 100644
--- a/drivers/net/ethernet/broadcom/bgmac-platform.c
+++ b/drivers/net/ethernet/broadcom/bgmac-platform.c
@@ -51,8 +51,7 @@ static void platform_bgmac_idm_write(struct bgmac *bgmac, u16 offset, u32 value)
51 51
52static bool platform_bgmac_clk_enabled(struct bgmac *bgmac) 52static bool platform_bgmac_clk_enabled(struct bgmac *bgmac)
53{ 53{
54 if ((bgmac_idm_read(bgmac, BCMA_IOCTL) & 54 if ((bgmac_idm_read(bgmac, BCMA_IOCTL) & BGMAC_CLK_EN) != BGMAC_CLK_EN)
55 (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC)) != BCMA_IOCTL_CLK)
56 return false; 55 return false;
57 if (bgmac_idm_read(bgmac, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET) 56 if (bgmac_idm_read(bgmac, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
58 return false; 57 return false;
@@ -61,15 +60,25 @@ static bool platform_bgmac_clk_enabled(struct bgmac *bgmac)
61 60
62static void platform_bgmac_clk_enable(struct bgmac *bgmac, u32 flags) 61static void platform_bgmac_clk_enable(struct bgmac *bgmac, u32 flags)
63{ 62{
64 bgmac_idm_write(bgmac, BCMA_IOCTL, 63 u32 val;
65 (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC | flags));
66 bgmac_idm_read(bgmac, BCMA_IOCTL);
67 64
68 bgmac_idm_write(bgmac, BCMA_RESET_CTL, 0); 65 /* The Reset Control register only contains a single bit to show if the
69 bgmac_idm_read(bgmac, BCMA_RESET_CTL); 66 * controller is currently in reset. Do a sanity check here, just in
70 udelay(1); 67 * case the bootloader happened to leave the device in reset.
68 */
69 val = bgmac_idm_read(bgmac, BCMA_RESET_CTL);
70 if (val) {
71 bgmac_idm_write(bgmac, BCMA_RESET_CTL, 0);
72 bgmac_idm_read(bgmac, BCMA_RESET_CTL);
73 udelay(1);
74 }
71 75
72 bgmac_idm_write(bgmac, BCMA_IOCTL, (BCMA_IOCTL_CLK | flags)); 76 val = bgmac_idm_read(bgmac, BCMA_IOCTL);
77 /* Some bits of BCMA_IOCTL set by HW/ATF and should not change */
78 val |= flags & ~(BGMAC_AWCACHE | BGMAC_ARCACHE | BGMAC_AWUSER |
79 BGMAC_ARUSER);
80 val |= BGMAC_CLK_EN;
81 bgmac_idm_write(bgmac, BCMA_IOCTL, val);
73 bgmac_idm_read(bgmac, BCMA_IOCTL); 82 bgmac_idm_read(bgmac, BCMA_IOCTL);
74 udelay(1); 83 udelay(1);
75} 84}
diff --git a/drivers/net/ethernet/broadcom/bgmac.h b/drivers/net/ethernet/broadcom/bgmac.h
index 248727dc62f2..6d1c6ff1ed96 100644
--- a/drivers/net/ethernet/broadcom/bgmac.h
+++ b/drivers/net/ethernet/broadcom/bgmac.h
@@ -213,6 +213,22 @@
213/* BCMA GMAC core specific IO Control (BCMA_IOCTL) flags */ 213/* BCMA GMAC core specific IO Control (BCMA_IOCTL) flags */
214#define BGMAC_BCMA_IOCTL_SW_CLKEN 0x00000004 /* PHY Clock Enable */ 214#define BGMAC_BCMA_IOCTL_SW_CLKEN 0x00000004 /* PHY Clock Enable */
215#define BGMAC_BCMA_IOCTL_SW_RESET 0x00000008 /* PHY Reset */ 215#define BGMAC_BCMA_IOCTL_SW_RESET 0x00000008 /* PHY Reset */
216/* The IOCTL values appear to be different in NS, NSP, and NS2, and do not match
217 * the values directly above
218 */
219#define BGMAC_CLK_EN BIT(0)
220#define BGMAC_RESERVED_0 BIT(1)
221#define BGMAC_SOURCE_SYNC_MODE_EN BIT(2)
222#define BGMAC_DEST_SYNC_MODE_EN BIT(3)
223#define BGMAC_TX_CLK_OUT_INVERT_EN BIT(4)
224#define BGMAC_DIRECT_GMII_MODE BIT(5)
225#define BGMAC_CLK_250_SEL BIT(6)
226#define BGMAC_AWCACHE (0xf << 7)
227#define BGMAC_RESERVED_1 (0x1f << 11)
228#define BGMAC_ARCACHE (0xf << 16)
229#define BGMAC_AWUSER (0x3f << 20)
230#define BGMAC_ARUSER (0x3f << 26)
231#define BGMAC_RESERVED BIT(31)
216 232
217/* BCMA GMAC core specific IO status (BCMA_IOST) flags */ 233/* BCMA GMAC core specific IO status (BCMA_IOST) flags */
218#define BGMAC_BCMA_IOST_ATTACHED 0x00000800 234#define BGMAC_BCMA_IOST_ATTACHED 0x00000800