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-rw-r--r--Documentation/cpu-hotplug.txt2
-rw-r--r--arch/arm64/kernel/smp.c2
-rw-r--r--arch/blackfin/mach-bf561/smp.c2
-rw-r--r--arch/ia64/include/asm/acpi.h6
-rw-r--r--arch/ia64/kernel/acpi.c2
-rw-r--r--arch/ia64/kernel/iosapic.c2
-rw-r--r--arch/ia64/kernel/irq_ia64.c36
-rw-r--r--arch/ia64/kernel/mca.c10
-rw-r--r--arch/ia64/kernel/msi_ia64.c10
-rw-r--r--arch/ia64/kernel/numa.c10
-rw-r--r--arch/ia64/kernel/salinfo.c24
-rw-r--r--arch/ia64/kernel/setup.c11
-rw-r--r--arch/ia64/kernel/smp.c6
-rw-r--r--arch/ia64/kernel/smpboot.c42
-rw-r--r--arch/ia64/kernel/topology.c6
-rw-r--r--arch/m32r/kernel/smpboot.c2
-rw-r--r--arch/m68k/coldfire/m527x.c3
-rw-r--r--arch/m68k/include/asm/m527xsim.h2
-rw-r--r--arch/m68k/include/asm/m68360_pram.h4
-rw-r--r--arch/mips/bcm63xx/irq.c4
-rw-r--r--arch/mips/cavium-octeon/smp.c4
-rw-r--r--arch/mips/include/asm/smp.h2
-rw-r--r--arch/mips/kernel/crash.c8
-rw-r--r--arch/mips/kernel/mips-mt-fpaff.c4
-rw-r--r--arch/mips/kernel/process.c2
-rw-r--r--arch/mips/kernel/smp-bmips.c2
-rw-r--r--arch/mips/kernel/smp-cmp.c4
-rw-r--r--arch/mips/kernel/smp-cps.c4
-rw-r--r--arch/mips/kernel/smp-mt.c4
-rw-r--r--arch/mips/kernel/smp.c26
-rw-r--r--arch/mips/kernel/traps.c6
-rw-r--r--arch/mips/loongson/loongson-3/numa.c4
-rw-r--r--arch/mips/loongson/loongson-3/smp.c2
-rw-r--r--arch/mips/paravirt/paravirt-smp.c2
-rw-r--r--arch/mips/sgi-ip27/ip27-init.c2
-rw-r--r--arch/mips/sgi-ip27/ip27-klnuma.c10
-rw-r--r--arch/mips/sgi-ip27/ip27-memory.c2
-rw-r--r--arch/parisc/kernel/irq.c4
-rw-r--r--arch/powerpc/include/asm/cputhreads.h2
-rw-r--r--arch/s390/Kconfig2
-rw-r--r--arch/s390/include/asm/dma-mapping.h2
-rw-r--r--arch/s390/include/asm/pci.h10
-rw-r--r--arch/s390/net/bpf_jit.S197
-rw-r--r--arch/s390/net/bpf_jit.h58
-rw-r--r--arch/s390/net/bpf_jit_comp.c1780
-rw-r--r--arch/s390/pci/pci.c6
-rw-r--r--arch/s390/pci/pci_debug.c33
-rw-r--r--arch/s390/pci/pci_dma.c8
-rw-r--r--arch/sh/include/asm/mmu_context.h2
-rw-r--r--arch/sh/kernel/smp.c6
-rw-r--r--arch/sparc/kernel/time_32.c4
-rw-r--r--arch/tile/kernel/setup.c2
-rw-r--r--arch/x86/kernel/apic/x2apic_cluster.c4
-rw-r--r--drivers/clocksource/dw_apb_timer.c3
-rw-r--r--drivers/cpuidle/coupled.c6
-rw-r--r--drivers/crypto/n2_core.c4
-rw-r--r--drivers/iommu/amd_iommu.c250
-rw-r--r--drivers/iommu/amd_iommu_types.h13
-rw-r--r--drivers/iommu/amd_iommu_v2.c2
-rw-r--r--drivers/iommu/arm-smmu.c171
-rw-r--r--drivers/iommu/exynos-iommu.c87
-rw-r--r--drivers/iommu/fsl_pamu_domain.c60
-rw-r--r--drivers/iommu/fsl_pamu_domain.h2
-rw-r--r--drivers/iommu/intel-iommu.c61
-rw-r--r--drivers/iommu/intel_irq_remapping.c12
-rw-r--r--drivers/iommu/io-pgtable-arm.c5
-rw-r--r--drivers/iommu/iommu.c26
-rw-r--r--drivers/iommu/ipmmu-vmsa.c41
-rw-r--r--drivers/iommu/msm_iommu.c73
-rw-r--r--drivers/iommu/omap-iommu.c49
-rw-r--r--drivers/iommu/rockchip-iommu.c40
-rw-r--r--drivers/iommu/shmobile-iommu.c39
-rw-r--r--drivers/iommu/tegra-gart.c88
-rw-r--r--drivers/iommu/tegra-smmu.c59
-rw-r--r--drivers/irqchip/irq-gic-v3.c2
-rw-r--r--drivers/irqchip/irq-mips-gic.c6
-rw-r--r--drivers/net/ethernet/tile/tilegx.c4
-rw-r--r--drivers/s390/block/dasd.c42
-rw-r--r--drivers/s390/block/dasd_eckd.c3
-rw-r--r--drivers/s390/char/sclp_cmd.c48
-rw-r--r--drivers/scsi/hpsa.c6
-rw-r--r--include/linux/cpumask.h176
-rw-r--r--include/linux/iommu.h33
-rw-r--r--include/linux/smp.h2
-rw-r--r--lib/Kconfig4
-rw-r--r--lib/cpumask.c28
86 files changed, 2159 insertions, 1680 deletions
diff --git a/Documentation/cpu-hotplug.txt b/Documentation/cpu-hotplug.txt
index a0b005d2bd95..f9ad5e048b11 100644
--- a/Documentation/cpu-hotplug.txt
+++ b/Documentation/cpu-hotplug.txt
@@ -108,7 +108,7 @@ Never use anything other than cpumask_t to represent bitmap of CPUs.
108 for_each_possible_cpu - Iterate over cpu_possible_mask 108 for_each_possible_cpu - Iterate over cpu_possible_mask
109 for_each_online_cpu - Iterate over cpu_online_mask 109 for_each_online_cpu - Iterate over cpu_online_mask
110 for_each_present_cpu - Iterate over cpu_present_mask 110 for_each_present_cpu - Iterate over cpu_present_mask
111 for_each_cpu_mask(x,mask) - Iterate over some random collection of cpu mask. 111 for_each_cpu(x,mask) - Iterate over some random collection of cpu mask.
112 112
113 #include <linux/cpu.h> 113 #include <linux/cpu.h>
114 get_online_cpus() and put_online_cpus(): 114 get_online_cpus() and put_online_cpus():
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index ffe8e1b814e0..714411f62391 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -636,7 +636,7 @@ void smp_send_stop(void)
636 cpumask_t mask; 636 cpumask_t mask;
637 637
638 cpumask_copy(&mask, cpu_online_mask); 638 cpumask_copy(&mask, cpu_online_mask);
639 cpu_clear(smp_processor_id(), mask); 639 cpumask_clear_cpu(smp_processor_id(), &mask);
640 640
641 smp_cross_call(&mask, IPI_CPU_STOP); 641 smp_cross_call(&mask, IPI_CPU_STOP);
642 } 642 }
diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c
index 11789beca75a..8c0c80fd1a45 100644
--- a/arch/blackfin/mach-bf561/smp.c
+++ b/arch/blackfin/mach-bf561/smp.c
@@ -124,7 +124,7 @@ void platform_send_ipi(cpumask_t callmap, int irq)
124 unsigned int cpu; 124 unsigned int cpu;
125 int offset = (irq == IRQ_SUPPLE_0) ? 6 : 8; 125 int offset = (irq == IRQ_SUPPLE_0) ? 6 : 8;
126 126
127 for_each_cpu_mask(cpu, callmap) { 127 for_each_cpu(cpu, &callmap) {
128 BUG_ON(cpu >= 2); 128 BUG_ON(cpu >= 2);
129 SSYNC(); 129 SSYNC();
130 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (offset + cpu))); 130 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (offset + cpu)));
diff --git a/arch/ia64/include/asm/acpi.h b/arch/ia64/include/asm/acpi.h
index a1d91ab4c5ef..aa0fdf125aba 100644
--- a/arch/ia64/include/asm/acpi.h
+++ b/arch/ia64/include/asm/acpi.h
@@ -117,7 +117,7 @@ static inline void arch_acpi_set_pdc_bits(u32 *buf)
117#ifdef CONFIG_ACPI_NUMA 117#ifdef CONFIG_ACPI_NUMA
118extern cpumask_t early_cpu_possible_map; 118extern cpumask_t early_cpu_possible_map;
119#define for_each_possible_early_cpu(cpu) \ 119#define for_each_possible_early_cpu(cpu) \
120 for_each_cpu_mask((cpu), early_cpu_possible_map) 120 for_each_cpu((cpu), &early_cpu_possible_map)
121 121
122static inline void per_cpu_scan_finalize(int min_cpus, int reserve_cpus) 122static inline void per_cpu_scan_finalize(int min_cpus, int reserve_cpus)
123{ 123{
@@ -125,13 +125,13 @@ static inline void per_cpu_scan_finalize(int min_cpus, int reserve_cpus)
125 int cpu; 125 int cpu;
126 int next_nid = 0; 126 int next_nid = 0;
127 127
128 low_cpu = cpus_weight(early_cpu_possible_map); 128 low_cpu = cpumask_weight(&early_cpu_possible_map);
129 129
130 high_cpu = max(low_cpu, min_cpus); 130 high_cpu = max(low_cpu, min_cpus);
131 high_cpu = min(high_cpu + reserve_cpus, NR_CPUS); 131 high_cpu = min(high_cpu + reserve_cpus, NR_CPUS);
132 132
133 for (cpu = low_cpu; cpu < high_cpu; cpu++) { 133 for (cpu = low_cpu; cpu < high_cpu; cpu++) {
134 cpu_set(cpu, early_cpu_possible_map); 134 cpumask_set_cpu(cpu, &early_cpu_possible_map);
135 if (node_cpuid[cpu].nid == NUMA_NO_NODE) { 135 if (node_cpuid[cpu].nid == NUMA_NO_NODE) {
136 node_cpuid[cpu].nid = next_nid; 136 node_cpuid[cpu].nid = next_nid;
137 next_nid++; 137 next_nid++;
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index 2c4498919d3c..35bf22cc71b7 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -483,7 +483,7 @@ acpi_numa_processor_affinity_init(struct acpi_srat_cpu_affinity *pa)
483 (pa->apic_id << 8) | (pa->local_sapic_eid); 483 (pa->apic_id << 8) | (pa->local_sapic_eid);
484 /* nid should be overridden as logical node id later */ 484 /* nid should be overridden as logical node id later */
485 node_cpuid[srat_num_cpus].nid = pxm; 485 node_cpuid[srat_num_cpus].nid = pxm;
486 cpu_set(srat_num_cpus, early_cpu_possible_map); 486 cpumask_set_cpu(srat_num_cpus, &early_cpu_possible_map);
487 srat_num_cpus++; 487 srat_num_cpus++;
488} 488}
489 489
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index cd44a57c73be..bc9501e36e77 100644
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -690,7 +690,7 @@ skip_numa_setup:
690 do { 690 do {
691 if (++cpu >= nr_cpu_ids) 691 if (++cpu >= nr_cpu_ids)
692 cpu = 0; 692 cpu = 0;
693 } while (!cpu_online(cpu) || !cpu_isset(cpu, domain)); 693 } while (!cpu_online(cpu) || !cpumask_test_cpu(cpu, &domain));
694 694
695 return cpu_physical_id(cpu); 695 return cpu_physical_id(cpu);
696#else /* CONFIG_SMP */ 696#else /* CONFIG_SMP */
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index 698d8fefde6c..eaa3199f98c8 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -109,13 +109,13 @@ static inline int find_unassigned_vector(cpumask_t domain)
109 int pos, vector; 109 int pos, vector;
110 110
111 cpumask_and(&mask, &domain, cpu_online_mask); 111 cpumask_and(&mask, &domain, cpu_online_mask);
112 if (cpus_empty(mask)) 112 if (cpumask_empty(&mask))
113 return -EINVAL; 113 return -EINVAL;
114 114
115 for (pos = 0; pos < IA64_NUM_DEVICE_VECTORS; pos++) { 115 for (pos = 0; pos < IA64_NUM_DEVICE_VECTORS; pos++) {
116 vector = IA64_FIRST_DEVICE_VECTOR + pos; 116 vector = IA64_FIRST_DEVICE_VECTOR + pos;
117 cpus_and(mask, domain, vector_table[vector]); 117 cpumask_and(&mask, &domain, &vector_table[vector]);
118 if (!cpus_empty(mask)) 118 if (!cpumask_empty(&mask))
119 continue; 119 continue;
120 return vector; 120 return vector;
121 } 121 }
@@ -132,18 +132,18 @@ static int __bind_irq_vector(int irq, int vector, cpumask_t domain)
132 BUG_ON((unsigned)vector >= IA64_NUM_VECTORS); 132 BUG_ON((unsigned)vector >= IA64_NUM_VECTORS);
133 133
134 cpumask_and(&mask, &domain, cpu_online_mask); 134 cpumask_and(&mask, &domain, cpu_online_mask);
135 if (cpus_empty(mask)) 135 if (cpumask_empty(&mask))
136 return -EINVAL; 136 return -EINVAL;
137 if ((cfg->vector == vector) && cpus_equal(cfg->domain, domain)) 137 if ((cfg->vector == vector) && cpumask_equal(&cfg->domain, &domain))
138 return 0; 138 return 0;
139 if (cfg->vector != IRQ_VECTOR_UNASSIGNED) 139 if (cfg->vector != IRQ_VECTOR_UNASSIGNED)
140 return -EBUSY; 140 return -EBUSY;
141 for_each_cpu_mask(cpu, mask) 141 for_each_cpu(cpu, &mask)
142 per_cpu(vector_irq, cpu)[vector] = irq; 142 per_cpu(vector_irq, cpu)[vector] = irq;
143 cfg->vector = vector; 143 cfg->vector = vector;
144 cfg->domain = domain; 144 cfg->domain = domain;
145 irq_status[irq] = IRQ_USED; 145 irq_status[irq] = IRQ_USED;
146 cpus_or(vector_table[vector], vector_table[vector], domain); 146 cpumask_or(&vector_table[vector], &vector_table[vector], &domain);
147 return 0; 147 return 0;
148} 148}
149 149
@@ -161,7 +161,6 @@ int bind_irq_vector(int irq, int vector, cpumask_t domain)
161static void __clear_irq_vector(int irq) 161static void __clear_irq_vector(int irq)
162{ 162{
163 int vector, cpu; 163 int vector, cpu;
164 cpumask_t mask;
165 cpumask_t domain; 164 cpumask_t domain;
166 struct irq_cfg *cfg = &irq_cfg[irq]; 165 struct irq_cfg *cfg = &irq_cfg[irq];
167 166
@@ -169,13 +168,12 @@ static void __clear_irq_vector(int irq)
169 BUG_ON(cfg->vector == IRQ_VECTOR_UNASSIGNED); 168 BUG_ON(cfg->vector == IRQ_VECTOR_UNASSIGNED);
170 vector = cfg->vector; 169 vector = cfg->vector;
171 domain = cfg->domain; 170 domain = cfg->domain;
172 cpumask_and(&mask, &cfg->domain, cpu_online_mask); 171 for_each_cpu_and(cpu, &cfg->domain, cpu_online_mask)
173 for_each_cpu_mask(cpu, mask)
174 per_cpu(vector_irq, cpu)[vector] = -1; 172 per_cpu(vector_irq, cpu)[vector] = -1;
175 cfg->vector = IRQ_VECTOR_UNASSIGNED; 173 cfg->vector = IRQ_VECTOR_UNASSIGNED;
176 cfg->domain = CPU_MASK_NONE; 174 cfg->domain = CPU_MASK_NONE;
177 irq_status[irq] = IRQ_UNUSED; 175 irq_status[irq] = IRQ_UNUSED;
178 cpus_andnot(vector_table[vector], vector_table[vector], domain); 176 cpumask_andnot(&vector_table[vector], &vector_table[vector], &domain);
179} 177}
180 178
181static void clear_irq_vector(int irq) 179static void clear_irq_vector(int irq)
@@ -244,7 +242,7 @@ void __setup_vector_irq(int cpu)
244 per_cpu(vector_irq, cpu)[vector] = -1; 242 per_cpu(vector_irq, cpu)[vector] = -1;
245 /* Mark the inuse vectors */ 243 /* Mark the inuse vectors */
246 for (irq = 0; irq < NR_IRQS; ++irq) { 244 for (irq = 0; irq < NR_IRQS; ++irq) {
247 if (!cpu_isset(cpu, irq_cfg[irq].domain)) 245 if (!cpumask_test_cpu(cpu, &irq_cfg[irq].domain))
248 continue; 246 continue;
249 vector = irq_to_vector(irq); 247 vector = irq_to_vector(irq);
250 per_cpu(vector_irq, cpu)[vector] = irq; 248 per_cpu(vector_irq, cpu)[vector] = irq;
@@ -261,7 +259,7 @@ static enum vector_domain_type {
261static cpumask_t vector_allocation_domain(int cpu) 259static cpumask_t vector_allocation_domain(int cpu)
262{ 260{
263 if (vector_domain_type == VECTOR_DOMAIN_PERCPU) 261 if (vector_domain_type == VECTOR_DOMAIN_PERCPU)
264 return cpumask_of_cpu(cpu); 262 return *cpumask_of(cpu);
265 return CPU_MASK_ALL; 263 return CPU_MASK_ALL;
266} 264}
267 265
@@ -275,7 +273,7 @@ static int __irq_prepare_move(int irq, int cpu)
275 return -EBUSY; 273 return -EBUSY;
276 if (cfg->vector == IRQ_VECTOR_UNASSIGNED || !cpu_online(cpu)) 274 if (cfg->vector == IRQ_VECTOR_UNASSIGNED || !cpu_online(cpu))
277 return -EINVAL; 275 return -EINVAL;
278 if (cpu_isset(cpu, cfg->domain)) 276 if (cpumask_test_cpu(cpu, &cfg->domain))
279 return 0; 277 return 0;
280 domain = vector_allocation_domain(cpu); 278 domain = vector_allocation_domain(cpu);
281 vector = find_unassigned_vector(domain); 279 vector = find_unassigned_vector(domain);
@@ -309,12 +307,12 @@ void irq_complete_move(unsigned irq)
309 if (likely(!cfg->move_in_progress)) 307 if (likely(!cfg->move_in_progress))
310 return; 308 return;
311 309
312 if (unlikely(cpu_isset(smp_processor_id(), cfg->old_domain))) 310 if (unlikely(cpumask_test_cpu(smp_processor_id(), &cfg->old_domain)))
313 return; 311 return;
314 312
315 cpumask_and(&cleanup_mask, &cfg->old_domain, cpu_online_mask); 313 cpumask_and(&cleanup_mask, &cfg->old_domain, cpu_online_mask);
316 cfg->move_cleanup_count = cpus_weight(cleanup_mask); 314 cfg->move_cleanup_count = cpumask_weight(&cleanup_mask);
317 for_each_cpu_mask(i, cleanup_mask) 315 for_each_cpu(i, &cleanup_mask)
318 platform_send_ipi(i, IA64_IRQ_MOVE_VECTOR, IA64_IPI_DM_INT, 0); 316 platform_send_ipi(i, IA64_IRQ_MOVE_VECTOR, IA64_IPI_DM_INT, 0);
319 cfg->move_in_progress = 0; 317 cfg->move_in_progress = 0;
320} 318}
@@ -340,12 +338,12 @@ static irqreturn_t smp_irq_move_cleanup_interrupt(int irq, void *dev_id)
340 if (!cfg->move_cleanup_count) 338 if (!cfg->move_cleanup_count)
341 goto unlock; 339 goto unlock;
342 340
343 if (!cpu_isset(me, cfg->old_domain)) 341 if (!cpumask_test_cpu(me, &cfg->old_domain))
344 goto unlock; 342 goto unlock;
345 343
346 spin_lock_irqsave(&vector_lock, flags); 344 spin_lock_irqsave(&vector_lock, flags);
347 __this_cpu_write(vector_irq[vector], -1); 345 __this_cpu_write(vector_irq[vector], -1);
348 cpu_clear(me, vector_table[vector]); 346 cpumask_clear_cpu(me, &vector_table[vector]);
349 spin_unlock_irqrestore(&vector_lock, flags); 347 spin_unlock_irqrestore(&vector_lock, flags);
350 cfg->move_cleanup_count--; 348 cfg->move_cleanup_count--;
351 unlock: 349 unlock:
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 8bfd36af46f8..dd5801eb4c69 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -1293,7 +1293,7 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
1293 monarch_cpu = cpu; 1293 monarch_cpu = cpu;
1294 sos->monarch = 1; 1294 sos->monarch = 1;
1295 } else { 1295 } else {
1296 cpu_set(cpu, mca_cpu); 1296 cpumask_set_cpu(cpu, &mca_cpu);
1297 sos->monarch = 0; 1297 sos->monarch = 0;
1298 } 1298 }
1299 mprintk(KERN_INFO "Entered OS MCA handler. PSP=%lx cpu=%d " 1299 mprintk(KERN_INFO "Entered OS MCA handler. PSP=%lx cpu=%d "
@@ -1316,7 +1316,7 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
1316 */ 1316 */
1317 ia64_mca_wakeup_all(); 1317 ia64_mca_wakeup_all();
1318 } else { 1318 } else {
1319 while (cpu_isset(cpu, mca_cpu)) 1319 while (cpumask_test_cpu(cpu, &mca_cpu))
1320 cpu_relax(); /* spin until monarch wakes us */ 1320 cpu_relax(); /* spin until monarch wakes us */
1321 } 1321 }
1322 1322
@@ -1355,9 +1355,9 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
1355 * and put this cpu in the rendez loop. 1355 * and put this cpu in the rendez loop.
1356 */ 1356 */
1357 for_each_online_cpu(i) { 1357 for_each_online_cpu(i) {
1358 if (cpu_isset(i, mca_cpu)) { 1358 if (cpumask_test_cpu(i, &mca_cpu)) {
1359 monarch_cpu = i; 1359 monarch_cpu = i;
1360 cpu_clear(i, mca_cpu); /* wake next cpu */ 1360 cpumask_clear_cpu(i, &mca_cpu); /* wake next cpu */
1361 while (monarch_cpu != -1) 1361 while (monarch_cpu != -1)
1362 cpu_relax(); /* spin until last cpu leaves */ 1362 cpu_relax(); /* spin until last cpu leaves */
1363 set_curr_task(cpu, previous_current); 1363 set_curr_task(cpu, previous_current);
@@ -1822,7 +1822,7 @@ format_mca_init_stack(void *mca_data, unsigned long offset,
1822 ti->cpu = cpu; 1822 ti->cpu = cpu;
1823 p->stack = ti; 1823 p->stack = ti;
1824 p->state = TASK_UNINTERRUPTIBLE; 1824 p->state = TASK_UNINTERRUPTIBLE;
1825 cpu_set(cpu, p->cpus_allowed); 1825 cpumask_set_cpu(cpu, &p->cpus_allowed);
1826 INIT_LIST_HEAD(&p->tasks); 1826 INIT_LIST_HEAD(&p->tasks);
1827 p->parent = p->real_parent = p->group_leader = p; 1827 p->parent = p->real_parent = p->group_leader = p;
1828 INIT_LIST_HEAD(&p->children); 1828 INIT_LIST_HEAD(&p->children);
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index 8ae36ea177d3..9dd7464f8c17 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -47,15 +47,14 @@ int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
47 struct msi_msg msg; 47 struct msi_msg msg;
48 unsigned long dest_phys_id; 48 unsigned long dest_phys_id;
49 int irq, vector; 49 int irq, vector;
50 cpumask_t mask;
51 50
52 irq = create_irq(); 51 irq = create_irq();
53 if (irq < 0) 52 if (irq < 0)
54 return irq; 53 return irq;
55 54
56 irq_set_msi_desc(irq, desc); 55 irq_set_msi_desc(irq, desc);
57 cpumask_and(&mask, &(irq_to_domain(irq)), cpu_online_mask); 56 dest_phys_id = cpu_physical_id(cpumask_any_and(&(irq_to_domain(irq)),
58 dest_phys_id = cpu_physical_id(first_cpu(mask)); 57 cpu_online_mask));
59 vector = irq_to_vector(irq); 58 vector = irq_to_vector(irq);
60 59
61 msg.address_hi = 0; 60 msg.address_hi = 0;
@@ -171,10 +170,9 @@ msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
171{ 170{
172 struct irq_cfg *cfg = irq_cfg + irq; 171 struct irq_cfg *cfg = irq_cfg + irq;
173 unsigned dest; 172 unsigned dest;
174 cpumask_t mask;
175 173
176 cpumask_and(&mask, &(irq_to_domain(irq)), cpu_online_mask); 174 dest = cpu_physical_id(cpumask_first_and(&(irq_to_domain(irq)),
177 dest = cpu_physical_id(first_cpu(mask)); 175 cpu_online_mask));
178 176
179 msg->address_hi = 0; 177 msg->address_hi = 0;
180 msg->address_lo = 178 msg->address_lo =
diff --git a/arch/ia64/kernel/numa.c b/arch/ia64/kernel/numa.c
index d288cde93606..92c376279c6d 100644
--- a/arch/ia64/kernel/numa.c
+++ b/arch/ia64/kernel/numa.c
@@ -39,7 +39,7 @@ void map_cpu_to_node(int cpu, int nid)
39 } 39 }
40 /* sanity check first */ 40 /* sanity check first */
41 oldnid = cpu_to_node_map[cpu]; 41 oldnid = cpu_to_node_map[cpu];
42 if (cpu_isset(cpu, node_to_cpu_mask[oldnid])) { 42 if (cpumask_test_cpu(cpu, &node_to_cpu_mask[oldnid])) {
43 return; /* nothing to do */ 43 return; /* nothing to do */
44 } 44 }
45 /* we don't have cpu-driven node hot add yet... 45 /* we don't have cpu-driven node hot add yet...
@@ -47,16 +47,16 @@ void map_cpu_to_node(int cpu, int nid)
47 if (!node_online(nid)) 47 if (!node_online(nid))
48 nid = first_online_node; 48 nid = first_online_node;
49 cpu_to_node_map[cpu] = nid; 49 cpu_to_node_map[cpu] = nid;
50 cpu_set(cpu, node_to_cpu_mask[nid]); 50 cpumask_set_cpu(cpu, &node_to_cpu_mask[nid]);
51 return; 51 return;
52} 52}
53 53
54void unmap_cpu_from_node(int cpu, int nid) 54void unmap_cpu_from_node(int cpu, int nid)
55{ 55{
56 WARN_ON(!cpu_isset(cpu, node_to_cpu_mask[nid])); 56 WARN_ON(!cpumask_test_cpu(cpu, &node_to_cpu_mask[nid]));
57 WARN_ON(cpu_to_node_map[cpu] != nid); 57 WARN_ON(cpu_to_node_map[cpu] != nid);
58 cpu_to_node_map[cpu] = 0; 58 cpu_to_node_map[cpu] = 0;
59 cpu_clear(cpu, node_to_cpu_mask[nid]); 59 cpumask_clear_cpu(cpu, &node_to_cpu_mask[nid]);
60} 60}
61 61
62 62
@@ -71,7 +71,7 @@ void __init build_cpu_to_node_map(void)
71 int cpu, i, node; 71 int cpu, i, node;
72 72
73 for(node=0; node < MAX_NUMNODES; node++) 73 for(node=0; node < MAX_NUMNODES; node++)
74 cpus_clear(node_to_cpu_mask[node]); 74 cpumask_clear(&node_to_cpu_mask[node]);
75 75
76 for_each_possible_early_cpu(cpu) { 76 for_each_possible_early_cpu(cpu) {
77 node = -1; 77 node = -1;
diff --git a/arch/ia64/kernel/salinfo.c b/arch/ia64/kernel/salinfo.c
index ee9719eebb1e..1eeffb7fbb16 100644
--- a/arch/ia64/kernel/salinfo.c
+++ b/arch/ia64/kernel/salinfo.c
@@ -256,7 +256,7 @@ salinfo_log_wakeup(int type, u8 *buffer, u64 size, int irqsafe)
256 data_saved->buffer = buffer; 256 data_saved->buffer = buffer;
257 } 257 }
258 } 258 }
259 cpu_set(smp_processor_id(), data->cpu_event); 259 cpumask_set_cpu(smp_processor_id(), &data->cpu_event);
260 if (irqsafe) { 260 if (irqsafe) {
261 salinfo_work_to_do(data); 261 salinfo_work_to_do(data);
262 spin_unlock_irqrestore(&data_saved_lock, flags); 262 spin_unlock_irqrestore(&data_saved_lock, flags);
@@ -274,7 +274,7 @@ salinfo_timeout_check(struct salinfo_data *data)
274 unsigned long flags; 274 unsigned long flags;
275 if (!data->open) 275 if (!data->open)
276 return; 276 return;
277 if (!cpus_empty(data->cpu_event)) { 277 if (!cpumask_empty(&data->cpu_event)) {
278 spin_lock_irqsave(&data_saved_lock, flags); 278 spin_lock_irqsave(&data_saved_lock, flags);
279 salinfo_work_to_do(data); 279 salinfo_work_to_do(data);
280 spin_unlock_irqrestore(&data_saved_lock, flags); 280 spin_unlock_irqrestore(&data_saved_lock, flags);
@@ -308,7 +308,7 @@ salinfo_event_read(struct file *file, char __user *buffer, size_t count, loff_t
308 int i, n, cpu = -1; 308 int i, n, cpu = -1;
309 309
310retry: 310retry:
311 if (cpus_empty(data->cpu_event) && down_trylock(&data->mutex)) { 311 if (cpumask_empty(&data->cpu_event) && down_trylock(&data->mutex)) {
312 if (file->f_flags & O_NONBLOCK) 312 if (file->f_flags & O_NONBLOCK)
313 return -EAGAIN; 313 return -EAGAIN;
314 if (down_interruptible(&data->mutex)) 314 if (down_interruptible(&data->mutex))
@@ -317,9 +317,9 @@ retry:
317 317
318 n = data->cpu_check; 318 n = data->cpu_check;
319 for (i = 0; i < nr_cpu_ids; i++) { 319 for (i = 0; i < nr_cpu_ids; i++) {
320 if (cpu_isset(n, data->cpu_event)) { 320 if (cpumask_test_cpu(n, &data->cpu_event)) {
321 if (!cpu_online(n)) { 321 if (!cpu_online(n)) {
322 cpu_clear(n, data->cpu_event); 322 cpumask_clear_cpu(n, &data->cpu_event);
323 continue; 323 continue;
324 } 324 }
325 cpu = n; 325 cpu = n;
@@ -451,7 +451,7 @@ retry:
451 call_on_cpu(cpu, salinfo_log_read_cpu, data); 451 call_on_cpu(cpu, salinfo_log_read_cpu, data);
452 if (!data->log_size) { 452 if (!data->log_size) {
453 data->state = STATE_NO_DATA; 453 data->state = STATE_NO_DATA;
454 cpu_clear(cpu, data->cpu_event); 454 cpumask_clear_cpu(cpu, &data->cpu_event);
455 } else { 455 } else {
456 data->state = STATE_LOG_RECORD; 456 data->state = STATE_LOG_RECORD;
457 } 457 }
@@ -491,11 +491,11 @@ salinfo_log_clear(struct salinfo_data *data, int cpu)
491 unsigned long flags; 491 unsigned long flags;
492 spin_lock_irqsave(&data_saved_lock, flags); 492 spin_lock_irqsave(&data_saved_lock, flags);
493 data->state = STATE_NO_DATA; 493 data->state = STATE_NO_DATA;
494 if (!cpu_isset(cpu, data->cpu_event)) { 494 if (!cpumask_test_cpu(cpu, &data->cpu_event)) {
495 spin_unlock_irqrestore(&data_saved_lock, flags); 495 spin_unlock_irqrestore(&data_saved_lock, flags);
496 return 0; 496 return 0;
497 } 497 }
498 cpu_clear(cpu, data->cpu_event); 498 cpumask_clear_cpu(cpu, &data->cpu_event);
499 if (data->saved_num) { 499 if (data->saved_num) {
500 shift1_data_saved(data, data->saved_num - 1); 500 shift1_data_saved(data, data->saved_num - 1);
501 data->saved_num = 0; 501 data->saved_num = 0;
@@ -509,7 +509,7 @@ salinfo_log_clear(struct salinfo_data *data, int cpu)
509 salinfo_log_new_read(cpu, data); 509 salinfo_log_new_read(cpu, data);
510 if (data->state == STATE_LOG_RECORD) { 510 if (data->state == STATE_LOG_RECORD) {
511 spin_lock_irqsave(&data_saved_lock, flags); 511 spin_lock_irqsave(&data_saved_lock, flags);
512 cpu_set(cpu, data->cpu_event); 512 cpumask_set_cpu(cpu, &data->cpu_event);
513 salinfo_work_to_do(data); 513 salinfo_work_to_do(data);
514 spin_unlock_irqrestore(&data_saved_lock, flags); 514 spin_unlock_irqrestore(&data_saved_lock, flags);
515 } 515 }
@@ -581,7 +581,7 @@ salinfo_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu
581 for (i = 0, data = salinfo_data; 581 for (i = 0, data = salinfo_data;
582 i < ARRAY_SIZE(salinfo_data); 582 i < ARRAY_SIZE(salinfo_data);
583 ++i, ++data) { 583 ++i, ++data) {
584 cpu_set(cpu, data->cpu_event); 584 cpumask_set_cpu(cpu, &data->cpu_event);
585 salinfo_work_to_do(data); 585 salinfo_work_to_do(data);
586 } 586 }
587 spin_unlock_irqrestore(&data_saved_lock, flags); 587 spin_unlock_irqrestore(&data_saved_lock, flags);
@@ -601,7 +601,7 @@ salinfo_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu
601 shift1_data_saved(data, j); 601 shift1_data_saved(data, j);
602 } 602 }
603 } 603 }
604 cpu_clear(cpu, data->cpu_event); 604 cpumask_clear_cpu(cpu, &data->cpu_event);
605 } 605 }
606 spin_unlock_irqrestore(&data_saved_lock, flags); 606 spin_unlock_irqrestore(&data_saved_lock, flags);
607 break; 607 break;
@@ -659,7 +659,7 @@ salinfo_init(void)
659 659
660 /* we missed any events before now */ 660 /* we missed any events before now */
661 for_each_online_cpu(j) 661 for_each_online_cpu(j)
662 cpu_set(j, data->cpu_event); 662 cpumask_set_cpu(j, &data->cpu_event);
663 663
664 *sdir++ = dir; 664 *sdir++ = dir;
665 } 665 }
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index d86669bcdfb2..b9761389cb8d 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -562,8 +562,8 @@ setup_arch (char **cmdline_p)
562# ifdef CONFIG_ACPI_HOTPLUG_CPU 562# ifdef CONFIG_ACPI_HOTPLUG_CPU
563 prefill_possible_map(); 563 prefill_possible_map();
564# endif 564# endif
565 per_cpu_scan_finalize((cpus_weight(early_cpu_possible_map) == 0 ? 565 per_cpu_scan_finalize((cpumask_weight(&early_cpu_possible_map) == 0 ?
566 32 : cpus_weight(early_cpu_possible_map)), 566 32 : cpumask_weight(&early_cpu_possible_map)),
567 additional_cpus > 0 ? additional_cpus : 0); 567 additional_cpus > 0 ? additional_cpus : 0);
568# endif 568# endif
569#endif /* CONFIG_APCI_BOOT */ 569#endif /* CONFIG_APCI_BOOT */
@@ -702,7 +702,8 @@ show_cpuinfo (struct seq_file *m, void *v)
702 c->itc_freq / 1000000, c->itc_freq % 1000000, 702 c->itc_freq / 1000000, c->itc_freq % 1000000,
703 lpj*HZ/500000, (lpj*HZ/5000) % 100); 703 lpj*HZ/500000, (lpj*HZ/5000) % 100);
704#ifdef CONFIG_SMP 704#ifdef CONFIG_SMP
705 seq_printf(m, "siblings : %u\n", cpus_weight(cpu_core_map[cpunum])); 705 seq_printf(m, "siblings : %u\n",
706 cpumask_weight(&cpu_core_map[cpunum]));
706 if (c->socket_id != -1) 707 if (c->socket_id != -1)
707 seq_printf(m, "physical id: %u\n", c->socket_id); 708 seq_printf(m, "physical id: %u\n", c->socket_id);
708 if (c->threads_per_core > 1 || c->cores_per_socket > 1) 709 if (c->threads_per_core > 1 || c->cores_per_socket > 1)
@@ -933,8 +934,8 @@ cpu_init (void)
933 * (must be done after per_cpu area is setup) 934 * (must be done after per_cpu area is setup)
934 */ 935 */
935 if (smp_processor_id() == 0) { 936 if (smp_processor_id() == 0) {
936 cpu_set(0, per_cpu(cpu_sibling_map, 0)); 937 cpumask_set_cpu(0, &per_cpu(cpu_sibling_map, 0));
937 cpu_set(0, cpu_core_map[0]); 938 cpumask_set_cpu(0, &cpu_core_map[0]);
938 } else { 939 } else {
939 /* 940 /*
940 * Set ar.k3 so that assembly code in MCA handler can compute 941 * Set ar.k3 so that assembly code in MCA handler can compute
diff --git a/arch/ia64/kernel/smp.c b/arch/ia64/kernel/smp.c
index 9fcd4e63048f..7f706d4f84f7 100644
--- a/arch/ia64/kernel/smp.c
+++ b/arch/ia64/kernel/smp.c
@@ -262,11 +262,11 @@ smp_flush_tlb_cpumask(cpumask_t xcpumask)
262 preempt_disable(); 262 preempt_disable();
263 mycpu = smp_processor_id(); 263 mycpu = smp_processor_id();
264 264
265 for_each_cpu_mask(cpu, cpumask) 265 for_each_cpu(cpu, &cpumask)
266 counts[cpu] = local_tlb_flush_counts[cpu].count & 0xffff; 266 counts[cpu] = local_tlb_flush_counts[cpu].count & 0xffff;
267 267
268 mb(); 268 mb();
269 for_each_cpu_mask(cpu, cpumask) { 269 for_each_cpu(cpu, &cpumask) {
270 if (cpu == mycpu) 270 if (cpu == mycpu)
271 flush_mycpu = 1; 271 flush_mycpu = 1;
272 else 272 else
@@ -276,7 +276,7 @@ smp_flush_tlb_cpumask(cpumask_t xcpumask)
276 if (flush_mycpu) 276 if (flush_mycpu)
277 smp_local_flush_tlb(); 277 smp_local_flush_tlb();
278 278
279 for_each_cpu_mask(cpu, cpumask) 279 for_each_cpu(cpu, &cpumask)
280 while(counts[cpu] == (local_tlb_flush_counts[cpu].count & 0xffff)) 280 while(counts[cpu] == (local_tlb_flush_counts[cpu].count & 0xffff))
281 udelay(FLUSH_DELAY); 281 udelay(FLUSH_DELAY);
282 282
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index 547a48d78bd7..15051e9c2c6f 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -434,7 +434,7 @@ smp_callin (void)
434 /* 434 /*
435 * Allow the master to continue. 435 * Allow the master to continue.
436 */ 436 */
437 cpu_set(cpuid, cpu_callin_map); 437 cpumask_set_cpu(cpuid, &cpu_callin_map);
438 Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid); 438 Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid);
439} 439}
440 440
@@ -475,13 +475,13 @@ do_boot_cpu (int sapicid, int cpu, struct task_struct *idle)
475 */ 475 */
476 Dprintk("Waiting on callin_map ..."); 476 Dprintk("Waiting on callin_map ...");
477 for (timeout = 0; timeout < 100000; timeout++) { 477 for (timeout = 0; timeout < 100000; timeout++) {
478 if (cpu_isset(cpu, cpu_callin_map)) 478 if (cpumask_test_cpu(cpu, &cpu_callin_map))
479 break; /* It has booted */ 479 break; /* It has booted */
480 udelay(100); 480 udelay(100);
481 } 481 }
482 Dprintk("\n"); 482 Dprintk("\n");
483 483
484 if (!cpu_isset(cpu, cpu_callin_map)) { 484 if (!cpumask_test_cpu(cpu, &cpu_callin_map)) {
485 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid); 485 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid);
486 ia64_cpu_to_sapicid[cpu] = -1; 486 ia64_cpu_to_sapicid[cpu] = -1;
487 set_cpu_online(cpu, false); /* was set in smp_callin() */ 487 set_cpu_online(cpu, false); /* was set in smp_callin() */
@@ -541,7 +541,7 @@ smp_prepare_cpus (unsigned int max_cpus)
541 541
542 smp_setup_percpu_timer(); 542 smp_setup_percpu_timer();
543 543
544 cpu_set(0, cpu_callin_map); 544 cpumask_set_cpu(0, &cpu_callin_map);
545 545
546 local_cpu_data->loops_per_jiffy = loops_per_jiffy; 546 local_cpu_data->loops_per_jiffy = loops_per_jiffy;
547 ia64_cpu_to_sapicid[0] = boot_cpu_id; 547 ia64_cpu_to_sapicid[0] = boot_cpu_id;
@@ -565,7 +565,7 @@ smp_prepare_cpus (unsigned int max_cpus)
565void smp_prepare_boot_cpu(void) 565void smp_prepare_boot_cpu(void)
566{ 566{
567 set_cpu_online(smp_processor_id(), true); 567 set_cpu_online(smp_processor_id(), true);
568 cpu_set(smp_processor_id(), cpu_callin_map); 568 cpumask_set_cpu(smp_processor_id(), &cpu_callin_map);
569 set_numa_node(cpu_to_node_map[smp_processor_id()]); 569 set_numa_node(cpu_to_node_map[smp_processor_id()]);
570 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; 570 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
571 paravirt_post_smp_prepare_boot_cpu(); 571 paravirt_post_smp_prepare_boot_cpu();
@@ -577,10 +577,10 @@ clear_cpu_sibling_map(int cpu)
577{ 577{
578 int i; 578 int i;
579 579
580 for_each_cpu_mask(i, per_cpu(cpu_sibling_map, cpu)) 580 for_each_cpu(i, &per_cpu(cpu_sibling_map, cpu))
581 cpu_clear(cpu, per_cpu(cpu_sibling_map, i)); 581 cpumask_clear_cpu(cpu, &per_cpu(cpu_sibling_map, i));
582 for_each_cpu_mask(i, cpu_core_map[cpu]) 582 for_each_cpu(i, &cpu_core_map[cpu])
583 cpu_clear(cpu, cpu_core_map[i]); 583 cpumask_clear_cpu(cpu, &cpu_core_map[i]);
584 584
585 per_cpu(cpu_sibling_map, cpu) = cpu_core_map[cpu] = CPU_MASK_NONE; 585 per_cpu(cpu_sibling_map, cpu) = cpu_core_map[cpu] = CPU_MASK_NONE;
586} 586}
@@ -592,12 +592,12 @@ remove_siblinginfo(int cpu)
592 592
593 if (cpu_data(cpu)->threads_per_core == 1 && 593 if (cpu_data(cpu)->threads_per_core == 1 &&
594 cpu_data(cpu)->cores_per_socket == 1) { 594 cpu_data(cpu)->cores_per_socket == 1) {
595 cpu_clear(cpu, cpu_core_map[cpu]); 595 cpumask_clear_cpu(cpu, &cpu_core_map[cpu]);
596 cpu_clear(cpu, per_cpu(cpu_sibling_map, cpu)); 596 cpumask_clear_cpu(cpu, &per_cpu(cpu_sibling_map, cpu));
597 return; 597 return;
598 } 598 }
599 599
600 last = (cpus_weight(cpu_core_map[cpu]) == 1 ? 1 : 0); 600 last = (cpumask_weight(&cpu_core_map[cpu]) == 1 ? 1 : 0);
601 601
602 /* remove it from all sibling map's */ 602 /* remove it from all sibling map's */
603 clear_cpu_sibling_map(cpu); 603 clear_cpu_sibling_map(cpu);
@@ -673,7 +673,7 @@ int __cpu_disable(void)
673 remove_siblinginfo(cpu); 673 remove_siblinginfo(cpu);
674 fixup_irqs(); 674 fixup_irqs();
675 local_flush_tlb_all(); 675 local_flush_tlb_all();
676 cpu_clear(cpu, cpu_callin_map); 676 cpumask_clear_cpu(cpu, &cpu_callin_map);
677 return 0; 677 return 0;
678} 678}
679 679
@@ -718,11 +718,13 @@ static inline void set_cpu_sibling_map(int cpu)
718 718
719 for_each_online_cpu(i) { 719 for_each_online_cpu(i) {
720 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) { 720 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) {
721 cpu_set(i, cpu_core_map[cpu]); 721 cpumask_set_cpu(i, &cpu_core_map[cpu]);
722 cpu_set(cpu, cpu_core_map[i]); 722 cpumask_set_cpu(cpu, &cpu_core_map[i]);
723 if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) { 723 if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) {
724 cpu_set(i, per_cpu(cpu_sibling_map, cpu)); 724 cpumask_set_cpu(i,
725 cpu_set(cpu, per_cpu(cpu_sibling_map, i)); 725 &per_cpu(cpu_sibling_map, cpu));
726 cpumask_set_cpu(cpu,
727 &per_cpu(cpu_sibling_map, i));
726 } 728 }
727 } 729 }
728 } 730 }
@@ -742,7 +744,7 @@ __cpu_up(unsigned int cpu, struct task_struct *tidle)
742 * Already booted cpu? not valid anymore since we dont 744 * Already booted cpu? not valid anymore since we dont
743 * do idle loop tightspin anymore. 745 * do idle loop tightspin anymore.
744 */ 746 */
745 if (cpu_isset(cpu, cpu_callin_map)) 747 if (cpumask_test_cpu(cpu, &cpu_callin_map))
746 return -EINVAL; 748 return -EINVAL;
747 749
748 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; 750 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
@@ -753,8 +755,8 @@ __cpu_up(unsigned int cpu, struct task_struct *tidle)
753 755
754 if (cpu_data(cpu)->threads_per_core == 1 && 756 if (cpu_data(cpu)->threads_per_core == 1 &&
755 cpu_data(cpu)->cores_per_socket == 1) { 757 cpu_data(cpu)->cores_per_socket == 1) {
756 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu)); 758 cpumask_set_cpu(cpu, &per_cpu(cpu_sibling_map, cpu));
757 cpu_set(cpu, cpu_core_map[cpu]); 759 cpumask_set_cpu(cpu, &cpu_core_map[cpu]);
758 return 0; 760 return 0;
759 } 761 }
760 762
diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c
index 965ab42fabb0..c01fe8991244 100644
--- a/arch/ia64/kernel/topology.c
+++ b/arch/ia64/kernel/topology.c
@@ -148,7 +148,7 @@ static void cache_shared_cpu_map_setup(unsigned int cpu,
148 148
149 if (cpu_data(cpu)->threads_per_core <= 1 && 149 if (cpu_data(cpu)->threads_per_core <= 1 &&
150 cpu_data(cpu)->cores_per_socket <= 1) { 150 cpu_data(cpu)->cores_per_socket <= 1) {
151 cpu_set(cpu, this_leaf->shared_cpu_map); 151 cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
152 return; 152 return;
153 } 153 }
154 154
@@ -164,7 +164,7 @@ static void cache_shared_cpu_map_setup(unsigned int cpu,
164 if (cpu_data(cpu)->socket_id == cpu_data(j)->socket_id 164 if (cpu_data(cpu)->socket_id == cpu_data(j)->socket_id
165 && cpu_data(j)->core_id == csi.log1_cid 165 && cpu_data(j)->core_id == csi.log1_cid
166 && cpu_data(j)->thread_id == csi.log1_tid) 166 && cpu_data(j)->thread_id == csi.log1_tid)
167 cpu_set(j, this_leaf->shared_cpu_map); 167 cpumask_set_cpu(j, &this_leaf->shared_cpu_map);
168 168
169 i++; 169 i++;
170 } while (i < num_shared && 170 } while (i < num_shared &&
@@ -177,7 +177,7 @@ static void cache_shared_cpu_map_setup(unsigned int cpu,
177static void cache_shared_cpu_map_setup(unsigned int cpu, 177static void cache_shared_cpu_map_setup(unsigned int cpu,
178 struct cache_info * this_leaf) 178 struct cache_info * this_leaf)
179{ 179{
180 cpu_set(cpu, this_leaf->shared_cpu_map); 180 cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
181 return; 181 return;
182} 182}
183#endif 183#endif
diff --git a/arch/m32r/kernel/smpboot.c b/arch/m32r/kernel/smpboot.c
index bb21f4f63170..a468467542f4 100644
--- a/arch/m32r/kernel/smpboot.c
+++ b/arch/m32r/kernel/smpboot.c
@@ -376,7 +376,7 @@ void __init smp_cpus_done(unsigned int max_cpus)
376 if (!cpumask_equal(&cpu_callin_map, cpu_online_mask)) 376 if (!cpumask_equal(&cpu_callin_map, cpu_online_mask))
377 BUG(); 377 BUG();
378 378
379 for (cpu_id = 0 ; cpu_id < num_online_cpus() ; cpu_id++) 379 for_each_online_cpu(cpu_id)
380 show_cpu_info(cpu_id); 380 show_cpu_info(cpu_id);
381 381
382 /* 382 /*
diff --git a/arch/m68k/coldfire/m527x.c b/arch/m68k/coldfire/m527x.c
index 2ba470735bed..c0b3e28f91df 100644
--- a/arch/m68k/coldfire/m527x.c
+++ b/arch/m68k/coldfire/m527x.c
@@ -92,7 +92,6 @@ static void __init m527x_uarts_init(void)
92 92
93static void __init m527x_fec_init(void) 93static void __init m527x_fec_init(void)
94{ 94{
95 u16 par;
96 u8 v; 95 u8 v;
97 96
98 /* Set multi-function pins to ethernet mode for fec0 */ 97 /* Set multi-function pins to ethernet mode for fec0 */
@@ -100,6 +99,8 @@ static void __init m527x_fec_init(void)
100 v = readb(MCFGPIO_PAR_FECI2C); 99 v = readb(MCFGPIO_PAR_FECI2C);
101 writeb(v | 0xf0, MCFGPIO_PAR_FECI2C); 100 writeb(v | 0xf0, MCFGPIO_PAR_FECI2C);
102#else 101#else
102 u16 par;
103
103 par = readw(MCFGPIO_PAR_FECI2C); 104 par = readw(MCFGPIO_PAR_FECI2C);
104 writew(par | 0xf00, MCFGPIO_PAR_FECI2C); 105 writew(par | 0xf00, MCFGPIO_PAR_FECI2C);
105 v = readb(MCFGPIO_PAR_FEC0HL); 106 v = readb(MCFGPIO_PAR_FEC0HL);
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 1bebbe78055a..2c648a043f24 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -103,8 +103,10 @@
103 */ 103 */
104#define MCFFEC_BASE0 (MCF_IPSBAR + 0x1000) 104#define MCFFEC_BASE0 (MCF_IPSBAR + 0x1000)
105#define MCFFEC_SIZE0 0x800 105#define MCFFEC_SIZE0 0x800
106#ifdef CONFIG_M5275
106#define MCFFEC_BASE1 (MCF_IPSBAR + 0x1800) 107#define MCFFEC_BASE1 (MCF_IPSBAR + 0x1800)
107#define MCFFEC_SIZE1 0x800 108#define MCFFEC_SIZE1 0x800
109#endif
108 110
109/* 111/*
110 * QSPI module. 112 * QSPI module.
diff --git a/arch/m68k/include/asm/m68360_pram.h b/arch/m68k/include/asm/m68360_pram.h
index e6088bbce93d..c0cbd96f09bc 100644
--- a/arch/m68k/include/asm/m68360_pram.h
+++ b/arch/m68k/include/asm/m68360_pram.h
@@ -170,7 +170,7 @@ struct uart_pram {
170 unsigned short frmer; /* Rx framing error counter */ 170 unsigned short frmer; /* Rx framing error counter */
171 unsigned short nosec; /* Rx noise counter */ 171 unsigned short nosec; /* Rx noise counter */
172 unsigned short brkec; /* Rx break character counter */ 172 unsigned short brkec; /* Rx break character counter */
173 unsigned short brkln; /* Reaceive break length */ 173 unsigned short brkln; /* Receive break length */
174 174
175 unsigned short uaddr1; /* address character 1 */ 175 unsigned short uaddr1; /* address character 1 */
176 unsigned short uaddr2; /* address character 2 */ 176 unsigned short uaddr2; /* address character 2 */
@@ -338,7 +338,7 @@ struct ethernet_pram {
338 unsigned long c_pres; /* preset CRC */ 338 unsigned long c_pres; /* preset CRC */
339 unsigned long c_mask; /* constant mask for CRC */ 339 unsigned long c_mask; /* constant mask for CRC */
340 unsigned long crcec; /* CRC error counter */ 340 unsigned long crcec; /* CRC error counter */
341 unsigned long alec; /* alighnment error counter */ 341 unsigned long alec; /* alignment error counter */
342 unsigned long disfc; /* discard frame counter */ 342 unsigned long disfc; /* discard frame counter */
343 unsigned short pads; /* short frame PAD characters */ 343 unsigned short pads; /* short frame PAD characters */
344 unsigned short ret_lim; /* retry limit threshold */ 344 unsigned short ret_lim; /* retry limit threshold */
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
index b94bf44d8d8e..e3e808a6c542 100644
--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -58,9 +58,9 @@ static inline int enable_irq_for_cpu(int cpu, struct irq_data *d,
58 58
59#ifdef CONFIG_SMP 59#ifdef CONFIG_SMP
60 if (m) 60 if (m)
61 enable &= cpu_isset(cpu, *m); 61 enable &= cpumask_test_cpu(cpu, m);
62 else if (irqd_affinity_was_set(d)) 62 else if (irqd_affinity_was_set(d))
63 enable &= cpu_isset(cpu, *d->affinity); 63 enable &= cpumask_test_cpu(cpu, d->affinity);
64#endif 64#endif
65 return enable; 65 return enable;
66} 66}
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 8b1eeffa12ed..56f5d080ef9d 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -72,7 +72,7 @@ static inline void octeon_send_ipi_mask(const struct cpumask *mask,
72{ 72{
73 unsigned int i; 73 unsigned int i;
74 74
75 for_each_cpu_mask(i, *mask) 75 for_each_cpu(i, mask)
76 octeon_send_ipi_single(i, action); 76 octeon_send_ipi_single(i, action);
77} 77}
78 78
@@ -239,7 +239,7 @@ static int octeon_cpu_disable(void)
239 return -ENOTSUPP; 239 return -ENOTSUPP;
240 240
241 set_cpu_online(cpu, false); 241 set_cpu_online(cpu, false);
242 cpu_clear(cpu, cpu_callin_map); 242 cpumask_clear_cpu(cpu, &cpu_callin_map);
243 octeon_fixup_irqs(); 243 octeon_fixup_irqs();
244 244
245 flush_cache_all(); 245 flush_cache_all();
diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h
index eacf865d21c2..bb02fac9b4fa 100644
--- a/arch/mips/include/asm/smp.h
+++ b/arch/mips/include/asm/smp.h
@@ -88,7 +88,7 @@ static inline void arch_send_call_function_single_ipi(int cpu)
88{ 88{
89 extern struct plat_smp_ops *mp_ops; /* private */ 89 extern struct plat_smp_ops *mp_ops; /* private */
90 90
91 mp_ops->send_ipi_mask(&cpumask_of_cpu(cpu), SMP_CALL_FUNCTION); 91 mp_ops->send_ipi_mask(cpumask_of(cpu), SMP_CALL_FUNCTION);
92} 92}
93 93
94static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask) 94static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask)
diff --git a/arch/mips/kernel/crash.c b/arch/mips/kernel/crash.c
index d21264681e97..d434d5d5ae6e 100644
--- a/arch/mips/kernel/crash.c
+++ b/arch/mips/kernel/crash.c
@@ -25,9 +25,9 @@ static void crash_shutdown_secondary(void *ignore)
25 return; 25 return;
26 26
27 local_irq_disable(); 27 local_irq_disable();
28 if (!cpu_isset(cpu, cpus_in_crash)) 28 if (!cpumask_test_cpu(cpu, &cpus_in_crash))
29 crash_save_cpu(regs, cpu); 29 crash_save_cpu(regs, cpu);
30 cpu_set(cpu, cpus_in_crash); 30 cpumask_set_cpu(cpu, &cpus_in_crash);
31 31
32 while (!atomic_read(&kexec_ready_to_reboot)) 32 while (!atomic_read(&kexec_ready_to_reboot))
33 cpu_relax(); 33 cpu_relax();
@@ -50,7 +50,7 @@ static void crash_kexec_prepare_cpus(void)
50 */ 50 */
51 pr_emerg("Sending IPI to other cpus...\n"); 51 pr_emerg("Sending IPI to other cpus...\n");
52 msecs = 10000; 52 msecs = 10000;
53 while ((cpus_weight(cpus_in_crash) < ncpus) && (--msecs > 0)) { 53 while ((cpumask_weight(&cpus_in_crash) < ncpus) && (--msecs > 0)) {
54 cpu_relax(); 54 cpu_relax();
55 mdelay(1); 55 mdelay(1);
56 } 56 }
@@ -66,5 +66,5 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
66 crashing_cpu = smp_processor_id(); 66 crashing_cpu = smp_processor_id();
67 crash_save_cpu(regs, crashing_cpu); 67 crash_save_cpu(regs, crashing_cpu);
68 crash_kexec_prepare_cpus(); 68 crash_kexec_prepare_cpus();
69 cpu_set(crashing_cpu, cpus_in_crash); 69 cpumask_set_cpu(crashing_cpu, &cpus_in_crash);
70} 70}
diff --git a/arch/mips/kernel/mips-mt-fpaff.c b/arch/mips/kernel/mips-mt-fpaff.c
index 362bb3707e62..3e4491aa6d6b 100644
--- a/arch/mips/kernel/mips-mt-fpaff.c
+++ b/arch/mips/kernel/mips-mt-fpaff.c
@@ -114,8 +114,8 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
114 /* Compute new global allowed CPU set if necessary */ 114 /* Compute new global allowed CPU set if necessary */
115 ti = task_thread_info(p); 115 ti = task_thread_info(p);
116 if (test_ti_thread_flag(ti, TIF_FPUBOUND) && 116 if (test_ti_thread_flag(ti, TIF_FPUBOUND) &&
117 cpus_intersects(*new_mask, mt_fpu_cpumask)) { 117 cpumask_intersects(new_mask, &mt_fpu_cpumask)) {
118 cpus_and(*effective_mask, *new_mask, mt_fpu_cpumask); 118 cpumask_and(effective_mask, new_mask, &mt_fpu_cpumask);
119 retval = set_cpus_allowed_ptr(p, effective_mask); 119 retval = set_cpus_allowed_ptr(p, effective_mask);
120 } else { 120 } else {
121 cpumask_copy(effective_mask, new_mask); 121 cpumask_copy(effective_mask, new_mask);
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index d295bd1e4996..f2975d4d1e44 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -49,7 +49,7 @@
49void arch_cpu_idle_dead(void) 49void arch_cpu_idle_dead(void)
50{ 50{
51 /* What the heck is this check doing ? */ 51 /* What the heck is this check doing ? */
52 if (!cpu_isset(smp_processor_id(), cpu_callin_map)) 52 if (!cpumask_test_cpu(smp_processor_id(), &cpu_callin_map))
53 play_dead(); 53 play_dead();
54} 54}
55#endif 55#endif
diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
index b8bd9340c9c7..fd528d7ea278 100644
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -362,7 +362,7 @@ static int bmips_cpu_disable(void)
362 pr_info("SMP: CPU%d is offline\n", cpu); 362 pr_info("SMP: CPU%d is offline\n", cpu);
363 363
364 set_cpu_online(cpu, false); 364 set_cpu_online(cpu, false);
365 cpu_clear(cpu, cpu_callin_map); 365 cpumask_clear_cpu(cpu, &cpu_callin_map);
366 clear_c0_status(IE_IRQ5); 366 clear_c0_status(IE_IRQ5);
367 367
368 local_flush_tlb_all(); 368 local_flush_tlb_all();
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index e36a859af666..d5e0f949dc48 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -66,7 +66,7 @@ static void cmp_smp_finish(void)
66#ifdef CONFIG_MIPS_MT_FPAFF 66#ifdef CONFIG_MIPS_MT_FPAFF
67 /* If we have an FPU, enroll ourselves in the FPU-full mask */ 67 /* If we have an FPU, enroll ourselves in the FPU-full mask */
68 if (cpu_has_fpu) 68 if (cpu_has_fpu)
69 cpu_set(smp_processor_id(), mt_fpu_cpumask); 69 cpumask_set_cpu(smp_processor_id(), &mt_fpu_cpumask);
70#endif /* CONFIG_MIPS_MT_FPAFF */ 70#endif /* CONFIG_MIPS_MT_FPAFF */
71 71
72 local_irq_enable(); 72 local_irq_enable();
@@ -110,7 +110,7 @@ void __init cmp_smp_setup(void)
110#ifdef CONFIG_MIPS_MT_FPAFF 110#ifdef CONFIG_MIPS_MT_FPAFF
111 /* If we have an FPU, enroll ourselves in the FPU-full mask */ 111 /* If we have an FPU, enroll ourselves in the FPU-full mask */
112 if (cpu_has_fpu) 112 if (cpu_has_fpu)
113 cpu_set(0, mt_fpu_cpumask); 113 cpumask_set_cpu(0, &mt_fpu_cpumask);
114#endif /* CONFIG_MIPS_MT_FPAFF */ 114#endif /* CONFIG_MIPS_MT_FPAFF */
115 115
116 for (i = 1; i < NR_CPUS; i++) { 116 for (i = 1; i < NR_CPUS; i++) {
diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c
index d5589bedd0a4..7e011f95bb8e 100644
--- a/arch/mips/kernel/smp-cps.c
+++ b/arch/mips/kernel/smp-cps.c
@@ -290,7 +290,7 @@ static void cps_smp_finish(void)
290#ifdef CONFIG_MIPS_MT_FPAFF 290#ifdef CONFIG_MIPS_MT_FPAFF
291 /* If we have an FPU, enroll ourselves in the FPU-full mask */ 291 /* If we have an FPU, enroll ourselves in the FPU-full mask */
292 if (cpu_has_fpu) 292 if (cpu_has_fpu)
293 cpu_set(smp_processor_id(), mt_fpu_cpumask); 293 cpumask_set_cpu(smp_processor_id(), &mt_fpu_cpumask);
294#endif /* CONFIG_MIPS_MT_FPAFF */ 294#endif /* CONFIG_MIPS_MT_FPAFF */
295 295
296 local_irq_enable(); 296 local_irq_enable();
@@ -313,7 +313,7 @@ static int cps_cpu_disable(void)
313 atomic_sub(1 << cpu_vpe_id(&current_cpu_data), &core_cfg->vpe_mask); 313 atomic_sub(1 << cpu_vpe_id(&current_cpu_data), &core_cfg->vpe_mask);
314 smp_mb__after_atomic(); 314 smp_mb__after_atomic();
315 set_cpu_online(cpu, false); 315 set_cpu_online(cpu, false);
316 cpu_clear(cpu, cpu_callin_map); 316 cpumask_clear_cpu(cpu, &cpu_callin_map);
317 317
318 return 0; 318 return 0;
319} 319}
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 17ea705f6c40..86311a164ef1 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -178,7 +178,7 @@ static void vsmp_smp_finish(void)
178#ifdef CONFIG_MIPS_MT_FPAFF 178#ifdef CONFIG_MIPS_MT_FPAFF
179 /* If we have an FPU, enroll ourselves in the FPU-full mask */ 179 /* If we have an FPU, enroll ourselves in the FPU-full mask */
180 if (cpu_has_fpu) 180 if (cpu_has_fpu)
181 cpu_set(smp_processor_id(), mt_fpu_cpumask); 181 cpumask_set_cpu(smp_processor_id(), &mt_fpu_cpumask);
182#endif /* CONFIG_MIPS_MT_FPAFF */ 182#endif /* CONFIG_MIPS_MT_FPAFF */
183 183
184 local_irq_enable(); 184 local_irq_enable();
@@ -239,7 +239,7 @@ static void __init vsmp_smp_setup(void)
239#ifdef CONFIG_MIPS_MT_FPAFF 239#ifdef CONFIG_MIPS_MT_FPAFF
240 /* If we have an FPU, enroll ourselves in the FPU-full mask */ 240 /* If we have an FPU, enroll ourselves in the FPU-full mask */
241 if (cpu_has_fpu) 241 if (cpu_has_fpu)
242 cpu_set(0, mt_fpu_cpumask); 242 cpumask_set_cpu(0, &mt_fpu_cpumask);
243#endif /* CONFIG_MIPS_MT_FPAFF */ 243#endif /* CONFIG_MIPS_MT_FPAFF */
244 if (!cpu_has_mipsmt) 244 if (!cpu_has_mipsmt)
245 return; 245 return;
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 5b020bda3e05..193ace7955fb 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -75,30 +75,30 @@ static inline void set_cpu_sibling_map(int cpu)
75{ 75{
76 int i; 76 int i;
77 77
78 cpu_set(cpu, cpu_sibling_setup_map); 78 cpumask_set_cpu(cpu, &cpu_sibling_setup_map);
79 79
80 if (smp_num_siblings > 1) { 80 if (smp_num_siblings > 1) {
81 for_each_cpu_mask(i, cpu_sibling_setup_map) { 81 for_each_cpu(i, &cpu_sibling_setup_map) {
82 if (cpu_data[cpu].package == cpu_data[i].package && 82 if (cpu_data[cpu].package == cpu_data[i].package &&
83 cpu_data[cpu].core == cpu_data[i].core) { 83 cpu_data[cpu].core == cpu_data[i].core) {
84 cpu_set(i, cpu_sibling_map[cpu]); 84 cpumask_set_cpu(i, &cpu_sibling_map[cpu]);
85 cpu_set(cpu, cpu_sibling_map[i]); 85 cpumask_set_cpu(cpu, &cpu_sibling_map[i]);
86 } 86 }
87 } 87 }
88 } else 88 } else
89 cpu_set(cpu, cpu_sibling_map[cpu]); 89 cpumask_set_cpu(cpu, &cpu_sibling_map[cpu]);
90} 90}
91 91
92static inline void set_cpu_core_map(int cpu) 92static inline void set_cpu_core_map(int cpu)
93{ 93{
94 int i; 94 int i;
95 95
96 cpu_set(cpu, cpu_core_setup_map); 96 cpumask_set_cpu(cpu, &cpu_core_setup_map);
97 97
98 for_each_cpu_mask(i, cpu_core_setup_map) { 98 for_each_cpu(i, &cpu_core_setup_map) {
99 if (cpu_data[cpu].package == cpu_data[i].package) { 99 if (cpu_data[cpu].package == cpu_data[i].package) {
100 cpu_set(i, cpu_core_map[cpu]); 100 cpumask_set_cpu(i, &cpu_core_map[cpu]);
101 cpu_set(cpu, cpu_core_map[i]); 101 cpumask_set_cpu(cpu, &cpu_core_map[i]);
102 } 102 }
103 } 103 }
104} 104}
@@ -138,7 +138,7 @@ asmlinkage void start_secondary(void)
138 cpu = smp_processor_id(); 138 cpu = smp_processor_id();
139 cpu_data[cpu].udelay_val = loops_per_jiffy; 139 cpu_data[cpu].udelay_val = loops_per_jiffy;
140 140
141 cpu_set(cpu, cpu_coherent_mask); 141 cpumask_set_cpu(cpu, &cpu_coherent_mask);
142 notify_cpu_starting(cpu); 142 notify_cpu_starting(cpu);
143 143
144 set_cpu_online(cpu, true); 144 set_cpu_online(cpu, true);
@@ -146,7 +146,7 @@ asmlinkage void start_secondary(void)
146 set_cpu_sibling_map(cpu); 146 set_cpu_sibling_map(cpu);
147 set_cpu_core_map(cpu); 147 set_cpu_core_map(cpu);
148 148
149 cpu_set(cpu, cpu_callin_map); 149 cpumask_set_cpu(cpu, &cpu_callin_map);
150 150
151 synchronise_count_slave(cpu); 151 synchronise_count_slave(cpu);
152 152
@@ -208,7 +208,7 @@ void smp_prepare_boot_cpu(void)
208{ 208{
209 set_cpu_possible(0, true); 209 set_cpu_possible(0, true);
210 set_cpu_online(0, true); 210 set_cpu_online(0, true);
211 cpu_set(0, cpu_callin_map); 211 cpumask_set_cpu(0, &cpu_callin_map);
212} 212}
213 213
214int __cpu_up(unsigned int cpu, struct task_struct *tidle) 214int __cpu_up(unsigned int cpu, struct task_struct *tidle)
@@ -218,7 +218,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle)
218 /* 218 /*
219 * Trust is futile. We should really have timeouts ... 219 * Trust is futile. We should really have timeouts ...
220 */ 220 */
221 while (!cpu_isset(cpu, cpu_callin_map)) 221 while (!cpumask_test_cpu(cpu, &cpu_callin_map))
222 udelay(100); 222 udelay(100);
223 223
224 synchronise_count_master(cpu); 224 synchronise_count_master(cpu);
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index e334c641a81b..ba32e48d4697 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1153,13 +1153,13 @@ static void mt_ase_fp_affinity(void)
1153 * restricted the allowed set to exclude any CPUs with FPUs, 1153 * restricted the allowed set to exclude any CPUs with FPUs,
1154 * we'll skip the procedure. 1154 * we'll skip the procedure.
1155 */ 1155 */
1156 if (cpus_intersects(current->cpus_allowed, mt_fpu_cpumask)) { 1156 if (cpumask_intersects(&current->cpus_allowed, &mt_fpu_cpumask)) {
1157 cpumask_t tmask; 1157 cpumask_t tmask;
1158 1158
1159 current->thread.user_cpus_allowed 1159 current->thread.user_cpus_allowed
1160 = current->cpus_allowed; 1160 = current->cpus_allowed;
1161 cpus_and(tmask, current->cpus_allowed, 1161 cpumask_and(&tmask, &current->cpus_allowed,
1162 mt_fpu_cpumask); 1162 &mt_fpu_cpumask);
1163 set_cpus_allowed_ptr(current, &tmask); 1163 set_cpus_allowed_ptr(current, &tmask);
1164 set_thread_flag(TIF_FPUBOUND); 1164 set_thread_flag(TIF_FPUBOUND);
1165 } 1165 }
diff --git a/arch/mips/loongson/loongson-3/numa.c b/arch/mips/loongson/loongson-3/numa.c
index 6cae0e75de27..12d14ed48778 100644
--- a/arch/mips/loongson/loongson-3/numa.c
+++ b/arch/mips/loongson/loongson-3/numa.c
@@ -233,7 +233,7 @@ static __init void prom_meminit(void)
233 if (node_online(node)) { 233 if (node_online(node)) {
234 szmem(node); 234 szmem(node);
235 node_mem_init(node); 235 node_mem_init(node);
236 cpus_clear(__node_data[(node)]->cpumask); 236 cpumask_clear(&__node_data[(node)]->cpumask);
237 } 237 }
238 } 238 }
239 for (cpu = 0; cpu < loongson_sysconf.nr_cpus; cpu++) { 239 for (cpu = 0; cpu < loongson_sysconf.nr_cpus; cpu++) {
@@ -244,7 +244,7 @@ static __init void prom_meminit(void)
244 if (loongson_sysconf.reserved_cpus_mask & (1<<cpu)) 244 if (loongson_sysconf.reserved_cpus_mask & (1<<cpu))
245 continue; 245 continue;
246 246
247 cpu_set(active_cpu, __node_data[(node)]->cpumask); 247 cpumask_set_cpu(active_cpu, &__node_data[(node)]->cpumask);
248 pr_info("NUMA: set cpumask cpu %d on node %d\n", active_cpu, node); 248 pr_info("NUMA: set cpumask cpu %d on node %d\n", active_cpu, node);
249 249
250 active_cpu++; 250 active_cpu++;
diff --git a/arch/mips/loongson/loongson-3/smp.c b/arch/mips/loongson/loongson-3/smp.c
index e2eb688b5434..e3c68b5da18d 100644
--- a/arch/mips/loongson/loongson-3/smp.c
+++ b/arch/mips/loongson/loongson-3/smp.c
@@ -408,7 +408,7 @@ static int loongson3_cpu_disable(void)
408 return -EBUSY; 408 return -EBUSY;
409 409
410 set_cpu_online(cpu, false); 410 set_cpu_online(cpu, false);
411 cpu_clear(cpu, cpu_callin_map); 411 cpumask_clear_cpu(cpu, &cpu_callin_map);
412 local_irq_save(flags); 412 local_irq_save(flags);
413 fixup_irqs(); 413 fixup_irqs();
414 local_irq_restore(flags); 414 local_irq_restore(flags);
diff --git a/arch/mips/paravirt/paravirt-smp.c b/arch/mips/paravirt/paravirt-smp.c
index 0164b0c48352..42181c7105df 100644
--- a/arch/mips/paravirt/paravirt-smp.c
+++ b/arch/mips/paravirt/paravirt-smp.c
@@ -75,7 +75,7 @@ static void paravirt_send_ipi_mask(const struct cpumask *mask, unsigned int acti
75{ 75{
76 unsigned int cpu; 76 unsigned int cpu;
77 77
78 for_each_cpu_mask(cpu, *mask) 78 for_each_cpu(cpu, mask)
79 paravirt_send_ipi_single(cpu, action); 79 paravirt_send_ipi_single(cpu, action);
80} 80}
81 81
diff --git a/arch/mips/sgi-ip27/ip27-init.c b/arch/mips/sgi-ip27/ip27-init.c
index ee736bd103f8..570098bfdf87 100644
--- a/arch/mips/sgi-ip27/ip27-init.c
+++ b/arch/mips/sgi-ip27/ip27-init.c
@@ -60,7 +60,7 @@ static void per_hub_init(cnodeid_t cnode)
60 nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode); 60 nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode);
61 int i; 61 int i;
62 62
63 cpu_set(smp_processor_id(), hub->h_cpus); 63 cpumask_set_cpu(smp_processor_id(), &hub->h_cpus);
64 64
65 if (test_and_set_bit(cnode, hub_init_mask)) 65 if (test_and_set_bit(cnode, hub_init_mask))
66 return; 66 return;
diff --git a/arch/mips/sgi-ip27/ip27-klnuma.c b/arch/mips/sgi-ip27/ip27-klnuma.c
index ecbb62f339c5..bda90cf87e8c 100644
--- a/arch/mips/sgi-ip27/ip27-klnuma.c
+++ b/arch/mips/sgi-ip27/ip27-klnuma.c
@@ -29,8 +29,8 @@ static cpumask_t ktext_repmask;
29void __init setup_replication_mask(void) 29void __init setup_replication_mask(void)
30{ 30{
31 /* Set only the master cnode's bit. The master cnode is always 0. */ 31 /* Set only the master cnode's bit. The master cnode is always 0. */
32 cpus_clear(ktext_repmask); 32 cpumask_clear(&ktext_repmask);
33 cpu_set(0, ktext_repmask); 33 cpumask_set_cpu(0, &ktext_repmask);
34 34
35#ifdef CONFIG_REPLICATE_KTEXT 35#ifdef CONFIG_REPLICATE_KTEXT
36#ifndef CONFIG_MAPPED_KERNEL 36#ifndef CONFIG_MAPPED_KERNEL
@@ -43,7 +43,7 @@ void __init setup_replication_mask(void)
43 if (cnode == 0) 43 if (cnode == 0)
44 continue; 44 continue;
45 /* Advertise that we have a copy of the kernel */ 45 /* Advertise that we have a copy of the kernel */
46 cpu_set(cnode, ktext_repmask); 46 cpumask_set_cpu(cnode, &ktext_repmask);
47 } 47 }
48 } 48 }
49#endif 49#endif
@@ -99,7 +99,7 @@ void __init replicate_kernel_text()
99 client_nasid = COMPACT_TO_NASID_NODEID(cnode); 99 client_nasid = COMPACT_TO_NASID_NODEID(cnode);
100 100
101 /* Check if this node should get a copy of the kernel */ 101 /* Check if this node should get a copy of the kernel */
102 if (cpu_isset(cnode, ktext_repmask)) { 102 if (cpumask_test_cpu(cnode, &ktext_repmask)) {
103 server_nasid = client_nasid; 103 server_nasid = client_nasid;
104 copy_kernel(server_nasid); 104 copy_kernel(server_nasid);
105 } 105 }
@@ -124,7 +124,7 @@ unsigned long node_getfirstfree(cnodeid_t cnode)
124 loadbase += 16777216; 124 loadbase += 16777216;
125#endif 125#endif
126 offset = PAGE_ALIGN((unsigned long)(&_end)) - loadbase; 126 offset = PAGE_ALIGN((unsigned long)(&_end)) - loadbase;
127 if ((cnode == 0) || (cpu_isset(cnode, ktext_repmask))) 127 if ((cnode == 0) || (cpumask_test_cpu(cnode, &ktext_repmask)))
128 return TO_NODE(nasid, offset) >> PAGE_SHIFT; 128 return TO_NODE(nasid, offset) >> PAGE_SHIFT;
129 else 129 else
130 return KDM_TO_PHYS(PAGE_ALIGN(SYMMON_STK_ADDR(nasid, 0))) >> PAGE_SHIFT; 130 return KDM_TO_PHYS(PAGE_ALIGN(SYMMON_STK_ADDR(nasid, 0))) >> PAGE_SHIFT;
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c
index 0b68469e063f..8d0eb2643248 100644
--- a/arch/mips/sgi-ip27/ip27-memory.c
+++ b/arch/mips/sgi-ip27/ip27-memory.c
@@ -404,7 +404,7 @@ static void __init node_mem_init(cnodeid_t node)
404 NODE_DATA(node)->node_start_pfn = start_pfn; 404 NODE_DATA(node)->node_start_pfn = start_pfn;
405 NODE_DATA(node)->node_spanned_pages = end_pfn - start_pfn; 405 NODE_DATA(node)->node_spanned_pages = end_pfn - start_pfn;
406 406
407 cpus_clear(hub_data(node)->h_cpus); 407 cpumask_clear(&hub_data(node)->h_cpus);
408 408
409 slot_freepfn += PFN_UP(sizeof(struct pglist_data) + 409 slot_freepfn += PFN_UP(sizeof(struct pglist_data) +
410 sizeof(struct hub_data)); 410 sizeof(struct hub_data));
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index cfe056fe7f5c..f3191db6e2e9 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -525,8 +525,8 @@ void do_cpu_irq_mask(struct pt_regs *regs)
525 desc = irq_to_desc(irq); 525 desc = irq_to_desc(irq);
526 cpumask_copy(&dest, desc->irq_data.affinity); 526 cpumask_copy(&dest, desc->irq_data.affinity);
527 if (irqd_is_per_cpu(&desc->irq_data) && 527 if (irqd_is_per_cpu(&desc->irq_data) &&
528 !cpu_isset(smp_processor_id(), dest)) { 528 !cpumask_test_cpu(smp_processor_id(), &dest)) {
529 int cpu = first_cpu(dest); 529 int cpu = cpumask_first(&dest);
530 530
531 printk(KERN_DEBUG "redirecting irq %d from CPU %d to %d\n", 531 printk(KERN_DEBUG "redirecting irq %d from CPU %d to %d\n",
532 irq, smp_processor_id(), cpu); 532 irq, smp_processor_id(), cpu);
diff --git a/arch/powerpc/include/asm/cputhreads.h b/arch/powerpc/include/asm/cputhreads.h
index 4c8ad592ae33..5be6c4753667 100644
--- a/arch/powerpc/include/asm/cputhreads.h
+++ b/arch/powerpc/include/asm/cputhreads.h
@@ -25,7 +25,7 @@ extern cpumask_t threads_core_mask;
25#define threads_per_core 1 25#define threads_per_core 1
26#define threads_per_subcore 1 26#define threads_per_subcore 1
27#define threads_shift 0 27#define threads_shift 0
28#define threads_core_mask (CPU_MASK_CPU0) 28#define threads_core_mask (*get_cpu_mask(0))
29#endif 29#endif
30 30
31/* cpu_thread_mask_to_cores - Return a cpumask of one per cores 31/* cpu_thread_mask_to_cores - Return a cpumask of one per cores
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index de2726a487b0..8e58c614c37d 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -115,7 +115,7 @@ config S390
115 select HAVE_ARCH_SECCOMP_FILTER 115 select HAVE_ARCH_SECCOMP_FILTER
116 select HAVE_ARCH_TRACEHOOK 116 select HAVE_ARCH_TRACEHOOK
117 select HAVE_ARCH_TRANSPARENT_HUGEPAGE 117 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
118 select HAVE_BPF_JIT if PACK_STACK 118 select HAVE_BPF_JIT if PACK_STACK && HAVE_MARCH_Z9_109_FEATURES
119 select HAVE_CMPXCHG_DOUBLE 119 select HAVE_CMPXCHG_DOUBLE
120 select HAVE_CMPXCHG_LOCAL 120 select HAVE_CMPXCHG_LOCAL
121 select HAVE_DEBUG_KMEMLEAK 121 select HAVE_DEBUG_KMEMLEAK
diff --git a/arch/s390/include/asm/dma-mapping.h b/arch/s390/include/asm/dma-mapping.h
index 709955ddaa4d..9d395961e713 100644
--- a/arch/s390/include/asm/dma-mapping.h
+++ b/arch/s390/include/asm/dma-mapping.h
@@ -42,7 +42,7 @@ static inline int dma_supported(struct device *dev, u64 mask)
42static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) 42static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
43{ 43{
44 if (!dev->dma_mask) 44 if (!dev->dma_mask)
45 return 0; 45 return false;
46 return addr + size - 1 <= *dev->dma_mask; 46 return addr + size - 1 <= *dev->dma_mask;
47} 47}
48 48
diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h
index ef803c202d42..a648338c434a 100644
--- a/arch/s390/include/asm/pci.h
+++ b/arch/s390/include/asm/pci.h
@@ -7,6 +7,7 @@
7#define PCI_BAR_COUNT 6 7#define PCI_BAR_COUNT 6
8 8
9#include <linux/pci.h> 9#include <linux/pci.h>
10#include <linux/mutex.h>
10#include <asm-generic/pci.h> 11#include <asm-generic/pci.h>
11#include <asm-generic/pci-dma-compat.h> 12#include <asm-generic/pci-dma-compat.h>
12#include <asm/pci_clp.h> 13#include <asm/pci_clp.h>
@@ -44,10 +45,6 @@ struct zpci_fmb {
44 u64 rpcit_ops; 45 u64 rpcit_ops;
45 u64 dma_rbytes; 46 u64 dma_rbytes;
46 u64 dma_wbytes; 47 u64 dma_wbytes;
47 /* software counters */
48 atomic64_t allocated_pages;
49 atomic64_t mapped_pages;
50 atomic64_t unmapped_pages;
51} __packed __aligned(16); 48} __packed __aligned(16);
52 49
53enum zpci_state { 50enum zpci_state {
@@ -80,6 +77,7 @@ struct zpci_dev {
80 u8 pft; /* pci function type */ 77 u8 pft; /* pci function type */
81 u16 domain; 78 u16 domain;
82 79
80 struct mutex lock;
83 u8 pfip[CLP_PFIP_NR_SEGMENTS]; /* pci function internal path */ 81 u8 pfip[CLP_PFIP_NR_SEGMENTS]; /* pci function internal path */
84 u32 uid; /* user defined id */ 82 u32 uid; /* user defined id */
85 u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */ 83 u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */
@@ -111,6 +109,10 @@ struct zpci_dev {
111 /* Function measurement block */ 109 /* Function measurement block */
112 struct zpci_fmb *fmb; 110 struct zpci_fmb *fmb;
113 u16 fmb_update; /* update interval */ 111 u16 fmb_update; /* update interval */
112 /* software counters */
113 atomic64_t allocated_pages;
114 atomic64_t mapped_pages;
115 atomic64_t unmapped_pages;
114 116
115 enum pci_bus_speed max_bus_speed; 117 enum pci_bus_speed max_bus_speed;
116 118
diff --git a/arch/s390/net/bpf_jit.S b/arch/s390/net/bpf_jit.S
index ba44c9f55346..a1c917d881ec 100644
--- a/arch/s390/net/bpf_jit.S
+++ b/arch/s390/net/bpf_jit.S
@@ -1,134 +1,115 @@
1/* 1/*
2 * BPF Jit compiler for s390, help functions. 2 * BPF Jit compiler for s390, help functions.
3 * 3 *
4 * Copyright IBM Corp. 2012 4 * Copyright IBM Corp. 2012,2015
5 * 5 *
6 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com> 6 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
7 * Michael Holzheu <holzheu@linux.vnet.ibm.com>
7 */ 8 */
9
8#include <linux/linkage.h> 10#include <linux/linkage.h>
11#include "bpf_jit.h"
9 12
10/* 13/*
11 * Calling convention: 14 * Calling convention:
12 * registers %r2, %r6-%r8, %r10-%r11, %r13, %r15 are call saved 15 * registers %r7-%r10, %r11,%r13, and %r15 are call saved
13 * %r2: skb pointer 16 *
14 * %r3: offset parameter 17 * Input (64 bit):
15 * %r5: BPF A accumulator 18 * %r3 (%b2) = offset into skb data
16 * %r8: return address 19 * %r6 (%b5) = return address
17 * %r9: save register for skb pointer 20 * %r7 (%b6) = skb pointer
18 * %r10: skb->data 21 * %r12 = skb data pointer
19 * %r11: skb->len - skb->data_len (headlen) 22 *
20 * %r12: BPF X accumulator 23 * Output:
24 * %r14= %b0 = return value (read skb value)
25 *
26 * Work registers: %r2,%r4,%r5,%r14
21 * 27 *
22 * skb_copy_bits takes 4 parameters: 28 * skb_copy_bits takes 4 parameters:
23 * %r2 = skb pointer 29 * %r2 = skb pointer
24 * %r3 = offset into skb data 30 * %r3 = offset into skb data
25 * %r4 = pointer to temp buffer 31 * %r4 = pointer to temp buffer
26 * %r5 = length to copy 32 * %r5 = length to copy
33 * Return value in %r2: 0 = ok
34 *
35 * bpf_internal_load_pointer_neg_helper takes 3 parameters:
36 * %r2 = skb pointer
37 * %r3 = offset into data
38 * %r4 = length to copy
39 * Return value in %r2: Pointer to data
27 */ 40 */
28#define SKBDATA %r8
29
30 /* A = *(u32 *) (skb->data+K+X) */
31ENTRY(sk_load_word_ind)
32 ar %r3,%r12 # offset += X
33 bmr %r8 # < 0 -> return with cc
34
35 /* A = *(u32 *) (skb->data+K) */
36ENTRY(sk_load_word)
37 llgfr %r1,%r3 # extend offset
38 ahi %r3,4 # offset + 4
39 clr %r11,%r3 # hlen <= offset + 4 ?
40 jl sk_load_word_slow
41 l %r5,0(%r1,%r10) # get word from skb
42 xr %r1,%r1 # set cc to zero
43 br %r8
44 41
45sk_load_word_slow: 42#define SKF_MAX_NEG_OFF -0x200000 /* SKF_LL_OFF from filter.h */
46 lgr %r9,%r2 # save %r2
47 lgr %r3,%r1 # offset
48 la %r4,160(%r15) # pointer to temp buffer
49 lghi %r5,4 # 4 bytes
50 brasl %r14,skb_copy_bits # get data from skb
51 l %r5,160(%r15) # load result from temp buffer
52 ltgr %r2,%r2 # set cc to (%r2 != 0)
53 lgr %r2,%r9 # restore %r2
54 br %r8
55 43
56 /* A = *(u16 *) (skb->data+K+X) */ 44/*
57ENTRY(sk_load_half_ind) 45 * Load SIZE bytes from SKB
58 ar %r3,%r12 # offset += X 46 */
59 bmr %r8 # < 0 -> return with cc 47#define sk_load_common(NAME, SIZE, LOAD) \
60 48ENTRY(sk_load_##NAME); \
61 /* A = *(u16 *) (skb->data+K) */ 49 ltgr %r3,%r3; /* Is offset negative? */ \
62ENTRY(sk_load_half) 50 jl sk_load_##NAME##_slow_neg; \
63 llgfr %r1,%r3 # extend offset 51ENTRY(sk_load_##NAME##_pos); \
64 ahi %r3,2 # offset + 2 52 aghi %r3,SIZE; /* Offset + SIZE */ \
65 clr %r11,%r3 # hlen <= offset + 2 ? 53 clg %r3,STK_OFF_HLEN(%r15); /* Offset + SIZE > hlen? */ \
66 jl sk_load_half_slow 54 jh sk_load_##NAME##_slow; \
67 llgh %r5,0(%r1,%r10) # get half from skb 55 LOAD %r14,-SIZE(%r3,%r12); /* Get data from skb */ \
68 xr %r1,%r1 # set cc to zero 56 b OFF_OK(%r6); /* Return */ \
69 br %r8 57 \
70 58sk_load_##NAME##_slow:; \
71sk_load_half_slow: 59 lgr %r2,%r7; /* Arg1 = skb pointer */ \
72 lgr %r9,%r2 # save %r2 60 aghi %r3,-SIZE; /* Arg2 = offset */ \
73 lgr %r3,%r1 # offset 61 la %r4,STK_OFF_TMP(%r15); /* Arg3 = temp bufffer */ \
74 la %r4,162(%r15) # pointer to temp buffer 62 lghi %r5,SIZE; /* Arg4 = size */ \
75 lghi %r5,2 # 2 bytes 63 brasl %r14,skb_copy_bits; /* Get data from skb */ \
76 brasl %r14,skb_copy_bits # get data from skb 64 LOAD %r14,STK_OFF_TMP(%r15); /* Load from temp bufffer */ \
77 xc 160(2,%r15),160(%r15) 65 ltgr %r2,%r2; /* Set cc to (%r2 != 0) */ \
78 l %r5,160(%r15) # load result from temp buffer 66 br %r6; /* Return */
79 ltgr %r2,%r2 # set cc to (%r2 != 0)
80 lgr %r2,%r9 # restore %r2
81 br %r8
82 67
83 /* A = *(u8 *) (skb->data+K+X) */ 68sk_load_common(word, 4, llgf) /* r14 = *(u32 *) (skb->data+offset) */
84ENTRY(sk_load_byte_ind) 69sk_load_common(half, 2, llgh) /* r14 = *(u16 *) (skb->data+offset) */
85 ar %r3,%r12 # offset += X
86 bmr %r8 # < 0 -> return with cc
87 70
88 /* A = *(u8 *) (skb->data+K) */ 71/*
72 * Load 1 byte from SKB (optimized version)
73 */
74 /* r14 = *(u8 *) (skb->data+offset) */
89ENTRY(sk_load_byte) 75ENTRY(sk_load_byte)
90 llgfr %r1,%r3 # extend offset 76 ltgr %r3,%r3 # Is offset negative?
91 clr %r11,%r3 # hlen < offset ? 77 jl sk_load_byte_slow_neg
92 jle sk_load_byte_slow 78ENTRY(sk_load_byte_pos)
93 lhi %r5,0 79 clg %r3,STK_OFF_HLEN(%r15) # Offset >= hlen?
94 ic %r5,0(%r1,%r10) # get byte from skb 80 jnl sk_load_byte_slow
95 xr %r1,%r1 # set cc to zero 81 llgc %r14,0(%r3,%r12) # Get byte from skb
96 br %r8 82 b OFF_OK(%r6) # Return OK
97 83
98sk_load_byte_slow: 84sk_load_byte_slow:
99 lgr %r9,%r2 # save %r2 85 lgr %r2,%r7 # Arg1 = skb pointer
100 lgr %r3,%r1 # offset 86 # Arg2 = offset
101 la %r4,163(%r15) # pointer to temp buffer 87 la %r4,STK_OFF_TMP(%r15) # Arg3 = pointer to temp buffer
102 lghi %r5,1 # 1 byte 88 lghi %r5,1 # Arg4 = size (1 byte)
103 brasl %r14,skb_copy_bits # get data from skb 89 brasl %r14,skb_copy_bits # Get data from skb
104 xc 160(3,%r15),160(%r15) 90 llgc %r14,STK_OFF_TMP(%r15) # Load result from temp buffer
105 l %r5,160(%r15) # load result from temp buffer 91 ltgr %r2,%r2 # Set cc to (%r2 != 0)
106 ltgr %r2,%r2 # set cc to (%r2 != 0) 92 br %r6 # Return cc
107 lgr %r2,%r9 # restore %r2 93
108 br %r8 94#define sk_negative_common(NAME, SIZE, LOAD) \
95sk_load_##NAME##_slow_neg:; \
96 cgfi %r3,SKF_MAX_NEG_OFF; \
97 jl bpf_error; \
98 lgr %r2,%r7; /* Arg1 = skb pointer */ \
99 /* Arg2 = offset */ \
100 lghi %r4,SIZE; /* Arg3 = size */ \
101 brasl %r14,bpf_internal_load_pointer_neg_helper; \
102 ltgr %r2,%r2; \
103 jz bpf_error; \
104 LOAD %r14,0(%r2); /* Get data from pointer */ \
105 xr %r3,%r3; /* Set cc to zero */ \
106 br %r6; /* Return cc */
109 107
110 /* X = (*(u8 *)(skb->data+K) & 0xf) << 2 */ 108sk_negative_common(word, 4, llgf)
111ENTRY(sk_load_byte_msh) 109sk_negative_common(half, 2, llgh)
112 llgfr %r1,%r3 # extend offset 110sk_negative_common(byte, 1, llgc)
113 clr %r11,%r3 # hlen < offset ?
114 jle sk_load_byte_msh_slow
115 lhi %r12,0
116 ic %r12,0(%r1,%r10) # get byte from skb
117 nill %r12,0x0f
118 sll %r12,2
119 xr %r1,%r1 # set cc to zero
120 br %r8
121 111
122sk_load_byte_msh_slow: 112bpf_error:
123 lgr %r9,%r2 # save %r2 113# force a return 0 from jit handler
124 lgr %r3,%r1 # offset 114 ltgr %r15,%r15 # Set condition code
125 la %r4,163(%r15) # pointer to temp buffer 115 br %r6
126 lghi %r5,1 # 1 byte
127 brasl %r14,skb_copy_bits # get data from skb
128 xc 160(3,%r15),160(%r15)
129 l %r12,160(%r15) # load result from temp buffer
130 nill %r12,0x0f
131 sll %r12,2
132 ltgr %r2,%r2 # set cc to (%r2 != 0)
133 lgr %r2,%r9 # restore %r2
134 br %r8
diff --git a/arch/s390/net/bpf_jit.h b/arch/s390/net/bpf_jit.h
new file mode 100644
index 000000000000..ba8593a515ba
--- /dev/null
+++ b/arch/s390/net/bpf_jit.h
@@ -0,0 +1,58 @@
1/*
2 * BPF Jit compiler defines
3 *
4 * Copyright IBM Corp. 2012,2015
5 *
6 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
7 * Michael Holzheu <holzheu@linux.vnet.ibm.com>
8 */
9
10#ifndef __ARCH_S390_NET_BPF_JIT_H
11#define __ARCH_S390_NET_BPF_JIT_H
12
13#ifndef __ASSEMBLY__
14
15#include <linux/filter.h>
16#include <linux/types.h>
17
18extern u8 sk_load_word_pos[], sk_load_half_pos[], sk_load_byte_pos[];
19extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];
20
21#endif /* __ASSEMBLY__ */
22
23/*
24 * Stackframe layout (packed stack):
25 *
26 * ^ high
27 * +---------------+ |
28 * | old backchain | |
29 * +---------------+ |
30 * | r15 - r6 | |
31 * BFP -> +===============+ |
32 * | | |
33 * | BPF stack | |
34 * | | |
35 * +---------------+ |
36 * | 8 byte hlen | |
37 * R15+168 -> +---------------+ |
38 * | 4 byte align | |
39 * +---------------+ |
40 * | 4 byte temp | |
41 * | for bpf_jit.S | |
42 * R15+160 -> +---------------+ |
43 * | new backchain | |
44 * R15+152 -> +---------------+ |
45 * | + 152 byte SA | |
46 * R15 -> +---------------+ + low
47 *
48 * We get 160 bytes stack space from calling function, but only use
49 * 11 * 8 byte (old backchain + r15 - r6) for storing registers.
50 */
51#define STK_OFF (MAX_BPF_STACK + 8 + 4 + 4 + (160 - 11 * 8))
52#define STK_OFF_TMP 160 /* Offset of tmp buffer on stack */
53#define STK_OFF_HLEN 168 /* Offset of SKB header length on stack */
54
55/* Offset to skip condition code check */
56#define OFF_OK 4
57
58#endif /* __ARCH_S390_NET_BPF_JIT_H */
diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c
index bbd1981cc150..7690dc8e1ab5 100644
--- a/arch/s390/net/bpf_jit_comp.c
+++ b/arch/s390/net/bpf_jit_comp.c
@@ -1,817 +1,1209 @@
1/* 1/*
2 * BPF Jit compiler for s390. 2 * BPF Jit compiler for s390.
3 * 3 *
4 * Copyright IBM Corp. 2012 4 * Minimum build requirements:
5 *
6 * - HAVE_MARCH_Z196_FEATURES: laal, laalg
7 * - HAVE_MARCH_Z10_FEATURES: msfi, cgrj, clgrj
8 * - HAVE_MARCH_Z9_109_FEATURES: alfi, llilf, clfi, oilf, nilf
9 * - PACK_STACK
10 * - 64BIT
11 *
12 * Copyright IBM Corp. 2012,2015
5 * 13 *
6 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com> 14 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
15 * Michael Holzheu <holzheu@linux.vnet.ibm.com>
7 */ 16 */
17
18#define KMSG_COMPONENT "bpf_jit"
19#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
20
8#include <linux/netdevice.h> 21#include <linux/netdevice.h>
9#include <linux/if_vlan.h>
10#include <linux/filter.h> 22#include <linux/filter.h>
11#include <linux/init.h> 23#include <linux/init.h>
12#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
13#include <asm/facility.h>
14#include <asm/dis.h> 25#include <asm/dis.h>
26#include "bpf_jit.h"
15 27
16/*
17 * Conventions:
18 * %r2 = skb pointer
19 * %r3 = offset parameter
20 * %r4 = scratch register / length parameter
21 * %r5 = BPF A accumulator
22 * %r8 = return address
23 * %r9 = save register for skb pointer
24 * %r10 = skb->data
25 * %r11 = skb->len - skb->data_len (headlen)
26 * %r12 = BPF X accumulator
27 * %r13 = literal pool pointer
28 * 0(%r15) - 63(%r15) scratch memory array with BPF_MEMWORDS
29 */
30int bpf_jit_enable __read_mostly; 28int bpf_jit_enable __read_mostly;
31 29
30struct bpf_jit {
31 u32 seen; /* Flags to remember seen eBPF instructions */
32 u32 seen_reg[16]; /* Array to remember which registers are used */
33 u32 *addrs; /* Array with relative instruction addresses */
34 u8 *prg_buf; /* Start of program */
35 int size; /* Size of program and literal pool */
36 int size_prg; /* Size of program */
37 int prg; /* Current position in program */
38 int lit_start; /* Start of literal pool */
39 int lit; /* Current position in literal pool */
40 int base_ip; /* Base address for literal pool */
41 int ret0_ip; /* Address of return 0 */
42 int exit_ip; /* Address of exit */
43};
44
45#define BPF_SIZE_MAX 4096 /* Max size for program */
46
47#define SEEN_SKB 1 /* skb access */
48#define SEEN_MEM 2 /* use mem[] for temporary storage */
49#define SEEN_RET0 4 /* ret0_ip points to a valid return 0 */
50#define SEEN_LITERAL 8 /* code uses literals */
51#define SEEN_FUNC 16 /* calls C functions */
52#define SEEN_STACK (SEEN_FUNC | SEEN_MEM | SEEN_SKB)
53
32/* 54/*
33 * assembly code in arch/x86/net/bpf_jit.S 55 * s390 registers
34 */ 56 */
35extern u8 sk_load_word[], sk_load_half[], sk_load_byte[], sk_load_byte_msh[]; 57#define REG_W0 (__MAX_BPF_REG+0) /* Work register 1 (even) */
36extern u8 sk_load_word_ind[], sk_load_half_ind[], sk_load_byte_ind[]; 58#define REG_W1 (__MAX_BPF_REG+1) /* Work register 2 (odd) */
59#define REG_SKB_DATA (__MAX_BPF_REG+2) /* SKB data register */
60#define REG_L (__MAX_BPF_REG+3) /* Literal pool register */
61#define REG_15 (__MAX_BPF_REG+4) /* Register 15 */
62#define REG_0 REG_W0 /* Register 0 */
63#define REG_2 BPF_REG_1 /* Register 2 */
64#define REG_14 BPF_REG_0 /* Register 14 */
37 65
38struct bpf_jit { 66/*
39 unsigned int seen; 67 * Mapping of BPF registers to s390 registers
40 u8 *start; 68 */
41 u8 *prg; 69static const int reg2hex[] = {
42 u8 *mid; 70 /* Return code */
43 u8 *lit; 71 [BPF_REG_0] = 14,
44 u8 *end; 72 /* Function parameters */
45 u8 *base_ip; 73 [BPF_REG_1] = 2,
46 u8 *ret0_ip; 74 [BPF_REG_2] = 3,
47 u8 *exit_ip; 75 [BPF_REG_3] = 4,
48 unsigned int off_load_word; 76 [BPF_REG_4] = 5,
49 unsigned int off_load_half; 77 [BPF_REG_5] = 6,
50 unsigned int off_load_byte; 78 /* Call saved registers */
51 unsigned int off_load_bmsh; 79 [BPF_REG_6] = 7,
52 unsigned int off_load_iword; 80 [BPF_REG_7] = 8,
53 unsigned int off_load_ihalf; 81 [BPF_REG_8] = 9,
54 unsigned int off_load_ibyte; 82 [BPF_REG_9] = 10,
83 /* BPF stack pointer */
84 [BPF_REG_FP] = 13,
85 /* SKB data pointer */
86 [REG_SKB_DATA] = 12,
87 /* Work registers for s390x backend */
88 [REG_W0] = 0,
89 [REG_W1] = 1,
90 [REG_L] = 11,
91 [REG_15] = 15,
55}; 92};
56 93
57#define BPF_SIZE_MAX 4096 /* Max size for program */ 94static inline u32 reg(u32 dst_reg, u32 src_reg)
95{
96 return reg2hex[dst_reg] << 4 | reg2hex[src_reg];
97}
98
99static inline u32 reg_high(u32 reg)
100{
101 return reg2hex[reg] << 4;
102}
103
104static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
105{
106 u32 r1 = reg2hex[b1];
107
108 if (!jit->seen_reg[r1] && r1 >= 6 && r1 <= 15)
109 jit->seen_reg[r1] = 1;
110}
111
112#define REG_SET_SEEN(b1) \
113({ \
114 reg_set_seen(jit, b1); \
115})
116
117#define REG_SEEN(b1) jit->seen_reg[reg2hex[(b1)]]
118
119/*
120 * EMIT macros for code generation
121 */
122
123#define _EMIT2(op) \
124({ \
125 if (jit->prg_buf) \
126 *(u16 *) (jit->prg_buf + jit->prg) = op; \
127 jit->prg += 2; \
128})
58 129
59#define SEEN_DATAREF 1 /* might call external helpers */ 130#define EMIT2(op, b1, b2) \
60#define SEEN_XREG 2 /* ebx is used */ 131({ \
61#define SEEN_MEM 4 /* use mem[] for temporary storage */ 132 _EMIT2(op | reg(b1, b2)); \
62#define SEEN_RET0 8 /* pc_ret0 points to a valid return 0 */ 133 REG_SET_SEEN(b1); \
63#define SEEN_LITERAL 16 /* code uses literals */ 134 REG_SET_SEEN(b2); \
64#define SEEN_LOAD_WORD 32 /* code uses sk_load_word */
65#define SEEN_LOAD_HALF 64 /* code uses sk_load_half */
66#define SEEN_LOAD_BYTE 128 /* code uses sk_load_byte */
67#define SEEN_LOAD_BMSH 256 /* code uses sk_load_byte_msh */
68#define SEEN_LOAD_IWORD 512 /* code uses sk_load_word_ind */
69#define SEEN_LOAD_IHALF 1024 /* code uses sk_load_half_ind */
70#define SEEN_LOAD_IBYTE 2048 /* code uses sk_load_byte_ind */
71
72#define EMIT2(op) \
73({ \
74 if (jit->prg + 2 <= jit->mid) \
75 *(u16 *) jit->prg = op; \
76 jit->prg += 2; \
77}) 135})
78 136
79#define EMIT4(op) \ 137#define _EMIT4(op) \
80({ \ 138({ \
81 if (jit->prg + 4 <= jit->mid) \ 139 if (jit->prg_buf) \
82 *(u32 *) jit->prg = op; \ 140 *(u32 *) (jit->prg_buf + jit->prg) = op; \
83 jit->prg += 4; \ 141 jit->prg += 4; \
84}) 142})
85 143
86#define EMIT4_DISP(op, disp) \ 144#define EMIT4(op, b1, b2) \
87({ \ 145({ \
88 unsigned int __disp = (disp) & 0xfff; \ 146 _EMIT4(op | reg(b1, b2)); \
89 EMIT4(op | __disp); \ 147 REG_SET_SEEN(b1); \
148 REG_SET_SEEN(b2); \
90}) 149})
91 150
92#define EMIT4_IMM(op, imm) \ 151#define EMIT4_RRF(op, b1, b2, b3) \
93({ \ 152({ \
94 unsigned int __imm = (imm) & 0xffff; \ 153 _EMIT4(op | reg_high(b3) << 8 | reg(b1, b2)); \
95 EMIT4(op | __imm); \ 154 REG_SET_SEEN(b1); \
155 REG_SET_SEEN(b2); \
156 REG_SET_SEEN(b3); \
96}) 157})
97 158
98#define EMIT4_PCREL(op, pcrel) \ 159#define _EMIT4_DISP(op, disp) \
99({ \ 160({ \
100 long __pcrel = ((pcrel) >> 1) & 0xffff; \ 161 unsigned int __disp = (disp) & 0xfff; \
101 EMIT4(op | __pcrel); \ 162 _EMIT4(op | __disp); \
102}) 163})
103 164
104#define EMIT6(op1, op2) \ 165#define EMIT4_DISP(op, b1, b2, disp) \
105({ \ 166({ \
106 if (jit->prg + 6 <= jit->mid) { \ 167 _EMIT4_DISP(op | reg_high(b1) << 16 | \
107 *(u32 *) jit->prg = op1; \ 168 reg_high(b2) << 8, disp); \
108 *(u16 *) (jit->prg + 4) = op2; \ 169 REG_SET_SEEN(b1); \
109 } \ 170 REG_SET_SEEN(b2); \
110 jit->prg += 6; \
111}) 171})
112 172
113#define EMIT6_DISP(op1, op2, disp) \ 173#define EMIT4_IMM(op, b1, imm) \
114({ \ 174({ \
115 unsigned int __disp = (disp) & 0xfff; \ 175 unsigned int __imm = (imm) & 0xffff; \
116 EMIT6(op1 | __disp, op2); \ 176 _EMIT4(op | reg_high(b1) << 16 | __imm); \
177 REG_SET_SEEN(b1); \
117}) 178})
118 179
119#define EMIT6_IMM(op, imm) \ 180#define EMIT4_PCREL(op, pcrel) \
120({ \ 181({ \
121 unsigned int __imm = (imm); \ 182 long __pcrel = ((pcrel) >> 1) & 0xffff; \
122 EMIT6(op | (__imm >> 16), __imm & 0xffff); \ 183 _EMIT4(op | __pcrel); \
123}) 184})
124 185
125#define EMIT_CONST(val) \ 186#define _EMIT6(op1, op2) \
126({ \ 187({ \
127 unsigned int ret; \ 188 if (jit->prg_buf) { \
128 ret = (unsigned int) (jit->lit - jit->base_ip); \ 189 *(u32 *) (jit->prg_buf + jit->prg) = op1; \
129 jit->seen |= SEEN_LITERAL; \ 190 *(u16 *) (jit->prg_buf + jit->prg + 4) = op2; \
130 if (jit->lit + 4 <= jit->end) \ 191 } \
131 *(u32 *) jit->lit = val; \ 192 jit->prg += 6; \
132 jit->lit += 4; \
133 ret; \
134}) 193})
135 194
136#define EMIT_FN_CONST(bit, fn) \ 195#define _EMIT6_DISP(op1, op2, disp) \
137({ \ 196({ \
138 unsigned int ret; \ 197 unsigned int __disp = (disp) & 0xfff; \
139 ret = (unsigned int) (jit->lit - jit->base_ip); \ 198 _EMIT6(op1 | __disp, op2); \
140 if (jit->seen & bit) { \
141 jit->seen |= SEEN_LITERAL; \
142 if (jit->lit + 8 <= jit->end) \
143 *(void **) jit->lit = fn; \
144 jit->lit += 8; \
145 } \
146 ret; \
147}) 199})
148 200
149static void bpf_jit_fill_hole(void *area, unsigned int size) 201#define EMIT6_DISP(op1, op2, b1, b2, b3, disp) \
202({ \
203 _EMIT6_DISP(op1 | reg(b1, b2) << 16 | \
204 reg_high(b3) << 8, op2, disp); \
205 REG_SET_SEEN(b1); \
206 REG_SET_SEEN(b2); \
207 REG_SET_SEEN(b3); \
208})
209
210#define _EMIT6_DISP_LH(op1, op2, disp) \
211({ \
212 unsigned int __disp_h = ((u32)disp) & 0xff000; \
213 unsigned int __disp_l = ((u32)disp) & 0x00fff; \
214 _EMIT6(op1 | __disp_l, op2 | __disp_h >> 4); \
215})
216
217#define EMIT6_DISP_LH(op1, op2, b1, b2, b3, disp) \
218({ \
219 _EMIT6_DISP_LH(op1 | reg(b1, b2) << 16 | \
220 reg_high(b3) << 8, op2, disp); \
221 REG_SET_SEEN(b1); \
222 REG_SET_SEEN(b2); \
223 REG_SET_SEEN(b3); \
224})
225
226#define EMIT6_PCREL(op1, op2, b1, b2, i, off, mask) \
227({ \
228 /* Branch instruction needs 6 bytes */ \
229 int rel = (addrs[i + off + 1] - (addrs[i + 1] - 6)) / 2;\
230 _EMIT6(op1 | reg(b1, b2) << 16 | rel, op2 | mask); \
231 REG_SET_SEEN(b1); \
232 REG_SET_SEEN(b2); \
233})
234
235#define _EMIT6_IMM(op, imm) \
236({ \
237 unsigned int __imm = (imm); \
238 _EMIT6(op | (__imm >> 16), __imm & 0xffff); \
239})
240
241#define EMIT6_IMM(op, b1, imm) \
242({ \
243 _EMIT6_IMM(op | reg_high(b1) << 16, imm); \
244 REG_SET_SEEN(b1); \
245})
246
247#define EMIT_CONST_U32(val) \
248({ \
249 unsigned int ret; \
250 ret = jit->lit - jit->base_ip; \
251 jit->seen |= SEEN_LITERAL; \
252 if (jit->prg_buf) \
253 *(u32 *) (jit->prg_buf + jit->lit) = (u32) val; \
254 jit->lit += 4; \
255 ret; \
256})
257
258#define EMIT_CONST_U64(val) \
259({ \
260 unsigned int ret; \
261 ret = jit->lit - jit->base_ip; \
262 jit->seen |= SEEN_LITERAL; \
263 if (jit->prg_buf) \
264 *(u64 *) (jit->prg_buf + jit->lit) = (u64) val; \
265 jit->lit += 8; \
266 ret; \
267})
268
269#define EMIT_ZERO(b1) \
270({ \
271 /* llgfr %dst,%dst (zero extend to 64 bit) */ \
272 EMIT4(0xb9160000, b1, b1); \
273 REG_SET_SEEN(b1); \
274})
275
276/*
277 * Fill whole space with illegal instructions
278 */
279static void jit_fill_hole(void *area, unsigned int size)
150{ 280{
151 /* Fill whole space with illegal instructions */
152 memset(area, 0, size); 281 memset(area, 0, size);
153} 282}
154 283
155static void bpf_jit_prologue(struct bpf_jit *jit) 284/*
285 * Save registers from "rs" (register start) to "re" (register end) on stack
286 */
287static void save_regs(struct bpf_jit *jit, u32 rs, u32 re)
288{
289 u32 off = 72 + (rs - 6) * 8;
290
291 if (rs == re)
292 /* stg %rs,off(%r15) */
293 _EMIT6(0xe300f000 | rs << 20 | off, 0x0024);
294 else
295 /* stmg %rs,%re,off(%r15) */
296 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0024, off);
297}
298
299/*
300 * Restore registers from "rs" (register start) to "re" (register end) on stack
301 */
302static void restore_regs(struct bpf_jit *jit, u32 rs, u32 re)
156{ 303{
157 /* Save registers and create stack frame if necessary */ 304 u32 off = 72 + (rs - 6) * 8;
158 if (jit->seen & SEEN_DATAREF) { 305
159 /* stmg %r8,%r15,88(%r15) */ 306 if (jit->seen & SEEN_STACK)
160 EMIT6(0xeb8ff058, 0x0024); 307 off += STK_OFF;
161 /* lgr %r14,%r15 */ 308
162 EMIT4(0xb90400ef); 309 if (rs == re)
163 /* aghi %r15,<offset> */ 310 /* lg %rs,off(%r15) */
164 EMIT4_IMM(0xa7fb0000, (jit->seen & SEEN_MEM) ? -112 : -80); 311 _EMIT6(0xe300f000 | rs << 20 | off, 0x0004);
165 /* stg %r14,152(%r15) */ 312 else
166 EMIT6(0xe3e0f098, 0x0024); 313 /* lmg %rs,%re,off(%r15) */
167 } else if ((jit->seen & SEEN_XREG) && (jit->seen & SEEN_LITERAL)) 314 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0004, off);
168 /* stmg %r12,%r13,120(%r15) */ 315}
169 EMIT6(0xebcdf078, 0x0024);
170 else if (jit->seen & SEEN_XREG)
171 /* stg %r12,120(%r15) */
172 EMIT6(0xe3c0f078, 0x0024);
173 else if (jit->seen & SEEN_LITERAL)
174 /* stg %r13,128(%r15) */
175 EMIT6(0xe3d0f080, 0x0024);
176 316
317/*
318 * Return first seen register (from start)
319 */
320static int get_start(struct bpf_jit *jit, int start)
321{
322 int i;
323
324 for (i = start; i <= 15; i++) {
325 if (jit->seen_reg[i])
326 return i;
327 }
328 return 0;
329}
330
331/*
332 * Return last seen register (from start) (gap >= 2)
333 */
334static int get_end(struct bpf_jit *jit, int start)
335{
336 int i;
337
338 for (i = start; i < 15; i++) {
339 if (!jit->seen_reg[i] && !jit->seen_reg[i + 1])
340 return i - 1;
341 }
342 return jit->seen_reg[15] ? 15 : 14;
343}
344
345#define REGS_SAVE 1
346#define REGS_RESTORE 0
347/*
348 * Save and restore clobbered registers (6-15) on stack.
349 * We save/restore registers in chunks with gap >= 2 registers.
350 */
351static void save_restore_regs(struct bpf_jit *jit, int op)
352{
353
354 int re = 6, rs;
355
356 do {
357 rs = get_start(jit, re);
358 if (!rs)
359 break;
360 re = get_end(jit, rs + 1);
361 if (op == REGS_SAVE)
362 save_regs(jit, rs, re);
363 else
364 restore_regs(jit, rs, re);
365 re++;
366 } while (re <= 15);
367}
368
369/*
370 * Emit function prologue
371 *
372 * Save registers and create stack frame if necessary.
373 * See stack frame layout desription in "bpf_jit.h"!
374 */
375static void bpf_jit_prologue(struct bpf_jit *jit)
376{
377 /* Save registers */
378 save_restore_regs(jit, REGS_SAVE);
177 /* Setup literal pool */ 379 /* Setup literal pool */
178 if (jit->seen & SEEN_LITERAL) { 380 if (jit->seen & SEEN_LITERAL) {
179 /* basr %r13,0 */ 381 /* basr %r13,0 */
180 EMIT2(0x0dd0); 382 EMIT2(0x0d00, REG_L, REG_0);
181 jit->base_ip = jit->prg; 383 jit->base_ip = jit->prg;
182 } 384 }
183 jit->off_load_word = EMIT_FN_CONST(SEEN_LOAD_WORD, sk_load_word); 385 /* Setup stack and backchain */
184 jit->off_load_half = EMIT_FN_CONST(SEEN_LOAD_HALF, sk_load_half); 386 if (jit->seen & SEEN_STACK) {
185 jit->off_load_byte = EMIT_FN_CONST(SEEN_LOAD_BYTE, sk_load_byte); 387 /* lgr %bfp,%r15 (BPF frame pointer) */
186 jit->off_load_bmsh = EMIT_FN_CONST(SEEN_LOAD_BMSH, sk_load_byte_msh); 388 EMIT4(0xb9040000, BPF_REG_FP, REG_15);
187 jit->off_load_iword = EMIT_FN_CONST(SEEN_LOAD_IWORD, sk_load_word_ind); 389 /* aghi %r15,-STK_OFF */
188 jit->off_load_ihalf = EMIT_FN_CONST(SEEN_LOAD_IHALF, sk_load_half_ind); 390 EMIT4_IMM(0xa70b0000, REG_15, -STK_OFF);
189 jit->off_load_ibyte = EMIT_FN_CONST(SEEN_LOAD_IBYTE, sk_load_byte_ind); 391 if (jit->seen & SEEN_FUNC)
190 392 /* stg %bfp,152(%r15) (backchain) */
191 /* Filter needs to access skb data */ 393 EMIT6_DISP_LH(0xe3000000, 0x0024, BPF_REG_FP, REG_0,
192 if (jit->seen & SEEN_DATAREF) { 394 REG_15, 152);
193 /* l %r11,<len>(%r2) */ 395 }
194 EMIT4_DISP(0x58b02000, offsetof(struct sk_buff, len)); 396 /*
195 /* s %r11,<data_len>(%r2) */ 397 * For SKB access %b1 contains the SKB pointer. For "bpf_jit.S"
196 EMIT4_DISP(0x5bb02000, offsetof(struct sk_buff, data_len)); 398 * we store the SKB header length on the stack and the SKB data
197 /* lg %r10,<data>(%r2) */ 399 * pointer in REG_SKB_DATA.
198 EMIT6_DISP(0xe3a02000, 0x0004, 400 */
199 offsetof(struct sk_buff, data)); 401 if (jit->seen & SEEN_SKB) {
402 /* Header length: llgf %w1,<len>(%b1) */
403 EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_1,
404 offsetof(struct sk_buff, len));
405 /* s %w1,<data_len>(%b1) */
406 EMIT4_DISP(0x5b000000, REG_W1, BPF_REG_1,
407 offsetof(struct sk_buff, data_len));
408 /* stg %w1,ST_OFF_HLEN(%r0,%r15) */
409 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0, REG_15,
410 STK_OFF_HLEN);
411 /* lg %skb_data,data_off(%b1) */
412 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0,
413 BPF_REG_1, offsetof(struct sk_buff, data));
200 } 414 }
415 /* BPF compatibility: clear A (%b7) and X (%b8) registers */
416 if (REG_SEEN(BPF_REG_7))
417 /* lghi %b7,0 */
418 EMIT4_IMM(0xa7090000, BPF_REG_7, 0);
419 if (REG_SEEN(BPF_REG_8))
420 /* lghi %b8,0 */
421 EMIT4_IMM(0xa7090000, BPF_REG_8, 0);
201} 422}
202 423
424/*
425 * Function epilogue
426 */
203static void bpf_jit_epilogue(struct bpf_jit *jit) 427static void bpf_jit_epilogue(struct bpf_jit *jit)
204{ 428{
205 /* Return 0 */ 429 /* Return 0 */
206 if (jit->seen & SEEN_RET0) { 430 if (jit->seen & SEEN_RET0) {
207 jit->ret0_ip = jit->prg; 431 jit->ret0_ip = jit->prg;
208 /* lghi %r2,0 */ 432 /* lghi %b0,0 */
209 EMIT4(0xa7290000); 433 EMIT4_IMM(0xa7090000, BPF_REG_0, 0);
210 } 434 }
211 jit->exit_ip = jit->prg; 435 jit->exit_ip = jit->prg;
436 /* Load exit code: lgr %r2,%b0 */
437 EMIT4(0xb9040000, REG_2, BPF_REG_0);
212 /* Restore registers */ 438 /* Restore registers */
213 if (jit->seen & SEEN_DATAREF) 439 save_restore_regs(jit, REGS_RESTORE);
214 /* lmg %r8,%r15,<offset>(%r15) */
215 EMIT6_DISP(0xeb8ff000, 0x0004,
216 (jit->seen & SEEN_MEM) ? 200 : 168);
217 else if ((jit->seen & SEEN_XREG) && (jit->seen & SEEN_LITERAL))
218 /* lmg %r12,%r13,120(%r15) */
219 EMIT6(0xebcdf078, 0x0004);
220 else if (jit->seen & SEEN_XREG)
221 /* lg %r12,120(%r15) */
222 EMIT6(0xe3c0f078, 0x0004);
223 else if (jit->seen & SEEN_LITERAL)
224 /* lg %r13,128(%r15) */
225 EMIT6(0xe3d0f080, 0x0004);
226 /* br %r14 */ 440 /* br %r14 */
227 EMIT2(0x07fe); 441 _EMIT2(0x07fe);
228} 442}
229 443
230/* 444/*
231 * make sure we dont leak kernel information to user 445 * Compile one eBPF instruction into s390x code
232 */ 446 */
233static void bpf_jit_noleaks(struct bpf_jit *jit, struct sock_filter *filter) 447static int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i)
234{ 448{
235 /* Clear temporary memory if (seen & SEEN_MEM) */ 449 struct bpf_insn *insn = &fp->insnsi[i];
236 if (jit->seen & SEEN_MEM) 450 int jmp_off, last, insn_count = 1;
237 /* xc 0(64,%r15),0(%r15) */ 451 unsigned int func_addr, mask;
238 EMIT6(0xd73ff000, 0xf000); 452 u32 dst_reg = insn->dst_reg;
239 /* Clear X if (seen & SEEN_XREG) */ 453 u32 src_reg = insn->src_reg;
240 if (jit->seen & SEEN_XREG) 454 u32 *addrs = jit->addrs;
241 /* lhi %r12,0 */ 455 s32 imm = insn->imm;
242 EMIT4(0xa7c80000); 456 s16 off = insn->off;
243 /* Clear A if the first register does not set it. */
244 switch (filter[0].code) {
245 case BPF_LD | BPF_W | BPF_ABS:
246 case BPF_LD | BPF_H | BPF_ABS:
247 case BPF_LD | BPF_B | BPF_ABS:
248 case BPF_LD | BPF_W | BPF_LEN:
249 case BPF_LD | BPF_W | BPF_IND:
250 case BPF_LD | BPF_H | BPF_IND:
251 case BPF_LD | BPF_B | BPF_IND:
252 case BPF_LD | BPF_IMM:
253 case BPF_LD | BPF_MEM:
254 case BPF_MISC | BPF_TXA:
255 case BPF_RET | BPF_K:
256 /* first instruction sets A register */
257 break;
258 default: /* A = 0 */
259 /* lhi %r5,0 */
260 EMIT4(0xa7580000);
261 }
262}
263 457
264static int bpf_jit_insn(struct bpf_jit *jit, struct sock_filter *filter, 458 switch (insn->code) {
265 unsigned int *addrs, int i, int last) 459 /*
266{ 460 * BPF_MOV
267 unsigned int K; 461 */
268 int offset; 462 case BPF_ALU | BPF_MOV | BPF_X: /* dst = (u32) src */
269 unsigned int mask; 463 /* llgfr %dst,%src */
270 u16 code; 464 EMIT4(0xb9160000, dst_reg, src_reg);
271 465 break;
272 K = filter->k; 466 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
273 code = bpf_anc_helper(filter); 467 /* lgr %dst,%src */
274 468 EMIT4(0xb9040000, dst_reg, src_reg);
275 switch (code) { 469 break;
276 case BPF_ALU | BPF_ADD | BPF_X: /* A += X */ 470 case BPF_ALU | BPF_MOV | BPF_K: /* dst = (u32) imm */
277 jit->seen |= SEEN_XREG; 471 /* llilf %dst,imm */
278 /* ar %r5,%r12 */ 472 EMIT6_IMM(0xc00f0000, dst_reg, imm);
279 EMIT2(0x1a5c); 473 break;
280 break; 474 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = imm */
281 case BPF_ALU | BPF_ADD | BPF_K: /* A += K */ 475 /* lgfi %dst,imm */
282 if (!K) 476 EMIT6_IMM(0xc0010000, dst_reg, imm);
477 break;
478 /*
479 * BPF_LD 64
480 */
481 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
482 {
483 /* 16 byte instruction that uses two 'struct bpf_insn' */
484 u64 imm64;
485
486 imm64 = (u64)(u32) insn[0].imm | ((u64)(u32) insn[1].imm) << 32;
487 /* lg %dst,<d(imm)>(%l) */
488 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, REG_0, REG_L,
489 EMIT_CONST_U64(imm64));
490 insn_count = 2;
491 break;
492 }
493 /*
494 * BPF_ADD
495 */
496 case BPF_ALU | BPF_ADD | BPF_X: /* dst = (u32) dst + (u32) src */
497 /* ar %dst,%src */
498 EMIT2(0x1a00, dst_reg, src_reg);
499 EMIT_ZERO(dst_reg);
500 break;
501 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst = dst + src */
502 /* agr %dst,%src */
503 EMIT4(0xb9080000, dst_reg, src_reg);
504 break;
505 case BPF_ALU | BPF_ADD | BPF_K: /* dst = (u32) dst + (u32) imm */
506 if (!imm)
283 break; 507 break;
284 if (K <= 16383) 508 /* alfi %dst,imm */
285 /* ahi %r5,<K> */ 509 EMIT6_IMM(0xc20b0000, dst_reg, imm);
286 EMIT4_IMM(0xa75a0000, K); 510 EMIT_ZERO(dst_reg);
287 else if (test_facility(21)) 511 break;
288 /* alfi %r5,<K> */ 512 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst = dst + imm */
289 EMIT6_IMM(0xc25b0000, K); 513 if (!imm)
290 else 514 break;
291 /* a %r5,<d(K)>(%r13) */ 515 /* agfi %dst,imm */
292 EMIT4_DISP(0x5a50d000, EMIT_CONST(K)); 516 EMIT6_IMM(0xc2080000, dst_reg, imm);
517 break;
518 /*
519 * BPF_SUB
520 */
521 case BPF_ALU | BPF_SUB | BPF_X: /* dst = (u32) dst - (u32) src */
522 /* sr %dst,%src */
523 EMIT2(0x1b00, dst_reg, src_reg);
524 EMIT_ZERO(dst_reg);
293 break; 525 break;
294 case BPF_ALU | BPF_SUB | BPF_X: /* A -= X */ 526 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst = dst - src */
295 jit->seen |= SEEN_XREG; 527 /* sgr %dst,%src */
296 /* sr %r5,%r12 */ 528 EMIT4(0xb9090000, dst_reg, src_reg);
297 EMIT2(0x1b5c);
298 break; 529 break;
299 case BPF_ALU | BPF_SUB | BPF_K: /* A -= K */ 530 case BPF_ALU | BPF_SUB | BPF_K: /* dst = (u32) dst - (u32) imm */
300 if (!K) 531 if (!imm)
301 break; 532 break;
302 if (K <= 16384) 533 /* alfi %dst,-imm */
303 /* ahi %r5,-K */ 534 EMIT6_IMM(0xc20b0000, dst_reg, -imm);
304 EMIT4_IMM(0xa75a0000, -K); 535 EMIT_ZERO(dst_reg);
305 else if (test_facility(21))
306 /* alfi %r5,-K */
307 EMIT6_IMM(0xc25b0000, -K);
308 else
309 /* s %r5,<d(K)>(%r13) */
310 EMIT4_DISP(0x5b50d000, EMIT_CONST(K));
311 break;
312 case BPF_ALU | BPF_MUL | BPF_X: /* A *= X */
313 jit->seen |= SEEN_XREG;
314 /* msr %r5,%r12 */
315 EMIT4(0xb252005c);
316 break;
317 case BPF_ALU | BPF_MUL | BPF_K: /* A *= K */
318 if (K <= 16383)
319 /* mhi %r5,K */
320 EMIT4_IMM(0xa75c0000, K);
321 else if (test_facility(34))
322 /* msfi %r5,<K> */
323 EMIT6_IMM(0xc2510000, K);
324 else
325 /* ms %r5,<d(K)>(%r13) */
326 EMIT4_DISP(0x7150d000, EMIT_CONST(K));
327 break; 536 break;
328 case BPF_ALU | BPF_DIV | BPF_X: /* A /= X */ 537 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst = dst - imm */
329 jit->seen |= SEEN_XREG | SEEN_RET0; 538 if (!imm)
330 /* ltr %r12,%r12 */ 539 break;
331 EMIT2(0x12cc); 540 /* agfi %dst,-imm */
332 /* jz <ret0> */ 541 EMIT6_IMM(0xc2080000, dst_reg, -imm);
333 EMIT4_PCREL(0xa7840000, (jit->ret0_ip - jit->prg)); 542 break;
334 /* lhi %r4,0 */ 543 /*
335 EMIT4(0xa7480000); 544 * BPF_MUL
336 /* dlr %r4,%r12 */ 545 */
337 EMIT4(0xb997004c); 546 case BPF_ALU | BPF_MUL | BPF_X: /* dst = (u32) dst * (u32) src */
338 break; 547 /* msr %dst,%src */
339 case BPF_ALU | BPF_DIV | BPF_K: /* A /= K */ 548 EMIT4(0xb2520000, dst_reg, src_reg);
340 if (K == 1) 549 EMIT_ZERO(dst_reg);
550 break;
551 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst = dst * src */
552 /* msgr %dst,%src */
553 EMIT4(0xb90c0000, dst_reg, src_reg);
554 break;
555 case BPF_ALU | BPF_MUL | BPF_K: /* dst = (u32) dst * (u32) imm */
556 if (imm == 1)
557 break;
558 /* msfi %r5,imm */
559 EMIT6_IMM(0xc2010000, dst_reg, imm);
560 EMIT_ZERO(dst_reg);
561 break;
562 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst = dst * imm */
563 if (imm == 1)
341 break; 564 break;
342 /* lhi %r4,0 */ 565 /* msgfi %dst,imm */
343 EMIT4(0xa7480000); 566 EMIT6_IMM(0xc2000000, dst_reg, imm);
344 /* dl %r4,<d(K)>(%r13) */ 567 break;
345 EMIT6_DISP(0xe340d000, 0x0097, EMIT_CONST(K)); 568 /*
346 break; 569 * BPF_DIV / BPF_MOD
347 case BPF_ALU | BPF_MOD | BPF_X: /* A %= X */ 570 */
348 jit->seen |= SEEN_XREG | SEEN_RET0; 571 case BPF_ALU | BPF_DIV | BPF_X: /* dst = (u32) dst / (u32) src */
349 /* ltr %r12,%r12 */ 572 case BPF_ALU | BPF_MOD | BPF_X: /* dst = (u32) dst % (u32) src */
350 EMIT2(0x12cc); 573 {
574 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
575
576 jit->seen |= SEEN_RET0;
577 /* ltr %src,%src (if src == 0 goto fail) */
578 EMIT2(0x1200, src_reg, src_reg);
579 /* jz <ret0> */
580 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg);
581 /* lhi %w0,0 */
582 EMIT4_IMM(0xa7080000, REG_W0, 0);
583 /* lr %w1,%dst */
584 EMIT2(0x1800, REG_W1, dst_reg);
585 /* dlr %w0,%src */
586 EMIT4(0xb9970000, REG_W0, src_reg);
587 /* llgfr %dst,%rc */
588 EMIT4(0xb9160000, dst_reg, rc_reg);
589 break;
590 }
591 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst = dst / (u32) src */
592 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst = dst % (u32) src */
593 {
594 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
595
596 jit->seen |= SEEN_RET0;
597 /* ltgr %src,%src (if src == 0 goto fail) */
598 EMIT4(0xb9020000, src_reg, src_reg);
351 /* jz <ret0> */ 599 /* jz <ret0> */
352 EMIT4_PCREL(0xa7840000, (jit->ret0_ip - jit->prg)); 600 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg);
353 /* lhi %r4,0 */ 601 /* lghi %w0,0 */
354 EMIT4(0xa7480000); 602 EMIT4_IMM(0xa7090000, REG_W0, 0);
355 /* dlr %r4,%r12 */ 603 /* lgr %w1,%dst */
356 EMIT4(0xb997004c); 604 EMIT4(0xb9040000, REG_W1, dst_reg);
357 /* lr %r5,%r4 */ 605 /* llgfr %dst,%src (u32 cast) */
358 EMIT2(0x1854); 606 EMIT4(0xb9160000, dst_reg, src_reg);
359 break; 607 /* dlgr %w0,%dst */
360 case BPF_ALU | BPF_MOD | BPF_K: /* A %= K */ 608 EMIT4(0xb9870000, REG_W0, dst_reg);
361 if (K == 1) { 609 /* lgr %dst,%rc */
362 /* lhi %r5,0 */ 610 EMIT4(0xb9040000, dst_reg, rc_reg);
363 EMIT4(0xa7580000); 611 break;
612 }
613 case BPF_ALU | BPF_DIV | BPF_K: /* dst = (u32) dst / (u32) imm */
614 case BPF_ALU | BPF_MOD | BPF_K: /* dst = (u32) dst % (u32) imm */
615 {
616 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
617
618 if (imm == 1) {
619 if (BPF_OP(insn->code) == BPF_MOD)
620 /* lhgi %dst,0 */
621 EMIT4_IMM(0xa7090000, dst_reg, 0);
364 break; 622 break;
365 } 623 }
366 /* lhi %r4,0 */ 624 /* lhi %w0,0 */
367 EMIT4(0xa7480000); 625 EMIT4_IMM(0xa7080000, REG_W0, 0);
368 /* dl %r4,<d(K)>(%r13) */ 626 /* lr %w1,%dst */
369 EMIT6_DISP(0xe340d000, 0x0097, EMIT_CONST(K)); 627 EMIT2(0x1800, REG_W1, dst_reg);
370 /* lr %r5,%r4 */ 628 /* dl %w0,<d(imm)>(%l) */
371 EMIT2(0x1854); 629 EMIT6_DISP_LH(0xe3000000, 0x0097, REG_W0, REG_0, REG_L,
372 break; 630 EMIT_CONST_U32(imm));
373 case BPF_ALU | BPF_AND | BPF_X: /* A &= X */ 631 /* llgfr %dst,%rc */
374 jit->seen |= SEEN_XREG; 632 EMIT4(0xb9160000, dst_reg, rc_reg);
375 /* nr %r5,%r12 */ 633 break;
376 EMIT2(0x145c); 634 }
377 break; 635 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst = dst / (u32) imm */
378 case BPF_ALU | BPF_AND | BPF_K: /* A &= K */ 636 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst = dst % (u32) imm */
379 if (test_facility(21)) 637 {
380 /* nilf %r5,<K> */ 638 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
381 EMIT6_IMM(0xc05b0000, K); 639
382 else 640 if (imm == 1) {
383 /* n %r5,<d(K)>(%r13) */ 641 if (BPF_OP(insn->code) == BPF_MOD)
384 EMIT4_DISP(0x5450d000, EMIT_CONST(K)); 642 /* lhgi %dst,0 */
385 break; 643 EMIT4_IMM(0xa7090000, dst_reg, 0);
386 case BPF_ALU | BPF_OR | BPF_X: /* A |= X */ 644 break;
387 jit->seen |= SEEN_XREG; 645 }
388 /* or %r5,%r12 */ 646 /* lghi %w0,0 */
389 EMIT2(0x165c); 647 EMIT4_IMM(0xa7090000, REG_W0, 0);
390 break; 648 /* lgr %w1,%dst */
391 case BPF_ALU | BPF_OR | BPF_K: /* A |= K */ 649 EMIT4(0xb9040000, REG_W1, dst_reg);
392 if (test_facility(21)) 650 /* dlg %w0,<d(imm)>(%l) */
393 /* oilf %r5,<K> */ 651 EMIT6_DISP_LH(0xe3000000, 0x0087, REG_W0, REG_0, REG_L,
394 EMIT6_IMM(0xc05d0000, K); 652 EMIT_CONST_U64((u32) imm));
395 else 653 /* lgr %dst,%rc */
396 /* o %r5,<d(K)>(%r13) */ 654 EMIT4(0xb9040000, dst_reg, rc_reg);
397 EMIT4_DISP(0x5650d000, EMIT_CONST(K)); 655 break;
656 }
657 /*
658 * BPF_AND
659 */
660 case BPF_ALU | BPF_AND | BPF_X: /* dst = (u32) dst & (u32) src */
661 /* nr %dst,%src */
662 EMIT2(0x1400, dst_reg, src_reg);
663 EMIT_ZERO(dst_reg);
664 break;
665 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */
666 /* ngr %dst,%src */
667 EMIT4(0xb9800000, dst_reg, src_reg);
668 break;
669 case BPF_ALU | BPF_AND | BPF_K: /* dst = (u32) dst & (u32) imm */
670 /* nilf %dst,imm */
671 EMIT6_IMM(0xc00b0000, dst_reg, imm);
672 EMIT_ZERO(dst_reg);
398 break; 673 break;
399 case BPF_ANC | SKF_AD_ALU_XOR_X: /* A ^= X; */ 674 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */
400 case BPF_ALU | BPF_XOR | BPF_X: 675 /* ng %dst,<d(imm)>(%l) */
401 jit->seen |= SEEN_XREG; 676 EMIT6_DISP_LH(0xe3000000, 0x0080, dst_reg, REG_0, REG_L,
402 /* xr %r5,%r12 */ 677 EMIT_CONST_U64(imm));
403 EMIT2(0x175c);
404 break; 678 break;
405 case BPF_ALU | BPF_XOR | BPF_K: /* A ^= K */ 679 /*
406 if (!K) 680 * BPF_OR
681 */
682 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */
683 /* or %dst,%src */
684 EMIT2(0x1600, dst_reg, src_reg);
685 EMIT_ZERO(dst_reg);
686 break;
687 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */
688 /* ogr %dst,%src */
689 EMIT4(0xb9810000, dst_reg, src_reg);
690 break;
691 case BPF_ALU | BPF_OR | BPF_K: /* dst = (u32) dst | (u32) imm */
692 /* oilf %dst,imm */
693 EMIT6_IMM(0xc00d0000, dst_reg, imm);
694 EMIT_ZERO(dst_reg);
695 break;
696 case BPF_ALU64 | BPF_OR | BPF_K: /* dst = dst | imm */
697 /* og %dst,<d(imm)>(%l) */
698 EMIT6_DISP_LH(0xe3000000, 0x0081, dst_reg, REG_0, REG_L,
699 EMIT_CONST_U64(imm));
700 break;
701 /*
702 * BPF_XOR
703 */
704 case BPF_ALU | BPF_XOR | BPF_X: /* dst = (u32) dst ^ (u32) src */
705 /* xr %dst,%src */
706 EMIT2(0x1700, dst_reg, src_reg);
707 EMIT_ZERO(dst_reg);
708 break;
709 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst = dst ^ src */
710 /* xgr %dst,%src */
711 EMIT4(0xb9820000, dst_reg, src_reg);
712 break;
713 case BPF_ALU | BPF_XOR | BPF_K: /* dst = (u32) dst ^ (u32) imm */
714 if (!imm)
407 break; 715 break;
408 /* x %r5,<d(K)>(%r13) */ 716 /* xilf %dst,imm */
409 EMIT4_DISP(0x5750d000, EMIT_CONST(K)); 717 EMIT6_IMM(0xc0070000, dst_reg, imm);
718 EMIT_ZERO(dst_reg);
719 break;
720 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst = dst ^ imm */
721 /* xg %dst,<d(imm)>(%l) */
722 EMIT6_DISP_LH(0xe3000000, 0x0082, dst_reg, REG_0, REG_L,
723 EMIT_CONST_U64(imm));
724 break;
725 /*
726 * BPF_LSH
727 */
728 case BPF_ALU | BPF_LSH | BPF_X: /* dst = (u32) dst << (u32) src */
729 /* sll %dst,0(%src) */
730 EMIT4_DISP(0x89000000, dst_reg, src_reg, 0);
731 EMIT_ZERO(dst_reg);
410 break; 732 break;
411 case BPF_ALU | BPF_LSH | BPF_X: /* A <<= X; */ 733 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst = dst << src */
412 jit->seen |= SEEN_XREG; 734 /* sllg %dst,%dst,0(%src) */
413 /* sll %r5,0(%r12) */ 735 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, src_reg, 0);
414 EMIT4(0x8950c000);
415 break; 736 break;
416 case BPF_ALU | BPF_LSH | BPF_K: /* A <<= K */ 737 case BPF_ALU | BPF_LSH | BPF_K: /* dst = (u32) dst << (u32) imm */
417 if (K == 0) 738 if (imm == 0)
418 break; 739 break;
419 /* sll %r5,K */ 740 /* sll %dst,imm(%r0) */
420 EMIT4_DISP(0x89500000, K); 741 EMIT4_DISP(0x89000000, dst_reg, REG_0, imm);
742 EMIT_ZERO(dst_reg);
421 break; 743 break;
422 case BPF_ALU | BPF_RSH | BPF_X: /* A >>= X; */ 744 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst = dst << imm */
423 jit->seen |= SEEN_XREG; 745 if (imm == 0)
424 /* srl %r5,0(%r12) */ 746 break;
425 EMIT4(0x8850c000); 747 /* sllg %dst,%dst,imm(%r0) */
748 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, REG_0, imm);
749 break;
750 /*
751 * BPF_RSH
752 */
753 case BPF_ALU | BPF_RSH | BPF_X: /* dst = (u32) dst >> (u32) src */
754 /* srl %dst,0(%src) */
755 EMIT4_DISP(0x88000000, dst_reg, src_reg, 0);
756 EMIT_ZERO(dst_reg);
426 break; 757 break;
427 case BPF_ALU | BPF_RSH | BPF_K: /* A >>= K; */ 758 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst = dst >> src */
428 if (K == 0) 759 /* srlg %dst,%dst,0(%src) */
760 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, src_reg, 0);
761 break;
762 case BPF_ALU | BPF_RSH | BPF_K: /* dst = (u32) dst >> (u32) imm */
763 if (imm == 0)
429 break; 764 break;
430 /* srl %r5,K */ 765 /* srl %dst,imm(%r0) */
431 EMIT4_DISP(0x88500000, K); 766 EMIT4_DISP(0x88000000, dst_reg, REG_0, imm);
432 break; 767 EMIT_ZERO(dst_reg);
433 case BPF_ALU | BPF_NEG: /* A = -A */ 768 break;
434 /* lcr %r5,%r5 */ 769 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst = dst >> imm */
435 EMIT2(0x1355); 770 if (imm == 0)
436 break;
437 case BPF_JMP | BPF_JA: /* ip += K */
438 offset = addrs[i + K] + jit->start - jit->prg;
439 EMIT4_PCREL(0xa7f40000, offset);
440 break;
441 case BPF_JMP | BPF_JGT | BPF_K: /* ip += (A > K) ? jt : jf */
442 mask = 0x200000; /* jh */
443 goto kbranch;
444 case BPF_JMP | BPF_JGE | BPF_K: /* ip += (A >= K) ? jt : jf */
445 mask = 0xa00000; /* jhe */
446 goto kbranch;
447 case BPF_JMP | BPF_JEQ | BPF_K: /* ip += (A == K) ? jt : jf */
448 mask = 0x800000; /* je */
449kbranch: /* Emit compare if the branch targets are different */
450 if (filter->jt != filter->jf) {
451 if (test_facility(21))
452 /* clfi %r5,<K> */
453 EMIT6_IMM(0xc25f0000, K);
454 else
455 /* cl %r5,<d(K)>(%r13) */
456 EMIT4_DISP(0x5550d000, EMIT_CONST(K));
457 }
458branch: if (filter->jt == filter->jf) {
459 if (filter->jt == 0)
460 break;
461 /* j <jt> */
462 offset = addrs[i + filter->jt] + jit->start - jit->prg;
463 EMIT4_PCREL(0xa7f40000, offset);
464 break; 771 break;
465 } 772 /* srlg %dst,%dst,imm(%r0) */
466 if (filter->jt != 0) { 773 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, REG_0, imm);
467 /* brc <mask>,<jt> */
468 offset = addrs[i + filter->jt] + jit->start - jit->prg;
469 EMIT4_PCREL(0xa7040000 | mask, offset);
470 }
471 if (filter->jf != 0) {
472 /* brc <mask^15>,<jf> */
473 offset = addrs[i + filter->jf] + jit->start - jit->prg;
474 EMIT4_PCREL(0xa7040000 | (mask ^ 0xf00000), offset);
475 }
476 break; 774 break;
477 case BPF_JMP | BPF_JSET | BPF_K: /* ip += (A & K) ? jt : jf */ 775 /*
478 mask = 0x700000; /* jnz */ 776 * BPF_ARSH
479 /* Emit test if the branch targets are different */ 777 */
480 if (filter->jt != filter->jf) { 778 case BPF_ALU64 | BPF_ARSH | BPF_X: /* ((s64) dst) >>= src */
481 if (K > 65535) { 779 /* srag %dst,%dst,0(%src) */
482 /* lr %r4,%r5 */ 780 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, src_reg, 0);
483 EMIT2(0x1845); 781 break;
484 /* n %r4,<d(K)>(%r13) */ 782 case BPF_ALU64 | BPF_ARSH | BPF_K: /* ((s64) dst) >>= imm */
485 EMIT4_DISP(0x5440d000, EMIT_CONST(K)); 783 if (imm == 0)
486 } else 784 break;
487 /* tmll %r5,K */ 785 /* srag %dst,%dst,imm(%r0) */
488 EMIT4_IMM(0xa7510000, K); 786 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, REG_0, imm);
489 } 787 break;
490 goto branch; 788 /*
491 case BPF_JMP | BPF_JGT | BPF_X: /* ip += (A > X) ? jt : jf */ 789 * BPF_NEG
492 mask = 0x200000; /* jh */ 790 */
493 goto xbranch; 791 case BPF_ALU | BPF_NEG: /* dst = (u32) -dst */
494 case BPF_JMP | BPF_JGE | BPF_X: /* ip += (A >= X) ? jt : jf */ 792 /* lcr %dst,%dst */
495 mask = 0xa00000; /* jhe */ 793 EMIT2(0x1300, dst_reg, dst_reg);
496 goto xbranch; 794 EMIT_ZERO(dst_reg);
497 case BPF_JMP | BPF_JEQ | BPF_X: /* ip += (A == X) ? jt : jf */ 795 break;
498 mask = 0x800000; /* je */ 796 case BPF_ALU64 | BPF_NEG: /* dst = -dst */
499xbranch: /* Emit compare if the branch targets are different */ 797 /* lcgr %dst,%dst */
500 if (filter->jt != filter->jf) { 798 EMIT4(0xb9130000, dst_reg, dst_reg);
501 jit->seen |= SEEN_XREG; 799 break;
502 /* clr %r5,%r12 */ 800 /*
503 EMIT2(0x155c); 801 * BPF_FROM_BE/LE
504 } 802 */
505 goto branch; 803 case BPF_ALU | BPF_END | BPF_FROM_BE:
506 case BPF_JMP | BPF_JSET | BPF_X: /* ip += (A & X) ? jt : jf */ 804 /* s390 is big endian, therefore only clear high order bytes */
507 mask = 0x700000; /* jnz */ 805 switch (imm) {
508 /* Emit test if the branch targets are different */ 806 case 16: /* dst = (u16) cpu_to_be16(dst) */
509 if (filter->jt != filter->jf) { 807 /* llghr %dst,%dst */
510 jit->seen |= SEEN_XREG; 808 EMIT4(0xb9850000, dst_reg, dst_reg);
511 /* lr %r4,%r5 */ 809 break;
512 EMIT2(0x1845); 810 case 32: /* dst = (u32) cpu_to_be32(dst) */
513 /* nr %r4,%r12 */ 811 /* llgfr %dst,%dst */
514 EMIT2(0x144c); 812 EMIT4(0xb9160000, dst_reg, dst_reg);
813 break;
814 case 64: /* dst = (u64) cpu_to_be64(dst) */
815 break;
515 } 816 }
516 goto branch;
517 case BPF_LD | BPF_W | BPF_ABS: /* A = *(u32 *) (skb->data+K) */
518 jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_WORD;
519 offset = jit->off_load_word;
520 goto load_abs;
521 case BPF_LD | BPF_H | BPF_ABS: /* A = *(u16 *) (skb->data+K) */
522 jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_HALF;
523 offset = jit->off_load_half;
524 goto load_abs;
525 case BPF_LD | BPF_B | BPF_ABS: /* A = *(u8 *) (skb->data+K) */
526 jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_BYTE;
527 offset = jit->off_load_byte;
528load_abs: if ((int) K < 0)
529 goto out;
530call_fn: /* lg %r1,<d(function)>(%r13) */
531 EMIT6_DISP(0xe310d000, 0x0004, offset);
532 /* l %r3,<d(K)>(%r13) */
533 EMIT4_DISP(0x5830d000, EMIT_CONST(K));
534 /* basr %r8,%r1 */
535 EMIT2(0x0d81);
536 /* jnz <ret0> */
537 EMIT4_PCREL(0xa7740000, (jit->ret0_ip - jit->prg));
538 break; 817 break;
539 case BPF_LD | BPF_W | BPF_IND: /* A = *(u32 *) (skb->data+K+X) */ 818 case BPF_ALU | BPF_END | BPF_FROM_LE:
540 jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_IWORD; 819 switch (imm) {
541 offset = jit->off_load_iword; 820 case 16: /* dst = (u16) cpu_to_le16(dst) */
542 goto call_fn; 821 /* lrvr %dst,%dst */
543 case BPF_LD | BPF_H | BPF_IND: /* A = *(u16 *) (skb->data+K+X) */ 822 EMIT4(0xb91f0000, dst_reg, dst_reg);
544 jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_IHALF; 823 /* srl %dst,16(%r0) */
545 offset = jit->off_load_ihalf; 824 EMIT4_DISP(0x88000000, dst_reg, REG_0, 16);
546 goto call_fn; 825 /* llghr %dst,%dst */
547 case BPF_LD | BPF_B | BPF_IND: /* A = *(u8 *) (skb->data+K+X) */ 826 EMIT4(0xb9850000, dst_reg, dst_reg);
548 jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_IBYTE; 827 break;
549 offset = jit->off_load_ibyte; 828 case 32: /* dst = (u32) cpu_to_le32(dst) */
550 goto call_fn; 829 /* lrvr %dst,%dst */
551 case BPF_LDX | BPF_B | BPF_MSH: 830 EMIT4(0xb91f0000, dst_reg, dst_reg);
552 /* X = (*(u8 *)(skb->data+K) & 0xf) << 2 */ 831 /* llgfr %dst,%dst */
553 jit->seen |= SEEN_RET0; 832 EMIT4(0xb9160000, dst_reg, dst_reg);
554 if ((int) K < 0) { 833 break;
555 /* j <ret0> */ 834 case 64: /* dst = (u64) cpu_to_le64(dst) */
556 EMIT4_PCREL(0xa7f40000, (jit->ret0_ip - jit->prg)); 835 /* lrvgr %dst,%dst */
836 EMIT4(0xb90f0000, dst_reg, dst_reg);
557 break; 837 break;
558 } 838 }
559 jit->seen |= SEEN_DATAREF | SEEN_LOAD_BMSH;
560 offset = jit->off_load_bmsh;
561 goto call_fn;
562 case BPF_LD | BPF_W | BPF_LEN: /* A = skb->len; */
563 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
564 /* l %r5,<d(len)>(%r2) */
565 EMIT4_DISP(0x58502000, offsetof(struct sk_buff, len));
566 break;
567 case BPF_LDX | BPF_W | BPF_LEN: /* X = skb->len; */
568 jit->seen |= SEEN_XREG;
569 /* l %r12,<d(len)>(%r2) */
570 EMIT4_DISP(0x58c02000, offsetof(struct sk_buff, len));
571 break;
572 case BPF_LD | BPF_IMM: /* A = K */
573 if (K <= 16383)
574 /* lhi %r5,K */
575 EMIT4_IMM(0xa7580000, K);
576 else if (test_facility(21))
577 /* llilf %r5,<K> */
578 EMIT6_IMM(0xc05f0000, K);
579 else
580 /* l %r5,<d(K)>(%r13) */
581 EMIT4_DISP(0x5850d000, EMIT_CONST(K));
582 break;
583 case BPF_LDX | BPF_IMM: /* X = K */
584 jit->seen |= SEEN_XREG;
585 if (K <= 16383)
586 /* lhi %r12,<K> */
587 EMIT4_IMM(0xa7c80000, K);
588 else if (test_facility(21))
589 /* llilf %r12,<K> */
590 EMIT6_IMM(0xc0cf0000, K);
591 else
592 /* l %r12,<d(K)>(%r13) */
593 EMIT4_DISP(0x58c0d000, EMIT_CONST(K));
594 break; 839 break;
595 case BPF_LD | BPF_MEM: /* A = mem[K] */ 840 /*
841 * BPF_ST(X)
842 */
843 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src_reg */
844 /* stcy %src,off(%dst) */
845 EMIT6_DISP_LH(0xe3000000, 0x0072, src_reg, dst_reg, REG_0, off);
846 jit->seen |= SEEN_MEM;
847 break;
848 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */
849 /* sthy %src,off(%dst) */
850 EMIT6_DISP_LH(0xe3000000, 0x0070, src_reg, dst_reg, REG_0, off);
851 jit->seen |= SEEN_MEM;
852 break;
853 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */
854 /* sty %src,off(%dst) */
855 EMIT6_DISP_LH(0xe3000000, 0x0050, src_reg, dst_reg, REG_0, off);
856 jit->seen |= SEEN_MEM;
857 break;
858 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */
859 /* stg %src,off(%dst) */
860 EMIT6_DISP_LH(0xe3000000, 0x0024, src_reg, dst_reg, REG_0, off);
861 jit->seen |= SEEN_MEM;
862 break;
863 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */
864 /* lhi %w0,imm */
865 EMIT4_IMM(0xa7080000, REG_W0, (u8) imm);
866 /* stcy %w0,off(dst) */
867 EMIT6_DISP_LH(0xe3000000, 0x0072, REG_W0, dst_reg, REG_0, off);
868 jit->seen |= SEEN_MEM;
869 break;
870 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */
871 /* lhi %w0,imm */
872 EMIT4_IMM(0xa7080000, REG_W0, (u16) imm);
873 /* sthy %w0,off(dst) */
874 EMIT6_DISP_LH(0xe3000000, 0x0070, REG_W0, dst_reg, REG_0, off);
596 jit->seen |= SEEN_MEM; 875 jit->seen |= SEEN_MEM;
597 /* l %r5,<K>(%r15) */
598 EMIT4_DISP(0x5850f000,
599 (jit->seen & SEEN_DATAREF) ? 160 + K*4 : K*4);
600 break;
601 case BPF_LDX | BPF_MEM: /* X = mem[K] */
602 jit->seen |= SEEN_XREG | SEEN_MEM;
603 /* l %r12,<K>(%r15) */
604 EMIT4_DISP(0x58c0f000,
605 (jit->seen & SEEN_DATAREF) ? 160 + K*4 : K*4);
606 break;
607 case BPF_MISC | BPF_TAX: /* X = A */
608 jit->seen |= SEEN_XREG;
609 /* lr %r12,%r5 */
610 EMIT2(0x18c5);
611 break;
612 case BPF_MISC | BPF_TXA: /* A = X */
613 jit->seen |= SEEN_XREG;
614 /* lr %r5,%r12 */
615 EMIT2(0x185c);
616 break;
617 case BPF_RET | BPF_K:
618 if (K == 0) {
619 jit->seen |= SEEN_RET0;
620 if (last)
621 break;
622 /* j <ret0> */
623 EMIT4_PCREL(0xa7f40000, jit->ret0_ip - jit->prg);
624 } else {
625 if (K <= 16383)
626 /* lghi %r2,K */
627 EMIT4_IMM(0xa7290000, K);
628 else
629 /* llgf %r2,<K>(%r13) */
630 EMIT6_DISP(0xe320d000, 0x0016, EMIT_CONST(K));
631 /* j <exit> */
632 if (last && !(jit->seen & SEEN_RET0))
633 break;
634 EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg);
635 }
636 break; 876 break;
637 case BPF_RET | BPF_A: 877 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */
638 /* llgfr %r2,%r5 */ 878 /* llilf %w0,imm */
639 EMIT4(0xb9160025); 879 EMIT6_IMM(0xc00f0000, REG_W0, (u32) imm);
880 /* sty %w0,off(%dst) */
881 EMIT6_DISP_LH(0xe3000000, 0x0050, REG_W0, dst_reg, REG_0, off);
882 jit->seen |= SEEN_MEM;
883 break;
884 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */
885 /* lgfi %w0,imm */
886 EMIT6_IMM(0xc0010000, REG_W0, imm);
887 /* stg %w0,off(%dst) */
888 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W0, dst_reg, REG_0, off);
889 jit->seen |= SEEN_MEM;
890 break;
891 /*
892 * BPF_STX XADD (atomic_add)
893 */
894 case BPF_STX | BPF_XADD | BPF_W: /* *(u32 *)(dst + off) += src */
895 /* laal %w0,%src,off(%dst) */
896 EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W0, src_reg,
897 dst_reg, off);
898 jit->seen |= SEEN_MEM;
899 break;
900 case BPF_STX | BPF_XADD | BPF_DW: /* *(u64 *)(dst + off) += src */
901 /* laalg %w0,%src,off(%dst) */
902 EMIT6_DISP_LH(0xeb000000, 0x00ea, REG_W0, src_reg,
903 dst_reg, off);
904 jit->seen |= SEEN_MEM;
905 break;
906 /*
907 * BPF_LDX
908 */
909 case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + off) */
910 /* llgc %dst,0(off,%src) */
911 EMIT6_DISP_LH(0xe3000000, 0x0090, dst_reg, src_reg, REG_0, off);
912 jit->seen |= SEEN_MEM;
913 break;
914 case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + off) */
915 /* llgh %dst,0(off,%src) */
916 EMIT6_DISP_LH(0xe3000000, 0x0091, dst_reg, src_reg, REG_0, off);
917 jit->seen |= SEEN_MEM;
918 break;
919 case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + off) */
920 /* llgf %dst,off(%src) */
921 jit->seen |= SEEN_MEM;
922 EMIT6_DISP_LH(0xe3000000, 0x0016, dst_reg, src_reg, REG_0, off);
923 break;
924 case BPF_LDX | BPF_MEM | BPF_DW: /* dst = *(u64 *)(ul) (src + off) */
925 /* lg %dst,0(off,%src) */
926 jit->seen |= SEEN_MEM;
927 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, src_reg, REG_0, off);
928 break;
929 /*
930 * BPF_JMP / CALL
931 */
932 case BPF_JMP | BPF_CALL:
933 {
934 /*
935 * b0 = (__bpf_call_base + imm)(b1, b2, b3, b4, b5)
936 */
937 const u64 func = (u64)__bpf_call_base + imm;
938
939 REG_SET_SEEN(BPF_REG_5);
940 jit->seen |= SEEN_FUNC;
941 /* lg %w1,<d(imm)>(%l) */
942 EMIT6_DISP(0xe3000000, 0x0004, REG_W1, REG_0, REG_L,
943 EMIT_CONST_U64(func));
944 /* basr %r14,%w1 */
945 EMIT2(0x0d00, REG_14, REG_W1);
946 /* lgr %b0,%r2: load return value into %b0 */
947 EMIT4(0xb9040000, BPF_REG_0, REG_2);
948 break;
949 }
950 case BPF_JMP | BPF_EXIT: /* return b0 */
951 last = (i == fp->len - 1) ? 1 : 0;
952 if (last && !(jit->seen & SEEN_RET0))
953 break;
640 /* j <exit> */ 954 /* j <exit> */
641 EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg); 955 EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg);
642 break; 956 break;
643 case BPF_ST: /* mem[K] = A */ 957 /*
644 jit->seen |= SEEN_MEM; 958 * Branch relative (number of skipped instructions) to offset on
645 /* st %r5,<K>(%r15) */ 959 * condition.
646 EMIT4_DISP(0x5050f000, 960 *
647 (jit->seen & SEEN_DATAREF) ? 160 + K*4 : K*4); 961 * Condition code to mask mapping:
648 break; 962 *
649 case BPF_STX: /* mem[K] = X : mov %ebx,off8(%rbp) */ 963 * CC | Description | Mask
650 jit->seen |= SEEN_XREG | SEEN_MEM; 964 * ------------------------------
651 /* st %r12,<K>(%r15) */ 965 * 0 | Operands equal | 8
652 EMIT4_DISP(0x50c0f000, 966 * 1 | First operand low | 4
653 (jit->seen & SEEN_DATAREF) ? 160 + K*4 : K*4); 967 * 2 | First operand high | 2
654 break; 968 * 3 | Unused | 1
655 case BPF_ANC | SKF_AD_PROTOCOL: /* A = ntohs(skb->protocol); */ 969 *
656 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, protocol) != 2); 970 * For s390x relative branches: ip = ip + off_bytes
657 /* lhi %r5,0 */ 971 * For BPF relative branches: insn = insn + off_insns + 1
658 EMIT4(0xa7580000); 972 *
659 /* icm %r5,3,<d(protocol)>(%r2) */ 973 * For example for s390x with offset 0 we jump to the branch
660 EMIT4_DISP(0xbf532000, offsetof(struct sk_buff, protocol)); 974 * instruction itself (loop) and for BPF with offset 0 we
661 break; 975 * branch to the instruction behind the branch.
662 case BPF_ANC | SKF_AD_IFINDEX: /* if (!skb->dev) return 0; 976 */
663 * A = skb->dev->ifindex */ 977 case BPF_JMP | BPF_JA: /* if (true) */
664 BUILD_BUG_ON(FIELD_SIZEOF(struct net_device, ifindex) != 4); 978 mask = 0xf000; /* j */
665 jit->seen |= SEEN_RET0; 979 goto branch_oc;
666 /* lg %r1,<d(dev)>(%r2) */ 980 case BPF_JMP | BPF_JSGT | BPF_K: /* ((s64) dst > (s64) imm) */
667 EMIT6_DISP(0xe3102000, 0x0004, offsetof(struct sk_buff, dev)); 981 mask = 0x2000; /* jh */
668 /* ltgr %r1,%r1 */ 982 goto branch_ks;
669 EMIT4(0xb9020011); 983 case BPF_JMP | BPF_JSGE | BPF_K: /* ((s64) dst >= (s64) imm) */
670 /* jz <ret0> */ 984 mask = 0xa000; /* jhe */
671 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg); 985 goto branch_ks;
672 /* l %r5,<d(ifindex)>(%r1) */ 986 case BPF_JMP | BPF_JGT | BPF_K: /* (dst_reg > imm) */
673 EMIT4_DISP(0x58501000, offsetof(struct net_device, ifindex)); 987 mask = 0x2000; /* jh */
674 break; 988 goto branch_ku;
675 case BPF_ANC | SKF_AD_MARK: /* A = skb->mark */ 989 case BPF_JMP | BPF_JGE | BPF_K: /* (dst_reg >= imm) */
676 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4); 990 mask = 0xa000; /* jhe */
677 /* l %r5,<d(mark)>(%r2) */ 991 goto branch_ku;
678 EMIT4_DISP(0x58502000, offsetof(struct sk_buff, mark)); 992 case BPF_JMP | BPF_JNE | BPF_K: /* (dst_reg != imm) */
679 break; 993 mask = 0x7000; /* jne */
680 case BPF_ANC | SKF_AD_QUEUE: /* A = skb->queue_mapping */ 994 goto branch_ku;
681 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, queue_mapping) != 2); 995 case BPF_JMP | BPF_JEQ | BPF_K: /* (dst_reg == imm) */
682 /* lhi %r5,0 */ 996 mask = 0x8000; /* je */
683 EMIT4(0xa7580000); 997 goto branch_ku;
684 /* icm %r5,3,<d(queue_mapping)>(%r2) */ 998 case BPF_JMP | BPF_JSET | BPF_K: /* (dst_reg & imm) */
685 EMIT4_DISP(0xbf532000, offsetof(struct sk_buff, queue_mapping)); 999 mask = 0x7000; /* jnz */
686 break; 1000 /* lgfi %w1,imm (load sign extend imm) */
687 case BPF_ANC | SKF_AD_HATYPE: /* if (!skb->dev) return 0; 1001 EMIT6_IMM(0xc0010000, REG_W1, imm);
688 * A = skb->dev->type */ 1002 /* ngr %w1,%dst */
689 BUILD_BUG_ON(FIELD_SIZEOF(struct net_device, type) != 2); 1003 EMIT4(0xb9800000, REG_W1, dst_reg);
690 jit->seen |= SEEN_RET0; 1004 goto branch_oc;
691 /* lg %r1,<d(dev)>(%r2) */ 1005
692 EMIT6_DISP(0xe3102000, 0x0004, offsetof(struct sk_buff, dev)); 1006 case BPF_JMP | BPF_JSGT | BPF_X: /* ((s64) dst > (s64) src) */
693 /* ltgr %r1,%r1 */ 1007 mask = 0x2000; /* jh */
694 EMIT4(0xb9020011); 1008 goto branch_xs;
695 /* jz <ret0> */ 1009 case BPF_JMP | BPF_JSGE | BPF_X: /* ((s64) dst >= (s64) src) */
696 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg); 1010 mask = 0xa000; /* jhe */
697 /* lhi %r5,0 */ 1011 goto branch_xs;
698 EMIT4(0xa7580000); 1012 case BPF_JMP | BPF_JGT | BPF_X: /* (dst > src) */
699 /* icm %r5,3,<d(type)>(%r1) */ 1013 mask = 0x2000; /* jh */
700 EMIT4_DISP(0xbf531000, offsetof(struct net_device, type)); 1014 goto branch_xu;
701 break; 1015 case BPF_JMP | BPF_JGE | BPF_X: /* (dst >= src) */
702 case BPF_ANC | SKF_AD_RXHASH: /* A = skb->hash */ 1016 mask = 0xa000; /* jhe */
703 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, hash) != 4); 1017 goto branch_xu;
704 /* l %r5,<d(hash)>(%r2) */ 1018 case BPF_JMP | BPF_JNE | BPF_X: /* (dst != src) */
705 EMIT4_DISP(0x58502000, offsetof(struct sk_buff, hash)); 1019 mask = 0x7000; /* jne */
706 break; 1020 goto branch_xu;
707 case BPF_ANC | SKF_AD_VLAN_TAG: 1021 case BPF_JMP | BPF_JEQ | BPF_X: /* (dst == src) */
708 case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT: 1022 mask = 0x8000; /* je */
709 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, vlan_tci) != 2); 1023 goto branch_xu;
710 BUILD_BUG_ON(VLAN_TAG_PRESENT != 0x1000); 1024 case BPF_JMP | BPF_JSET | BPF_X: /* (dst & src) */
711 /* lhi %r5,0 */ 1025 mask = 0x7000; /* jnz */
712 EMIT4(0xa7580000); 1026 /* ngrk %w1,%dst,%src */
713 /* icm %r5,3,<d(vlan_tci)>(%r2) */ 1027 EMIT4_RRF(0xb9e40000, REG_W1, dst_reg, src_reg);
714 EMIT4_DISP(0xbf532000, offsetof(struct sk_buff, vlan_tci)); 1028 goto branch_oc;
715 if (code == (BPF_ANC | SKF_AD_VLAN_TAG)) { 1029branch_ks:
716 /* nill %r5,0xefff */ 1030 /* lgfi %w1,imm (load sign extend imm) */
717 EMIT4_IMM(0xa5570000, ~VLAN_TAG_PRESENT); 1031 EMIT6_IMM(0xc0010000, REG_W1, imm);
718 } else { 1032 /* cgrj %dst,%w1,mask,off */
719 /* nill %r5,0x1000 */ 1033 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, REG_W1, i, off, mask);
720 EMIT4_IMM(0xa5570000, VLAN_TAG_PRESENT); 1034 break;
721 /* srl %r5,12 */ 1035branch_ku:
722 EMIT4_DISP(0x88500000, 12); 1036 /* lgfi %w1,imm (load sign extend imm) */
723 } 1037 EMIT6_IMM(0xc0010000, REG_W1, imm);
1038 /* clgrj %dst,%w1,mask,off */
1039 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, REG_W1, i, off, mask);
1040 break;
1041branch_xs:
1042 /* cgrj %dst,%src,mask,off */
1043 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, src_reg, i, off, mask);
1044 break;
1045branch_xu:
1046 /* clgrj %dst,%src,mask,off */
1047 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, src_reg, i, off, mask);
1048 break;
1049branch_oc:
1050 /* brc mask,jmp_off (branch instruction needs 4 bytes) */
1051 jmp_off = addrs[i + off + 1] - (addrs[i + 1] - 4);
1052 EMIT4_PCREL(0xa7040000 | mask << 8, jmp_off);
724 break; 1053 break;
725 case BPF_ANC | SKF_AD_PKTTYPE: 1054 /*
726 /* lhi %r5,0 */ 1055 * BPF_LD
727 EMIT4(0xa7580000); 1056 */
728 /* ic %r5,<d(pkt_type_offset)>(%r2) */ 1057 case BPF_LD | BPF_ABS | BPF_B: /* b0 = *(u8 *) (skb->data+imm) */
729 EMIT4_DISP(0x43502000, PKT_TYPE_OFFSET()); 1058 case BPF_LD | BPF_IND | BPF_B: /* b0 = *(u8 *) (skb->data+imm+src) */
730 /* srl %r5,5 */ 1059 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
731 EMIT4_DISP(0x88500000, 5); 1060 func_addr = __pa(sk_load_byte_pos);
732 break; 1061 else
733 case BPF_ANC | SKF_AD_CPU: /* A = smp_processor_id() */ 1062 func_addr = __pa(sk_load_byte);
734#ifdef CONFIG_SMP 1063 goto call_fn;
735 /* l %r5,<d(cpu_nr)> */ 1064 case BPF_LD | BPF_ABS | BPF_H: /* b0 = *(u16 *) (skb->data+imm) */
736 EMIT4_DISP(0x58500000, offsetof(struct _lowcore, cpu_nr)); 1065 case BPF_LD | BPF_IND | BPF_H: /* b0 = *(u16 *) (skb->data+imm+src) */
737#else 1066 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
738 /* lhi %r5,0 */ 1067 func_addr = __pa(sk_load_half_pos);
739 EMIT4(0xa7580000); 1068 else
740#endif 1069 func_addr = __pa(sk_load_half);
1070 goto call_fn;
1071 case BPF_LD | BPF_ABS | BPF_W: /* b0 = *(u32 *) (skb->data+imm) */
1072 case BPF_LD | BPF_IND | BPF_W: /* b0 = *(u32 *) (skb->data+imm+src) */
1073 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
1074 func_addr = __pa(sk_load_word_pos);
1075 else
1076 func_addr = __pa(sk_load_word);
1077 goto call_fn;
1078call_fn:
1079 jit->seen |= SEEN_SKB | SEEN_RET0 | SEEN_FUNC;
1080 REG_SET_SEEN(REG_14); /* Return address of possible func call */
1081
1082 /*
1083 * Implicit input:
1084 * BPF_REG_6 (R7) : skb pointer
1085 * REG_SKB_DATA (R12): skb data pointer
1086 *
1087 * Calculated input:
1088 * BPF_REG_2 (R3) : offset of byte(s) to fetch in skb
1089 * BPF_REG_5 (R6) : return address
1090 *
1091 * Output:
1092 * BPF_REG_0 (R14): data read from skb
1093 *
1094 * Scratch registers (BPF_REG_1-5)
1095 */
1096
1097 /* Call function: llilf %w1,func_addr */
1098 EMIT6_IMM(0xc00f0000, REG_W1, func_addr);
1099
1100 /* Offset: lgfi %b2,imm */
1101 EMIT6_IMM(0xc0010000, BPF_REG_2, imm);
1102 if (BPF_MODE(insn->code) == BPF_IND)
1103 /* agfr %b2,%src (%src is s32 here) */
1104 EMIT4(0xb9180000, BPF_REG_2, src_reg);
1105
1106 /* basr %b5,%w1 (%b5 is call saved) */
1107 EMIT2(0x0d00, BPF_REG_5, REG_W1);
1108
1109 /*
1110 * Note: For fast access we jump directly after the
1111 * jnz instruction from bpf_jit.S
1112 */
1113 /* jnz <ret0> */
1114 EMIT4_PCREL(0xa7740000, jit->ret0_ip - jit->prg);
741 break; 1115 break;
742 default: /* too complex, give up */ 1116 default: /* too complex, give up */
743 goto out; 1117 pr_err("Unknown opcode %02x\n", insn->code);
1118 return -1;
1119 }
1120 return insn_count;
1121}
1122
1123/*
1124 * Compile eBPF program into s390x code
1125 */
1126static int bpf_jit_prog(struct bpf_jit *jit, struct bpf_prog *fp)
1127{
1128 int i, insn_count;
1129
1130 jit->lit = jit->lit_start;
1131 jit->prg = 0;
1132
1133 bpf_jit_prologue(jit);
1134 for (i = 0; i < fp->len; i += insn_count) {
1135 insn_count = bpf_jit_insn(jit, fp, i);
1136 if (insn_count < 0)
1137 return -1;
1138 jit->addrs[i + 1] = jit->prg; /* Next instruction address */
744 } 1139 }
745 addrs[i] = jit->prg - jit->start; 1140 bpf_jit_epilogue(jit);
1141
1142 jit->lit_start = jit->prg;
1143 jit->size = jit->lit;
1144 jit->size_prg = jit->prg;
746 return 0; 1145 return 0;
747out:
748 return -1;
749} 1146}
750 1147
1148/*
1149 * Classic BPF function stub. BPF programs will be converted into
1150 * eBPF and then bpf_int_jit_compile() will be called.
1151 */
751void bpf_jit_compile(struct bpf_prog *fp) 1152void bpf_jit_compile(struct bpf_prog *fp)
752{ 1153{
753 struct bpf_binary_header *header = NULL; 1154}
754 unsigned long size, prg_len, lit_len; 1155
755 struct bpf_jit jit, cjit; 1156/*
756 unsigned int *addrs; 1157 * Compile eBPF program "fp"
757 int pass, i; 1158 */
1159void bpf_int_jit_compile(struct bpf_prog *fp)
1160{
1161 struct bpf_binary_header *header;
1162 struct bpf_jit jit;
1163 int pass;
758 1164
759 if (!bpf_jit_enable) 1165 if (!bpf_jit_enable)
760 return; 1166 return;
761 addrs = kcalloc(fp->len, sizeof(*addrs), GFP_KERNEL); 1167 memset(&jit, 0, sizeof(jit));
762 if (addrs == NULL) 1168 jit.addrs = kcalloc(fp->len + 1, sizeof(*jit.addrs), GFP_KERNEL);
1169 if (jit.addrs == NULL)
763 return; 1170 return;
764 memset(&jit, 0, sizeof(cjit)); 1171 /*
765 memset(&cjit, 0, sizeof(cjit)); 1172 * Three initial passes:
766 1173 * - 1/2: Determine clobbered registers
767 for (pass = 0; pass < 10; pass++) { 1174 * - 3: Calculate program size and addrs arrray
768 jit.prg = jit.start; 1175 */
769 jit.lit = jit.mid; 1176 for (pass = 1; pass <= 3; pass++) {
770 1177 if (bpf_jit_prog(&jit, fp))
771 bpf_jit_prologue(&jit); 1178 goto free_addrs;
772 bpf_jit_noleaks(&jit, fp->insns);
773 for (i = 0; i < fp->len; i++) {
774 if (bpf_jit_insn(&jit, fp->insns + i, addrs, i,
775 i == fp->len - 1))
776 goto out;
777 }
778 bpf_jit_epilogue(&jit);
779 if (jit.start) {
780 WARN_ON(jit.prg > cjit.prg || jit.lit > cjit.lit);
781 if (memcmp(&jit, &cjit, sizeof(jit)) == 0)
782 break;
783 } else if (jit.prg == cjit.prg && jit.lit == cjit.lit) {
784 prg_len = jit.prg - jit.start;
785 lit_len = jit.lit - jit.mid;
786 size = prg_len + lit_len;
787 if (size >= BPF_SIZE_MAX)
788 goto out;
789 header = bpf_jit_binary_alloc(size, &jit.start,
790 2, bpf_jit_fill_hole);
791 if (!header)
792 goto out;
793 jit.prg = jit.mid = jit.start + prg_len;
794 jit.lit = jit.end = jit.start + prg_len + lit_len;
795 jit.base_ip += (unsigned long) jit.start;
796 jit.exit_ip += (unsigned long) jit.start;
797 jit.ret0_ip += (unsigned long) jit.start;
798 }
799 cjit = jit;
800 } 1179 }
1180 /*
1181 * Final pass: Allocate and generate program
1182 */
1183 if (jit.size >= BPF_SIZE_MAX)
1184 goto free_addrs;
1185 header = bpf_jit_binary_alloc(jit.size, &jit.prg_buf, 2, jit_fill_hole);
1186 if (!header)
1187 goto free_addrs;
1188 if (bpf_jit_prog(&jit, fp))
1189 goto free_addrs;
801 if (bpf_jit_enable > 1) { 1190 if (bpf_jit_enable > 1) {
802 bpf_jit_dump(fp->len, jit.end - jit.start, pass, jit.start); 1191 bpf_jit_dump(fp->len, jit.size, pass, jit.prg_buf);
803 if (jit.start) 1192 if (jit.prg_buf)
804 print_fn_code(jit.start, jit.mid - jit.start); 1193 print_fn_code(jit.prg_buf, jit.size_prg);
805 } 1194 }
806 if (jit.start) { 1195 if (jit.prg_buf) {
807 set_memory_ro((unsigned long)header, header->pages); 1196 set_memory_ro((unsigned long)header, header->pages);
808 fp->bpf_func = (void *) jit.start; 1197 fp->bpf_func = (void *) jit.prg_buf;
809 fp->jited = true; 1198 fp->jited = true;
810 } 1199 }
811out: 1200free_addrs:
812 kfree(addrs); 1201 kfree(jit.addrs);
813} 1202}
814 1203
1204/*
1205 * Free eBPF program
1206 */
815void bpf_jit_free(struct bpf_prog *fp) 1207void bpf_jit_free(struct bpf_prog *fp)
816{ 1208{
817 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK; 1209 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c
index 98336200c7b2..598f023cf8a6 100644
--- a/arch/s390/pci/pci.c
+++ b/arch/s390/pci/pci.c
@@ -190,6 +190,11 @@ int zpci_fmb_enable_device(struct zpci_dev *zdev)
190 return -ENOMEM; 190 return -ENOMEM;
191 WARN_ON((u64) zdev->fmb & 0xf); 191 WARN_ON((u64) zdev->fmb & 0xf);
192 192
193 /* reset software counters */
194 atomic64_set(&zdev->allocated_pages, 0);
195 atomic64_set(&zdev->mapped_pages, 0);
196 atomic64_set(&zdev->unmapped_pages, 0);
197
193 args.fmb_addr = virt_to_phys(zdev->fmb); 198 args.fmb_addr = virt_to_phys(zdev->fmb);
194 return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args); 199 return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
195} 200}
@@ -822,6 +827,7 @@ int zpci_create_device(struct zpci_dev *zdev)
822 if (rc) 827 if (rc)
823 goto out; 828 goto out;
824 829
830 mutex_init(&zdev->lock);
825 if (zdev->state == ZPCI_FN_STATE_CONFIGURED) { 831 if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
826 rc = zpci_enable_device(zdev); 832 rc = zpci_enable_device(zdev);
827 if (rc) 833 if (rc)
diff --git a/arch/s390/pci/pci_debug.c b/arch/s390/pci/pci_debug.c
index c22d4402ae45..4129b0a5fd78 100644
--- a/arch/s390/pci/pci_debug.c
+++ b/arch/s390/pci/pci_debug.c
@@ -31,12 +31,25 @@ static char *pci_perf_names[] = {
31 "Refresh operations", 31 "Refresh operations",
32 "DMA read bytes", 32 "DMA read bytes",
33 "DMA write bytes", 33 "DMA write bytes",
34 /* software counters */ 34};
35
36static char *pci_sw_names[] = {
35 "Allocated pages", 37 "Allocated pages",
36 "Mapped pages", 38 "Mapped pages",
37 "Unmapped pages", 39 "Unmapped pages",
38}; 40};
39 41
42static void pci_sw_counter_show(struct seq_file *m)
43{
44 struct zpci_dev *zdev = m->private;
45 atomic64_t *counter = &zdev->allocated_pages;
46 int i;
47
48 for (i = 0; i < ARRAY_SIZE(pci_sw_names); i++, counter++)
49 seq_printf(m, "%26s:\t%llu\n", pci_sw_names[i],
50 atomic64_read(counter));
51}
52
40static int pci_perf_show(struct seq_file *m, void *v) 53static int pci_perf_show(struct seq_file *m, void *v)
41{ 54{
42 struct zpci_dev *zdev = m->private; 55 struct zpci_dev *zdev = m->private;
@@ -45,7 +58,10 @@ static int pci_perf_show(struct seq_file *m, void *v)
45 58
46 if (!zdev) 59 if (!zdev)
47 return 0; 60 return 0;
61
62 mutex_lock(&zdev->lock);
48 if (!zdev->fmb) { 63 if (!zdev->fmb) {
64 mutex_unlock(&zdev->lock);
49 seq_puts(m, "FMB statistics disabled\n"); 65 seq_puts(m, "FMB statistics disabled\n");
50 return 0; 66 return 0;
51 } 67 }
@@ -65,12 +81,9 @@ static int pci_perf_show(struct seq_file *m, void *v)
65 for (i = 4; i < 6; i++) 81 for (i = 4; i < 6; i++)
66 seq_printf(m, "%26s:\t%llu\n", 82 seq_printf(m, "%26s:\t%llu\n",
67 pci_perf_names[i], *(stat + i)); 83 pci_perf_names[i], *(stat + i));
68 /* software counters */
69 for (i = 6; i < ARRAY_SIZE(pci_perf_names); i++)
70 seq_printf(m, "%26s:\t%llu\n",
71 pci_perf_names[i],
72 atomic64_read((atomic64_t *) (stat + i)));
73 84
85 pci_sw_counter_show(m);
86 mutex_unlock(&zdev->lock);
74 return 0; 87 return 0;
75} 88}
76 89
@@ -88,19 +101,17 @@ static ssize_t pci_perf_seq_write(struct file *file, const char __user *ubuf,
88 if (rc) 101 if (rc)
89 return rc; 102 return rc;
90 103
104 mutex_lock(&zdev->lock);
91 switch (val) { 105 switch (val) {
92 case 0: 106 case 0:
93 rc = zpci_fmb_disable_device(zdev); 107 rc = zpci_fmb_disable_device(zdev);
94 if (rc)
95 return rc;
96 break; 108 break;
97 case 1: 109 case 1:
98 rc = zpci_fmb_enable_device(zdev); 110 rc = zpci_fmb_enable_device(zdev);
99 if (rc)
100 return rc;
101 break; 111 break;
102 } 112 }
103 return count; 113 mutex_unlock(&zdev->lock);
114 return rc ? rc : count;
104} 115}
105 116
106static int pci_perf_seq_open(struct inode *inode, struct file *filp) 117static int pci_perf_seq_open(struct inode *inode, struct file *filp)
diff --git a/arch/s390/pci/pci_dma.c b/arch/s390/pci/pci_dma.c
index 4cbb29a4d615..6fd8d5836138 100644
--- a/arch/s390/pci/pci_dma.c
+++ b/arch/s390/pci/pci_dma.c
@@ -300,7 +300,7 @@ static dma_addr_t s390_dma_map_pages(struct device *dev, struct page *page,
300 flags |= ZPCI_TABLE_PROTECTED; 300 flags |= ZPCI_TABLE_PROTECTED;
301 301
302 if (!dma_update_trans(zdev, pa, dma_addr, size, flags)) { 302 if (!dma_update_trans(zdev, pa, dma_addr, size, flags)) {
303 atomic64_add(nr_pages, &zdev->fmb->mapped_pages); 303 atomic64_add(nr_pages, &zdev->mapped_pages);
304 return dma_addr + (offset & ~PAGE_MASK); 304 return dma_addr + (offset & ~PAGE_MASK);
305 } 305 }
306 306
@@ -328,7 +328,7 @@ static void s390_dma_unmap_pages(struct device *dev, dma_addr_t dma_addr,
328 zpci_err_hex(&dma_addr, sizeof(dma_addr)); 328 zpci_err_hex(&dma_addr, sizeof(dma_addr));
329 } 329 }
330 330
331 atomic64_add(npages, &zdev->fmb->unmapped_pages); 331 atomic64_add(npages, &zdev->unmapped_pages);
332 iommu_page_index = (dma_addr - zdev->start_dma) >> PAGE_SHIFT; 332 iommu_page_index = (dma_addr - zdev->start_dma) >> PAGE_SHIFT;
333 dma_free_iommu(zdev, iommu_page_index, npages); 333 dma_free_iommu(zdev, iommu_page_index, npages);
334} 334}
@@ -357,7 +357,7 @@ static void *s390_dma_alloc(struct device *dev, size_t size,
357 return NULL; 357 return NULL;
358 } 358 }
359 359
360 atomic64_add(size / PAGE_SIZE, &zdev->fmb->allocated_pages); 360 atomic64_add(size / PAGE_SIZE, &zdev->allocated_pages);
361 if (dma_handle) 361 if (dma_handle)
362 *dma_handle = map; 362 *dma_handle = map;
363 return (void *) pa; 363 return (void *) pa;
@@ -370,7 +370,7 @@ static void s390_dma_free(struct device *dev, size_t size,
370 struct zpci_dev *zdev = get_zdev(to_pci_dev(dev)); 370 struct zpci_dev *zdev = get_zdev(to_pci_dev(dev));
371 371
372 size = PAGE_ALIGN(size); 372 size = PAGE_ALIGN(size);
373 atomic64_sub(size / PAGE_SIZE, &zdev->fmb->allocated_pages); 373 atomic64_sub(size / PAGE_SIZE, &zdev->allocated_pages);
374 s390_dma_unmap_pages(dev, dma_handle, size, DMA_BIDIRECTIONAL, NULL); 374 s390_dma_unmap_pages(dev, dma_handle, size, DMA_BIDIRECTIONAL, NULL);
375 free_pages((unsigned long) pa, get_order(size)); 375 free_pages((unsigned long) pa, get_order(size));
376} 376}
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h
index b9d9489a5012..9f417feaf6e8 100644
--- a/arch/sh/include/asm/mmu_context.h
+++ b/arch/sh/include/asm/mmu_context.h
@@ -99,7 +99,7 @@ static inline int init_new_context(struct task_struct *tsk,
99{ 99{
100 int i; 100 int i;
101 101
102 for (i = 0; i < num_online_cpus(); i++) 102 for_each_online_cpu(i)
103 cpu_context(i, mm) = NO_CONTEXT; 103 cpu_context(i, mm) = NO_CONTEXT;
104 104
105 return 0; 105 return 0;
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index fc5acfc93c92..de6be008fc01 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -363,7 +363,7 @@ void flush_tlb_mm(struct mm_struct *mm)
363 smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1); 363 smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1);
364 } else { 364 } else {
365 int i; 365 int i;
366 for (i = 0; i < num_online_cpus(); i++) 366 for_each_online_cpu(i)
367 if (smp_processor_id() != i) 367 if (smp_processor_id() != i)
368 cpu_context(i, mm) = 0; 368 cpu_context(i, mm) = 0;
369 } 369 }
@@ -400,7 +400,7 @@ void flush_tlb_range(struct vm_area_struct *vma,
400 smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1); 400 smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1);
401 } else { 401 } else {
402 int i; 402 int i;
403 for (i = 0; i < num_online_cpus(); i++) 403 for_each_online_cpu(i)
404 if (smp_processor_id() != i) 404 if (smp_processor_id() != i)
405 cpu_context(i, mm) = 0; 405 cpu_context(i, mm) = 0;
406 } 406 }
@@ -443,7 +443,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
443 smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1); 443 smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1);
444 } else { 444 } else {
445 int i; 445 int i;
446 for (i = 0; i < num_online_cpus(); i++) 446 for_each_online_cpu(i)
447 if (smp_processor_id() != i) 447 if (smp_processor_id() != i)
448 cpu_context(i, vma->vm_mm) = 0; 448 cpu_context(i, vma->vm_mm) = 0;
449 } 449 }
diff --git a/arch/sparc/kernel/time_32.c b/arch/sparc/kernel/time_32.c
index 18147a5523d9..8caf45ee81d9 100644
--- a/arch/sparc/kernel/time_32.c
+++ b/arch/sparc/kernel/time_32.c
@@ -194,7 +194,7 @@ static __init int setup_timer_cs(void)
194static void percpu_ce_setup(enum clock_event_mode mode, 194static void percpu_ce_setup(enum clock_event_mode mode,
195 struct clock_event_device *evt) 195 struct clock_event_device *evt)
196{ 196{
197 int cpu = __first_cpu(evt->cpumask); 197 int cpu = cpumask_first(evt->cpumask);
198 198
199 switch (mode) { 199 switch (mode) {
200 case CLOCK_EVT_MODE_PERIODIC: 200 case CLOCK_EVT_MODE_PERIODIC:
@@ -214,7 +214,7 @@ static void percpu_ce_setup(enum clock_event_mode mode,
214static int percpu_ce_set_next_event(unsigned long delta, 214static int percpu_ce_set_next_event(unsigned long delta,
215 struct clock_event_device *evt) 215 struct clock_event_device *evt)
216{ 216{
217 int cpu = __first_cpu(evt->cpumask); 217 int cpu = cpumask_first(evt->cpumask);
218 unsigned int next = (unsigned int)delta; 218 unsigned int next = (unsigned int)delta;
219 219
220 sparc_config.load_profile_irq(cpu, next); 220 sparc_config.load_profile_irq(cpu, next);
diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c
index 7833b2ccdfbc..6873f006f7d0 100644
--- a/arch/tile/kernel/setup.c
+++ b/arch/tile/kernel/setup.c
@@ -774,7 +774,7 @@ static void __init zone_sizes_init(void)
774 * though, there'll be no lowmem, so we just alloc_bootmem 774 * though, there'll be no lowmem, so we just alloc_bootmem
775 * the memmap. There will be no percpu memory either. 775 * the memmap. There will be no percpu memory either.
776 */ 776 */
777 if (i != 0 && cpu_isset(i, isolnodes)) { 777 if (i != 0 && cpumask_test_cpu(i, &isolnodes)) {
778 node_memmap_pfn[i] = 778 node_memmap_pfn[i] =
779 alloc_bootmem_pfn(0, memmap_size, 0); 779 alloc_bootmem_pfn(0, memmap_size, 0);
780 BUG_ON(node_percpu[i] != 0); 780 BUG_ON(node_percpu[i] != 0);
diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c
index d9d0bd2faaf4..ab3219b3fbda 100644
--- a/arch/x86/kernel/apic/x2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -171,8 +171,8 @@ update_clusterinfo(struct notifier_block *nfb, unsigned long action, void *hcpu)
171 for_each_online_cpu(cpu) { 171 for_each_online_cpu(cpu) {
172 if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu)) 172 if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))
173 continue; 173 continue;
174 __cpu_clear(this_cpu, per_cpu(cpus_in_cluster, cpu)); 174 cpumask_clear_cpu(this_cpu, per_cpu(cpus_in_cluster, cpu));
175 __cpu_clear(cpu, per_cpu(cpus_in_cluster, this_cpu)); 175 cpumask_clear_cpu(cpu, per_cpu(cpus_in_cluster, this_cpu));
176 } 176 }
177 free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu)); 177 free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu));
178 free_cpumask_var(per_cpu(ipi_mask, this_cpu)); 178 free_cpumask_var(per_cpu(ipi_mask, this_cpu));
diff --git a/drivers/clocksource/dw_apb_timer.c b/drivers/clocksource/dw_apb_timer.c
index f3656a6b0382..35a88097af3c 100644
--- a/drivers/clocksource/dw_apb_timer.c
+++ b/drivers/clocksource/dw_apb_timer.c
@@ -117,7 +117,8 @@ static void apbt_set_mode(enum clock_event_mode mode,
117 unsigned long period; 117 unsigned long period;
118 struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt); 118 struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt);
119 119
120 pr_debug("%s CPU %d mode=%d\n", __func__, first_cpu(*evt->cpumask), 120 pr_debug("%s CPU %d mode=%d\n", __func__,
121 cpumask_first(evt->cpumask),
121 mode); 122 mode);
122 123
123 switch (mode) { 124 switch (mode) {
diff --git a/drivers/cpuidle/coupled.c b/drivers/cpuidle/coupled.c
index 73fe2f8d7f96..7936dce4b878 100644
--- a/drivers/cpuidle/coupled.c
+++ b/drivers/cpuidle/coupled.c
@@ -292,7 +292,7 @@ static inline int cpuidle_coupled_get_state(struct cpuidle_device *dev,
292 */ 292 */
293 smp_rmb(); 293 smp_rmb();
294 294
295 for_each_cpu_mask(i, coupled->coupled_cpus) 295 for_each_cpu(i, &coupled->coupled_cpus)
296 if (cpu_online(i) && coupled->requested_state[i] < state) 296 if (cpu_online(i) && coupled->requested_state[i] < state)
297 state = coupled->requested_state[i]; 297 state = coupled->requested_state[i];
298 298
@@ -338,7 +338,7 @@ static void cpuidle_coupled_poke_others(int this_cpu,
338{ 338{
339 int cpu; 339 int cpu;
340 340
341 for_each_cpu_mask(cpu, coupled->coupled_cpus) 341 for_each_cpu(cpu, &coupled->coupled_cpus)
342 if (cpu != this_cpu && cpu_online(cpu)) 342 if (cpu != this_cpu && cpu_online(cpu))
343 cpuidle_coupled_poke(cpu); 343 cpuidle_coupled_poke(cpu);
344} 344}
@@ -638,7 +638,7 @@ int cpuidle_coupled_register_device(struct cpuidle_device *dev)
638 if (cpumask_empty(&dev->coupled_cpus)) 638 if (cpumask_empty(&dev->coupled_cpus))
639 return 0; 639 return 0;
640 640
641 for_each_cpu_mask(cpu, dev->coupled_cpus) { 641 for_each_cpu(cpu, &dev->coupled_cpus) {
642 other_dev = per_cpu(cpuidle_devices, cpu); 642 other_dev = per_cpu(cpuidle_devices, cpu);
643 if (other_dev && other_dev->coupled) { 643 if (other_dev && other_dev->coupled) {
644 coupled = other_dev->coupled; 644 coupled = other_dev->coupled;
diff --git a/drivers/crypto/n2_core.c b/drivers/crypto/n2_core.c
index afd136b45f49..10a9aeff1666 100644
--- a/drivers/crypto/n2_core.c
+++ b/drivers/crypto/n2_core.c
@@ -1754,7 +1754,7 @@ static int spu_mdesc_walk_arcs(struct mdesc_handle *mdesc,
1754 dev->dev.of_node->full_name); 1754 dev->dev.of_node->full_name);
1755 return -EINVAL; 1755 return -EINVAL;
1756 } 1756 }
1757 cpu_set(*id, p->sharing); 1757 cpumask_set_cpu(*id, &p->sharing);
1758 table[*id] = p; 1758 table[*id] = p;
1759 } 1759 }
1760 return 0; 1760 return 0;
@@ -1776,7 +1776,7 @@ static int handle_exec_unit(struct spu_mdesc_info *ip, struct list_head *list,
1776 return -ENOMEM; 1776 return -ENOMEM;
1777 } 1777 }
1778 1778
1779 cpus_clear(p->sharing); 1779 cpumask_clear(&p->sharing);
1780 spin_lock_init(&p->lock); 1780 spin_lock_init(&p->lock);
1781 p->q_type = q_type; 1781 p->q_type = q_type;
1782 INIT_LIST_HEAD(&p->jobs); 1782 INIT_LIST_HEAD(&p->jobs);
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 48882c126245..e43d48956dea 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -33,6 +33,7 @@
33#include <linux/export.h> 33#include <linux/export.h>
34#include <linux/irq.h> 34#include <linux/irq.h>
35#include <linux/msi.h> 35#include <linux/msi.h>
36#include <linux/dma-contiguous.h>
36#include <asm/irq_remapping.h> 37#include <asm/irq_remapping.h>
37#include <asm/io_apic.h> 38#include <asm/io_apic.h>
38#include <asm/apic.h> 39#include <asm/apic.h>
@@ -126,6 +127,11 @@ static int __init alloc_passthrough_domain(void);
126 * 127 *
127 ****************************************************************************/ 128 ****************************************************************************/
128 129
130static struct protection_domain *to_pdomain(struct iommu_domain *dom)
131{
132 return container_of(dom, struct protection_domain, domain);
133}
134
129static struct iommu_dev_data *alloc_dev_data(u16 devid) 135static struct iommu_dev_data *alloc_dev_data(u16 devid)
130{ 136{
131 struct iommu_dev_data *dev_data; 137 struct iommu_dev_data *dev_data;
@@ -1321,7 +1327,9 @@ static u64 *alloc_pte(struct protection_domain *domain,
1321 * This function checks if there is a PTE for a given dma address. If 1327 * This function checks if there is a PTE for a given dma address. If
1322 * there is one, it returns the pointer to it. 1328 * there is one, it returns the pointer to it.
1323 */ 1329 */
1324static u64 *fetch_pte(struct protection_domain *domain, unsigned long address) 1330static u64 *fetch_pte(struct protection_domain *domain,
1331 unsigned long address,
1332 unsigned long *page_size)
1325{ 1333{
1326 int level; 1334 int level;
1327 u64 *pte; 1335 u64 *pte;
@@ -1329,8 +1337,9 @@ static u64 *fetch_pte(struct protection_domain *domain, unsigned long address)
1329 if (address > PM_LEVEL_SIZE(domain->mode)) 1337 if (address > PM_LEVEL_SIZE(domain->mode))
1330 return NULL; 1338 return NULL;
1331 1339
1332 level = domain->mode - 1; 1340 level = domain->mode - 1;
1333 pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; 1341 pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
1342 *page_size = PTE_LEVEL_PAGE_SIZE(level);
1334 1343
1335 while (level > 0) { 1344 while (level > 0) {
1336 1345
@@ -1339,19 +1348,9 @@ static u64 *fetch_pte(struct protection_domain *domain, unsigned long address)
1339 return NULL; 1348 return NULL;
1340 1349
1341 /* Large PTE */ 1350 /* Large PTE */
1342 if (PM_PTE_LEVEL(*pte) == 0x07) { 1351 if (PM_PTE_LEVEL(*pte) == 7 ||
1343 unsigned long pte_mask, __pte; 1352 PM_PTE_LEVEL(*pte) == 0)
1344 1353 break;
1345 /*
1346 * If we have a series of large PTEs, make
1347 * sure to return a pointer to the first one.
1348 */
1349 pte_mask = PTE_PAGE_SIZE(*pte);
1350 pte_mask = ~((PAGE_SIZE_PTE_COUNT(pte_mask) << 3) - 1);
1351 __pte = ((unsigned long)pte) & pte_mask;
1352
1353 return (u64 *)__pte;
1354 }
1355 1354
1356 /* No level skipping support yet */ 1355 /* No level skipping support yet */
1357 if (PM_PTE_LEVEL(*pte) != level) 1356 if (PM_PTE_LEVEL(*pte) != level)
@@ -1360,8 +1359,21 @@ static u64 *fetch_pte(struct protection_domain *domain, unsigned long address)
1360 level -= 1; 1359 level -= 1;
1361 1360
1362 /* Walk to the next level */ 1361 /* Walk to the next level */
1363 pte = IOMMU_PTE_PAGE(*pte); 1362 pte = IOMMU_PTE_PAGE(*pte);
1364 pte = &pte[PM_LEVEL_INDEX(level, address)]; 1363 pte = &pte[PM_LEVEL_INDEX(level, address)];
1364 *page_size = PTE_LEVEL_PAGE_SIZE(level);
1365 }
1366
1367 if (PM_PTE_LEVEL(*pte) == 0x07) {
1368 unsigned long pte_mask;
1369
1370 /*
1371 * If we have a series of large PTEs, make
1372 * sure to return a pointer to the first one.
1373 */
1374 *page_size = pte_mask = PTE_PAGE_SIZE(*pte);
1375 pte_mask = ~((PAGE_SIZE_PTE_COUNT(pte_mask) << 3) - 1);
1376 pte = (u64 *)(((unsigned long)pte) & pte_mask);
1365 } 1377 }
1366 1378
1367 return pte; 1379 return pte;
@@ -1383,13 +1395,14 @@ static int iommu_map_page(struct protection_domain *dom,
1383 u64 __pte, *pte; 1395 u64 __pte, *pte;
1384 int i, count; 1396 int i, count;
1385 1397
1398 BUG_ON(!IS_ALIGNED(bus_addr, page_size));
1399 BUG_ON(!IS_ALIGNED(phys_addr, page_size));
1400
1386 if (!(prot & IOMMU_PROT_MASK)) 1401 if (!(prot & IOMMU_PROT_MASK))
1387 return -EINVAL; 1402 return -EINVAL;
1388 1403
1389 bus_addr = PAGE_ALIGN(bus_addr); 1404 count = PAGE_SIZE_PTE_COUNT(page_size);
1390 phys_addr = PAGE_ALIGN(phys_addr); 1405 pte = alloc_pte(dom, bus_addr, page_size, NULL, GFP_KERNEL);
1391 count = PAGE_SIZE_PTE_COUNT(page_size);
1392 pte = alloc_pte(dom, bus_addr, page_size, NULL, GFP_KERNEL);
1393 1406
1394 if (!pte) 1407 if (!pte)
1395 return -ENOMEM; 1408 return -ENOMEM;
@@ -1398,7 +1411,7 @@ static int iommu_map_page(struct protection_domain *dom,
1398 if (IOMMU_PTE_PRESENT(pte[i])) 1411 if (IOMMU_PTE_PRESENT(pte[i]))
1399 return -EBUSY; 1412 return -EBUSY;
1400 1413
1401 if (page_size > PAGE_SIZE) { 1414 if (count > 1) {
1402 __pte = PAGE_SIZE_PTE(phys_addr, page_size); 1415 __pte = PAGE_SIZE_PTE(phys_addr, page_size);
1403 __pte |= PM_LEVEL_ENC(7) | IOMMU_PTE_P | IOMMU_PTE_FC; 1416 __pte |= PM_LEVEL_ENC(7) | IOMMU_PTE_P | IOMMU_PTE_FC;
1404 } else 1417 } else
@@ -1421,7 +1434,8 @@ static unsigned long iommu_unmap_page(struct protection_domain *dom,
1421 unsigned long bus_addr, 1434 unsigned long bus_addr,
1422 unsigned long page_size) 1435 unsigned long page_size)
1423{ 1436{
1424 unsigned long long unmap_size, unmapped; 1437 unsigned long long unmapped;
1438 unsigned long unmap_size;
1425 u64 *pte; 1439 u64 *pte;
1426 1440
1427 BUG_ON(!is_power_of_2(page_size)); 1441 BUG_ON(!is_power_of_2(page_size));
@@ -1430,28 +1444,12 @@ static unsigned long iommu_unmap_page(struct protection_domain *dom,
1430 1444
1431 while (unmapped < page_size) { 1445 while (unmapped < page_size) {
1432 1446
1433 pte = fetch_pte(dom, bus_addr); 1447 pte = fetch_pte(dom, bus_addr, &unmap_size);
1434 1448
1435 if (!pte) { 1449 if (pte) {
1436 /* 1450 int i, count;
1437 * No PTE for this address 1451
1438 * move forward in 4kb steps 1452 count = PAGE_SIZE_PTE_COUNT(unmap_size);
1439 */
1440 unmap_size = PAGE_SIZE;
1441 } else if (PM_PTE_LEVEL(*pte) == 0) {
1442 /* 4kb PTE found for this address */
1443 unmap_size = PAGE_SIZE;
1444 *pte = 0ULL;
1445 } else {
1446 int count, i;
1447
1448 /* Large PTE found which maps this address */
1449 unmap_size = PTE_PAGE_SIZE(*pte);
1450
1451 /* Only unmap from the first pte in the page */
1452 if ((unmap_size - 1) & bus_addr)
1453 break;
1454 count = PAGE_SIZE_PTE_COUNT(unmap_size);
1455 for (i = 0; i < count; i++) 1453 for (i = 0; i < count; i++)
1456 pte[i] = 0ULL; 1454 pte[i] = 0ULL;
1457 } 1455 }
@@ -1599,7 +1597,7 @@ static int alloc_new_range(struct dma_ops_domain *dma_dom,
1599{ 1597{
1600 int index = dma_dom->aperture_size >> APERTURE_RANGE_SHIFT; 1598 int index = dma_dom->aperture_size >> APERTURE_RANGE_SHIFT;
1601 struct amd_iommu *iommu; 1599 struct amd_iommu *iommu;
1602 unsigned long i, old_size; 1600 unsigned long i, old_size, pte_pgsize;
1603 1601
1604#ifdef CONFIG_IOMMU_STRESS 1602#ifdef CONFIG_IOMMU_STRESS
1605 populate = false; 1603 populate = false;
@@ -1672,12 +1670,13 @@ static int alloc_new_range(struct dma_ops_domain *dma_dom,
1672 */ 1670 */
1673 for (i = dma_dom->aperture[index]->offset; 1671 for (i = dma_dom->aperture[index]->offset;
1674 i < dma_dom->aperture_size; 1672 i < dma_dom->aperture_size;
1675 i += PAGE_SIZE) { 1673 i += pte_pgsize) {
1676 u64 *pte = fetch_pte(&dma_dom->domain, i); 1674 u64 *pte = fetch_pte(&dma_dom->domain, i, &pte_pgsize);
1677 if (!pte || !IOMMU_PTE_PRESENT(*pte)) 1675 if (!pte || !IOMMU_PTE_PRESENT(*pte))
1678 continue; 1676 continue;
1679 1677
1680 dma_ops_reserve_addresses(dma_dom, i >> PAGE_SHIFT, 1); 1678 dma_ops_reserve_addresses(dma_dom, i >> PAGE_SHIFT,
1679 pte_pgsize >> 12);
1681 } 1680 }
1682 1681
1683 update_domain(&dma_dom->domain); 1682 update_domain(&dma_dom->domain);
@@ -2422,16 +2421,6 @@ static int device_change_notifier(struct notifier_block *nb,
2422 dev_data = get_dev_data(dev); 2421 dev_data = get_dev_data(dev);
2423 2422
2424 switch (action) { 2423 switch (action) {
2425 case BUS_NOTIFY_UNBOUND_DRIVER:
2426
2427 domain = domain_for_device(dev);
2428
2429 if (!domain)
2430 goto out;
2431 if (dev_data->passthrough)
2432 break;
2433 detach_device(dev);
2434 break;
2435 case BUS_NOTIFY_ADD_DEVICE: 2424 case BUS_NOTIFY_ADD_DEVICE:
2436 2425
2437 iommu_init_device(dev); 2426 iommu_init_device(dev);
@@ -2467,7 +2456,7 @@ static int device_change_notifier(struct notifier_block *nb,
2467 dev->archdata.dma_ops = &amd_iommu_dma_ops; 2456 dev->archdata.dma_ops = &amd_iommu_dma_ops;
2468 2457
2469 break; 2458 break;
2470 case BUS_NOTIFY_DEL_DEVICE: 2459 case BUS_NOTIFY_REMOVED_DEVICE:
2471 2460
2472 iommu_uninit_device(dev); 2461 iommu_uninit_device(dev);
2473 2462
@@ -2923,38 +2912,42 @@ static void *alloc_coherent(struct device *dev, size_t size,
2923 dma_addr_t *dma_addr, gfp_t flag, 2912 dma_addr_t *dma_addr, gfp_t flag,
2924 struct dma_attrs *attrs) 2913 struct dma_attrs *attrs)
2925{ 2914{
2926 unsigned long flags;
2927 void *virt_addr;
2928 struct protection_domain *domain;
2929 phys_addr_t paddr;
2930 u64 dma_mask = dev->coherent_dma_mask; 2915 u64 dma_mask = dev->coherent_dma_mask;
2916 struct protection_domain *domain;
2917 unsigned long flags;
2918 struct page *page;
2931 2919
2932 INC_STATS_COUNTER(cnt_alloc_coherent); 2920 INC_STATS_COUNTER(cnt_alloc_coherent);
2933 2921
2934 domain = get_domain(dev); 2922 domain = get_domain(dev);
2935 if (PTR_ERR(domain) == -EINVAL) { 2923 if (PTR_ERR(domain) == -EINVAL) {
2936 virt_addr = (void *)__get_free_pages(flag, get_order(size)); 2924 page = alloc_pages(flag, get_order(size));
2937 *dma_addr = __pa(virt_addr); 2925 *dma_addr = page_to_phys(page);
2938 return virt_addr; 2926 return page_address(page);
2939 } else if (IS_ERR(domain)) 2927 } else if (IS_ERR(domain))
2940 return NULL; 2928 return NULL;
2941 2929
2930 size = PAGE_ALIGN(size);
2942 dma_mask = dev->coherent_dma_mask; 2931 dma_mask = dev->coherent_dma_mask;
2943 flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32); 2932 flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
2944 flag |= __GFP_ZERO;
2945 2933
2946 virt_addr = (void *)__get_free_pages(flag, get_order(size)); 2934 page = alloc_pages(flag | __GFP_NOWARN, get_order(size));
2947 if (!virt_addr) 2935 if (!page) {
2948 return NULL; 2936 if (!(flag & __GFP_WAIT))
2937 return NULL;
2949 2938
2950 paddr = virt_to_phys(virt_addr); 2939 page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT,
2940 get_order(size));
2941 if (!page)
2942 return NULL;
2943 }
2951 2944
2952 if (!dma_mask) 2945 if (!dma_mask)
2953 dma_mask = *dev->dma_mask; 2946 dma_mask = *dev->dma_mask;
2954 2947
2955 spin_lock_irqsave(&domain->lock, flags); 2948 spin_lock_irqsave(&domain->lock, flags);
2956 2949
2957 *dma_addr = __map_single(dev, domain->priv, paddr, 2950 *dma_addr = __map_single(dev, domain->priv, page_to_phys(page),
2958 size, DMA_BIDIRECTIONAL, true, dma_mask); 2951 size, DMA_BIDIRECTIONAL, true, dma_mask);
2959 2952
2960 if (*dma_addr == DMA_ERROR_CODE) { 2953 if (*dma_addr == DMA_ERROR_CODE) {
@@ -2966,11 +2959,12 @@ static void *alloc_coherent(struct device *dev, size_t size,
2966 2959
2967 spin_unlock_irqrestore(&domain->lock, flags); 2960 spin_unlock_irqrestore(&domain->lock, flags);
2968 2961
2969 return virt_addr; 2962 return page_address(page);
2970 2963
2971out_free: 2964out_free:
2972 2965
2973 free_pages((unsigned long)virt_addr, get_order(size)); 2966 if (!dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT))
2967 __free_pages(page, get_order(size));
2974 2968
2975 return NULL; 2969 return NULL;
2976} 2970}
@@ -2982,11 +2976,15 @@ static void free_coherent(struct device *dev, size_t size,
2982 void *virt_addr, dma_addr_t dma_addr, 2976 void *virt_addr, dma_addr_t dma_addr,
2983 struct dma_attrs *attrs) 2977 struct dma_attrs *attrs)
2984{ 2978{
2985 unsigned long flags;
2986 struct protection_domain *domain; 2979 struct protection_domain *domain;
2980 unsigned long flags;
2981 struct page *page;
2987 2982
2988 INC_STATS_COUNTER(cnt_free_coherent); 2983 INC_STATS_COUNTER(cnt_free_coherent);
2989 2984
2985 page = virt_to_page(virt_addr);
2986 size = PAGE_ALIGN(size);
2987
2990 domain = get_domain(dev); 2988 domain = get_domain(dev);
2991 if (IS_ERR(domain)) 2989 if (IS_ERR(domain))
2992 goto free_mem; 2990 goto free_mem;
@@ -3000,7 +2998,8 @@ static void free_coherent(struct device *dev, size_t size,
3000 spin_unlock_irqrestore(&domain->lock, flags); 2998 spin_unlock_irqrestore(&domain->lock, flags);
3001 2999
3002free_mem: 3000free_mem:
3003 free_pages((unsigned long)virt_addr, get_order(size)); 3001 if (!dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT))
3002 __free_pages(page, get_order(size));
3004} 3003}
3005 3004
3006/* 3005/*
@@ -3236,42 +3235,45 @@ static int __init alloc_passthrough_domain(void)
3236 3235
3237 return 0; 3236 return 0;
3238} 3237}
3239static int amd_iommu_domain_init(struct iommu_domain *dom) 3238
3239static struct iommu_domain *amd_iommu_domain_alloc(unsigned type)
3240{ 3240{
3241 struct protection_domain *domain; 3241 struct protection_domain *pdomain;
3242 3242
3243 domain = protection_domain_alloc(); 3243 /* We only support unmanaged domains for now */
3244 if (!domain) 3244 if (type != IOMMU_DOMAIN_UNMANAGED)
3245 goto out_free; 3245 return NULL;
3246 3246
3247 domain->mode = PAGE_MODE_3_LEVEL; 3247 pdomain = protection_domain_alloc();
3248 domain->pt_root = (void *)get_zeroed_page(GFP_KERNEL); 3248 if (!pdomain)
3249 if (!domain->pt_root)
3250 goto out_free; 3249 goto out_free;
3251 3250
3252 domain->iommu_domain = dom; 3251 pdomain->mode = PAGE_MODE_3_LEVEL;
3253 3252 pdomain->pt_root = (void *)get_zeroed_page(GFP_KERNEL);
3254 dom->priv = domain; 3253 if (!pdomain->pt_root)
3254 goto out_free;
3255 3255
3256 dom->geometry.aperture_start = 0; 3256 pdomain->domain.geometry.aperture_start = 0;
3257 dom->geometry.aperture_end = ~0ULL; 3257 pdomain->domain.geometry.aperture_end = ~0ULL;
3258 dom->geometry.force_aperture = true; 3258 pdomain->domain.geometry.force_aperture = true;
3259 3259
3260 return 0; 3260 return &pdomain->domain;
3261 3261
3262out_free: 3262out_free:
3263 protection_domain_free(domain); 3263 protection_domain_free(pdomain);
3264 3264
3265 return -ENOMEM; 3265 return NULL;
3266} 3266}
3267 3267
3268static void amd_iommu_domain_destroy(struct iommu_domain *dom) 3268static void amd_iommu_domain_free(struct iommu_domain *dom)
3269{ 3269{
3270 struct protection_domain *domain = dom->priv; 3270 struct protection_domain *domain;
3271 3271
3272 if (!domain) 3272 if (!dom)
3273 return; 3273 return;
3274 3274
3275 domain = to_pdomain(dom);
3276
3275 if (domain->dev_cnt > 0) 3277 if (domain->dev_cnt > 0)
3276 cleanup_domain(domain); 3278 cleanup_domain(domain);
3277 3279
@@ -3284,8 +3286,6 @@ static void amd_iommu_domain_destroy(struct iommu_domain *dom)
3284 free_gcr3_table(domain); 3286 free_gcr3_table(domain);
3285 3287
3286 protection_domain_free(domain); 3288 protection_domain_free(domain);
3287
3288 dom->priv = NULL;
3289} 3289}
3290 3290
3291static void amd_iommu_detach_device(struct iommu_domain *dom, 3291static void amd_iommu_detach_device(struct iommu_domain *dom,
@@ -3313,7 +3313,7 @@ static void amd_iommu_detach_device(struct iommu_domain *dom,
3313static int amd_iommu_attach_device(struct iommu_domain *dom, 3313static int amd_iommu_attach_device(struct iommu_domain *dom,
3314 struct device *dev) 3314 struct device *dev)
3315{ 3315{
3316 struct protection_domain *domain = dom->priv; 3316 struct protection_domain *domain = to_pdomain(dom);
3317 struct iommu_dev_data *dev_data; 3317 struct iommu_dev_data *dev_data;
3318 struct amd_iommu *iommu; 3318 struct amd_iommu *iommu;
3319 int ret; 3319 int ret;
@@ -3340,7 +3340,7 @@ static int amd_iommu_attach_device(struct iommu_domain *dom,
3340static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova, 3340static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova,
3341 phys_addr_t paddr, size_t page_size, int iommu_prot) 3341 phys_addr_t paddr, size_t page_size, int iommu_prot)
3342{ 3342{
3343 struct protection_domain *domain = dom->priv; 3343 struct protection_domain *domain = to_pdomain(dom);
3344 int prot = 0; 3344 int prot = 0;
3345 int ret; 3345 int ret;
3346 3346
@@ -3362,7 +3362,7 @@ static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova,
3362static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova, 3362static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova,
3363 size_t page_size) 3363 size_t page_size)
3364{ 3364{
3365 struct protection_domain *domain = dom->priv; 3365 struct protection_domain *domain = to_pdomain(dom);
3366 size_t unmap_size; 3366 size_t unmap_size;
3367 3367
3368 if (domain->mode == PAGE_MODE_NONE) 3368 if (domain->mode == PAGE_MODE_NONE)
@@ -3380,28 +3380,22 @@ static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova,
3380static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, 3380static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom,
3381 dma_addr_t iova) 3381 dma_addr_t iova)
3382{ 3382{
3383 struct protection_domain *domain = dom->priv; 3383 struct protection_domain *domain = to_pdomain(dom);
3384 unsigned long offset_mask; 3384 unsigned long offset_mask, pte_pgsize;
3385 phys_addr_t paddr;
3386 u64 *pte, __pte; 3385 u64 *pte, __pte;
3387 3386
3388 if (domain->mode == PAGE_MODE_NONE) 3387 if (domain->mode == PAGE_MODE_NONE)
3389 return iova; 3388 return iova;
3390 3389
3391 pte = fetch_pte(domain, iova); 3390 pte = fetch_pte(domain, iova, &pte_pgsize);
3392 3391
3393 if (!pte || !IOMMU_PTE_PRESENT(*pte)) 3392 if (!pte || !IOMMU_PTE_PRESENT(*pte))
3394 return 0; 3393 return 0;
3395 3394
3396 if (PM_PTE_LEVEL(*pte) == 0) 3395 offset_mask = pte_pgsize - 1;
3397 offset_mask = PAGE_SIZE - 1; 3396 __pte = *pte & PM_ADDR_MASK;
3398 else
3399 offset_mask = PTE_PAGE_SIZE(*pte) - 1;
3400
3401 __pte = *pte & PM_ADDR_MASK;
3402 paddr = (__pte & ~offset_mask) | (iova & offset_mask);
3403 3397
3404 return paddr; 3398 return (__pte & ~offset_mask) | (iova & offset_mask);
3405} 3399}
3406 3400
3407static bool amd_iommu_capable(enum iommu_cap cap) 3401static bool amd_iommu_capable(enum iommu_cap cap)
@@ -3420,8 +3414,8 @@ static bool amd_iommu_capable(enum iommu_cap cap)
3420 3414
3421static const struct iommu_ops amd_iommu_ops = { 3415static const struct iommu_ops amd_iommu_ops = {
3422 .capable = amd_iommu_capable, 3416 .capable = amd_iommu_capable,
3423 .domain_init = amd_iommu_domain_init, 3417 .domain_alloc = amd_iommu_domain_alloc,
3424 .domain_destroy = amd_iommu_domain_destroy, 3418 .domain_free = amd_iommu_domain_free,
3425 .attach_dev = amd_iommu_attach_device, 3419 .attach_dev = amd_iommu_attach_device,
3426 .detach_dev = amd_iommu_detach_device, 3420 .detach_dev = amd_iommu_detach_device,
3427 .map = amd_iommu_map, 3421 .map = amd_iommu_map,
@@ -3483,7 +3477,7 @@ EXPORT_SYMBOL(amd_iommu_unregister_ppr_notifier);
3483 3477
3484void amd_iommu_domain_direct_map(struct iommu_domain *dom) 3478void amd_iommu_domain_direct_map(struct iommu_domain *dom)
3485{ 3479{
3486 struct protection_domain *domain = dom->priv; 3480 struct protection_domain *domain = to_pdomain(dom);
3487 unsigned long flags; 3481 unsigned long flags;
3488 3482
3489 spin_lock_irqsave(&domain->lock, flags); 3483 spin_lock_irqsave(&domain->lock, flags);
@@ -3504,7 +3498,7 @@ EXPORT_SYMBOL(amd_iommu_domain_direct_map);
3504 3498
3505int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids) 3499int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids)
3506{ 3500{
3507 struct protection_domain *domain = dom->priv; 3501 struct protection_domain *domain = to_pdomain(dom);
3508 unsigned long flags; 3502 unsigned long flags;
3509 int levels, ret; 3503 int levels, ret;
3510 3504
@@ -3616,7 +3610,7 @@ static int __amd_iommu_flush_page(struct protection_domain *domain, int pasid,
3616int amd_iommu_flush_page(struct iommu_domain *dom, int pasid, 3610int amd_iommu_flush_page(struct iommu_domain *dom, int pasid,
3617 u64 address) 3611 u64 address)
3618{ 3612{
3619 struct protection_domain *domain = dom->priv; 3613 struct protection_domain *domain = to_pdomain(dom);
3620 unsigned long flags; 3614 unsigned long flags;
3621 int ret; 3615 int ret;
3622 3616
@@ -3638,7 +3632,7 @@ static int __amd_iommu_flush_tlb(struct protection_domain *domain, int pasid)
3638 3632
3639int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid) 3633int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid)
3640{ 3634{
3641 struct protection_domain *domain = dom->priv; 3635 struct protection_domain *domain = to_pdomain(dom);
3642 unsigned long flags; 3636 unsigned long flags;
3643 int ret; 3637 int ret;
3644 3638
@@ -3718,7 +3712,7 @@ static int __clear_gcr3(struct protection_domain *domain, int pasid)
3718int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid, 3712int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid,
3719 unsigned long cr3) 3713 unsigned long cr3)
3720{ 3714{
3721 struct protection_domain *domain = dom->priv; 3715 struct protection_domain *domain = to_pdomain(dom);
3722 unsigned long flags; 3716 unsigned long flags;
3723 int ret; 3717 int ret;
3724 3718
@@ -3732,7 +3726,7 @@ EXPORT_SYMBOL(amd_iommu_domain_set_gcr3);
3732 3726
3733int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid) 3727int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid)
3734{ 3728{
3735 struct protection_domain *domain = dom->priv; 3729 struct protection_domain *domain = to_pdomain(dom);
3736 unsigned long flags; 3730 unsigned long flags;
3737 int ret; 3731 int ret;
3738 3732
@@ -3765,17 +3759,17 @@ EXPORT_SYMBOL(amd_iommu_complete_ppr);
3765 3759
3766struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev) 3760struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev)
3767{ 3761{
3768 struct protection_domain *domain; 3762 struct protection_domain *pdomain;
3769 3763
3770 domain = get_domain(&pdev->dev); 3764 pdomain = get_domain(&pdev->dev);
3771 if (IS_ERR(domain)) 3765 if (IS_ERR(pdomain))
3772 return NULL; 3766 return NULL;
3773 3767
3774 /* Only return IOMMUv2 domains */ 3768 /* Only return IOMMUv2 domains */
3775 if (!(domain->flags & PD_IOMMUV2_MASK)) 3769 if (!(pdomain->flags & PD_IOMMUV2_MASK))
3776 return NULL; 3770 return NULL;
3777 3771
3778 return domain->iommu_domain; 3772 return &pdomain->domain;
3779} 3773}
3780EXPORT_SYMBOL(amd_iommu_get_v2_domain); 3774EXPORT_SYMBOL(amd_iommu_get_v2_domain);
3781 3775
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
index c4fffb710c58..05030e523771 100644
--- a/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@ -282,6 +282,12 @@
282#define PTE_PAGE_SIZE(pte) \ 282#define PTE_PAGE_SIZE(pte) \
283 (1ULL << (1 + ffz(((pte) | 0xfffULL)))) 283 (1ULL << (1 + ffz(((pte) | 0xfffULL))))
284 284
285/*
286 * Takes a page-table level and returns the default page-size for this level
287 */
288#define PTE_LEVEL_PAGE_SIZE(level) \
289 (1ULL << (12 + (9 * (level))))
290
285#define IOMMU_PTE_P (1ULL << 0) 291#define IOMMU_PTE_P (1ULL << 0)
286#define IOMMU_PTE_TV (1ULL << 1) 292#define IOMMU_PTE_TV (1ULL << 1)
287#define IOMMU_PTE_U (1ULL << 59) 293#define IOMMU_PTE_U (1ULL << 59)
@@ -400,6 +406,8 @@ struct iommu_domain;
400struct protection_domain { 406struct protection_domain {
401 struct list_head list; /* for list of all protection domains */ 407 struct list_head list; /* for list of all protection domains */
402 struct list_head dev_list; /* List of all devices in this domain */ 408 struct list_head dev_list; /* List of all devices in this domain */
409 struct iommu_domain domain; /* generic domain handle used by
410 iommu core code */
403 spinlock_t lock; /* mostly used to lock the page table*/ 411 spinlock_t lock; /* mostly used to lock the page table*/
404 struct mutex api_lock; /* protect page tables in the iommu-api path */ 412 struct mutex api_lock; /* protect page tables in the iommu-api path */
405 u16 id; /* the domain id written to the device table */ 413 u16 id; /* the domain id written to the device table */
@@ -411,10 +419,7 @@ struct protection_domain {
411 bool updated; /* complete domain flush required */ 419 bool updated; /* complete domain flush required */
412 unsigned dev_cnt; /* devices assigned to this domain */ 420 unsigned dev_cnt; /* devices assigned to this domain */
413 unsigned dev_iommu[MAX_IOMMUS]; /* per-IOMMU reference count */ 421 unsigned dev_iommu[MAX_IOMMUS]; /* per-IOMMU reference count */
414 void *priv; /* private data */ 422 void *priv; /* private data */
415 struct iommu_domain *iommu_domain; /* Pointer to generic
416 domain structure */
417
418}; 423};
419 424
420/* 425/*
diff --git a/drivers/iommu/amd_iommu_v2.c b/drivers/iommu/amd_iommu_v2.c
index 6d5a5c44453b..a1cbba9056fd 100644
--- a/drivers/iommu/amd_iommu_v2.c
+++ b/drivers/iommu/amd_iommu_v2.c
@@ -417,7 +417,7 @@ static void mn_release(struct mmu_notifier *mn, struct mm_struct *mm)
417 dev_state = pasid_state->device_state; 417 dev_state = pasid_state->device_state;
418 run_inv_ctx_cb = !pasid_state->invalid; 418 run_inv_ctx_cb = !pasid_state->invalid;
419 419
420 if (run_inv_ctx_cb && pasid_state->device_state->inv_ctx_cb) 420 if (run_inv_ctx_cb && dev_state->inv_ctx_cb)
421 dev_state->inv_ctx_cb(dev_state->pdev, pasid_state->pasid); 421 dev_state->inv_ctx_cb(dev_state->pdev, pasid_state->pasid);
422 422
423 unbind_pasid(pasid_state); 423 unbind_pasid(pasid_state);
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index a3adde6519f0..9f7e1d34a32b 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -343,6 +343,7 @@ struct arm_smmu_domain {
343 struct arm_smmu_cfg cfg; 343 struct arm_smmu_cfg cfg;
344 enum arm_smmu_domain_stage stage; 344 enum arm_smmu_domain_stage stage;
345 struct mutex init_mutex; /* Protects smmu pointer */ 345 struct mutex init_mutex; /* Protects smmu pointer */
346 struct iommu_domain domain;
346}; 347};
347 348
348static struct iommu_ops arm_smmu_ops; 349static struct iommu_ops arm_smmu_ops;
@@ -360,6 +361,11 @@ static struct arm_smmu_option_prop arm_smmu_options[] = {
360 { 0, NULL}, 361 { 0, NULL},
361}; 362};
362 363
364static struct arm_smmu_domain *to_smmu_domain(struct iommu_domain *dom)
365{
366 return container_of(dom, struct arm_smmu_domain, domain);
367}
368
363static void parse_driver_options(struct arm_smmu_device *smmu) 369static void parse_driver_options(struct arm_smmu_device *smmu)
364{ 370{
365 int i = 0; 371 int i = 0;
@@ -645,7 +651,7 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
645 u32 fsr, far, fsynr, resume; 651 u32 fsr, far, fsynr, resume;
646 unsigned long iova; 652 unsigned long iova;
647 struct iommu_domain *domain = dev; 653 struct iommu_domain *domain = dev;
648 struct arm_smmu_domain *smmu_domain = domain->priv; 654 struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
649 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; 655 struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
650 struct arm_smmu_device *smmu = smmu_domain->smmu; 656 struct arm_smmu_device *smmu = smmu_domain->smmu;
651 void __iomem *cb_base; 657 void __iomem *cb_base;
@@ -730,6 +736,20 @@ static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain,
730 stage1 = cfg->cbar != CBAR_TYPE_S2_TRANS; 736 stage1 = cfg->cbar != CBAR_TYPE_S2_TRANS;
731 cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); 737 cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx);
732 738
739 if (smmu->version > ARM_SMMU_V1) {
740 /*
741 * CBA2R.
742 * *Must* be initialised before CBAR thanks to VMID16
743 * architectural oversight affected some implementations.
744 */
745#ifdef CONFIG_64BIT
746 reg = CBA2R_RW64_64BIT;
747#else
748 reg = CBA2R_RW64_32BIT;
749#endif
750 writel_relaxed(reg, gr1_base + ARM_SMMU_GR1_CBA2R(cfg->cbndx));
751 }
752
733 /* CBAR */ 753 /* CBAR */
734 reg = cfg->cbar; 754 reg = cfg->cbar;
735 if (smmu->version == ARM_SMMU_V1) 755 if (smmu->version == ARM_SMMU_V1)
@@ -747,16 +767,6 @@ static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain,
747 } 767 }
748 writel_relaxed(reg, gr1_base + ARM_SMMU_GR1_CBAR(cfg->cbndx)); 768 writel_relaxed(reg, gr1_base + ARM_SMMU_GR1_CBAR(cfg->cbndx));
749 769
750 if (smmu->version > ARM_SMMU_V1) {
751 /* CBA2R */
752#ifdef CONFIG_64BIT
753 reg = CBA2R_RW64_64BIT;
754#else
755 reg = CBA2R_RW64_32BIT;
756#endif
757 writel_relaxed(reg, gr1_base + ARM_SMMU_GR1_CBA2R(cfg->cbndx));
758 }
759
760 /* TTBRs */ 770 /* TTBRs */
761 if (stage1) { 771 if (stage1) {
762 reg = pgtbl_cfg->arm_lpae_s1_cfg.ttbr[0]; 772 reg = pgtbl_cfg->arm_lpae_s1_cfg.ttbr[0];
@@ -836,7 +846,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
836 struct io_pgtable_ops *pgtbl_ops; 846 struct io_pgtable_ops *pgtbl_ops;
837 struct io_pgtable_cfg pgtbl_cfg; 847 struct io_pgtable_cfg pgtbl_cfg;
838 enum io_pgtable_fmt fmt; 848 enum io_pgtable_fmt fmt;
839 struct arm_smmu_domain *smmu_domain = domain->priv; 849 struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
840 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; 850 struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
841 851
842 mutex_lock(&smmu_domain->init_mutex); 852 mutex_lock(&smmu_domain->init_mutex);
@@ -958,7 +968,7 @@ out_unlock:
958 968
959static void arm_smmu_destroy_domain_context(struct iommu_domain *domain) 969static void arm_smmu_destroy_domain_context(struct iommu_domain *domain)
960{ 970{
961 struct arm_smmu_domain *smmu_domain = domain->priv; 971 struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
962 struct arm_smmu_device *smmu = smmu_domain->smmu; 972 struct arm_smmu_device *smmu = smmu_domain->smmu;
963 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; 973 struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
964 void __iomem *cb_base; 974 void __iomem *cb_base;
@@ -985,10 +995,12 @@ static void arm_smmu_destroy_domain_context(struct iommu_domain *domain)
985 __arm_smmu_free_bitmap(smmu->context_map, cfg->cbndx); 995 __arm_smmu_free_bitmap(smmu->context_map, cfg->cbndx);
986} 996}
987 997
988static int arm_smmu_domain_init(struct iommu_domain *domain) 998static struct iommu_domain *arm_smmu_domain_alloc(unsigned type)
989{ 999{
990 struct arm_smmu_domain *smmu_domain; 1000 struct arm_smmu_domain *smmu_domain;
991 1001
1002 if (type != IOMMU_DOMAIN_UNMANAGED)
1003 return NULL;
992 /* 1004 /*
993 * Allocate the domain and initialise some of its data structures. 1005 * Allocate the domain and initialise some of its data structures.
994 * We can't really do anything meaningful until we've added a 1006 * We can't really do anything meaningful until we've added a
@@ -996,17 +1008,17 @@ static int arm_smmu_domain_init(struct iommu_domain *domain)
996 */ 1008 */
997 smmu_domain = kzalloc(sizeof(*smmu_domain), GFP_KERNEL); 1009 smmu_domain = kzalloc(sizeof(*smmu_domain), GFP_KERNEL);
998 if (!smmu_domain) 1010 if (!smmu_domain)
999 return -ENOMEM; 1011 return NULL;
1000 1012
1001 mutex_init(&smmu_domain->init_mutex); 1013 mutex_init(&smmu_domain->init_mutex);
1002 spin_lock_init(&smmu_domain->pgtbl_lock); 1014 spin_lock_init(&smmu_domain->pgtbl_lock);
1003 domain->priv = smmu_domain; 1015
1004 return 0; 1016 return &smmu_domain->domain;
1005} 1017}
1006 1018
1007static void arm_smmu_domain_destroy(struct iommu_domain *domain) 1019static void arm_smmu_domain_free(struct iommu_domain *domain)
1008{ 1020{
1009 struct arm_smmu_domain *smmu_domain = domain->priv; 1021 struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
1010 1022
1011 /* 1023 /*
1012 * Free the domain resources. We assume that all devices have 1024 * Free the domain resources. We assume that all devices have
@@ -1143,7 +1155,7 @@ static void arm_smmu_domain_remove_master(struct arm_smmu_domain *smmu_domain,
1143static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) 1155static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
1144{ 1156{
1145 int ret; 1157 int ret;
1146 struct arm_smmu_domain *smmu_domain = domain->priv; 1158 struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
1147 struct arm_smmu_device *smmu; 1159 struct arm_smmu_device *smmu;
1148 struct arm_smmu_master_cfg *cfg; 1160 struct arm_smmu_master_cfg *cfg;
1149 1161
@@ -1187,7 +1199,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
1187 1199
1188static void arm_smmu_detach_dev(struct iommu_domain *domain, struct device *dev) 1200static void arm_smmu_detach_dev(struct iommu_domain *domain, struct device *dev)
1189{ 1201{
1190 struct arm_smmu_domain *smmu_domain = domain->priv; 1202 struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
1191 struct arm_smmu_master_cfg *cfg; 1203 struct arm_smmu_master_cfg *cfg;
1192 1204
1193 cfg = find_smmu_master_cfg(dev); 1205 cfg = find_smmu_master_cfg(dev);
@@ -1203,7 +1215,7 @@ static int arm_smmu_map(struct iommu_domain *domain, unsigned long iova,
1203{ 1215{
1204 int ret; 1216 int ret;
1205 unsigned long flags; 1217 unsigned long flags;
1206 struct arm_smmu_domain *smmu_domain = domain->priv; 1218 struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
1207 struct io_pgtable_ops *ops= smmu_domain->pgtbl_ops; 1219 struct io_pgtable_ops *ops= smmu_domain->pgtbl_ops;
1208 1220
1209 if (!ops) 1221 if (!ops)
@@ -1220,7 +1232,7 @@ static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova,
1220{ 1232{
1221 size_t ret; 1233 size_t ret;
1222 unsigned long flags; 1234 unsigned long flags;
1223 struct arm_smmu_domain *smmu_domain = domain->priv; 1235 struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
1224 struct io_pgtable_ops *ops= smmu_domain->pgtbl_ops; 1236 struct io_pgtable_ops *ops= smmu_domain->pgtbl_ops;
1225 1237
1226 if (!ops) 1238 if (!ops)
@@ -1235,7 +1247,7 @@ static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova,
1235static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain, 1247static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain,
1236 dma_addr_t iova) 1248 dma_addr_t iova)
1237{ 1249{
1238 struct arm_smmu_domain *smmu_domain = domain->priv; 1250 struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
1239 struct arm_smmu_device *smmu = smmu_domain->smmu; 1251 struct arm_smmu_device *smmu = smmu_domain->smmu;
1240 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; 1252 struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
1241 struct io_pgtable_ops *ops= smmu_domain->pgtbl_ops; 1253 struct io_pgtable_ops *ops= smmu_domain->pgtbl_ops;
@@ -1281,7 +1293,7 @@ static phys_addr_t arm_smmu_iova_to_phys(struct iommu_domain *domain,
1281{ 1293{
1282 phys_addr_t ret; 1294 phys_addr_t ret;
1283 unsigned long flags; 1295 unsigned long flags;
1284 struct arm_smmu_domain *smmu_domain = domain->priv; 1296 struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
1285 struct io_pgtable_ops *ops= smmu_domain->pgtbl_ops; 1297 struct io_pgtable_ops *ops= smmu_domain->pgtbl_ops;
1286 1298
1287 if (!ops) 1299 if (!ops)
@@ -1329,61 +1341,83 @@ static void __arm_smmu_release_pci_iommudata(void *data)
1329 kfree(data); 1341 kfree(data);
1330} 1342}
1331 1343
1332static int arm_smmu_add_device(struct device *dev) 1344static int arm_smmu_add_pci_device(struct pci_dev *pdev)
1333{ 1345{
1334 struct arm_smmu_device *smmu; 1346 int i, ret;
1335 struct arm_smmu_master_cfg *cfg; 1347 u16 sid;
1336 struct iommu_group *group; 1348 struct iommu_group *group;
1337 void (*releasefn)(void *) = NULL; 1349 struct arm_smmu_master_cfg *cfg;
1338 int ret;
1339
1340 smmu = find_smmu_for_device(dev);
1341 if (!smmu)
1342 return -ENODEV;
1343 1350
1344 group = iommu_group_alloc(); 1351 group = iommu_group_get_for_dev(&pdev->dev);
1345 if (IS_ERR(group)) { 1352 if (IS_ERR(group))
1346 dev_err(dev, "Failed to allocate IOMMU group\n");
1347 return PTR_ERR(group); 1353 return PTR_ERR(group);
1348 }
1349
1350 if (dev_is_pci(dev)) {
1351 struct pci_dev *pdev = to_pci_dev(dev);
1352 1354
1355 cfg = iommu_group_get_iommudata(group);
1356 if (!cfg) {
1353 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL); 1357 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
1354 if (!cfg) { 1358 if (!cfg) {
1355 ret = -ENOMEM; 1359 ret = -ENOMEM;
1356 goto out_put_group; 1360 goto out_put_group;
1357 } 1361 }
1358 1362
1359 cfg->num_streamids = 1; 1363 iommu_group_set_iommudata(group, cfg,
1360 /* 1364 __arm_smmu_release_pci_iommudata);
1361 * Assume Stream ID == Requester ID for now. 1365 }
1362 * We need a way to describe the ID mappings in FDT.
1363 */
1364 pci_for_each_dma_alias(pdev, __arm_smmu_get_pci_sid,
1365 &cfg->streamids[0]);
1366 releasefn = __arm_smmu_release_pci_iommudata;
1367 } else {
1368 struct arm_smmu_master *master;
1369
1370 master = find_smmu_master(smmu, dev->of_node);
1371 if (!master) {
1372 ret = -ENODEV;
1373 goto out_put_group;
1374 }
1375 1366
1376 cfg = &master->cfg; 1367 if (cfg->num_streamids >= MAX_MASTER_STREAMIDS) {
1368 ret = -ENOSPC;
1369 goto out_put_group;
1377 } 1370 }
1378 1371
1379 iommu_group_set_iommudata(group, cfg, releasefn); 1372 /*
1380 ret = iommu_group_add_device(group, dev); 1373 * Assume Stream ID == Requester ID for now.
1374 * We need a way to describe the ID mappings in FDT.
1375 */
1376 pci_for_each_dma_alias(pdev, __arm_smmu_get_pci_sid, &sid);
1377 for (i = 0; i < cfg->num_streamids; ++i)
1378 if (cfg->streamids[i] == sid)
1379 break;
1380
1381 /* Avoid duplicate SIDs, as this can lead to SMR conflicts */
1382 if (i == cfg->num_streamids)
1383 cfg->streamids[cfg->num_streamids++] = sid;
1381 1384
1385 return 0;
1382out_put_group: 1386out_put_group:
1383 iommu_group_put(group); 1387 iommu_group_put(group);
1384 return ret; 1388 return ret;
1385} 1389}
1386 1390
1391static int arm_smmu_add_platform_device(struct device *dev)
1392{
1393 struct iommu_group *group;
1394 struct arm_smmu_master *master;
1395 struct arm_smmu_device *smmu = find_smmu_for_device(dev);
1396
1397 if (!smmu)
1398 return -ENODEV;
1399
1400 master = find_smmu_master(smmu, dev->of_node);
1401 if (!master)
1402 return -ENODEV;
1403
1404 /* No automatic group creation for platform devices */
1405 group = iommu_group_alloc();
1406 if (IS_ERR(group))
1407 return PTR_ERR(group);
1408
1409 iommu_group_set_iommudata(group, &master->cfg, NULL);
1410 return iommu_group_add_device(group, dev);
1411}
1412
1413static int arm_smmu_add_device(struct device *dev)
1414{
1415 if (dev_is_pci(dev))
1416 return arm_smmu_add_pci_device(to_pci_dev(dev));
1417
1418 return arm_smmu_add_platform_device(dev);
1419}
1420
1387static void arm_smmu_remove_device(struct device *dev) 1421static void arm_smmu_remove_device(struct device *dev)
1388{ 1422{
1389 iommu_group_remove_device(dev); 1423 iommu_group_remove_device(dev);
@@ -1392,7 +1426,7 @@ static void arm_smmu_remove_device(struct device *dev)
1392static int arm_smmu_domain_get_attr(struct iommu_domain *domain, 1426static int arm_smmu_domain_get_attr(struct iommu_domain *domain,
1393 enum iommu_attr attr, void *data) 1427 enum iommu_attr attr, void *data)
1394{ 1428{
1395 struct arm_smmu_domain *smmu_domain = domain->priv; 1429 struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
1396 1430
1397 switch (attr) { 1431 switch (attr) {
1398 case DOMAIN_ATTR_NESTING: 1432 case DOMAIN_ATTR_NESTING:
@@ -1407,7 +1441,7 @@ static int arm_smmu_domain_set_attr(struct iommu_domain *domain,
1407 enum iommu_attr attr, void *data) 1441 enum iommu_attr attr, void *data)
1408{ 1442{
1409 int ret = 0; 1443 int ret = 0;
1410 struct arm_smmu_domain *smmu_domain = domain->priv; 1444 struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
1411 1445
1412 mutex_lock(&smmu_domain->init_mutex); 1446 mutex_lock(&smmu_domain->init_mutex);
1413 1447
@@ -1435,8 +1469,8 @@ out_unlock:
1435 1469
1436static struct iommu_ops arm_smmu_ops = { 1470static struct iommu_ops arm_smmu_ops = {
1437 .capable = arm_smmu_capable, 1471 .capable = arm_smmu_capable,
1438 .domain_init = arm_smmu_domain_init, 1472 .domain_alloc = arm_smmu_domain_alloc,
1439 .domain_destroy = arm_smmu_domain_destroy, 1473 .domain_free = arm_smmu_domain_free,
1440 .attach_dev = arm_smmu_attach_dev, 1474 .attach_dev = arm_smmu_attach_dev,
1441 .detach_dev = arm_smmu_detach_dev, 1475 .detach_dev = arm_smmu_detach_dev,
1442 .map = arm_smmu_map, 1476 .map = arm_smmu_map,
@@ -1633,6 +1667,15 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
1633 size = arm_smmu_id_size_to_bits((id >> ID2_OAS_SHIFT) & ID2_OAS_MASK); 1667 size = arm_smmu_id_size_to_bits((id >> ID2_OAS_SHIFT) & ID2_OAS_MASK);
1634 smmu->pa_size = size; 1668 smmu->pa_size = size;
1635 1669
1670 /*
1671 * What the page table walker can address actually depends on which
1672 * descriptor format is in use, but since a) we don't know that yet,
1673 * and b) it can vary per context bank, this will have to do...
1674 */
1675 if (dma_set_mask_and_coherent(smmu->dev, DMA_BIT_MASK(size)))
1676 dev_warn(smmu->dev,
1677 "failed to set DMA mask for table walker\n");
1678
1636 if (smmu->version == ARM_SMMU_V1) { 1679 if (smmu->version == ARM_SMMU_V1) {
1637 smmu->va_size = smmu->ipa_size; 1680 smmu->va_size = smmu->ipa_size;
1638 size = SZ_4K | SZ_2M | SZ_1G; 1681 size = SZ_4K | SZ_2M | SZ_1G;
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index dc14fec4ede1..3e898504a7c4 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -200,6 +200,7 @@ struct exynos_iommu_domain {
200 short *lv2entcnt; /* free lv2 entry counter for each section */ 200 short *lv2entcnt; /* free lv2 entry counter for each section */
201 spinlock_t lock; /* lock for this structure */ 201 spinlock_t lock; /* lock for this structure */
202 spinlock_t pgtablelock; /* lock for modifying page table @ pgtable */ 202 spinlock_t pgtablelock; /* lock for modifying page table @ pgtable */
203 struct iommu_domain domain; /* generic domain data structure */
203}; 204};
204 205
205struct sysmmu_drvdata { 206struct sysmmu_drvdata {
@@ -214,6 +215,11 @@ struct sysmmu_drvdata {
214 phys_addr_t pgtable; 215 phys_addr_t pgtable;
215}; 216};
216 217
218static struct exynos_iommu_domain *to_exynos_domain(struct iommu_domain *dom)
219{
220 return container_of(dom, struct exynos_iommu_domain, domain);
221}
222
217static bool set_sysmmu_active(struct sysmmu_drvdata *data) 223static bool set_sysmmu_active(struct sysmmu_drvdata *data)
218{ 224{
219 /* return true if the System MMU was not active previously 225 /* return true if the System MMU was not active previously
@@ -696,58 +702,60 @@ static inline void pgtable_flush(void *vastart, void *vaend)
696 virt_to_phys(vaend)); 702 virt_to_phys(vaend));
697} 703}
698 704
699static int exynos_iommu_domain_init(struct iommu_domain *domain) 705static struct iommu_domain *exynos_iommu_domain_alloc(unsigned type)
700{ 706{
701 struct exynos_iommu_domain *priv; 707 struct exynos_iommu_domain *exynos_domain;
702 int i; 708 int i;
703 709
704 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 710 if (type != IOMMU_DOMAIN_UNMANAGED)
705 if (!priv) 711 return NULL;
706 return -ENOMEM; 712
713 exynos_domain = kzalloc(sizeof(*exynos_domain), GFP_KERNEL);
714 if (!exynos_domain)
715 return NULL;
707 716
708 priv->pgtable = (sysmmu_pte_t *)__get_free_pages(GFP_KERNEL, 2); 717 exynos_domain->pgtable = (sysmmu_pte_t *)__get_free_pages(GFP_KERNEL, 2);
709 if (!priv->pgtable) 718 if (!exynos_domain->pgtable)
710 goto err_pgtable; 719 goto err_pgtable;
711 720
712 priv->lv2entcnt = (short *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 1); 721 exynos_domain->lv2entcnt = (short *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 1);
713 if (!priv->lv2entcnt) 722 if (!exynos_domain->lv2entcnt)
714 goto err_counter; 723 goto err_counter;
715 724
716 /* Workaround for System MMU v3.3 to prevent caching 1MiB mapping */ 725 /* Workaround for System MMU v3.3 to prevent caching 1MiB mapping */
717 for (i = 0; i < NUM_LV1ENTRIES; i += 8) { 726 for (i = 0; i < NUM_LV1ENTRIES; i += 8) {
718 priv->pgtable[i + 0] = ZERO_LV2LINK; 727 exynos_domain->pgtable[i + 0] = ZERO_LV2LINK;
719 priv->pgtable[i + 1] = ZERO_LV2LINK; 728 exynos_domain->pgtable[i + 1] = ZERO_LV2LINK;
720 priv->pgtable[i + 2] = ZERO_LV2LINK; 729 exynos_domain->pgtable[i + 2] = ZERO_LV2LINK;
721 priv->pgtable[i + 3] = ZERO_LV2LINK; 730 exynos_domain->pgtable[i + 3] = ZERO_LV2LINK;
722 priv->pgtable[i + 4] = ZERO_LV2LINK; 731 exynos_domain->pgtable[i + 4] = ZERO_LV2LINK;
723 priv->pgtable[i + 5] = ZERO_LV2LINK; 732 exynos_domain->pgtable[i + 5] = ZERO_LV2LINK;
724 priv->pgtable[i + 6] = ZERO_LV2LINK; 733 exynos_domain->pgtable[i + 6] = ZERO_LV2LINK;
725 priv->pgtable[i + 7] = ZERO_LV2LINK; 734 exynos_domain->pgtable[i + 7] = ZERO_LV2LINK;
726 } 735 }
727 736
728 pgtable_flush(priv->pgtable, priv->pgtable + NUM_LV1ENTRIES); 737 pgtable_flush(exynos_domain->pgtable, exynos_domain->pgtable + NUM_LV1ENTRIES);
729 738
730 spin_lock_init(&priv->lock); 739 spin_lock_init(&exynos_domain->lock);
731 spin_lock_init(&priv->pgtablelock); 740 spin_lock_init(&exynos_domain->pgtablelock);
732 INIT_LIST_HEAD(&priv->clients); 741 INIT_LIST_HEAD(&exynos_domain->clients);
733 742
734 domain->geometry.aperture_start = 0; 743 exynos_domain->domain.geometry.aperture_start = 0;
735 domain->geometry.aperture_end = ~0UL; 744 exynos_domain->domain.geometry.aperture_end = ~0UL;
736 domain->geometry.force_aperture = true; 745 exynos_domain->domain.geometry.force_aperture = true;
737 746
738 domain->priv = priv; 747 return &exynos_domain->domain;
739 return 0;
740 748
741err_counter: 749err_counter:
742 free_pages((unsigned long)priv->pgtable, 2); 750 free_pages((unsigned long)exynos_domain->pgtable, 2);
743err_pgtable: 751err_pgtable:
744 kfree(priv); 752 kfree(exynos_domain);
745 return -ENOMEM; 753 return NULL;
746} 754}
747 755
748static void exynos_iommu_domain_destroy(struct iommu_domain *domain) 756static void exynos_iommu_domain_free(struct iommu_domain *domain)
749{ 757{
750 struct exynos_iommu_domain *priv = domain->priv; 758 struct exynos_iommu_domain *priv = to_exynos_domain(domain);
751 struct exynos_iommu_owner *owner; 759 struct exynos_iommu_owner *owner;
752 unsigned long flags; 760 unsigned long flags;
753 int i; 761 int i;
@@ -773,15 +781,14 @@ static void exynos_iommu_domain_destroy(struct iommu_domain *domain)
773 781
774 free_pages((unsigned long)priv->pgtable, 2); 782 free_pages((unsigned long)priv->pgtable, 2);
775 free_pages((unsigned long)priv->lv2entcnt, 1); 783 free_pages((unsigned long)priv->lv2entcnt, 1);
776 kfree(domain->priv); 784 kfree(priv);
777 domain->priv = NULL;
778} 785}
779 786
780static int exynos_iommu_attach_device(struct iommu_domain *domain, 787static int exynos_iommu_attach_device(struct iommu_domain *domain,
781 struct device *dev) 788 struct device *dev)
782{ 789{
783 struct exynos_iommu_owner *owner = dev->archdata.iommu; 790 struct exynos_iommu_owner *owner = dev->archdata.iommu;
784 struct exynos_iommu_domain *priv = domain->priv; 791 struct exynos_iommu_domain *priv = to_exynos_domain(domain);
785 phys_addr_t pagetable = virt_to_phys(priv->pgtable); 792 phys_addr_t pagetable = virt_to_phys(priv->pgtable);
786 unsigned long flags; 793 unsigned long flags;
787 int ret; 794 int ret;
@@ -812,7 +819,7 @@ static void exynos_iommu_detach_device(struct iommu_domain *domain,
812 struct device *dev) 819 struct device *dev)
813{ 820{
814 struct exynos_iommu_owner *owner; 821 struct exynos_iommu_owner *owner;
815 struct exynos_iommu_domain *priv = domain->priv; 822 struct exynos_iommu_domain *priv = to_exynos_domain(domain);
816 phys_addr_t pagetable = virt_to_phys(priv->pgtable); 823 phys_addr_t pagetable = virt_to_phys(priv->pgtable);
817 unsigned long flags; 824 unsigned long flags;
818 825
@@ -988,7 +995,7 @@ static int lv2set_page(sysmmu_pte_t *pent, phys_addr_t paddr, size_t size,
988static int exynos_iommu_map(struct iommu_domain *domain, unsigned long l_iova, 995static int exynos_iommu_map(struct iommu_domain *domain, unsigned long l_iova,
989 phys_addr_t paddr, size_t size, int prot) 996 phys_addr_t paddr, size_t size, int prot)
990{ 997{
991 struct exynos_iommu_domain *priv = domain->priv; 998 struct exynos_iommu_domain *priv = to_exynos_domain(domain);
992 sysmmu_pte_t *entry; 999 sysmmu_pte_t *entry;
993 sysmmu_iova_t iova = (sysmmu_iova_t)l_iova; 1000 sysmmu_iova_t iova = (sysmmu_iova_t)l_iova;
994 unsigned long flags; 1001 unsigned long flags;
@@ -1042,7 +1049,7 @@ static void exynos_iommu_tlb_invalidate_entry(struct exynos_iommu_domain *priv,
1042static size_t exynos_iommu_unmap(struct iommu_domain *domain, 1049static size_t exynos_iommu_unmap(struct iommu_domain *domain,
1043 unsigned long l_iova, size_t size) 1050 unsigned long l_iova, size_t size)
1044{ 1051{
1045 struct exynos_iommu_domain *priv = domain->priv; 1052 struct exynos_iommu_domain *priv = to_exynos_domain(domain);
1046 sysmmu_iova_t iova = (sysmmu_iova_t)l_iova; 1053 sysmmu_iova_t iova = (sysmmu_iova_t)l_iova;
1047 sysmmu_pte_t *ent; 1054 sysmmu_pte_t *ent;
1048 size_t err_pgsize; 1055 size_t err_pgsize;
@@ -1119,7 +1126,7 @@ err:
1119static phys_addr_t exynos_iommu_iova_to_phys(struct iommu_domain *domain, 1126static phys_addr_t exynos_iommu_iova_to_phys(struct iommu_domain *domain,
1120 dma_addr_t iova) 1127 dma_addr_t iova)
1121{ 1128{
1122 struct exynos_iommu_domain *priv = domain->priv; 1129 struct exynos_iommu_domain *priv = to_exynos_domain(domain);
1123 sysmmu_pte_t *entry; 1130 sysmmu_pte_t *entry;
1124 unsigned long flags; 1131 unsigned long flags;
1125 phys_addr_t phys = 0; 1132 phys_addr_t phys = 0;
@@ -1171,8 +1178,8 @@ static void exynos_iommu_remove_device(struct device *dev)
1171} 1178}
1172 1179
1173static const struct iommu_ops exynos_iommu_ops = { 1180static const struct iommu_ops exynos_iommu_ops = {
1174 .domain_init = exynos_iommu_domain_init, 1181 .domain_alloc = exynos_iommu_domain_alloc,
1175 .domain_destroy = exynos_iommu_domain_destroy, 1182 .domain_free = exynos_iommu_domain_free,
1176 .attach_dev = exynos_iommu_attach_device, 1183 .attach_dev = exynos_iommu_attach_device,
1177 .detach_dev = exynos_iommu_detach_device, 1184 .detach_dev = exynos_iommu_detach_device,
1178 .map = exynos_iommu_map, 1185 .map = exynos_iommu_map,
diff --git a/drivers/iommu/fsl_pamu_domain.c b/drivers/iommu/fsl_pamu_domain.c
index ceebd287b660..1d452930c890 100644
--- a/drivers/iommu/fsl_pamu_domain.c
+++ b/drivers/iommu/fsl_pamu_domain.c
@@ -33,6 +33,11 @@ static struct kmem_cache *fsl_pamu_domain_cache;
33static struct kmem_cache *iommu_devinfo_cache; 33static struct kmem_cache *iommu_devinfo_cache;
34static DEFINE_SPINLOCK(device_domain_lock); 34static DEFINE_SPINLOCK(device_domain_lock);
35 35
36static struct fsl_dma_domain *to_fsl_dma_domain(struct iommu_domain *dom)
37{
38 return container_of(dom, struct fsl_dma_domain, iommu_domain);
39}
40
36static int __init iommu_init_mempool(void) 41static int __init iommu_init_mempool(void)
37{ 42{
38 fsl_pamu_domain_cache = kmem_cache_create("fsl_pamu_domain", 43 fsl_pamu_domain_cache = kmem_cache_create("fsl_pamu_domain",
@@ -65,7 +70,7 @@ static phys_addr_t get_phys_addr(struct fsl_dma_domain *dma_domain, dma_addr_t i
65 struct dma_window *win_ptr = &dma_domain->win_arr[0]; 70 struct dma_window *win_ptr = &dma_domain->win_arr[0];
66 struct iommu_domain_geometry *geom; 71 struct iommu_domain_geometry *geom;
67 72
68 geom = &dma_domain->iommu_domain->geometry; 73 geom = &dma_domain->iommu_domain.geometry;
69 74
70 if (!win_cnt || !dma_domain->geom_size) { 75 if (!win_cnt || !dma_domain->geom_size) {
71 pr_debug("Number of windows/geometry not configured for the domain\n"); 76 pr_debug("Number of windows/geometry not configured for the domain\n");
@@ -123,7 +128,7 @@ static int map_win(int liodn, struct fsl_dma_domain *dma_domain)
123{ 128{
124 int ret; 129 int ret;
125 struct dma_window *wnd = &dma_domain->win_arr[0]; 130 struct dma_window *wnd = &dma_domain->win_arr[0];
126 phys_addr_t wnd_addr = dma_domain->iommu_domain->geometry.aperture_start; 131 phys_addr_t wnd_addr = dma_domain->iommu_domain.geometry.aperture_start;
127 unsigned long flags; 132 unsigned long flags;
128 133
129 spin_lock_irqsave(&iommu_lock, flags); 134 spin_lock_irqsave(&iommu_lock, flags);
@@ -172,7 +177,7 @@ static int update_liodn(int liodn, struct fsl_dma_domain *dma_domain, u32 wnd_nr
172 } else { 177 } else {
173 phys_addr_t wnd_addr; 178 phys_addr_t wnd_addr;
174 179
175 wnd_addr = dma_domain->iommu_domain->geometry.aperture_start; 180 wnd_addr = dma_domain->iommu_domain.geometry.aperture_start;
176 181
177 ret = pamu_config_ppaace(liodn, wnd_addr, 182 ret = pamu_config_ppaace(liodn, wnd_addr,
178 wnd->size, 183 wnd->size,
@@ -384,7 +389,7 @@ static void attach_device(struct fsl_dma_domain *dma_domain, int liodn, struct d
384static phys_addr_t fsl_pamu_iova_to_phys(struct iommu_domain *domain, 389static phys_addr_t fsl_pamu_iova_to_phys(struct iommu_domain *domain,
385 dma_addr_t iova) 390 dma_addr_t iova)
386{ 391{
387 struct fsl_dma_domain *dma_domain = domain->priv; 392 struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
388 393
389 if (iova < domain->geometry.aperture_start || 394 if (iova < domain->geometry.aperture_start ||
390 iova > domain->geometry.aperture_end) 395 iova > domain->geometry.aperture_end)
@@ -398,11 +403,9 @@ static bool fsl_pamu_capable(enum iommu_cap cap)
398 return cap == IOMMU_CAP_CACHE_COHERENCY; 403 return cap == IOMMU_CAP_CACHE_COHERENCY;
399} 404}
400 405
401static void fsl_pamu_domain_destroy(struct iommu_domain *domain) 406static void fsl_pamu_domain_free(struct iommu_domain *domain)
402{ 407{
403 struct fsl_dma_domain *dma_domain = domain->priv; 408 struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
404
405 domain->priv = NULL;
406 409
407 /* remove all the devices from the device list */ 410 /* remove all the devices from the device list */
408 detach_device(NULL, dma_domain); 411 detach_device(NULL, dma_domain);
@@ -413,23 +416,24 @@ static void fsl_pamu_domain_destroy(struct iommu_domain *domain)
413 kmem_cache_free(fsl_pamu_domain_cache, dma_domain); 416 kmem_cache_free(fsl_pamu_domain_cache, dma_domain);
414} 417}
415 418
416static int fsl_pamu_domain_init(struct iommu_domain *domain) 419static struct iommu_domain *fsl_pamu_domain_alloc(unsigned type)
417{ 420{
418 struct fsl_dma_domain *dma_domain; 421 struct fsl_dma_domain *dma_domain;
419 422
423 if (type != IOMMU_DOMAIN_UNMANAGED)
424 return NULL;
425
420 dma_domain = iommu_alloc_dma_domain(); 426 dma_domain = iommu_alloc_dma_domain();
421 if (!dma_domain) { 427 if (!dma_domain) {
422 pr_debug("dma_domain allocation failed\n"); 428 pr_debug("dma_domain allocation failed\n");
423 return -ENOMEM; 429 return NULL;
424 } 430 }
425 domain->priv = dma_domain;
426 dma_domain->iommu_domain = domain;
427 /* defaul geometry 64 GB i.e. maximum system address */ 431 /* defaul geometry 64 GB i.e. maximum system address */
428 domain->geometry.aperture_start = 0; 432 dma_domain->iommu_domain. geometry.aperture_start = 0;
429 domain->geometry.aperture_end = (1ULL << 36) - 1; 433 dma_domain->iommu_domain.geometry.aperture_end = (1ULL << 36) - 1;
430 domain->geometry.force_aperture = true; 434 dma_domain->iommu_domain.geometry.force_aperture = true;
431 435
432 return 0; 436 return &dma_domain->iommu_domain;
433} 437}
434 438
435/* Configure geometry settings for all LIODNs associated with domain */ 439/* Configure geometry settings for all LIODNs associated with domain */
@@ -499,7 +503,7 @@ static int disable_domain_win(struct fsl_dma_domain *dma_domain, u32 wnd_nr)
499 503
500static void fsl_pamu_window_disable(struct iommu_domain *domain, u32 wnd_nr) 504static void fsl_pamu_window_disable(struct iommu_domain *domain, u32 wnd_nr)
501{ 505{
502 struct fsl_dma_domain *dma_domain = domain->priv; 506 struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
503 unsigned long flags; 507 unsigned long flags;
504 int ret; 508 int ret;
505 509
@@ -530,7 +534,7 @@ static void fsl_pamu_window_disable(struct iommu_domain *domain, u32 wnd_nr)
530static int fsl_pamu_window_enable(struct iommu_domain *domain, u32 wnd_nr, 534static int fsl_pamu_window_enable(struct iommu_domain *domain, u32 wnd_nr,
531 phys_addr_t paddr, u64 size, int prot) 535 phys_addr_t paddr, u64 size, int prot)
532{ 536{
533 struct fsl_dma_domain *dma_domain = domain->priv; 537 struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
534 struct dma_window *wnd; 538 struct dma_window *wnd;
535 int pamu_prot = 0; 539 int pamu_prot = 0;
536 int ret; 540 int ret;
@@ -607,7 +611,7 @@ static int handle_attach_device(struct fsl_dma_domain *dma_domain,
607 int num) 611 int num)
608{ 612{
609 unsigned long flags; 613 unsigned long flags;
610 struct iommu_domain *domain = dma_domain->iommu_domain; 614 struct iommu_domain *domain = &dma_domain->iommu_domain;
611 int ret = 0; 615 int ret = 0;
612 int i; 616 int i;
613 617
@@ -653,7 +657,7 @@ static int handle_attach_device(struct fsl_dma_domain *dma_domain,
653static int fsl_pamu_attach_device(struct iommu_domain *domain, 657static int fsl_pamu_attach_device(struct iommu_domain *domain,
654 struct device *dev) 658 struct device *dev)
655{ 659{
656 struct fsl_dma_domain *dma_domain = domain->priv; 660 struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
657 const u32 *liodn; 661 const u32 *liodn;
658 u32 liodn_cnt; 662 u32 liodn_cnt;
659 int len, ret = 0; 663 int len, ret = 0;
@@ -691,7 +695,7 @@ static int fsl_pamu_attach_device(struct iommu_domain *domain,
691static void fsl_pamu_detach_device(struct iommu_domain *domain, 695static void fsl_pamu_detach_device(struct iommu_domain *domain,
692 struct device *dev) 696 struct device *dev)
693{ 697{
694 struct fsl_dma_domain *dma_domain = domain->priv; 698 struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
695 const u32 *prop; 699 const u32 *prop;
696 int len; 700 int len;
697 struct pci_dev *pdev = NULL; 701 struct pci_dev *pdev = NULL;
@@ -723,7 +727,7 @@ static void fsl_pamu_detach_device(struct iommu_domain *domain,
723static int configure_domain_geometry(struct iommu_domain *domain, void *data) 727static int configure_domain_geometry(struct iommu_domain *domain, void *data)
724{ 728{
725 struct iommu_domain_geometry *geom_attr = data; 729 struct iommu_domain_geometry *geom_attr = data;
726 struct fsl_dma_domain *dma_domain = domain->priv; 730 struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
727 dma_addr_t geom_size; 731 dma_addr_t geom_size;
728 unsigned long flags; 732 unsigned long flags;
729 733
@@ -813,7 +817,7 @@ static int configure_domain_dma_state(struct fsl_dma_domain *dma_domain, bool en
813static int fsl_pamu_set_domain_attr(struct iommu_domain *domain, 817static int fsl_pamu_set_domain_attr(struct iommu_domain *domain,
814 enum iommu_attr attr_type, void *data) 818 enum iommu_attr attr_type, void *data)
815{ 819{
816 struct fsl_dma_domain *dma_domain = domain->priv; 820 struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
817 int ret = 0; 821 int ret = 0;
818 822
819 switch (attr_type) { 823 switch (attr_type) {
@@ -838,7 +842,7 @@ static int fsl_pamu_set_domain_attr(struct iommu_domain *domain,
838static int fsl_pamu_get_domain_attr(struct iommu_domain *domain, 842static int fsl_pamu_get_domain_attr(struct iommu_domain *domain,
839 enum iommu_attr attr_type, void *data) 843 enum iommu_attr attr_type, void *data)
840{ 844{
841 struct fsl_dma_domain *dma_domain = domain->priv; 845 struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
842 int ret = 0; 846 int ret = 0;
843 847
844 switch (attr_type) { 848 switch (attr_type) {
@@ -999,7 +1003,7 @@ static void fsl_pamu_remove_device(struct device *dev)
999 1003
1000static int fsl_pamu_set_windows(struct iommu_domain *domain, u32 w_count) 1004static int fsl_pamu_set_windows(struct iommu_domain *domain, u32 w_count)
1001{ 1005{
1002 struct fsl_dma_domain *dma_domain = domain->priv; 1006 struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
1003 unsigned long flags; 1007 unsigned long flags;
1004 int ret; 1008 int ret;
1005 1009
@@ -1048,15 +1052,15 @@ static int fsl_pamu_set_windows(struct iommu_domain *domain, u32 w_count)
1048 1052
1049static u32 fsl_pamu_get_windows(struct iommu_domain *domain) 1053static u32 fsl_pamu_get_windows(struct iommu_domain *domain)
1050{ 1054{
1051 struct fsl_dma_domain *dma_domain = domain->priv; 1055 struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
1052 1056
1053 return dma_domain->win_cnt; 1057 return dma_domain->win_cnt;
1054} 1058}
1055 1059
1056static const struct iommu_ops fsl_pamu_ops = { 1060static const struct iommu_ops fsl_pamu_ops = {
1057 .capable = fsl_pamu_capable, 1061 .capable = fsl_pamu_capable,
1058 .domain_init = fsl_pamu_domain_init, 1062 .domain_alloc = fsl_pamu_domain_alloc,
1059 .domain_destroy = fsl_pamu_domain_destroy, 1063 .domain_free = fsl_pamu_domain_free,
1060 .attach_dev = fsl_pamu_attach_device, 1064 .attach_dev = fsl_pamu_attach_device,
1061 .detach_dev = fsl_pamu_detach_device, 1065 .detach_dev = fsl_pamu_detach_device,
1062 .domain_window_enable = fsl_pamu_window_enable, 1066 .domain_window_enable = fsl_pamu_window_enable,
diff --git a/drivers/iommu/fsl_pamu_domain.h b/drivers/iommu/fsl_pamu_domain.h
index c90293f99709..f2b0f741d3de 100644
--- a/drivers/iommu/fsl_pamu_domain.h
+++ b/drivers/iommu/fsl_pamu_domain.h
@@ -71,7 +71,7 @@ struct fsl_dma_domain {
71 u32 stash_id; 71 u32 stash_id;
72 struct pamu_stash_attribute dma_stash; 72 struct pamu_stash_attribute dma_stash;
73 u32 snoop_id; 73 u32 snoop_id;
74 struct iommu_domain *iommu_domain; 74 struct iommu_domain iommu_domain;
75 spinlock_t domain_lock; 75 spinlock_t domain_lock;
76}; 76};
77 77
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 4fc1f8a7f98e..a35927cd42e5 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -339,7 +339,7 @@ struct dmar_domain {
339 DECLARE_BITMAP(iommu_bmp, DMAR_UNITS_SUPPORTED); 339 DECLARE_BITMAP(iommu_bmp, DMAR_UNITS_SUPPORTED);
340 /* bitmap of iommus this domain uses*/ 340 /* bitmap of iommus this domain uses*/
341 341
342 struct list_head devices; /* all devices' list */ 342 struct list_head devices; /* all devices' list */
343 struct iova_domain iovad; /* iova's that belong to this domain */ 343 struct iova_domain iovad; /* iova's that belong to this domain */
344 344
345 struct dma_pte *pgd; /* virtual address */ 345 struct dma_pte *pgd; /* virtual address */
@@ -358,6 +358,9 @@ struct dmar_domain {
358 2 == 1GiB, 3 == 512GiB, 4 == 1TiB */ 358 2 == 1GiB, 3 == 512GiB, 4 == 1TiB */
359 spinlock_t iommu_lock; /* protect iommu set in domain */ 359 spinlock_t iommu_lock; /* protect iommu set in domain */
360 u64 max_addr; /* maximum mapped address */ 360 u64 max_addr; /* maximum mapped address */
361
362 struct iommu_domain domain; /* generic domain data structure for
363 iommu core */
361}; 364};
362 365
363/* PCI domain-device relationship */ 366/* PCI domain-device relationship */
@@ -449,6 +452,12 @@ static LIST_HEAD(device_domain_list);
449 452
450static const struct iommu_ops intel_iommu_ops; 453static const struct iommu_ops intel_iommu_ops;
451 454
455/* Convert generic 'struct iommu_domain to private struct dmar_domain */
456static struct dmar_domain *to_dmar_domain(struct iommu_domain *dom)
457{
458 return container_of(dom, struct dmar_domain, domain);
459}
460
452static int __init intel_iommu_setup(char *str) 461static int __init intel_iommu_setup(char *str)
453{ 462{
454 if (!str) 463 if (!str)
@@ -595,12 +604,13 @@ static void domain_update_iommu_coherency(struct dmar_domain *domain)
595{ 604{
596 struct dmar_drhd_unit *drhd; 605 struct dmar_drhd_unit *drhd;
597 struct intel_iommu *iommu; 606 struct intel_iommu *iommu;
598 int i, found = 0; 607 bool found = false;
608 int i;
599 609
600 domain->iommu_coherency = 1; 610 domain->iommu_coherency = 1;
601 611
602 for_each_set_bit(i, domain->iommu_bmp, g_num_of_iommus) { 612 for_each_set_bit(i, domain->iommu_bmp, g_num_of_iommus) {
603 found = 1; 613 found = true;
604 if (!ecap_coherent(g_iommus[i]->ecap)) { 614 if (!ecap_coherent(g_iommus[i]->ecap)) {
605 domain->iommu_coherency = 0; 615 domain->iommu_coherency = 0;
606 break; 616 break;
@@ -1267,7 +1277,7 @@ static struct device_domain_info *
1267iommu_support_dev_iotlb (struct dmar_domain *domain, struct intel_iommu *iommu, 1277iommu_support_dev_iotlb (struct dmar_domain *domain, struct intel_iommu *iommu,
1268 u8 bus, u8 devfn) 1278 u8 bus, u8 devfn)
1269{ 1279{
1270 int found = 0; 1280 bool found = false;
1271 unsigned long flags; 1281 unsigned long flags;
1272 struct device_domain_info *info; 1282 struct device_domain_info *info;
1273 struct pci_dev *pdev; 1283 struct pci_dev *pdev;
@@ -1282,7 +1292,7 @@ iommu_support_dev_iotlb (struct dmar_domain *domain, struct intel_iommu *iommu,
1282 list_for_each_entry(info, &domain->devices, link) 1292 list_for_each_entry(info, &domain->devices, link)
1283 if (info->iommu == iommu && info->bus == bus && 1293 if (info->iommu == iommu && info->bus == bus &&
1284 info->devfn == devfn) { 1294 info->devfn == devfn) {
1285 found = 1; 1295 found = true;
1286 break; 1296 break;
1287 } 1297 }
1288 spin_unlock_irqrestore(&device_domain_lock, flags); 1298 spin_unlock_irqrestore(&device_domain_lock, flags);
@@ -4269,7 +4279,7 @@ static void domain_remove_one_dev_info(struct dmar_domain *domain,
4269 struct device_domain_info *info, *tmp; 4279 struct device_domain_info *info, *tmp;
4270 struct intel_iommu *iommu; 4280 struct intel_iommu *iommu;
4271 unsigned long flags; 4281 unsigned long flags;
4272 int found = 0; 4282 bool found = false;
4273 u8 bus, devfn; 4283 u8 bus, devfn;
4274 4284
4275 iommu = device_to_iommu(dev, &bus, &devfn); 4285 iommu = device_to_iommu(dev, &bus, &devfn);
@@ -4301,7 +4311,7 @@ static void domain_remove_one_dev_info(struct dmar_domain *domain,
4301 * update iommu count and coherency 4311 * update iommu count and coherency
4302 */ 4312 */
4303 if (info->iommu == iommu) 4313 if (info->iommu == iommu)
4304 found = 1; 4314 found = true;
4305 } 4315 }
4306 4316
4307 spin_unlock_irqrestore(&device_domain_lock, flags); 4317 spin_unlock_irqrestore(&device_domain_lock, flags);
@@ -4339,44 +4349,45 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width)
4339 return 0; 4349 return 0;
4340} 4350}
4341 4351
4342static int intel_iommu_domain_init(struct iommu_domain *domain) 4352static struct iommu_domain *intel_iommu_domain_alloc(unsigned type)
4343{ 4353{
4344 struct dmar_domain *dmar_domain; 4354 struct dmar_domain *dmar_domain;
4355 struct iommu_domain *domain;
4356
4357 if (type != IOMMU_DOMAIN_UNMANAGED)
4358 return NULL;
4345 4359
4346 dmar_domain = alloc_domain(DOMAIN_FLAG_VIRTUAL_MACHINE); 4360 dmar_domain = alloc_domain(DOMAIN_FLAG_VIRTUAL_MACHINE);
4347 if (!dmar_domain) { 4361 if (!dmar_domain) {
4348 printk(KERN_ERR 4362 printk(KERN_ERR
4349 "intel_iommu_domain_init: dmar_domain == NULL\n"); 4363 "intel_iommu_domain_init: dmar_domain == NULL\n");
4350 return -ENOMEM; 4364 return NULL;
4351 } 4365 }
4352 if (md_domain_init(dmar_domain, DEFAULT_DOMAIN_ADDRESS_WIDTH)) { 4366 if (md_domain_init(dmar_domain, DEFAULT_DOMAIN_ADDRESS_WIDTH)) {
4353 printk(KERN_ERR 4367 printk(KERN_ERR
4354 "intel_iommu_domain_init() failed\n"); 4368 "intel_iommu_domain_init() failed\n");
4355 domain_exit(dmar_domain); 4369 domain_exit(dmar_domain);
4356 return -ENOMEM; 4370 return NULL;
4357 } 4371 }
4358 domain_update_iommu_cap(dmar_domain); 4372 domain_update_iommu_cap(dmar_domain);
4359 domain->priv = dmar_domain;
4360 4373
4374 domain = &dmar_domain->domain;
4361 domain->geometry.aperture_start = 0; 4375 domain->geometry.aperture_start = 0;
4362 domain->geometry.aperture_end = __DOMAIN_MAX_ADDR(dmar_domain->gaw); 4376 domain->geometry.aperture_end = __DOMAIN_MAX_ADDR(dmar_domain->gaw);
4363 domain->geometry.force_aperture = true; 4377 domain->geometry.force_aperture = true;
4364 4378
4365 return 0; 4379 return domain;
4366} 4380}
4367 4381
4368static void intel_iommu_domain_destroy(struct iommu_domain *domain) 4382static void intel_iommu_domain_free(struct iommu_domain *domain)
4369{ 4383{
4370 struct dmar_domain *dmar_domain = domain->priv; 4384 domain_exit(to_dmar_domain(domain));
4371
4372 domain->priv = NULL;
4373 domain_exit(dmar_domain);
4374} 4385}
4375 4386
4376static int intel_iommu_attach_device(struct iommu_domain *domain, 4387static int intel_iommu_attach_device(struct iommu_domain *domain,
4377 struct device *dev) 4388 struct device *dev)
4378{ 4389{
4379 struct dmar_domain *dmar_domain = domain->priv; 4390 struct dmar_domain *dmar_domain = to_dmar_domain(domain);
4380 struct intel_iommu *iommu; 4391 struct intel_iommu *iommu;
4381 int addr_width; 4392 int addr_width;
4382 u8 bus, devfn; 4393 u8 bus, devfn;
@@ -4441,16 +4452,14 @@ static int intel_iommu_attach_device(struct iommu_domain *domain,
4441static void intel_iommu_detach_device(struct iommu_domain *domain, 4452static void intel_iommu_detach_device(struct iommu_domain *domain,
4442 struct device *dev) 4453 struct device *dev)
4443{ 4454{
4444 struct dmar_domain *dmar_domain = domain->priv; 4455 domain_remove_one_dev_info(to_dmar_domain(domain), dev);
4445
4446 domain_remove_one_dev_info(dmar_domain, dev);
4447} 4456}
4448 4457
4449static int intel_iommu_map(struct iommu_domain *domain, 4458static int intel_iommu_map(struct iommu_domain *domain,
4450 unsigned long iova, phys_addr_t hpa, 4459 unsigned long iova, phys_addr_t hpa,
4451 size_t size, int iommu_prot) 4460 size_t size, int iommu_prot)
4452{ 4461{
4453 struct dmar_domain *dmar_domain = domain->priv; 4462 struct dmar_domain *dmar_domain = to_dmar_domain(domain);
4454 u64 max_addr; 4463 u64 max_addr;
4455 int prot = 0; 4464 int prot = 0;
4456 int ret; 4465 int ret;
@@ -4487,7 +4496,7 @@ static int intel_iommu_map(struct iommu_domain *domain,
4487static size_t intel_iommu_unmap(struct iommu_domain *domain, 4496static size_t intel_iommu_unmap(struct iommu_domain *domain,
4488 unsigned long iova, size_t size) 4497 unsigned long iova, size_t size)
4489{ 4498{
4490 struct dmar_domain *dmar_domain = domain->priv; 4499 struct dmar_domain *dmar_domain = to_dmar_domain(domain);
4491 struct page *freelist = NULL; 4500 struct page *freelist = NULL;
4492 struct intel_iommu *iommu; 4501 struct intel_iommu *iommu;
4493 unsigned long start_pfn, last_pfn; 4502 unsigned long start_pfn, last_pfn;
@@ -4535,7 +4544,7 @@ static size_t intel_iommu_unmap(struct iommu_domain *domain,
4535static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain, 4544static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain,
4536 dma_addr_t iova) 4545 dma_addr_t iova)
4537{ 4546{
4538 struct dmar_domain *dmar_domain = domain->priv; 4547 struct dmar_domain *dmar_domain = to_dmar_domain(domain);
4539 struct dma_pte *pte; 4548 struct dma_pte *pte;
4540 int level = 0; 4549 int level = 0;
4541 u64 phys = 0; 4550 u64 phys = 0;
@@ -4594,8 +4603,8 @@ static void intel_iommu_remove_device(struct device *dev)
4594 4603
4595static const struct iommu_ops intel_iommu_ops = { 4604static const struct iommu_ops intel_iommu_ops = {
4596 .capable = intel_iommu_capable, 4605 .capable = intel_iommu_capable,
4597 .domain_init = intel_iommu_domain_init, 4606 .domain_alloc = intel_iommu_domain_alloc,
4598 .domain_destroy = intel_iommu_domain_destroy, 4607 .domain_free = intel_iommu_domain_free,
4599 .attach_dev = intel_iommu_attach_device, 4608 .attach_dev = intel_iommu_attach_device,
4600 .detach_dev = intel_iommu_detach_device, 4609 .detach_dev = intel_iommu_detach_device,
4601 .map = intel_iommu_map, 4610 .map = intel_iommu_map,
diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c
index 14de1ab223c8..6c25b3c5b729 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -631,7 +631,7 @@ static int __init intel_enable_irq_remapping(void)
631{ 631{
632 struct dmar_drhd_unit *drhd; 632 struct dmar_drhd_unit *drhd;
633 struct intel_iommu *iommu; 633 struct intel_iommu *iommu;
634 int setup = 0; 634 bool setup = false;
635 int eim = 0; 635 int eim = 0;
636 636
637 if (x2apic_supported()) { 637 if (x2apic_supported()) {
@@ -697,7 +697,7 @@ static int __init intel_enable_irq_remapping(void)
697 */ 697 */
698 for_each_iommu(iommu, drhd) { 698 for_each_iommu(iommu, drhd) {
699 iommu_set_irq_remapping(iommu, eim); 699 iommu_set_irq_remapping(iommu, eim);
700 setup = 1; 700 setup = true;
701 } 701 }
702 702
703 if (!setup) 703 if (!setup)
@@ -856,7 +856,7 @@ static int __init parse_ioapics_under_ir(void)
856{ 856{
857 struct dmar_drhd_unit *drhd; 857 struct dmar_drhd_unit *drhd;
858 struct intel_iommu *iommu; 858 struct intel_iommu *iommu;
859 int ir_supported = 0; 859 bool ir_supported = false;
860 int ioapic_idx; 860 int ioapic_idx;
861 861
862 for_each_iommu(iommu, drhd) 862 for_each_iommu(iommu, drhd)
@@ -864,7 +864,7 @@ static int __init parse_ioapics_under_ir(void)
864 if (ir_parse_ioapic_hpet_scope(drhd->hdr, iommu)) 864 if (ir_parse_ioapic_hpet_scope(drhd->hdr, iommu))
865 return -1; 865 return -1;
866 866
867 ir_supported = 1; 867 ir_supported = true;
868 } 868 }
869 869
870 if (!ir_supported) 870 if (!ir_supported)
@@ -917,7 +917,7 @@ static void disable_irq_remapping(void)
917static int reenable_irq_remapping(int eim) 917static int reenable_irq_remapping(int eim)
918{ 918{
919 struct dmar_drhd_unit *drhd; 919 struct dmar_drhd_unit *drhd;
920 int setup = 0; 920 bool setup = false;
921 struct intel_iommu *iommu = NULL; 921 struct intel_iommu *iommu = NULL;
922 922
923 for_each_iommu(iommu, drhd) 923 for_each_iommu(iommu, drhd)
@@ -933,7 +933,7 @@ static int reenable_irq_remapping(int eim)
933 933
934 /* Set up interrupt remapping for iommu.*/ 934 /* Set up interrupt remapping for iommu.*/
935 iommu_set_irq_remapping(iommu, eim); 935 iommu_set_irq_remapping(iommu, eim);
936 setup = 1; 936 setup = true;
937 } 937 }
938 938
939 if (!setup) 939 if (!setup)
diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
index b610a8dee238..4e460216bd16 100644
--- a/drivers/iommu/io-pgtable-arm.c
+++ b/drivers/iommu/io-pgtable-arm.c
@@ -116,6 +116,8 @@
116#define ARM_32_LPAE_TCR_EAE (1 << 31) 116#define ARM_32_LPAE_TCR_EAE (1 << 31)
117#define ARM_64_LPAE_S2_TCR_RES1 (1 << 31) 117#define ARM_64_LPAE_S2_TCR_RES1 (1 << 31)
118 118
119#define ARM_LPAE_TCR_EPD1 (1 << 23)
120
119#define ARM_LPAE_TCR_TG0_4K (0 << 14) 121#define ARM_LPAE_TCR_TG0_4K (0 << 14)
120#define ARM_LPAE_TCR_TG0_64K (1 << 14) 122#define ARM_LPAE_TCR_TG0_64K (1 << 14)
121#define ARM_LPAE_TCR_TG0_16K (2 << 14) 123#define ARM_LPAE_TCR_TG0_16K (2 << 14)
@@ -621,6 +623,9 @@ arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie)
621 } 623 }
622 624
623 reg |= (64ULL - cfg->ias) << ARM_LPAE_TCR_T0SZ_SHIFT; 625 reg |= (64ULL - cfg->ias) << ARM_LPAE_TCR_T0SZ_SHIFT;
626
627 /* Disable speculative walks through TTBR1 */
628 reg |= ARM_LPAE_TCR_EPD1;
624 cfg->arm_lpae_s1_cfg.tcr = reg; 629 cfg->arm_lpae_s1_cfg.tcr = reg;
625 630
626 /* MAIRs */ 631 /* MAIRs */
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index 72e683df0731..d4f527e56679 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu/iommu.c
@@ -901,36 +901,24 @@ EXPORT_SYMBOL_GPL(iommu_set_fault_handler);
901struct iommu_domain *iommu_domain_alloc(struct bus_type *bus) 901struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
902{ 902{
903 struct iommu_domain *domain; 903 struct iommu_domain *domain;
904 int ret;
905 904
906 if (bus == NULL || bus->iommu_ops == NULL) 905 if (bus == NULL || bus->iommu_ops == NULL)
907 return NULL; 906 return NULL;
908 907
909 domain = kzalloc(sizeof(*domain), GFP_KERNEL); 908 domain = bus->iommu_ops->domain_alloc(IOMMU_DOMAIN_UNMANAGED);
910 if (!domain) 909 if (!domain)
911 return NULL; 910 return NULL;
912 911
913 domain->ops = bus->iommu_ops; 912 domain->ops = bus->iommu_ops;
914 913 domain->type = IOMMU_DOMAIN_UNMANAGED;
915 ret = domain->ops->domain_init(domain);
916 if (ret)
917 goto out_free;
918 914
919 return domain; 915 return domain;
920
921out_free:
922 kfree(domain);
923
924 return NULL;
925} 916}
926EXPORT_SYMBOL_GPL(iommu_domain_alloc); 917EXPORT_SYMBOL_GPL(iommu_domain_alloc);
927 918
928void iommu_domain_free(struct iommu_domain *domain) 919void iommu_domain_free(struct iommu_domain *domain)
929{ 920{
930 if (likely(domain->ops->domain_destroy != NULL)) 921 domain->ops->domain_free(domain);
931 domain->ops->domain_destroy(domain);
932
933 kfree(domain);
934} 922}
935EXPORT_SYMBOL_GPL(iommu_domain_free); 923EXPORT_SYMBOL_GPL(iommu_domain_free);
936 924
@@ -1049,6 +1037,9 @@ int iommu_map(struct iommu_domain *domain, unsigned long iova,
1049 domain->ops->pgsize_bitmap == 0UL)) 1037 domain->ops->pgsize_bitmap == 0UL))
1050 return -ENODEV; 1038 return -ENODEV;
1051 1039
1040 if (unlikely(!(domain->type & __IOMMU_DOMAIN_PAGING)))
1041 return -EINVAL;
1042
1052 /* find out the minimum page size supported */ 1043 /* find out the minimum page size supported */
1053 min_pagesz = 1 << __ffs(domain->ops->pgsize_bitmap); 1044 min_pagesz = 1 << __ffs(domain->ops->pgsize_bitmap);
1054 1045
@@ -1100,6 +1091,9 @@ size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, size_t size)
1100 domain->ops->pgsize_bitmap == 0UL)) 1091 domain->ops->pgsize_bitmap == 0UL))
1101 return -ENODEV; 1092 return -ENODEV;
1102 1093
1094 if (unlikely(!(domain->type & __IOMMU_DOMAIN_PAGING)))
1095 return -EINVAL;
1096
1103 /* find out the minimum page size supported */ 1097 /* find out the minimum page size supported */
1104 min_pagesz = 1 << __ffs(domain->ops->pgsize_bitmap); 1098 min_pagesz = 1 << __ffs(domain->ops->pgsize_bitmap);
1105 1099
diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
index bc39bdf7b99b..1a67c531a07e 100644
--- a/drivers/iommu/ipmmu-vmsa.c
+++ b/drivers/iommu/ipmmu-vmsa.c
@@ -38,7 +38,7 @@ struct ipmmu_vmsa_device {
38 38
39struct ipmmu_vmsa_domain { 39struct ipmmu_vmsa_domain {
40 struct ipmmu_vmsa_device *mmu; 40 struct ipmmu_vmsa_device *mmu;
41 struct iommu_domain *io_domain; 41 struct iommu_domain io_domain;
42 42
43 struct io_pgtable_cfg cfg; 43 struct io_pgtable_cfg cfg;
44 struct io_pgtable_ops *iop; 44 struct io_pgtable_ops *iop;
@@ -56,6 +56,11 @@ struct ipmmu_vmsa_archdata {
56static DEFINE_SPINLOCK(ipmmu_devices_lock); 56static DEFINE_SPINLOCK(ipmmu_devices_lock);
57static LIST_HEAD(ipmmu_devices); 57static LIST_HEAD(ipmmu_devices);
58 58
59static struct ipmmu_vmsa_domain *to_vmsa_domain(struct iommu_domain *dom)
60{
61 return container_of(dom, struct ipmmu_vmsa_domain, io_domain);
62}
63
59#define TLB_LOOP_TIMEOUT 100 /* 100us */ 64#define TLB_LOOP_TIMEOUT 100 /* 100us */
60 65
61/* ----------------------------------------------------------------------------- 66/* -----------------------------------------------------------------------------
@@ -428,7 +433,7 @@ static irqreturn_t ipmmu_domain_irq(struct ipmmu_vmsa_domain *domain)
428 * TODO: We need to look up the faulty device based on the I/O VA. Use 433 * TODO: We need to look up the faulty device based on the I/O VA. Use
429 * the IOMMU device for now. 434 * the IOMMU device for now.
430 */ 435 */
431 if (!report_iommu_fault(domain->io_domain, mmu->dev, iova, 0)) 436 if (!report_iommu_fault(&domain->io_domain, mmu->dev, iova, 0))
432 return IRQ_HANDLED; 437 return IRQ_HANDLED;
433 438
434 dev_err_ratelimited(mmu->dev, 439 dev_err_ratelimited(mmu->dev,
@@ -448,7 +453,7 @@ static irqreturn_t ipmmu_irq(int irq, void *dev)
448 return IRQ_NONE; 453 return IRQ_NONE;
449 454
450 io_domain = mmu->mapping->domain; 455 io_domain = mmu->mapping->domain;
451 domain = io_domain->priv; 456 domain = to_vmsa_domain(io_domain);
452 457
453 return ipmmu_domain_irq(domain); 458 return ipmmu_domain_irq(domain);
454} 459}
@@ -457,25 +462,25 @@ static irqreturn_t ipmmu_irq(int irq, void *dev)
457 * IOMMU Operations 462 * IOMMU Operations
458 */ 463 */
459 464
460static int ipmmu_domain_init(struct iommu_domain *io_domain) 465static struct iommu_domain *ipmmu_domain_alloc(unsigned type)
461{ 466{
462 struct ipmmu_vmsa_domain *domain; 467 struct ipmmu_vmsa_domain *domain;
463 468
469 if (type != IOMMU_DOMAIN_UNMANAGED)
470 return NULL;
471
464 domain = kzalloc(sizeof(*domain), GFP_KERNEL); 472 domain = kzalloc(sizeof(*domain), GFP_KERNEL);
465 if (!domain) 473 if (!domain)
466 return -ENOMEM; 474 return NULL;
467 475
468 spin_lock_init(&domain->lock); 476 spin_lock_init(&domain->lock);
469 477
470 io_domain->priv = domain; 478 return &domain->io_domain;
471 domain->io_domain = io_domain;
472
473 return 0;
474} 479}
475 480
476static void ipmmu_domain_destroy(struct iommu_domain *io_domain) 481static void ipmmu_domain_free(struct iommu_domain *io_domain)
477{ 482{
478 struct ipmmu_vmsa_domain *domain = io_domain->priv; 483 struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);
479 484
480 /* 485 /*
481 * Free the domain resources. We assume that all devices have already 486 * Free the domain resources. We assume that all devices have already
@@ -491,7 +496,7 @@ static int ipmmu_attach_device(struct iommu_domain *io_domain,
491{ 496{
492 struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu; 497 struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu;
493 struct ipmmu_vmsa_device *mmu = archdata->mmu; 498 struct ipmmu_vmsa_device *mmu = archdata->mmu;
494 struct ipmmu_vmsa_domain *domain = io_domain->priv; 499 struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);
495 unsigned long flags; 500 unsigned long flags;
496 unsigned int i; 501 unsigned int i;
497 int ret = 0; 502 int ret = 0;
@@ -532,7 +537,7 @@ static void ipmmu_detach_device(struct iommu_domain *io_domain,
532 struct device *dev) 537 struct device *dev)
533{ 538{
534 struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu; 539 struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu;
535 struct ipmmu_vmsa_domain *domain = io_domain->priv; 540 struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);
536 unsigned int i; 541 unsigned int i;
537 542
538 for (i = 0; i < archdata->num_utlbs; ++i) 543 for (i = 0; i < archdata->num_utlbs; ++i)
@@ -546,7 +551,7 @@ static void ipmmu_detach_device(struct iommu_domain *io_domain,
546static int ipmmu_map(struct iommu_domain *io_domain, unsigned long iova, 551static int ipmmu_map(struct iommu_domain *io_domain, unsigned long iova,
547 phys_addr_t paddr, size_t size, int prot) 552 phys_addr_t paddr, size_t size, int prot)
548{ 553{
549 struct ipmmu_vmsa_domain *domain = io_domain->priv; 554 struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);
550 555
551 if (!domain) 556 if (!domain)
552 return -ENODEV; 557 return -ENODEV;
@@ -557,7 +562,7 @@ static int ipmmu_map(struct iommu_domain *io_domain, unsigned long iova,
557static size_t ipmmu_unmap(struct iommu_domain *io_domain, unsigned long iova, 562static size_t ipmmu_unmap(struct iommu_domain *io_domain, unsigned long iova,
558 size_t size) 563 size_t size)
559{ 564{
560 struct ipmmu_vmsa_domain *domain = io_domain->priv; 565 struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);
561 566
562 return domain->iop->unmap(domain->iop, iova, size); 567 return domain->iop->unmap(domain->iop, iova, size);
563} 568}
@@ -565,7 +570,7 @@ static size_t ipmmu_unmap(struct iommu_domain *io_domain, unsigned long iova,
565static phys_addr_t ipmmu_iova_to_phys(struct iommu_domain *io_domain, 570static phys_addr_t ipmmu_iova_to_phys(struct iommu_domain *io_domain,
566 dma_addr_t iova) 571 dma_addr_t iova)
567{ 572{
568 struct ipmmu_vmsa_domain *domain = io_domain->priv; 573 struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);
569 574
570 /* TODO: Is locking needed ? */ 575 /* TODO: Is locking needed ? */
571 576
@@ -737,8 +742,8 @@ static void ipmmu_remove_device(struct device *dev)
737} 742}
738 743
739static const struct iommu_ops ipmmu_ops = { 744static const struct iommu_ops ipmmu_ops = {
740 .domain_init = ipmmu_domain_init, 745 .domain_alloc = ipmmu_domain_alloc,
741 .domain_destroy = ipmmu_domain_destroy, 746 .domain_free = ipmmu_domain_free,
742 .attach_dev = ipmmu_attach_device, 747 .attach_dev = ipmmu_attach_device,
743 .detach_dev = ipmmu_detach_device, 748 .detach_dev = ipmmu_detach_device,
744 .map = ipmmu_map, 749 .map = ipmmu_map,
diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c
index e1b05379ca0e..15a2063812fa 100644
--- a/drivers/iommu/msm_iommu.c
+++ b/drivers/iommu/msm_iommu.c
@@ -52,8 +52,14 @@ DEFINE_SPINLOCK(msm_iommu_lock);
52struct msm_priv { 52struct msm_priv {
53 unsigned long *pgtable; 53 unsigned long *pgtable;
54 struct list_head list_attached; 54 struct list_head list_attached;
55 struct iommu_domain domain;
55}; 56};
56 57
58static struct msm_priv *to_msm_priv(struct iommu_domain *dom)
59{
60 return container_of(dom, struct msm_priv, domain);
61}
62
57static int __enable_clocks(struct msm_iommu_drvdata *drvdata) 63static int __enable_clocks(struct msm_iommu_drvdata *drvdata)
58{ 64{
59 int ret; 65 int ret;
@@ -79,7 +85,7 @@ static void __disable_clocks(struct msm_iommu_drvdata *drvdata)
79 85
80static int __flush_iotlb(struct iommu_domain *domain) 86static int __flush_iotlb(struct iommu_domain *domain)
81{ 87{
82 struct msm_priv *priv = domain->priv; 88 struct msm_priv *priv = to_msm_priv(domain);
83 struct msm_iommu_drvdata *iommu_drvdata; 89 struct msm_iommu_drvdata *iommu_drvdata;
84 struct msm_iommu_ctx_drvdata *ctx_drvdata; 90 struct msm_iommu_ctx_drvdata *ctx_drvdata;
85 int ret = 0; 91 int ret = 0;
@@ -209,10 +215,14 @@ static void __program_context(void __iomem *base, int ctx, phys_addr_t pgtable)
209 SET_M(base, ctx, 1); 215 SET_M(base, ctx, 1);
210} 216}
211 217
212static int msm_iommu_domain_init(struct iommu_domain *domain) 218static struct iommu_domain *msm_iommu_domain_alloc(unsigned type)
213{ 219{
214 struct msm_priv *priv = kzalloc(sizeof(*priv), GFP_KERNEL); 220 struct msm_priv *priv;
215 221
222 if (type != IOMMU_DOMAIN_UNMANAGED)
223 return NULL;
224
225 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
216 if (!priv) 226 if (!priv)
217 goto fail_nomem; 227 goto fail_nomem;
218 228
@@ -224,20 +234,19 @@ static int msm_iommu_domain_init(struct iommu_domain *domain)
224 goto fail_nomem; 234 goto fail_nomem;
225 235
226 memset(priv->pgtable, 0, SZ_16K); 236 memset(priv->pgtable, 0, SZ_16K);
227 domain->priv = priv;
228 237
229 domain->geometry.aperture_start = 0; 238 priv->domain.geometry.aperture_start = 0;
230 domain->geometry.aperture_end = (1ULL << 32) - 1; 239 priv->domain.geometry.aperture_end = (1ULL << 32) - 1;
231 domain->geometry.force_aperture = true; 240 priv->domain.geometry.force_aperture = true;
232 241
233 return 0; 242 return &priv->domain;
234 243
235fail_nomem: 244fail_nomem:
236 kfree(priv); 245 kfree(priv);
237 return -ENOMEM; 246 return NULL;
238} 247}
239 248
240static void msm_iommu_domain_destroy(struct iommu_domain *domain) 249static void msm_iommu_domain_free(struct iommu_domain *domain)
241{ 250{
242 struct msm_priv *priv; 251 struct msm_priv *priv;
243 unsigned long flags; 252 unsigned long flags;
@@ -245,20 +254,17 @@ static void msm_iommu_domain_destroy(struct iommu_domain *domain)
245 int i; 254 int i;
246 255
247 spin_lock_irqsave(&msm_iommu_lock, flags); 256 spin_lock_irqsave(&msm_iommu_lock, flags);
248 priv = domain->priv; 257 priv = to_msm_priv(domain);
249 domain->priv = NULL;
250 258
251 if (priv) { 259 fl_table = priv->pgtable;
252 fl_table = priv->pgtable;
253 260
254 for (i = 0; i < NUM_FL_PTE; i++) 261 for (i = 0; i < NUM_FL_PTE; i++)
255 if ((fl_table[i] & 0x03) == FL_TYPE_TABLE) 262 if ((fl_table[i] & 0x03) == FL_TYPE_TABLE)
256 free_page((unsigned long) __va(((fl_table[i]) & 263 free_page((unsigned long) __va(((fl_table[i]) &
257 FL_BASE_MASK))); 264 FL_BASE_MASK)));
258 265
259 free_pages((unsigned long)priv->pgtable, get_order(SZ_16K)); 266 free_pages((unsigned long)priv->pgtable, get_order(SZ_16K));
260 priv->pgtable = NULL; 267 priv->pgtable = NULL;
261 }
262 268
263 kfree(priv); 269 kfree(priv);
264 spin_unlock_irqrestore(&msm_iommu_lock, flags); 270 spin_unlock_irqrestore(&msm_iommu_lock, flags);
@@ -276,9 +282,9 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev)
276 282
277 spin_lock_irqsave(&msm_iommu_lock, flags); 283 spin_lock_irqsave(&msm_iommu_lock, flags);
278 284
279 priv = domain->priv; 285 priv = to_msm_priv(domain);
280 286
281 if (!priv || !dev) { 287 if (!dev) {
282 ret = -EINVAL; 288 ret = -EINVAL;
283 goto fail; 289 goto fail;
284 } 290 }
@@ -330,9 +336,9 @@ static void msm_iommu_detach_dev(struct iommu_domain *domain,
330 int ret; 336 int ret;
331 337
332 spin_lock_irqsave(&msm_iommu_lock, flags); 338 spin_lock_irqsave(&msm_iommu_lock, flags);
333 priv = domain->priv; 339 priv = to_msm_priv(domain);
334 340
335 if (!priv || !dev) 341 if (!dev)
336 goto fail; 342 goto fail;
337 343
338 iommu_drvdata = dev_get_drvdata(dev->parent); 344 iommu_drvdata = dev_get_drvdata(dev->parent);
@@ -382,11 +388,7 @@ static int msm_iommu_map(struct iommu_domain *domain, unsigned long va,
382 goto fail; 388 goto fail;
383 } 389 }
384 390
385 priv = domain->priv; 391 priv = to_msm_priv(domain);
386 if (!priv) {
387 ret = -EINVAL;
388 goto fail;
389 }
390 392
391 fl_table = priv->pgtable; 393 fl_table = priv->pgtable;
392 394
@@ -484,10 +486,7 @@ static size_t msm_iommu_unmap(struct iommu_domain *domain, unsigned long va,
484 486
485 spin_lock_irqsave(&msm_iommu_lock, flags); 487 spin_lock_irqsave(&msm_iommu_lock, flags);
486 488
487 priv = domain->priv; 489 priv = to_msm_priv(domain);
488
489 if (!priv)
490 goto fail;
491 490
492 fl_table = priv->pgtable; 491 fl_table = priv->pgtable;
493 492
@@ -566,7 +565,7 @@ static phys_addr_t msm_iommu_iova_to_phys(struct iommu_domain *domain,
566 565
567 spin_lock_irqsave(&msm_iommu_lock, flags); 566 spin_lock_irqsave(&msm_iommu_lock, flags);
568 567
569 priv = domain->priv; 568 priv = to_msm_priv(domain);
570 if (list_empty(&priv->list_attached)) 569 if (list_empty(&priv->list_attached))
571 goto fail; 570 goto fail;
572 571
@@ -674,8 +673,8 @@ fail:
674 673
675static const struct iommu_ops msm_iommu_ops = { 674static const struct iommu_ops msm_iommu_ops = {
676 .capable = msm_iommu_capable, 675 .capable = msm_iommu_capable,
677 .domain_init = msm_iommu_domain_init, 676 .domain_alloc = msm_iommu_domain_alloc,
678 .domain_destroy = msm_iommu_domain_destroy, 677 .domain_free = msm_iommu_domain_free,
679 .attach_dev = msm_iommu_attach_dev, 678 .attach_dev = msm_iommu_attach_dev,
680 .detach_dev = msm_iommu_detach_dev, 679 .detach_dev = msm_iommu_detach_dev,
681 .map = msm_iommu_map, 680 .map = msm_iommu_map,
diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c
index a4ba851825c2..a22c33d6a486 100644
--- a/drivers/iommu/omap-iommu.c
+++ b/drivers/iommu/omap-iommu.c
@@ -59,6 +59,7 @@ struct omap_iommu_domain {
59 struct omap_iommu *iommu_dev; 59 struct omap_iommu *iommu_dev;
60 struct device *dev; 60 struct device *dev;
61 spinlock_t lock; 61 spinlock_t lock;
62 struct iommu_domain domain;
62}; 63};
63 64
64#define MMU_LOCK_BASE_SHIFT 10 65#define MMU_LOCK_BASE_SHIFT 10
@@ -80,6 +81,15 @@ static struct platform_driver omap_iommu_driver;
80static struct kmem_cache *iopte_cachep; 81static struct kmem_cache *iopte_cachep;
81 82
82/** 83/**
84 * to_omap_domain - Get struct omap_iommu_domain from generic iommu_domain
85 * @dom: generic iommu domain handle
86 **/
87static struct omap_iommu_domain *to_omap_domain(struct iommu_domain *dom)
88{
89 return container_of(dom, struct omap_iommu_domain, domain);
90}
91
92/**
83 * omap_iommu_save_ctx - Save registers for pm off-mode support 93 * omap_iommu_save_ctx - Save registers for pm off-mode support
84 * @dev: client device 94 * @dev: client device
85 **/ 95 **/
@@ -901,7 +911,7 @@ static irqreturn_t iommu_fault_handler(int irq, void *data)
901 u32 *iopgd, *iopte; 911 u32 *iopgd, *iopte;
902 struct omap_iommu *obj = data; 912 struct omap_iommu *obj = data;
903 struct iommu_domain *domain = obj->domain; 913 struct iommu_domain *domain = obj->domain;
904 struct omap_iommu_domain *omap_domain = domain->priv; 914 struct omap_iommu_domain *omap_domain = to_omap_domain(domain);
905 915
906 if (!omap_domain->iommu_dev) 916 if (!omap_domain->iommu_dev)
907 return IRQ_NONE; 917 return IRQ_NONE;
@@ -1113,7 +1123,7 @@ static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa, int pgsz)
1113static int omap_iommu_map(struct iommu_domain *domain, unsigned long da, 1123static int omap_iommu_map(struct iommu_domain *domain, unsigned long da,
1114 phys_addr_t pa, size_t bytes, int prot) 1124 phys_addr_t pa, size_t bytes, int prot)
1115{ 1125{
1116 struct omap_iommu_domain *omap_domain = domain->priv; 1126 struct omap_iommu_domain *omap_domain = to_omap_domain(domain);
1117 struct omap_iommu *oiommu = omap_domain->iommu_dev; 1127 struct omap_iommu *oiommu = omap_domain->iommu_dev;
1118 struct device *dev = oiommu->dev; 1128 struct device *dev = oiommu->dev;
1119 struct iotlb_entry e; 1129 struct iotlb_entry e;
@@ -1140,7 +1150,7 @@ static int omap_iommu_map(struct iommu_domain *domain, unsigned long da,
1140static size_t omap_iommu_unmap(struct iommu_domain *domain, unsigned long da, 1150static size_t omap_iommu_unmap(struct iommu_domain *domain, unsigned long da,
1141 size_t size) 1151 size_t size)
1142{ 1152{
1143 struct omap_iommu_domain *omap_domain = domain->priv; 1153 struct omap_iommu_domain *omap_domain = to_omap_domain(domain);
1144 struct omap_iommu *oiommu = omap_domain->iommu_dev; 1154 struct omap_iommu *oiommu = omap_domain->iommu_dev;
1145 struct device *dev = oiommu->dev; 1155 struct device *dev = oiommu->dev;
1146 1156
@@ -1152,7 +1162,7 @@ static size_t omap_iommu_unmap(struct iommu_domain *domain, unsigned long da,
1152static int 1162static int
1153omap_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) 1163omap_iommu_attach_dev(struct iommu_domain *domain, struct device *dev)
1154{ 1164{
1155 struct omap_iommu_domain *omap_domain = domain->priv; 1165 struct omap_iommu_domain *omap_domain = to_omap_domain(domain);
1156 struct omap_iommu *oiommu; 1166 struct omap_iommu *oiommu;
1157 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; 1167 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
1158 int ret = 0; 1168 int ret = 0;
@@ -1212,17 +1222,20 @@ static void _omap_iommu_detach_dev(struct omap_iommu_domain *omap_domain,
1212static void omap_iommu_detach_dev(struct iommu_domain *domain, 1222static void omap_iommu_detach_dev(struct iommu_domain *domain,
1213 struct device *dev) 1223 struct device *dev)
1214{ 1224{
1215 struct omap_iommu_domain *omap_domain = domain->priv; 1225 struct omap_iommu_domain *omap_domain = to_omap_domain(domain);
1216 1226
1217 spin_lock(&omap_domain->lock); 1227 spin_lock(&omap_domain->lock);
1218 _omap_iommu_detach_dev(omap_domain, dev); 1228 _omap_iommu_detach_dev(omap_domain, dev);
1219 spin_unlock(&omap_domain->lock); 1229 spin_unlock(&omap_domain->lock);
1220} 1230}
1221 1231
1222static int omap_iommu_domain_init(struct iommu_domain *domain) 1232static struct iommu_domain *omap_iommu_domain_alloc(unsigned type)
1223{ 1233{
1224 struct omap_iommu_domain *omap_domain; 1234 struct omap_iommu_domain *omap_domain;
1225 1235
1236 if (type != IOMMU_DOMAIN_UNMANAGED)
1237 return NULL;
1238
1226 omap_domain = kzalloc(sizeof(*omap_domain), GFP_KERNEL); 1239 omap_domain = kzalloc(sizeof(*omap_domain), GFP_KERNEL);
1227 if (!omap_domain) { 1240 if (!omap_domain) {
1228 pr_err("kzalloc failed\n"); 1241 pr_err("kzalloc failed\n");
@@ -1244,25 +1257,21 @@ static int omap_iommu_domain_init(struct iommu_domain *domain)
1244 clean_dcache_area(omap_domain->pgtable, IOPGD_TABLE_SIZE); 1257 clean_dcache_area(omap_domain->pgtable, IOPGD_TABLE_SIZE);
1245 spin_lock_init(&omap_domain->lock); 1258 spin_lock_init(&omap_domain->lock);
1246 1259
1247 domain->priv = omap_domain; 1260 omap_domain->domain.geometry.aperture_start = 0;
1261 omap_domain->domain.geometry.aperture_end = (1ULL << 32) - 1;
1262 omap_domain->domain.geometry.force_aperture = true;
1248 1263
1249 domain->geometry.aperture_start = 0; 1264 return &omap_domain->domain;
1250 domain->geometry.aperture_end = (1ULL << 32) - 1;
1251 domain->geometry.force_aperture = true;
1252
1253 return 0;
1254 1265
1255fail_nomem: 1266fail_nomem:
1256 kfree(omap_domain); 1267 kfree(omap_domain);
1257out: 1268out:
1258 return -ENOMEM; 1269 return NULL;
1259} 1270}
1260 1271
1261static void omap_iommu_domain_destroy(struct iommu_domain *domain) 1272static void omap_iommu_domain_free(struct iommu_domain *domain)
1262{ 1273{
1263 struct omap_iommu_domain *omap_domain = domain->priv; 1274 struct omap_iommu_domain *omap_domain = to_omap_domain(domain);
1264
1265 domain->priv = NULL;
1266 1275
1267 /* 1276 /*
1268 * An iommu device is still attached 1277 * An iommu device is still attached
@@ -1278,7 +1287,7 @@ static void omap_iommu_domain_destroy(struct iommu_domain *domain)
1278static phys_addr_t omap_iommu_iova_to_phys(struct iommu_domain *domain, 1287static phys_addr_t omap_iommu_iova_to_phys(struct iommu_domain *domain,
1279 dma_addr_t da) 1288 dma_addr_t da)
1280{ 1289{
1281 struct omap_iommu_domain *omap_domain = domain->priv; 1290 struct omap_iommu_domain *omap_domain = to_omap_domain(domain);
1282 struct omap_iommu *oiommu = omap_domain->iommu_dev; 1291 struct omap_iommu *oiommu = omap_domain->iommu_dev;
1283 struct device *dev = oiommu->dev; 1292 struct device *dev = oiommu->dev;
1284 u32 *pgd, *pte; 1293 u32 *pgd, *pte;
@@ -1358,8 +1367,8 @@ static void omap_iommu_remove_device(struct device *dev)
1358} 1367}
1359 1368
1360static const struct iommu_ops omap_iommu_ops = { 1369static const struct iommu_ops omap_iommu_ops = {
1361 .domain_init = omap_iommu_domain_init, 1370 .domain_alloc = omap_iommu_domain_alloc,
1362 .domain_destroy = omap_iommu_domain_destroy, 1371 .domain_free = omap_iommu_domain_free,
1363 .attach_dev = omap_iommu_attach_dev, 1372 .attach_dev = omap_iommu_attach_dev,
1364 .detach_dev = omap_iommu_detach_dev, 1373 .detach_dev = omap_iommu_detach_dev,
1365 .map = omap_iommu_map, 1374 .map = omap_iommu_map,
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 9f74fddcd304..4015560bf486 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -80,6 +80,8 @@ struct rk_iommu_domain {
80 u32 *dt; /* page directory table */ 80 u32 *dt; /* page directory table */
81 spinlock_t iommus_lock; /* lock for iommus list */ 81 spinlock_t iommus_lock; /* lock for iommus list */
82 spinlock_t dt_lock; /* lock for modifying page directory table */ 82 spinlock_t dt_lock; /* lock for modifying page directory table */
83
84 struct iommu_domain domain;
83}; 85};
84 86
85struct rk_iommu { 87struct rk_iommu {
@@ -100,6 +102,11 @@ static inline void rk_table_flush(u32 *va, unsigned int count)
100 outer_flush_range(pa_start, pa_end); 102 outer_flush_range(pa_start, pa_end);
101} 103}
102 104
105static struct rk_iommu_domain *to_rk_domain(struct iommu_domain *dom)
106{
107 return container_of(dom, struct rk_iommu_domain, domain);
108}
109
103/** 110/**
104 * Inspired by _wait_for in intel_drv.h 111 * Inspired by _wait_for in intel_drv.h
105 * This is NOT safe for use in interrupt context. 112 * This is NOT safe for use in interrupt context.
@@ -503,7 +510,7 @@ static irqreturn_t rk_iommu_irq(int irq, void *dev_id)
503static phys_addr_t rk_iommu_iova_to_phys(struct iommu_domain *domain, 510static phys_addr_t rk_iommu_iova_to_phys(struct iommu_domain *domain,
504 dma_addr_t iova) 511 dma_addr_t iova)
505{ 512{
506 struct rk_iommu_domain *rk_domain = domain->priv; 513 struct rk_iommu_domain *rk_domain = to_rk_domain(domain);
507 unsigned long flags; 514 unsigned long flags;
508 phys_addr_t pt_phys, phys = 0; 515 phys_addr_t pt_phys, phys = 0;
509 u32 dte, pte; 516 u32 dte, pte;
@@ -639,7 +646,7 @@ unwind:
639static int rk_iommu_map(struct iommu_domain *domain, unsigned long _iova, 646static int rk_iommu_map(struct iommu_domain *domain, unsigned long _iova,
640 phys_addr_t paddr, size_t size, int prot) 647 phys_addr_t paddr, size_t size, int prot)
641{ 648{
642 struct rk_iommu_domain *rk_domain = domain->priv; 649 struct rk_iommu_domain *rk_domain = to_rk_domain(domain);
643 unsigned long flags; 650 unsigned long flags;
644 dma_addr_t iova = (dma_addr_t)_iova; 651 dma_addr_t iova = (dma_addr_t)_iova;
645 u32 *page_table, *pte_addr; 652 u32 *page_table, *pte_addr;
@@ -670,7 +677,7 @@ static int rk_iommu_map(struct iommu_domain *domain, unsigned long _iova,
670static size_t rk_iommu_unmap(struct iommu_domain *domain, unsigned long _iova, 677static size_t rk_iommu_unmap(struct iommu_domain *domain, unsigned long _iova,
671 size_t size) 678 size_t size)
672{ 679{
673 struct rk_iommu_domain *rk_domain = domain->priv; 680 struct rk_iommu_domain *rk_domain = to_rk_domain(domain);
674 unsigned long flags; 681 unsigned long flags;
675 dma_addr_t iova = (dma_addr_t)_iova; 682 dma_addr_t iova = (dma_addr_t)_iova;
676 phys_addr_t pt_phys; 683 phys_addr_t pt_phys;
@@ -726,7 +733,7 @@ static int rk_iommu_attach_device(struct iommu_domain *domain,
726 struct device *dev) 733 struct device *dev)
727{ 734{
728 struct rk_iommu *iommu; 735 struct rk_iommu *iommu;
729 struct rk_iommu_domain *rk_domain = domain->priv; 736 struct rk_iommu_domain *rk_domain = to_rk_domain(domain);
730 unsigned long flags; 737 unsigned long flags;
731 int ret; 738 int ret;
732 phys_addr_t dte_addr; 739 phys_addr_t dte_addr;
@@ -778,7 +785,7 @@ static void rk_iommu_detach_device(struct iommu_domain *domain,
778 struct device *dev) 785 struct device *dev)
779{ 786{
780 struct rk_iommu *iommu; 787 struct rk_iommu *iommu;
781 struct rk_iommu_domain *rk_domain = domain->priv; 788 struct rk_iommu_domain *rk_domain = to_rk_domain(domain);
782 unsigned long flags; 789 unsigned long flags;
783 790
784 /* Allow 'virtual devices' (eg drm) to detach from domain */ 791 /* Allow 'virtual devices' (eg drm) to detach from domain */
@@ -804,13 +811,16 @@ static void rk_iommu_detach_device(struct iommu_domain *domain,
804 dev_info(dev, "Detached from iommu domain\n"); 811 dev_info(dev, "Detached from iommu domain\n");
805} 812}
806 813
807static int rk_iommu_domain_init(struct iommu_domain *domain) 814static struct iommu_domain *rk_iommu_domain_alloc(unsigned type)
808{ 815{
809 struct rk_iommu_domain *rk_domain; 816 struct rk_iommu_domain *rk_domain;
810 817
818 if (type != IOMMU_DOMAIN_UNMANAGED)
819 return NULL;
820
811 rk_domain = kzalloc(sizeof(*rk_domain), GFP_KERNEL); 821 rk_domain = kzalloc(sizeof(*rk_domain), GFP_KERNEL);
812 if (!rk_domain) 822 if (!rk_domain)
813 return -ENOMEM; 823 return NULL;
814 824
815 /* 825 /*
816 * rk32xx iommus use a 2 level pagetable. 826 * rk32xx iommus use a 2 level pagetable.
@@ -827,17 +837,16 @@ static int rk_iommu_domain_init(struct iommu_domain *domain)
827 spin_lock_init(&rk_domain->dt_lock); 837 spin_lock_init(&rk_domain->dt_lock);
828 INIT_LIST_HEAD(&rk_domain->iommus); 838 INIT_LIST_HEAD(&rk_domain->iommus);
829 839
830 domain->priv = rk_domain; 840 return &rk_domain->domain;
831 841
832 return 0;
833err_dt: 842err_dt:
834 kfree(rk_domain); 843 kfree(rk_domain);
835 return -ENOMEM; 844 return NULL;
836} 845}
837 846
838static void rk_iommu_domain_destroy(struct iommu_domain *domain) 847static void rk_iommu_domain_free(struct iommu_domain *domain)
839{ 848{
840 struct rk_iommu_domain *rk_domain = domain->priv; 849 struct rk_iommu_domain *rk_domain = to_rk_domain(domain);
841 int i; 850 int i;
842 851
843 WARN_ON(!list_empty(&rk_domain->iommus)); 852 WARN_ON(!list_empty(&rk_domain->iommus));
@@ -852,8 +861,7 @@ static void rk_iommu_domain_destroy(struct iommu_domain *domain)
852 } 861 }
853 862
854 free_page((unsigned long)rk_domain->dt); 863 free_page((unsigned long)rk_domain->dt);
855 kfree(domain->priv); 864 kfree(rk_domain);
856 domain->priv = NULL;
857} 865}
858 866
859static bool rk_iommu_is_dev_iommu_master(struct device *dev) 867static bool rk_iommu_is_dev_iommu_master(struct device *dev)
@@ -952,8 +960,8 @@ static void rk_iommu_remove_device(struct device *dev)
952} 960}
953 961
954static const struct iommu_ops rk_iommu_ops = { 962static const struct iommu_ops rk_iommu_ops = {
955 .domain_init = rk_iommu_domain_init, 963 .domain_alloc = rk_iommu_domain_alloc,
956 .domain_destroy = rk_iommu_domain_destroy, 964 .domain_free = rk_iommu_domain_free,
957 .attach_dev = rk_iommu_attach_device, 965 .attach_dev = rk_iommu_attach_device,
958 .detach_dev = rk_iommu_detach_device, 966 .detach_dev = rk_iommu_detach_device,
959 .map = rk_iommu_map, 967 .map = rk_iommu_map,
diff --git a/drivers/iommu/shmobile-iommu.c b/drivers/iommu/shmobile-iommu.c
index f1b00774e4de..a0287519a1d4 100644
--- a/drivers/iommu/shmobile-iommu.c
+++ b/drivers/iommu/shmobile-iommu.c
@@ -42,11 +42,17 @@ struct shmobile_iommu_domain {
42 spinlock_t map_lock; 42 spinlock_t map_lock;
43 spinlock_t attached_list_lock; 43 spinlock_t attached_list_lock;
44 struct list_head attached_list; 44 struct list_head attached_list;
45 struct iommu_domain domain;
45}; 46};
46 47
47static struct shmobile_iommu_archdata *ipmmu_archdata; 48static struct shmobile_iommu_archdata *ipmmu_archdata;
48static struct kmem_cache *l1cache, *l2cache; 49static struct kmem_cache *l1cache, *l2cache;
49 50
51static struct shmobile_iommu_domain *to_sh_domain(struct iommu_domain *dom)
52{
53 return container_of(dom, struct shmobile_iommu_domain, domain);
54}
55
50static int pgtable_alloc(struct shmobile_iommu_domain_pgtable *pgtable, 56static int pgtable_alloc(struct shmobile_iommu_domain_pgtable *pgtable,
51 struct kmem_cache *cache, size_t size) 57 struct kmem_cache *cache, size_t size)
52{ 58{
@@ -82,31 +88,33 @@ static void pgtable_write(struct shmobile_iommu_domain_pgtable *pgtable,
82 sizeof(val) * count, DMA_TO_DEVICE); 88 sizeof(val) * count, DMA_TO_DEVICE);
83} 89}
84 90
85static int shmobile_iommu_domain_init(struct iommu_domain *domain) 91static struct iommu_domain *shmobile_iommu_domain_alloc(unsigned type)
86{ 92{
87 struct shmobile_iommu_domain *sh_domain; 93 struct shmobile_iommu_domain *sh_domain;
88 int i, ret; 94 int i, ret;
89 95
90 sh_domain = kmalloc(sizeof(*sh_domain), GFP_KERNEL); 96 if (type != IOMMU_DOMAIN_UNMANAGED)
97 return NULL;
98
99 sh_domain = kzalloc(sizeof(*sh_domain), GFP_KERNEL);
91 if (!sh_domain) 100 if (!sh_domain)
92 return -ENOMEM; 101 return NULL;
93 ret = pgtable_alloc(&sh_domain->l1, l1cache, L1_SIZE); 102 ret = pgtable_alloc(&sh_domain->l1, l1cache, L1_SIZE);
94 if (ret < 0) { 103 if (ret < 0) {
95 kfree(sh_domain); 104 kfree(sh_domain);
96 return ret; 105 return NULL;
97 } 106 }
98 for (i = 0; i < L1_LEN; i++) 107 for (i = 0; i < L1_LEN; i++)
99 sh_domain->l2[i].pgtable = NULL; 108 sh_domain->l2[i].pgtable = NULL;
100 spin_lock_init(&sh_domain->map_lock); 109 spin_lock_init(&sh_domain->map_lock);
101 spin_lock_init(&sh_domain->attached_list_lock); 110 spin_lock_init(&sh_domain->attached_list_lock);
102 INIT_LIST_HEAD(&sh_domain->attached_list); 111 INIT_LIST_HEAD(&sh_domain->attached_list);
103 domain->priv = sh_domain; 112 return &sh_domain->domain;
104 return 0;
105} 113}
106 114
107static void shmobile_iommu_domain_destroy(struct iommu_domain *domain) 115static void shmobile_iommu_domain_free(struct iommu_domain *domain)
108{ 116{
109 struct shmobile_iommu_domain *sh_domain = domain->priv; 117 struct shmobile_iommu_domain *sh_domain = to_sh_domain(domain);
110 int i; 118 int i;
111 119
112 for (i = 0; i < L1_LEN; i++) { 120 for (i = 0; i < L1_LEN; i++) {
@@ -115,14 +123,13 @@ static void shmobile_iommu_domain_destroy(struct iommu_domain *domain)
115 } 123 }
116 pgtable_free(&sh_domain->l1, l1cache, L1_SIZE); 124 pgtable_free(&sh_domain->l1, l1cache, L1_SIZE);
117 kfree(sh_domain); 125 kfree(sh_domain);
118 domain->priv = NULL;
119} 126}
120 127
121static int shmobile_iommu_attach_device(struct iommu_domain *domain, 128static int shmobile_iommu_attach_device(struct iommu_domain *domain,
122 struct device *dev) 129 struct device *dev)
123{ 130{
124 struct shmobile_iommu_archdata *archdata = dev->archdata.iommu; 131 struct shmobile_iommu_archdata *archdata = dev->archdata.iommu;
125 struct shmobile_iommu_domain *sh_domain = domain->priv; 132 struct shmobile_iommu_domain *sh_domain = to_sh_domain(domain);
126 int ret = -EBUSY; 133 int ret = -EBUSY;
127 134
128 if (!archdata) 135 if (!archdata)
@@ -151,7 +158,7 @@ static void shmobile_iommu_detach_device(struct iommu_domain *domain,
151 struct device *dev) 158 struct device *dev)
152{ 159{
153 struct shmobile_iommu_archdata *archdata = dev->archdata.iommu; 160 struct shmobile_iommu_archdata *archdata = dev->archdata.iommu;
154 struct shmobile_iommu_domain *sh_domain = domain->priv; 161 struct shmobile_iommu_domain *sh_domain = to_sh_domain(domain);
155 162
156 if (!archdata) 163 if (!archdata)
157 return; 164 return;
@@ -214,7 +221,7 @@ static int shmobile_iommu_map(struct iommu_domain *domain, unsigned long iova,
214 phys_addr_t paddr, size_t size, int prot) 221 phys_addr_t paddr, size_t size, int prot)
215{ 222{
216 struct shmobile_iommu_domain_pgtable l2 = { .pgtable = NULL }; 223 struct shmobile_iommu_domain_pgtable l2 = { .pgtable = NULL };
217 struct shmobile_iommu_domain *sh_domain = domain->priv; 224 struct shmobile_iommu_domain *sh_domain = to_sh_domain(domain);
218 unsigned int l1index, l2index; 225 unsigned int l1index, l2index;
219 int ret; 226 int ret;
220 227
@@ -258,7 +265,7 @@ static size_t shmobile_iommu_unmap(struct iommu_domain *domain,
258 unsigned long iova, size_t size) 265 unsigned long iova, size_t size)
259{ 266{
260 struct shmobile_iommu_domain_pgtable l2 = { .pgtable = NULL }; 267 struct shmobile_iommu_domain_pgtable l2 = { .pgtable = NULL };
261 struct shmobile_iommu_domain *sh_domain = domain->priv; 268 struct shmobile_iommu_domain *sh_domain = to_sh_domain(domain);
262 unsigned int l1index, l2index; 269 unsigned int l1index, l2index;
263 uint32_t l2entry = 0; 270 uint32_t l2entry = 0;
264 size_t ret = 0; 271 size_t ret = 0;
@@ -298,7 +305,7 @@ done:
298static phys_addr_t shmobile_iommu_iova_to_phys(struct iommu_domain *domain, 305static phys_addr_t shmobile_iommu_iova_to_phys(struct iommu_domain *domain,
299 dma_addr_t iova) 306 dma_addr_t iova)
300{ 307{
301 struct shmobile_iommu_domain *sh_domain = domain->priv; 308 struct shmobile_iommu_domain *sh_domain = to_sh_domain(domain);
302 uint32_t l1entry = 0, l2entry = 0; 309 uint32_t l1entry = 0, l2entry = 0;
303 unsigned int l1index, l2index; 310 unsigned int l1index, l2index;
304 311
@@ -355,8 +362,8 @@ static int shmobile_iommu_add_device(struct device *dev)
355} 362}
356 363
357static const struct iommu_ops shmobile_iommu_ops = { 364static const struct iommu_ops shmobile_iommu_ops = {
358 .domain_init = shmobile_iommu_domain_init, 365 .domain_alloc = shmobile_iommu_domain_alloc,
359 .domain_destroy = shmobile_iommu_domain_destroy, 366 .domain_free = shmobile_iommu_domain_free,
360 .attach_dev = shmobile_iommu_attach_device, 367 .attach_dev = shmobile_iommu_attach_device,
361 .detach_dev = shmobile_iommu_detach_device, 368 .detach_dev = shmobile_iommu_detach_device,
362 .map = shmobile_iommu_map, 369 .map = shmobile_iommu_map,
diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c
index c48da057dbb1..37e708fdbb5a 100644
--- a/drivers/iommu/tegra-gart.c
+++ b/drivers/iommu/tegra-gart.c
@@ -63,11 +63,21 @@ struct gart_device {
63 struct device *dev; 63 struct device *dev;
64}; 64};
65 65
66struct gart_domain {
67 struct iommu_domain domain; /* generic domain handle */
68 struct gart_device *gart; /* link to gart device */
69};
70
66static struct gart_device *gart_handle; /* unique for a system */ 71static struct gart_device *gart_handle; /* unique for a system */
67 72
68#define GART_PTE(_pfn) \ 73#define GART_PTE(_pfn) \
69 (GART_ENTRY_PHYS_ADDR_VALID | ((_pfn) << PAGE_SHIFT)) 74 (GART_ENTRY_PHYS_ADDR_VALID | ((_pfn) << PAGE_SHIFT))
70 75
76static struct gart_domain *to_gart_domain(struct iommu_domain *dom)
77{
78 return container_of(dom, struct gart_domain, domain);
79}
80
71/* 81/*
72 * Any interaction between any block on PPSB and a block on APB or AHB 82 * Any interaction between any block on PPSB and a block on APB or AHB
73 * must have these read-back to ensure the APB/AHB bus transaction is 83 * must have these read-back to ensure the APB/AHB bus transaction is
@@ -156,20 +166,11 @@ static inline bool gart_iova_range_valid(struct gart_device *gart,
156static int gart_iommu_attach_dev(struct iommu_domain *domain, 166static int gart_iommu_attach_dev(struct iommu_domain *domain,
157 struct device *dev) 167 struct device *dev)
158{ 168{
159 struct gart_device *gart; 169 struct gart_domain *gart_domain = to_gart_domain(domain);
170 struct gart_device *gart = gart_domain->gart;
160 struct gart_client *client, *c; 171 struct gart_client *client, *c;
161 int err = 0; 172 int err = 0;
162 173
163 gart = gart_handle;
164 if (!gart)
165 return -EINVAL;
166 domain->priv = gart;
167
168 domain->geometry.aperture_start = gart->iovmm_base;
169 domain->geometry.aperture_end = gart->iovmm_base +
170 gart->page_count * GART_PAGE_SIZE - 1;
171 domain->geometry.force_aperture = true;
172
173 client = devm_kzalloc(gart->dev, sizeof(*c), GFP_KERNEL); 174 client = devm_kzalloc(gart->dev, sizeof(*c), GFP_KERNEL);
174 if (!client) 175 if (!client)
175 return -ENOMEM; 176 return -ENOMEM;
@@ -198,7 +199,8 @@ fail:
198static void gart_iommu_detach_dev(struct iommu_domain *domain, 199static void gart_iommu_detach_dev(struct iommu_domain *domain,
199 struct device *dev) 200 struct device *dev)
200{ 201{
201 struct gart_device *gart = domain->priv; 202 struct gart_domain *gart_domain = to_gart_domain(domain);
203 struct gart_device *gart = gart_domain->gart;
202 struct gart_client *c; 204 struct gart_client *c;
203 205
204 spin_lock(&gart->client_lock); 206 spin_lock(&gart->client_lock);
@@ -216,33 +218,55 @@ out:
216 spin_unlock(&gart->client_lock); 218 spin_unlock(&gart->client_lock);
217} 219}
218 220
219static int gart_iommu_domain_init(struct iommu_domain *domain) 221static struct iommu_domain *gart_iommu_domain_alloc(unsigned type)
220{ 222{
221 return 0; 223 struct gart_domain *gart_domain;
222} 224 struct gart_device *gart;
223 225
224static void gart_iommu_domain_destroy(struct iommu_domain *domain) 226 if (type != IOMMU_DOMAIN_UNMANAGED)
225{ 227 return NULL;
226 struct gart_device *gart = domain->priv;
227 228
229 gart = gart_handle;
228 if (!gart) 230 if (!gart)
229 return; 231 return NULL;
230 232
231 spin_lock(&gart->client_lock); 233 gart_domain = kzalloc(sizeof(*gart_domain), GFP_KERNEL);
232 if (!list_empty(&gart->client)) { 234 if (!gart_domain)
233 struct gart_client *c; 235 return NULL;
236
237 gart_domain->gart = gart;
238 gart_domain->domain.geometry.aperture_start = gart->iovmm_base;
239 gart_domain->domain.geometry.aperture_end = gart->iovmm_base +
240 gart->page_count * GART_PAGE_SIZE - 1;
241 gart_domain->domain.geometry.force_aperture = true;
242
243 return &gart_domain->domain;
244}
245
246static void gart_iommu_domain_free(struct iommu_domain *domain)
247{
248 struct gart_domain *gart_domain = to_gart_domain(domain);
249 struct gart_device *gart = gart_domain->gart;
250
251 if (gart) {
252 spin_lock(&gart->client_lock);
253 if (!list_empty(&gart->client)) {
254 struct gart_client *c;
234 255
235 list_for_each_entry(c, &gart->client, list) 256 list_for_each_entry(c, &gart->client, list)
236 gart_iommu_detach_dev(domain, c->dev); 257 gart_iommu_detach_dev(domain, c->dev);
258 }
259 spin_unlock(&gart->client_lock);
237 } 260 }
238 spin_unlock(&gart->client_lock); 261
239 domain->priv = NULL; 262 kfree(gart_domain);
240} 263}
241 264
242static int gart_iommu_map(struct iommu_domain *domain, unsigned long iova, 265static int gart_iommu_map(struct iommu_domain *domain, unsigned long iova,
243 phys_addr_t pa, size_t bytes, int prot) 266 phys_addr_t pa, size_t bytes, int prot)
244{ 267{
245 struct gart_device *gart = domain->priv; 268 struct gart_domain *gart_domain = to_gart_domain(domain);
269 struct gart_device *gart = gart_domain->gart;
246 unsigned long flags; 270 unsigned long flags;
247 unsigned long pfn; 271 unsigned long pfn;
248 272
@@ -265,7 +289,8 @@ static int gart_iommu_map(struct iommu_domain *domain, unsigned long iova,
265static size_t gart_iommu_unmap(struct iommu_domain *domain, unsigned long iova, 289static size_t gart_iommu_unmap(struct iommu_domain *domain, unsigned long iova,
266 size_t bytes) 290 size_t bytes)
267{ 291{
268 struct gart_device *gart = domain->priv; 292 struct gart_domain *gart_domain = to_gart_domain(domain);
293 struct gart_device *gart = gart_domain->gart;
269 unsigned long flags; 294 unsigned long flags;
270 295
271 if (!gart_iova_range_valid(gart, iova, bytes)) 296 if (!gart_iova_range_valid(gart, iova, bytes))
@@ -281,7 +306,8 @@ static size_t gart_iommu_unmap(struct iommu_domain *domain, unsigned long iova,
281static phys_addr_t gart_iommu_iova_to_phys(struct iommu_domain *domain, 306static phys_addr_t gart_iommu_iova_to_phys(struct iommu_domain *domain,
282 dma_addr_t iova) 307 dma_addr_t iova)
283{ 308{
284 struct gart_device *gart = domain->priv; 309 struct gart_domain *gart_domain = to_gart_domain(domain);
310 struct gart_device *gart = gart_domain->gart;
285 unsigned long pte; 311 unsigned long pte;
286 phys_addr_t pa; 312 phys_addr_t pa;
287 unsigned long flags; 313 unsigned long flags;
@@ -310,8 +336,8 @@ static bool gart_iommu_capable(enum iommu_cap cap)
310 336
311static const struct iommu_ops gart_iommu_ops = { 337static const struct iommu_ops gart_iommu_ops = {
312 .capable = gart_iommu_capable, 338 .capable = gart_iommu_capable,
313 .domain_init = gart_iommu_domain_init, 339 .domain_alloc = gart_iommu_domain_alloc,
314 .domain_destroy = gart_iommu_domain_destroy, 340 .domain_free = gart_iommu_domain_free,
315 .attach_dev = gart_iommu_attach_dev, 341 .attach_dev = gart_iommu_attach_dev,
316 .detach_dev = gart_iommu_detach_dev, 342 .detach_dev = gart_iommu_detach_dev,
317 .map = gart_iommu_map, 343 .map = gart_iommu_map,
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index 6e134c7c227f..c845d99ecf6b 100644
--- a/drivers/iommu/tegra-smmu.c
+++ b/drivers/iommu/tegra-smmu.c
@@ -6,6 +6,7 @@
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8 8
9#include <linux/bitops.h>
9#include <linux/err.h> 10#include <linux/err.h>
10#include <linux/iommu.h> 11#include <linux/iommu.h>
11#include <linux/kernel.h> 12#include <linux/kernel.h>
@@ -24,6 +25,8 @@ struct tegra_smmu {
24 struct tegra_mc *mc; 25 struct tegra_mc *mc;
25 const struct tegra_smmu_soc *soc; 26 const struct tegra_smmu_soc *soc;
26 27
28 unsigned long pfn_mask;
29
27 unsigned long *asids; 30 unsigned long *asids;
28 struct mutex lock; 31 struct mutex lock;
29 32
@@ -31,7 +34,7 @@ struct tegra_smmu {
31}; 34};
32 35
33struct tegra_smmu_as { 36struct tegra_smmu_as {
34 struct iommu_domain *domain; 37 struct iommu_domain domain;
35 struct tegra_smmu *smmu; 38 struct tegra_smmu *smmu;
36 unsigned int use_count; 39 unsigned int use_count;
37 struct page *count; 40 struct page *count;
@@ -40,6 +43,11 @@ struct tegra_smmu_as {
40 u32 attr; 43 u32 attr;
41}; 44};
42 45
46static struct tegra_smmu_as *to_smmu_as(struct iommu_domain *dom)
47{
48 return container_of(dom, struct tegra_smmu_as, domain);
49}
50
43static inline void smmu_writel(struct tegra_smmu *smmu, u32 value, 51static inline void smmu_writel(struct tegra_smmu *smmu, u32 value,
44 unsigned long offset) 52 unsigned long offset)
45{ 53{
@@ -105,8 +113,6 @@ static inline u32 smmu_readl(struct tegra_smmu *smmu, unsigned long offset)
105#define SMMU_PDE_SHIFT 22 113#define SMMU_PDE_SHIFT 22
106#define SMMU_PTE_SHIFT 12 114#define SMMU_PTE_SHIFT 12
107 115
108#define SMMU_PFN_MASK 0x000fffff
109
110#define SMMU_PD_READABLE (1 << 31) 116#define SMMU_PD_READABLE (1 << 31)
111#define SMMU_PD_WRITABLE (1 << 30) 117#define SMMU_PD_WRITABLE (1 << 30)
112#define SMMU_PD_NONSECURE (1 << 29) 118#define SMMU_PD_NONSECURE (1 << 29)
@@ -224,30 +230,32 @@ static bool tegra_smmu_capable(enum iommu_cap cap)
224 return false; 230 return false;
225} 231}
226 232
227static int tegra_smmu_domain_init(struct iommu_domain *domain) 233static struct iommu_domain *tegra_smmu_domain_alloc(unsigned type)
228{ 234{
229 struct tegra_smmu_as *as; 235 struct tegra_smmu_as *as;
230 unsigned int i; 236 unsigned int i;
231 uint32_t *pd; 237 uint32_t *pd;
232 238
239 if (type != IOMMU_DOMAIN_UNMANAGED)
240 return NULL;
241
233 as = kzalloc(sizeof(*as), GFP_KERNEL); 242 as = kzalloc(sizeof(*as), GFP_KERNEL);
234 if (!as) 243 if (!as)
235 return -ENOMEM; 244 return NULL;
236 245
237 as->attr = SMMU_PD_READABLE | SMMU_PD_WRITABLE | SMMU_PD_NONSECURE; 246 as->attr = SMMU_PD_READABLE | SMMU_PD_WRITABLE | SMMU_PD_NONSECURE;
238 as->domain = domain;
239 247
240 as->pd = alloc_page(GFP_KERNEL | __GFP_DMA); 248 as->pd = alloc_page(GFP_KERNEL | __GFP_DMA);
241 if (!as->pd) { 249 if (!as->pd) {
242 kfree(as); 250 kfree(as);
243 return -ENOMEM; 251 return NULL;
244 } 252 }
245 253
246 as->count = alloc_page(GFP_KERNEL); 254 as->count = alloc_page(GFP_KERNEL);
247 if (!as->count) { 255 if (!as->count) {
248 __free_page(as->pd); 256 __free_page(as->pd);
249 kfree(as); 257 kfree(as);
250 return -ENOMEM; 258 return NULL;
251 } 259 }
252 260
253 /* clear PDEs */ 261 /* clear PDEs */
@@ -264,14 +272,17 @@ static int tegra_smmu_domain_init(struct iommu_domain *domain)
264 for (i = 0; i < SMMU_NUM_PDE; i++) 272 for (i = 0; i < SMMU_NUM_PDE; i++)
265 pd[i] = 0; 273 pd[i] = 0;
266 274
267 domain->priv = as; 275 /* setup aperture */
276 as->domain.geometry.aperture_start = 0;
277 as->domain.geometry.aperture_end = 0xffffffff;
278 as->domain.geometry.force_aperture = true;
268 279
269 return 0; 280 return &as->domain;
270} 281}
271 282
272static void tegra_smmu_domain_destroy(struct iommu_domain *domain) 283static void tegra_smmu_domain_free(struct iommu_domain *domain)
273{ 284{
274 struct tegra_smmu_as *as = domain->priv; 285 struct tegra_smmu_as *as = to_smmu_as(domain);
275 286
276 /* TODO: free page directory and page tables */ 287 /* TODO: free page directory and page tables */
277 ClearPageReserved(as->pd); 288 ClearPageReserved(as->pd);
@@ -395,7 +406,7 @@ static int tegra_smmu_attach_dev(struct iommu_domain *domain,
395 struct device *dev) 406 struct device *dev)
396{ 407{
397 struct tegra_smmu *smmu = dev->archdata.iommu; 408 struct tegra_smmu *smmu = dev->archdata.iommu;
398 struct tegra_smmu_as *as = domain->priv; 409 struct tegra_smmu_as *as = to_smmu_as(domain);
399 struct device_node *np = dev->of_node; 410 struct device_node *np = dev->of_node;
400 struct of_phandle_args args; 411 struct of_phandle_args args;
401 unsigned int index = 0; 412 unsigned int index = 0;
@@ -428,7 +439,7 @@ static int tegra_smmu_attach_dev(struct iommu_domain *domain,
428 439
429static void tegra_smmu_detach_dev(struct iommu_domain *domain, struct device *dev) 440static void tegra_smmu_detach_dev(struct iommu_domain *domain, struct device *dev)
430{ 441{
431 struct tegra_smmu_as *as = domain->priv; 442 struct tegra_smmu_as *as = to_smmu_as(domain);
432 struct device_node *np = dev->of_node; 443 struct device_node *np = dev->of_node;
433 struct tegra_smmu *smmu = as->smmu; 444 struct tegra_smmu *smmu = as->smmu;
434 struct of_phandle_args args; 445 struct of_phandle_args args;
@@ -481,7 +492,7 @@ static u32 *as_get_pte(struct tegra_smmu_as *as, dma_addr_t iova,
481 smmu_flush_tlb_section(smmu, as->id, iova); 492 smmu_flush_tlb_section(smmu, as->id, iova);
482 smmu_flush(smmu); 493 smmu_flush(smmu);
483 } else { 494 } else {
484 page = pfn_to_page(pd[pde] & SMMU_PFN_MASK); 495 page = pfn_to_page(pd[pde] & smmu->pfn_mask);
485 pt = page_address(page); 496 pt = page_address(page);
486 } 497 }
487 498
@@ -503,7 +514,7 @@ static void as_put_pte(struct tegra_smmu_as *as, dma_addr_t iova)
503 u32 *pd = page_address(as->pd), *pt; 514 u32 *pd = page_address(as->pd), *pt;
504 struct page *page; 515 struct page *page;
505 516
506 page = pfn_to_page(pd[pde] & SMMU_PFN_MASK); 517 page = pfn_to_page(pd[pde] & as->smmu->pfn_mask);
507 pt = page_address(page); 518 pt = page_address(page);
508 519
509 /* 520 /*
@@ -524,7 +535,7 @@ static void as_put_pte(struct tegra_smmu_as *as, dma_addr_t iova)
524static int tegra_smmu_map(struct iommu_domain *domain, unsigned long iova, 535static int tegra_smmu_map(struct iommu_domain *domain, unsigned long iova,
525 phys_addr_t paddr, size_t size, int prot) 536 phys_addr_t paddr, size_t size, int prot)
526{ 537{
527 struct tegra_smmu_as *as = domain->priv; 538 struct tegra_smmu_as *as = to_smmu_as(domain);
528 struct tegra_smmu *smmu = as->smmu; 539 struct tegra_smmu *smmu = as->smmu;
529 unsigned long offset; 540 unsigned long offset;
530 struct page *page; 541 struct page *page;
@@ -548,7 +559,7 @@ static int tegra_smmu_map(struct iommu_domain *domain, unsigned long iova,
548static size_t tegra_smmu_unmap(struct iommu_domain *domain, unsigned long iova, 559static size_t tegra_smmu_unmap(struct iommu_domain *domain, unsigned long iova,
549 size_t size) 560 size_t size)
550{ 561{
551 struct tegra_smmu_as *as = domain->priv; 562 struct tegra_smmu_as *as = to_smmu_as(domain);
552 struct tegra_smmu *smmu = as->smmu; 563 struct tegra_smmu *smmu = as->smmu;
553 unsigned long offset; 564 unsigned long offset;
554 struct page *page; 565 struct page *page;
@@ -572,13 +583,13 @@ static size_t tegra_smmu_unmap(struct iommu_domain *domain, unsigned long iova,
572static phys_addr_t tegra_smmu_iova_to_phys(struct iommu_domain *domain, 583static phys_addr_t tegra_smmu_iova_to_phys(struct iommu_domain *domain,
573 dma_addr_t iova) 584 dma_addr_t iova)
574{ 585{
575 struct tegra_smmu_as *as = domain->priv; 586 struct tegra_smmu_as *as = to_smmu_as(domain);
576 struct page *page; 587 struct page *page;
577 unsigned long pfn; 588 unsigned long pfn;
578 u32 *pte; 589 u32 *pte;
579 590
580 pte = as_get_pte(as, iova, &page); 591 pte = as_get_pte(as, iova, &page);
581 pfn = *pte & SMMU_PFN_MASK; 592 pfn = *pte & as->smmu->pfn_mask;
582 593
583 return PFN_PHYS(pfn); 594 return PFN_PHYS(pfn);
584} 595}
@@ -633,8 +644,8 @@ static void tegra_smmu_remove_device(struct device *dev)
633 644
634static const struct iommu_ops tegra_smmu_ops = { 645static const struct iommu_ops tegra_smmu_ops = {
635 .capable = tegra_smmu_capable, 646 .capable = tegra_smmu_capable,
636 .domain_init = tegra_smmu_domain_init, 647 .domain_alloc = tegra_smmu_domain_alloc,
637 .domain_destroy = tegra_smmu_domain_destroy, 648 .domain_free = tegra_smmu_domain_free,
638 .attach_dev = tegra_smmu_attach_dev, 649 .attach_dev = tegra_smmu_attach_dev,
639 .detach_dev = tegra_smmu_detach_dev, 650 .detach_dev = tegra_smmu_detach_dev,
640 .add_device = tegra_smmu_add_device, 651 .add_device = tegra_smmu_add_device,
@@ -702,6 +713,10 @@ struct tegra_smmu *tegra_smmu_probe(struct device *dev,
702 smmu->dev = dev; 713 smmu->dev = dev;
703 smmu->mc = mc; 714 smmu->mc = mc;
704 715
716 smmu->pfn_mask = BIT_MASK(mc->soc->num_address_bits - PAGE_SHIFT) - 1;
717 dev_dbg(dev, "address bits: %u, PFN mask: %#lx\n",
718 mc->soc->num_address_bits, smmu->pfn_mask);
719
705 value = SMMU_PTC_CONFIG_ENABLE | SMMU_PTC_CONFIG_INDEX_MAP(0x3f); 720 value = SMMU_PTC_CONFIG_ENABLE | SMMU_PTC_CONFIG_INDEX_MAP(0x3f);
706 721
707 if (soc->supports_request_limit) 722 if (soc->supports_request_limit)
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 4f2fb62e6f37..49875adb6b44 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -567,7 +567,7 @@ static void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
567 */ 567 */
568 smp_wmb(); 568 smp_wmb();
569 569
570 for_each_cpu_mask(cpu, *mask) { 570 for_each_cpu(cpu, mask) {
571 u64 cluster_id = cpu_logical_map(cpu) & ~0xffUL; 571 u64 cluster_id = cpu_logical_map(cpu) & ~0xffUL;
572 u16 tlist; 572 u16 tlist;
573 573
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index bc48b7dc89ec..57f09cb54464 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -389,19 +389,19 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
389 int i; 389 int i;
390 390
391 cpumask_and(&tmp, cpumask, cpu_online_mask); 391 cpumask_and(&tmp, cpumask, cpu_online_mask);
392 if (cpus_empty(tmp)) 392 if (cpumask_empty(&tmp))
393 return -EINVAL; 393 return -EINVAL;
394 394
395 /* Assumption : cpumask refers to a single CPU */ 395 /* Assumption : cpumask refers to a single CPU */
396 spin_lock_irqsave(&gic_lock, flags); 396 spin_lock_irqsave(&gic_lock, flags);
397 397
398 /* Re-route this IRQ */ 398 /* Re-route this IRQ */
399 gic_map_to_vpe(irq, first_cpu(tmp)); 399 gic_map_to_vpe(irq, cpumask_first(&tmp));
400 400
401 /* Update the pcpu_masks */ 401 /* Update the pcpu_masks */
402 for (i = 0; i < NR_CPUS; i++) 402 for (i = 0; i < NR_CPUS; i++)
403 clear_bit(irq, pcpu_masks[i].pcpu_mask); 403 clear_bit(irq, pcpu_masks[i].pcpu_mask);
404 set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask); 404 set_bit(irq, pcpu_masks[cpumask_first(&tmp)].pcpu_mask);
405 405
406 cpumask_copy(d->affinity, cpumask); 406 cpumask_copy(d->affinity, cpumask);
407 spin_unlock_irqrestore(&gic_lock, flags); 407 spin_unlock_irqrestore(&gic_lock, flags);
diff --git a/drivers/net/ethernet/tile/tilegx.c b/drivers/net/ethernet/tile/tilegx.c
index a789a2054388..a3f7610002aa 100644
--- a/drivers/net/ethernet/tile/tilegx.c
+++ b/drivers/net/ethernet/tile/tilegx.c
@@ -1123,7 +1123,7 @@ static int alloc_percpu_mpipe_resources(struct net_device *dev,
1123 addr + i * sizeof(struct tile_net_comps); 1123 addr + i * sizeof(struct tile_net_comps);
1124 1124
1125 /* If this is a network cpu, create an iqueue. */ 1125 /* If this is a network cpu, create an iqueue. */
1126 if (cpu_isset(cpu, network_cpus_map)) { 1126 if (cpumask_test_cpu(cpu, &network_cpus_map)) {
1127 order = get_order(NOTIF_RING_SIZE); 1127 order = get_order(NOTIF_RING_SIZE);
1128 page = homecache_alloc_pages(GFP_KERNEL, order, cpu); 1128 page = homecache_alloc_pages(GFP_KERNEL, order, cpu);
1129 if (page == NULL) { 1129 if (page == NULL) {
@@ -1299,7 +1299,7 @@ static int tile_net_init_mpipe(struct net_device *dev)
1299 int first_ring, ring; 1299 int first_ring, ring;
1300 int instance = mpipe_instance(dev); 1300 int instance = mpipe_instance(dev);
1301 struct mpipe_data *md = &mpipe_data[instance]; 1301 struct mpipe_data *md = &mpipe_data[instance];
1302 int network_cpus_count = cpus_weight(network_cpus_map); 1302 int network_cpus_count = cpumask_weight(&network_cpus_map);
1303 1303
1304 if (!hash_default) { 1304 if (!hash_default) {
1305 netdev_err(dev, "Networking requires hash_default!\n"); 1305 netdev_err(dev, "Networking requires hash_default!\n");
diff --git a/drivers/s390/block/dasd.c b/drivers/s390/block/dasd.c
index 26a51dc4278d..57fd66357b95 100644
--- a/drivers/s390/block/dasd.c
+++ b/drivers/s390/block/dasd.c
@@ -579,7 +579,8 @@ void dasd_kick_device(struct dasd_device *device)
579{ 579{
580 dasd_get_device(device); 580 dasd_get_device(device);
581 /* queue call to dasd_kick_device to the kernel event daemon. */ 581 /* queue call to dasd_kick_device to the kernel event daemon. */
582 schedule_work(&device->kick_work); 582 if (!schedule_work(&device->kick_work))
583 dasd_put_device(device);
583} 584}
584EXPORT_SYMBOL(dasd_kick_device); 585EXPORT_SYMBOL(dasd_kick_device);
585 586
@@ -599,7 +600,8 @@ void dasd_reload_device(struct dasd_device *device)
599{ 600{
600 dasd_get_device(device); 601 dasd_get_device(device);
601 /* queue call to dasd_reload_device to the kernel event daemon. */ 602 /* queue call to dasd_reload_device to the kernel event daemon. */
602 schedule_work(&device->reload_device); 603 if (!schedule_work(&device->reload_device))
604 dasd_put_device(device);
603} 605}
604EXPORT_SYMBOL(dasd_reload_device); 606EXPORT_SYMBOL(dasd_reload_device);
605 607
@@ -619,7 +621,8 @@ void dasd_restore_device(struct dasd_device *device)
619{ 621{
620 dasd_get_device(device); 622 dasd_get_device(device);
621 /* queue call to dasd_restore_device to the kernel event daemon. */ 623 /* queue call to dasd_restore_device to the kernel event daemon. */
622 schedule_work(&device->restore_device); 624 if (!schedule_work(&device->restore_device))
625 dasd_put_device(device);
623} 626}
624 627
625/* 628/*
@@ -2163,18 +2166,22 @@ static int _dasd_sleep_on(struct dasd_ccw_req *maincqr, int interruptible)
2163 cqr->intrc = -ENOLINK; 2166 cqr->intrc = -ENOLINK;
2164 continue; 2167 continue;
2165 } 2168 }
2166 /* Don't try to start requests if device is stopped */ 2169 /*
2167 if (interruptible) { 2170 * Don't try to start requests if device is stopped
2168 rc = wait_event_interruptible( 2171 * except path verification requests
2169 generic_waitq, !(device->stopped)); 2172 */
2170 if (rc == -ERESTARTSYS) { 2173 if (!test_bit(DASD_CQR_VERIFY_PATH, &cqr->flags)) {
2171 cqr->status = DASD_CQR_FAILED; 2174 if (interruptible) {
2172 maincqr->intrc = rc; 2175 rc = wait_event_interruptible(
2173 continue; 2176 generic_waitq, !(device->stopped));
2174 } 2177 if (rc == -ERESTARTSYS) {
2175 } else 2178 cqr->status = DASD_CQR_FAILED;
2176 wait_event(generic_waitq, !(device->stopped)); 2179 maincqr->intrc = rc;
2177 2180 continue;
2181 }
2182 } else
2183 wait_event(generic_waitq, !(device->stopped));
2184 }
2178 if (!cqr->callback) 2185 if (!cqr->callback)
2179 cqr->callback = dasd_wakeup_cb; 2186 cqr->callback = dasd_wakeup_cb;
2180 2187
@@ -2524,6 +2531,11 @@ static void __dasd_process_request_queue(struct dasd_block *block)
2524 __blk_end_request_all(req, -EIO); 2531 __blk_end_request_all(req, -EIO);
2525 return; 2532 return;
2526 } 2533 }
2534
2535 /* if device ist stopped do not fetch new requests */
2536 if (basedev->stopped)
2537 return;
2538
2527 /* Now we try to fetch requests from the request queue */ 2539 /* Now we try to fetch requests from the request queue */
2528 while ((req = blk_peek_request(queue))) { 2540 while ((req = blk_peek_request(queue))) {
2529 if (basedev->features & DASD_FEATURE_READONLY && 2541 if (basedev->features & DASD_FEATURE_READONLY &&
diff --git a/drivers/s390/block/dasd_eckd.c b/drivers/s390/block/dasd_eckd.c
index 49b48a887c66..6215f6455eb8 100644
--- a/drivers/s390/block/dasd_eckd.c
+++ b/drivers/s390/block/dasd_eckd.c
@@ -1628,7 +1628,8 @@ static void dasd_eckd_kick_validate_server(struct dasd_device *device)
1628 return; 1628 return;
1629 } 1629 }
1630 /* queue call to do_validate_server to the kernel event daemon. */ 1630 /* queue call to do_validate_server to the kernel event daemon. */
1631 schedule_work(&device->kick_validate); 1631 if (!schedule_work(&device->kick_validate))
1632 dasd_put_device(device);
1632} 1633}
1633 1634
1634static u32 get_fcx_max_data(struct dasd_device *device) 1635static u32 get_fcx_max_data(struct dasd_device *device)
diff --git a/drivers/s390/char/sclp_cmd.c b/drivers/s390/char/sclp_cmd.c
index 6e14999f9e8f..7be782116dab 100644
--- a/drivers/s390/char/sclp_cmd.c
+++ b/drivers/s390/char/sclp_cmd.c
@@ -315,10 +315,29 @@ static int sclp_mem_change_state(unsigned long start, unsigned long size,
315 rc |= sclp_assign_storage(incr->rn); 315 rc |= sclp_assign_storage(incr->rn);
316 else 316 else
317 sclp_unassign_storage(incr->rn); 317 sclp_unassign_storage(incr->rn);
318 if (rc == 0)
319 incr->standby = online ? 0 : 1;
318 } 320 }
319 return rc ? -EIO : 0; 321 return rc ? -EIO : 0;
320} 322}
321 323
324static bool contains_standby_increment(unsigned long start, unsigned long end)
325{
326 struct memory_increment *incr;
327 unsigned long istart;
328
329 list_for_each_entry(incr, &sclp_mem_list, list) {
330 istart = rn2addr(incr->rn);
331 if (end - 1 < istart)
332 continue;
333 if (start > istart + sclp_rzm - 1)
334 continue;
335 if (incr->standby)
336 return true;
337 }
338 return false;
339}
340
322static int sclp_mem_notifier(struct notifier_block *nb, 341static int sclp_mem_notifier(struct notifier_block *nb,
323 unsigned long action, void *data) 342 unsigned long action, void *data)
324{ 343{
@@ -334,8 +353,16 @@ static int sclp_mem_notifier(struct notifier_block *nb,
334 for_each_clear_bit(id, sclp_storage_ids, sclp_max_storage_id + 1) 353 for_each_clear_bit(id, sclp_storage_ids, sclp_max_storage_id + 1)
335 sclp_attach_storage(id); 354 sclp_attach_storage(id);
336 switch (action) { 355 switch (action) {
337 case MEM_ONLINE:
338 case MEM_GOING_OFFLINE: 356 case MEM_GOING_OFFLINE:
357 /*
358 * We do not allow to set memory blocks offline that contain
359 * standby memory. This is done to simplify the "memory online"
360 * case.
361 */
362 if (contains_standby_increment(start, start + size))
363 rc = -EPERM;
364 break;
365 case MEM_ONLINE:
339 case MEM_CANCEL_OFFLINE: 366 case MEM_CANCEL_OFFLINE:
340 break; 367 break;
341 case MEM_GOING_ONLINE: 368 case MEM_GOING_ONLINE:
@@ -361,6 +388,21 @@ static struct notifier_block sclp_mem_nb = {
361 .notifier_call = sclp_mem_notifier, 388 .notifier_call = sclp_mem_notifier,
362}; 389};
363 390
391static void __init align_to_block_size(unsigned long long *start,
392 unsigned long long *size)
393{
394 unsigned long long start_align, size_align, alignment;
395
396 alignment = memory_block_size_bytes();
397 start_align = roundup(*start, alignment);
398 size_align = rounddown(*start + *size, alignment) - start_align;
399
400 pr_info("Standby memory at 0x%llx (%lluM of %lluM usable)\n",
401 *start, size_align >> 20, *size >> 20);
402 *start = start_align;
403 *size = size_align;
404}
405
364static void __init add_memory_merged(u16 rn) 406static void __init add_memory_merged(u16 rn)
365{ 407{
366 static u16 first_rn, num; 408 static u16 first_rn, num;
@@ -382,7 +424,9 @@ static void __init add_memory_merged(u16 rn)
382 goto skip_add; 424 goto skip_add;
383 if (memory_end_set && (start + size > memory_end)) 425 if (memory_end_set && (start + size > memory_end))
384 size = memory_end - start; 426 size = memory_end - start;
385 add_memory(0, start, size); 427 align_to_block_size(&start, &size);
428 if (size)
429 add_memory(0, start, size);
386skip_add: 430skip_add:
387 first_rn = rn; 431 first_rn = rn;
388 num = 1; 432 num = 1;
diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c
index a1cfbd3dda47..8eab107b53fb 100644
--- a/drivers/scsi/hpsa.c
+++ b/drivers/scsi/hpsa.c
@@ -6632,14 +6632,12 @@ static void fail_all_outstanding_cmds(struct ctlr_info *h)
6632 6632
6633static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 6633static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
6634{ 6634{
6635 int i, cpu; 6635 int cpu;
6636 6636
6637 cpu = cpumask_first(cpu_online_mask); 6637 for_each_online_cpu(cpu) {
6638 for (i = 0; i < num_online_cpus(); i++) {
6639 u32 *lockup_detected; 6638 u32 *lockup_detected;
6640 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 6639 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
6641 *lockup_detected = value; 6640 *lockup_detected = value;
6642 cpu = cpumask_next(cpu, cpu_online_mask);
6643 } 6641 }
6644 wmb(); /* be sure the per-cpu variables are out to memory */ 6642 wmb(); /* be sure the per-cpu variables are out to memory */
6645} 6643}
diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h
index 086549a665e2..27e285b92b5f 100644
--- a/include/linux/cpumask.h
+++ b/include/linux/cpumask.h
@@ -11,6 +11,7 @@
11#include <linux/bitmap.h> 11#include <linux/bitmap.h>
12#include <linux/bug.h> 12#include <linux/bug.h>
13 13
14/* Don't assign or return these: may not be this big! */
14typedef struct cpumask { DECLARE_BITMAP(bits, NR_CPUS); } cpumask_t; 15typedef struct cpumask { DECLARE_BITMAP(bits, NR_CPUS); } cpumask_t;
15 16
16/** 17/**
@@ -289,11 +290,11 @@ static inline void cpumask_clear_cpu(int cpu, struct cpumask *dstp)
289 * @cpumask: the cpumask pointer 290 * @cpumask: the cpumask pointer
290 * 291 *
291 * Returns 1 if @cpu is set in @cpumask, else returns 0 292 * Returns 1 if @cpu is set in @cpumask, else returns 0
292 *
293 * No static inline type checking - see Subtlety (1) above.
294 */ 293 */
295#define cpumask_test_cpu(cpu, cpumask) \ 294static inline int cpumask_test_cpu(int cpu, const struct cpumask *cpumask)
296 test_bit(cpumask_check(cpu), cpumask_bits((cpumask))) 295{
296 return test_bit(cpumask_check(cpu), cpumask_bits((cpumask)));
297}
297 298
298/** 299/**
299 * cpumask_test_and_set_cpu - atomically test and set a cpu in a cpumask 300 * cpumask_test_and_set_cpu - atomically test and set a cpu in a cpumask
@@ -609,9 +610,7 @@ static inline int cpulist_parse(const char *buf, struct cpumask *dstp)
609 */ 610 */
610static inline size_t cpumask_size(void) 611static inline size_t cpumask_size(void)
611{ 612{
612 /* FIXME: Once all cpumask assignments are eliminated, this 613 return BITS_TO_LONGS(nr_cpumask_bits) * sizeof(long);
613 * can be nr_cpumask_bits */
614 return BITS_TO_LONGS(NR_CPUS) * sizeof(long);
615} 614}
616 615
617/* 616/*
@@ -768,7 +767,7 @@ static inline const struct cpumask *get_cpu_mask(unsigned int cpu)
768#if NR_CPUS <= BITS_PER_LONG 767#if NR_CPUS <= BITS_PER_LONG
769#define CPU_BITS_ALL \ 768#define CPU_BITS_ALL \
770{ \ 769{ \
771 [BITS_TO_LONGS(NR_CPUS)-1] = CPU_MASK_LAST_WORD \ 770 [BITS_TO_LONGS(NR_CPUS)-1] = BITMAP_LAST_WORD_MASK(NR_CPUS) \
772} 771}
773 772
774#else /* NR_CPUS > BITS_PER_LONG */ 773#else /* NR_CPUS > BITS_PER_LONG */
@@ -776,7 +775,7 @@ static inline const struct cpumask *get_cpu_mask(unsigned int cpu)
776#define CPU_BITS_ALL \ 775#define CPU_BITS_ALL \
777{ \ 776{ \
778 [0 ... BITS_TO_LONGS(NR_CPUS)-2] = ~0UL, \ 777 [0 ... BITS_TO_LONGS(NR_CPUS)-2] = ~0UL, \
779 [BITS_TO_LONGS(NR_CPUS)-1] = CPU_MASK_LAST_WORD \ 778 [BITS_TO_LONGS(NR_CPUS)-1] = BITMAP_LAST_WORD_MASK(NR_CPUS) \
780} 779}
781#endif /* NR_CPUS > BITS_PER_LONG */ 780#endif /* NR_CPUS > BITS_PER_LONG */
782 781
@@ -797,32 +796,18 @@ cpumap_print_to_pagebuf(bool list, char *buf, const struct cpumask *mask)
797 nr_cpu_ids); 796 nr_cpu_ids);
798} 797}
799 798
800/*
801 *
802 * From here down, all obsolete. Use cpumask_ variants!
803 *
804 */
805#ifndef CONFIG_DISABLE_OBSOLETE_CPUMASK_FUNCTIONS
806#define cpumask_of_cpu(cpu) (*get_cpu_mask(cpu))
807
808#define CPU_MASK_LAST_WORD BITMAP_LAST_WORD_MASK(NR_CPUS)
809
810#if NR_CPUS <= BITS_PER_LONG 799#if NR_CPUS <= BITS_PER_LONG
811
812#define CPU_MASK_ALL \ 800#define CPU_MASK_ALL \
813(cpumask_t) { { \ 801(cpumask_t) { { \
814 [BITS_TO_LONGS(NR_CPUS)-1] = CPU_MASK_LAST_WORD \ 802 [BITS_TO_LONGS(NR_CPUS)-1] = BITMAP_LAST_WORD_MASK(NR_CPUS) \
815} } 803} }
816
817#else 804#else
818
819#define CPU_MASK_ALL \ 805#define CPU_MASK_ALL \
820(cpumask_t) { { \ 806(cpumask_t) { { \
821 [0 ... BITS_TO_LONGS(NR_CPUS)-2] = ~0UL, \ 807 [0 ... BITS_TO_LONGS(NR_CPUS)-2] = ~0UL, \
822 [BITS_TO_LONGS(NR_CPUS)-1] = CPU_MASK_LAST_WORD \ 808 [BITS_TO_LONGS(NR_CPUS)-1] = BITMAP_LAST_WORD_MASK(NR_CPUS) \
823} } 809} }
824 810#endif /* NR_CPUS > BITS_PER_LONG */
825#endif
826 811
827#define CPU_MASK_NONE \ 812#define CPU_MASK_NONE \
828(cpumask_t) { { \ 813(cpumask_t) { { \
@@ -834,143 +819,4 @@ cpumap_print_to_pagebuf(bool list, char *buf, const struct cpumask *mask)
834 [0] = 1UL \ 819 [0] = 1UL \
835} } 820} }
836 821
837#if NR_CPUS == 1
838#define first_cpu(src) ({ (void)(src); 0; })
839#define next_cpu(n, src) ({ (void)(src); 1; })
840#define any_online_cpu(mask) 0
841#define for_each_cpu_mask(cpu, mask) \
842 for ((cpu) = 0; (cpu) < 1; (cpu)++, (void)mask)
843#else /* NR_CPUS > 1 */
844int __first_cpu(const cpumask_t *srcp);
845int __next_cpu(int n, const cpumask_t *srcp);
846
847#define first_cpu(src) __first_cpu(&(src))
848#define next_cpu(n, src) __next_cpu((n), &(src))
849#define any_online_cpu(mask) cpumask_any_and(&mask, cpu_online_mask)
850#define for_each_cpu_mask(cpu, mask) \
851 for ((cpu) = -1; \
852 (cpu) = next_cpu((cpu), (mask)), \
853 (cpu) < NR_CPUS; )
854#endif /* SMP */
855
856#if NR_CPUS <= 64
857
858#define for_each_cpu_mask_nr(cpu, mask) for_each_cpu_mask(cpu, mask)
859
860#else /* NR_CPUS > 64 */
861
862int __next_cpu_nr(int n, const cpumask_t *srcp);
863#define for_each_cpu_mask_nr(cpu, mask) \
864 for ((cpu) = -1; \
865 (cpu) = __next_cpu_nr((cpu), &(mask)), \
866 (cpu) < nr_cpu_ids; )
867
868#endif /* NR_CPUS > 64 */
869
870#define cpus_addr(src) ((src).bits)
871
872#define cpu_set(cpu, dst) __cpu_set((cpu), &(dst))
873static inline void __cpu_set(int cpu, volatile cpumask_t *dstp)
874{
875 set_bit(cpu, dstp->bits);
876}
877
878#define cpu_clear(cpu, dst) __cpu_clear((cpu), &(dst))
879static inline void __cpu_clear(int cpu, volatile cpumask_t *dstp)
880{
881 clear_bit(cpu, dstp->bits);
882}
883
884#define cpus_setall(dst) __cpus_setall(&(dst), NR_CPUS)
885static inline void __cpus_setall(cpumask_t *dstp, unsigned int nbits)
886{
887 bitmap_fill(dstp->bits, nbits);
888}
889
890#define cpus_clear(dst) __cpus_clear(&(dst), NR_CPUS)
891static inline void __cpus_clear(cpumask_t *dstp, unsigned int nbits)
892{
893 bitmap_zero(dstp->bits, nbits);
894}
895
896/* No static inline type checking - see Subtlety (1) above. */
897#define cpu_isset(cpu, cpumask) test_bit((cpu), (cpumask).bits)
898
899#define cpu_test_and_set(cpu, cpumask) __cpu_test_and_set((cpu), &(cpumask))
900static inline int __cpu_test_and_set(int cpu, cpumask_t *addr)
901{
902 return test_and_set_bit(cpu, addr->bits);
903}
904
905#define cpus_and(dst, src1, src2) __cpus_and(&(dst), &(src1), &(src2), NR_CPUS)
906static inline int __cpus_and(cpumask_t *dstp, const cpumask_t *src1p,
907 const cpumask_t *src2p, unsigned int nbits)
908{
909 return bitmap_and(dstp->bits, src1p->bits, src2p->bits, nbits);
910}
911
912#define cpus_or(dst, src1, src2) __cpus_or(&(dst), &(src1), &(src2), NR_CPUS)
913static inline void __cpus_or(cpumask_t *dstp, const cpumask_t *src1p,
914 const cpumask_t *src2p, unsigned int nbits)
915{
916 bitmap_or(dstp->bits, src1p->bits, src2p->bits, nbits);
917}
918
919#define cpus_xor(dst, src1, src2) __cpus_xor(&(dst), &(src1), &(src2), NR_CPUS)
920static inline void __cpus_xor(cpumask_t *dstp, const cpumask_t *src1p,
921 const cpumask_t *src2p, unsigned int nbits)
922{
923 bitmap_xor(dstp->bits, src1p->bits, src2p->bits, nbits);
924}
925
926#define cpus_andnot(dst, src1, src2) \
927 __cpus_andnot(&(dst), &(src1), &(src2), NR_CPUS)
928static inline int __cpus_andnot(cpumask_t *dstp, const cpumask_t *src1p,
929 const cpumask_t *src2p, unsigned int nbits)
930{
931 return bitmap_andnot(dstp->bits, src1p->bits, src2p->bits, nbits);
932}
933
934#define cpus_equal(src1, src2) __cpus_equal(&(src1), &(src2), NR_CPUS)
935static inline int __cpus_equal(const cpumask_t *src1p,
936 const cpumask_t *src2p, unsigned int nbits)
937{
938 return bitmap_equal(src1p->bits, src2p->bits, nbits);
939}
940
941#define cpus_intersects(src1, src2) __cpus_intersects(&(src1), &(src2), NR_CPUS)
942static inline int __cpus_intersects(const cpumask_t *src1p,
943 const cpumask_t *src2p, unsigned int nbits)
944{
945 return bitmap_intersects(src1p->bits, src2p->bits, nbits);
946}
947
948#define cpus_subset(src1, src2) __cpus_subset(&(src1), &(src2), NR_CPUS)
949static inline int __cpus_subset(const cpumask_t *src1p,
950 const cpumask_t *src2p, unsigned int nbits)
951{
952 return bitmap_subset(src1p->bits, src2p->bits, nbits);
953}
954
955#define cpus_empty(src) __cpus_empty(&(src), NR_CPUS)
956static inline int __cpus_empty(const cpumask_t *srcp, unsigned int nbits)
957{
958 return bitmap_empty(srcp->bits, nbits);
959}
960
961#define cpus_weight(cpumask) __cpus_weight(&(cpumask), NR_CPUS)
962static inline int __cpus_weight(const cpumask_t *srcp, unsigned int nbits)
963{
964 return bitmap_weight(srcp->bits, nbits);
965}
966
967#define cpus_shift_left(dst, src, n) \
968 __cpus_shift_left(&(dst), &(src), (n), NR_CPUS)
969static inline void __cpus_shift_left(cpumask_t *dstp,
970 const cpumask_t *srcp, int n, int nbits)
971{
972 bitmap_shift_left(dstp->bits, srcp->bits, n, nbits);
973}
974#endif /* !CONFIG_DISABLE_OBSOLETE_CPUMASK_FUNCTIONS */
975
976#endif /* __LINUX_CPUMASK_H */ 822#endif /* __LINUX_CPUMASK_H */
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 38daa453f2e5..0546b8710ce3 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -51,9 +51,33 @@ struct iommu_domain_geometry {
51 bool force_aperture; /* DMA only allowed in mappable range? */ 51 bool force_aperture; /* DMA only allowed in mappable range? */
52}; 52};
53 53
54/* Domain feature flags */
55#define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */
56#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
57 implementation */
58#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
59
60/*
61 * This are the possible domain-types
62 *
63 * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate
64 * devices
65 * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses
66 * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used
67 * for VMs
68 * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations.
69 * This flag allows IOMMU drivers to implement
70 * certain optimizations for these domains
71 */
72#define IOMMU_DOMAIN_BLOCKED (0U)
73#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT)
74#define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING)
75#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \
76 __IOMMU_DOMAIN_DMA_API)
77
54struct iommu_domain { 78struct iommu_domain {
79 unsigned type;
55 const struct iommu_ops *ops; 80 const struct iommu_ops *ops;
56 void *priv;
57 iommu_fault_handler_t handler; 81 iommu_fault_handler_t handler;
58 void *handler_token; 82 void *handler_token;
59 struct iommu_domain_geometry geometry; 83 struct iommu_domain_geometry geometry;
@@ -113,8 +137,11 @@ enum iommu_attr {
113 */ 137 */
114struct iommu_ops { 138struct iommu_ops {
115 bool (*capable)(enum iommu_cap); 139 bool (*capable)(enum iommu_cap);
116 int (*domain_init)(struct iommu_domain *domain); 140
117 void (*domain_destroy)(struct iommu_domain *domain); 141 /* Domain allocation and freeing by the iommu driver */
142 struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type);
143 void (*domain_free)(struct iommu_domain *);
144
118 int (*attach_dev)(struct iommu_domain *domain, struct device *dev); 145 int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
119 void (*detach_dev)(struct iommu_domain *domain, struct device *dev); 146 void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
120 int (*map)(struct iommu_domain *domain, unsigned long iova, 147 int (*map)(struct iommu_domain *domain, unsigned long iova,
diff --git a/include/linux/smp.h b/include/linux/smp.h
index be91db2a7017..c4414074bd88 100644
--- a/include/linux/smp.h
+++ b/include/linux/smp.h
@@ -18,7 +18,7 @@ struct call_single_data {
18 struct llist_node llist; 18 struct llist_node llist;
19 smp_call_func_t func; 19 smp_call_func_t func;
20 void *info; 20 void *info;
21 u16 flags; 21 unsigned int flags;
22}; 22};
23 23
24/* total number of cpus in this system (may exceed NR_CPUS) */ 24/* total number of cpus in this system (may exceed NR_CPUS) */
diff --git a/lib/Kconfig b/lib/Kconfig
index f5440221d929..601965a948e8 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -396,10 +396,6 @@ config CPUMASK_OFFSTACK
396 them on the stack. This is a bit more expensive, but avoids 396 them on the stack. This is a bit more expensive, but avoids
397 stack overflow. 397 stack overflow.
398 398
399config DISABLE_OBSOLETE_CPUMASK_FUNCTIONS
400 bool "Disable obsolete cpumask functions" if DEBUG_PER_CPU_MAPS
401 depends on BROKEN
402
403config CPU_RMAP 399config CPU_RMAP
404 bool 400 bool
405 depends on SMP 401 depends on SMP
diff --git a/lib/cpumask.c b/lib/cpumask.c
index 5ab1553fd076..830dd5dec40f 100644
--- a/lib/cpumask.c
+++ b/lib/cpumask.c
@@ -5,27 +5,6 @@
5#include <linux/export.h> 5#include <linux/export.h>
6#include <linux/bootmem.h> 6#include <linux/bootmem.h>
7 7
8int __first_cpu(const cpumask_t *srcp)
9{
10 return min_t(int, NR_CPUS, find_first_bit(srcp->bits, NR_CPUS));
11}
12EXPORT_SYMBOL(__first_cpu);
13
14int __next_cpu(int n, const cpumask_t *srcp)
15{
16 return min_t(int, NR_CPUS, find_next_bit(srcp->bits, NR_CPUS, n+1));
17}
18EXPORT_SYMBOL(__next_cpu);
19
20#if NR_CPUS > 64
21int __next_cpu_nr(int n, const cpumask_t *srcp)
22{
23 return min_t(int, nr_cpu_ids,
24 find_next_bit(srcp->bits, nr_cpu_ids, n+1));
25}
26EXPORT_SYMBOL(__next_cpu_nr);
27#endif
28
29/** 8/**
30 * cpumask_next_and - get the next cpu in *src1p & *src2p 9 * cpumask_next_and - get the next cpu in *src1p & *src2p
31 * @n: the cpu prior to the place to search (ie. return will be > @n) 10 * @n: the cpu prior to the place to search (ie. return will be > @n)
@@ -90,13 +69,6 @@ bool alloc_cpumask_var_node(cpumask_var_t *mask, gfp_t flags, int node)
90 dump_stack(); 69 dump_stack();
91 } 70 }
92#endif 71#endif
93 /* FIXME: Bandaid to save us from old primitives which go to NR_CPUS. */
94 if (*mask) {
95 unsigned char *ptr = (unsigned char *)cpumask_bits(*mask);
96 unsigned int tail;
97 tail = BITS_TO_LONGS(NR_CPUS - nr_cpumask_bits) * sizeof(long);
98 memset(ptr + cpumask_size() - tail, 0, tail);
99 }
100 72
101 return *mask != NULL; 73 return *mask != NULL;
102} 74}