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-rw-r--r--drivers/gpu/drm/imx/ipuv3-plane.c13
-rw-r--r--drivers/gpu/drm/imx/ipuv3-plane.h1
2 files changed, 8 insertions, 6 deletions
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index d7a727a6e3d7..91edfe2498a6 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -605,7 +605,6 @@ static void ipu_plane_atomic_update(struct drm_plane *plane,
605 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch); 605 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
606 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba); 606 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
607 ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active); 607 ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
608 ipu_plane->next_buf = !active;
609 if (ipu_plane_separate_alpha(ipu_plane)) { 608 if (ipu_plane_separate_alpha(ipu_plane)) {
610 active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch); 609 active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
611 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active, 610 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
@@ -710,7 +709,6 @@ static void ipu_plane_atomic_update(struct drm_plane *plane,
710 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba); 709 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
711 ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts); 710 ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
712 ipu_plane_enable(ipu_plane); 711 ipu_plane_enable(ipu_plane);
713 ipu_plane->next_buf = -1;
714} 712}
715 713
716static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = { 714static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
@@ -732,10 +730,15 @@ bool ipu_plane_atomic_update_pending(struct drm_plane *plane)
732 730
733 if (ipu_state->use_pre) 731 if (ipu_state->use_pre)
734 return ipu_prg_channel_configure_pending(ipu_plane->ipu_ch); 732 return ipu_prg_channel_configure_pending(ipu_plane->ipu_ch);
735 else if (ipu_plane->next_buf >= 0)
736 return ipu_idmac_get_current_buffer(ipu_plane->ipu_ch) !=
737 ipu_plane->next_buf;
738 733
734 /*
735 * Pretend no update is pending in the non-PRE/PRG case. For this to
736 * happen, an atomic update would have to be deferred until after the
737 * start of the next frame and simultaneously interrupt latency would
738 * have to be high enough to let the atomic update finish and issue an
739 * event before the previous end of frame interrupt handler can be
740 * executed.
741 */
739 return false; 742 return false;
740} 743}
741int ipu_planes_assign_pre(struct drm_device *dev, 744int ipu_planes_assign_pre(struct drm_device *dev,
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.h b/drivers/gpu/drm/imx/ipuv3-plane.h
index 15e85e15d35c..ffacbcdd2f98 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.h
+++ b/drivers/gpu/drm/imx/ipuv3-plane.h
@@ -27,7 +27,6 @@ struct ipu_plane {
27 int dp_flow; 27 int dp_flow;
28 28
29 bool disabling; 29 bool disabling;
30 int next_buf;
31}; 30};
32 31
33struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu, 32struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,