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-rw-r--r--drivers/soc/mediatek/mtk-pmic-wrap.c40
1 files changed, 25 insertions, 15 deletions
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 3d1d10bcfea5..337a16300cf4 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -76,6 +76,11 @@
76#define PWRAP_SLV_CAP_SECURITY BIT(2) 76#define PWRAP_SLV_CAP_SECURITY BIT(2)
77#define HAS_CAP(_c, _x) (((_c) & (_x)) == (_x)) 77#define HAS_CAP(_c, _x) (((_c) & (_x)) == (_x))
78 78
79/* Group of bits used for shown pwrap capability */
80#define PWRAP_CAP_BRIDGE BIT(0)
81#define PWRAP_CAP_RESET BIT(1)
82#define PWRAP_CAP_DCM BIT(2)
83
79/* defines for slave device wrapper registers */ 84/* defines for slave device wrapper registers */
80enum dew_regs { 85enum dew_regs {
81 PWRAP_DEW_BASE, 86 PWRAP_DEW_BASE,
@@ -733,7 +738,8 @@ struct pmic_wrapper_type {
733 u32 int_en_all; 738 u32 int_en_all;
734 u32 spi_w; 739 u32 spi_w;
735 u32 wdt_src; 740 u32 wdt_src;
736 unsigned int has_bridge:1; 741 /* Flags indicating the capability for the target pwrap */
742 u32 caps;
737 int (*init_reg_clock)(struct pmic_wrapper *wrp); 743 int (*init_reg_clock)(struct pmic_wrapper *wrp);
738 int (*init_soc_specific)(struct pmic_wrapper *wrp); 744 int (*init_soc_specific)(struct pmic_wrapper *wrp);
739}; 745};
@@ -1348,7 +1354,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
1348 pwrap_writel(wrp, 1, PWRAP_INIT_DONE0); 1354 pwrap_writel(wrp, 1, PWRAP_INIT_DONE0);
1349 pwrap_writel(wrp, 1, PWRAP_INIT_DONE1); 1355 pwrap_writel(wrp, 1, PWRAP_INIT_DONE1);
1350 1356
1351 if (wrp->master->has_bridge) { 1357 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_BRIDGE)) {
1352 writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE3); 1358 writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE3);
1353 writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE4); 1359 writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE4);
1354 } 1360 }
@@ -1455,7 +1461,7 @@ static const struct pmic_wrapper_type pwrap_mt2701 = {
1455 .int_en_all = ~(u32)(BIT(31) | BIT(2)), 1461 .int_en_all = ~(u32)(BIT(31) | BIT(2)),
1456 .spi_w = PWRAP_MAN_CMD_SPI_WRITE_NEW, 1462 .spi_w = PWRAP_MAN_CMD_SPI_WRITE_NEW,
1457 .wdt_src = PWRAP_WDT_SRC_MASK_ALL, 1463 .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
1458 .has_bridge = 0, 1464 .caps = PWRAP_CAP_RESET | PWRAP_CAP_DCM,
1459 .init_reg_clock = pwrap_mt2701_init_reg_clock, 1465 .init_reg_clock = pwrap_mt2701_init_reg_clock,
1460 .init_soc_specific = pwrap_mt2701_init_soc_specific, 1466 .init_soc_specific = pwrap_mt2701_init_soc_specific,
1461}; 1467};
@@ -1467,7 +1473,7 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
1467 .int_en_all = 0xffffffc6, 1473 .int_en_all = 0xffffffc6,
1468 .spi_w = PWRAP_MAN_CMD_SPI_WRITE, 1474 .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
1469 .wdt_src = PWRAP_WDT_SRC_MASK_ALL, 1475 .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
1470 .has_bridge = 0, 1476 .caps = PWRAP_CAP_RESET | PWRAP_CAP_DCM,
1471 .init_reg_clock = pwrap_common_init_reg_clock, 1477 .init_reg_clock = pwrap_common_init_reg_clock,
1472 .init_soc_specific = NULL, 1478 .init_soc_specific = NULL,
1473}; 1479};
@@ -1479,7 +1485,7 @@ static const struct pmic_wrapper_type pwrap_mt7622 = {
1479 .int_en_all = ~(u32)BIT(31), 1485 .int_en_all = ~(u32)BIT(31),
1480 .spi_w = PWRAP_MAN_CMD_SPI_WRITE, 1486 .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
1481 .wdt_src = PWRAP_WDT_SRC_MASK_ALL, 1487 .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
1482 .has_bridge = 0, 1488 .caps = PWRAP_CAP_RESET | PWRAP_CAP_DCM,
1483 .init_reg_clock = pwrap_common_init_reg_clock, 1489 .init_reg_clock = pwrap_common_init_reg_clock,
1484 .init_soc_specific = pwrap_mt7622_init_soc_specific, 1490 .init_soc_specific = pwrap_mt7622_init_soc_specific,
1485}; 1491};
@@ -1491,7 +1497,7 @@ static const struct pmic_wrapper_type pwrap_mt8135 = {
1491 .int_en_all = ~(u32)(BIT(31) | BIT(1)), 1497 .int_en_all = ~(u32)(BIT(31) | BIT(1)),
1492 .spi_w = PWRAP_MAN_CMD_SPI_WRITE, 1498 .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
1493 .wdt_src = PWRAP_WDT_SRC_MASK_ALL, 1499 .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
1494 .has_bridge = 1, 1500 .caps = PWRAP_CAP_BRIDGE | PWRAP_CAP_RESET | PWRAP_CAP_DCM,
1495 .init_reg_clock = pwrap_common_init_reg_clock, 1501 .init_reg_clock = pwrap_common_init_reg_clock,
1496 .init_soc_specific = pwrap_mt8135_init_soc_specific, 1502 .init_soc_specific = pwrap_mt8135_init_soc_specific,
1497}; 1503};
@@ -1503,7 +1509,7 @@ static const struct pmic_wrapper_type pwrap_mt8173 = {
1503 .int_en_all = ~(u32)(BIT(31) | BIT(1)), 1509 .int_en_all = ~(u32)(BIT(31) | BIT(1)),
1504 .spi_w = PWRAP_MAN_CMD_SPI_WRITE, 1510 .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
1505 .wdt_src = PWRAP_WDT_SRC_MASK_NO_STAUPD, 1511 .wdt_src = PWRAP_WDT_SRC_MASK_NO_STAUPD,
1506 .has_bridge = 0, 1512 .caps = PWRAP_CAP_RESET | PWRAP_CAP_DCM,
1507 .init_reg_clock = pwrap_common_init_reg_clock, 1513 .init_reg_clock = pwrap_common_init_reg_clock,
1508 .init_soc_specific = pwrap_mt8173_init_soc_specific, 1514 .init_soc_specific = pwrap_mt8173_init_soc_specific,
1509}; 1515};
@@ -1561,14 +1567,16 @@ static int pwrap_probe(struct platform_device *pdev)
1561 if (IS_ERR(wrp->base)) 1567 if (IS_ERR(wrp->base))
1562 return PTR_ERR(wrp->base); 1568 return PTR_ERR(wrp->base);
1563 1569
1564 wrp->rstc = devm_reset_control_get(wrp->dev, "pwrap"); 1570 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_RESET)) {
1565 if (IS_ERR(wrp->rstc)) { 1571 wrp->rstc = devm_reset_control_get(wrp->dev, "pwrap");
1566 ret = PTR_ERR(wrp->rstc); 1572 if (IS_ERR(wrp->rstc)) {
1567 dev_dbg(wrp->dev, "cannot get pwrap reset: %d\n", ret); 1573 ret = PTR_ERR(wrp->rstc);
1568 return ret; 1574 dev_dbg(wrp->dev, "cannot get pwrap reset: %d\n", ret);
1575 return ret;
1576 }
1569 } 1577 }
1570 1578
1571 if (wrp->master->has_bridge) { 1579 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_BRIDGE)) {
1572 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 1580 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1573 "pwrap-bridge"); 1581 "pwrap-bridge");
1574 wrp->bridge_base = devm_ioremap_resource(wrp->dev, res); 1582 wrp->bridge_base = devm_ioremap_resource(wrp->dev, res);
@@ -1608,8 +1616,10 @@ static int pwrap_probe(struct platform_device *pdev)
1608 goto err_out1; 1616 goto err_out1;
1609 1617
1610 /* Enable internal dynamic clock */ 1618 /* Enable internal dynamic clock */
1611 pwrap_writel(wrp, 1, PWRAP_DCM_EN); 1619 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_DCM)) {
1612 pwrap_writel(wrp, 0, PWRAP_DCM_DBC_PRD); 1620 pwrap_writel(wrp, 1, PWRAP_DCM_EN);
1621 pwrap_writel(wrp, 0, PWRAP_DCM_DBC_PRD);
1622 }
1613 1623
1614 /* 1624 /*
1615 * The PMIC could already be initialized by the bootloader. 1625 * The PMIC could already be initialized by the bootloader.