4 files changed, 1 insertions, 12 deletions

diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index e25503986680..4982e443869c 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1227,7 +1227,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)
                 pdata->block_size = dma_readl(dw, MAX_BLK_SIZE);
 
                 /* Fill platform data with the default values */
-                pdata->is_memcpy = true;
                 pdata->chan_allocation_order = CHAN_ALLOCATION_ASCENDING;
                 pdata->chan_priority = CHAN_PRIORITY_ASCENDING;
         } else if (chip->pdata->nr_channels > DW_DMA_MAX_NR_CHANNELS) {
@@ -1340,8 +1339,7 @@ int dw_dma_probe(struct dw_dma_chip *chip)
         /* Set capabilities */
         dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);
         dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
-        if (pdata->is_memcpy)
-                dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);
+        dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);
 
         dw->dma.dev = chip->dev;
         dw->dma.device_alloc_chan_resources = dwc_alloc_chan_resources;
diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c
index 570498faadc3..66d98d7ccad0 100644
--- a/drivers/dma/dw/pci.c
+++ b/drivers/dma/dw/pci.c
@@ -17,7 +17,6 @@
 
 static struct dw_dma_platform_data mrfld_pdata = {
         .nr_channels = 8,
-        .is_memcpy = true,
         .is_idma32 = true,
         .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
         .chan_priority = CHAN_PRIORITY_ASCENDING,
diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
index 6dd8cd1820c1..58fc1ba02a1e 100644
--- a/drivers/dma/dw/platform.c
+++ b/drivers/dma/dw/platform.c
@@ -128,12 +128,6 @@ dw_dma_parse_dt(struct platform_device *pdev)
         pdata->nr_masters = nr_masters;
         pdata->nr_channels = nr_channels;
 
-        /*
-         * All known devices, which use DT for configuration, support
-         * memory-to-memory transfers. So enable it by default.
-         */
-        pdata->is_memcpy = true;
-
         if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
                 pdata->chan_allocation_order = (unsigned char)tmp;
 
diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
index d443025c5c72..1c85eeee4171 100644
--- a/include/linux/platform_data/dma-dw.h
+++ b/include/linux/platform_data/dma-dw.h
@@ -38,7 +38,6 @@ struct dw_dma_slave {
 /**
  * struct dw_dma_platform_data - Controller configuration parameters
  * @nr_channels: Number of channels supported by hardware (max 8)
- * @is_memcpy: The device channels do support memory-to-memory transfers.
  * @is_idma32: The type of the DMA controller is iDMA32
  * @chan_allocation_order: Allocate channels starting from 0 or 7
  * @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0.
@@ -51,7 +50,6 @@ struct dw_dma_slave {
  */
 struct dw_dma_platform_data {
         unsigned int    nr_channels;
-        bool            is_memcpy;
         bool            is_idma32;
 #define CHAN_ALLOCATION_ASCENDING       0       /* zero to seven */
 #define CHAN_ALLOCATION_DESCENDING      1       /* seven to zero */