1 files changed, 124 insertions, 0 deletions

diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index e87fe34eadf5..3a13285d1aa8 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -94,6 +94,7 @@
 /* Hotplug devices adapter numbers */
 #define MLXPLAT_CPLD_NR_NONE                    -1
 #define MLXPLAT_CPLD_PSU_DEFAULT_NR             10
+#define MLXPLAT_CPLD_PSU_MSNXXXX_NR             4
 #define MLXPLAT_CPLD_FAN1_DEFAULT_NR            11
 #define MLXPLAT_CPLD_FAN2_DEFAULT_NR            12
 #define MLXPLAT_CPLD_FAN3_DEFAULT_NR            13
@@ -335,6 +336,108 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_msn21xx_data = {
         .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
 };
 
+/* Platform hotplug msn274x system family data */
+static struct mlxreg_core_data mlxplat_mlxcpld_msn274x_psu_items_data[] = {
+        {
+                .label = "psu1",
+                .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET,
+                .mask = BIT(0),
+                .hpdev.brdinfo = &mlxplat_mlxcpld_psu[0],
+                .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
+        },
+        {
+                .label = "psu2",
+                .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET,
+                .mask = BIT(1),
+                .hpdev.brdinfo = &mlxplat_mlxcpld_psu[1],
+                .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
+        },
+};
+
+static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_pwr_items_data[] = {
+        {
+                .label = "pwr1",
+                .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
+                .mask = BIT(0),
+                .hpdev.brdinfo = &mlxplat_mlxcpld_pwr[0],
+                .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
+        },
+        {
+                .label = "pwr2",
+                .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
+                .mask = BIT(1),
+                .hpdev.brdinfo = &mlxplat_mlxcpld_pwr[1],
+                .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
+        },
+};
+
+static struct mlxreg_core_data mlxplat_mlxcpld_msn274x_fan_items_data[] = {
+        {
+                .label = "fan1",
+                .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
+                .mask = BIT(0),
+                .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
+        },
+        {
+                .label = "fan2",
+                .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
+                .mask = BIT(1),
+                .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
+        },
+        {
+                .label = "fan3",
+                .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
+                .mask = BIT(2),
+                .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
+        },
+        {
+                .label = "fan4",
+                .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
+                .mask = BIT(3),
+                .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
+        },
+};
+
+static struct mlxreg_core_item mlxplat_mlxcpld_msn274x_items[] = {
+        {
+                .data = mlxplat_mlxcpld_msn274x_psu_items_data,
+                .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+                .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET,
+                .mask = MLXPLAT_CPLD_PSU_MASK,
+                .count = ARRAY_SIZE(mlxplat_mlxcpld_msn274x_psu_items_data),
+                .inversed = 1,
+                .health = false,
+        },
+        {
+                .data = mlxplat_mlxcpld_default_ng_pwr_items_data,
+                .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+                .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
+                .mask = MLXPLAT_CPLD_PWR_MASK,
+                .count = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_pwr_items_data),
+                .inversed = 0,
+                .health = false,
+        },
+        {
+                .data = mlxplat_mlxcpld_msn274x_fan_items_data,
+                .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+                .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
+                .mask = MLXPLAT_CPLD_FAN_MASK,
+                .count = ARRAY_SIZE(mlxplat_mlxcpld_msn274x_fan_items_data),
+                .inversed = 1,
+                .health = false,
+        },
+};
+
+static
+struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_msn274x_data = {
+        .items = mlxplat_mlxcpld_msn274x_items,
+        .counter = ARRAY_SIZE(mlxplat_mlxcpld_msn274x_items),
+        .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET,
+        .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+        .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET,
+        .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
+};
+
 static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
 {
         switch (reg) {
@@ -464,8 +567,29 @@ static int __init mlxplat_dmi_msn21xx_matched(const struct dmi_system_id *dmi)
         return 1;
 };
 
+static int __init mlxplat_dmi_msn274x_matched(const struct dmi_system_id *dmi)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(mlxplat_mux_data); i++) {
+                mlxplat_mux_data[i].values = mlxplat_msn21xx_channels;
+                mlxplat_mux_data[i].n_values =
+                                ARRAY_SIZE(mlxplat_msn21xx_channels);
+        }
+        mlxplat_hotplug = &mlxplat_mlxcpld_msn274x_data;
+
+        return 1;
+};
+
 static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
         {
+                .callback = mlxplat_dmi_msn274x_matched,
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "Mellanox Technologies"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "MSN274"),
+                },
+        },
+        {
                 .callback = mlxplat_dmi_default_matched,
                 .matches = {
                         DMI_MATCH(DMI_BOARD_VENDOR, "Mellanox Technologies"),