diff options
-rw-r--r-- | drivers/pinctrl/intel/pinctrl-baytrail.c | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index bfde1c710bd9..e5a112a8e067 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c | |||
@@ -37,6 +37,7 @@ | |||
37 | /* BYT_CONF0_REG register bits */ | 37 | /* BYT_CONF0_REG register bits */ |
38 | #define BYT_IODEN BIT(31) | 38 | #define BYT_IODEN BIT(31) |
39 | #define BYT_DIRECT_IRQ_EN BIT(27) | 39 | #define BYT_DIRECT_IRQ_EN BIT(27) |
40 | #define BYT_TRIG_MASK GENMASK(26, 24) | ||
40 | #define BYT_TRIG_NEG BIT(26) | 41 | #define BYT_TRIG_NEG BIT(26) |
41 | #define BYT_TRIG_POS BIT(25) | 42 | #define BYT_TRIG_POS BIT(25) |
42 | #define BYT_TRIG_LVL BIT(24) | 43 | #define BYT_TRIG_LVL BIT(24) |
@@ -45,31 +46,28 @@ | |||
45 | #define BYT_GLITCH_F_SLOW_CLK BIT(17) | 46 | #define BYT_GLITCH_F_SLOW_CLK BIT(17) |
46 | #define BYT_GLITCH_F_FAST_CLK BIT(16) | 47 | #define BYT_GLITCH_F_FAST_CLK BIT(16) |
47 | #define BYT_PULL_STR_SHIFT 9 | 48 | #define BYT_PULL_STR_SHIFT 9 |
48 | #define BYT_PULL_STR_MASK (3 << BYT_PULL_STR_SHIFT) | 49 | #define BYT_PULL_STR_MASK GENMASK(10, 9) |
49 | #define BYT_PULL_STR_2K (0 << BYT_PULL_STR_SHIFT) | 50 | #define BYT_PULL_STR_2K (0 << BYT_PULL_STR_SHIFT) |
50 | #define BYT_PULL_STR_10K (1 << BYT_PULL_STR_SHIFT) | 51 | #define BYT_PULL_STR_10K (1 << BYT_PULL_STR_SHIFT) |
51 | #define BYT_PULL_STR_20K (2 << BYT_PULL_STR_SHIFT) | 52 | #define BYT_PULL_STR_20K (2 << BYT_PULL_STR_SHIFT) |
52 | #define BYT_PULL_STR_40K (3 << BYT_PULL_STR_SHIFT) | 53 | #define BYT_PULL_STR_40K (3 << BYT_PULL_STR_SHIFT) |
53 | #define BYT_PULL_ASSIGN_SHIFT 7 | 54 | #define BYT_PULL_ASSIGN_SHIFT 7 |
54 | #define BYT_PULL_ASSIGN_MASK (3 << BYT_PULL_ASSIGN_SHIFT) | 55 | #define BYT_PULL_ASSIGN_MASK GENMASK(8, 7) |
55 | #define BYT_PULL_ASSIGN_UP (1 << BYT_PULL_ASSIGN_SHIFT) | 56 | #define BYT_PULL_ASSIGN_UP (1 << BYT_PULL_ASSIGN_SHIFT) |
56 | #define BYT_PULL_ASSIGN_DOWN (2 << BYT_PULL_ASSIGN_SHIFT) | 57 | #define BYT_PULL_ASSIGN_DOWN (2 << BYT_PULL_ASSIGN_SHIFT) |
57 | #define BYT_PIN_MUX 0x07 | 58 | #define BYT_PIN_MUX GENMASK(2, 0) |
58 | 59 | ||
59 | /* BYT_VAL_REG register bits */ | 60 | /* BYT_VAL_REG register bits */ |
61 | #define BYT_DIR_MASK GENMASK(2, 1) | ||
60 | #define BYT_INPUT_EN BIT(2) /* 0: input enabled (active low)*/ | 62 | #define BYT_INPUT_EN BIT(2) /* 0: input enabled (active low)*/ |
61 | #define BYT_OUTPUT_EN BIT(1) /* 0: output enabled (active low)*/ | 63 | #define BYT_OUTPUT_EN BIT(1) /* 0: output enabled (active low)*/ |
62 | #define BYT_LEVEL BIT(0) | 64 | #define BYT_LEVEL BIT(0) |
63 | 65 | ||
64 | #define BYT_DIR_MASK (BIT(1) | BIT(2)) | 66 | #define BYT_CONF0_RESTORE_MASK (BYT_DIRECT_IRQ_EN | BYT_TRIG_MASK | BYT_PIN_MUX) |
65 | #define BYT_TRIG_MASK (BIT(26) | BIT(25) | BIT(24)) | ||
66 | |||
67 | #define BYT_CONF0_RESTORE_MASK (BYT_DIRECT_IRQ_EN | BYT_TRIG_MASK | \ | ||
68 | BYT_PIN_MUX) | ||
69 | #define BYT_VAL_RESTORE_MASK (BYT_DIR_MASK | BYT_LEVEL) | 67 | #define BYT_VAL_RESTORE_MASK (BYT_DIR_MASK | BYT_LEVEL) |
70 | 68 | ||
71 | /* BYT_DEBOUNCE_REG bits */ | 69 | /* BYT_DEBOUNCE_REG bits */ |
72 | #define BYT_DEBOUNCE_PULSE_MASK 0x7 | 70 | #define BYT_DEBOUNCE_PULSE_MASK GENMASK(2, 0) |
73 | #define BYT_DEBOUNCE_PULSE_375US 1 | 71 | #define BYT_DEBOUNCE_PULSE_375US 1 |
74 | #define BYT_DEBOUNCE_PULSE_750US 2 | 72 | #define BYT_DEBOUNCE_PULSE_750US 2 |
75 | #define BYT_DEBOUNCE_PULSE_1500US 3 | 73 | #define BYT_DEBOUNCE_PULSE_1500US 3 |